Home | History | Annotate | Line # | Download | only in usb
uhci.c revision 1.232.2.3
      1  1.232.2.2     rmind /*	$NetBSD: uhci.c,v 1.232.2.3 2011/05/31 03:04:56 rmind Exp $	*/
      2       1.67  augustss /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
      3        1.1  augustss 
      4        1.1  augustss /*
      5      1.185   mycroft  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
      6        1.1  augustss  * All rights reserved.
      7        1.1  augustss  *
      8       1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      9      1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
     10       1.11  augustss  * Carlstedt Research & Technology.
     11        1.1  augustss  *
     12        1.1  augustss  * Redistribution and use in source and binary forms, with or without
     13        1.1  augustss  * modification, are permitted provided that the following conditions
     14        1.1  augustss  * are met:
     15        1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     16        1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     17        1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     18        1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     19        1.1  augustss  *    documentation and/or other materials provided with the distribution.
     20        1.1  augustss  *
     21        1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22        1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23        1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24        1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25        1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26        1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27        1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28        1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29        1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30        1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31        1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     32        1.1  augustss  */
     33        1.1  augustss 
     34        1.1  augustss /*
     35        1.1  augustss  * USB Universal Host Controller driver.
     36       1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     37        1.1  augustss  *
     38      1.229  uebayasi  * UHCI spec: http://www.intel.com/technology/usb/spec.htm
     39      1.229  uebayasi  * USB spec: http://www.usb.org/developers/docs/
     40       1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     41       1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     42        1.1  augustss  */
     43      1.143     lukem 
     44      1.143     lukem #include <sys/cdefs.h>
     45  1.232.2.2     rmind __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.232.2.3 2011/05/31 03:04:56 rmind Exp $");
     46        1.1  augustss 
     47        1.1  augustss #include <sys/param.h>
     48        1.1  augustss #include <sys/systm.h>
     49        1.1  augustss #include <sys/kernel.h>
     50        1.1  augustss #include <sys/malloc.h>
     51        1.1  augustss #include <sys/device.h>
     52       1.67  augustss #include <sys/select.h>
     53      1.183      fvdl #include <sys/extent.h>
     54        1.1  augustss #include <sys/proc.h>
     55        1.1  augustss #include <sys/queue.h>
     56      1.211        ad #include <sys/bus.h>
     57        1.1  augustss 
     58       1.39  augustss #include <machine/endian.h>
     59        1.7  augustss 
     60        1.1  augustss #include <dev/usb/usb.h>
     61        1.1  augustss #include <dev/usb/usbdi.h>
     62        1.1  augustss #include <dev/usb/usbdivar.h>
     63        1.7  augustss #include <dev/usb/usb_mem.h>
     64        1.1  augustss #include <dev/usb/usb_quirks.h>
     65        1.1  augustss 
     66        1.1  augustss #include <dev/usb/uhcireg.h>
     67        1.1  augustss #include <dev/usb/uhcivar.h>
     68      1.213  drochner #include <dev/usb/usbroothub_subr.h>
     69        1.1  augustss 
     70      1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     71      1.125  augustss /*#define UHCI_CTL_LOOP */
     72      1.125  augustss 
     73       1.13  augustss 
     74       1.37  augustss 
     75       1.67  augustss #ifdef UHCI_DEBUG
     76       1.92  augustss uhci_softc_t *thesc;
     77       1.59  augustss #define DPRINTF(x)	if (uhcidebug) printf x
     78       1.59  augustss #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
     79       1.67  augustss int uhcidebug = 0;
     80      1.125  augustss int uhcinoloop = 0;
     81       1.59  augustss #else
     82       1.59  augustss #define DPRINTF(x)
     83       1.59  augustss #define DPRINTFN(n,x)
     84       1.59  augustss #endif
     85       1.59  augustss 
     86       1.39  augustss /*
     87       1.39  augustss  * The UHCI controller is little endian, so on big endian machines
     88      1.181  drochner  * the data stored in memory needs to be swapped.
     89       1.39  augustss  */
     90       1.39  augustss 
     91        1.1  augustss struct uhci_pipe {
     92        1.1  augustss 	struct usbd_pipe pipe;
     93       1.32  augustss 	int nexttoggle;
     94       1.92  augustss 
     95       1.92  augustss 	u_char aborting;
     96       1.92  augustss 	usbd_xfer_handle abortstart, abortend;
     97       1.92  augustss 
     98        1.1  augustss 	/* Info needed for different pipe kinds. */
     99        1.1  augustss 	union {
    100        1.1  augustss 		/* Control pipe */
    101        1.1  augustss 		struct {
    102        1.1  augustss 			uhci_soft_qh_t *sqh;
    103        1.7  augustss 			usb_dma_t reqdma;
    104       1.16  augustss 			uhci_soft_td_t *setup, *stat;
    105        1.1  augustss 			u_int length;
    106        1.1  augustss 		} ctl;
    107        1.1  augustss 		/* Interrupt pipe */
    108        1.1  augustss 		struct {
    109        1.1  augustss 			int npoll;
    110      1.187     skrll 			int isread;
    111        1.1  augustss 			uhci_soft_qh_t **qhs;
    112        1.1  augustss 		} intr;
    113        1.1  augustss 		/* Bulk pipe */
    114        1.1  augustss 		struct {
    115        1.1  augustss 			uhci_soft_qh_t *sqh;
    116        1.1  augustss 			u_int length;
    117        1.1  augustss 			int isread;
    118        1.1  augustss 		} bulk;
    119       1.16  augustss 		/* Iso pipe */
    120       1.16  augustss 		struct iso {
    121       1.16  augustss 			uhci_soft_td_t **stds;
    122       1.48  augustss 			int next, inuse;
    123       1.16  augustss 		} iso;
    124        1.1  augustss 	} u;
    125        1.1  augustss };
    126        1.1  augustss 
    127      1.142  augustss Static void		uhci_globalreset(uhci_softc_t *);
    128      1.166   dsainty Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    129      1.142  augustss Static void		uhci_reset(uhci_softc_t *);
    130      1.119  augustss Static usbd_status	uhci_run(uhci_softc_t *, int run);
    131      1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    132      1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    133      1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    134      1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    135       1.16  augustss #if 0
    136      1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    137      1.119  augustss 					 uhci_intr_info_t *);
    138      1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    139       1.16  augustss #endif
    140        1.1  augustss 
    141      1.152  augustss Static void		uhci_free_std_chain(uhci_softc_t *,
    142      1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    143      1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    144      1.152  augustss 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
    145      1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    146      1.119  augustss Static void		uhci_poll_hub(void *);
    147      1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    148      1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    149      1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    150      1.119  augustss 
    151      1.119  augustss Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    152      1.119  augustss 
    153      1.119  augustss Static void		uhci_timeout(void *);
    154      1.153  augustss Static void		uhci_timeout_task(void *);
    155      1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    156      1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    157      1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    158      1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    159      1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    160      1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    161      1.123  augustss Static void		uhci_add_loop(uhci_softc_t *sc);
    162      1.123  augustss Static void		uhci_rem_loop(uhci_softc_t *sc);
    163      1.119  augustss 
    164      1.119  augustss Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    165      1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    166      1.119  augustss 
    167      1.119  augustss Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    168      1.119  augustss Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
    169      1.119  augustss 
    170      1.119  augustss Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    171      1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    172      1.119  augustss 
    173      1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    174      1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    175      1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    176      1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    177      1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    178      1.119  augustss 
    179      1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    180      1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    181      1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    182      1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    183      1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    184      1.119  augustss 
    185      1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    186      1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    187      1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    188      1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    189      1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    190      1.119  augustss 
    191      1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    192      1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    193      1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    194      1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    195      1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    196      1.119  augustss 
    197      1.119  augustss Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    198      1.119  augustss Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    199      1.119  augustss Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    200      1.119  augustss Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    201      1.119  augustss Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    202      1.119  augustss 
    203      1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    204      1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    205      1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    206      1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    207      1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    208      1.119  augustss 
    209      1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    210      1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    211      1.133  augustss Static void		uhci_softintr(void *);
    212      1.119  augustss 
    213      1.119  augustss Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    214      1.119  augustss 
    215      1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    216      1.158  augustss Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    217      1.152  augustss Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    218      1.119  augustss 			    struct uhci_pipe *pipe, int ival);
    219      1.119  augustss 
    220      1.119  augustss Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    221      1.119  augustss Static void		uhci_noop(usbd_pipe_handle pipe);
    222      1.119  augustss 
    223      1.192     perry Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    224      1.119  augustss 						    uhci_soft_qh_t *);
    225      1.119  augustss 
    226      1.119  augustss #ifdef UHCI_DEBUG
    227      1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    228      1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    229      1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    230      1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    231      1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    232      1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    233      1.119  augustss Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    234      1.119  augustss void			uhci_dump(void);
    235        1.1  augustss #endif
    236        1.1  augustss 
    237      1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    238      1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    239      1.112  augustss #define UWRITE1(sc, r, x) \
    240      1.165   dsainty  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    241      1.165   dsainty  } while (/*CONSTCOND*/0)
    242      1.112  augustss #define UWRITE2(sc, r, x) \
    243      1.165   dsainty  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    244      1.165   dsainty  } while (/*CONSTCOND*/0)
    245      1.112  augustss #define UWRITE4(sc, r, x) \
    246      1.165   dsainty  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    247      1.165   dsainty  } while (/*CONSTCOND*/0)
    248      1.196       mrg static __inline uint8_t
    249      1.196       mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
    250      1.196       mrg {
    251      1.196       mrg 
    252      1.196       mrg 	UBARR(sc);
    253      1.196       mrg 	return bus_space_read_1(sc->iot, sc->ioh, r);
    254      1.196       mrg }
    255      1.196       mrg 
    256      1.196       mrg static __inline uint16_t
    257      1.196       mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
    258      1.196       mrg {
    259      1.196       mrg 
    260      1.196       mrg 	UBARR(sc);
    261      1.196       mrg 	return bus_space_read_2(sc->iot, sc->ioh, r);
    262      1.196       mrg }
    263      1.196       mrg 
    264      1.196       mrg static __inline uint32_t
    265      1.196       mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
    266      1.196       mrg {
    267      1.196       mrg 
    268      1.196       mrg 	UBARR(sc);
    269      1.196       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    270      1.196       mrg }
    271        1.1  augustss 
    272        1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    273        1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    274        1.1  augustss 
    275      1.142  augustss #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    276        1.1  augustss 
    277        1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    278        1.1  augustss 
    279        1.1  augustss #define UHCI_INTR_ENDPT 1
    280        1.1  augustss 
    281      1.208  drochner const struct usbd_bus_methods uhci_bus_methods = {
    282       1.48  augustss 	uhci_open,
    283       1.85  augustss 	uhci_softintr,
    284       1.48  augustss 	uhci_poll,
    285       1.48  augustss 	uhci_allocm,
    286       1.48  augustss 	uhci_freem,
    287       1.76  augustss 	uhci_allocx,
    288       1.76  augustss 	uhci_freex,
    289       1.48  augustss };
    290       1.48  augustss 
    291      1.208  drochner const struct usbd_pipe_methods uhci_root_ctrl_methods = {
    292        1.1  augustss 	uhci_root_ctrl_transfer,
    293       1.16  augustss 	uhci_root_ctrl_start,
    294        1.1  augustss 	uhci_root_ctrl_abort,
    295        1.1  augustss 	uhci_root_ctrl_close,
    296       1.38  augustss 	uhci_noop,
    297       1.84  augustss 	uhci_root_ctrl_done,
    298        1.1  augustss };
    299        1.1  augustss 
    300      1.208  drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
    301        1.1  augustss 	uhci_root_intr_transfer,
    302       1.16  augustss 	uhci_root_intr_start,
    303        1.1  augustss 	uhci_root_intr_abort,
    304        1.1  augustss 	uhci_root_intr_close,
    305       1.38  augustss 	uhci_noop,
    306       1.41  augustss 	uhci_root_intr_done,
    307        1.1  augustss };
    308        1.1  augustss 
    309      1.208  drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    310        1.1  augustss 	uhci_device_ctrl_transfer,
    311       1.16  augustss 	uhci_device_ctrl_start,
    312        1.1  augustss 	uhci_device_ctrl_abort,
    313        1.1  augustss 	uhci_device_ctrl_close,
    314       1.38  augustss 	uhci_noop,
    315       1.41  augustss 	uhci_device_ctrl_done,
    316        1.1  augustss };
    317        1.1  augustss 
    318      1.208  drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
    319        1.1  augustss 	uhci_device_intr_transfer,
    320       1.16  augustss 	uhci_device_intr_start,
    321        1.1  augustss 	uhci_device_intr_abort,
    322        1.1  augustss 	uhci_device_intr_close,
    323       1.38  augustss 	uhci_device_clear_toggle,
    324       1.41  augustss 	uhci_device_intr_done,
    325        1.1  augustss };
    326        1.1  augustss 
    327      1.208  drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
    328        1.1  augustss 	uhci_device_bulk_transfer,
    329       1.16  augustss 	uhci_device_bulk_start,
    330        1.1  augustss 	uhci_device_bulk_abort,
    331        1.1  augustss 	uhci_device_bulk_close,
    332       1.38  augustss 	uhci_device_clear_toggle,
    333       1.41  augustss 	uhci_device_bulk_done,
    334        1.1  augustss };
    335        1.1  augustss 
    336      1.208  drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
    337       1.16  augustss 	uhci_device_isoc_transfer,
    338       1.16  augustss 	uhci_device_isoc_start,
    339       1.16  augustss 	uhci_device_isoc_abort,
    340       1.16  augustss 	uhci_device_isoc_close,
    341       1.38  augustss 	uhci_noop,
    342       1.41  augustss 	uhci_device_isoc_done,
    343       1.16  augustss };
    344       1.16  augustss 
    345       1.92  augustss #define uhci_add_intr_info(sc, ii) \
    346      1.169  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    347       1.92  augustss #define uhci_del_intr_info(ii) \
    348      1.169  augustss 	do { \
    349      1.169  augustss 		LIST_REMOVE((ii), list); \
    350      1.169  augustss 		(ii)->list.le_prev = NULL; \
    351      1.169  augustss 	} while (0)
    352      1.169  augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    353       1.92  augustss 
    354      1.192     perry Static inline uhci_soft_qh_t *
    355      1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    356       1.92  augustss {
    357       1.92  augustss 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    358       1.92  augustss 
    359       1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    360      1.152  augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    361      1.223    bouyer 		usb_syncmem(&pqh->dma,
    362      1.223    bouyer 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    363      1.223    bouyer 		    sizeof(pqh->qh.qh_hlink),
    364      1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
    365       1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    366      1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    367       1.92  augustss 			return (NULL);
    368       1.92  augustss 		}
    369       1.92  augustss #endif
    370       1.92  augustss 	}
    371       1.92  augustss 	return (pqh);
    372       1.92  augustss }
    373       1.92  augustss 
    374        1.1  augustss void
    375      1.142  augustss uhci_globalreset(uhci_softc_t *sc)
    376        1.1  augustss {
    377        1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    378       1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    379        1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    380        1.1  augustss }
    381        1.1  augustss 
    382        1.1  augustss usbd_status
    383      1.119  augustss uhci_init(uhci_softc_t *sc)
    384        1.1  augustss {
    385       1.63  augustss 	usbd_status err;
    386        1.1  augustss 	int i, j;
    387      1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    388        1.1  augustss 	uhci_soft_td_t *std;
    389        1.1  augustss 
    390        1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    391        1.1  augustss 
    392       1.67  augustss #ifdef UHCI_DEBUG
    393       1.92  augustss 	thesc = sc;
    394       1.92  augustss 
    395        1.1  augustss 	if (uhcidebug > 2)
    396        1.1  augustss 		uhci_dumpregs(sc);
    397        1.1  augustss #endif
    398        1.1  augustss 
    399      1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    400      1.219  jmcneill 
    401        1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    402      1.142  augustss 	uhci_globalreset(sc);			/* reset the controller */
    403      1.142  augustss 	uhci_reset(sc);
    404       1.24  augustss 
    405      1.218  drochner 	usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    406      1.183      fvdl 	    USB_MEM_RESERVE);
    407      1.183      fvdl 
    408        1.1  augustss 	/* Allocate and initialize real frame array. */
    409      1.152  augustss 	err = usb_allocmem(&sc->sc_bus,
    410       1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    411       1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    412       1.63  augustss 	if (err)
    413       1.63  augustss 		return (err);
    414      1.159  augustss 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    415        1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    416      1.160  augustss 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    417        1.1  augustss 
    418      1.152  augustss 	/*
    419      1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    420      1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    421      1.123  augustss 	 * otherwise.
    422      1.123  augustss 	 */
    423      1.123  augustss 	std = uhci_alloc_std(sc);
    424      1.123  augustss 	if (std == NULL)
    425      1.123  augustss 		return (USBD_NOMEM);
    426      1.123  augustss 	std->link.std = NULL;
    427      1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    428      1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    429      1.123  augustss 	std->td.td_token = htole32(0);
    430      1.123  augustss 	std->td.td_buffer = htole32(0);
    431      1.223    bouyer 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    432      1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    433      1.123  augustss 
    434      1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    435      1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    436      1.123  augustss 	if (lsqh == NULL)
    437      1.123  augustss 		return (USBD_NOMEM);
    438      1.123  augustss 	lsqh->hlink = NULL;
    439      1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    440      1.123  augustss 	lsqh->elink = std;
    441      1.123  augustss 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    442      1.123  augustss 	sc->sc_last_qh = lsqh;
    443      1.223    bouyer 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    444      1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    445      1.123  augustss 
    446        1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    447        1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    448       1.63  augustss 	if (bsqh == NULL)
    449        1.1  augustss 		return (USBD_NOMEM);
    450      1.123  augustss 	bsqh->hlink = lsqh;
    451      1.123  augustss 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    452      1.121  augustss 	bsqh->elink = NULL;
    453       1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    454        1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    455      1.223    bouyer 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    456      1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    457        1.1  augustss 
    458      1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    459      1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    460      1.123  augustss 	if (chsqh == NULL)
    461      1.123  augustss 		return (USBD_NOMEM);
    462      1.123  augustss 	chsqh->hlink = bsqh;
    463      1.123  augustss 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    464      1.123  augustss 	chsqh->elink = NULL;
    465      1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    466      1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    467      1.223    bouyer 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    468      1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    469      1.123  augustss 
    470      1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    471      1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    472      1.123  augustss 	if (clsqh == NULL)
    473        1.1  augustss 		return (USBD_NOMEM);
    474      1.220    bouyer 	clsqh->hlink = chsqh;
    475      1.123  augustss 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    476      1.123  augustss 	clsqh->elink = NULL;
    477      1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    478      1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    479      1.223    bouyer 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    480      1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    481        1.1  augustss 
    482      1.152  augustss 	/*
    483        1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    484        1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    485        1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    486        1.1  augustss 	 */
    487        1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    488        1.1  augustss 		std = uhci_alloc_std(sc);
    489        1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    490       1.67  augustss 		if (std == NULL || sqh == NULL)
    491       1.13  augustss 			return (USBD_NOMEM);
    492       1.42  augustss 		std->link.sqh = sqh;
    493      1.121  augustss 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    494       1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    495       1.88   tsutsui 		std->td.td_token = htole32(0);
    496       1.88   tsutsui 		std->td.td_buffer = htole32(0);
    497      1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    498      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    499      1.123  augustss 		sqh->hlink = clsqh;
    500      1.123  augustss 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    501      1.121  augustss 		sqh->elink = NULL;
    502       1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    503      1.223    bouyer 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    504      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    505        1.1  augustss 		sc->sc_vframes[i].htd = std;
    506        1.1  augustss 		sc->sc_vframes[i].etd = std;
    507        1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    508        1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    509      1.152  augustss 		for (j = i;
    510      1.152  augustss 		     j < UHCI_FRAMELIST_COUNT;
    511        1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    512       1.88   tsutsui 			sc->sc_pframes[j] = htole32(std->physaddr);
    513        1.1  augustss 	}
    514      1.223    bouyer 	usb_syncmem(&sc->sc_dma, 0,
    515      1.223    bouyer 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    516      1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
    517      1.223    bouyer 
    518        1.1  augustss 
    519        1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    520        1.1  augustss 
    521       1.76  augustss 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    522       1.76  augustss 
    523  1.232.2.2     rmind 	callout_init(&sc->sc_poll_handle, 0);
    524       1.96  augustss 
    525        1.1  augustss 	/* Set up the bus struct. */
    526       1.48  augustss 	sc->sc_bus.methods = &uhci_bus_methods;
    527        1.1  augustss 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    528        1.1  augustss 
    529      1.190  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    530      1.190  augustss 
    531        1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    532      1.225    bouyer 
    533      1.225    bouyer 	err =  uhci_run(sc, 1);		/* and here we go... */
    534      1.152  augustss 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    535        1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    536      1.225    bouyer 	return err;
    537       1.53  augustss }
    538       1.53  augustss 
    539       1.53  augustss int
    540      1.215    dyoung uhci_activate(device_t self, enum devact act)
    541       1.53  augustss {
    542      1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    543       1.53  augustss 
    544       1.53  augustss 	switch (act) {
    545       1.53  augustss 	case DVACT_DEACTIVATE:
    546      1.210  kiyohara 		sc->sc_dying = 1;
    547      1.230    dyoung 		return 0;
    548      1.230    dyoung 	default:
    549      1.230    dyoung 		return EOPNOTSUPP;
    550       1.53  augustss 	}
    551       1.53  augustss }
    552       1.53  augustss 
    553      1.215    dyoung void
    554      1.215    dyoung uhci_childdet(device_t self, device_t child)
    555      1.215    dyoung {
    556      1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    557      1.215    dyoung 
    558      1.215    dyoung 	KASSERT(sc->sc_child == child);
    559      1.215    dyoung 	sc->sc_child = NULL;
    560      1.215    dyoung }
    561      1.215    dyoung 
    562       1.53  augustss int
    563      1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    564       1.53  augustss {
    565       1.76  augustss 	usbd_xfer_handle xfer;
    566       1.53  augustss 	int rv = 0;
    567       1.53  augustss 
    568       1.53  augustss 	if (sc->sc_child != NULL)
    569       1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    570      1.152  augustss 
    571       1.53  augustss 	if (rv != 0)
    572       1.53  augustss 		return (rv);
    573       1.53  augustss 
    574       1.76  augustss 	/* Free all xfers associated with this HC. */
    575       1.76  augustss 	for (;;) {
    576       1.76  augustss 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    577       1.76  augustss 		if (xfer == NULL)
    578       1.76  augustss 			break;
    579      1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    580       1.76  augustss 		free(xfer, M_USB);
    581      1.152  augustss 	}
    582       1.76  augustss 
    583      1.226        ad 	callout_halt(&sc->sc_poll_handle, NULL);
    584      1.226        ad 	callout_destroy(&sc->sc_poll_handle);
    585      1.226        ad 
    586       1.76  augustss 	/* XXX free other data structures XXX */
    587       1.53  augustss 
    588       1.53  augustss 	return (rv);
    589        1.1  augustss }
    590        1.1  augustss 
    591       1.48  augustss usbd_status
    592      1.119  augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    593       1.48  augustss {
    594      1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    595      1.183      fvdl 	usbd_status status;
    596      1.102  augustss 	u_int32_t n;
    597      1.102  augustss 
    598      1.152  augustss 	/*
    599      1.102  augustss 	 * XXX
    600      1.102  augustss 	 * Since we are allocating a buffer we can assume that we will
    601      1.148  augustss 	 * need TDs for it.  Since we don't want to allocate those from
    602      1.102  augustss 	 * an interrupt context, we allocate them here and free them again.
    603      1.102  augustss 	 * This is no guarantee that we'll get the TDs next time...
    604      1.102  augustss 	 */
    605      1.102  augustss 	n = size / 8;
    606      1.102  augustss 	if (n > 16) {
    607      1.102  augustss 		u_int32_t i;
    608      1.102  augustss 		uhci_soft_td_t **stds;
    609      1.102  augustss 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
    610      1.150   tsutsui 		stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
    611      1.151  augustss 		    M_WAITOK|M_ZERO);
    612      1.102  augustss 		for(i=0; i < n; i++)
    613      1.102  augustss 			stds[i] = uhci_alloc_std(sc);
    614      1.102  augustss 		for(i=0; i < n; i++)
    615      1.102  augustss 			if (stds[i] != NULL)
    616      1.102  augustss 				uhci_free_std(sc, stds[i]);
    617      1.102  augustss 		free(stds, M_TEMP);
    618      1.102  augustss 	}
    619      1.102  augustss 
    620      1.183      fvdl 
    621      1.183      fvdl 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
    622      1.183      fvdl 	if (status == USBD_NOMEM)
    623      1.183      fvdl 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
    624      1.183      fvdl 	return status;
    625       1.48  augustss }
    626       1.48  augustss 
    627       1.48  augustss void
    628      1.119  augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    629       1.48  augustss {
    630      1.183      fvdl 	if (dma->block->flags & USB_DMA_RESERVE) {
    631      1.183      fvdl 		usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
    632      1.183      fvdl 		    dma);
    633      1.183      fvdl 		return;
    634      1.183      fvdl 	}
    635       1.63  augustss 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
    636       1.76  augustss }
    637       1.76  augustss 
    638       1.76  augustss usbd_xfer_handle
    639      1.119  augustss uhci_allocx(struct usbd_bus *bus)
    640       1.76  augustss {
    641      1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    642       1.76  augustss 	usbd_xfer_handle xfer;
    643       1.76  augustss 
    644       1.76  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    645       1.94  augustss 	if (xfer != NULL) {
    646      1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    647       1.98  augustss #ifdef DIAGNOSTIC
    648       1.94  augustss 		if (xfer->busy_free != XFER_FREE) {
    649      1.105  augustss 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    650       1.94  augustss 			       xfer->busy_free);
    651       1.94  augustss 		}
    652       1.98  augustss #endif
    653       1.94  augustss 	} else {
    654       1.92  augustss 		xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
    655       1.94  augustss 	}
    656       1.92  augustss 	if (xfer != NULL) {
    657       1.92  augustss 		memset(xfer, 0, sizeof (struct uhci_xfer));
    658       1.92  augustss 		UXFER(xfer)->iinfo.sc = sc;
    659       1.92  augustss #ifdef DIAGNOSTIC
    660       1.92  augustss 		UXFER(xfer)->iinfo.isdone = 1;
    661      1.135  augustss 		xfer->busy_free = XFER_BUSY;
    662       1.92  augustss #endif
    663       1.92  augustss 	}
    664       1.76  augustss 	return (xfer);
    665       1.76  augustss }
    666       1.76  augustss 
    667       1.76  augustss void
    668      1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    669       1.76  augustss {
    670      1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    671       1.76  augustss 
    672       1.93  augustss #ifdef DIAGNOSTIC
    673       1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
    674       1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    675       1.94  augustss 		       xfer->busy_free);
    676       1.93  augustss 	}
    677       1.94  augustss 	xfer->busy_free = XFER_FREE;
    678      1.105  augustss 	if (!UXFER(xfer)->iinfo.isdone) {
    679       1.96  augustss 		printf("uhci_freex: !isdone\n");
    680      1.105  augustss 	}
    681       1.93  augustss #endif
    682       1.76  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    683       1.48  augustss }
    684       1.48  augustss 
    685       1.72  augustss /*
    686      1.212  jmcneill  * Handle suspend/resume.
    687      1.212  jmcneill  *
    688      1.212  jmcneill  * We need to switch to polling mode here, because this routine is
    689      1.212  jmcneill  * called from an interrupt context.  This is all right since we
    690      1.212  jmcneill  * are almost suspended anyway.
    691       1.72  augustss  */
    692      1.212  jmcneill bool
    693      1.232    dyoung uhci_resume(device_t dv, const pmf_qual_t *qual)
    694       1.72  augustss {
    695      1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    696      1.212  jmcneill 	int cmd;
    697      1.193  augustss 	int s;
    698       1.72  augustss 
    699      1.212  jmcneill 	s = splhardusb();
    700      1.193  augustss 
    701      1.212  jmcneill 	cmd = UREAD2(sc, UHCI_CMD);
    702      1.193  augustss 	sc->sc_bus.use_polling++;
    703      1.214       smb 	UWRITE2(sc, UHCI_INTR, 0);
    704      1.214       smb 	uhci_globalreset(sc);
    705      1.214       smb 	uhci_reset(sc);
    706      1.212  jmcneill 	if (cmd & UHCI_CMD_RS)
    707      1.212  jmcneill 		uhci_run(sc, 0);
    708      1.212  jmcneill 
    709      1.212  jmcneill 	/* restore saved state */
    710      1.212  jmcneill 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    711      1.212  jmcneill 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    712      1.212  jmcneill 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    713      1.212  jmcneill 
    714      1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
    715      1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    716      1.212  jmcneill 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    717      1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
    718      1.212  jmcneill 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
    719      1.214       smb 	UHCICMD(sc, UHCI_CMD_MAXP);
    720      1.212  jmcneill 	uhci_run(sc, 1); /* and start traffic again */
    721      1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    722      1.193  augustss 	sc->sc_bus.use_polling--;
    723      1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    724  1.232.2.2     rmind 		callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
    725      1.212  jmcneill 		    sc->sc_intr_xfer);
    726      1.212  jmcneill #ifdef UHCI_DEBUG
    727      1.212  jmcneill 	if (uhcidebug > 2)
    728      1.212  jmcneill 		uhci_dumpregs(sc);
    729      1.212  jmcneill #endif
    730      1.212  jmcneill 
    731      1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    732      1.193  augustss 	splx(s);
    733      1.212  jmcneill 
    734      1.212  jmcneill 	return true;
    735       1.72  augustss }
    736       1.72  augustss 
    737      1.212  jmcneill bool
    738      1.232    dyoung uhci_suspend(device_t dv, const pmf_qual_t *qual)
    739       1.30  augustss {
    740      1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    741       1.30  augustss 	int cmd;
    742       1.30  augustss 	int s;
    743       1.30  augustss 
    744      1.132  augustss 	s = splhardusb();
    745      1.212  jmcneill 
    746       1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    747       1.30  augustss 
    748      1.212  jmcneill #ifdef UHCI_DEBUG
    749      1.212  jmcneill 	if (uhcidebug > 2)
    750      1.212  jmcneill 		uhci_dumpregs(sc);
    751      1.212  jmcneill #endif
    752      1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    753  1.232.2.2     rmind 		callout_stop(&sc->sc_poll_handle);
    754      1.219  jmcneill 	sc->sc_suspend = PWR_SUSPEND;
    755      1.212  jmcneill 	sc->sc_bus.use_polling++;
    756      1.219  jmcneill 
    757      1.212  jmcneill 	uhci_run(sc, 0); /* stop the controller */
    758      1.212  jmcneill 	cmd &= ~UHCI_CMD_RS;
    759      1.212  jmcneill 
    760      1.212  jmcneill 	/* save some state if BIOS doesn't */
    761      1.212  jmcneill 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    762      1.212  jmcneill 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    763      1.212  jmcneill 
    764      1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    765       1.30  augustss 
    766      1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
    767      1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    768      1.212  jmcneill 	sc->sc_bus.use_polling--;
    769       1.86  augustss 
    770       1.30  augustss 	splx(s);
    771      1.212  jmcneill 
    772      1.212  jmcneill 	return true;
    773       1.30  augustss }
    774       1.30  augustss 
    775       1.59  augustss #ifdef UHCI_DEBUG
    776      1.101  augustss Static void
    777      1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
    778        1.1  augustss {
    779       1.48  augustss 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    780       1.48  augustss 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    781      1.216  drochner 		     device_xname(sc->sc_dev),
    782       1.48  augustss 		     UREAD2(sc, UHCI_CMD),
    783       1.48  augustss 		     UREAD2(sc, UHCI_STS),
    784       1.48  augustss 		     UREAD2(sc, UHCI_INTR),
    785       1.48  augustss 		     UREAD2(sc, UHCI_FRNUM),
    786       1.48  augustss 		     UREAD4(sc, UHCI_FLBASEADDR),
    787       1.48  augustss 		     UREAD1(sc, UHCI_SOF),
    788       1.48  augustss 		     UREAD2(sc, UHCI_PORTSC1),
    789       1.48  augustss 		     UREAD2(sc, UHCI_PORTSC2)));
    790        1.1  augustss }
    791        1.1  augustss 
    792        1.1  augustss void
    793      1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
    794        1.1  augustss {
    795      1.122        tv 	char sbuf[128], sbuf2[128];
    796      1.122        tv 
    797      1.223    bouyer 
    798      1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    799      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    800       1.48  augustss 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    801       1.48  augustss 		     "token=0x%08lx buffer=0x%08lx\n",
    802       1.48  augustss 		     p, (long)p->physaddr,
    803       1.88   tsutsui 		     (long)le32toh(p->td.td_link),
    804       1.88   tsutsui 		     (long)le32toh(p->td.td_status),
    805       1.88   tsutsui 		     (long)le32toh(p->td.td_token),
    806       1.88   tsutsui 		     (long)le32toh(p->td.td_buffer)));
    807      1.122        tv 
    808      1.224  christos 	snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF",
    809      1.224  christos 	    (u_int32_t)le32toh(p->td.td_link));
    810      1.224  christos 	snprintb(sbuf2, sizeof(sbuf2),
    811      1.224  christos 	    "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    812      1.224  christos 	    "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    813      1.224  christos 	    (u_int32_t)le32toh(p->td.td_status));
    814      1.122        tv 
    815      1.122        tv 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    816      1.122        tv 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    817       1.88   tsutsui 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    818       1.88   tsutsui 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    819       1.88   tsutsui 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    820       1.88   tsutsui 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    821       1.88   tsutsui 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    822       1.88   tsutsui 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    823       1.88   tsutsui 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    824      1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    825      1.223    bouyer 	    BUS_DMASYNC_PREREAD);
    826        1.1  augustss }
    827        1.1  augustss 
    828        1.1  augustss void
    829      1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
    830        1.1  augustss {
    831      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    832      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    833       1.67  augustss 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    834       1.88   tsutsui 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    835       1.88   tsutsui 	    le32toh(sqh->qh.qh_elink)));
    836      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    837        1.1  augustss }
    838        1.1  augustss 
    839       1.13  augustss 
    840      1.110  augustss #if 1
    841        1.1  augustss void
    842      1.119  augustss uhci_dump(void)
    843        1.1  augustss {
    844      1.110  augustss 	uhci_dump_all(thesc);
    845      1.110  augustss }
    846      1.110  augustss #endif
    847        1.1  augustss 
    848      1.110  augustss void
    849      1.119  augustss uhci_dump_all(uhci_softc_t *sc)
    850      1.110  augustss {
    851        1.1  augustss 	uhci_dumpregs(sc);
    852       1.50  augustss 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
    853      1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    854      1.123  augustss 	uhci_dump_qh(sc->sc_lctl_start);
    855        1.1  augustss }
    856        1.1  augustss 
    857       1.67  augustss 
    858       1.67  augustss void
    859      1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
    860       1.67  augustss {
    861       1.67  augustss 	uhci_dump_qh(sqh);
    862       1.67  augustss 
    863       1.67  augustss 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    864       1.67  augustss 	 * Traverses sideways first, then down.
    865       1.67  augustss 	 *
    866       1.67  augustss 	 * QH1
    867       1.67  augustss 	 * QH2
    868       1.67  augustss 	 * No QH
    869       1.67  augustss 	 * TD2.1
    870       1.67  augustss 	 * TD2.2
    871       1.67  augustss 	 * TD1.1
    872       1.67  augustss 	 * etc.
    873       1.67  augustss 	 *
    874       1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    875       1.67  augustss 	 */
    876       1.67  augustss 
    877       1.67  augustss 
    878      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    879      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    880       1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    881       1.67  augustss 		uhci_dump_qhs(sqh->hlink);
    882       1.67  augustss 	else
    883       1.67  augustss 		DPRINTF(("No QH\n"));
    884      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    885       1.67  augustss 
    886       1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    887       1.67  augustss 		uhci_dump_tds(sqh->elink);
    888       1.67  augustss 	else
    889       1.67  augustss 		DPRINTF(("No TD\n"));
    890       1.67  augustss }
    891       1.67  augustss 
    892        1.1  augustss void
    893      1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
    894        1.1  augustss {
    895       1.67  augustss 	uhci_soft_td_t *td;
    896      1.223    bouyer 	int stop;
    897       1.67  augustss 
    898       1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
    899       1.67  augustss 		uhci_dump_td(td);
    900        1.1  augustss 
    901       1.67  augustss 		/* Check whether the link pointer in this TD marks
    902       1.67  augustss 		 * the link pointer as end of queue. This avoids
    903       1.67  augustss 		 * printing the free list in case the queue/TD has
    904       1.67  augustss 		 * already been moved there (seatbelt).
    905       1.67  augustss 		 */
    906      1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    907      1.223    bouyer 		    sizeof(td->td.td_link),
    908      1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    909      1.223    bouyer 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    910      1.223    bouyer 			le32toh(td->td.td_link) == 0);
    911      1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    912      1.223    bouyer 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    913      1.223    bouyer 		if (stop)
    914       1.67  augustss 			break;
    915       1.67  augustss 	}
    916        1.1  augustss }
    917       1.92  augustss 
    918      1.101  augustss Static void
    919      1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
    920       1.92  augustss {
    921       1.95  augustss 	usbd_pipe_handle pipe;
    922       1.95  augustss 	usb_endpoint_descriptor_t *ed;
    923       1.95  augustss 	usbd_device_handle dev;
    924      1.152  augustss 
    925       1.98  augustss #ifdef DIAGNOSTIC
    926       1.98  augustss #define DONE ii->isdone
    927       1.98  augustss #else
    928       1.98  augustss #define DONE 0
    929       1.98  augustss #endif
    930       1.95  augustss         if (ii == NULL) {
    931       1.95  augustss                 printf("ii NULL\n");
    932       1.95  augustss                 return;
    933       1.95  augustss         }
    934       1.95  augustss         if (ii->xfer == NULL) {
    935       1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
    936       1.98  augustss 		       ii, DONE);
    937       1.95  augustss                 return;
    938       1.95  augustss         }
    939       1.95  augustss         pipe = ii->xfer->pipe;
    940       1.95  augustss         if (pipe == NULL) {
    941       1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    942       1.98  augustss 		       ii, DONE, ii->xfer);
    943      1.139  augustss                 return;
    944      1.139  augustss 	}
    945      1.139  augustss         if (pipe->endpoint == NULL) {
    946      1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
    947      1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    948      1.139  augustss                 return;
    949      1.139  augustss 	}
    950      1.139  augustss         if (pipe->device == NULL) {
    951      1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
    952      1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    953       1.95  augustss                 return;
    954       1.95  augustss 	}
    955       1.95  augustss         ed = pipe->endpoint->edesc;
    956       1.95  augustss         dev = pipe->device;
    957      1.152  augustss 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    958      1.152  augustss 	       ii, DONE, ii->xfer, dev,
    959       1.95  augustss 	       UGETW(dev->ddesc.idVendor),
    960       1.92  augustss 	       UGETW(dev->ddesc.idProduct),
    961       1.92  augustss 	       dev->address, pipe,
    962       1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
    963       1.98  augustss #undef DONE
    964       1.92  augustss }
    965       1.92  augustss 
    966      1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
    967       1.92  augustss void
    968      1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
    969       1.92  augustss {
    970       1.92  augustss 	uhci_intr_info_t *ii;
    971       1.92  augustss 
    972       1.92  augustss 	printf("intr_info list:\n");
    973       1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
    974       1.92  augustss 		uhci_dump_ii(ii);
    975       1.92  augustss }
    976       1.92  augustss 
    977      1.120  augustss void iidump(void);
    978      1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
    979       1.92  augustss 
    980        1.1  augustss #endif
    981        1.1  augustss 
    982        1.1  augustss /*
    983        1.1  augustss  * This routine is executed periodically and simulates interrupts
    984        1.1  augustss  * from the root controller interrupt pipe for port status change.
    985        1.1  augustss  */
    986        1.1  augustss void
    987      1.119  augustss uhci_poll_hub(void *addr)
    988        1.1  augustss {
    989       1.63  augustss 	usbd_xfer_handle xfer = addr;
    990       1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
    991      1.227    martin 	uhci_softc_t *sc;
    992        1.1  augustss 	int s;
    993        1.1  augustss 	u_char *p;
    994        1.1  augustss 
    995       1.96  augustss 	DPRINTFN(20, ("uhci_poll_hub\n"));
    996        1.1  augustss 
    997      1.228    martin 	if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL))
    998      1.228    martin 		return;	/* device has detached */
    999      1.227    martin 	sc = pipe->device->bus->hci_private;
   1000  1.232.2.2     rmind 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1001       1.41  augustss 
   1002      1.159  augustss 	p = KERNADDR(&xfer->dmabuf, 0);
   1003        1.1  augustss 	p[0] = 0;
   1004        1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1005        1.1  augustss 		p[0] |= 1<<1;
   1006        1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1007        1.1  augustss 		p[0] |= 1<<2;
   1008       1.41  augustss 	if (p[0] == 0)
   1009       1.41  augustss 		/* No change, try again in a while */
   1010       1.41  augustss 		return;
   1011       1.41  augustss 
   1012       1.63  augustss 	xfer->actlen = 1;
   1013       1.63  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
   1014       1.16  augustss 	s = splusb();
   1015       1.63  augustss 	xfer->device->bus->intr_context++;
   1016       1.63  augustss 	usb_transfer_complete(xfer);
   1017       1.63  augustss 	xfer->device->bus->intr_context--;
   1018       1.41  augustss 	splx(s);
   1019       1.41  augustss }
   1020       1.41  augustss 
   1021       1.41  augustss void
   1022      1.205  christos uhci_root_intr_done(usbd_xfer_handle xfer)
   1023       1.84  augustss {
   1024       1.84  augustss }
   1025       1.84  augustss 
   1026       1.84  augustss void
   1027      1.205  christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
   1028       1.41  augustss {
   1029        1.1  augustss }
   1030        1.1  augustss 
   1031      1.123  augustss /*
   1032      1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
   1033      1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
   1034      1.123  augustss  * USB performance a lot for some devices.
   1035      1.123  augustss  * If we are already looping, just count it.
   1036      1.123  augustss  */
   1037        1.1  augustss void
   1038      1.123  augustss uhci_add_loop(uhci_softc_t *sc) {
   1039      1.125  augustss #ifdef UHCI_DEBUG
   1040      1.125  augustss 	if (uhcinoloop)
   1041      1.125  augustss 		return;
   1042      1.125  augustss #endif
   1043      1.123  augustss 	if (++sc->sc_loops == 1) {
   1044      1.125  augustss 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1045      1.123  augustss 		/* Note, we don't loop back the soft pointer. */
   1046      1.152  augustss 		sc->sc_last_qh->qh.qh_hlink =
   1047      1.123  augustss 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1048      1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1049      1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1050      1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1051      1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1052      1.123  augustss 	}
   1053      1.123  augustss }
   1054      1.123  augustss 
   1055      1.123  augustss void
   1056      1.123  augustss uhci_rem_loop(uhci_softc_t *sc) {
   1057      1.125  augustss #ifdef UHCI_DEBUG
   1058      1.125  augustss 	if (uhcinoloop)
   1059      1.125  augustss 		return;
   1060      1.125  augustss #endif
   1061      1.123  augustss 	if (--sc->sc_loops == 0) {
   1062      1.123  augustss 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1063      1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1064      1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1065      1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1066      1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1067      1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1068      1.123  augustss 	}
   1069      1.123  augustss }
   1070      1.123  augustss 
   1071      1.123  augustss /* Add high speed control QH, called at splusb(). */
   1072      1.123  augustss void
   1073      1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1074        1.1  augustss {
   1075       1.42  augustss 	uhci_soft_qh_t *eqh;
   1076        1.1  augustss 
   1077       1.52  augustss 	SPLUSBCHECK;
   1078       1.52  augustss 
   1079        1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1080      1.123  augustss 	eqh = sc->sc_hctl_end;
   1081      1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1082      1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   1083      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   1084       1.42  augustss 	sqh->hlink       = eqh->hlink;
   1085       1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1086      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1087      1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1088       1.42  augustss 	eqh->hlink       = sqh;
   1089      1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1090      1.123  augustss 	sc->sc_hctl_end = sqh;
   1091      1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1092      1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1093      1.125  augustss #ifdef UHCI_CTL_LOOP
   1094      1.123  augustss 	uhci_add_loop(sc);
   1095      1.125  augustss #endif
   1096        1.1  augustss }
   1097        1.1  augustss 
   1098      1.123  augustss /* Remove high speed control QH, called at splusb(). */
   1099        1.1  augustss void
   1100      1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1101        1.1  augustss {
   1102        1.1  augustss 	uhci_soft_qh_t *pqh;
   1103        1.1  augustss 
   1104       1.52  augustss 	SPLUSBCHECK;
   1105       1.52  augustss 
   1106      1.123  augustss 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1107      1.125  augustss #ifdef UHCI_CTL_LOOP
   1108      1.123  augustss 	uhci_rem_loop(sc);
   1109      1.125  augustss #endif
   1110      1.124  augustss 	/*
   1111      1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1112      1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1113      1.124  augustss 	 * the transferred packet was short so that the QH still points
   1114      1.124  augustss 	 * at the last used TD.
   1115      1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1116      1.124  augustss 	 * to stop looking at the TD.
   1117      1.223    bouyer 	 * Note that if the TD chain is large enough, the controller
   1118      1.223    bouyer 	 * may still be looking at the chain at the end of this function.
   1119      1.223    bouyer 	 * uhci_free_std_chain() will make sure the controller stops
   1120      1.223    bouyer 	 * looking at it quickly, but until then we should not change
   1121      1.223    bouyer 	 * sqh->hlink.
   1122      1.124  augustss 	 */
   1123      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1124      1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1125      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1126      1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1127      1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1128      1.223    bouyer 		usb_syncmem(&sqh->dma,
   1129      1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1130      1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1131      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1132      1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1133      1.124  augustss 	}
   1134      1.124  augustss 
   1135      1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1136      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1137      1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1138      1.152  augustss 	pqh->hlink = sqh->hlink;
   1139       1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1140      1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1141      1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1142      1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1143      1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1144      1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1145      1.123  augustss 		sc->sc_hctl_end = pqh;
   1146      1.123  augustss }
   1147      1.123  augustss 
   1148      1.123  augustss /* Add low speed control QH, called at splusb(). */
   1149      1.123  augustss void
   1150      1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1151      1.123  augustss {
   1152      1.123  augustss 	uhci_soft_qh_t *eqh;
   1153      1.123  augustss 
   1154      1.123  augustss 	SPLUSBCHECK;
   1155      1.123  augustss 
   1156      1.123  augustss 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1157      1.123  augustss 	eqh = sc->sc_lctl_end;
   1158      1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1159      1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1160      1.152  augustss 	sqh->hlink = eqh->hlink;
   1161      1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1162      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1163      1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1164      1.152  augustss 	eqh->hlink = sqh;
   1165      1.123  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1166      1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1167      1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1168      1.123  augustss 	sc->sc_lctl_end = sqh;
   1169      1.123  augustss }
   1170      1.123  augustss 
   1171      1.123  augustss /* Remove low speed control QH, called at splusb(). */
   1172      1.123  augustss void
   1173      1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1174      1.123  augustss {
   1175      1.123  augustss 	uhci_soft_qh_t *pqh;
   1176      1.123  augustss 
   1177      1.123  augustss 	SPLUSBCHECK;
   1178      1.123  augustss 
   1179      1.123  augustss 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1180      1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1181      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1182      1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1183      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1184      1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1185      1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1186      1.223    bouyer 		usb_syncmem(&sqh->dma,
   1187      1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1188      1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1189      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1190      1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1191      1.124  augustss 	}
   1192      1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1193      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1194      1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1195      1.152  augustss 	pqh->hlink = sqh->hlink;
   1196      1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1197      1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1198      1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1199      1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1200      1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1201      1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1202      1.123  augustss 		sc->sc_lctl_end = pqh;
   1203        1.1  augustss }
   1204        1.1  augustss 
   1205        1.1  augustss /* Add bulk QH, called at splusb(). */
   1206        1.1  augustss void
   1207      1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1208        1.1  augustss {
   1209       1.42  augustss 	uhci_soft_qh_t *eqh;
   1210        1.1  augustss 
   1211       1.52  augustss 	SPLUSBCHECK;
   1212       1.52  augustss 
   1213        1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1214       1.42  augustss 	eqh = sc->sc_bulk_end;
   1215      1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1216      1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1217      1.152  augustss 	sqh->hlink = eqh->hlink;
   1218       1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1219      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1220      1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1221      1.152  augustss 	eqh->hlink = sqh;
   1222      1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1223      1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1224      1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1225        1.1  augustss 	sc->sc_bulk_end = sqh;
   1226      1.123  augustss 	uhci_add_loop(sc);
   1227        1.1  augustss }
   1228        1.1  augustss 
   1229        1.1  augustss /* Remove bulk QH, called at splusb(). */
   1230        1.1  augustss void
   1231      1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1232        1.1  augustss {
   1233        1.1  augustss 	uhci_soft_qh_t *pqh;
   1234        1.1  augustss 
   1235       1.52  augustss 	SPLUSBCHECK;
   1236       1.52  augustss 
   1237        1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1238      1.123  augustss 	uhci_rem_loop(sc);
   1239      1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1240      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1241      1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1242      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1243      1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1244      1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1245      1.223    bouyer 		usb_syncmem(&sqh->dma,
   1246      1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1247      1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1248      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1249      1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1250      1.124  augustss 	}
   1251       1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1252      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1253      1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1254       1.42  augustss 	pqh->hlink       = sqh->hlink;
   1255       1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1256      1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1257      1.223    bouyer 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1258      1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1259        1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1260        1.1  augustss 		sc->sc_bulk_end = pqh;
   1261        1.1  augustss }
   1262        1.1  augustss 
   1263      1.141  augustss Static int uhci_intr1(uhci_softc_t *);
   1264      1.141  augustss 
   1265        1.1  augustss int
   1266      1.119  augustss uhci_intr(void *arg)
   1267        1.1  augustss {
   1268       1.44  augustss 	uhci_softc_t *sc = arg;
   1269      1.146  augustss 
   1270      1.216  drochner 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1271      1.146  augustss 		return (0);
   1272      1.141  augustss 
   1273      1.225    bouyer 	if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) {
   1274      1.141  augustss #ifdef DIAGNOSTIC
   1275      1.179   mycroft 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
   1276      1.141  augustss #endif
   1277      1.141  augustss 		return (0);
   1278      1.141  augustss 	}
   1279      1.179   mycroft 
   1280      1.141  augustss 	return (uhci_intr1(sc));
   1281      1.141  augustss }
   1282      1.141  augustss 
   1283      1.141  augustss int
   1284      1.141  augustss uhci_intr1(uhci_softc_t *sc)
   1285      1.141  augustss {
   1286       1.44  augustss 	int status;
   1287       1.44  augustss 	int ack;
   1288        1.1  augustss 
   1289       1.67  augustss #ifdef UHCI_DEBUG
   1290       1.44  augustss 	if (uhcidebug > 15) {
   1291      1.216  drochner 		DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
   1292        1.1  augustss 		uhci_dumpregs(sc);
   1293        1.1  augustss 	}
   1294        1.1  augustss #endif
   1295      1.117  augustss 
   1296      1.153  augustss 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1297      1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1298      1.127     soren 		return (0);
   1299      1.127     soren 
   1300      1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1301      1.201  jmcneill #ifdef DIAGNOSTIC
   1302      1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1303      1.216  drochner 		       device_xname(sc->sc_dev));
   1304      1.201  jmcneill #endif
   1305      1.134  augustss 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1306      1.117  augustss 		return (0);
   1307      1.117  augustss 	}
   1308       1.44  augustss 
   1309       1.44  augustss 	ack = 0;
   1310       1.44  augustss 	if (status & UHCI_STS_USBINT)
   1311       1.44  augustss 		ack |= UHCI_STS_USBINT;
   1312       1.44  augustss 	if (status & UHCI_STS_USBEI)
   1313       1.44  augustss 		ack |= UHCI_STS_USBEI;
   1314        1.1  augustss 	if (status & UHCI_STS_RD) {
   1315       1.44  augustss 		ack |= UHCI_STS_RD;
   1316      1.118  augustss #ifdef UHCI_DEBUG
   1317      1.216  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1318      1.118  augustss #endif
   1319        1.1  augustss 	}
   1320        1.1  augustss 	if (status & UHCI_STS_HSE) {
   1321       1.44  augustss 		ack |= UHCI_STS_HSE;
   1322      1.216  drochner 		printf("%s: host system error\n", device_xname(sc->sc_dev));
   1323        1.1  augustss 	}
   1324        1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1325       1.44  augustss 		ack |= UHCI_STS_HCPE;
   1326      1.152  augustss 		printf("%s: host controller process error\n",
   1327      1.216  drochner 		       device_xname(sc->sc_dev));
   1328       1.44  augustss 	}
   1329  1.232.2.1     rmind 
   1330  1.232.2.1     rmind 	/* When HCHalted=1 and Run/Stop=0 , it is normal */
   1331  1.232.2.1     rmind 	if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) {
   1332       1.44  augustss 		/* no acknowledge needed */
   1333      1.136  augustss 		if (!sc->sc_dying) {
   1334      1.152  augustss 			printf("%s: host controller halted\n",
   1335      1.216  drochner 			    device_xname(sc->sc_dev));
   1336      1.110  augustss #ifdef UHCI_DEBUG
   1337      1.136  augustss 			uhci_dump_all(sc);
   1338      1.110  augustss #endif
   1339      1.136  augustss 		}
   1340      1.136  augustss 		sc->sc_dying = 1;
   1341        1.1  augustss 	}
   1342       1.44  augustss 
   1343      1.132  augustss 	if (!ack)
   1344      1.132  augustss 		return (0);	/* nothing to acknowledge */
   1345      1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1346        1.1  augustss 
   1347       1.85  augustss 	sc->sc_bus.no_intrs++;
   1348       1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1349       1.85  augustss 
   1350      1.216  drochner 	DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
   1351       1.85  augustss 
   1352       1.85  augustss 	return (1);
   1353       1.85  augustss }
   1354       1.85  augustss 
   1355       1.85  augustss void
   1356      1.133  augustss uhci_softintr(void *v)
   1357       1.85  augustss {
   1358      1.216  drochner 	struct usbd_bus *bus = v;
   1359      1.216  drochner 	uhci_softc_t *sc = bus->hci_private;
   1360      1.178    martin 	uhci_intr_info_t *ii, *nextii;
   1361       1.85  augustss 
   1362      1.216  drochner 	DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev),
   1363      1.140  augustss 		     sc->sc_bus.intr_context));
   1364       1.85  augustss 
   1365       1.51  augustss 	sc->sc_bus.intr_context++;
   1366       1.50  augustss 
   1367        1.1  augustss 	/*
   1368        1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1369        1.1  augustss 	 * interrupts because a transfer is completed there is no
   1370        1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1371        1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1372        1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1373        1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1374        1.1  augustss 	 * output on a slow console).
   1375        1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1376        1.1  augustss 	 * completed.
   1377        1.1  augustss 	 */
   1378      1.178    martin 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1379      1.178    martin 		nextii = LIST_NEXT(ii, list);
   1380        1.1  augustss 		uhci_check_intr(sc, ii);
   1381      1.178    martin 	}
   1382        1.1  augustss 
   1383      1.164  augustss #ifdef USB_USE_SOFTINTR
   1384      1.153  augustss 	if (sc->sc_softwake) {
   1385      1.153  augustss 		sc->sc_softwake = 0;
   1386      1.153  augustss 		wakeup(&sc->sc_softwake);
   1387      1.153  augustss 	}
   1388      1.164  augustss #endif /* USB_USE_SOFTINTR */
   1389      1.153  augustss 
   1390       1.51  augustss 	sc->sc_bus.intr_context--;
   1391        1.1  augustss }
   1392        1.1  augustss 
   1393        1.1  augustss /* Check for an interrupt. */
   1394        1.1  augustss void
   1395      1.205  christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1396        1.1  augustss {
   1397        1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1398       1.18  augustss 	u_int32_t status;
   1399        1.1  augustss 
   1400        1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1401        1.1  augustss #ifdef DIAGNOSTIC
   1402       1.63  augustss 	if (ii == NULL) {
   1403        1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1404        1.1  augustss 		return;
   1405        1.1  augustss 	}
   1406        1.1  augustss #endif
   1407      1.155  augustss 	if (ii->xfer->status == USBD_CANCELLED ||
   1408      1.155  augustss 	    ii->xfer->status == USBD_TIMEOUT) {
   1409      1.155  augustss 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1410      1.155  augustss 		return;
   1411      1.155  augustss 	}
   1412      1.155  augustss 
   1413       1.63  augustss 	if (ii->stdstart == NULL)
   1414        1.1  augustss 		return;
   1415        1.1  augustss 	lstd = ii->stdend;
   1416        1.1  augustss #ifdef DIAGNOSTIC
   1417       1.63  augustss 	if (lstd == NULL) {
   1418        1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1419        1.1  augustss 		return;
   1420        1.1  augustss 	}
   1421        1.1  augustss #endif
   1422      1.152  augustss 	/*
   1423       1.26  augustss 	 * If the last TD is still active we need to check whether there
   1424      1.186     skrll 	 * is an error somewhere in the middle, or whether there was a
   1425       1.26  augustss 	 * short packet (SPD and not ACTIVE).
   1426       1.26  augustss 	 */
   1427      1.223    bouyer 	usb_syncmem(&lstd->dma,
   1428      1.223    bouyer 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1429      1.223    bouyer 	    sizeof(lstd->td.td_status),
   1430      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1431       1.88   tsutsui 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1432       1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1433       1.48  augustss 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1434      1.223    bouyer 			usb_syncmem(&std->dma,
   1435      1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1436      1.223    bouyer 			    sizeof(std->td.td_status),
   1437      1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1438       1.88   tsutsui 			status = le32toh(std->td.td_status);
   1439      1.223    bouyer 			usb_syncmem(&std->dma,
   1440      1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1441      1.223    bouyer 			    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1442       1.83  augustss 			/* If there's an active TD the xfer isn't done. */
   1443       1.83  augustss 			if (status & UHCI_TD_ACTIVE)
   1444       1.83  augustss 				break;
   1445       1.83  augustss 			/* Any kind of error makes the xfer done. */
   1446       1.83  augustss 			if (status & UHCI_TD_STALLED)
   1447       1.83  augustss 				goto done;
   1448       1.83  augustss 			/* We want short packets, and it is short: it's done */
   1449      1.223    bouyer 			usb_syncmem(&std->dma,
   1450      1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_token),
   1451      1.223    bouyer 			    sizeof(std->td.td_token),
   1452      1.223    bouyer 			    BUS_DMASYNC_POSTWRITE);
   1453       1.83  augustss 			if ((status & UHCI_TD_SPD) &&
   1454      1.152  augustss 			      UHCI_TD_GET_ACTLEN(status) <
   1455       1.88   tsutsui 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1456        1.1  augustss 				goto done;
   1457       1.18  augustss 		}
   1458       1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1459       1.18  augustss 			      ii, ii->stdstart));
   1460      1.223    bouyer 		usb_syncmem(&lstd->dma,
   1461      1.223    bouyer 		    lstd->offs + offsetof(uhci_td_t, td_status),
   1462      1.223    bouyer 		    sizeof(lstd->td.td_status),
   1463      1.223    bouyer 		    BUS_DMASYNC_PREREAD);
   1464        1.1  augustss 		return;
   1465        1.1  augustss 	}
   1466        1.1  augustss  done:
   1467       1.92  augustss 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1468  1.232.2.2     rmind 	callout_stop(&ii->xfer->timeout_handle);
   1469       1.36  augustss 	uhci_idone(ii);
   1470        1.1  augustss }
   1471        1.1  augustss 
   1472       1.52  augustss /* Called at splusb() */
   1473        1.1  augustss void
   1474      1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1475        1.1  augustss {
   1476       1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1477       1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1478        1.1  augustss 	uhci_soft_td_t *std;
   1479       1.67  augustss 	u_int32_t status = 0, nstatus;
   1480       1.26  augustss 	int actlen;
   1481        1.1  augustss 
   1482      1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1483        1.7  augustss #ifdef DIAGNOSTIC
   1484        1.7  augustss 	{
   1485        1.7  augustss 		int s = splhigh();
   1486        1.7  augustss 		if (ii->isdone) {
   1487       1.26  augustss 			splx(s);
   1488       1.92  augustss #ifdef UHCI_DEBUG
   1489       1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1490       1.92  augustss 			uhci_dump_ii(ii);
   1491       1.92  augustss #else
   1492       1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1493       1.92  augustss #endif
   1494        1.7  augustss 			return;
   1495        1.7  augustss 		}
   1496        1.7  augustss 		ii->isdone = 1;
   1497        1.7  augustss 		splx(s);
   1498        1.7  augustss 	}
   1499        1.7  augustss #endif
   1500       1.48  augustss 
   1501       1.63  augustss 	if (xfer->nframes != 0) {
   1502       1.48  augustss 		/* Isoc transfer, do things differently. */
   1503       1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1504      1.126  augustss 		int i, n, nframes, len;
   1505       1.48  augustss 
   1506       1.48  augustss 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1507       1.48  augustss 
   1508       1.63  augustss 		nframes = xfer->nframes;
   1509       1.48  augustss 		actlen = 0;
   1510       1.92  augustss 		n = UXFER(xfer)->curframe;
   1511       1.48  augustss 		for (i = 0; i < nframes; i++) {
   1512       1.48  augustss 			std = stds[n];
   1513       1.59  augustss #ifdef UHCI_DEBUG
   1514       1.48  augustss 			if (uhcidebug > 5) {
   1515       1.48  augustss 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1516       1.48  augustss 				uhci_dump_td(std);
   1517       1.48  augustss 			}
   1518       1.48  augustss #endif
   1519       1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1520       1.48  augustss 				n = 0;
   1521      1.223    bouyer 			usb_syncmem(&std->dma,
   1522      1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1523      1.223    bouyer 			    sizeof(std->td.td_status),
   1524      1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1525       1.88   tsutsui 			status = le32toh(std->td.td_status);
   1526      1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1527      1.126  augustss 			xfer->frlengths[i] = len;
   1528      1.126  augustss 			actlen += len;
   1529       1.48  augustss 		}
   1530       1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1531       1.63  augustss 		xfer->actlen = actlen;
   1532       1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1533      1.140  augustss 		goto end;
   1534       1.48  augustss 	}
   1535       1.48  augustss 
   1536       1.59  augustss #ifdef UHCI_DEBUG
   1537       1.65  augustss 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1538       1.65  augustss 		      ii, xfer, upipe));
   1539       1.48  augustss 	if (uhcidebug > 10)
   1540       1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1541       1.48  augustss #endif
   1542       1.48  augustss 
   1543       1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1544       1.26  augustss 	actlen = 0;
   1545       1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1546      1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1547      1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1548       1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1549       1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1550       1.26  augustss 			break;
   1551       1.67  augustss 
   1552       1.64  augustss 		status = nstatus;
   1553       1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1554       1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1555       1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1556      1.176   mycroft 		else {
   1557      1.176   mycroft 			/*
   1558      1.176   mycroft 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1559      1.176   mycroft 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1560      1.176   mycroft 			 * CONTROL AND STATUS".
   1561      1.176   mycroft 			 */
   1562      1.176   mycroft 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1563      1.176   mycroft 				status &= ~UHCI_TD_CRCTO;
   1564      1.176   mycroft 		}
   1565        1.1  augustss 	}
   1566       1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1567       1.63  augustss 	if (std != NULL)
   1568       1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1569       1.38  augustss 
   1570        1.1  augustss 	status &= UHCI_TD_ERROR;
   1571      1.152  augustss 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1572       1.26  augustss 		      actlen, status));
   1573       1.63  augustss 	xfer->actlen = actlen;
   1574        1.1  augustss 	if (status != 0) {
   1575      1.122        tv #ifdef UHCI_DEBUG
   1576      1.122        tv 		char sbuf[128];
   1577      1.122        tv 
   1578      1.224  christos 		snprintb(sbuf, sizeof(sbuf),
   1579      1.224  christos 		    "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1580      1.224  christos 		    "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status);
   1581      1.122        tv 
   1582       1.75  augustss 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1583       1.36  augustss 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1584      1.122        tv 			  "status 0x%s\n",
   1585       1.63  augustss 			  xfer->pipe->device->address,
   1586       1.63  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1587      1.122        tv 			  sbuf));
   1588      1.122        tv #endif
   1589      1.122        tv 
   1590        1.1  augustss 		if (status == UHCI_TD_STALLED)
   1591       1.63  augustss 			xfer->status = USBD_STALLED;
   1592        1.1  augustss 		else
   1593       1.63  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
   1594        1.1  augustss 	} else {
   1595       1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1596        1.1  augustss 	}
   1597      1.140  augustss 
   1598      1.140  augustss  end:
   1599       1.63  augustss 	usb_transfer_complete(xfer);
   1600      1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1601        1.1  augustss }
   1602        1.1  augustss 
   1603       1.13  augustss /*
   1604       1.13  augustss  * Called when a request does not complete.
   1605       1.13  augustss  */
   1606        1.1  augustss void
   1607      1.119  augustss uhci_timeout(void *addr)
   1608        1.1  augustss {
   1609        1.1  augustss 	uhci_intr_info_t *ii = addr;
   1610      1.153  augustss 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1611      1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1612      1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   1613      1.153  augustss 
   1614      1.153  augustss 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1615      1.153  augustss 
   1616      1.153  augustss 	if (sc->sc_dying) {
   1617      1.153  augustss 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1618      1.153  augustss 		return;
   1619      1.153  augustss 	}
   1620        1.1  augustss 
   1621      1.153  augustss 	/* Execute the abort in a process context. */
   1622      1.156  augustss 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
   1623      1.204     joerg 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
   1624      1.204     joerg 	    USB_TASKQ_HC);
   1625      1.153  augustss }
   1626       1.51  augustss 
   1627      1.153  augustss void
   1628      1.153  augustss uhci_timeout_task(void *addr)
   1629      1.153  augustss {
   1630      1.153  augustss 	usbd_xfer_handle xfer = addr;
   1631      1.153  augustss 	int s;
   1632      1.153  augustss 
   1633      1.153  augustss 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1634       1.67  augustss 
   1635      1.153  augustss 	s = splusb();
   1636      1.153  augustss 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1637      1.153  augustss 	splx(s);
   1638        1.1  augustss }
   1639        1.1  augustss 
   1640        1.1  augustss /*
   1641        1.1  augustss  * Wait here until controller claims to have an interrupt.
   1642        1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1643        1.1  augustss  * too long.
   1644       1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1645        1.1  augustss  */
   1646        1.1  augustss void
   1647      1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1648        1.1  augustss {
   1649       1.63  augustss 	int timo = xfer->timeout;
   1650       1.13  augustss 	uhci_intr_info_t *ii;
   1651       1.13  augustss 
   1652       1.26  augustss 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1653        1.1  augustss 
   1654       1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   1655       1.26  augustss 	for (; timo >= 0; timo--) {
   1656       1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1657       1.26  augustss 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1658        1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1659      1.141  augustss 			uhci_intr1(sc);
   1660       1.63  augustss 			if (xfer->status != USBD_IN_PROGRESS)
   1661        1.1  augustss 				return;
   1662        1.1  augustss 		}
   1663        1.1  augustss 	}
   1664       1.13  augustss 
   1665       1.13  augustss 	/* Timeout */
   1666       1.13  augustss 	DPRINTF(("uhci_waitintr: timeout\n"));
   1667       1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1668      1.152  augustss 	     ii != NULL && ii->xfer != xfer;
   1669       1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1670       1.13  augustss 		;
   1671       1.41  augustss #ifdef DIAGNOSTIC
   1672       1.63  augustss 	if (ii == NULL)
   1673      1.163    provos 		panic("uhci_waitintr: lost intr_info");
   1674       1.41  augustss #endif
   1675       1.41  augustss 	uhci_idone(ii);
   1676        1.1  augustss }
   1677        1.1  augustss 
   1678        1.8  augustss void
   1679      1.119  augustss uhci_poll(struct usbd_bus *bus)
   1680        1.8  augustss {
   1681      1.216  drochner 	uhci_softc_t *sc = bus->hci_private;
   1682        1.8  augustss 
   1683        1.8  augustss 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
   1684      1.141  augustss 		uhci_intr1(sc);
   1685        1.8  augustss }
   1686        1.8  augustss 
   1687        1.1  augustss void
   1688      1.119  augustss uhci_reset(uhci_softc_t *sc)
   1689        1.1  augustss {
   1690        1.1  augustss 	int n;
   1691        1.1  augustss 
   1692        1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1693        1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1694      1.152  augustss 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1695        1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1696       1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1697        1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1698      1.152  augustss 		printf("%s: controller did not reset\n",
   1699      1.216  drochner 		       device_xname(sc->sc_dev));
   1700        1.1  augustss }
   1701        1.1  augustss 
   1702       1.16  augustss usbd_status
   1703      1.119  augustss uhci_run(uhci_softc_t *sc, int run)
   1704        1.1  augustss {
   1705        1.1  augustss 	int s, n, running;
   1706       1.71  augustss 	u_int16_t cmd;
   1707        1.1  augustss 
   1708        1.1  augustss 	run = run != 0;
   1709      1.132  augustss 	s = splhardusb();
   1710       1.30  augustss 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1711       1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1712       1.71  augustss 	if (run)
   1713       1.71  augustss 		cmd |= UHCI_CMD_RS;
   1714       1.71  augustss 	else
   1715       1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1716       1.71  augustss 	UHCICMD(sc, cmd);
   1717       1.13  augustss 	for(n = 0; n < 10; n++) {
   1718        1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1719        1.1  augustss 		/* return when we've entered the state we want */
   1720        1.1  augustss 		if (run == running) {
   1721        1.1  augustss 			splx(s);
   1722       1.30  augustss 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1723       1.30  augustss 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1724       1.16  augustss 			return (USBD_NORMAL_COMPLETION);
   1725        1.1  augustss 		}
   1726       1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1727        1.1  augustss 	}
   1728        1.1  augustss 	splx(s);
   1729      1.216  drochner 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
   1730       1.14  augustss 	       run ? "start" : "stop");
   1731       1.16  augustss 	return (USBD_IOERROR);
   1732        1.1  augustss }
   1733        1.1  augustss 
   1734        1.1  augustss /*
   1735        1.1  augustss  * Memory management routines.
   1736        1.1  augustss  *  uhci_alloc_std allocates TDs
   1737        1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1738        1.7  augustss  * These two routines do their own free list management,
   1739        1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1740        1.1  augustss  * has page size granularaity so much memory would be wasted if
   1741       1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1742        1.1  augustss  */
   1743        1.1  augustss 
   1744        1.1  augustss uhci_soft_td_t *
   1745      1.119  augustss uhci_alloc_std(uhci_softc_t *sc)
   1746        1.1  augustss {
   1747        1.1  augustss 	uhci_soft_td_t *std;
   1748       1.63  augustss 	usbd_status err;
   1749       1.42  augustss 	int i, offs;
   1750        1.7  augustss 	usb_dma_t dma;
   1751        1.1  augustss 
   1752       1.63  augustss 	if (sc->sc_freetds == NULL) {
   1753        1.1  augustss 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1754       1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1755       1.63  augustss 			  UHCI_TD_ALIGN, &dma);
   1756       1.63  augustss 		if (err)
   1757       1.16  augustss 			return (0);
   1758       1.43  augustss 		for(i = 0; i < UHCI_STD_CHUNK; i++) {
   1759       1.42  augustss 			offs = i * UHCI_STD_SIZE;
   1760      1.159  augustss 			std = KERNADDR(&dma, offs);
   1761      1.160  augustss 			std->physaddr = DMAADDR(&dma, offs);
   1762      1.223    bouyer 			std->dma = dma;
   1763      1.223    bouyer 			std->offs = offs;
   1764       1.42  augustss 			std->link.std = sc->sc_freetds;
   1765        1.1  augustss 			sc->sc_freetds = std;
   1766        1.1  augustss 		}
   1767        1.1  augustss 	}
   1768        1.1  augustss 	std = sc->sc_freetds;
   1769       1.42  augustss 	sc->sc_freetds = std->link.std;
   1770       1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1771        1.1  augustss 	return std;
   1772        1.1  augustss }
   1773        1.1  augustss 
   1774        1.1  augustss void
   1775      1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1776        1.1  augustss {
   1777        1.7  augustss #ifdef DIAGNOSTIC
   1778        1.7  augustss #define TD_IS_FREE 0x12345678
   1779       1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1780        1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1781        1.7  augustss 		return;
   1782        1.7  augustss 	}
   1783       1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1784        1.7  augustss #endif
   1785       1.42  augustss 	std->link.std = sc->sc_freetds;
   1786        1.1  augustss 	sc->sc_freetds = std;
   1787        1.1  augustss }
   1788        1.1  augustss 
   1789        1.1  augustss uhci_soft_qh_t *
   1790      1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   1791        1.1  augustss {
   1792        1.1  augustss 	uhci_soft_qh_t *sqh;
   1793       1.63  augustss 	usbd_status err;
   1794        1.1  augustss 	int i, offs;
   1795        1.7  augustss 	usb_dma_t dma;
   1796        1.1  augustss 
   1797       1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   1798        1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1799       1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1800       1.63  augustss 			  UHCI_QH_ALIGN, &dma);
   1801       1.63  augustss 		if (err)
   1802       1.63  augustss 			return (0);
   1803       1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1804       1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   1805      1.159  augustss 			sqh = KERNADDR(&dma, offs);
   1806      1.160  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   1807      1.223    bouyer 			sqh->dma = dma;
   1808      1.223    bouyer 			sqh->offs = offs;
   1809       1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   1810        1.1  augustss 			sc->sc_freeqhs = sqh;
   1811        1.1  augustss 		}
   1812        1.1  augustss 	}
   1813        1.1  augustss 	sqh = sc->sc_freeqhs;
   1814       1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   1815       1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1816       1.16  augustss 	return (sqh);
   1817        1.1  augustss }
   1818        1.1  augustss 
   1819        1.1  augustss void
   1820      1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1821        1.1  augustss {
   1822       1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   1823        1.1  augustss 	sc->sc_freeqhs = sqh;
   1824        1.1  augustss }
   1825        1.1  augustss 
   1826        1.1  augustss void
   1827      1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1828      1.119  augustss 		    uhci_soft_td_t *stdend)
   1829        1.1  augustss {
   1830        1.1  augustss 	uhci_soft_td_t *p;
   1831        1.1  augustss 
   1832      1.223    bouyer 	/*
   1833      1.223    bouyer 	 * to avoid race condition with the controller which may be looking
   1834      1.223    bouyer 	 * at this chain, we need to first invalidate all links, and
   1835      1.223    bouyer 	 * then wait for the controller to move to another queue
   1836      1.223    bouyer 	 */
   1837      1.223    bouyer 	for (p = std; p != stdend; p = p->link.std) {
   1838      1.223    bouyer 		usb_syncmem(&p->dma,
   1839      1.223    bouyer 		    p->offs + offsetof(uhci_td_t, td_link),
   1840      1.223    bouyer 		    sizeof(p->td.td_link),
   1841      1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1842      1.223    bouyer 		if ((p->td.td_link & UHCI_PTR_T) == 0) {
   1843      1.223    bouyer 			p->td.td_link = UHCI_PTR_T;
   1844      1.223    bouyer 			usb_syncmem(&p->dma,
   1845      1.223    bouyer 			    p->offs + offsetof(uhci_td_t, td_link),
   1846      1.223    bouyer 			    sizeof(p->td.td_link),
   1847      1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1848      1.223    bouyer 		}
   1849      1.223    bouyer 	}
   1850      1.223    bouyer 	delay(UHCI_QH_REMOVE_DELAY);
   1851      1.223    bouyer 
   1852        1.1  augustss 	for (; std != stdend; std = p) {
   1853       1.42  augustss 		p = std->link.std;
   1854        1.1  augustss 		uhci_free_std(sc, std);
   1855        1.1  augustss 	}
   1856        1.1  augustss }
   1857        1.1  augustss 
   1858        1.1  augustss usbd_status
   1859      1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1860      1.119  augustss 		     int rd, u_int16_t flags, usb_dma_t *dma,
   1861      1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1862        1.1  augustss {
   1863        1.1  augustss 	uhci_soft_td_t *p, *lastp;
   1864        1.1  augustss 	uhci_physaddr_t lastlink;
   1865        1.1  augustss 	int i, ntd, l, tog, maxp;
   1866       1.18  augustss 	u_int32_t status;
   1867        1.1  augustss 	int addr = upipe->pipe.device->address;
   1868        1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1869        1.1  augustss 
   1870      1.144  augustss 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1871      1.152  augustss 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1872      1.144  augustss 		      upipe->pipe.device->speed, flags));
   1873        1.4  augustss 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1874        1.1  augustss 	if (maxp == 0) {
   1875        1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1876        1.1  augustss 		return (USBD_INVAL);
   1877        1.1  augustss 	}
   1878        1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1879       1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1880       1.73  augustss 		ntd++;
   1881       1.39  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1882       1.73  augustss 	if (ntd == 0) {
   1883       1.73  augustss 		*sp = *ep = 0;
   1884       1.73  augustss 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1885       1.73  augustss 		return (USBD_NORMAL_COMPLETION);
   1886       1.73  augustss 	}
   1887       1.38  augustss 	tog = upipe->nexttoggle;
   1888        1.1  augustss 	if (ntd % 2 == 0)
   1889        1.1  augustss 		tog ^= 1;
   1890       1.32  augustss 	upipe->nexttoggle = tog ^ 1;
   1891      1.121  augustss 	lastp = NULL;
   1892        1.1  augustss 	lastlink = UHCI_PTR_T;
   1893        1.1  augustss 	ntd--;
   1894       1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1895      1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   1896       1.18  augustss 		status |= UHCI_TD_LS;
   1897       1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   1898       1.18  augustss 		status |= UHCI_TD_SPD;
   1899      1.223    bouyer 	usb_syncmem(dma, 0, len,
   1900      1.223    bouyer 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1901        1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1902        1.1  augustss 		p = uhci_alloc_std(sc);
   1903       1.63  augustss 		if (p == NULL) {
   1904      1.202  christos 			KASSERT(lastp != NULL);
   1905      1.149  augustss 			uhci_free_std_chain(sc, lastp, NULL);
   1906        1.1  augustss 			return (USBD_NOMEM);
   1907        1.1  augustss 		}
   1908       1.42  augustss 		p->link.std = lastp;
   1909      1.121  augustss 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1910        1.1  augustss 		lastp = p;
   1911        1.1  augustss 		lastlink = p->physaddr;
   1912       1.88   tsutsui 		p->td.td_status = htole32(status);
   1913        1.1  augustss 		if (i == ntd) {
   1914        1.1  augustss 			/* last TD */
   1915        1.1  augustss 			l = len % maxp;
   1916       1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1917       1.73  augustss 				l = maxp;
   1918        1.1  augustss 			*ep = p;
   1919        1.1  augustss 		} else
   1920        1.1  augustss 			l = maxp;
   1921      1.152  augustss 		p->td.td_token =
   1922       1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1923       1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1924      1.160  augustss 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1925      1.223    bouyer 		usb_syncmem(&p->dma, p->offs, sizeof(p->td),
   1926      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1927        1.1  augustss 		tog ^= 1;
   1928        1.1  augustss 	}
   1929        1.1  augustss 	*sp = lastp;
   1930      1.152  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1931       1.38  augustss 		      upipe->nexttoggle));
   1932        1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1933        1.1  augustss }
   1934        1.1  augustss 
   1935       1.38  augustss void
   1936      1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1937       1.38  augustss {
   1938       1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1939       1.38  augustss 	upipe->nexttoggle = 0;
   1940       1.38  augustss }
   1941       1.38  augustss 
   1942       1.38  augustss void
   1943      1.205  christos uhci_noop(usbd_pipe_handle pipe)
   1944       1.38  augustss {
   1945       1.38  augustss }
   1946       1.38  augustss 
   1947        1.1  augustss usbd_status
   1948      1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   1949        1.1  augustss {
   1950       1.63  augustss 	usbd_status err;
   1951       1.16  augustss 
   1952       1.52  augustss 	/* Insert last in queue. */
   1953       1.63  augustss 	err = usb_insert_transfer(xfer);
   1954       1.63  augustss 	if (err)
   1955       1.63  augustss 		return (err);
   1956       1.52  augustss 
   1957      1.152  augustss 	/*
   1958       1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1959       1.92  augustss 	 * so start it first.
   1960       1.67  augustss 	 */
   1961       1.63  augustss 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1962       1.16  augustss }
   1963       1.16  augustss 
   1964       1.16  augustss usbd_status
   1965      1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   1966       1.16  augustss {
   1967       1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1968        1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   1969      1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   1970       1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   1971       1.55  augustss 	uhci_soft_td_t *data, *dataend;
   1972        1.1  augustss 	uhci_soft_qh_t *sqh;
   1973       1.63  augustss 	usbd_status err;
   1974       1.45  augustss 	int len, isread, endpt;
   1975        1.1  augustss 	int s;
   1976        1.1  augustss 
   1977      1.169  augustss 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
   1978      1.169  augustss 		     xfer, xfer->length, xfer->flags, ii));
   1979        1.1  augustss 
   1980       1.82  augustss 	if (sc->sc_dying)
   1981       1.82  augustss 		return (USBD_IOERROR);
   1982       1.82  augustss 
   1983       1.48  augustss #ifdef DIAGNOSTIC
   1984       1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   1985      1.163    provos 		panic("uhci_device_bulk_transfer: a request");
   1986       1.48  augustss #endif
   1987        1.1  augustss 
   1988       1.63  augustss 	len = xfer->length;
   1989      1.102  augustss 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1990       1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   1991        1.1  augustss 	sqh = upipe->u.bulk.sqh;
   1992        1.1  augustss 
   1993        1.1  augustss 	upipe->u.bulk.isread = isread;
   1994        1.1  augustss 	upipe->u.bulk.length = len;
   1995        1.1  augustss 
   1996       1.73  augustss 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   1997       1.73  augustss 				   &xfer->dmabuf, &data, &dataend);
   1998       1.63  augustss 	if (err)
   1999       1.63  augustss 		return (err);
   2000       1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2001      1.223    bouyer 	usb_syncmem(&dataend->dma,
   2002      1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2003      1.223    bouyer 	    sizeof(dataend->td.td_status),
   2004      1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2005      1.223    bouyer 
   2006        1.1  augustss 
   2007       1.59  augustss #ifdef UHCI_DEBUG
   2008       1.33  augustss 	if (uhcidebug > 8) {
   2009       1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   2010       1.55  augustss 		uhci_dump_tds(data);
   2011        1.1  augustss 	}
   2012        1.1  augustss #endif
   2013        1.1  augustss 
   2014        1.1  augustss 	/* Set up interrupt info. */
   2015       1.63  augustss 	ii->xfer = xfer;
   2016       1.55  augustss 	ii->stdstart = data;
   2017       1.55  augustss 	ii->stdend = dataend;
   2018        1.7  augustss #ifdef DIAGNOSTIC
   2019       1.70  augustss 	if (!ii->isdone) {
   2020       1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   2021       1.70  augustss 	}
   2022        1.7  augustss 	ii->isdone = 0;
   2023        1.7  augustss #endif
   2024        1.1  augustss 
   2025       1.55  augustss 	sqh->elink = data;
   2026      1.121  augustss 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2027      1.223    bouyer 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2028        1.1  augustss 
   2029        1.1  augustss 	s = splusb();
   2030        1.1  augustss 	uhci_add_bulk(sc, sqh);
   2031       1.92  augustss 	uhci_add_intr_info(sc, ii);
   2032        1.1  augustss 
   2033       1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2034  1.232.2.2     rmind 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   2035       1.91  augustss 			    uhci_timeout, ii);
   2036       1.13  augustss 	}
   2037       1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2038        1.1  augustss 	splx(s);
   2039        1.1  augustss 
   2040       1.59  augustss #ifdef UHCI_DEBUG
   2041        1.1  augustss 	if (uhcidebug > 10) {
   2042       1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   2043       1.55  augustss 		uhci_dump_tds(data);
   2044        1.1  augustss 	}
   2045        1.1  augustss #endif
   2046        1.1  augustss 
   2047       1.26  augustss 	if (sc->sc_bus.use_polling)
   2048       1.63  augustss 		uhci_waitintr(sc, xfer);
   2049       1.26  augustss 
   2050        1.1  augustss 	return (USBD_IN_PROGRESS);
   2051        1.1  augustss }
   2052        1.1  augustss 
   2053        1.1  augustss /* Abort a device bulk request. */
   2054        1.1  augustss void
   2055      1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   2056        1.1  augustss {
   2057       1.33  augustss 	DPRINTF(("uhci_device_bulk_abort:\n"));
   2058       1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2059       1.33  augustss }
   2060       1.33  augustss 
   2061       1.92  augustss /*
   2062      1.154  augustss  * Abort a device request.
   2063      1.154  augustss  * If this routine is called at splusb() it guarantees that the request
   2064      1.154  augustss  * will be removed from the hardware scheduling and that the callback
   2065      1.154  augustss  * for it will be called with USBD_CANCELLED status.
   2066      1.154  augustss  * It's impossible to guarantee that the requested transfer will not
   2067      1.154  augustss  * have happened since the hardware runs concurrently.
   2068      1.154  augustss  * If the transaction has already happened we rely on the ordinary
   2069      1.154  augustss  * interrupt processing to process it.
   2070       1.92  augustss  */
   2071       1.33  augustss void
   2072      1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2073       1.33  augustss {
   2074       1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2075      1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2076      1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2077       1.33  augustss 	uhci_soft_td_t *std;
   2078       1.92  augustss 	int s;
   2079      1.188  augustss 	int wake;
   2080       1.65  augustss 
   2081      1.106  augustss 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   2082       1.33  augustss 
   2083      1.153  augustss 	if (sc->sc_dying) {
   2084      1.153  augustss 		/* If we're dying, just do the software part. */
   2085      1.153  augustss 		s = splusb();
   2086      1.153  augustss 		xfer->status = status;	/* make software ignore it */
   2087  1.232.2.2     rmind 		callout_stop(&xfer->timeout_handle);
   2088      1.153  augustss 		usb_transfer_complete(xfer);
   2089       1.92  augustss 		splx(s);
   2090      1.194  christos 		return;
   2091       1.92  augustss 	}
   2092       1.92  augustss 
   2093      1.153  augustss 	if (xfer->device->bus->intr_context || !curproc)
   2094      1.163    provos 		panic("uhci_abort_xfer: not in process context");
   2095      1.153  augustss 
   2096      1.153  augustss 	/*
   2097      1.188  augustss 	 * If an abort is already in progress then just wait for it to
   2098      1.188  augustss 	 * complete and return.
   2099      1.188  augustss 	 */
   2100      1.188  augustss 	if (xfer->hcflags & UXFER_ABORTING) {
   2101      1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
   2102      1.188  augustss #ifdef DIAGNOSTIC
   2103      1.188  augustss 		if (status == USBD_TIMEOUT)
   2104      1.188  augustss 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2105      1.188  augustss #endif
   2106      1.188  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2107      1.188  augustss 		xfer->status = status;
   2108      1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
   2109      1.188  augustss 		xfer->hcflags |= UXFER_ABORTWAIT;
   2110      1.188  augustss 		while (xfer->hcflags & UXFER_ABORTING)
   2111      1.188  augustss 			tsleep(&xfer->hcflags, PZERO, "uhciaw", 0);
   2112      1.188  augustss 		return;
   2113      1.188  augustss 	}
   2114      1.188  augustss 	xfer->hcflags |= UXFER_ABORTING;
   2115      1.188  augustss 
   2116      1.188  augustss 	/*
   2117      1.153  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2118      1.153  augustss 	 */
   2119      1.153  augustss 	s = splusb();
   2120      1.153  augustss 	xfer->status = status;	/* make software ignore it */
   2121  1.232.2.2     rmind 	callout_stop(&xfer->timeout_handle);
   2122      1.153  augustss 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   2123      1.223    bouyer 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   2124      1.223    bouyer 		usb_syncmem(&std->dma,
   2125      1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2126      1.223    bouyer 		    sizeof(std->td.td_status),
   2127      1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2128       1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2129      1.223    bouyer 		usb_syncmem(&std->dma,
   2130      1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2131      1.223    bouyer 		    sizeof(std->td.td_status),
   2132      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2133      1.223    bouyer 	}
   2134      1.153  augustss 	splx(s);
   2135       1.92  augustss 
   2136      1.162  augustss 	/*
   2137      1.153  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2138      1.153  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2139      1.153  augustss 	 * has run.
   2140      1.153  augustss 	 */
   2141      1.154  augustss 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
   2142      1.153  augustss 	s = splusb();
   2143      1.164  augustss #ifdef USB_USE_SOFTINTR
   2144      1.153  augustss 	sc->sc_softwake = 1;
   2145      1.164  augustss #endif /* USB_USE_SOFTINTR */
   2146      1.153  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2147      1.164  augustss #ifdef USB_USE_SOFTINTR
   2148      1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
   2149      1.153  augustss 	tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
   2150      1.164  augustss #endif /* USB_USE_SOFTINTR */
   2151      1.153  augustss 	splx(s);
   2152      1.162  augustss 
   2153      1.153  augustss 	/*
   2154      1.153  augustss 	 * Step 3: Execute callback.
   2155      1.153  augustss 	 */
   2156      1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   2157       1.92  augustss 	s = splusb();
   2158      1.100  augustss #ifdef DIAGNOSTIC
   2159      1.106  augustss 	ii->isdone = 1;
   2160      1.100  augustss #endif
   2161      1.188  augustss 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2162      1.188  augustss 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2163      1.106  augustss 	usb_transfer_complete(xfer);
   2164      1.188  augustss 	if (wake)
   2165      1.188  augustss 		wakeup(&xfer->hcflags);
   2166       1.33  augustss 	splx(s);
   2167        1.1  augustss }
   2168        1.1  augustss 
   2169        1.1  augustss /* Close a device bulk pipe. */
   2170        1.1  augustss void
   2171      1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   2172        1.1  augustss {
   2173        1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2174        1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2175      1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2176        1.1  augustss 
   2177        1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2178  1.232.2.3     rmind 
   2179  1.232.2.3     rmind 	pipe->endpoint->datatoggle = upipe->nexttoggle;
   2180        1.1  augustss }
   2181        1.1  augustss 
   2182        1.1  augustss usbd_status
   2183      1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2184        1.1  augustss {
   2185       1.63  augustss 	usbd_status err;
   2186       1.16  augustss 
   2187       1.52  augustss 	/* Insert last in queue. */
   2188       1.63  augustss 	err = usb_insert_transfer(xfer);
   2189       1.63  augustss 	if (err)
   2190       1.63  augustss 		return (err);
   2191       1.52  augustss 
   2192      1.152  augustss 	/*
   2193       1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2194       1.92  augustss 	 * so start it first.
   2195       1.67  augustss 	 */
   2196       1.63  augustss 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2197       1.16  augustss }
   2198       1.16  augustss 
   2199       1.16  augustss usbd_status
   2200      1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2201       1.16  augustss {
   2202      1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2203       1.63  augustss 	usbd_status err;
   2204        1.1  augustss 
   2205       1.82  augustss 	if (sc->sc_dying)
   2206       1.82  augustss 		return (USBD_IOERROR);
   2207       1.82  augustss 
   2208       1.48  augustss #ifdef DIAGNOSTIC
   2209       1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2210      1.163    provos 		panic("uhci_device_ctrl_transfer: not a request");
   2211       1.48  augustss #endif
   2212        1.1  augustss 
   2213       1.63  augustss 	err = uhci_device_request(xfer);
   2214       1.63  augustss 	if (err)
   2215       1.63  augustss 		return (err);
   2216        1.1  augustss 
   2217        1.9  augustss 	if (sc->sc_bus.use_polling)
   2218       1.63  augustss 		uhci_waitintr(sc, xfer);
   2219        1.1  augustss 	return (USBD_IN_PROGRESS);
   2220        1.1  augustss }
   2221        1.1  augustss 
   2222        1.1  augustss usbd_status
   2223      1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2224        1.1  augustss {
   2225       1.63  augustss 	usbd_status err;
   2226       1.16  augustss 
   2227       1.52  augustss 	/* Insert last in queue. */
   2228       1.63  augustss 	err = usb_insert_transfer(xfer);
   2229       1.63  augustss 	if (err)
   2230       1.63  augustss 		return (err);
   2231       1.52  augustss 
   2232      1.152  augustss 	/*
   2233       1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2234       1.92  augustss 	 * so start it first.
   2235       1.67  augustss 	 */
   2236       1.63  augustss 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2237       1.16  augustss }
   2238       1.16  augustss 
   2239       1.16  augustss usbd_status
   2240      1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2241       1.16  augustss {
   2242       1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2243        1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2244      1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2245       1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2246       1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2247        1.1  augustss 	uhci_soft_qh_t *sqh;
   2248       1.63  augustss 	usbd_status err;
   2249      1.187     skrll 	int isread, endpt;
   2250       1.49  augustss 	int i, s;
   2251        1.1  augustss 
   2252       1.82  augustss 	if (sc->sc_dying)
   2253       1.82  augustss 		return (USBD_IOERROR);
   2254       1.82  augustss 
   2255       1.63  augustss 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2256       1.63  augustss 		    xfer, xfer->length, xfer->flags));
   2257        1.1  augustss 
   2258       1.48  augustss #ifdef DIAGNOSTIC
   2259       1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2260      1.163    provos 		panic("uhci_device_intr_transfer: a request");
   2261       1.48  augustss #endif
   2262        1.1  augustss 
   2263      1.187     skrll 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2264      1.187     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2265      1.187     skrll 
   2266      1.187     skrll 	upipe->u.intr.isread = isread;
   2267      1.187     skrll 
   2268      1.187     skrll 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
   2269      1.187     skrll 				   xfer->flags, &xfer->dmabuf, &data,
   2270      1.187     skrll 				   &dataend);
   2271       1.63  augustss 	if (err)
   2272       1.63  augustss 		return (err);
   2273       1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2274      1.223    bouyer 	usb_syncmem(&dataend->dma,
   2275      1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2276      1.223    bouyer 	    sizeof(dataend->td.td_status),
   2277      1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2278        1.1  augustss 
   2279       1.59  augustss #ifdef UHCI_DEBUG
   2280        1.1  augustss 	if (uhcidebug > 10) {
   2281       1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2282       1.55  augustss 		uhci_dump_tds(data);
   2283        1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2284        1.1  augustss 	}
   2285        1.1  augustss #endif
   2286        1.1  augustss 
   2287        1.1  augustss 	s = splusb();
   2288        1.1  augustss 	/* Set up interrupt info. */
   2289       1.63  augustss 	ii->xfer = xfer;
   2290       1.55  augustss 	ii->stdstart = data;
   2291       1.55  augustss 	ii->stdend = dataend;
   2292        1.7  augustss #ifdef DIAGNOSTIC
   2293       1.70  augustss 	if (!ii->isdone) {
   2294       1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2295       1.70  augustss 	}
   2296        1.7  augustss 	ii->isdone = 0;
   2297        1.7  augustss #endif
   2298        1.1  augustss 
   2299      1.152  augustss 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2300       1.12  augustss 		     upipe->u.intr.qhs[0]));
   2301        1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2302        1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2303       1.55  augustss 		sqh->elink = data;
   2304      1.121  augustss 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2305      1.223    bouyer 		usb_syncmem(&sqh->dma,
   2306      1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2307      1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2308      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2309        1.1  augustss 	}
   2310       1.92  augustss 	uhci_add_intr_info(sc, ii);
   2311       1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2312        1.1  augustss 	splx(s);
   2313        1.1  augustss 
   2314       1.59  augustss #ifdef UHCI_DEBUG
   2315        1.1  augustss 	if (uhcidebug > 10) {
   2316       1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2317       1.55  augustss 		uhci_dump_tds(data);
   2318        1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2319        1.1  augustss 	}
   2320        1.1  augustss #endif
   2321        1.1  augustss 
   2322        1.1  augustss 	return (USBD_IN_PROGRESS);
   2323        1.1  augustss }
   2324        1.1  augustss 
   2325        1.1  augustss /* Abort a device control request. */
   2326        1.1  augustss void
   2327      1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2328        1.1  augustss {
   2329       1.33  augustss 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2330       1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2331        1.1  augustss }
   2332        1.1  augustss 
   2333        1.1  augustss /* Close a device control pipe. */
   2334        1.1  augustss void
   2335      1.205  christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2336        1.1  augustss {
   2337        1.1  augustss }
   2338        1.1  augustss 
   2339        1.1  augustss /* Abort a device interrupt request. */
   2340        1.1  augustss void
   2341      1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2342        1.1  augustss {
   2343       1.63  augustss 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2344       1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2345       1.36  augustss 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2346      1.154  augustss 		xfer->pipe->intrxfer = NULL;
   2347        1.1  augustss 	}
   2348       1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2349        1.1  augustss }
   2350        1.1  augustss 
   2351        1.1  augustss /* Close a device interrupt pipe. */
   2352        1.1  augustss void
   2353      1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2354        1.1  augustss {
   2355        1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2356      1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   2357       1.92  augustss 	int i, npoll;
   2358       1.92  augustss 	int s;
   2359        1.1  augustss 
   2360        1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2361        1.1  augustss 	npoll = upipe->u.intr.npoll;
   2362       1.92  augustss 	s = splusb();
   2363        1.1  augustss 	for (i = 0; i < npoll; i++)
   2364       1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2365       1.92  augustss 	splx(s);
   2366        1.1  augustss 
   2367      1.152  augustss 	/*
   2368        1.1  augustss 	 * We now have to wait for any activity on the physical
   2369        1.1  augustss 	 * descriptors to stop.
   2370        1.1  augustss 	 */
   2371       1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2);
   2372        1.1  augustss 
   2373        1.1  augustss 	for(i = 0; i < npoll; i++)
   2374        1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2375       1.31  augustss 	free(upipe->u.intr.qhs, M_USBHC);
   2376        1.1  augustss 
   2377        1.1  augustss 	/* XXX free other resources */
   2378        1.1  augustss }
   2379        1.1  augustss 
   2380        1.1  augustss usbd_status
   2381      1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2382        1.1  augustss {
   2383       1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2384       1.63  augustss 	usb_device_request_t *req = &xfer->request;
   2385        1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2386      1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2387        1.1  augustss 	int addr = dev->address;
   2388        1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2389       1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2390       1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2391        1.1  augustss 	uhci_soft_qh_t *sqh;
   2392        1.1  augustss 	int len;
   2393        1.1  augustss 	u_int32_t ls;
   2394       1.63  augustss 	usbd_status err;
   2395        1.1  augustss 	int isread;
   2396        1.1  augustss 	int s;
   2397        1.1  augustss 
   2398       1.13  augustss 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2399       1.12  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2400        1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2401        1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   2402        1.1  augustss 		    addr, endpt));
   2403        1.1  augustss 
   2404      1.144  augustss 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2405        1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2406        1.1  augustss 	len = UGETW(req->wLength);
   2407        1.1  augustss 
   2408        1.1  augustss 	setup = upipe->u.ctl.setup;
   2409        1.1  augustss 	stat = upipe->u.ctl.stat;
   2410        1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2411        1.1  augustss 
   2412        1.1  augustss 	/* Set up data transaction */
   2413        1.1  augustss 	if (len != 0) {
   2414       1.38  augustss 		upipe->nexttoggle = 1;
   2415       1.73  augustss 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2416       1.73  augustss 					   &xfer->dmabuf, &data, &dataend);
   2417       1.63  augustss 		if (err)
   2418       1.63  augustss 			return (err);
   2419       1.55  augustss 		next = data;
   2420       1.55  augustss 		dataend->link.std = stat;
   2421      1.121  augustss 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2422      1.223    bouyer 		usb_syncmem(&dataend->dma,
   2423      1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2424      1.223    bouyer 		    sizeof(dataend->td.td_link),
   2425      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2426        1.1  augustss 	} else {
   2427        1.1  augustss 		next = stat;
   2428        1.1  augustss 	}
   2429        1.1  augustss 	upipe->u.ctl.length = len;
   2430        1.1  augustss 
   2431      1.159  augustss 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2432      1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   2433        1.1  augustss 
   2434       1.42  augustss 	setup->link.std = next;
   2435      1.121  augustss 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2436       1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2437       1.88   tsutsui 		UHCI_TD_ACTIVE);
   2438       1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2439      1.160  augustss 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2440      1.223    bouyer 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2441      1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2442       1.42  augustss 
   2443       1.92  augustss 	stat->link.std = NULL;
   2444       1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2445      1.152  augustss 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2446       1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2447      1.152  augustss 	stat->td.td_token =
   2448       1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2449       1.88   tsutsui 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2450       1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2451      1.223    bouyer 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2452      1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2453        1.1  augustss 
   2454       1.59  augustss #ifdef UHCI_DEBUG
   2455       1.67  augustss 	if (uhcidebug > 10) {
   2456       1.47  augustss 		DPRINTF(("uhci_device_request: before transfer\n"));
   2457       1.41  augustss 		uhci_dump_tds(setup);
   2458        1.1  augustss 	}
   2459        1.1  augustss #endif
   2460        1.1  augustss 
   2461        1.1  augustss 	/* Set up interrupt info. */
   2462       1.63  augustss 	ii->xfer = xfer;
   2463        1.1  augustss 	ii->stdstart = setup;
   2464        1.1  augustss 	ii->stdend = stat;
   2465        1.7  augustss #ifdef DIAGNOSTIC
   2466       1.70  augustss 	if (!ii->isdone) {
   2467       1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2468       1.70  augustss 	}
   2469        1.7  augustss 	ii->isdone = 0;
   2470        1.7  augustss #endif
   2471        1.1  augustss 
   2472       1.42  augustss 	sqh->elink = setup;
   2473      1.121  augustss 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2474      1.223    bouyer 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2475        1.1  augustss 
   2476        1.1  augustss 	s = splusb();
   2477      1.144  augustss 	if (dev->speed == USB_SPEED_LOW)
   2478      1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2479      1.123  augustss 	else
   2480      1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2481       1.92  augustss 	uhci_add_intr_info(sc, ii);
   2482       1.59  augustss #ifdef UHCI_DEBUG
   2483        1.1  augustss 	if (uhcidebug > 12) {
   2484        1.1  augustss 		uhci_soft_td_t *std;
   2485        1.1  augustss 		uhci_soft_qh_t *xqh;
   2486       1.13  augustss 		uhci_soft_qh_t *sxqh;
   2487       1.13  augustss 		int maxqh = 0;
   2488        1.1  augustss 		uhci_physaddr_t link;
   2489       1.47  augustss 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2490        1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2491      1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2492       1.42  augustss 		     std = std->link.std) {
   2493       1.88   tsutsui 			link = le32toh(std->td.td_link);
   2494        1.1  augustss 			uhci_dump_td(std);
   2495        1.1  augustss 		}
   2496       1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2497       1.67  augustss 		uhci_dump_qh(sxqh);
   2498       1.67  augustss 		for (xqh = sxqh;
   2499       1.63  augustss 		     xqh != NULL;
   2500      1.152  augustss 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2501      1.121  augustss                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2502        1.1  augustss 			uhci_dump_qh(xqh);
   2503       1.13  augustss 		}
   2504       1.47  augustss 		DPRINTF(("Enqueued QH:\n"));
   2505        1.1  augustss 		uhci_dump_qh(sqh);
   2506       1.42  augustss 		uhci_dump_tds(sqh->elink);
   2507        1.1  augustss 	}
   2508        1.1  augustss #endif
   2509       1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2510  1.232.2.2     rmind 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   2511       1.91  augustss 			    uhci_timeout, ii);
   2512       1.13  augustss 	}
   2513       1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2514        1.1  augustss 	splx(s);
   2515        1.1  augustss 
   2516        1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2517        1.1  augustss }
   2518        1.1  augustss 
   2519       1.16  augustss usbd_status
   2520      1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2521       1.16  augustss {
   2522       1.63  augustss 	usbd_status err;
   2523       1.48  augustss 
   2524       1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2525       1.48  augustss 
   2526       1.48  augustss 	/* Put it on our queue, */
   2527       1.63  augustss 	err = usb_insert_transfer(xfer);
   2528       1.48  augustss 
   2529       1.48  augustss 	/* bail out on error, */
   2530       1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2531       1.63  augustss 		return (err);
   2532       1.48  augustss 
   2533       1.48  augustss 	/* XXX should check inuse here */
   2534       1.48  augustss 
   2535       1.48  augustss 	/* insert into schedule, */
   2536       1.63  augustss 	uhci_device_isoc_enter(xfer);
   2537       1.48  augustss 
   2538      1.102  augustss 	/* and start if the pipe wasn't running */
   2539       1.67  augustss 	if (!err)
   2540       1.63  augustss 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2541       1.48  augustss 
   2542       1.63  augustss 	return (err);
   2543       1.48  augustss }
   2544       1.48  augustss 
   2545       1.48  augustss void
   2546      1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2547       1.48  augustss {
   2548       1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2549       1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2550      1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2551       1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2552      1.152  augustss 	uhci_soft_td_t *std;
   2553      1.223    bouyer 	u_int32_t buf, len, status, offs;
   2554       1.48  augustss 	int s, i, next, nframes;
   2555      1.223    bouyer 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2556       1.48  augustss 
   2557       1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2558       1.48  augustss 		    "nframes=%d\n",
   2559       1.63  augustss 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2560       1.48  augustss 
   2561       1.82  augustss 	if (sc->sc_dying)
   2562       1.82  augustss 		return;
   2563       1.82  augustss 
   2564       1.63  augustss 	if (xfer->status == USBD_IN_PROGRESS) {
   2565       1.48  augustss 		/* This request has already been entered into the frame list */
   2566       1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2567       1.68  augustss 		/* XXX */
   2568       1.48  augustss 	}
   2569       1.48  augustss 
   2570       1.48  augustss #ifdef DIAGNOSTIC
   2571       1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2572       1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   2573       1.19  augustss #endif
   2574       1.16  augustss 
   2575       1.48  augustss 	next = iso->next;
   2576       1.48  augustss 	if (next == -1) {
   2577       1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   2578       1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2579       1.48  augustss 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2580       1.48  augustss 	}
   2581       1.48  augustss 
   2582       1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   2583       1.92  augustss 	UXFER(xfer)->curframe = next;
   2584       1.48  augustss 
   2585      1.160  augustss 	buf = DMAADDR(&xfer->dmabuf, 0);
   2586      1.223    bouyer 	offs = 0;
   2587       1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2588       1.88   tsutsui 				     UHCI_TD_ACTIVE |
   2589       1.88   tsutsui 				     UHCI_TD_IOS);
   2590       1.63  augustss 	nframes = xfer->nframes;
   2591       1.48  augustss 	s = splusb();
   2592       1.48  augustss 	for (i = 0; i < nframes; i++) {
   2593       1.48  augustss 		std = iso->stds[next];
   2594       1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2595       1.48  augustss 			next = 0;
   2596       1.63  augustss 		len = xfer->frlengths[i];
   2597       1.88   tsutsui 		std->td.td_buffer = htole32(buf);
   2598      1.223    bouyer 		usb_syncmem(&xfer->dmabuf, offs, len,
   2599      1.223    bouyer 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2600       1.48  augustss 		if (i == nframes - 1)
   2601       1.88   tsutsui 			status |= UHCI_TD_IOC;
   2602       1.88   tsutsui 		std->td.td_status = htole32(status);
   2603       1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2604       1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2605      1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2606      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2607       1.59  augustss #ifdef UHCI_DEBUG
   2608       1.48  augustss 		if (uhcidebug > 5) {
   2609       1.48  augustss 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2610       1.48  augustss 			uhci_dump_td(std);
   2611       1.48  augustss 		}
   2612       1.48  augustss #endif
   2613       1.48  augustss 		buf += len;
   2614      1.223    bouyer 		offs += len;
   2615       1.48  augustss 	}
   2616       1.48  augustss 	iso->next = next;
   2617       1.63  augustss 	iso->inuse += xfer->nframes;
   2618       1.16  augustss 
   2619       1.48  augustss 	splx(s);
   2620       1.16  augustss }
   2621       1.16  augustss 
   2622       1.16  augustss usbd_status
   2623      1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   2624       1.16  augustss {
   2625       1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2626      1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2627       1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2628       1.48  augustss 	uhci_soft_td_t *end;
   2629       1.48  augustss 	int s, i;
   2630       1.48  augustss 
   2631       1.96  augustss 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2632       1.96  augustss 
   2633       1.82  augustss 	if (sc->sc_dying)
   2634       1.82  augustss 		return (USBD_IOERROR);
   2635       1.82  augustss 
   2636       1.48  augustss #ifdef DIAGNOSTIC
   2637       1.63  augustss 	if (xfer->status != USBD_IN_PROGRESS)
   2638       1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2639       1.48  augustss #endif
   2640       1.48  augustss 
   2641       1.48  augustss 	/* Find the last TD */
   2642       1.92  augustss 	i = UXFER(xfer)->curframe + xfer->nframes;
   2643       1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   2644       1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   2645       1.48  augustss 	end = upipe->u.iso.stds[i];
   2646       1.48  augustss 
   2647       1.96  augustss #ifdef DIAGNOSTIC
   2648       1.96  augustss 	if (end == NULL) {
   2649       1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   2650       1.96  augustss 		return (USBD_INVAL);
   2651       1.96  augustss 	}
   2652       1.96  augustss #endif
   2653       1.96  augustss 
   2654       1.48  augustss 	s = splusb();
   2655      1.152  augustss 
   2656       1.48  augustss 	/* Set up interrupt info. */
   2657       1.63  augustss 	ii->xfer = xfer;
   2658       1.48  augustss 	ii->stdstart = end;
   2659       1.48  augustss 	ii->stdend = end;
   2660       1.48  augustss #ifdef DIAGNOSTIC
   2661      1.102  augustss 	if (!ii->isdone)
   2662       1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2663       1.48  augustss 	ii->isdone = 0;
   2664       1.48  augustss #endif
   2665       1.92  augustss 	uhci_add_intr_info(sc, ii);
   2666      1.152  augustss 
   2667       1.48  augustss 	splx(s);
   2668       1.48  augustss 
   2669       1.48  augustss 	return (USBD_IN_PROGRESS);
   2670       1.16  augustss }
   2671       1.16  augustss 
   2672       1.16  augustss void
   2673      1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2674       1.16  augustss {
   2675       1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2676       1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2677       1.48  augustss 	uhci_soft_td_t *std;
   2678       1.92  augustss 	int i, n, s, nframes, maxlen, len;
   2679       1.92  augustss 
   2680       1.92  augustss 	s = splusb();
   2681       1.92  augustss 
   2682       1.92  augustss 	/* Transfer is already done. */
   2683      1.152  augustss 	if (xfer->status != USBD_NOT_STARTED &&
   2684       1.92  augustss 	    xfer->status != USBD_IN_PROGRESS) {
   2685       1.92  augustss 		splx(s);
   2686       1.92  augustss 		return;
   2687       1.92  augustss 	}
   2688       1.48  augustss 
   2689       1.92  augustss 	/* Give xfer the requested abort code. */
   2690       1.63  augustss 	xfer->status = USBD_CANCELLED;
   2691       1.48  augustss 
   2692       1.48  augustss 	/* make hardware ignore it, */
   2693       1.63  augustss 	nframes = xfer->nframes;
   2694       1.92  augustss 	n = UXFER(xfer)->curframe;
   2695       1.92  augustss 	maxlen = 0;
   2696       1.48  augustss 	for (i = 0; i < nframes; i++) {
   2697       1.48  augustss 		std = stds[n];
   2698      1.223    bouyer 		usb_syncmem(&std->dma,
   2699      1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2700      1.223    bouyer 		    sizeof(std->td.td_status),
   2701      1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2702       1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2703      1.223    bouyer 		usb_syncmem(&std->dma,
   2704      1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2705      1.223    bouyer 		    sizeof(std->td.td_status),
   2706      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2707      1.223    bouyer 		usb_syncmem(&std->dma,
   2708      1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_token),
   2709      1.223    bouyer 		    sizeof(std->td.td_token),
   2710      1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2711      1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2712       1.92  augustss 		if (len > maxlen)
   2713       1.92  augustss 			maxlen = len;
   2714       1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2715       1.48  augustss 			n = 0;
   2716       1.48  augustss 	}
   2717       1.48  augustss 
   2718       1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   2719       1.92  augustss 	delay(maxlen);
   2720       1.92  augustss 
   2721       1.96  augustss #ifdef DIAGNOSTIC
   2722       1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   2723       1.96  augustss #endif
   2724       1.92  augustss 	/* Run callback and remove from interrupt list. */
   2725       1.92  augustss 	usb_transfer_complete(xfer);
   2726       1.48  augustss 
   2727       1.92  augustss 	splx(s);
   2728       1.16  augustss }
   2729       1.16  augustss 
   2730       1.16  augustss void
   2731      1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   2732       1.16  augustss {
   2733       1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2734       1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2735      1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2736       1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2737       1.16  augustss 	struct iso *iso;
   2738       1.92  augustss 	int i, s;
   2739       1.16  augustss 
   2740       1.16  augustss 	/*
   2741       1.16  augustss 	 * Make sure all TDs are marked as inactive.
   2742       1.16  augustss 	 * Wait for completion.
   2743       1.16  augustss 	 * Unschedule.
   2744       1.16  augustss 	 * Deallocate.
   2745       1.16  augustss 	 */
   2746       1.16  augustss 	iso = &upipe->u.iso;
   2747       1.16  augustss 
   2748      1.223    bouyer 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2749      1.223    bouyer 		std = iso->stds[i];
   2750      1.223    bouyer 		usb_syncmem(&std->dma,
   2751      1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2752      1.223    bouyer 		    sizeof(std->td.td_status),
   2753      1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2754      1.223    bouyer 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2755      1.223    bouyer 		usb_syncmem(&std->dma,
   2756      1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2757      1.223    bouyer 		    sizeof(std->td.td_status),
   2758      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2759      1.223    bouyer 	}
   2760       1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
   2761       1.16  augustss 
   2762       1.92  augustss 	s = splusb();
   2763       1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2764       1.16  augustss 		std = iso->stds[i];
   2765       1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   2766       1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   2767       1.42  augustss 		     vstd = vstd->link.std)
   2768       1.16  augustss 			;
   2769       1.67  augustss 		if (vstd == NULL) {
   2770       1.16  augustss 			/*panic*/
   2771       1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   2772       1.92  augustss 			splx(s);
   2773       1.16  augustss 			return;
   2774       1.16  augustss 		}
   2775       1.42  augustss 		vstd->link = std->link;
   2776      1.223    bouyer 		usb_syncmem(&std->dma,
   2777      1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2778      1.223    bouyer 		    sizeof(std->td.td_link),
   2779      1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2780       1.42  augustss 		vstd->td.td_link = std->td.td_link;
   2781      1.223    bouyer 		usb_syncmem(&vstd->dma,
   2782      1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2783      1.223    bouyer 		    sizeof(vstd->td.td_link),
   2784      1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2785       1.16  augustss 		uhci_free_std(sc, std);
   2786       1.16  augustss 	}
   2787       1.92  augustss 	splx(s);
   2788       1.16  augustss 
   2789       1.31  augustss 	free(iso->stds, M_USBHC);
   2790       1.16  augustss }
   2791       1.16  augustss 
   2792       1.16  augustss usbd_status
   2793      1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   2794       1.16  augustss {
   2795       1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2796       1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2797      1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2798       1.16  augustss 	int addr = upipe->pipe.device->address;
   2799       1.16  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2800       1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2801       1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2802       1.48  augustss 	u_int32_t token;
   2803       1.16  augustss 	struct iso *iso;
   2804       1.92  augustss 	int i, s;
   2805       1.16  augustss 
   2806       1.16  augustss 	iso = &upipe->u.iso;
   2807       1.16  augustss 	iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
   2808       1.31  augustss 			   M_USBHC, M_WAITOK);
   2809       1.16  augustss 
   2810       1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2811       1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2812       1.16  augustss 
   2813       1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   2814       1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2815       1.48  augustss 		std = uhci_alloc_std(sc);
   2816       1.48  augustss 		if (std == 0)
   2817       1.48  augustss 			goto bad;
   2818       1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2819       1.88   tsutsui 		std->td.td_token = htole32(token);
   2820      1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2821      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2822       1.48  augustss 		iso->stds[i] = std;
   2823       1.16  augustss 	}
   2824       1.16  augustss 
   2825       1.48  augustss 	/* Insert TDs into schedule. */
   2826       1.92  augustss 	s = splusb();
   2827       1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2828       1.16  augustss 		std = iso->stds[i];
   2829       1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   2830      1.223    bouyer 		usb_syncmem(&vstd->dma,
   2831      1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2832      1.223    bouyer 		    sizeof(vstd->td.td_link),
   2833      1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2834       1.42  augustss 		std->link = vstd->link;
   2835       1.42  augustss 		std->td.td_link = vstd->td.td_link;
   2836      1.223    bouyer 		usb_syncmem(&std->dma,
   2837      1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2838      1.223    bouyer 		    sizeof(std->td.td_link),
   2839      1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2840       1.42  augustss 		vstd->link.std = std;
   2841      1.121  augustss 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2842      1.223    bouyer 		usb_syncmem(&vstd->dma,
   2843      1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2844      1.223    bouyer 		    sizeof(vstd->td.td_link),
   2845      1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2846       1.16  augustss 	}
   2847       1.92  augustss 	splx(s);
   2848       1.16  augustss 
   2849       1.48  augustss 	iso->next = -1;
   2850       1.48  augustss 	iso->inuse = 0;
   2851       1.48  augustss 
   2852       1.16  augustss 	return (USBD_NORMAL_COMPLETION);
   2853       1.16  augustss 
   2854       1.48  augustss  bad:
   2855       1.16  augustss 	while (--i >= 0)
   2856       1.16  augustss 		uhci_free_std(sc, iso->stds[i]);
   2857       1.31  augustss 	free(iso->stds, M_USBHC);
   2858       1.16  augustss 	return (USBD_NOMEM);
   2859       1.16  augustss }
   2860       1.16  augustss 
   2861       1.16  augustss void
   2862      1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   2863       1.16  augustss {
   2864       1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2865      1.223    bouyer 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2866      1.223    bouyer 	int i, offs;
   2867      1.223    bouyer 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2868      1.223    bouyer 
   2869       1.48  augustss 
   2870      1.197   gdamore 	DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
   2871      1.197   gdamore 			xfer->actlen, xfer->busy_free));
   2872       1.93  augustss 
   2873       1.96  augustss 	if (ii->xfer != xfer)
   2874       1.96  augustss 		/* Not on interrupt list, ignore it. */
   2875      1.170  augustss 		return;
   2876      1.170  augustss 
   2877      1.170  augustss 	if (!uhci_active_intr_info(ii))
   2878       1.96  augustss 		return;
   2879       1.96  augustss 
   2880       1.93  augustss #ifdef DIAGNOSTIC
   2881       1.93  augustss         if (ii->stdend == NULL) {
   2882       1.93  augustss                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2883       1.93  augustss #ifdef UHCI_DEBUG
   2884       1.93  augustss 		uhci_dump_ii(ii);
   2885       1.93  augustss #endif
   2886       1.93  augustss 		return;
   2887       1.93  augustss 	}
   2888       1.93  augustss #endif
   2889       1.48  augustss 
   2890       1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   2891      1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2892      1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2893      1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2894      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2895       1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2896      1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2897      1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2898      1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2899      1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2900       1.48  augustss 
   2901       1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2902      1.223    bouyer 
   2903      1.223    bouyer 	offs = 0;
   2904      1.223    bouyer 	for (i = 0; i < xfer->nframes; i++) {
   2905      1.223    bouyer 		usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i],
   2906      1.223    bouyer 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2907      1.223    bouyer 		offs += xfer->frlengths[i];
   2908      1.223    bouyer 	}
   2909       1.16  augustss }
   2910       1.16  augustss 
   2911        1.1  augustss void
   2912      1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   2913        1.1  augustss {
   2914       1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2915        1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2916       1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2917        1.1  augustss 	uhci_soft_qh_t *sqh;
   2918      1.223    bouyer 	int i, npoll, isread;
   2919        1.1  augustss 
   2920      1.173      gson 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
   2921        1.1  augustss 
   2922        1.1  augustss 	npoll = upipe->u.intr.npoll;
   2923        1.1  augustss 	for(i = 0; i < npoll; i++) {
   2924        1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2925      1.121  augustss 		sqh->elink = NULL;
   2926       1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2927      1.223    bouyer 		usb_syncmem(&sqh->dma,
   2928      1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2929      1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2930      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2931        1.1  augustss 	}
   2932      1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2933        1.1  augustss 
   2934      1.223    bouyer 	isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2935      1.223    bouyer 	usb_syncmem(&xfer->dmabuf, 0, xfer->length,
   2936      1.223    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2937      1.223    bouyer 
   2938        1.1  augustss 	/* XXX Wasteful. */
   2939       1.63  augustss 	if (xfer->pipe->repeat) {
   2940       1.55  augustss 		uhci_soft_td_t *data, *dataend;
   2941        1.1  augustss 
   2942       1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   2943       1.92  augustss 
   2944        1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   2945      1.221  jmcneill 		uhci_alloc_std_chain(upipe, sc, xfer->length,
   2946      1.221  jmcneill 				     upipe->u.intr.isread, xfer->flags,
   2947       1.63  augustss 				     &xfer->dmabuf, &data, &dataend);
   2948       1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2949      1.223    bouyer 		usb_syncmem(&dataend->dma,
   2950      1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_status),
   2951      1.223    bouyer 		    sizeof(dataend->td.td_status),
   2952      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2953        1.1  augustss 
   2954       1.59  augustss #ifdef UHCI_DEBUG
   2955        1.1  augustss 		if (uhcidebug > 10) {
   2956       1.55  augustss 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   2957       1.55  augustss 			uhci_dump_tds(data);
   2958        1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   2959        1.1  augustss 		}
   2960        1.1  augustss #endif
   2961        1.1  augustss 
   2962       1.55  augustss 		ii->stdstart = data;
   2963       1.55  augustss 		ii->stdend = dataend;
   2964        1.7  augustss #ifdef DIAGNOSTIC
   2965       1.70  augustss 		if (!ii->isdone) {
   2966       1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   2967       1.70  augustss 		}
   2968        1.7  augustss 		ii->isdone = 0;
   2969        1.7  augustss #endif
   2970        1.1  augustss 		for (i = 0; i < npoll; i++) {
   2971        1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   2972       1.55  augustss 			sqh->elink = data;
   2973      1.121  augustss 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2974      1.223    bouyer 			usb_syncmem(&sqh->dma,
   2975      1.223    bouyer 			    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2976      1.223    bouyer 			    sizeof(sqh->qh.qh_elink),
   2977      1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2978        1.1  augustss 		}
   2979       1.92  augustss 		xfer->status = USBD_IN_PROGRESS;
   2980       1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   2981        1.1  augustss 	} else {
   2982       1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   2983      1.169  augustss 		if (uhci_active_intr_info(ii))
   2984      1.169  augustss 			uhci_del_intr_info(ii);
   2985        1.1  augustss 	}
   2986        1.1  augustss }
   2987        1.1  augustss 
   2988        1.1  augustss /* Deallocate request data structures */
   2989        1.1  augustss void
   2990      1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   2991        1.1  augustss {
   2992       1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2993        1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2994       1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2995      1.223    bouyer 	int len = UGETW(xfer->request.wLength);
   2996      1.223    bouyer 	int isread = (xfer->request.bmRequestType & UT_READ);
   2997        1.1  augustss 
   2998        1.7  augustss #ifdef DIAGNOSTIC
   2999       1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3000      1.173      gson 		panic("uhci_device_ctrl_done: not a request");
   3001        1.7  augustss #endif
   3002        1.1  augustss 
   3003      1.169  augustss 	if (!uhci_active_intr_info(ii))
   3004      1.169  augustss 		return;
   3005      1.169  augustss 
   3006       1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3007        1.1  augustss 
   3008      1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   3009      1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   3010      1.123  augustss 	else
   3011      1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   3012        1.1  augustss 
   3013       1.49  augustss 	if (upipe->u.ctl.length != 0)
   3014       1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   3015       1.49  augustss 
   3016      1.223    bouyer 	if (len) {
   3017      1.223    bouyer 		usb_syncmem(&xfer->dmabuf, 0, len,
   3018      1.223    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3019      1.223    bouyer 	}
   3020      1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0,
   3021      1.223    bouyer 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3022      1.223    bouyer 
   3023      1.173      gson 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
   3024        1.1  augustss }
   3025        1.1  augustss 
   3026        1.1  augustss /* Deallocate request data structures */
   3027        1.1  augustss void
   3028      1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   3029        1.1  augustss {
   3030       1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3031        1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3032       1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3033      1.169  augustss 
   3034      1.173      gson 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
   3035      1.169  augustss 		    xfer, ii, sc, upipe));
   3036      1.169  augustss 
   3037      1.169  augustss 	if (!uhci_active_intr_info(ii))
   3038      1.169  augustss 		return;
   3039        1.1  augustss 
   3040       1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3041        1.1  augustss 
   3042        1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   3043       1.32  augustss 
   3044      1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3045       1.32  augustss 
   3046      1.173      gson 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
   3047        1.1  augustss }
   3048        1.1  augustss 
   3049        1.1  augustss /* Add interrupt QH, called with vflock. */
   3050        1.1  augustss void
   3051      1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3052        1.1  augustss {
   3053       1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3054       1.42  augustss 	uhci_soft_qh_t *eqh;
   3055        1.1  augustss 
   3056       1.92  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3057       1.92  augustss 
   3058       1.42  augustss 	eqh = vf->eqh;
   3059      1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3060      1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3061      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   3062       1.42  augustss 	sqh->hlink       = eqh->hlink;
   3063       1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3064      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3065      1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3066      1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3067       1.42  augustss 	eqh->hlink       = sqh;
   3068      1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3069      1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3070      1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3071      1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3072        1.1  augustss 	vf->eqh = sqh;
   3073        1.1  augustss 	vf->bandwidth++;
   3074        1.1  augustss }
   3075        1.1  augustss 
   3076      1.119  augustss /* Remove interrupt QH. */
   3077        1.1  augustss void
   3078      1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3079        1.1  augustss {
   3080       1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3081        1.1  augustss 	uhci_soft_qh_t *pqh;
   3082        1.1  augustss 
   3083       1.92  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3084        1.1  augustss 
   3085      1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   3086      1.223    bouyer 
   3087      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3088      1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   3089      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3090      1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3091      1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3092      1.223    bouyer 		usb_syncmem(&sqh->dma,
   3093      1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3094      1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3095      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3096      1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   3097      1.124  augustss 	}
   3098      1.124  augustss 
   3099       1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3100      1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3101      1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3102      1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3103       1.42  augustss 	pqh->hlink       = sqh->hlink;
   3104       1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3105      1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3106      1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   3107      1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3108      1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   3109        1.1  augustss 	if (vf->eqh == sqh)
   3110        1.1  augustss 		vf->eqh = pqh;
   3111        1.1  augustss 	vf->bandwidth--;
   3112        1.1  augustss }
   3113        1.1  augustss 
   3114        1.1  augustss usbd_status
   3115      1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3116        1.1  augustss {
   3117        1.1  augustss 	uhci_soft_qh_t *sqh;
   3118        1.1  augustss 	int i, npoll, s;
   3119        1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   3120        1.1  augustss 
   3121      1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
   3122        1.1  augustss 	if (ival == 0) {
   3123      1.173      gson 		printf("uhci_device_setintr: 0 interval\n");
   3124        1.1  augustss 		return (USBD_INVAL);
   3125        1.1  augustss 	}
   3126        1.1  augustss 
   3127        1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   3128        1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   3129        1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3130      1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
   3131        1.1  augustss 
   3132        1.1  augustss 	upipe->u.intr.npoll = npoll;
   3133      1.152  augustss 	upipe->u.intr.qhs =
   3134       1.31  augustss 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
   3135        1.1  augustss 
   3136      1.152  augustss 	/*
   3137        1.1  augustss 	 * Figure out which offset in the schedule that has most
   3138        1.1  augustss 	 * bandwidth left over.
   3139        1.1  augustss 	 */
   3140        1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3141        1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3142        1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   3143        1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3144        1.1  augustss 		if (bw < bestbw) {
   3145        1.1  augustss 			bestbw = bw;
   3146        1.1  augustss 			bestoffs = offs;
   3147        1.1  augustss 		}
   3148        1.1  augustss 	}
   3149      1.173      gson 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   3150        1.1  augustss 
   3151        1.1  augustss 	for(i = 0; i < npoll; i++) {
   3152        1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3153      1.121  augustss 		sqh->elink = NULL;
   3154       1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3155      1.223    bouyer 		usb_syncmem(&sqh->dma,
   3156      1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3157      1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3158      1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3159        1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   3160        1.1  augustss 	}
   3161        1.1  augustss #undef MOD
   3162        1.1  augustss 
   3163        1.1  augustss 	s = splusb();
   3164        1.1  augustss 	/* Enter QHs into the controller data structures. */
   3165        1.1  augustss 	for(i = 0; i < npoll; i++)
   3166       1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   3167       1.92  augustss 	splx(s);
   3168        1.1  augustss 
   3169      1.173      gson 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
   3170        1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3171        1.1  augustss }
   3172        1.1  augustss 
   3173        1.1  augustss /* Open a new pipe. */
   3174        1.1  augustss usbd_status
   3175      1.119  augustss uhci_open(usbd_pipe_handle pipe)
   3176        1.1  augustss {
   3177      1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3178        1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3179        1.1  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   3180       1.63  augustss 	usbd_status err;
   3181       1.79  augustss 	int ival;
   3182        1.1  augustss 
   3183        1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   3184      1.152  augustss 		     pipe, pipe->device->address,
   3185        1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   3186       1.92  augustss 
   3187       1.92  augustss 	upipe->aborting = 0;
   3188  1.232.2.3     rmind 	/* toggle state needed for bulk endpoints */
   3189  1.232.2.3     rmind 	upipe->nexttoggle = pipe->endpoint->datatoggle;
   3190       1.92  augustss 
   3191        1.1  augustss 	if (pipe->device->address == sc->sc_addr) {
   3192        1.1  augustss 		switch (ed->bEndpointAddress) {
   3193        1.1  augustss 		case USB_CONTROL_ENDPOINT:
   3194        1.1  augustss 			pipe->methods = &uhci_root_ctrl_methods;
   3195        1.1  augustss 			break;
   3196       1.45  augustss 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   3197        1.1  augustss 			pipe->methods = &uhci_root_intr_methods;
   3198        1.1  augustss 			break;
   3199        1.1  augustss 		default:
   3200        1.1  augustss 			return (USBD_INVAL);
   3201        1.1  augustss 		}
   3202        1.1  augustss 	} else {
   3203        1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3204        1.1  augustss 		case UE_CONTROL:
   3205        1.1  augustss 			pipe->methods = &uhci_device_ctrl_methods;
   3206        1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   3207       1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   3208        1.5  augustss 				goto bad;
   3209        1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   3210       1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   3211        1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3212        1.5  augustss 				goto bad;
   3213        1.5  augustss 			}
   3214        1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   3215       1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   3216        1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3217        1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3218        1.5  augustss 				goto bad;
   3219        1.5  augustss 			}
   3220      1.152  augustss 			err = usb_allocmem(&sc->sc_bus,
   3221      1.152  augustss 				  sizeof(usb_device_request_t),
   3222       1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   3223       1.63  augustss 			if (err) {
   3224        1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3225        1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3226        1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   3227        1.5  augustss 				goto bad;
   3228        1.5  augustss 			}
   3229        1.1  augustss 			break;
   3230        1.1  augustss 		case UE_INTERRUPT:
   3231        1.1  augustss 			pipe->methods = &uhci_device_intr_methods;
   3232       1.79  augustss 			ival = pipe->interval;
   3233       1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   3234       1.79  augustss 				ival = ed->bInterval;
   3235       1.80  augustss 			return (uhci_device_setintr(sc, upipe, ival));
   3236        1.1  augustss 		case UE_ISOCHRONOUS:
   3237       1.16  augustss 			pipe->methods = &uhci_device_isoc_methods;
   3238       1.48  augustss 			return (uhci_setup_isoc(pipe));
   3239        1.1  augustss 		case UE_BULK:
   3240        1.1  augustss 			pipe->methods = &uhci_device_bulk_methods;
   3241        1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   3242       1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   3243        1.5  augustss 				goto bad;
   3244        1.1  augustss 			break;
   3245        1.1  augustss 		}
   3246        1.1  augustss 	}
   3247        1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3248        1.5  augustss 
   3249        1.5  augustss  bad:
   3250        1.5  augustss 	return (USBD_NOMEM);
   3251        1.1  augustss }
   3252        1.1  augustss 
   3253        1.1  augustss /*
   3254        1.1  augustss  * Data structures and routines to emulate the root hub.
   3255        1.1  augustss  */
   3256        1.1  augustss usb_device_descriptor_t uhci_devd = {
   3257        1.1  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   3258        1.1  augustss 	UDESC_DEVICE,		/* type */
   3259        1.1  augustss 	{0x00, 0x01},		/* USB version */
   3260       1.87  augustss 	UDCLASS_HUB,		/* class */
   3261       1.87  augustss 	UDSUBCLASS_HUB,		/* subclass */
   3262      1.144  augustss 	UDPROTO_FSHUB,		/* protocol */
   3263        1.1  augustss 	64,			/* max packet */
   3264        1.1  augustss 	{0},{0},{0x00,0x01},	/* device id */
   3265        1.1  augustss 	1,2,0,			/* string indicies */
   3266        1.1  augustss 	1			/* # of configurations */
   3267        1.1  augustss };
   3268        1.1  augustss 
   3269      1.208  drochner const usb_config_descriptor_t uhci_confd = {
   3270        1.1  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   3271        1.1  augustss 	UDESC_CONFIG,
   3272        1.1  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   3273        1.1  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   3274        1.1  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   3275        1.1  augustss 	1,
   3276        1.1  augustss 	1,
   3277        1.1  augustss 	0,
   3278      1.206  drochner 	UC_ATTR_MBO | UC_SELF_POWERED,
   3279        1.1  augustss 	0			/* max power */
   3280        1.1  augustss };
   3281        1.1  augustss 
   3282      1.208  drochner const usb_interface_descriptor_t uhci_ifcd = {
   3283        1.1  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   3284        1.1  augustss 	UDESC_INTERFACE,
   3285        1.1  augustss 	0,
   3286        1.1  augustss 	0,
   3287        1.1  augustss 	1,
   3288       1.87  augustss 	UICLASS_HUB,
   3289       1.87  augustss 	UISUBCLASS_HUB,
   3290      1.144  augustss 	UIPROTO_FSHUB,
   3291        1.1  augustss 	0
   3292        1.1  augustss };
   3293        1.1  augustss 
   3294      1.208  drochner const usb_endpoint_descriptor_t uhci_endpd = {
   3295        1.1  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   3296        1.1  augustss 	UDESC_ENDPOINT,
   3297       1.45  augustss 	UE_DIR_IN | UHCI_INTR_ENDPT,
   3298        1.1  augustss 	UE_INTERRUPT,
   3299        1.1  augustss 	{8},
   3300        1.1  augustss 	255
   3301        1.1  augustss };
   3302        1.1  augustss 
   3303      1.208  drochner const usb_hub_descriptor_t uhci_hubd_piix = {
   3304        1.1  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   3305        1.1  augustss 	UDESC_HUB,
   3306        1.1  augustss 	2,
   3307        1.1  augustss 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   3308        1.1  augustss 	50,			/* power on to power good */
   3309        1.1  augustss 	0,
   3310        1.1  augustss 	{ 0x00 },		/* both ports are removable */
   3311      1.199  christos 	{ 0 },
   3312        1.1  augustss };
   3313        1.1  augustss 
   3314        1.1  augustss /*
   3315      1.166   dsainty  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3316      1.166   dsainty  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3317      1.166   dsainty  * should not be used by the USB subsystem.  As we cannot issue a
   3318      1.166   dsainty  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3319      1.166   dsainty  * will be enabled as part of the reset.
   3320      1.166   dsainty  *
   3321      1.166   dsainty  * On the VT83C572, the port cannot be successfully enabled until the
   3322      1.166   dsainty  * outstanding "port enable change" and "connection status change"
   3323      1.166   dsainty  * events have been reset.
   3324      1.166   dsainty  */
   3325      1.166   dsainty Static usbd_status
   3326      1.166   dsainty uhci_portreset(uhci_softc_t *sc, int index)
   3327      1.166   dsainty {
   3328      1.166   dsainty 	int lim, port, x;
   3329      1.166   dsainty 
   3330      1.166   dsainty 	if (index == 1)
   3331      1.166   dsainty 		port = UHCI_PORTSC1;
   3332      1.166   dsainty 	else if (index == 2)
   3333      1.166   dsainty 		port = UHCI_PORTSC2;
   3334      1.166   dsainty 	else
   3335      1.166   dsainty 		return (USBD_IOERROR);
   3336      1.166   dsainty 
   3337      1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3338      1.166   dsainty 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3339      1.166   dsainty 
   3340      1.166   dsainty 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3341      1.166   dsainty 
   3342      1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   3343      1.166   dsainty 		    index, UREAD2(sc, port)));
   3344      1.166   dsainty 
   3345      1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3346      1.222  drochner 	UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
   3347      1.166   dsainty 
   3348      1.166   dsainty 	delay(100);
   3349      1.166   dsainty 
   3350      1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3351      1.166   dsainty 		    index, UREAD2(sc, port)));
   3352      1.166   dsainty 
   3353      1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3354      1.166   dsainty 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3355      1.166   dsainty 
   3356      1.166   dsainty 	for (lim = 10; --lim > 0;) {
   3357      1.166   dsainty 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3358      1.166   dsainty 
   3359      1.166   dsainty 		x = UREAD2(sc, port);
   3360      1.166   dsainty 
   3361      1.166   dsainty 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3362      1.166   dsainty 			    index, lim, x));
   3363      1.166   dsainty 
   3364      1.166   dsainty 		if (!(x & UHCI_PORTSC_CCS)) {
   3365      1.166   dsainty 			/*
   3366      1.166   dsainty 			 * No device is connected (or was disconnected
   3367      1.166   dsainty 			 * during reset).  Consider the port reset.
   3368      1.166   dsainty 			 * The delay must be long enough to ensure on
   3369      1.166   dsainty 			 * the initial iteration that the device
   3370      1.166   dsainty 			 * connection will have been registered.  50ms
   3371      1.166   dsainty 			 * appears to be sufficient, but 20ms is not.
   3372      1.166   dsainty 			 */
   3373      1.166   dsainty 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3374      1.166   dsainty 				    index, lim));
   3375      1.166   dsainty 			break;
   3376      1.166   dsainty 		}
   3377      1.166   dsainty 
   3378      1.166   dsainty 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3379      1.166   dsainty 			/*
   3380      1.166   dsainty 			 * Port enabled changed and/or connection
   3381      1.166   dsainty 			 * status changed were set.  Reset either or
   3382      1.166   dsainty 			 * both raised flags (by writing a 1 to that
   3383      1.166   dsainty 			 * bit), and wait again for state to settle.
   3384      1.166   dsainty 			 */
   3385      1.166   dsainty 			UWRITE2(sc, port, URWMASK(x) |
   3386      1.166   dsainty 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3387      1.166   dsainty 			continue;
   3388      1.166   dsainty 		}
   3389      1.166   dsainty 
   3390      1.166   dsainty 		if (x & UHCI_PORTSC_PE)
   3391      1.166   dsainty 			/* Port is enabled */
   3392      1.166   dsainty 			break;
   3393      1.166   dsainty 
   3394      1.166   dsainty 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3395      1.166   dsainty 	}
   3396      1.166   dsainty 
   3397      1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3398      1.166   dsainty 		    index, UREAD2(sc, port)));
   3399      1.166   dsainty 
   3400      1.166   dsainty 	if (lim <= 0) {
   3401      1.166   dsainty 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3402      1.166   dsainty 		return (USBD_TIMEOUT);
   3403      1.166   dsainty 	}
   3404      1.184     perry 
   3405      1.166   dsainty 	sc->sc_isreset = 1;
   3406      1.166   dsainty 	return (USBD_NORMAL_COMPLETION);
   3407      1.166   dsainty }
   3408      1.166   dsainty 
   3409      1.166   dsainty /*
   3410        1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   3411        1.1  augustss  */
   3412        1.1  augustss usbd_status
   3413      1.119  augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3414        1.1  augustss {
   3415       1.63  augustss 	usbd_status err;
   3416       1.16  augustss 
   3417       1.52  augustss 	/* Insert last in queue. */
   3418       1.63  augustss 	err = usb_insert_transfer(xfer);
   3419       1.63  augustss 	if (err)
   3420       1.63  augustss 		return (err);
   3421       1.52  augustss 
   3422      1.152  augustss 	/*
   3423       1.94  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3424       1.94  augustss 	 * so start it first.
   3425       1.67  augustss 	 */
   3426       1.63  augustss 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3427       1.16  augustss }
   3428       1.16  augustss 
   3429       1.16  augustss usbd_status
   3430      1.119  augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3431       1.16  augustss {
   3432      1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3433        1.1  augustss 	usb_device_request_t *req;
   3434       1.59  augustss 	void *buf = NULL;
   3435        1.1  augustss 	int port, x;
   3436       1.52  augustss 	int s, len, value, index, status, change, l, totlen = 0;
   3437        1.1  augustss 	usb_port_status_t ps;
   3438       1.63  augustss 	usbd_status err;
   3439        1.1  augustss 
   3440       1.82  augustss 	if (sc->sc_dying)
   3441       1.82  augustss 		return (USBD_IOERROR);
   3442       1.82  augustss 
   3443       1.48  augustss #ifdef DIAGNOSTIC
   3444       1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3445      1.163    provos 		panic("uhci_root_ctrl_transfer: not a request");
   3446       1.48  augustss #endif
   3447       1.63  augustss 	req = &xfer->request;
   3448        1.1  augustss 
   3449      1.152  augustss 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3450        1.1  augustss 		    req->bmRequestType, req->bRequest));
   3451        1.1  augustss 
   3452        1.1  augustss 	len = UGETW(req->wLength);
   3453        1.1  augustss 	value = UGETW(req->wValue);
   3454        1.1  augustss 	index = UGETW(req->wIndex);
   3455       1.49  augustss 
   3456       1.49  augustss 	if (len != 0)
   3457      1.159  augustss 		buf = KERNADDR(&xfer->dmabuf, 0);
   3458       1.49  augustss 
   3459        1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3460        1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   3461        1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3462        1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3463        1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3464      1.152  augustss 		/*
   3465       1.13  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3466        1.1  augustss 		 * for the integrated root hub.
   3467        1.1  augustss 		 */
   3468        1.1  augustss 		break;
   3469        1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3470        1.1  augustss 		if (len > 0) {
   3471        1.1  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   3472        1.1  augustss 			totlen = 1;
   3473        1.1  augustss 		}
   3474        1.1  augustss 		break;
   3475        1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3476        1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3477      1.195  christos 		if (len == 0)
   3478      1.195  christos 			break;
   3479        1.1  augustss 		switch(value >> 8) {
   3480        1.1  augustss 		case UDESC_DEVICE:
   3481        1.1  augustss 			if ((value & 0xff) != 0) {
   3482       1.63  augustss 				err = USBD_IOERROR;
   3483        1.1  augustss 				goto ret;
   3484        1.1  augustss 			}
   3485        1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3486       1.27  augustss 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3487        1.1  augustss 			memcpy(buf, &uhci_devd, l);
   3488        1.1  augustss 			break;
   3489        1.1  augustss 		case UDESC_CONFIG:
   3490        1.1  augustss 			if ((value & 0xff) != 0) {
   3491       1.63  augustss 				err = USBD_IOERROR;
   3492        1.1  augustss 				goto ret;
   3493        1.1  augustss 			}
   3494        1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3495        1.1  augustss 			memcpy(buf, &uhci_confd, l);
   3496        1.1  augustss 			buf = (char *)buf + l;
   3497        1.1  augustss 			len -= l;
   3498        1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3499        1.1  augustss 			totlen += l;
   3500        1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   3501        1.1  augustss 			buf = (char *)buf + l;
   3502        1.1  augustss 			len -= l;
   3503        1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3504        1.1  augustss 			totlen += l;
   3505        1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   3506        1.1  augustss 			break;
   3507        1.1  augustss 		case UDESC_STRING:
   3508      1.213  drochner #define sd ((usb_string_descriptor_t *)buf)
   3509        1.1  augustss 			switch (value & 0xff) {
   3510      1.182  augustss 			case 0: /* Language table */
   3511      1.213  drochner 				totlen = usb_makelangtbl(sd, len);
   3512      1.182  augustss 				break;
   3513        1.1  augustss 			case 1: /* Vendor */
   3514      1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3515      1.213  drochner 							 sc->sc_vendor);
   3516        1.1  augustss 				break;
   3517        1.1  augustss 			case 2: /* Product */
   3518      1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3519      1.213  drochner 							 "UHCI root hub");
   3520        1.1  augustss 				break;
   3521        1.1  augustss 			}
   3522      1.213  drochner #undef sd
   3523        1.1  augustss 			break;
   3524        1.1  augustss 		default:
   3525       1.63  augustss 			err = USBD_IOERROR;
   3526        1.1  augustss 			goto ret;
   3527        1.1  augustss 		}
   3528        1.1  augustss 		break;
   3529        1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3530        1.1  augustss 		if (len > 0) {
   3531        1.1  augustss 			*(u_int8_t *)buf = 0;
   3532        1.1  augustss 			totlen = 1;
   3533        1.1  augustss 		}
   3534        1.1  augustss 		break;
   3535        1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3536        1.1  augustss 		if (len > 1) {
   3537        1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3538        1.1  augustss 			totlen = 2;
   3539        1.1  augustss 		}
   3540        1.1  augustss 		break;
   3541        1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3542        1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3543        1.1  augustss 		if (len > 1) {
   3544        1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3545        1.1  augustss 			totlen = 2;
   3546        1.1  augustss 		}
   3547        1.1  augustss 		break;
   3548        1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3549        1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   3550       1.63  augustss 			err = USBD_IOERROR;
   3551        1.1  augustss 			goto ret;
   3552        1.1  augustss 		}
   3553        1.1  augustss 		sc->sc_addr = value;
   3554        1.1  augustss 		break;
   3555        1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3556        1.1  augustss 		if (value != 0 && value != 1) {
   3557       1.63  augustss 			err = USBD_IOERROR;
   3558        1.1  augustss 			goto ret;
   3559        1.1  augustss 		}
   3560        1.1  augustss 		sc->sc_conf = value;
   3561        1.1  augustss 		break;
   3562        1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3563        1.1  augustss 		break;
   3564        1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3565        1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3566        1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3567       1.63  augustss 		err = USBD_IOERROR;
   3568        1.1  augustss 		goto ret;
   3569        1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3570        1.1  augustss 		break;
   3571        1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3572        1.1  augustss 		break;
   3573        1.1  augustss 	/* Hub requests */
   3574        1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3575        1.1  augustss 		break;
   3576        1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3577       1.12  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3578       1.12  augustss 			     "port=%d feature=%d\n",
   3579        1.1  augustss 			     index, value));
   3580        1.1  augustss 		if (index == 1)
   3581        1.1  augustss 			port = UHCI_PORTSC1;
   3582        1.1  augustss 		else if (index == 2)
   3583        1.1  augustss 			port = UHCI_PORTSC2;
   3584        1.1  augustss 		else {
   3585       1.63  augustss 			err = USBD_IOERROR;
   3586        1.1  augustss 			goto ret;
   3587        1.1  augustss 		}
   3588        1.1  augustss 		switch(value) {
   3589        1.1  augustss 		case UHF_PORT_ENABLE:
   3590      1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3591        1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3592        1.1  augustss 			break;
   3593        1.1  augustss 		case UHF_PORT_SUSPEND:
   3594      1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3595      1.222  drochner 			if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
   3596      1.222  drochner 				break;
   3597      1.222  drochner 			UWRITE2(sc, port, x | UHCI_PORTSC_RD);
   3598      1.222  drochner 			/* see USB2 spec ch. 7.1.7.7 */
   3599      1.222  drochner 			usb_delay_ms(&sc->sc_bus, 20);
   3600        1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3601      1.222  drochner 			/* 10ms resume delay must be provided by caller */
   3602        1.1  augustss 			break;
   3603        1.1  augustss 		case UHF_PORT_RESET:
   3604      1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3605        1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3606        1.1  augustss 			break;
   3607        1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3608      1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3609        1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3610        1.1  augustss 			break;
   3611        1.1  augustss 		case UHF_C_PORT_ENABLE:
   3612      1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3613        1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3614        1.1  augustss 			break;
   3615        1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3616      1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3617        1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3618        1.1  augustss 			break;
   3619        1.1  augustss 		case UHF_C_PORT_RESET:
   3620        1.1  augustss 			sc->sc_isreset = 0;
   3621       1.63  augustss 			err = USBD_NORMAL_COMPLETION;
   3622        1.1  augustss 			goto ret;
   3623        1.1  augustss 		case UHF_PORT_CONNECTION:
   3624        1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3625        1.1  augustss 		case UHF_PORT_POWER:
   3626        1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3627        1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3628        1.1  augustss 		default:
   3629       1.63  augustss 			err = USBD_IOERROR;
   3630        1.1  augustss 			goto ret;
   3631        1.1  augustss 		}
   3632        1.1  augustss 		break;
   3633        1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3634        1.1  augustss 		if (index == 1)
   3635        1.1  augustss 			port = UHCI_PORTSC1;
   3636        1.1  augustss 		else if (index == 2)
   3637        1.1  augustss 			port = UHCI_PORTSC2;
   3638        1.1  augustss 		else {
   3639       1.63  augustss 			err = USBD_IOERROR;
   3640        1.1  augustss 			goto ret;
   3641        1.1  augustss 		}
   3642        1.1  augustss 		if (len > 0) {
   3643      1.152  augustss 			*(u_int8_t *)buf =
   3644        1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3645        1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   3646        1.1  augustss 			totlen = 1;
   3647        1.1  augustss 		}
   3648        1.1  augustss 		break;
   3649        1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3650      1.195  christos 		if (len == 0)
   3651      1.195  christos 			break;
   3652      1.177    toshii 		if ((value & 0xff) != 0) {
   3653       1.63  augustss 			err = USBD_IOERROR;
   3654        1.1  augustss 			goto ret;
   3655        1.1  augustss 		}
   3656        1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3657        1.1  augustss 		totlen = l;
   3658        1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   3659        1.1  augustss 		break;
   3660        1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3661        1.1  augustss 		if (len != 4) {
   3662       1.63  augustss 			err = USBD_IOERROR;
   3663        1.1  augustss 			goto ret;
   3664        1.1  augustss 		}
   3665        1.1  augustss 		memset(buf, 0, len);
   3666        1.1  augustss 		totlen = len;
   3667        1.1  augustss 		break;
   3668        1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3669        1.1  augustss 		if (index == 1)
   3670        1.1  augustss 			port = UHCI_PORTSC1;
   3671        1.1  augustss 		else if (index == 2)
   3672        1.1  augustss 			port = UHCI_PORTSC2;
   3673        1.1  augustss 		else {
   3674       1.63  augustss 			err = USBD_IOERROR;
   3675        1.1  augustss 			goto ret;
   3676        1.1  augustss 		}
   3677        1.1  augustss 		if (len != 4) {
   3678       1.63  augustss 			err = USBD_IOERROR;
   3679        1.1  augustss 			goto ret;
   3680        1.1  augustss 		}
   3681        1.1  augustss 		x = UREAD2(sc, port);
   3682        1.1  augustss 		status = change = 0;
   3683      1.142  augustss 		if (x & UHCI_PORTSC_CCS)
   3684        1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   3685      1.152  augustss 		if (x & UHCI_PORTSC_CSC)
   3686        1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   3687      1.152  augustss 		if (x & UHCI_PORTSC_PE)
   3688        1.1  augustss 			status |= UPS_PORT_ENABLED;
   3689      1.152  augustss 		if (x & UHCI_PORTSC_POEDC)
   3690        1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   3691      1.152  augustss 		if (x & UHCI_PORTSC_OCI)
   3692        1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   3693      1.152  augustss 		if (x & UHCI_PORTSC_OCIC)
   3694        1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3695      1.152  augustss 		if (x & UHCI_PORTSC_SUSP)
   3696        1.1  augustss 			status |= UPS_SUSPEND;
   3697      1.152  augustss 		if (x & UHCI_PORTSC_LSDA)
   3698        1.1  augustss 			status |= UPS_LOW_SPEED;
   3699        1.1  augustss 		status |= UPS_PORT_POWER;
   3700        1.1  augustss 		if (sc->sc_isreset)
   3701        1.1  augustss 			change |= UPS_C_PORT_RESET;
   3702        1.1  augustss 		USETW(ps.wPortStatus, status);
   3703        1.1  augustss 		USETW(ps.wPortChange, change);
   3704        1.1  augustss 		l = min(len, sizeof ps);
   3705        1.1  augustss 		memcpy(buf, &ps, l);
   3706        1.1  augustss 		totlen = l;
   3707        1.1  augustss 		break;
   3708        1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3709       1.63  augustss 		err = USBD_IOERROR;
   3710        1.1  augustss 		goto ret;
   3711        1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3712        1.1  augustss 		break;
   3713        1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3714        1.1  augustss 		if (index == 1)
   3715        1.1  augustss 			port = UHCI_PORTSC1;
   3716        1.1  augustss 		else if (index == 2)
   3717        1.1  augustss 			port = UHCI_PORTSC2;
   3718        1.1  augustss 		else {
   3719       1.63  augustss 			err = USBD_IOERROR;
   3720        1.1  augustss 			goto ret;
   3721        1.1  augustss 		}
   3722        1.1  augustss 		switch(value) {
   3723        1.1  augustss 		case UHF_PORT_ENABLE:
   3724      1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3725        1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3726        1.1  augustss 			break;
   3727        1.1  augustss 		case UHF_PORT_SUSPEND:
   3728      1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3729        1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3730        1.1  augustss 			break;
   3731        1.1  augustss 		case UHF_PORT_RESET:
   3732      1.166   dsainty 			err = uhci_portreset(sc, index);
   3733      1.166   dsainty 			goto ret;
   3734      1.111  augustss 		case UHF_PORT_POWER:
   3735      1.111  augustss 			/* Pretend we turned on power */
   3736      1.115   mycroft 			err = USBD_NORMAL_COMPLETION;
   3737      1.111  augustss 			goto ret;
   3738        1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3739        1.1  augustss 		case UHF_C_PORT_ENABLE:
   3740        1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3741        1.1  augustss 		case UHF_PORT_CONNECTION:
   3742        1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3743        1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3744        1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3745        1.1  augustss 		case UHF_C_PORT_RESET:
   3746        1.1  augustss 		default:
   3747       1.63  augustss 			err = USBD_IOERROR;
   3748        1.1  augustss 			goto ret;
   3749        1.1  augustss 		}
   3750        1.1  augustss 		break;
   3751        1.1  augustss 	default:
   3752       1.63  augustss 		err = USBD_IOERROR;
   3753        1.1  augustss 		goto ret;
   3754        1.1  augustss 	}
   3755       1.63  augustss 	xfer->actlen = totlen;
   3756       1.63  augustss 	err = USBD_NORMAL_COMPLETION;
   3757        1.1  augustss  ret:
   3758       1.63  augustss 	xfer->status = err;
   3759       1.52  augustss 	s = splusb();
   3760       1.63  augustss 	usb_transfer_complete(xfer);
   3761       1.52  augustss 	splx(s);
   3762        1.1  augustss 	return (USBD_IN_PROGRESS);
   3763        1.1  augustss }
   3764        1.1  augustss 
   3765        1.1  augustss /* Abort a root control request. */
   3766        1.1  augustss void
   3767      1.205  christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3768        1.1  augustss {
   3769       1.70  augustss 	/* Nothing to do, all transfers are synchronous. */
   3770        1.1  augustss }
   3771        1.1  augustss 
   3772        1.1  augustss /* Close the root pipe. */
   3773        1.1  augustss void
   3774      1.205  christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3775        1.1  augustss {
   3776        1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   3777        1.1  augustss }
   3778        1.1  augustss 
   3779        1.1  augustss /* Abort a root interrupt request. */
   3780        1.1  augustss void
   3781      1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   3782        1.1  augustss {
   3783      1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3784       1.30  augustss 
   3785  1.232.2.2     rmind 	callout_stop(&sc->sc_poll_handle);
   3786       1.96  augustss 	sc->sc_intr_xfer = NULL;
   3787       1.58  augustss 
   3788       1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3789       1.58  augustss 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   3790       1.63  augustss 		xfer->pipe->intrxfer = 0;
   3791       1.58  augustss 	}
   3792       1.63  augustss 	xfer->status = USBD_CANCELLED;
   3793       1.96  augustss #ifdef DIAGNOSTIC
   3794       1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3795       1.96  augustss #endif
   3796       1.63  augustss 	usb_transfer_complete(xfer);
   3797        1.1  augustss }
   3798        1.1  augustss 
   3799       1.16  augustss usbd_status
   3800      1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3801       1.16  augustss {
   3802       1.63  augustss 	usbd_status err;
   3803       1.16  augustss 
   3804       1.52  augustss 	/* Insert last in queue. */
   3805       1.63  augustss 	err = usb_insert_transfer(xfer);
   3806       1.63  augustss 	if (err)
   3807       1.63  augustss 		return (err);
   3808       1.52  augustss 
   3809      1.186     skrll 	/*
   3810      1.186     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3811       1.67  augustss 	 * start first
   3812       1.67  augustss 	 */
   3813       1.63  augustss 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3814       1.16  augustss }
   3815       1.16  augustss 
   3816        1.1  augustss /* Start a transfer on the root interrupt pipe */
   3817        1.1  augustss usbd_status
   3818      1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   3819        1.1  augustss {
   3820       1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   3821      1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3822      1.174  drochner 	unsigned int ival;
   3823        1.1  augustss 
   3824      1.173      gson 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
   3825       1.63  augustss 		     xfer, xfer->length, xfer->flags));
   3826       1.82  augustss 
   3827       1.82  augustss 	if (sc->sc_dying)
   3828       1.82  augustss 		return (USBD_IOERROR);
   3829        1.1  augustss 
   3830      1.174  drochner 	/* XXX temporary variable needed to avoid gcc3 warning */
   3831      1.174  drochner 	ival = xfer->pipe->endpoint->edesc->bInterval;
   3832      1.174  drochner 	sc->sc_ival = mstohz(ival);
   3833  1.232.2.2     rmind 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3834       1.96  augustss 	sc->sc_intr_xfer = xfer;
   3835        1.1  augustss 	return (USBD_IN_PROGRESS);
   3836        1.1  augustss }
   3837        1.1  augustss 
   3838        1.1  augustss /* Close the root interrupt pipe. */
   3839        1.1  augustss void
   3840      1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   3841        1.1  augustss {
   3842      1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3843       1.30  augustss 
   3844  1.232.2.2     rmind 	callout_stop(&sc->sc_poll_handle);
   3845       1.96  augustss 	sc->sc_intr_xfer = NULL;
   3846        1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   3847        1.1  augustss }
   3848