uhci.c revision 1.24.4.3 1 1.24.4.3 thorpej /* $NetBSD: uhci.c,v 1.24.4.3 1999/08/02 22:08:59 thorpej Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Universal Host Controller driver.
42 1.24.4.1 thorpej * Handles e.g. PIIX3 and PIIX4.
43 1.1 augustss *
44 1.1 augustss * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
45 1.1 augustss * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
46 1.1 augustss * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf
47 1.24.4.1 thorpej * USB spec: http://www.usb.org/developers/data/usb11.pdf
48 1.1 augustss */
49 1.1 augustss
50 1.1 augustss #include <sys/param.h>
51 1.1 augustss #include <sys/systm.h>
52 1.1 augustss #include <sys/kernel.h>
53 1.1 augustss #include <sys/malloc.h>
54 1.13 augustss #if defined(__NetBSD__)
55 1.1 augustss #include <sys/device.h>
56 1.13 augustss #elif defined(__FreeBSD__)
57 1.13 augustss #include <sys/module.h>
58 1.13 augustss #include <sys/bus.h>
59 1.13 augustss #endif
60 1.1 augustss #include <sys/proc.h>
61 1.1 augustss #include <sys/queue.h>
62 1.1 augustss #include <sys/select.h>
63 1.1 augustss
64 1.7 augustss #include <machine/bus.h>
65 1.7 augustss
66 1.1 augustss #include <dev/usb/usb.h>
67 1.1 augustss #include <dev/usb/usbdi.h>
68 1.1 augustss #include <dev/usb/usbdivar.h>
69 1.7 augustss #include <dev/usb/usb_mem.h>
70 1.1 augustss #include <dev/usb/usb_quirks.h>
71 1.1 augustss
72 1.1 augustss #include <dev/usb/uhcireg.h>
73 1.1 augustss #include <dev/usb/uhcivar.h>
74 1.1 augustss
75 1.13 augustss #if defined(__FreeBSD__)
76 1.13 augustss #include <machine/clock.h>
77 1.13 augustss
78 1.13 augustss #define delay(d) DELAY(d)
79 1.13 augustss #endif
80 1.13 augustss
81 1.1 augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
82 1.1 augustss
83 1.1 augustss struct uhci_pipe {
84 1.1 augustss struct usbd_pipe pipe;
85 1.1 augustss uhci_intr_info_t *iinfo;
86 1.24.4.3 thorpej int nexttoggle;
87 1.1 augustss /* Info needed for different pipe kinds. */
88 1.1 augustss union {
89 1.1 augustss /* Control pipe */
90 1.1 augustss struct {
91 1.1 augustss uhci_soft_qh_t *sqh;
92 1.7 augustss usb_dma_t reqdma;
93 1.7 augustss usb_dma_t datadma;
94 1.16 augustss uhci_soft_td_t *setup, *stat;
95 1.1 augustss u_int length;
96 1.1 augustss } ctl;
97 1.1 augustss /* Interrupt pipe */
98 1.1 augustss struct {
99 1.7 augustss usb_dma_t datadma;
100 1.1 augustss int npoll;
101 1.1 augustss uhci_soft_qh_t **qhs;
102 1.1 augustss } intr;
103 1.1 augustss /* Bulk pipe */
104 1.1 augustss struct {
105 1.1 augustss uhci_soft_qh_t *sqh;
106 1.7 augustss usb_dma_t datadma;
107 1.1 augustss u_int length;
108 1.1 augustss int isread;
109 1.1 augustss } bulk;
110 1.16 augustss /* Iso pipe */
111 1.16 augustss struct iso {
112 1.16 augustss u_int bufsize;
113 1.16 augustss u_int nbuf;
114 1.16 augustss usb_dma_t *bufs;
115 1.16 augustss uhci_soft_td_t **stds;
116 1.16 augustss } iso;
117 1.1 augustss } u;
118 1.1 augustss };
119 1.1 augustss
120 1.1 augustss /*
121 1.1 augustss * The uhci_intr_info free list can be global since they contain
122 1.1 augustss * no dma specific data. The other free lists do.
123 1.1 augustss */
124 1.1 augustss LIST_HEAD(, uhci_intr_info) uhci_ii_free;
125 1.1 augustss
126 1.1 augustss void uhci_busreset __P((uhci_softc_t *));
127 1.24.4.2 thorpej void uhci_power __P((int, void *));
128 1.16 augustss usbd_status uhci_run __P((uhci_softc_t *, int run));
129 1.1 augustss uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *));
130 1.1 augustss void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *));
131 1.1 augustss uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *));
132 1.1 augustss void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *));
133 1.1 augustss uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *));
134 1.1 augustss void uhci_free_intr_info __P((uhci_intr_info_t *ii));
135 1.16 augustss #if 0
136 1.1 augustss void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *,
137 1.1 augustss uhci_intr_info_t *));
138 1.1 augustss void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *));
139 1.16 augustss #endif
140 1.1 augustss
141 1.1 augustss void uhci_free_std_chain __P((uhci_softc_t *,
142 1.1 augustss uhci_soft_td_t *, uhci_soft_td_t *));
143 1.1 augustss usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *,
144 1.18 augustss int, int, int, usb_dma_t *,
145 1.1 augustss uhci_soft_td_t **,
146 1.1 augustss uhci_soft_td_t **));
147 1.1 augustss void uhci_timo __P((void *));
148 1.1 augustss void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle));
149 1.1 augustss void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *));
150 1.1 augustss void uhci_ii_done __P((uhci_intr_info_t *, int));
151 1.1 augustss void uhci_timeout __P((void *));
152 1.1 augustss void uhci_wakeup_ctrl __P((void *, int, int, void *, int));
153 1.1 augustss void uhci_lock_frames __P((uhci_softc_t *));
154 1.1 augustss void uhci_unlock_frames __P((uhci_softc_t *));
155 1.1 augustss void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
156 1.1 augustss void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
157 1.1 augustss void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
158 1.1 augustss void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
159 1.1 augustss int uhci_str __P((usb_string_descriptor_t *, int, char *));
160 1.1 augustss
161 1.1 augustss void uhci_wakeup_cb __P((usbd_request_handle reqh));
162 1.1 augustss
163 1.1 augustss usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle));
164 1.16 augustss usbd_status uhci_device_ctrl_start __P((usbd_request_handle));
165 1.1 augustss void uhci_device_ctrl_abort __P((usbd_request_handle));
166 1.1 augustss void uhci_device_ctrl_close __P((usbd_pipe_handle));
167 1.1 augustss usbd_status uhci_device_intr_transfer __P((usbd_request_handle));
168 1.16 augustss usbd_status uhci_device_intr_start __P((usbd_request_handle));
169 1.1 augustss void uhci_device_intr_abort __P((usbd_request_handle));
170 1.1 augustss void uhci_device_intr_close __P((usbd_pipe_handle));
171 1.1 augustss usbd_status uhci_device_bulk_transfer __P((usbd_request_handle));
172 1.16 augustss usbd_status uhci_device_bulk_start __P((usbd_request_handle));
173 1.1 augustss void uhci_device_bulk_abort __P((usbd_request_handle));
174 1.1 augustss void uhci_device_bulk_close __P((usbd_pipe_handle));
175 1.16 augustss usbd_status uhci_device_isoc_transfer __P((usbd_request_handle));
176 1.16 augustss usbd_status uhci_device_isoc_start __P((usbd_request_handle));
177 1.16 augustss void uhci_device_isoc_abort __P((usbd_request_handle));
178 1.16 augustss void uhci_device_isoc_close __P((usbd_pipe_handle));
179 1.16 augustss usbd_status uhci_device_isoc_setbuf __P((usbd_pipe_handle, u_int, u_int));
180 1.1 augustss
181 1.1 augustss usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle));
182 1.16 augustss usbd_status uhci_root_ctrl_start __P((usbd_request_handle));
183 1.1 augustss void uhci_root_ctrl_abort __P((usbd_request_handle));
184 1.1 augustss void uhci_root_ctrl_close __P((usbd_pipe_handle));
185 1.1 augustss usbd_status uhci_root_intr_transfer __P((usbd_request_handle));
186 1.16 augustss usbd_status uhci_root_intr_start __P((usbd_request_handle));
187 1.1 augustss void uhci_root_intr_abort __P((usbd_request_handle));
188 1.1 augustss void uhci_root_intr_close __P((usbd_pipe_handle));
189 1.1 augustss
190 1.1 augustss usbd_status uhci_open __P((usbd_pipe_handle));
191 1.8 augustss void uhci_poll __P((struct usbd_bus *));
192 1.1 augustss
193 1.1 augustss usbd_status uhci_device_request __P((usbd_request_handle reqh));
194 1.1 augustss void uhci_ctrl_done __P((uhci_intr_info_t *ii));
195 1.1 augustss void uhci_bulk_done __P((uhci_intr_info_t *ii));
196 1.1 augustss
197 1.1 augustss void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
198 1.1 augustss void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
199 1.1 augustss usbd_status uhci_device_setintr __P((uhci_softc_t *sc,
200 1.1 augustss struct uhci_pipe *pipe, int ival));
201 1.1 augustss void uhci_intr_done __P((uhci_intr_info_t *ii));
202 1.16 augustss void uhci_isoc_done __P((uhci_intr_info_t *ii));
203 1.1 augustss
204 1.1 augustss #ifdef USB_DEBUG
205 1.1 augustss static void uhci_dumpregs __P((uhci_softc_t *));
206 1.1 augustss void uhci_dump_tds __P((uhci_soft_td_t *));
207 1.1 augustss void uhci_dump_qh __P((uhci_soft_qh_t *));
208 1.1 augustss void uhci_dump __P((void));
209 1.1 augustss void uhci_dump_td __P((uhci_soft_td_t *));
210 1.1 augustss #endif
211 1.1 augustss
212 1.13 augustss #if defined(__NetBSD__)
213 1.1 augustss #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
214 1.1 augustss #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
215 1.1 augustss #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
216 1.1 augustss #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
217 1.13 augustss #elif defined(__FreeBSD__)
218 1.13 augustss #define UWRITE2(sc,r,x) outw((sc)->sc_iobase + (r), (x))
219 1.13 augustss #define UWRITE4(sc,r,x) outl((sc)->sc_iobase + (r), (x))
220 1.13 augustss #define UREAD2(sc,r) inw((sc)->sc_iobase + (r))
221 1.13 augustss #define UREAD4(sc,r) inl((sc)->sc_iobase + (r))
222 1.13 augustss #endif
223 1.1 augustss
224 1.1 augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
225 1.1 augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
226 1.1 augustss
227 1.1 augustss #define UHCI_RESET_TIMEOUT 100 /* reset timeout */
228 1.1 augustss
229 1.1 augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
230 1.1 augustss
231 1.1 augustss #define UHCI_INTR_ENDPT 1
232 1.1 augustss
233 1.1 augustss struct usbd_methods uhci_root_ctrl_methods = {
234 1.1 augustss uhci_root_ctrl_transfer,
235 1.16 augustss uhci_root_ctrl_start,
236 1.1 augustss uhci_root_ctrl_abort,
237 1.1 augustss uhci_root_ctrl_close,
238 1.10 augustss 0,
239 1.1 augustss };
240 1.1 augustss
241 1.1 augustss struct usbd_methods uhci_root_intr_methods = {
242 1.1 augustss uhci_root_intr_transfer,
243 1.16 augustss uhci_root_intr_start,
244 1.1 augustss uhci_root_intr_abort,
245 1.1 augustss uhci_root_intr_close,
246 1.10 augustss 0,
247 1.1 augustss };
248 1.1 augustss
249 1.1 augustss struct usbd_methods uhci_device_ctrl_methods = {
250 1.1 augustss uhci_device_ctrl_transfer,
251 1.16 augustss uhci_device_ctrl_start,
252 1.1 augustss uhci_device_ctrl_abort,
253 1.1 augustss uhci_device_ctrl_close,
254 1.10 augustss 0,
255 1.1 augustss };
256 1.1 augustss
257 1.1 augustss struct usbd_methods uhci_device_intr_methods = {
258 1.1 augustss uhci_device_intr_transfer,
259 1.16 augustss uhci_device_intr_start,
260 1.1 augustss uhci_device_intr_abort,
261 1.1 augustss uhci_device_intr_close,
262 1.10 augustss 0,
263 1.1 augustss };
264 1.1 augustss
265 1.1 augustss struct usbd_methods uhci_device_bulk_methods = {
266 1.1 augustss uhci_device_bulk_transfer,
267 1.16 augustss uhci_device_bulk_start,
268 1.1 augustss uhci_device_bulk_abort,
269 1.1 augustss uhci_device_bulk_close,
270 1.10 augustss 0,
271 1.1 augustss };
272 1.1 augustss
273 1.16 augustss struct usbd_methods uhci_device_isoc_methods = {
274 1.16 augustss uhci_device_isoc_transfer,
275 1.16 augustss uhci_device_isoc_start,
276 1.16 augustss uhci_device_isoc_abort,
277 1.16 augustss uhci_device_isoc_close,
278 1.16 augustss uhci_device_isoc_setbuf,
279 1.16 augustss };
280 1.16 augustss
281 1.1 augustss void
282 1.1 augustss uhci_busreset(sc)
283 1.1 augustss uhci_softc_t *sc;
284 1.1 augustss {
285 1.1 augustss UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
286 1.20 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
287 1.1 augustss UHCICMD(sc, 0); /* do nothing */
288 1.1 augustss }
289 1.1 augustss
290 1.1 augustss usbd_status
291 1.1 augustss uhci_init(sc)
292 1.1 augustss uhci_softc_t *sc;
293 1.1 augustss {
294 1.1 augustss usbd_status r;
295 1.1 augustss int i, j;
296 1.1 augustss uhci_soft_qh_t *csqh, *bsqh, *sqh;
297 1.1 augustss uhci_soft_td_t *std;
298 1.1 augustss
299 1.1 augustss DPRINTFN(1,("uhci_init: start\n"));
300 1.1 augustss
301 1.1 augustss #if defined(USB_DEBUG)
302 1.1 augustss if (uhcidebug > 2)
303 1.1 augustss uhci_dumpregs(sc);
304 1.1 augustss #endif
305 1.1 augustss
306 1.1 augustss uhci_run(sc, 0); /* stop the controller */
307 1.1 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
308 1.1 augustss
309 1.24 augustss uhci_busreset(sc);
310 1.24 augustss
311 1.1 augustss /* Allocate and initialize real frame array. */
312 1.7 augustss r = usb_allocmem(sc->sc_dmatag,
313 1.7 augustss UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
314 1.24.4.2 thorpej UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
315 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
316 1.1 augustss return (r);
317 1.24.4.2 thorpej sc->sc_pframes = KERNADDR(&sc->sc_dma);
318 1.1 augustss UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
319 1.24.4.2 thorpej UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma)); /* set frame list */
320 1.1 augustss
321 1.1 augustss /* Allocate the dummy QH where bulk traffic will be queued. */
322 1.1 augustss bsqh = uhci_alloc_sqh(sc);
323 1.1 augustss if (!bsqh)
324 1.1 augustss return (USBD_NOMEM);
325 1.1 augustss bsqh->qh->qh_hlink = UHCI_PTR_T; /* end of QH chain */
326 1.1 augustss bsqh->qh->qh_elink = UHCI_PTR_T;
327 1.1 augustss sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
328 1.1 augustss
329 1.1 augustss /* Allocate the dummy QH where control traffic will be queued. */
330 1.1 augustss csqh = uhci_alloc_sqh(sc);
331 1.1 augustss if (!csqh)
332 1.1 augustss return (USBD_NOMEM);
333 1.1 augustss csqh->qh->hlink = bsqh;
334 1.1 augustss csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q;
335 1.1 augustss csqh->qh->qh_elink = UHCI_PTR_T;
336 1.1 augustss sc->sc_ctl_start = sc->sc_ctl_end = csqh;
337 1.1 augustss
338 1.1 augustss /*
339 1.1 augustss * Make all (virtual) frame list pointers point to the interrupt
340 1.1 augustss * queue heads and the interrupt queue heads at the control
341 1.1 augustss * queue head and point the physical frame list to the virtual.
342 1.1 augustss */
343 1.1 augustss for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
344 1.1 augustss std = uhci_alloc_std(sc);
345 1.1 augustss sqh = uhci_alloc_sqh(sc);
346 1.1 augustss if (!std || !sqh)
347 1.13 augustss return (USBD_NOMEM);
348 1.1 augustss std->td->link.sqh = sqh;
349 1.1 augustss std->td->td_link = sqh->physaddr | UHCI_PTR_Q;
350 1.1 augustss std->td->td_status = UHCI_TD_IOS; /* iso, inactive */
351 1.1 augustss std->td->td_token = 0;
352 1.1 augustss std->td->td_buffer = 0;
353 1.1 augustss sqh->qh->hlink = csqh;
354 1.1 augustss sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q;
355 1.1 augustss sqh->qh->elink = 0;
356 1.1 augustss sqh->qh->qh_elink = UHCI_PTR_T;
357 1.1 augustss sc->sc_vframes[i].htd = std;
358 1.1 augustss sc->sc_vframes[i].etd = std;
359 1.1 augustss sc->sc_vframes[i].hqh = sqh;
360 1.1 augustss sc->sc_vframes[i].eqh = sqh;
361 1.1 augustss for (j = i;
362 1.1 augustss j < UHCI_FRAMELIST_COUNT;
363 1.1 augustss j += UHCI_VFRAMELIST_COUNT)
364 1.1 augustss sc->sc_pframes[j] = std->physaddr;
365 1.1 augustss }
366 1.1 augustss
367 1.1 augustss LIST_INIT(&sc->sc_intrhead);
368 1.1 augustss
369 1.1 augustss /* Set up the bus struct. */
370 1.1 augustss sc->sc_bus.open_pipe = uhci_open;
371 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
372 1.8 augustss sc->sc_bus.do_poll = uhci_poll;
373 1.1 augustss
374 1.24.4.2 thorpej sc->sc_suspend = PWR_RESUME;
375 1.24.4.2 thorpej (void)powerhook_establish(uhci_power, sc);
376 1.24.4.2 thorpej
377 1.1 augustss DPRINTFN(1,("uhci_init: enabling\n"));
378 1.1 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
379 1.1 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
380 1.1 augustss
381 1.16 augustss return (uhci_run(sc, 1)); /* and here we go... */
382 1.1 augustss }
383 1.1 augustss
384 1.24.4.2 thorpej /*
385 1.24.4.2 thorpej * Handle suspend/resume.
386 1.24.4.2 thorpej *
387 1.24.4.2 thorpej * Must use delay() here since we are called from an interrupt
388 1.24.4.2 thorpej * context, but since we are close to being inactive anyway
389 1.24.4.2 thorpej * it doesn't matter.
390 1.24.4.2 thorpej */
391 1.24.4.2 thorpej void
392 1.24.4.2 thorpej uhci_power(why, v)
393 1.24.4.2 thorpej int why;
394 1.24.4.2 thorpej void *v;
395 1.24.4.2 thorpej {
396 1.24.4.2 thorpej uhci_softc_t *sc = v;
397 1.24.4.2 thorpej int cmd;
398 1.24.4.2 thorpej int s;
399 1.24.4.2 thorpej
400 1.24.4.2 thorpej s = splusb();
401 1.24.4.2 thorpej cmd = UREAD2(sc, UHCI_CMD);
402 1.24.4.2 thorpej
403 1.24.4.2 thorpej DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
404 1.24.4.2 thorpej sc, why, sc->sc_suspend, cmd));
405 1.24.4.2 thorpej
406 1.24.4.2 thorpej if (why != PWR_RESUME) {
407 1.24.4.2 thorpej #if defined(USB_DEBUG)
408 1.24.4.2 thorpej if (uhcidebug > 2)
409 1.24.4.2 thorpej uhci_dumpregs(sc);
410 1.24.4.2 thorpej #endif
411 1.24.4.2 thorpej if (sc->sc_has_timo)
412 1.24.4.2 thorpej usb_untimeout(uhci_timo, sc->sc_has_timo,
413 1.24.4.2 thorpej sc->sc_has_timo->timo_handle);
414 1.24.4.2 thorpej uhci_run(sc, 0); /* stop the controller */
415 1.24.4.2 thorpej UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
416 1.24.4.2 thorpej delay(USB_RESUME_WAIT * 1000);
417 1.24.4.2 thorpej sc->sc_suspend = why;
418 1.24.4.2 thorpej DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
419 1.24.4.2 thorpej } else {
420 1.24.4.2 thorpej /*
421 1.24.4.2 thorpej * XXX We should really do much more here in case the
422 1.24.4.2 thorpej * controller registers have been lost and BIOS has
423 1.24.4.2 thorpej * not restored them.
424 1.24.4.2 thorpej */
425 1.24.4.2 thorpej sc->sc_suspend = why;
426 1.24.4.2 thorpej if (cmd & UHCI_CMD_RS)
427 1.24.4.2 thorpej uhci_run(sc, 0); /* in case BIOS has started it */
428 1.24.4.2 thorpej UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
429 1.24.4.2 thorpej delay(USB_RESUME_DELAY * 1000);
430 1.24.4.2 thorpej UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
431 1.24.4.2 thorpej UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
432 1.24.4.2 thorpej UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
433 1.24.4.2 thorpej uhci_run(sc, 1); /* and start traffic again */
434 1.24.4.2 thorpej delay(USB_RESUME_RECOVERY * 1000);
435 1.24.4.2 thorpej if (sc->sc_has_timo)
436 1.24.4.2 thorpej usb_timeout(uhci_timo, sc->sc_has_timo,
437 1.24.4.2 thorpej sc->sc_ival, sc->sc_has_timo->timo_handle);
438 1.24.4.2 thorpej #if defined(USB_DEBUG)
439 1.24.4.2 thorpej if (uhcidebug > 2)
440 1.24.4.2 thorpej uhci_dumpregs(sc);
441 1.24.4.2 thorpej #endif
442 1.24.4.2 thorpej }
443 1.24.4.2 thorpej splx(s);
444 1.24.4.2 thorpej }
445 1.24.4.2 thorpej
446 1.1 augustss #ifdef USB_DEBUG
447 1.1 augustss static void
448 1.1 augustss uhci_dumpregs(sc)
449 1.1 augustss uhci_softc_t *sc;
450 1.1 augustss {
451 1.24.4.1 thorpej printf("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
452 1.13 augustss "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
453 1.13 augustss USBDEVNAME(sc->sc_bus.bdev),
454 1.1 augustss UREAD2(sc, UHCI_CMD),
455 1.1 augustss UREAD2(sc, UHCI_STS),
456 1.1 augustss UREAD2(sc, UHCI_INTR),
457 1.1 augustss UREAD2(sc, UHCI_FRNUM),
458 1.24.4.1 thorpej UREAD4(sc, UHCI_FLBASEADDR),
459 1.1 augustss UREAD2(sc, UHCI_SOF),
460 1.1 augustss UREAD2(sc, UHCI_PORTSC1),
461 1.1 augustss UREAD2(sc, UHCI_PORTSC2));
462 1.1 augustss }
463 1.1 augustss
464 1.1 augustss int uhci_longtd = 1;
465 1.1 augustss
466 1.1 augustss void
467 1.1 augustss uhci_dump_td(p)
468 1.1 augustss uhci_soft_td_t *p;
469 1.1 augustss {
470 1.24.4.1 thorpej printf("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
471 1.24.4.1 thorpej "token=0x%08lx buffer=0x%08lx\n",
472 1.1 augustss p, (long)p->physaddr,
473 1.1 augustss (long)p->td->td_link,
474 1.1 augustss (long)p->td->td_status,
475 1.1 augustss (long)p->td->td_token,
476 1.1 augustss (long)p->td->td_buffer);
477 1.1 augustss if (uhci_longtd)
478 1.12 augustss printf(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
479 1.12 augustss "D=%d,maxlen=%d\n",
480 1.21 augustss (int)p->td->td_link,
481 1.1 augustss "\20\1T\2Q\3VF",
482 1.21 augustss (int)p->td->td_status,
483 1.12 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
484 1.12 augustss "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
485 1.1 augustss UHCI_TD_GET_ERRCNT(p->td->td_status),
486 1.1 augustss UHCI_TD_GET_ACTLEN(p->td->td_status),
487 1.1 augustss UHCI_TD_GET_PID(p->td->td_token),
488 1.1 augustss UHCI_TD_GET_DEVADDR(p->td->td_token),
489 1.1 augustss UHCI_TD_GET_ENDPT(p->td->td_token),
490 1.1 augustss UHCI_TD_GET_DT(p->td->td_token),
491 1.1 augustss UHCI_TD_GET_MAXLEN(p->td->td_token));
492 1.1 augustss }
493 1.1 augustss
494 1.1 augustss void
495 1.1 augustss uhci_dump_qh(p)
496 1.1 augustss uhci_soft_qh_t *p;
497 1.1 augustss {
498 1.1 augustss printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr,
499 1.1 augustss p->qh->qh_hlink, p->qh->qh_elink);
500 1.1 augustss }
501 1.1 augustss
502 1.13 augustss
503 1.1 augustss #if 0
504 1.1 augustss void
505 1.1 augustss uhci_dump()
506 1.1 augustss {
507 1.1 augustss uhci_softc_t *sc = uhci;
508 1.1 augustss
509 1.1 augustss uhci_dumpregs(sc);
510 1.1 augustss printf("intrs=%d\n", sc->sc_intrs);
511 1.1 augustss printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);
512 1.1 augustss uhci_dump_qh(sc->sc_ctl_start->qh->hlink);
513 1.1 augustss }
514 1.1 augustss #endif
515 1.1 augustss
516 1.1 augustss void
517 1.1 augustss uhci_dump_tds(std)
518 1.1 augustss uhci_soft_td_t *std;
519 1.1 augustss {
520 1.1 augustss uhci_soft_td_t *p;
521 1.1 augustss
522 1.1 augustss for(p = std; p; p = p->td->link.std)
523 1.1 augustss uhci_dump_td(p);
524 1.1 augustss }
525 1.1 augustss #endif
526 1.1 augustss
527 1.1 augustss /*
528 1.1 augustss * This routine is executed periodically and simulates interrupts
529 1.1 augustss * from the root controller interrupt pipe for port status change.
530 1.1 augustss */
531 1.1 augustss void
532 1.1 augustss uhci_timo(addr)
533 1.1 augustss void *addr;
534 1.1 augustss {
535 1.1 augustss usbd_request_handle reqh = addr;
536 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
537 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
538 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
539 1.1 augustss int s;
540 1.1 augustss u_char *p;
541 1.1 augustss
542 1.1 augustss DPRINTFN(15, ("uhci_timo\n"));
543 1.1 augustss
544 1.1 augustss p = KERNADDR(&upipe->u.intr.datadma);
545 1.1 augustss p[0] = 0;
546 1.1 augustss if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
547 1.1 augustss p[0] |= 1<<1;
548 1.1 augustss if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
549 1.1 augustss p[0] |= 1<<2;
550 1.16 augustss s = splusb();
551 1.1 augustss if (p[0] != 0) {
552 1.1 augustss reqh->actlen = 1;
553 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
554 1.1 augustss reqh->xfercb(reqh);
555 1.1 augustss }
556 1.24.4.2 thorpej if (reqh->pipe->repeat) {
557 1.13 augustss usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
558 1.1 augustss } else {
559 1.7 augustss usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma);
560 1.16 augustss usb_start_next(reqh->pipe);
561 1.1 augustss }
562 1.16 augustss splx(s);
563 1.1 augustss }
564 1.1 augustss
565 1.1 augustss
566 1.1 augustss void
567 1.1 augustss uhci_lock_frames(sc)
568 1.1 augustss uhci_softc_t *sc;
569 1.1 augustss {
570 1.1 augustss int s = splusb();
571 1.1 augustss while (sc->sc_vflock) {
572 1.1 augustss sc->sc_vflock |= UHCI_WANT_LOCK;
573 1.1 augustss tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0);
574 1.1 augustss }
575 1.1 augustss sc->sc_vflock = UHCI_HAS_LOCK;
576 1.1 augustss splx(s);
577 1.1 augustss }
578 1.1 augustss
579 1.1 augustss void
580 1.1 augustss uhci_unlock_frames(sc)
581 1.1 augustss uhci_softc_t *sc;
582 1.1 augustss {
583 1.1 augustss int s = splusb();
584 1.1 augustss sc->sc_vflock &= ~UHCI_HAS_LOCK;
585 1.1 augustss if (sc->sc_vflock & UHCI_WANT_LOCK)
586 1.1 augustss wakeup(&sc->sc_vflock);
587 1.1 augustss splx(s);
588 1.1 augustss }
589 1.1 augustss
590 1.1 augustss /*
591 1.1 augustss * Allocate an interrupt information struct. A free list is kept
592 1.1 augustss * for fast allocation.
593 1.1 augustss */
594 1.1 augustss uhci_intr_info_t *
595 1.1 augustss uhci_alloc_intr_info(sc)
596 1.1 augustss uhci_softc_t *sc;
597 1.1 augustss {
598 1.1 augustss uhci_intr_info_t *ii;
599 1.1 augustss
600 1.1 augustss ii = LIST_FIRST(&uhci_ii_free);
601 1.1 augustss if (ii)
602 1.1 augustss LIST_REMOVE(ii, list);
603 1.1 augustss else {
604 1.24.4.2 thorpej ii = malloc(sizeof(uhci_intr_info_t), M_USBHC, M_NOWAIT);
605 1.1 augustss }
606 1.1 augustss ii->sc = sc;
607 1.1 augustss return ii;
608 1.1 augustss }
609 1.1 augustss
610 1.1 augustss void
611 1.1 augustss uhci_free_intr_info(ii)
612 1.1 augustss uhci_intr_info_t *ii;
613 1.1 augustss {
614 1.1 augustss LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */
615 1.1 augustss }
616 1.1 augustss
617 1.1 augustss /* Add control QH, called at splusb(). */
618 1.1 augustss void
619 1.1 augustss uhci_add_ctrl(sc, sqh)
620 1.1 augustss uhci_softc_t *sc;
621 1.1 augustss uhci_soft_qh_t *sqh;
622 1.1 augustss {
623 1.1 augustss uhci_qh_t *eqh;
624 1.1 augustss
625 1.1 augustss DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
626 1.1 augustss eqh = sc->sc_ctl_end->qh;
627 1.1 augustss sqh->qh->hlink = eqh->hlink;
628 1.1 augustss sqh->qh->qh_hlink = eqh->qh_hlink;
629 1.1 augustss eqh->hlink = sqh;
630 1.1 augustss eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
631 1.1 augustss sc->sc_ctl_end = sqh;
632 1.1 augustss }
633 1.1 augustss
634 1.1 augustss /* Remove control QH, called at splusb(). */
635 1.1 augustss void
636 1.1 augustss uhci_remove_ctrl(sc, sqh)
637 1.1 augustss uhci_softc_t *sc;
638 1.1 augustss uhci_soft_qh_t *sqh;
639 1.1 augustss {
640 1.1 augustss uhci_soft_qh_t *pqh;
641 1.1 augustss
642 1.1 augustss DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh));
643 1.1 augustss for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink)
644 1.1 augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
645 1.1 augustss if (pqh->qh->qh_hlink & UHCI_PTR_T) {
646 1.1 augustss printf("uhci_remove_ctrl: QH not found\n");
647 1.1 augustss return;
648 1.1 augustss }
649 1.1 augustss #else
650 1.1 augustss ;
651 1.1 augustss #endif
652 1.1 augustss pqh->qh->hlink = sqh->qh->hlink;
653 1.1 augustss pqh->qh->qh_hlink = sqh->qh->qh_hlink;
654 1.1 augustss if (sc->sc_ctl_end == sqh)
655 1.1 augustss sc->sc_ctl_end = pqh;
656 1.1 augustss }
657 1.1 augustss
658 1.1 augustss /* Add bulk QH, called at splusb(). */
659 1.1 augustss void
660 1.1 augustss uhci_add_bulk(sc, sqh)
661 1.1 augustss uhci_softc_t *sc;
662 1.1 augustss uhci_soft_qh_t *sqh;
663 1.1 augustss {
664 1.1 augustss uhci_qh_t *eqh;
665 1.1 augustss
666 1.1 augustss DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
667 1.1 augustss eqh = sc->sc_bulk_end->qh;
668 1.1 augustss sqh->qh->hlink = eqh->hlink;
669 1.1 augustss sqh->qh->qh_hlink = eqh->qh_hlink;
670 1.1 augustss eqh->hlink = sqh;
671 1.1 augustss eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
672 1.1 augustss sc->sc_bulk_end = sqh;
673 1.1 augustss }
674 1.1 augustss
675 1.1 augustss /* Remove bulk QH, called at splusb(). */
676 1.1 augustss void
677 1.1 augustss uhci_remove_bulk(sc, sqh)
678 1.1 augustss uhci_softc_t *sc;
679 1.1 augustss uhci_soft_qh_t *sqh;
680 1.1 augustss {
681 1.1 augustss uhci_soft_qh_t *pqh;
682 1.1 augustss
683 1.1 augustss DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
684 1.12 augustss for (pqh = sc->sc_bulk_start;
685 1.12 augustss pqh->qh->hlink != sqh;
686 1.12 augustss pqh = pqh->qh->hlink)
687 1.1 augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
688 1.1 augustss if (pqh->qh->qh_hlink & UHCI_PTR_T) {
689 1.1 augustss printf("uhci_remove_bulk: QH not found\n");
690 1.1 augustss return;
691 1.1 augustss }
692 1.1 augustss #else
693 1.1 augustss ;
694 1.1 augustss #endif
695 1.1 augustss pqh->qh->hlink = sqh->qh->hlink;
696 1.1 augustss pqh->qh->qh_hlink = sqh->qh->qh_hlink;
697 1.1 augustss if (sc->sc_bulk_end == sqh)
698 1.1 augustss sc->sc_bulk_end = pqh;
699 1.1 augustss }
700 1.1 augustss
701 1.1 augustss int
702 1.1 augustss uhci_intr(p)
703 1.1 augustss void *p;
704 1.1 augustss {
705 1.1 augustss uhci_softc_t *sc = p;
706 1.1 augustss int status, ret;
707 1.1 augustss uhci_intr_info_t *ii;
708 1.1 augustss
709 1.1 augustss sc->sc_intrs++;
710 1.1 augustss #if defined(USB_DEBUG)
711 1.1 augustss if (uhcidebug > 9) {
712 1.13 augustss printf("uhci_intr %p\n", sc);
713 1.1 augustss uhci_dumpregs(sc);
714 1.1 augustss }
715 1.1 augustss #endif
716 1.1 augustss status = UREAD2(sc, UHCI_STS);
717 1.24.4.2 thorpej #ifdef DIAGNOSTIC
718 1.24.4.2 thorpej if (sc->sc_suspend != PWR_RESUME)
719 1.24.4.2 thorpej printf("uhci_intr: suspended sts=0x%x\n", status);
720 1.24.4.2 thorpej #endif
721 1.1 augustss ret = 0;
722 1.1 augustss if (status & UHCI_STS_USBINT) {
723 1.1 augustss UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */
724 1.1 augustss ret = 1;
725 1.1 augustss }
726 1.1 augustss if (status & UHCI_STS_USBEI) {
727 1.1 augustss UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */
728 1.1 augustss ret = 1;
729 1.1 augustss }
730 1.1 augustss if (status & UHCI_STS_RD) {
731 1.1 augustss UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */
732 1.13 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
733 1.1 augustss ret = 1;
734 1.1 augustss }
735 1.1 augustss if (status & UHCI_STS_HSE) {
736 1.1 augustss UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */
737 1.13 augustss printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev));
738 1.1 augustss ret = 1;
739 1.1 augustss }
740 1.1 augustss if (status & UHCI_STS_HCPE) {
741 1.1 augustss UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */
742 1.13 augustss printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev));
743 1.1 augustss ret = 1;
744 1.1 augustss }
745 1.13 augustss if (status & UHCI_STS_HCH)
746 1.13 augustss printf("%s: controller halted\n", USBDEVNAME(sc->sc_bus.bdev));
747 1.1 augustss if (!ret)
748 1.1 augustss return 0;
749 1.1 augustss
750 1.1 augustss /*
751 1.1 augustss * Interrupts on UHCI really suck. When the host controller
752 1.1 augustss * interrupts because a transfer is completed there is no
753 1.1 augustss * way of knowing which transfer it was. You can scan down
754 1.1 augustss * the TDs and QHs of the previous frame to limit the search,
755 1.1 augustss * but that assumes that the interrupt was not delayed by more
756 1.1 augustss * than 1 ms, which may not always be true (e.g. after debug
757 1.1 augustss * output on a slow console).
758 1.1 augustss * We scan all interrupt descriptors to see if any have
759 1.1 augustss * completed.
760 1.1 augustss */
761 1.1 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
762 1.1 augustss uhci_check_intr(sc, ii);
763 1.1 augustss
764 1.1 augustss DPRINTFN(10, ("uhci_intr: exit\n"));
765 1.1 augustss return 1;
766 1.1 augustss }
767 1.1 augustss
768 1.1 augustss /* Check for an interrupt. */
769 1.1 augustss void
770 1.1 augustss uhci_check_intr(sc, ii)
771 1.1 augustss uhci_softc_t *sc;
772 1.1 augustss uhci_intr_info_t *ii;
773 1.1 augustss {
774 1.1 augustss struct uhci_pipe *upipe;
775 1.1 augustss uhci_soft_td_t *std, *lstd;
776 1.18 augustss u_int32_t status;
777 1.1 augustss
778 1.1 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
779 1.1 augustss #ifdef DIAGNOSTIC
780 1.1 augustss if (!ii) {
781 1.1 augustss printf("uhci_check_intr: no ii? %p\n", ii);
782 1.1 augustss return;
783 1.1 augustss }
784 1.1 augustss #endif
785 1.1 augustss if (!ii->stdstart)
786 1.1 augustss return;
787 1.1 augustss lstd = ii->stdend;
788 1.1 augustss #ifdef DIAGNOSTIC
789 1.1 augustss if (!lstd) {
790 1.1 augustss printf("uhci_check_intr: std==0\n");
791 1.1 augustss return;
792 1.1 augustss }
793 1.1 augustss #endif
794 1.24.4.1 thorpej /*
795 1.24.4.1 thorpej * If the last TD is still active we need to check whether there
796 1.24.4.1 thorpej * is a an error somewhere in the middle, or whether there was a
797 1.24.4.1 thorpej * short packet (SPD and not ACTIVE).
798 1.24.4.1 thorpej */
799 1.1 augustss if (lstd->td->td_status & UHCI_TD_ACTIVE) {
800 1.1 augustss DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii));
801 1.18 augustss for (std = ii->stdstart; std != lstd; std = std->td->link.std){
802 1.18 augustss status = std->td->td_status;
803 1.18 augustss if ((status & UHCI_TD_STALLED) ||
804 1.18 augustss (status & (UHCI_TD_SPD | UHCI_TD_ACTIVE)) ==
805 1.18 augustss UHCI_TD_SPD)
806 1.1 augustss goto done;
807 1.18 augustss }
808 1.18 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p std=%p still active\n",
809 1.18 augustss ii, ii->stdstart));
810 1.1 augustss return;
811 1.1 augustss }
812 1.1 augustss done:
813 1.24.4.1 thorpej usb_untimeout(uhci_timeout, ii, ii->timeout_handle);
814 1.1 augustss upipe = (struct uhci_pipe *)ii->reqh->pipe;
815 1.24.4.3 thorpej upipe->pipe.endpoint->toggle = upipe->nexttoggle;
816 1.1 augustss uhci_ii_done(ii, 0);
817 1.1 augustss }
818 1.1 augustss
819 1.1 augustss void
820 1.1 augustss uhci_ii_done(ii, timo)
821 1.1 augustss uhci_intr_info_t *ii;
822 1.1 augustss int timo;
823 1.1 augustss {
824 1.1 augustss usbd_request_handle reqh = ii->reqh;
825 1.1 augustss uhci_soft_td_t *std;
826 1.24.4.1 thorpej u_int32_t status;
827 1.24.4.1 thorpej int actlen;
828 1.1 augustss
829 1.7 augustss DPRINTFN(10, ("uhci_ii_done: ii=%p ready %d\n", ii, timo));
830 1.7 augustss
831 1.7 augustss #ifdef DIAGNOSTIC
832 1.7 augustss {
833 1.7 augustss int s = splhigh();
834 1.7 augustss if (ii->isdone) {
835 1.7 augustss splx(s);
836 1.24.4.1 thorpej printf("uhci_ii_done: is done!\n");
837 1.7 augustss return;
838 1.7 augustss }
839 1.7 augustss ii->isdone = 1;
840 1.7 augustss splx(s);
841 1.7 augustss }
842 1.7 augustss #endif
843 1.1 augustss
844 1.24.4.1 thorpej /* The transfer is done, compute actual length and status. */
845 1.21 augustss /* XXX Should stop at first inactive to get toggle right. */
846 1.18 augustss /* XXX Is this correct for control xfers? */
847 1.24.4.1 thorpej actlen = 0;
848 1.24.4.1 thorpej for (std = ii->stdstart; std; std = std->td->link.std) {
849 1.24.4.1 thorpej status = std->td->td_status;
850 1.24.4.1 thorpej if (status & UHCI_TD_ACTIVE)
851 1.24.4.1 thorpej break;
852 1.1 augustss if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP)
853 1.24.4.1 thorpej actlen += UHCI_TD_GET_ACTLEN(status);
854 1.1 augustss }
855 1.1 augustss status &= UHCI_TD_ERROR;
856 1.24.4.1 thorpej DPRINTFN(10, ("uhci_check_intr: actlen=%d, status=0x%x\n",
857 1.24.4.1 thorpej actlen, status));
858 1.24.4.1 thorpej reqh->actlen = actlen;
859 1.1 augustss if (status != 0) {
860 1.24.4.2 thorpej DPRINTFN(-1+((status&UHCI_TD_STALLED)!=0),
861 1.17 augustss ("uhci_ii_done: error, addr=%d, endpt=0x%02x, "
862 1.17 augustss "status 0x%b\n",
863 1.17 augustss reqh->pipe->device->address,
864 1.17 augustss reqh->pipe->endpoint->edesc->bEndpointAddress,
865 1.21 augustss (int)status,
866 1.12 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
867 1.12 augustss "STALLED\30ACTIVE"));
868 1.1 augustss if (status == UHCI_TD_STALLED)
869 1.1 augustss reqh->status = USBD_STALLED;
870 1.1 augustss else
871 1.1 augustss reqh->status = USBD_IOERROR; /* more info XXX */
872 1.1 augustss } else {
873 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
874 1.1 augustss }
875 1.1 augustss if (timo) {
876 1.1 augustss /* We got a timeout. Make sure transaction is not active. */
877 1.1 augustss reqh->status = USBD_TIMEOUT;
878 1.1 augustss for (std = ii->stdstart; std != 0; std = std->td->link.std)
879 1.1 augustss std->td->td_status &= ~UHCI_TD_ACTIVE;
880 1.1 augustss /* XXX should we wait 1 ms */
881 1.1 augustss }
882 1.13 augustss DPRINTFN(5, ("uhci_ii_done: calling handler ii=%p\n", ii));
883 1.1 augustss
884 1.24.4.1 thorpej switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
885 1.1 augustss case UE_CONTROL:
886 1.1 augustss uhci_ctrl_done(ii);
887 1.16 augustss usb_start_next(reqh->pipe);
888 1.1 augustss break;
889 1.1 augustss case UE_ISOCHRONOUS:
890 1.16 augustss uhci_isoc_done(ii);
891 1.16 augustss usb_start_next(reqh->pipe);
892 1.7 augustss break;
893 1.1 augustss case UE_BULK:
894 1.1 augustss uhci_bulk_done(ii);
895 1.16 augustss usb_start_next(reqh->pipe);
896 1.1 augustss break;
897 1.1 augustss case UE_INTERRUPT:
898 1.1 augustss uhci_intr_done(ii);
899 1.1 augustss break;
900 1.1 augustss }
901 1.1 augustss
902 1.1 augustss /* And finally execute callback. */
903 1.1 augustss reqh->xfercb(reqh);
904 1.1 augustss }
905 1.1 augustss
906 1.13 augustss /*
907 1.13 augustss * Called when a request does not complete.
908 1.13 augustss */
909 1.1 augustss void
910 1.1 augustss uhci_timeout(addr)
911 1.1 augustss void *addr;
912 1.1 augustss {
913 1.1 augustss uhci_intr_info_t *ii = addr;
914 1.1 augustss int s;
915 1.1 augustss
916 1.1 augustss DPRINTF(("uhci_timeout: ii=%p\n", ii));
917 1.1 augustss s = splusb();
918 1.1 augustss uhci_ii_done(ii, 1);
919 1.1 augustss splx(s);
920 1.1 augustss }
921 1.1 augustss
922 1.1 augustss /*
923 1.1 augustss * Wait here until controller claims to have an interrupt.
924 1.1 augustss * Then call uhci_intr and return. Use timeout to avoid waiting
925 1.1 augustss * too long.
926 1.13 augustss * Only used during boot when interrupts are not enabled yet.
927 1.1 augustss */
928 1.1 augustss void
929 1.1 augustss uhci_waitintr(sc, reqh)
930 1.1 augustss uhci_softc_t *sc;
931 1.1 augustss usbd_request_handle reqh;
932 1.1 augustss {
933 1.1 augustss int timo = reqh->timeout;
934 1.13 augustss uhci_intr_info_t *ii;
935 1.13 augustss
936 1.24.4.1 thorpej DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
937 1.1 augustss
938 1.1 augustss reqh->status = USBD_IN_PROGRESS;
939 1.24.4.1 thorpej for (; timo >= 0; timo--) {
940 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
941 1.24.4.1 thorpej DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
942 1.1 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
943 1.1 augustss uhci_intr(sc);
944 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
945 1.1 augustss return;
946 1.1 augustss }
947 1.1 augustss }
948 1.13 augustss
949 1.13 augustss /* Timeout */
950 1.13 augustss DPRINTF(("uhci_waitintr: timeout\n"));
951 1.13 augustss for (ii = LIST_FIRST(&sc->sc_intrhead);
952 1.13 augustss ii && ii->reqh != reqh;
953 1.13 augustss ii = LIST_NEXT(ii, list))
954 1.13 augustss ;
955 1.13 augustss if (ii)
956 1.13 augustss uhci_ii_done(ii, 1);
957 1.13 augustss else
958 1.13 augustss panic("uhci_waitintr: lost intr_info\n");
959 1.1 augustss }
960 1.1 augustss
961 1.8 augustss void
962 1.8 augustss uhci_poll(bus)
963 1.8 augustss struct usbd_bus *bus;
964 1.8 augustss {
965 1.8 augustss uhci_softc_t *sc = (uhci_softc_t *)bus;
966 1.8 augustss
967 1.8 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
968 1.8 augustss uhci_intr(sc);
969 1.8 augustss }
970 1.8 augustss
971 1.1 augustss #if 0
972 1.1 augustss void
973 1.1 augustss uhci_reset(p)
974 1.1 augustss void *p;
975 1.1 augustss {
976 1.1 augustss uhci_softc_t *sc = p;
977 1.1 augustss int n;
978 1.1 augustss
979 1.1 augustss UHCICMD(sc, UHCI_CMD_HCRESET);
980 1.1 augustss /* The reset bit goes low when the controller is done. */
981 1.1 augustss for (n = 0; n < UHCI_RESET_TIMEOUT &&
982 1.1 augustss (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
983 1.1 augustss delay(100);
984 1.1 augustss if (n >= UHCI_RESET_TIMEOUT)
985 1.13 augustss printf("%s: controller did not reset\n",
986 1.13 augustss USBDEVNAME(sc->sc_bus.bdev));
987 1.1 augustss }
988 1.1 augustss #endif
989 1.1 augustss
990 1.16 augustss usbd_status
991 1.1 augustss uhci_run(sc, run)
992 1.1 augustss uhci_softc_t *sc;
993 1.1 augustss int run;
994 1.1 augustss {
995 1.1 augustss int s, n, running;
996 1.1 augustss
997 1.1 augustss run = run != 0;
998 1.16 augustss s = splusb();
999 1.24.4.2 thorpej DPRINTF(("uhci_run: setting run=%d\n", run));
1000 1.24.4.2 thorpej UHCICMD(sc, run ? UHCI_CMD_RS : 0);
1001 1.13 augustss for(n = 0; n < 10; n++) {
1002 1.1 augustss running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1003 1.1 augustss /* return when we've entered the state we want */
1004 1.1 augustss if (run == running) {
1005 1.1 augustss splx(s);
1006 1.24.4.2 thorpej DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1007 1.24.4.2 thorpej UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1008 1.16 augustss return (USBD_NORMAL_COMPLETION);
1009 1.1 augustss }
1010 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1011 1.1 augustss }
1012 1.1 augustss splx(s);
1013 1.13 augustss printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1014 1.14 augustss run ? "start" : "stop");
1015 1.16 augustss return (USBD_IOERROR);
1016 1.1 augustss }
1017 1.1 augustss
1018 1.1 augustss /*
1019 1.1 augustss * Memory management routines.
1020 1.1 augustss * uhci_alloc_std allocates TDs
1021 1.1 augustss * uhci_alloc_sqh allocates QHs
1022 1.7 augustss * These two routines do their own free list management,
1023 1.1 augustss * partly for speed, partly because allocating DMAable memory
1024 1.1 augustss * has page size granularaity so much memory would be wasted if
1025 1.16 augustss * only one TD/QH (32 bytes) was placed in each allocated chunk.
1026 1.1 augustss */
1027 1.1 augustss
1028 1.1 augustss uhci_soft_td_t *
1029 1.1 augustss uhci_alloc_std(sc)
1030 1.1 augustss uhci_softc_t *sc;
1031 1.1 augustss {
1032 1.1 augustss uhci_soft_td_t *std;
1033 1.1 augustss usbd_status r;
1034 1.1 augustss int i;
1035 1.7 augustss usb_dma_t dma;
1036 1.1 augustss
1037 1.1 augustss if (!sc->sc_freetds) {
1038 1.1 augustss DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1039 1.1 augustss std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK,
1040 1.24.4.2 thorpej M_USBHC, M_NOWAIT);
1041 1.1 augustss if (!std)
1042 1.16 augustss return (0);
1043 1.7 augustss r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK,
1044 1.7 augustss UHCI_TD_ALIGN, &dma);
1045 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
1046 1.24.4.2 thorpej free(std, M_USBHC);
1047 1.16 augustss return (0);
1048 1.1 augustss }
1049 1.1 augustss for(i = 0; i < UHCI_TD_CHUNK; i++, std++) {
1050 1.16 augustss std->physaddr = DMAADDR(&dma) + i * UHCI_TD_SIZE;
1051 1.1 augustss std->td = (uhci_td_t *)
1052 1.1 augustss ((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE);
1053 1.2 drochner std->td->link.std = sc->sc_freetds;
1054 1.1 augustss sc->sc_freetds = std;
1055 1.1 augustss }
1056 1.1 augustss }
1057 1.1 augustss std = sc->sc_freetds;
1058 1.1 augustss sc->sc_freetds = std->td->link.std;
1059 1.1 augustss memset(std->td, 0, UHCI_TD_SIZE);
1060 1.1 augustss return std;
1061 1.1 augustss }
1062 1.1 augustss
1063 1.1 augustss void
1064 1.1 augustss uhci_free_std(sc, std)
1065 1.1 augustss uhci_softc_t *sc;
1066 1.1 augustss uhci_soft_td_t *std;
1067 1.1 augustss {
1068 1.7 augustss #ifdef DIAGNOSTIC
1069 1.7 augustss #define TD_IS_FREE 0x12345678
1070 1.7 augustss if (std->td->td_token == TD_IS_FREE) {
1071 1.7 augustss printf("uhci_free_std: freeing free TD %p\n", std);
1072 1.7 augustss return;
1073 1.7 augustss }
1074 1.7 augustss std->td->td_token = TD_IS_FREE;
1075 1.7 augustss #endif
1076 1.2 drochner std->td->link.std = sc->sc_freetds;
1077 1.1 augustss sc->sc_freetds = std;
1078 1.1 augustss }
1079 1.1 augustss
1080 1.1 augustss uhci_soft_qh_t *
1081 1.1 augustss uhci_alloc_sqh(sc)
1082 1.1 augustss uhci_softc_t *sc;
1083 1.1 augustss {
1084 1.1 augustss uhci_soft_qh_t *sqh;
1085 1.1 augustss usbd_status r;
1086 1.1 augustss int i, offs;
1087 1.7 augustss usb_dma_t dma;
1088 1.1 augustss
1089 1.1 augustss if (!sc->sc_freeqhs) {
1090 1.1 augustss DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1091 1.1 augustss sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK,
1092 1.24.4.2 thorpej M_USBHC, M_NOWAIT);
1093 1.1 augustss if (!sqh)
1094 1.1 augustss return 0;
1095 1.7 augustss r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK,
1096 1.7 augustss UHCI_QH_ALIGN, &dma);
1097 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
1098 1.24.4.2 thorpej free(sqh, M_USBHC);
1099 1.1 augustss return 0;
1100 1.1 augustss }
1101 1.1 augustss for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) {
1102 1.1 augustss offs = i * UHCI_QH_SIZE;
1103 1.1 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1104 1.1 augustss sqh->qh = (uhci_qh_t *)
1105 1.1 augustss ((char *)KERNADDR(&dma) + offs);
1106 1.1 augustss sqh->qh->hlink = sc->sc_freeqhs;
1107 1.1 augustss sc->sc_freeqhs = sqh;
1108 1.1 augustss }
1109 1.1 augustss }
1110 1.1 augustss sqh = sc->sc_freeqhs;
1111 1.1 augustss sc->sc_freeqhs = sqh->qh->hlink;
1112 1.1 augustss memset(sqh->qh, 0, UHCI_QH_SIZE);
1113 1.16 augustss return (sqh);
1114 1.1 augustss }
1115 1.1 augustss
1116 1.1 augustss void
1117 1.1 augustss uhci_free_sqh(sc, sqh)
1118 1.1 augustss uhci_softc_t *sc;
1119 1.1 augustss uhci_soft_qh_t *sqh;
1120 1.1 augustss {
1121 1.1 augustss sqh->qh->hlink = sc->sc_freeqhs;
1122 1.1 augustss sc->sc_freeqhs = sqh;
1123 1.1 augustss }
1124 1.1 augustss
1125 1.16 augustss #if 0
1126 1.1 augustss /*
1127 1.1 augustss * Enter a list of transfers onto a control queue.
1128 1.1 augustss * Called at splusb()
1129 1.1 augustss */
1130 1.1 augustss void
1131 1.1 augustss uhci_enter_ctl_q(sc, sqh, ii)
1132 1.1 augustss uhci_softc_t *sc;
1133 1.1 augustss uhci_soft_qh_t *sqh;
1134 1.1 augustss uhci_intr_info_t *ii;
1135 1.1 augustss {
1136 1.1 augustss DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh));
1137 1.1 augustss
1138 1.1 augustss }
1139 1.16 augustss #endif
1140 1.1 augustss
1141 1.1 augustss void
1142 1.1 augustss uhci_free_std_chain(sc, std, stdend)
1143 1.1 augustss uhci_softc_t *sc;
1144 1.1 augustss uhci_soft_td_t *std;
1145 1.1 augustss uhci_soft_td_t *stdend;
1146 1.1 augustss {
1147 1.1 augustss uhci_soft_td_t *p;
1148 1.1 augustss
1149 1.1 augustss for (; std != stdend; std = p) {
1150 1.1 augustss p = std->td->link.std;
1151 1.1 augustss uhci_free_std(sc, std);
1152 1.1 augustss }
1153 1.1 augustss }
1154 1.1 augustss
1155 1.1 augustss usbd_status
1156 1.18 augustss uhci_alloc_std_chain(upipe, sc, len, rd, spd, dma, sp, ep)
1157 1.1 augustss struct uhci_pipe *upipe;
1158 1.1 augustss uhci_softc_t *sc;
1159 1.18 augustss int len, rd, spd;
1160 1.7 augustss usb_dma_t *dma;
1161 1.1 augustss uhci_soft_td_t **sp, **ep;
1162 1.1 augustss {
1163 1.1 augustss uhci_soft_td_t *p, *lastp;
1164 1.1 augustss uhci_physaddr_t lastlink;
1165 1.1 augustss int i, ntd, l, tog, maxp;
1166 1.18 augustss u_int32_t status;
1167 1.1 augustss int addr = upipe->pipe.device->address;
1168 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1169 1.1 augustss
1170 1.18 augustss DPRINTFN(15, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d "
1171 1.24.4.1 thorpej "spd=%d\n", addr, UE_GET_ADDR(endpt), len,
1172 1.18 augustss upipe->pipe.device->lowspeed, spd));
1173 1.1 augustss if (len == 0) {
1174 1.1 augustss *sp = *ep = 0;
1175 1.12 augustss DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n"));
1176 1.1 augustss return (USBD_NORMAL_COMPLETION);
1177 1.1 augustss }
1178 1.4 augustss maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1179 1.1 augustss if (maxp == 0) {
1180 1.1 augustss printf("uhci_alloc_std_chain: maxp=0\n");
1181 1.1 augustss return (USBD_INVAL);
1182 1.1 augustss }
1183 1.1 augustss ntd = (len + maxp - 1) / maxp;
1184 1.1 augustss tog = upipe->pipe.endpoint->toggle;
1185 1.1 augustss if (ntd % 2 == 0)
1186 1.1 augustss tog ^= 1;
1187 1.24.4.3 thorpej upipe->nexttoggle = tog ^ 1;
1188 1.1 augustss lastp = 0;
1189 1.1 augustss lastlink = UHCI_PTR_T;
1190 1.1 augustss ntd--;
1191 1.24.4.1 thorpej status = UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE;
1192 1.18 augustss if (upipe->pipe.device->lowspeed)
1193 1.18 augustss status |= UHCI_TD_LS;
1194 1.18 augustss if (spd)
1195 1.18 augustss status |= UHCI_TD_SPD;
1196 1.1 augustss for (i = ntd; i >= 0; i--) {
1197 1.1 augustss p = uhci_alloc_std(sc);
1198 1.1 augustss if (!p) {
1199 1.1 augustss uhci_free_std_chain(sc, lastp, 0);
1200 1.1 augustss return (USBD_NOMEM);
1201 1.1 augustss }
1202 1.2 drochner p->td->link.std = lastp;
1203 1.1 augustss p->td->td_link = lastlink;
1204 1.1 augustss lastp = p;
1205 1.1 augustss lastlink = p->physaddr;
1206 1.18 augustss p->td->td_status = status;
1207 1.1 augustss if (i == ntd) {
1208 1.1 augustss /* last TD */
1209 1.1 augustss l = len % maxp;
1210 1.1 augustss if (l == 0) l = maxp;
1211 1.1 augustss *ep = p;
1212 1.1 augustss } else
1213 1.1 augustss l = maxp;
1214 1.1 augustss p->td->td_token =
1215 1.1 augustss rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1216 1.1 augustss UHCI_TD_OUT(l, endpt, addr, tog);
1217 1.1 augustss p->td->td_buffer = DMAADDR(dma) + i * maxp;
1218 1.1 augustss tog ^= 1;
1219 1.1 augustss }
1220 1.1 augustss *sp = lastp;
1221 1.1 augustss /*upipe->pipe.endpoint->toggle = tog;*/
1222 1.4 augustss DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d newtog=%d\n",
1223 1.24.4.3 thorpej upipe->pipe.endpoint->toggle, upipe->nexttoggle));
1224 1.1 augustss return (USBD_NORMAL_COMPLETION);
1225 1.1 augustss }
1226 1.1 augustss
1227 1.1 augustss usbd_status
1228 1.1 augustss uhci_device_bulk_transfer(reqh)
1229 1.1 augustss usbd_request_handle reqh;
1230 1.1 augustss {
1231 1.16 augustss int s;
1232 1.16 augustss usbd_status r;
1233 1.16 augustss
1234 1.16 augustss s = splusb();
1235 1.16 augustss r = usb_insert_transfer(reqh);
1236 1.16 augustss splx(s);
1237 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1238 1.16 augustss return (r);
1239 1.16 augustss else
1240 1.16 augustss return (uhci_device_bulk_start(reqh));
1241 1.16 augustss }
1242 1.16 augustss
1243 1.16 augustss usbd_status
1244 1.16 augustss uhci_device_bulk_start(reqh)
1245 1.16 augustss usbd_request_handle reqh;
1246 1.16 augustss {
1247 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1248 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1249 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1250 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1251 1.1 augustss uhci_soft_td_t *xfer, *xferend;
1252 1.1 augustss uhci_soft_qh_t *sqh;
1253 1.7 augustss usb_dma_t *dmap;
1254 1.1 augustss usbd_status r;
1255 1.1 augustss int len, isread;
1256 1.1 augustss int s;
1257 1.1 augustss
1258 1.12 augustss DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d "
1259 1.12 augustss "flags=%d\n",
1260 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags));
1261 1.1 augustss
1262 1.1 augustss if (reqh->isreq)
1263 1.1 augustss panic("uhci_device_bulk_transfer: a request\n");
1264 1.1 augustss
1265 1.1 augustss len = reqh->length;
1266 1.1 augustss dmap = &upipe->u.bulk.datadma;
1267 1.1 augustss isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
1268 1.1 augustss sqh = upipe->u.bulk.sqh;
1269 1.1 augustss
1270 1.1 augustss upipe->u.bulk.isread = isread;
1271 1.1 augustss upipe->u.bulk.length = len;
1272 1.1 augustss
1273 1.7 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1274 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1275 1.1 augustss goto ret1;
1276 1.1 augustss r = uhci_alloc_std_chain(upipe, sc, len, isread,
1277 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1278 1.1 augustss dmap, &xfer, &xferend);
1279 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1280 1.1 augustss goto ret2;
1281 1.1 augustss xferend->td->td_status |= UHCI_TD_IOC;
1282 1.1 augustss
1283 1.1 augustss if (!isread && len != 0)
1284 1.1 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1285 1.1 augustss
1286 1.1 augustss #ifdef USB_DEBUG
1287 1.1 augustss if (uhcidebug > 10) {
1288 1.1 augustss printf("uhci_device_bulk_transfer: xfer(1)\n");
1289 1.1 augustss uhci_dump_tds(xfer);
1290 1.1 augustss }
1291 1.1 augustss #endif
1292 1.1 augustss
1293 1.1 augustss /* Set up interrupt info. */
1294 1.1 augustss ii->reqh = reqh;
1295 1.1 augustss ii->stdstart = xfer;
1296 1.1 augustss ii->stdend = xferend;
1297 1.7 augustss #ifdef DIAGNOSTIC
1298 1.7 augustss ii->isdone = 0;
1299 1.7 augustss #endif
1300 1.1 augustss
1301 1.1 augustss sqh->qh->elink = xfer;
1302 1.1 augustss sqh->qh->qh_elink = xfer->physaddr;
1303 1.1 augustss sqh->intr_info = ii;
1304 1.1 augustss
1305 1.1 augustss s = splusb();
1306 1.1 augustss uhci_add_bulk(sc, sqh);
1307 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1308 1.1 augustss
1309 1.13 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1310 1.13 augustss usb_timeout(uhci_timeout, ii,
1311 1.13 augustss MS_TO_TICKS(reqh->timeout), ii->timeout_handle);
1312 1.13 augustss }
1313 1.1 augustss splx(s);
1314 1.1 augustss
1315 1.1 augustss #ifdef USB_DEBUG
1316 1.1 augustss if (uhcidebug > 10) {
1317 1.1 augustss printf("uhci_device_bulk_transfer: xfer(2)\n");
1318 1.1 augustss uhci_dump_tds(xfer);
1319 1.1 augustss }
1320 1.1 augustss #endif
1321 1.1 augustss
1322 1.24.4.1 thorpej if (sc->sc_bus.use_polling)
1323 1.24.4.1 thorpej uhci_waitintr(sc, reqh);
1324 1.24.4.1 thorpej
1325 1.1 augustss return (USBD_IN_PROGRESS);
1326 1.1 augustss
1327 1.1 augustss ret2:
1328 1.1 augustss if (len != 0)
1329 1.7 augustss usb_freemem(sc->sc_dmatag, dmap);
1330 1.1 augustss ret1:
1331 1.1 augustss return (r);
1332 1.1 augustss }
1333 1.1 augustss
1334 1.1 augustss /* Abort a device bulk request. */
1335 1.1 augustss void
1336 1.1 augustss uhci_device_bulk_abort(reqh)
1337 1.1 augustss usbd_request_handle reqh;
1338 1.1 augustss {
1339 1.6 augustss /* XXX inactivate */
1340 1.20 augustss usb_delay_ms(reqh->pipe->device->bus, 1);/* make sure it is done */
1341 1.6 augustss /* XXX call done */
1342 1.1 augustss }
1343 1.1 augustss
1344 1.1 augustss /* Close a device bulk pipe. */
1345 1.1 augustss void
1346 1.1 augustss uhci_device_bulk_close(pipe)
1347 1.1 augustss usbd_pipe_handle pipe;
1348 1.1 augustss {
1349 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1350 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1351 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1352 1.1 augustss
1353 1.1 augustss uhci_free_sqh(sc, upipe->u.bulk.sqh);
1354 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1355 1.1 augustss /* XXX free other resources */
1356 1.1 augustss }
1357 1.1 augustss
1358 1.1 augustss usbd_status
1359 1.1 augustss uhci_device_ctrl_transfer(reqh)
1360 1.1 augustss usbd_request_handle reqh;
1361 1.1 augustss {
1362 1.16 augustss int s;
1363 1.16 augustss usbd_status r;
1364 1.16 augustss
1365 1.16 augustss s = splusb();
1366 1.16 augustss r = usb_insert_transfer(reqh);
1367 1.16 augustss splx(s);
1368 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1369 1.16 augustss return (r);
1370 1.16 augustss else
1371 1.16 augustss return (uhci_device_ctrl_start(reqh));
1372 1.16 augustss }
1373 1.16 augustss
1374 1.16 augustss usbd_status
1375 1.16 augustss uhci_device_ctrl_start(reqh)
1376 1.16 augustss usbd_request_handle reqh;
1377 1.16 augustss {
1378 1.9 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1379 1.1 augustss usbd_status r;
1380 1.1 augustss
1381 1.1 augustss if (!reqh->isreq)
1382 1.1 augustss panic("uhci_device_ctrl_transfer: not a request\n");
1383 1.1 augustss
1384 1.1 augustss r = uhci_device_request(reqh);
1385 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1386 1.1 augustss return (r);
1387 1.1 augustss
1388 1.9 augustss if (sc->sc_bus.use_polling)
1389 1.9 augustss uhci_waitintr(sc, reqh);
1390 1.1 augustss return (USBD_IN_PROGRESS);
1391 1.1 augustss }
1392 1.1 augustss
1393 1.1 augustss usbd_status
1394 1.1 augustss uhci_device_intr_transfer(reqh)
1395 1.1 augustss usbd_request_handle reqh;
1396 1.1 augustss {
1397 1.16 augustss int s;
1398 1.16 augustss usbd_status r;
1399 1.16 augustss
1400 1.16 augustss s = splusb();
1401 1.16 augustss r = usb_insert_transfer(reqh);
1402 1.16 augustss splx(s);
1403 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1404 1.16 augustss return (r);
1405 1.16 augustss else
1406 1.16 augustss return (uhci_device_intr_start(reqh));
1407 1.16 augustss }
1408 1.16 augustss
1409 1.16 augustss usbd_status
1410 1.16 augustss uhci_device_intr_start(reqh)
1411 1.16 augustss usbd_request_handle reqh;
1412 1.16 augustss {
1413 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1414 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1415 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1416 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1417 1.1 augustss uhci_soft_td_t *xfer, *xferend;
1418 1.1 augustss uhci_soft_qh_t *sqh;
1419 1.7 augustss usb_dma_t *dmap;
1420 1.1 augustss usbd_status r;
1421 1.1 augustss int len, i;
1422 1.1 augustss int s;
1423 1.1 augustss
1424 1.12 augustss DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d "
1425 1.12 augustss "flags=%d\n",
1426 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags));
1427 1.1 augustss
1428 1.1 augustss if (reqh->isreq)
1429 1.1 augustss panic("uhci_device_intr_transfer: a request\n");
1430 1.1 augustss
1431 1.1 augustss len = reqh->length;
1432 1.1 augustss dmap = &upipe->u.intr.datadma;
1433 1.1 augustss if (len == 0)
1434 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
1435 1.1 augustss
1436 1.7 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1437 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1438 1.1 augustss goto ret1;
1439 1.18 augustss r = uhci_alloc_std_chain(upipe, sc, len, 1,
1440 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1441 1.18 augustss dmap, &xfer, &xferend);
1442 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1443 1.1 augustss goto ret2;
1444 1.1 augustss xferend->td->td_status |= UHCI_TD_IOC;
1445 1.1 augustss
1446 1.1 augustss #ifdef USB_DEBUG
1447 1.1 augustss if (uhcidebug > 10) {
1448 1.1 augustss printf("uhci_device_intr_transfer: xfer(1)\n");
1449 1.1 augustss uhci_dump_tds(xfer);
1450 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1451 1.1 augustss }
1452 1.1 augustss #endif
1453 1.1 augustss
1454 1.1 augustss s = splusb();
1455 1.1 augustss /* Set up interrupt info. */
1456 1.1 augustss ii->reqh = reqh;
1457 1.1 augustss ii->stdstart = xfer;
1458 1.1 augustss ii->stdend = xferend;
1459 1.7 augustss #ifdef DIAGNOSTIC
1460 1.7 augustss ii->isdone = 0;
1461 1.7 augustss #endif
1462 1.1 augustss
1463 1.12 augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
1464 1.12 augustss upipe->u.intr.qhs[0]));
1465 1.1 augustss for (i = 0; i < upipe->u.intr.npoll; i++) {
1466 1.1 augustss sqh = upipe->u.intr.qhs[i];
1467 1.1 augustss sqh->qh->elink = xfer;
1468 1.1 augustss sqh->qh->qh_elink = xfer->physaddr;
1469 1.1 augustss }
1470 1.1 augustss splx(s);
1471 1.1 augustss
1472 1.1 augustss #ifdef USB_DEBUG
1473 1.1 augustss if (uhcidebug > 10) {
1474 1.1 augustss printf("uhci_device_intr_transfer: xfer(2)\n");
1475 1.1 augustss uhci_dump_tds(xfer);
1476 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1477 1.1 augustss }
1478 1.1 augustss #endif
1479 1.1 augustss
1480 1.1 augustss return (USBD_IN_PROGRESS);
1481 1.1 augustss
1482 1.1 augustss ret2:
1483 1.1 augustss if (len != 0)
1484 1.7 augustss usb_freemem(sc->sc_dmatag, dmap);
1485 1.1 augustss ret1:
1486 1.1 augustss return (r);
1487 1.1 augustss }
1488 1.1 augustss
1489 1.1 augustss /* Abort a device control request. */
1490 1.1 augustss void
1491 1.1 augustss uhci_device_ctrl_abort(reqh)
1492 1.1 augustss usbd_request_handle reqh;
1493 1.1 augustss {
1494 1.6 augustss /* XXX inactivate */
1495 1.20 augustss usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
1496 1.6 augustss /* XXX call done */
1497 1.1 augustss }
1498 1.1 augustss
1499 1.1 augustss /* Close a device control pipe. */
1500 1.1 augustss void
1501 1.1 augustss uhci_device_ctrl_close(pipe)
1502 1.1 augustss usbd_pipe_handle pipe;
1503 1.1 augustss {
1504 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1505 1.1 augustss
1506 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1507 1.1 augustss /* XXX free other resources */
1508 1.1 augustss }
1509 1.1 augustss
1510 1.1 augustss /* Abort a device interrupt request. */
1511 1.1 augustss void
1512 1.1 augustss uhci_device_intr_abort(reqh)
1513 1.1 augustss usbd_request_handle reqh;
1514 1.1 augustss {
1515 1.1 augustss struct uhci_pipe *upipe;
1516 1.1 augustss
1517 1.7 augustss DPRINTFN(1, ("uhci_device_intr_abort: reqh=%p\n", reqh));
1518 1.6 augustss /* XXX inactivate */
1519 1.20 augustss usb_delay_ms(reqh->pipe->device->bus, 2); /* make sure it is done */
1520 1.24.4.2 thorpej if (reqh->pipe->repeat) {
1521 1.1 augustss DPRINTF(("uhci_device_intr_abort: remove\n"));
1522 1.24.4.2 thorpej reqh->pipe->repeat = 0;
1523 1.1 augustss upipe = (struct uhci_pipe *)reqh->pipe;
1524 1.1 augustss uhci_intr_done(upipe->u.intr.qhs[0]->intr_info);
1525 1.1 augustss }
1526 1.1 augustss }
1527 1.1 augustss
1528 1.1 augustss /* Close a device interrupt pipe. */
1529 1.1 augustss void
1530 1.1 augustss uhci_device_intr_close(pipe)
1531 1.1 augustss usbd_pipe_handle pipe;
1532 1.1 augustss {
1533 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1534 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1535 1.1 augustss int i, s, npoll;
1536 1.1 augustss
1537 1.1 augustss upipe->iinfo->stdstart = 0; /* inactive */
1538 1.1 augustss
1539 1.1 augustss /* Unlink descriptors from controller data structures. */
1540 1.1 augustss npoll = upipe->u.intr.npoll;
1541 1.1 augustss uhci_lock_frames(sc);
1542 1.1 augustss for (i = 0; i < npoll; i++)
1543 1.1 augustss uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos,
1544 1.1 augustss upipe->u.intr.qhs[i]);
1545 1.1 augustss uhci_unlock_frames(sc);
1546 1.1 augustss
1547 1.1 augustss /*
1548 1.1 augustss * We now have to wait for any activity on the physical
1549 1.1 augustss * descriptors to stop.
1550 1.1 augustss */
1551 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
1552 1.1 augustss
1553 1.1 augustss for(i = 0; i < npoll; i++)
1554 1.1 augustss uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
1555 1.24.4.2 thorpej free(upipe->u.intr.qhs, M_USBHC);
1556 1.1 augustss
1557 1.1 augustss s = splusb();
1558 1.1 augustss LIST_REMOVE(upipe->iinfo, list); /* remove from active list */
1559 1.1 augustss splx(s);
1560 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1561 1.1 augustss
1562 1.1 augustss /* XXX free other resources */
1563 1.1 augustss }
1564 1.1 augustss
1565 1.1 augustss usbd_status
1566 1.1 augustss uhci_device_request(reqh)
1567 1.1 augustss usbd_request_handle reqh;
1568 1.1 augustss {
1569 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1570 1.1 augustss usb_device_request_t *req = &reqh->request;
1571 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1572 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1573 1.1 augustss int addr = dev->address;
1574 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1575 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1576 1.1 augustss uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend;
1577 1.1 augustss uhci_soft_qh_t *sqh;
1578 1.7 augustss usb_dma_t *dmap;
1579 1.1 augustss int len;
1580 1.1 augustss u_int32_t ls;
1581 1.1 augustss usbd_status r;
1582 1.1 augustss int isread;
1583 1.1 augustss int s;
1584 1.1 augustss
1585 1.13 augustss DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
1586 1.12 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1587 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1588 1.1 augustss UGETW(req->wIndex), UGETW(req->wLength),
1589 1.1 augustss addr, endpt));
1590 1.1 augustss
1591 1.1 augustss ls = dev->lowspeed ? UHCI_TD_LS : 0;
1592 1.1 augustss isread = req->bmRequestType & UT_READ;
1593 1.1 augustss len = UGETW(req->wLength);
1594 1.1 augustss
1595 1.1 augustss setup = upipe->u.ctl.setup;
1596 1.1 augustss stat = upipe->u.ctl.stat;
1597 1.1 augustss sqh = upipe->u.ctl.sqh;
1598 1.1 augustss dmap = &upipe->u.ctl.datadma;
1599 1.1 augustss
1600 1.1 augustss /* Set up data transaction */
1601 1.1 augustss if (len != 0) {
1602 1.7 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1603 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1604 1.1 augustss goto ret1;
1605 1.1 augustss upipe->pipe.endpoint->toggle = 1;
1606 1.1 augustss r = uhci_alloc_std_chain(upipe, sc, len, isread,
1607 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1608 1.1 augustss dmap, &xfer, &xferend);
1609 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1610 1.1 augustss goto ret2;
1611 1.1 augustss next = xfer;
1612 1.2 drochner xferend->td->link.std = stat;
1613 1.1 augustss xferend->td->td_link = stat->physaddr;
1614 1.1 augustss } else {
1615 1.1 augustss next = stat;
1616 1.1 augustss }
1617 1.1 augustss upipe->u.ctl.length = len;
1618 1.1 augustss
1619 1.1 augustss memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
1620 1.1 augustss if (!isread && len != 0)
1621 1.1 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1622 1.1 augustss
1623 1.2 drochner setup->td->link.std = next;
1624 1.1 augustss setup->td->td_link = next->physaddr;
1625 1.1 augustss setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
1626 1.1 augustss setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr);
1627 1.1 augustss setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma);
1628 1.1 augustss
1629 1.2 drochner stat->td->link.std = 0;
1630 1.1 augustss stat->td->td_link = UHCI_PTR_T;
1631 1.1 augustss stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls |
1632 1.1 augustss UHCI_TD_ACTIVE | UHCI_TD_IOC;
1633 1.1 augustss stat->td->td_token =
1634 1.1 augustss isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
1635 1.1 augustss UHCI_TD_IN (0, endpt, addr, 1);
1636 1.1 augustss stat->td->td_buffer = 0;
1637 1.1 augustss
1638 1.1 augustss #ifdef USB_DEBUG
1639 1.1 augustss if (uhcidebug > 20) {
1640 1.1 augustss printf("uhci_device_request: setup\n");
1641 1.1 augustss uhci_dump_td(setup);
1642 1.1 augustss printf("uhci_device_request: stat\n");
1643 1.1 augustss uhci_dump_td(stat);
1644 1.1 augustss }
1645 1.1 augustss #endif
1646 1.1 augustss
1647 1.1 augustss /* Set up interrupt info. */
1648 1.1 augustss ii->reqh = reqh;
1649 1.1 augustss ii->stdstart = setup;
1650 1.1 augustss ii->stdend = stat;
1651 1.7 augustss #ifdef DIAGNOSTIC
1652 1.7 augustss ii->isdone = 0;
1653 1.7 augustss #endif
1654 1.1 augustss
1655 1.1 augustss sqh->qh->elink = setup;
1656 1.1 augustss sqh->qh->qh_elink = setup->physaddr;
1657 1.1 augustss sqh->intr_info = ii;
1658 1.1 augustss
1659 1.1 augustss s = splusb();
1660 1.1 augustss uhci_add_ctrl(sc, sqh);
1661 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1662 1.1 augustss #ifdef USB_DEBUG
1663 1.1 augustss if (uhcidebug > 12) {
1664 1.1 augustss uhci_soft_td_t *std;
1665 1.1 augustss uhci_soft_qh_t *xqh;
1666 1.13 augustss uhci_soft_qh_t *sxqh;
1667 1.13 augustss int maxqh = 0;
1668 1.1 augustss uhci_physaddr_t link;
1669 1.1 augustss printf("uhci_enter_ctl_q: follow from [0]\n");
1670 1.1 augustss for (std = sc->sc_vframes[0].htd, link = 0;
1671 1.1 augustss (link & UHCI_PTR_Q) == 0;
1672 1.1 augustss std = std->td->link.std) {
1673 1.1 augustss link = std->td->td_link;
1674 1.1 augustss uhci_dump_td(std);
1675 1.1 augustss }
1676 1.13 augustss for (sxqh = xqh = (uhci_soft_qh_t *)std;
1677 1.1 augustss xqh;
1678 1.13 augustss xqh = (maxqh++ == 5 || xqh->qh->hlink==sxqh ||
1679 1.13 augustss xqh->qh->hlink==xqh ? NULL : xqh->qh->hlink)) {
1680 1.1 augustss uhci_dump_qh(xqh);
1681 1.13 augustss uhci_dump_qh(sxqh);
1682 1.13 augustss }
1683 1.1 augustss printf("Enqueued QH:\n");
1684 1.1 augustss uhci_dump_qh(sqh);
1685 1.1 augustss uhci_dump_tds(sqh->qh->elink);
1686 1.1 augustss }
1687 1.1 augustss #endif
1688 1.13 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1689 1.13 augustss usb_timeout(uhci_timeout, ii,
1690 1.13 augustss MS_TO_TICKS(reqh->timeout), ii->timeout_handle);
1691 1.13 augustss }
1692 1.1 augustss splx(s);
1693 1.1 augustss
1694 1.1 augustss return (USBD_NORMAL_COMPLETION);
1695 1.1 augustss
1696 1.1 augustss ret2:
1697 1.1 augustss if (len != 0)
1698 1.7 augustss usb_freemem(sc->sc_dmatag, dmap);
1699 1.1 augustss ret1:
1700 1.1 augustss return (r);
1701 1.1 augustss }
1702 1.1 augustss
1703 1.16 augustss usbd_status
1704 1.16 augustss uhci_device_isoc_transfer(reqh)
1705 1.16 augustss usbd_request_handle reqh;
1706 1.16 augustss {
1707 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1708 1.19 augustss #ifdef USB_DEBUG
1709 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
1710 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1711 1.19 augustss #endif
1712 1.16 augustss
1713 1.16 augustss DPRINTFN(1,("uhci_device_isoc_transfer: sc=%p\n", sc));
1714 1.16 augustss if (upipe->u.iso.bufsize == 0)
1715 1.16 augustss return (USBD_INVAL);
1716 1.16 augustss
1717 1.16 augustss /* XXX copy data */
1718 1.16 augustss return (USBD_XXX);
1719 1.16 augustss }
1720 1.16 augustss
1721 1.16 augustss usbd_status
1722 1.16 augustss uhci_device_isoc_start(reqh)
1723 1.16 augustss usbd_request_handle reqh;
1724 1.16 augustss {
1725 1.16 augustss return (USBD_XXX);
1726 1.16 augustss }
1727 1.16 augustss
1728 1.16 augustss void
1729 1.16 augustss uhci_device_isoc_abort(reqh)
1730 1.16 augustss usbd_request_handle reqh;
1731 1.16 augustss {
1732 1.16 augustss /* XXX Can't abort a single request. */
1733 1.16 augustss }
1734 1.16 augustss
1735 1.16 augustss void
1736 1.16 augustss uhci_device_isoc_close(pipe)
1737 1.16 augustss usbd_pipe_handle pipe;
1738 1.16 augustss {
1739 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1740 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
1741 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1742 1.16 augustss struct iso *iso;
1743 1.16 augustss int i;
1744 1.16 augustss
1745 1.16 augustss /*
1746 1.16 augustss * Make sure all TDs are marked as inactive.
1747 1.16 augustss * Wait for completion.
1748 1.16 augustss * Unschedule.
1749 1.16 augustss * Deallocate.
1750 1.16 augustss */
1751 1.16 augustss iso = &upipe->u.iso;
1752 1.16 augustss
1753 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
1754 1.16 augustss iso->stds[i]->td->td_status &= ~UHCI_TD_ACTIVE;
1755 1.20 augustss usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
1756 1.16 augustss
1757 1.16 augustss uhci_lock_frames(sc);
1758 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
1759 1.16 augustss uhci_soft_td_t *std, *vstd;
1760 1.16 augustss
1761 1.16 augustss std = iso->stds[i];
1762 1.16 augustss for (vstd = sc->sc_vframes[i % UHCI_VFRAMELIST_COUNT].htd;
1763 1.16 augustss vstd && vstd->td->link.std != std;
1764 1.16 augustss vstd = vstd->td->link.std)
1765 1.16 augustss ;
1766 1.16 augustss if (!vstd) {
1767 1.16 augustss /*panic*/
1768 1.16 augustss printf("uhci_device_isoc_close: %p not found\n", std);
1769 1.16 augustss uhci_unlock_frames(sc);
1770 1.16 augustss return;
1771 1.16 augustss }
1772 1.16 augustss vstd->td->link = std->td->link;
1773 1.16 augustss vstd->td->td_link = std->td->td_link;
1774 1.16 augustss uhci_free_std(sc, std);
1775 1.16 augustss }
1776 1.16 augustss uhci_unlock_frames(sc);
1777 1.16 augustss
1778 1.16 augustss for (i = 0; i < iso->nbuf; i++)
1779 1.16 augustss usb_freemem(sc->sc_dmatag, &iso->bufs[i]);
1780 1.24.4.2 thorpej free(iso->stds, M_USBHC);
1781 1.24.4.2 thorpej free(iso->bufs, M_USBHC);
1782 1.16 augustss
1783 1.16 augustss /* XXX what else? */
1784 1.16 augustss }
1785 1.16 augustss
1786 1.16 augustss usbd_status
1787 1.16 augustss uhci_device_isoc_setbuf(pipe, bufsize, nbuf)
1788 1.16 augustss usbd_pipe_handle pipe;
1789 1.16 augustss u_int bufsize;
1790 1.16 augustss u_int nbuf;
1791 1.16 augustss {
1792 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1793 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
1794 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1795 1.16 augustss int addr = upipe->pipe.device->address;
1796 1.16 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1797 1.16 augustss int rd = upipe->pipe.endpoint->edesc->bEndpointAddress & UE_IN;
1798 1.16 augustss struct iso *iso;
1799 1.16 augustss int i;
1800 1.16 augustss usbd_status r;
1801 1.16 augustss
1802 1.16 augustss /*
1803 1.16 augustss * For simplicity the number of buffers must fit nicely in the frame
1804 1.16 augustss * list.
1805 1.16 augustss */
1806 1.16 augustss if (UHCI_VFRAMELIST_COUNT % nbuf != 0)
1807 1.16 augustss return (USBD_INVAL);
1808 1.16 augustss
1809 1.16 augustss iso = &upipe->u.iso;
1810 1.16 augustss iso->bufsize = bufsize;
1811 1.16 augustss iso->nbuf = nbuf;
1812 1.16 augustss
1813 1.16 augustss /* Allocate memory for buffers. */
1814 1.24.4.2 thorpej iso->bufs = malloc(nbuf * sizeof(usb_dma_t), M_USBHC, M_WAITOK);
1815 1.16 augustss iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
1816 1.24.4.2 thorpej M_USBHC, M_WAITOK);
1817 1.16 augustss
1818 1.16 augustss for (i = 0; i < nbuf; i++) {
1819 1.16 augustss r = usb_allocmem(sc->sc_dmatag, bufsize, 0, &iso->bufs[i]);
1820 1.16 augustss if (r != USBD_NORMAL_COMPLETION) {
1821 1.16 augustss nbuf = i;
1822 1.16 augustss goto bad1;
1823 1.16 augustss }
1824 1.16 augustss }
1825 1.16 augustss
1826 1.16 augustss /* Allocate the TDs. */
1827 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
1828 1.16 augustss iso->stds[i] = uhci_alloc_std(sc);
1829 1.16 augustss if (iso->stds[i] == 0)
1830 1.16 augustss goto bad2;
1831 1.16 augustss }
1832 1.16 augustss
1833 1.16 augustss /* XXX check schedule */
1834 1.16 augustss
1835 1.16 augustss /* XXX interrupts */
1836 1.16 augustss
1837 1.16 augustss /* Insert TDs into schedule, all marked inactive. */
1838 1.16 augustss uhci_lock_frames(sc);
1839 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
1840 1.16 augustss uhci_soft_td_t *std, *vstd;
1841 1.16 augustss
1842 1.16 augustss std = iso->stds[i];
1843 1.16 augustss std->td->td_status = UHCI_TD_IOS; /* iso, inactive */
1844 1.16 augustss std->td->td_token =
1845 1.16 augustss rd ? UHCI_TD_IN (0, endpt, addr, 0) :
1846 1.16 augustss UHCI_TD_OUT(0, endpt, addr, 0);
1847 1.16 augustss std->td->td_buffer = DMAADDR(&iso->bufs[i % nbuf]);
1848 1.16 augustss
1849 1.16 augustss vstd = sc->sc_vframes[i % UHCI_VFRAMELIST_COUNT].htd;
1850 1.16 augustss std->td->link = vstd->td->link;
1851 1.16 augustss std->td->td_link = vstd->td->td_link;
1852 1.16 augustss vstd->td->link.std = std;
1853 1.16 augustss vstd->td->td_link = std->physaddr;
1854 1.16 augustss }
1855 1.16 augustss uhci_unlock_frames(sc);
1856 1.16 augustss
1857 1.16 augustss return (USBD_NORMAL_COMPLETION);
1858 1.16 augustss
1859 1.16 augustss bad2:
1860 1.16 augustss while (--i >= 0)
1861 1.16 augustss uhci_free_std(sc, iso->stds[i]);
1862 1.16 augustss bad1:
1863 1.16 augustss for (i = 0; i < nbuf; i++)
1864 1.16 augustss usb_freemem(sc->sc_dmatag, &iso->bufs[i]);
1865 1.24.4.2 thorpej free(iso->stds, M_USBHC);
1866 1.24.4.2 thorpej free(iso->bufs, M_USBHC);
1867 1.16 augustss return (USBD_NOMEM);
1868 1.16 augustss }
1869 1.16 augustss
1870 1.16 augustss void
1871 1.16 augustss uhci_isoc_done(ii)
1872 1.16 augustss uhci_intr_info_t *ii;
1873 1.16 augustss {
1874 1.16 augustss }
1875 1.16 augustss
1876 1.1 augustss void
1877 1.1 augustss uhci_intr_done(ii)
1878 1.1 augustss uhci_intr_info_t *ii;
1879 1.1 augustss {
1880 1.1 augustss uhci_softc_t *sc = ii->sc;
1881 1.1 augustss usbd_request_handle reqh = ii->reqh;
1882 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1883 1.7 augustss usb_dma_t *dma;
1884 1.1 augustss uhci_soft_qh_t *sqh;
1885 1.1 augustss int i, npoll;
1886 1.1 augustss
1887 1.1 augustss DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen));
1888 1.1 augustss
1889 1.1 augustss dma = &upipe->u.intr.datadma;
1890 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
1891 1.1 augustss npoll = upipe->u.intr.npoll;
1892 1.1 augustss for(i = 0; i < npoll; i++) {
1893 1.1 augustss sqh = upipe->u.intr.qhs[i];
1894 1.1 augustss sqh->qh->elink = 0;
1895 1.1 augustss sqh->qh->qh_elink = UHCI_PTR_T;
1896 1.1 augustss }
1897 1.1 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
1898 1.1 augustss
1899 1.1 augustss /* XXX Wasteful. */
1900 1.24.4.2 thorpej if (reqh->pipe->repeat) {
1901 1.1 augustss uhci_soft_td_t *xfer, *xferend;
1902 1.1 augustss
1903 1.1 augustss /* This alloc cannot fail since we freed the chain above. */
1904 1.18 augustss uhci_alloc_std_chain(upipe, sc, reqh->length, 1,
1905 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1906 1.18 augustss dma, &xfer, &xferend);
1907 1.1 augustss xferend->td->td_status |= UHCI_TD_IOC;
1908 1.1 augustss
1909 1.1 augustss #ifdef USB_DEBUG
1910 1.1 augustss if (uhcidebug > 10) {
1911 1.1 augustss printf("uhci_device_intr_done: xfer(1)\n");
1912 1.1 augustss uhci_dump_tds(xfer);
1913 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1914 1.1 augustss }
1915 1.1 augustss #endif
1916 1.1 augustss
1917 1.1 augustss ii->stdstart = xfer;
1918 1.1 augustss ii->stdend = xferend;
1919 1.7 augustss #ifdef DIAGNOSTIC
1920 1.7 augustss ii->isdone = 0;
1921 1.7 augustss #endif
1922 1.1 augustss for (i = 0; i < npoll; i++) {
1923 1.1 augustss sqh = upipe->u.intr.qhs[i];
1924 1.1 augustss sqh->qh->elink = xfer;
1925 1.1 augustss sqh->qh->qh_elink = xfer->physaddr;
1926 1.1 augustss }
1927 1.1 augustss } else {
1928 1.7 augustss usb_freemem(sc->sc_dmatag, dma);
1929 1.1 augustss ii->stdstart = 0; /* mark as inactive */
1930 1.16 augustss usb_start_next(reqh->pipe);
1931 1.1 augustss }
1932 1.1 augustss }
1933 1.1 augustss
1934 1.1 augustss /* Deallocate request data structures */
1935 1.1 augustss void
1936 1.1 augustss uhci_ctrl_done(ii)
1937 1.1 augustss uhci_intr_info_t *ii;
1938 1.1 augustss {
1939 1.1 augustss uhci_softc_t *sc = ii->sc;
1940 1.1 augustss usbd_request_handle reqh = ii->reqh;
1941 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1942 1.1 augustss u_int len = upipe->u.ctl.length;
1943 1.7 augustss usb_dma_t *dma;
1944 1.1 augustss uhci_td_t *htd = ii->stdstart->td;
1945 1.1 augustss
1946 1.7 augustss #ifdef DIAGNOSTIC
1947 1.1 augustss if (!reqh->isreq)
1948 1.1 augustss panic("uhci_ctrl_done: not a request\n");
1949 1.7 augustss #endif
1950 1.1 augustss
1951 1.1 augustss LIST_REMOVE(ii, list); /* remove from active list */
1952 1.1 augustss
1953 1.1 augustss uhci_remove_ctrl(sc, upipe->u.ctl.sqh);
1954 1.1 augustss
1955 1.1 augustss if (len != 0) {
1956 1.1 augustss dma = &upipe->u.ctl.datadma;
1957 1.1 augustss if (reqh->request.bmRequestType & UT_READ)
1958 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), len);
1959 1.1 augustss uhci_free_std_chain(sc, htd->link.std, ii->stdend);
1960 1.7 augustss usb_freemem(sc->sc_dmatag, dma);
1961 1.1 augustss }
1962 1.1 augustss DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen));
1963 1.1 augustss }
1964 1.1 augustss
1965 1.1 augustss /* Deallocate request data structures */
1966 1.1 augustss void
1967 1.1 augustss uhci_bulk_done(ii)
1968 1.1 augustss uhci_intr_info_t *ii;
1969 1.1 augustss {
1970 1.1 augustss uhci_softc_t *sc = ii->sc;
1971 1.1 augustss usbd_request_handle reqh = ii->reqh;
1972 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1973 1.24.4.3 thorpej uhci_soft_td_t *std;
1974 1.24.4.3 thorpej u_int datalen = upipe->u.bulk.length;
1975 1.7 augustss usb_dma_t *dma;
1976 1.1 augustss
1977 1.1 augustss LIST_REMOVE(ii, list); /* remove from active list */
1978 1.1 augustss
1979 1.1 augustss uhci_remove_bulk(sc, upipe->u.bulk.sqh);
1980 1.1 augustss
1981 1.24.4.3 thorpej /* find the toggle for the last transfer and invert it */
1982 1.24.4.3 thorpej for (std = ii->stdstart; std; std = std->td->link.std) {
1983 1.24.4.3 thorpej if (std->td->td_status & UHCI_TD_ACTIVE)
1984 1.24.4.3 thorpej break;
1985 1.24.4.3 thorpej upipe->nexttoggle = UHCI_TD_GET_DT(std->td->td_token);
1986 1.1 augustss }
1987 1.24.4.3 thorpej upipe->nexttoggle ^= 1;
1988 1.24.4.3 thorpej
1989 1.24.4.3 thorpej /* copy the data from dma memory to userland storage */
1990 1.24.4.3 thorpej dma = &upipe->u.bulk.datadma;
1991 1.24.4.3 thorpej if (upipe->u.bulk.isread)
1992 1.24.4.3 thorpej memcpy(reqh->buffer, KERNADDR(dma), datalen);
1993 1.24.4.3 thorpej uhci_free_std_chain(sc, ii->stdstart, 0);
1994 1.24.4.3 thorpej usb_freemem(sc->sc_dmatag, dma);
1995 1.24.4.3 thorpej
1996 1.1 augustss DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen));
1997 1.1 augustss }
1998 1.1 augustss
1999 1.1 augustss /* Add interrupt QH, called with vflock. */
2000 1.1 augustss void
2001 1.1 augustss uhci_add_intr(sc, n, sqh)
2002 1.1 augustss uhci_softc_t *sc;
2003 1.1 augustss int n;
2004 1.1 augustss uhci_soft_qh_t *sqh;
2005 1.1 augustss {
2006 1.1 augustss struct uhci_vframe *vf = &sc->sc_vframes[n];
2007 1.1 augustss uhci_qh_t *eqh;
2008 1.1 augustss
2009 1.1 augustss DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh));
2010 1.1 augustss eqh = vf->eqh->qh;
2011 1.1 augustss sqh->qh->hlink = eqh->hlink;
2012 1.1 augustss sqh->qh->qh_hlink = eqh->qh_hlink;
2013 1.1 augustss eqh->hlink = sqh;
2014 1.1 augustss eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
2015 1.1 augustss vf->eqh = sqh;
2016 1.1 augustss vf->bandwidth++;
2017 1.1 augustss }
2018 1.1 augustss
2019 1.1 augustss /* Remove interrupt QH, called with vflock. */
2020 1.1 augustss void
2021 1.1 augustss uhci_remove_intr(sc, n, sqh)
2022 1.1 augustss uhci_softc_t *sc;
2023 1.1 augustss int n;
2024 1.1 augustss uhci_soft_qh_t *sqh;
2025 1.1 augustss {
2026 1.1 augustss struct uhci_vframe *vf = &sc->sc_vframes[n];
2027 1.1 augustss uhci_soft_qh_t *pqh;
2028 1.1 augustss
2029 1.1 augustss DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh));
2030 1.1 augustss
2031 1.1 augustss for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink)
2032 1.1 augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
2033 1.1 augustss if (pqh->qh->qh_hlink & UHCI_PTR_T) {
2034 1.1 augustss printf("uhci_remove_intr: QH not found\n");
2035 1.1 augustss return;
2036 1.1 augustss }
2037 1.1 augustss #else
2038 1.1 augustss ;
2039 1.1 augustss #endif
2040 1.1 augustss pqh->qh->hlink = sqh->qh->hlink;
2041 1.1 augustss pqh->qh->qh_hlink = sqh->qh->qh_hlink;
2042 1.1 augustss if (vf->eqh == sqh)
2043 1.1 augustss vf->eqh = pqh;
2044 1.1 augustss vf->bandwidth--;
2045 1.1 augustss }
2046 1.1 augustss
2047 1.1 augustss usbd_status
2048 1.1 augustss uhci_device_setintr(sc, upipe, ival)
2049 1.1 augustss uhci_softc_t *sc;
2050 1.1 augustss struct uhci_pipe *upipe;
2051 1.1 augustss int ival;
2052 1.1 augustss {
2053 1.1 augustss uhci_soft_qh_t *sqh;
2054 1.1 augustss int i, npoll, s;
2055 1.1 augustss u_int bestbw, bw, bestoffs, offs;
2056 1.1 augustss
2057 1.1 augustss DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
2058 1.1 augustss if (ival == 0) {
2059 1.1 augustss printf("uhci_setintr: 0 interval\n");
2060 1.1 augustss return (USBD_INVAL);
2061 1.1 augustss }
2062 1.1 augustss
2063 1.1 augustss if (ival > UHCI_VFRAMELIST_COUNT)
2064 1.1 augustss ival = UHCI_VFRAMELIST_COUNT;
2065 1.1 augustss npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2066 1.1 augustss DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
2067 1.1 augustss
2068 1.1 augustss upipe->u.intr.npoll = npoll;
2069 1.1 augustss upipe->u.intr.qhs =
2070 1.24.4.2 thorpej malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2071 1.1 augustss
2072 1.1 augustss /*
2073 1.1 augustss * Figure out which offset in the schedule that has most
2074 1.1 augustss * bandwidth left over.
2075 1.1 augustss */
2076 1.1 augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2077 1.1 augustss for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2078 1.1 augustss for (bw = i = 0; i < npoll; i++)
2079 1.1 augustss bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2080 1.1 augustss if (bw < bestbw) {
2081 1.1 augustss bestbw = bw;
2082 1.1 augustss bestoffs = offs;
2083 1.1 augustss }
2084 1.1 augustss }
2085 1.1 augustss DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2086 1.1 augustss
2087 1.1 augustss upipe->iinfo->stdstart = 0;
2088 1.1 augustss for(i = 0; i < npoll; i++) {
2089 1.1 augustss upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2090 1.1 augustss sqh->qh->elink = 0;
2091 1.1 augustss sqh->qh->qh_elink = UHCI_PTR_T;
2092 1.1 augustss sqh->pos = MOD(i * ival + bestoffs);
2093 1.1 augustss sqh->intr_info = upipe->iinfo;
2094 1.1 augustss }
2095 1.1 augustss #undef MOD
2096 1.1 augustss
2097 1.1 augustss s = splusb();
2098 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list);
2099 1.1 augustss splx(s);
2100 1.1 augustss
2101 1.1 augustss uhci_lock_frames(sc);
2102 1.1 augustss /* Enter QHs into the controller data structures. */
2103 1.1 augustss for(i = 0; i < npoll; i++)
2104 1.1 augustss uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos,
2105 1.1 augustss upipe->u.intr.qhs[i]);
2106 1.1 augustss uhci_unlock_frames(sc);
2107 1.1 augustss
2108 1.1 augustss DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
2109 1.1 augustss return (USBD_NORMAL_COMPLETION);
2110 1.1 augustss }
2111 1.1 augustss
2112 1.1 augustss /* Open a new pipe. */
2113 1.1 augustss usbd_status
2114 1.1 augustss uhci_open(pipe)
2115 1.1 augustss usbd_pipe_handle pipe;
2116 1.1 augustss {
2117 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2118 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2119 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2120 1.1 augustss usbd_status r;
2121 1.1 augustss
2122 1.1 augustss DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2123 1.1 augustss pipe, pipe->device->address,
2124 1.1 augustss ed->bEndpointAddress, sc->sc_addr));
2125 1.1 augustss if (pipe->device->address == sc->sc_addr) {
2126 1.1 augustss switch (ed->bEndpointAddress) {
2127 1.1 augustss case USB_CONTROL_ENDPOINT:
2128 1.1 augustss pipe->methods = &uhci_root_ctrl_methods;
2129 1.1 augustss break;
2130 1.1 augustss case UE_IN | UHCI_INTR_ENDPT:
2131 1.1 augustss pipe->methods = &uhci_root_intr_methods;
2132 1.1 augustss break;
2133 1.1 augustss default:
2134 1.1 augustss return (USBD_INVAL);
2135 1.1 augustss }
2136 1.1 augustss } else {
2137 1.1 augustss upipe->iinfo = uhci_alloc_intr_info(sc);
2138 1.1 augustss if (upipe->iinfo == 0)
2139 1.1 augustss return (USBD_NOMEM);
2140 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
2141 1.1 augustss case UE_CONTROL:
2142 1.1 augustss pipe->methods = &uhci_device_ctrl_methods;
2143 1.1 augustss upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2144 1.1 augustss if (upipe->u.ctl.sqh == 0)
2145 1.5 augustss goto bad;
2146 1.1 augustss upipe->u.ctl.setup = uhci_alloc_std(sc);
2147 1.5 augustss if (upipe->u.ctl.setup == 0) {
2148 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2149 1.5 augustss goto bad;
2150 1.5 augustss }
2151 1.1 augustss upipe->u.ctl.stat = uhci_alloc_std(sc);
2152 1.5 augustss if (upipe->u.ctl.stat == 0) {
2153 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2154 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2155 1.5 augustss goto bad;
2156 1.5 augustss }
2157 1.7 augustss r = usb_allocmem(sc->sc_dmatag,
2158 1.7 augustss sizeof(usb_device_request_t),
2159 1.7 augustss 0, &upipe->u.ctl.reqdma);
2160 1.5 augustss if (r != USBD_NORMAL_COMPLETION) {
2161 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2162 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2163 1.5 augustss uhci_free_std(sc, upipe->u.ctl.stat);
2164 1.5 augustss goto bad;
2165 1.5 augustss }
2166 1.1 augustss break;
2167 1.1 augustss case UE_INTERRUPT:
2168 1.1 augustss pipe->methods = &uhci_device_intr_methods;
2169 1.1 augustss return (uhci_device_setintr(sc, upipe, ed->bInterval));
2170 1.1 augustss case UE_ISOCHRONOUS:
2171 1.16 augustss pipe->methods = &uhci_device_isoc_methods;
2172 1.16 augustss upipe->u.iso.nbuf = 0;
2173 1.16 augustss return (USBD_NORMAL_COMPLETION);
2174 1.1 augustss case UE_BULK:
2175 1.1 augustss pipe->methods = &uhci_device_bulk_methods;
2176 1.1 augustss upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2177 1.1 augustss if (upipe->u.bulk.sqh == 0)
2178 1.5 augustss goto bad;
2179 1.1 augustss break;
2180 1.1 augustss }
2181 1.1 augustss }
2182 1.1 augustss return (USBD_NORMAL_COMPLETION);
2183 1.5 augustss
2184 1.5 augustss bad:
2185 1.5 augustss uhci_free_intr_info(upipe->iinfo);
2186 1.5 augustss return (USBD_NOMEM);
2187 1.1 augustss }
2188 1.1 augustss
2189 1.1 augustss /*
2190 1.1 augustss * Data structures and routines to emulate the root hub.
2191 1.1 augustss */
2192 1.1 augustss usb_device_descriptor_t uhci_devd = {
2193 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2194 1.1 augustss UDESC_DEVICE, /* type */
2195 1.1 augustss {0x00, 0x01}, /* USB version */
2196 1.1 augustss UCLASS_HUB, /* class */
2197 1.1 augustss USUBCLASS_HUB, /* subclass */
2198 1.1 augustss 0, /* protocol */
2199 1.1 augustss 64, /* max packet */
2200 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2201 1.1 augustss 1,2,0, /* string indicies */
2202 1.1 augustss 1 /* # of configurations */
2203 1.1 augustss };
2204 1.1 augustss
2205 1.1 augustss usb_config_descriptor_t uhci_confd = {
2206 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2207 1.1 augustss UDESC_CONFIG,
2208 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2209 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2210 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2211 1.1 augustss 1,
2212 1.1 augustss 1,
2213 1.1 augustss 0,
2214 1.1 augustss UC_SELF_POWERED,
2215 1.1 augustss 0 /* max power */
2216 1.1 augustss };
2217 1.1 augustss
2218 1.1 augustss usb_interface_descriptor_t uhci_ifcd = {
2219 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2220 1.1 augustss UDESC_INTERFACE,
2221 1.1 augustss 0,
2222 1.1 augustss 0,
2223 1.1 augustss 1,
2224 1.1 augustss UCLASS_HUB,
2225 1.1 augustss USUBCLASS_HUB,
2226 1.1 augustss 0,
2227 1.1 augustss 0
2228 1.1 augustss };
2229 1.1 augustss
2230 1.1 augustss usb_endpoint_descriptor_t uhci_endpd = {
2231 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
2232 1.1 augustss UDESC_ENDPOINT,
2233 1.1 augustss UE_IN | UHCI_INTR_ENDPT,
2234 1.1 augustss UE_INTERRUPT,
2235 1.1 augustss {8},
2236 1.1 augustss 255
2237 1.1 augustss };
2238 1.1 augustss
2239 1.1 augustss usb_hub_descriptor_t uhci_hubd_piix = {
2240 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
2241 1.1 augustss UDESC_HUB,
2242 1.1 augustss 2,
2243 1.1 augustss { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2244 1.1 augustss 50, /* power on to power good */
2245 1.1 augustss 0,
2246 1.1 augustss { 0x00 }, /* both ports are removable */
2247 1.1 augustss };
2248 1.1 augustss
2249 1.1 augustss int
2250 1.1 augustss uhci_str(p, l, s)
2251 1.1 augustss usb_string_descriptor_t *p;
2252 1.1 augustss int l;
2253 1.1 augustss char *s;
2254 1.1 augustss {
2255 1.1 augustss int i;
2256 1.1 augustss
2257 1.1 augustss if (l == 0)
2258 1.1 augustss return (0);
2259 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2260 1.1 augustss if (l == 1)
2261 1.1 augustss return (1);
2262 1.1 augustss p->bDescriptorType = UDESC_STRING;
2263 1.1 augustss l -= 2;
2264 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2265 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2266 1.1 augustss return (2*i+2);
2267 1.1 augustss }
2268 1.1 augustss
2269 1.1 augustss /*
2270 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2271 1.1 augustss */
2272 1.1 augustss usbd_status
2273 1.1 augustss uhci_root_ctrl_transfer(reqh)
2274 1.1 augustss usbd_request_handle reqh;
2275 1.1 augustss {
2276 1.16 augustss int s;
2277 1.16 augustss usbd_status r;
2278 1.16 augustss
2279 1.16 augustss s = splusb();
2280 1.16 augustss r = usb_insert_transfer(reqh);
2281 1.16 augustss splx(s);
2282 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
2283 1.16 augustss return (r);
2284 1.16 augustss else
2285 1.16 augustss return (uhci_root_ctrl_start(reqh));
2286 1.16 augustss }
2287 1.16 augustss
2288 1.16 augustss usbd_status
2289 1.16 augustss uhci_root_ctrl_start(reqh)
2290 1.16 augustss usbd_request_handle reqh;
2291 1.16 augustss {
2292 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
2293 1.1 augustss usb_device_request_t *req;
2294 1.1 augustss void *buf;
2295 1.1 augustss int port, x;
2296 1.1 augustss int len, value, index, status, change, l, totlen = 0;
2297 1.1 augustss usb_port_status_t ps;
2298 1.1 augustss usbd_status r;
2299 1.1 augustss
2300 1.1 augustss if (!reqh->isreq)
2301 1.1 augustss panic("uhci_root_ctrl_transfer: not a request\n");
2302 1.1 augustss req = &reqh->request;
2303 1.1 augustss buf = reqh->buffer;
2304 1.1 augustss
2305 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
2306 1.1 augustss req->bmRequestType, req->bRequest));
2307 1.1 augustss
2308 1.1 augustss len = UGETW(req->wLength);
2309 1.1 augustss value = UGETW(req->wValue);
2310 1.1 augustss index = UGETW(req->wIndex);
2311 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2312 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2313 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2314 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2315 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2316 1.1 augustss /*
2317 1.13 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2318 1.1 augustss * for the integrated root hub.
2319 1.1 augustss */
2320 1.1 augustss break;
2321 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2322 1.1 augustss if (len > 0) {
2323 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2324 1.1 augustss totlen = 1;
2325 1.1 augustss }
2326 1.1 augustss break;
2327 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2328 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
2329 1.1 augustss switch(value >> 8) {
2330 1.1 augustss case UDESC_DEVICE:
2331 1.1 augustss if ((value & 0xff) != 0) {
2332 1.1 augustss r = USBD_IOERROR;
2333 1.1 augustss goto ret;
2334 1.1 augustss }
2335 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2336 1.24.4.1 thorpej USETW(uhci_devd.idVendor, sc->sc_id_vendor);
2337 1.1 augustss memcpy(buf, &uhci_devd, l);
2338 1.1 augustss break;
2339 1.1 augustss case UDESC_CONFIG:
2340 1.1 augustss if ((value & 0xff) != 0) {
2341 1.1 augustss r = USBD_IOERROR;
2342 1.1 augustss goto ret;
2343 1.1 augustss }
2344 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2345 1.1 augustss memcpy(buf, &uhci_confd, l);
2346 1.1 augustss buf = (char *)buf + l;
2347 1.1 augustss len -= l;
2348 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2349 1.1 augustss totlen += l;
2350 1.1 augustss memcpy(buf, &uhci_ifcd, l);
2351 1.1 augustss buf = (char *)buf + l;
2352 1.1 augustss len -= l;
2353 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2354 1.1 augustss totlen += l;
2355 1.1 augustss memcpy(buf, &uhci_endpd, l);
2356 1.1 augustss break;
2357 1.1 augustss case UDESC_STRING:
2358 1.1 augustss if (len == 0)
2359 1.1 augustss break;
2360 1.1 augustss *(u_int8_t *)buf = 0;
2361 1.1 augustss totlen = 1;
2362 1.1 augustss switch (value & 0xff) {
2363 1.1 augustss case 1: /* Vendor */
2364 1.8 augustss totlen = uhci_str(buf, len, sc->sc_vendor);
2365 1.1 augustss break;
2366 1.1 augustss case 2: /* Product */
2367 1.8 augustss totlen = uhci_str(buf, len, "UHCI root hub");
2368 1.1 augustss break;
2369 1.1 augustss }
2370 1.1 augustss break;
2371 1.1 augustss default:
2372 1.1 augustss r = USBD_IOERROR;
2373 1.1 augustss goto ret;
2374 1.1 augustss }
2375 1.1 augustss break;
2376 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2377 1.1 augustss if (len > 0) {
2378 1.1 augustss *(u_int8_t *)buf = 0;
2379 1.1 augustss totlen = 1;
2380 1.1 augustss }
2381 1.1 augustss break;
2382 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2383 1.1 augustss if (len > 1) {
2384 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2385 1.1 augustss totlen = 2;
2386 1.1 augustss }
2387 1.1 augustss break;
2388 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2389 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2390 1.1 augustss if (len > 1) {
2391 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2392 1.1 augustss totlen = 2;
2393 1.1 augustss }
2394 1.1 augustss break;
2395 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2396 1.1 augustss if (value >= USB_MAX_DEVICES) {
2397 1.1 augustss r = USBD_IOERROR;
2398 1.1 augustss goto ret;
2399 1.1 augustss }
2400 1.1 augustss sc->sc_addr = value;
2401 1.1 augustss break;
2402 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2403 1.1 augustss if (value != 0 && value != 1) {
2404 1.1 augustss r = USBD_IOERROR;
2405 1.1 augustss goto ret;
2406 1.1 augustss }
2407 1.1 augustss sc->sc_conf = value;
2408 1.1 augustss break;
2409 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2410 1.1 augustss break;
2411 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2412 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2413 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2414 1.1 augustss r = USBD_IOERROR;
2415 1.1 augustss goto ret;
2416 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2417 1.1 augustss break;
2418 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2419 1.1 augustss break;
2420 1.1 augustss /* Hub requests */
2421 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2422 1.1 augustss break;
2423 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2424 1.12 augustss DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2425 1.12 augustss "port=%d feature=%d\n",
2426 1.1 augustss index, value));
2427 1.1 augustss if (index == 1)
2428 1.1 augustss port = UHCI_PORTSC1;
2429 1.1 augustss else if (index == 2)
2430 1.1 augustss port = UHCI_PORTSC2;
2431 1.1 augustss else {
2432 1.1 augustss r = USBD_IOERROR;
2433 1.1 augustss goto ret;
2434 1.1 augustss }
2435 1.1 augustss switch(value) {
2436 1.1 augustss case UHF_PORT_ENABLE:
2437 1.1 augustss x = UREAD2(sc, port);
2438 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
2439 1.1 augustss break;
2440 1.1 augustss case UHF_PORT_SUSPEND:
2441 1.1 augustss x = UREAD2(sc, port);
2442 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
2443 1.1 augustss break;
2444 1.1 augustss case UHF_PORT_RESET:
2445 1.1 augustss x = UREAD2(sc, port);
2446 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2447 1.1 augustss break;
2448 1.1 augustss case UHF_C_PORT_CONNECTION:
2449 1.1 augustss x = UREAD2(sc, port);
2450 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
2451 1.1 augustss break;
2452 1.1 augustss case UHF_C_PORT_ENABLE:
2453 1.1 augustss x = UREAD2(sc, port);
2454 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
2455 1.1 augustss break;
2456 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2457 1.1 augustss x = UREAD2(sc, port);
2458 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
2459 1.1 augustss break;
2460 1.1 augustss case UHF_C_PORT_RESET:
2461 1.1 augustss sc->sc_isreset = 0;
2462 1.1 augustss r = USBD_NORMAL_COMPLETION;
2463 1.1 augustss goto ret;
2464 1.1 augustss case UHF_PORT_CONNECTION:
2465 1.1 augustss case UHF_PORT_OVER_CURRENT:
2466 1.1 augustss case UHF_PORT_POWER:
2467 1.1 augustss case UHF_PORT_LOW_SPEED:
2468 1.1 augustss case UHF_C_PORT_SUSPEND:
2469 1.1 augustss default:
2470 1.1 augustss r = USBD_IOERROR;
2471 1.1 augustss goto ret;
2472 1.1 augustss }
2473 1.1 augustss break;
2474 1.1 augustss case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
2475 1.1 augustss if (index == 1)
2476 1.1 augustss port = UHCI_PORTSC1;
2477 1.1 augustss else if (index == 2)
2478 1.1 augustss port = UHCI_PORTSC2;
2479 1.1 augustss else {
2480 1.1 augustss r = USBD_IOERROR;
2481 1.1 augustss goto ret;
2482 1.1 augustss }
2483 1.1 augustss if (len > 0) {
2484 1.1 augustss *(u_int8_t *)buf =
2485 1.1 augustss (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
2486 1.1 augustss UHCI_PORTSC_LS_SHIFT;
2487 1.1 augustss totlen = 1;
2488 1.1 augustss }
2489 1.1 augustss break;
2490 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2491 1.1 augustss if (value != 0) {
2492 1.1 augustss r = USBD_IOERROR;
2493 1.1 augustss goto ret;
2494 1.1 augustss }
2495 1.1 augustss l = min(len, USB_HUB_DESCRIPTOR_SIZE);
2496 1.1 augustss totlen = l;
2497 1.1 augustss memcpy(buf, &uhci_hubd_piix, l);
2498 1.1 augustss break;
2499 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2500 1.1 augustss if (len != 4) {
2501 1.1 augustss r = USBD_IOERROR;
2502 1.1 augustss goto ret;
2503 1.1 augustss }
2504 1.1 augustss memset(buf, 0, len);
2505 1.1 augustss totlen = len;
2506 1.1 augustss break;
2507 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2508 1.1 augustss if (index == 1)
2509 1.1 augustss port = UHCI_PORTSC1;
2510 1.1 augustss else if (index == 2)
2511 1.1 augustss port = UHCI_PORTSC2;
2512 1.1 augustss else {
2513 1.1 augustss r = USBD_IOERROR;
2514 1.1 augustss goto ret;
2515 1.1 augustss }
2516 1.1 augustss if (len != 4) {
2517 1.1 augustss r = USBD_IOERROR;
2518 1.1 augustss goto ret;
2519 1.1 augustss }
2520 1.1 augustss x = UREAD2(sc, port);
2521 1.1 augustss status = change = 0;
2522 1.1 augustss if (x & UHCI_PORTSC_CCS )
2523 1.1 augustss status |= UPS_CURRENT_CONNECT_STATUS;
2524 1.1 augustss if (x & UHCI_PORTSC_CSC )
2525 1.1 augustss change |= UPS_C_CONNECT_STATUS;
2526 1.1 augustss if (x & UHCI_PORTSC_PE )
2527 1.1 augustss status |= UPS_PORT_ENABLED;
2528 1.1 augustss if (x & UHCI_PORTSC_POEDC)
2529 1.1 augustss change |= UPS_C_PORT_ENABLED;
2530 1.1 augustss if (x & UHCI_PORTSC_OCI )
2531 1.1 augustss status |= UPS_OVERCURRENT_INDICATOR;
2532 1.1 augustss if (x & UHCI_PORTSC_OCIC )
2533 1.1 augustss change |= UPS_C_OVERCURRENT_INDICATOR;
2534 1.1 augustss if (x & UHCI_PORTSC_SUSP )
2535 1.1 augustss status |= UPS_SUSPEND;
2536 1.1 augustss if (x & UHCI_PORTSC_LSDA )
2537 1.1 augustss status |= UPS_LOW_SPEED;
2538 1.1 augustss status |= UPS_PORT_POWER;
2539 1.1 augustss if (sc->sc_isreset)
2540 1.1 augustss change |= UPS_C_PORT_RESET;
2541 1.1 augustss USETW(ps.wPortStatus, status);
2542 1.1 augustss USETW(ps.wPortChange, change);
2543 1.1 augustss l = min(len, sizeof ps);
2544 1.1 augustss memcpy(buf, &ps, l);
2545 1.1 augustss totlen = l;
2546 1.1 augustss break;
2547 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2548 1.1 augustss r = USBD_IOERROR;
2549 1.1 augustss goto ret;
2550 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2551 1.1 augustss break;
2552 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2553 1.1 augustss if (index == 1)
2554 1.1 augustss port = UHCI_PORTSC1;
2555 1.1 augustss else if (index == 2)
2556 1.1 augustss port = UHCI_PORTSC2;
2557 1.1 augustss else {
2558 1.1 augustss r = USBD_IOERROR;
2559 1.1 augustss goto ret;
2560 1.1 augustss }
2561 1.1 augustss switch(value) {
2562 1.1 augustss case UHF_PORT_ENABLE:
2563 1.1 augustss x = UREAD2(sc, port);
2564 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2565 1.1 augustss break;
2566 1.1 augustss case UHF_PORT_SUSPEND:
2567 1.1 augustss x = UREAD2(sc, port);
2568 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
2569 1.1 augustss break;
2570 1.1 augustss case UHF_PORT_RESET:
2571 1.1 augustss x = UREAD2(sc, port);
2572 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2573 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
2574 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2575 1.1 augustss delay(100);
2576 1.1 augustss x = UREAD2(sc, port);
2577 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2578 1.1 augustss delay(100);
2579 1.1 augustss DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
2580 1.1 augustss index, UREAD2(sc, port)));
2581 1.1 augustss sc->sc_isreset = 1;
2582 1.1 augustss break;
2583 1.1 augustss case UHF_C_PORT_CONNECTION:
2584 1.1 augustss case UHF_C_PORT_ENABLE:
2585 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2586 1.1 augustss case UHF_PORT_CONNECTION:
2587 1.1 augustss case UHF_PORT_OVER_CURRENT:
2588 1.1 augustss case UHF_PORT_POWER:
2589 1.1 augustss case UHF_PORT_LOW_SPEED:
2590 1.1 augustss case UHF_C_PORT_SUSPEND:
2591 1.1 augustss case UHF_C_PORT_RESET:
2592 1.1 augustss default:
2593 1.1 augustss r = USBD_IOERROR;
2594 1.1 augustss goto ret;
2595 1.1 augustss }
2596 1.1 augustss break;
2597 1.1 augustss default:
2598 1.1 augustss r = USBD_IOERROR;
2599 1.1 augustss goto ret;
2600 1.1 augustss }
2601 1.1 augustss reqh->actlen = totlen;
2602 1.1 augustss r = USBD_NORMAL_COMPLETION;
2603 1.1 augustss ret:
2604 1.1 augustss reqh->status = r;
2605 1.1 augustss reqh->xfercb(reqh);
2606 1.16 augustss usb_start_next(reqh->pipe);
2607 1.1 augustss return (USBD_IN_PROGRESS);
2608 1.1 augustss }
2609 1.1 augustss
2610 1.1 augustss /* Abort a root control request. */
2611 1.1 augustss void
2612 1.1 augustss uhci_root_ctrl_abort(reqh)
2613 1.1 augustss usbd_request_handle reqh;
2614 1.1 augustss {
2615 1.6 augustss /* Nothing to do, all transfers are syncronous. */
2616 1.1 augustss }
2617 1.1 augustss
2618 1.1 augustss /* Close the root pipe. */
2619 1.1 augustss void
2620 1.1 augustss uhci_root_ctrl_close(pipe)
2621 1.1 augustss usbd_pipe_handle pipe;
2622 1.1 augustss {
2623 1.24.4.2 thorpej uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2624 1.24.4.2 thorpej
2625 1.13 augustss usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle);
2626 1.24.4.2 thorpej sc->sc_has_timo = 0;
2627 1.1 augustss DPRINTF(("uhci_root_ctrl_close\n"));
2628 1.1 augustss }
2629 1.1 augustss
2630 1.1 augustss /* Abort a root interrupt request. */
2631 1.1 augustss void
2632 1.1 augustss uhci_root_intr_abort(reqh)
2633 1.1 augustss usbd_request_handle reqh;
2634 1.1 augustss {
2635 1.24.4.2 thorpej uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
2636 1.24.4.2 thorpej
2637 1.13 augustss usb_untimeout(uhci_timo, reqh, reqh->timo_handle);
2638 1.24.4.2 thorpej sc->sc_has_timo = 0;
2639 1.1 augustss }
2640 1.1 augustss
2641 1.16 augustss usbd_status
2642 1.16 augustss uhci_root_intr_transfer(reqh)
2643 1.16 augustss usbd_request_handle reqh;
2644 1.16 augustss {
2645 1.16 augustss int s;
2646 1.16 augustss usbd_status r;
2647 1.16 augustss
2648 1.16 augustss s = splusb();
2649 1.16 augustss r = usb_insert_transfer(reqh);
2650 1.16 augustss splx(s);
2651 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
2652 1.16 augustss return (r);
2653 1.16 augustss else
2654 1.16 augustss return (uhci_root_intr_start(reqh));
2655 1.16 augustss }
2656 1.16 augustss
2657 1.1 augustss /* Start a transfer on the root interrupt pipe */
2658 1.1 augustss usbd_status
2659 1.16 augustss uhci_root_intr_start(reqh)
2660 1.1 augustss usbd_request_handle reqh;
2661 1.1 augustss {
2662 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
2663 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2664 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2665 1.7 augustss usb_dma_t *dmap;
2666 1.1 augustss usbd_status r;
2667 1.1 augustss int len;
2668 1.1 augustss
2669 1.12 augustss DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d "
2670 1.12 augustss "flags=%d\n",
2671 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags));
2672 1.1 augustss
2673 1.1 augustss len = reqh->length;
2674 1.1 augustss dmap = &upipe->u.intr.datadma;
2675 1.1 augustss if (len == 0)
2676 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
2677 1.1 augustss
2678 1.7 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2679 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
2680 1.1 augustss return (r);
2681 1.1 augustss
2682 1.1 augustss sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval);
2683 1.13 augustss usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
2684 1.24.4.2 thorpej sc->sc_has_timo = reqh;
2685 1.1 augustss return (USBD_IN_PROGRESS);
2686 1.1 augustss }
2687 1.1 augustss
2688 1.1 augustss /* Close the root interrupt pipe. */
2689 1.1 augustss void
2690 1.1 augustss uhci_root_intr_close(pipe)
2691 1.1 augustss usbd_pipe_handle pipe;
2692 1.1 augustss {
2693 1.24.4.2 thorpej uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2694 1.24.4.2 thorpej
2695 1.13 augustss usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle);
2696 1.24.4.2 thorpej sc->sc_has_timo = 0;
2697 1.1 augustss DPRINTF(("uhci_root_intr_close\n"));
2698 1.1 augustss }
2699 1.24.4.1 thorpej
2700