Home | History | Annotate | Line # | Download | only in usb
uhci.c revision 1.240.6.14
      1  1.240.6.14       mrg /*	$NetBSD: uhci.c,v 1.240.6.14 2012/02/25 20:46:33 mrg Exp $	*/
      2        1.67  augustss /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
      3         1.1  augustss 
      4         1.1  augustss /*
      5  1.240.6.12       mrg  * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc.
      6         1.1  augustss  * All rights reserved.
      7         1.1  augustss  *
      8        1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      9       1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
     10   1.240.6.2       mrg  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     11  1.240.6.12       mrg  * and Matthew R. Green (mrg (at) eterna.com.au).
     12         1.1  augustss  *
     13         1.1  augustss  * Redistribution and use in source and binary forms, with or without
     14         1.1  augustss  * modification, are permitted provided that the following conditions
     15         1.1  augustss  * are met:
     16         1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     17         1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     18         1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     19         1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     20         1.1  augustss  *    documentation and/or other materials provided with the distribution.
     21         1.1  augustss  *
     22         1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     23         1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     24         1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     25         1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     26         1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     27         1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     28         1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     29         1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     30         1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     31         1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     32         1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     33         1.1  augustss  */
     34         1.1  augustss 
     35         1.1  augustss /*
     36         1.1  augustss  * USB Universal Host Controller driver.
     37        1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     38         1.1  augustss  *
     39       1.229  uebayasi  * UHCI spec: http://www.intel.com/technology/usb/spec.htm
     40       1.229  uebayasi  * USB spec: http://www.usb.org/developers/docs/
     41        1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     42        1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     43         1.1  augustss  */
     44       1.143     lukem 
     45       1.143     lukem #include <sys/cdefs.h>
     46  1.240.6.14       mrg __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.240.6.14 2012/02/25 20:46:33 mrg Exp $");
     47       1.239      matt 
     48       1.239      matt #include "opt_usb.h"
     49         1.1  augustss 
     50         1.1  augustss #include <sys/param.h>
     51         1.1  augustss #include <sys/systm.h>
     52         1.1  augustss #include <sys/kernel.h>
     53   1.240.6.2       mrg #include <sys/kmem.h>
     54         1.1  augustss #include <sys/device.h>
     55        1.67  augustss #include <sys/select.h>
     56       1.183      fvdl #include <sys/extent.h>
     57         1.1  augustss #include <sys/proc.h>
     58         1.1  augustss #include <sys/queue.h>
     59       1.211        ad #include <sys/bus.h>
     60  1.240.6.14       mrg #include <sys/cpu.h>
     61         1.1  augustss 
     62        1.39  augustss #include <machine/endian.h>
     63         1.7  augustss 
     64         1.1  augustss #include <dev/usb/usb.h>
     65         1.1  augustss #include <dev/usb/usbdi.h>
     66         1.1  augustss #include <dev/usb/usbdivar.h>
     67         1.7  augustss #include <dev/usb/usb_mem.h>
     68         1.1  augustss #include <dev/usb/usb_quirks.h>
     69         1.1  augustss 
     70         1.1  augustss #include <dev/usb/uhcireg.h>
     71         1.1  augustss #include <dev/usb/uhcivar.h>
     72       1.213  drochner #include <dev/usb/usbroothub_subr.h>
     73         1.1  augustss 
     74       1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     75       1.125  augustss /*#define UHCI_CTL_LOOP */
     76       1.125  augustss 
     77        1.13  augustss 
     78        1.37  augustss 
     79        1.67  augustss #ifdef UHCI_DEBUG
     80        1.92  augustss uhci_softc_t *thesc;
     81        1.59  augustss #define DPRINTF(x)	if (uhcidebug) printf x
     82        1.59  augustss #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
     83        1.67  augustss int uhcidebug = 0;
     84       1.125  augustss int uhcinoloop = 0;
     85        1.59  augustss #else
     86        1.59  augustss #define DPRINTF(x)
     87        1.59  augustss #define DPRINTFN(n,x)
     88        1.59  augustss #endif
     89        1.59  augustss 
     90        1.39  augustss /*
     91        1.39  augustss  * The UHCI controller is little endian, so on big endian machines
     92       1.181  drochner  * the data stored in memory needs to be swapped.
     93        1.39  augustss  */
     94        1.39  augustss 
     95         1.1  augustss struct uhci_pipe {
     96         1.1  augustss 	struct usbd_pipe pipe;
     97        1.32  augustss 	int nexttoggle;
     98        1.92  augustss 
     99        1.92  augustss 	u_char aborting;
    100        1.92  augustss 	usbd_xfer_handle abortstart, abortend;
    101        1.92  augustss 
    102         1.1  augustss 	/* Info needed for different pipe kinds. */
    103         1.1  augustss 	union {
    104         1.1  augustss 		/* Control pipe */
    105         1.1  augustss 		struct {
    106         1.1  augustss 			uhci_soft_qh_t *sqh;
    107         1.7  augustss 			usb_dma_t reqdma;
    108        1.16  augustss 			uhci_soft_td_t *setup, *stat;
    109         1.1  augustss 			u_int length;
    110         1.1  augustss 		} ctl;
    111         1.1  augustss 		/* Interrupt pipe */
    112         1.1  augustss 		struct {
    113         1.1  augustss 			int npoll;
    114       1.187     skrll 			int isread;
    115         1.1  augustss 			uhci_soft_qh_t **qhs;
    116         1.1  augustss 		} intr;
    117         1.1  augustss 		/* Bulk pipe */
    118         1.1  augustss 		struct {
    119         1.1  augustss 			uhci_soft_qh_t *sqh;
    120         1.1  augustss 			u_int length;
    121         1.1  augustss 			int isread;
    122         1.1  augustss 		} bulk;
    123        1.16  augustss 		/* Iso pipe */
    124        1.16  augustss 		struct iso {
    125        1.16  augustss 			uhci_soft_td_t **stds;
    126        1.48  augustss 			int next, inuse;
    127        1.16  augustss 		} iso;
    128         1.1  augustss 	} u;
    129         1.1  augustss };
    130         1.1  augustss 
    131       1.142  augustss Static void		uhci_globalreset(uhci_softc_t *);
    132       1.166   dsainty Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    133       1.142  augustss Static void		uhci_reset(uhci_softc_t *);
    134       1.119  augustss Static usbd_status	uhci_run(uhci_softc_t *, int run);
    135       1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    136       1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    137       1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    138       1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    139        1.16  augustss #if 0
    140       1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    141       1.119  augustss 					 uhci_intr_info_t *);
    142       1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    143        1.16  augustss #endif
    144         1.1  augustss 
    145       1.152  augustss Static void		uhci_free_std_chain(uhci_softc_t *,
    146       1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    147       1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    148       1.152  augustss 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
    149       1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    150       1.119  augustss Static void		uhci_poll_hub(void *);
    151       1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    152       1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    153       1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    154       1.119  augustss 
    155       1.119  augustss Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    156       1.119  augustss 
    157       1.119  augustss Static void		uhci_timeout(void *);
    158       1.153  augustss Static void		uhci_timeout_task(void *);
    159       1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    160       1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    161       1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    162       1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    163       1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    164       1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    165       1.123  augustss Static void		uhci_add_loop(uhci_softc_t *sc);
    166       1.123  augustss Static void		uhci_rem_loop(uhci_softc_t *sc);
    167       1.119  augustss 
    168       1.119  augustss Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    169       1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    170       1.119  augustss 
    171       1.119  augustss Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    172       1.119  augustss Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
    173       1.119  augustss 
    174       1.119  augustss Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    175       1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    176  1.240.6.10       mrg Static void		uhci_get_lock(struct usbd_bus *, kmutex_t **);
    177       1.119  augustss 
    178       1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    179       1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    180       1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    181       1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    182       1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    183       1.119  augustss 
    184       1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    185       1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    186       1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    187       1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    188       1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    189       1.119  augustss 
    190       1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    191       1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    192       1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    193       1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    194       1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    195       1.119  augustss 
    196       1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    197       1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    198       1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    199       1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    200       1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    201       1.119  augustss 
    202       1.119  augustss Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    203       1.119  augustss Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    204       1.119  augustss Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    205       1.119  augustss Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    206       1.119  augustss Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    207       1.119  augustss 
    208       1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    209       1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    210       1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    211       1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    212       1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    213       1.119  augustss 
    214       1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    215       1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    216       1.133  augustss Static void		uhci_softintr(void *);
    217       1.119  augustss 
    218       1.119  augustss Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    219       1.119  augustss 
    220       1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    221       1.158  augustss Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    222       1.152  augustss Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    223       1.119  augustss 			    struct uhci_pipe *pipe, int ival);
    224       1.119  augustss 
    225       1.119  augustss Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    226       1.119  augustss Static void		uhci_noop(usbd_pipe_handle pipe);
    227       1.119  augustss 
    228       1.240  jakllsch static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    229       1.119  augustss 						    uhci_soft_qh_t *);
    230       1.119  augustss 
    231       1.119  augustss #ifdef UHCI_DEBUG
    232       1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    233       1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    234       1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    235       1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    236       1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    237       1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    238       1.119  augustss Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    239       1.119  augustss void			uhci_dump(void);
    240         1.1  augustss #endif
    241         1.1  augustss 
    242       1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    243       1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    244       1.112  augustss #define UWRITE1(sc, r, x) \
    245       1.165   dsainty  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    246       1.165   dsainty  } while (/*CONSTCOND*/0)
    247       1.112  augustss #define UWRITE2(sc, r, x) \
    248       1.165   dsainty  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    249       1.165   dsainty  } while (/*CONSTCOND*/0)
    250       1.112  augustss #define UWRITE4(sc, r, x) \
    251       1.165   dsainty  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    252       1.165   dsainty  } while (/*CONSTCOND*/0)
    253       1.196       mrg static __inline uint8_t
    254       1.196       mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
    255       1.196       mrg {
    256       1.196       mrg 
    257       1.196       mrg 	UBARR(sc);
    258       1.196       mrg 	return bus_space_read_1(sc->iot, sc->ioh, r);
    259       1.196       mrg }
    260       1.196       mrg 
    261       1.196       mrg static __inline uint16_t
    262       1.196       mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
    263       1.196       mrg {
    264       1.196       mrg 
    265       1.196       mrg 	UBARR(sc);
    266       1.196       mrg 	return bus_space_read_2(sc->iot, sc->ioh, r);
    267       1.196       mrg }
    268       1.196       mrg 
    269       1.196       mrg static __inline uint32_t
    270       1.196       mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
    271       1.196       mrg {
    272       1.196       mrg 
    273       1.196       mrg 	UBARR(sc);
    274       1.196       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    275       1.196       mrg }
    276         1.1  augustss 
    277         1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    278         1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    279         1.1  augustss 
    280       1.142  augustss #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    281         1.1  augustss 
    282         1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    283         1.1  augustss 
    284         1.1  augustss #define UHCI_INTR_ENDPT 1
    285         1.1  augustss 
    286       1.208  drochner const struct usbd_bus_methods uhci_bus_methods = {
    287   1.240.6.5       mrg 	.open_pipe =	uhci_open,
    288   1.240.6.5       mrg 	.soft_intr =	uhci_softintr,
    289   1.240.6.5       mrg 	.do_poll =	uhci_poll,
    290   1.240.6.5       mrg 	.allocm =	uhci_allocm,
    291   1.240.6.5       mrg 	.freem =	uhci_freem,
    292   1.240.6.5       mrg 	.allocx =	uhci_allocx,
    293   1.240.6.5       mrg 	.freex =	uhci_freex,
    294  1.240.6.10       mrg 	.get_lock =	uhci_get_lock,
    295        1.48  augustss };
    296        1.48  augustss 
    297       1.208  drochner const struct usbd_pipe_methods uhci_root_ctrl_methods = {
    298   1.240.6.5       mrg 	.transfer =	uhci_root_ctrl_transfer,
    299   1.240.6.5       mrg 	.start =	uhci_root_ctrl_start,
    300   1.240.6.5       mrg 	.abort =	uhci_root_ctrl_abort,
    301   1.240.6.5       mrg 	.close =	uhci_root_ctrl_close,
    302   1.240.6.5       mrg 	.cleartoggle =	uhci_noop,
    303   1.240.6.5       mrg 	.done =		uhci_root_ctrl_done,
    304         1.1  augustss };
    305         1.1  augustss 
    306       1.208  drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
    307   1.240.6.5       mrg 	.transfer =	uhci_root_intr_transfer,
    308   1.240.6.5       mrg 	.start =	uhci_root_intr_start,
    309   1.240.6.5       mrg 	.abort =	uhci_root_intr_abort,
    310   1.240.6.5       mrg 	.close =	uhci_root_intr_close,
    311   1.240.6.5       mrg 	.cleartoggle =	uhci_noop,
    312   1.240.6.5       mrg 	.done =		uhci_root_intr_done,
    313         1.1  augustss };
    314         1.1  augustss 
    315       1.208  drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    316   1.240.6.5       mrg 	.transfer =	uhci_device_ctrl_transfer,
    317   1.240.6.5       mrg 	.start =	uhci_device_ctrl_start,
    318   1.240.6.5       mrg 	.abort =	uhci_device_ctrl_abort,
    319   1.240.6.5       mrg 	.close =	uhci_device_ctrl_close,
    320   1.240.6.5       mrg 	.cleartoggle =	uhci_noop,
    321   1.240.6.5       mrg 	.done =		uhci_device_ctrl_done,
    322         1.1  augustss };
    323         1.1  augustss 
    324       1.208  drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
    325   1.240.6.5       mrg 	.transfer =	uhci_device_intr_transfer,
    326   1.240.6.5       mrg 	.start =	uhci_device_intr_start,
    327   1.240.6.5       mrg 	.abort =	uhci_device_intr_abort,
    328   1.240.6.5       mrg 	.close =	uhci_device_intr_close,
    329   1.240.6.5       mrg 	.cleartoggle =	uhci_device_clear_toggle,
    330   1.240.6.5       mrg 	.done =		uhci_device_intr_done,
    331         1.1  augustss };
    332         1.1  augustss 
    333       1.208  drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
    334   1.240.6.5       mrg 	.transfer =	uhci_device_bulk_transfer,
    335   1.240.6.5       mrg 	.start =	uhci_device_bulk_start,
    336   1.240.6.5       mrg 	.abort =	uhci_device_bulk_abort,
    337   1.240.6.5       mrg 	.close =	uhci_device_bulk_close,
    338   1.240.6.5       mrg 	.cleartoggle =	uhci_device_clear_toggle,
    339   1.240.6.5       mrg 	.done =		uhci_device_bulk_done,
    340         1.1  augustss };
    341         1.1  augustss 
    342       1.208  drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
    343   1.240.6.5       mrg 	.transfer =	uhci_device_isoc_transfer,
    344   1.240.6.5       mrg 	.start =	uhci_device_isoc_start,
    345   1.240.6.5       mrg 	.abort =	uhci_device_isoc_abort,
    346   1.240.6.5       mrg 	.close =	uhci_device_isoc_close,
    347   1.240.6.5       mrg 	.cleartoggle =	uhci_noop,
    348   1.240.6.5       mrg 	.done =		uhci_device_isoc_done,
    349        1.16  augustss };
    350        1.16  augustss 
    351        1.92  augustss #define uhci_add_intr_info(sc, ii) \
    352       1.169  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    353        1.92  augustss #define uhci_del_intr_info(ii) \
    354       1.169  augustss 	do { \
    355       1.169  augustss 		LIST_REMOVE((ii), list); \
    356       1.169  augustss 		(ii)->list.le_prev = NULL; \
    357       1.169  augustss 	} while (0)
    358       1.169  augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    359        1.92  augustss 
    360       1.240  jakllsch static inline uhci_soft_qh_t *
    361       1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    362        1.92  augustss {
    363        1.92  augustss 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    364        1.92  augustss 
    365        1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    366       1.152  augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    367       1.223    bouyer 		usb_syncmem(&pqh->dma,
    368       1.223    bouyer 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    369       1.223    bouyer 		    sizeof(pqh->qh.qh_hlink),
    370       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
    371        1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    372       1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    373        1.92  augustss 			return (NULL);
    374        1.92  augustss 		}
    375        1.92  augustss #endif
    376        1.92  augustss 	}
    377        1.92  augustss 	return (pqh);
    378        1.92  augustss }
    379        1.92  augustss 
    380         1.1  augustss void
    381       1.142  augustss uhci_globalreset(uhci_softc_t *sc)
    382         1.1  augustss {
    383         1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    384        1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    385         1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    386         1.1  augustss }
    387         1.1  augustss 
    388         1.1  augustss usbd_status
    389       1.119  augustss uhci_init(uhci_softc_t *sc)
    390         1.1  augustss {
    391        1.63  augustss 	usbd_status err;
    392         1.1  augustss 	int i, j;
    393       1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    394         1.1  augustss 	uhci_soft_td_t *std;
    395         1.1  augustss 
    396         1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    397         1.1  augustss 
    398        1.67  augustss #ifdef UHCI_DEBUG
    399        1.92  augustss 	thesc = sc;
    400        1.92  augustss 
    401         1.1  augustss 	if (uhcidebug > 2)
    402         1.1  augustss 		uhci_dumpregs(sc);
    403         1.1  augustss #endif
    404         1.1  augustss 
    405       1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    406       1.219  jmcneill 
    407         1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    408       1.142  augustss 	uhci_globalreset(sc);			/* reset the controller */
    409       1.142  augustss 	uhci_reset(sc);
    410        1.24  augustss 
    411       1.218  drochner 	usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    412       1.183      fvdl 	    USB_MEM_RESERVE);
    413       1.183      fvdl 
    414         1.1  augustss 	/* Allocate and initialize real frame array. */
    415       1.152  augustss 	err = usb_allocmem(&sc->sc_bus,
    416        1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    417        1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    418        1.63  augustss 	if (err)
    419        1.63  augustss 		return (err);
    420       1.159  augustss 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    421         1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    422       1.160  augustss 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    423         1.1  augustss 
    424       1.152  augustss 	/*
    425       1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    426       1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    427       1.123  augustss 	 * otherwise.
    428       1.123  augustss 	 */
    429       1.123  augustss 	std = uhci_alloc_std(sc);
    430       1.123  augustss 	if (std == NULL)
    431       1.123  augustss 		return (USBD_NOMEM);
    432       1.123  augustss 	std->link.std = NULL;
    433       1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    434       1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    435       1.123  augustss 	std->td.td_token = htole32(0);
    436       1.123  augustss 	std->td.td_buffer = htole32(0);
    437       1.223    bouyer 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    438       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    439       1.123  augustss 
    440       1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    441       1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    442       1.123  augustss 	if (lsqh == NULL)
    443       1.123  augustss 		return (USBD_NOMEM);
    444       1.123  augustss 	lsqh->hlink = NULL;
    445       1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    446       1.123  augustss 	lsqh->elink = std;
    447       1.123  augustss 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    448       1.123  augustss 	sc->sc_last_qh = lsqh;
    449       1.223    bouyer 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    450       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    451       1.123  augustss 
    452         1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    453         1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    454        1.63  augustss 	if (bsqh == NULL)
    455         1.1  augustss 		return (USBD_NOMEM);
    456       1.123  augustss 	bsqh->hlink = lsqh;
    457       1.123  augustss 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    458       1.121  augustss 	bsqh->elink = NULL;
    459        1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    460         1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    461       1.223    bouyer 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    462       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    463         1.1  augustss 
    464       1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    465       1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    466       1.123  augustss 	if (chsqh == NULL)
    467       1.123  augustss 		return (USBD_NOMEM);
    468       1.123  augustss 	chsqh->hlink = bsqh;
    469       1.123  augustss 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    470       1.123  augustss 	chsqh->elink = NULL;
    471       1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    472       1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    473       1.223    bouyer 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    474       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    475       1.123  augustss 
    476       1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    477       1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    478       1.123  augustss 	if (clsqh == NULL)
    479         1.1  augustss 		return (USBD_NOMEM);
    480       1.220    bouyer 	clsqh->hlink = chsqh;
    481       1.123  augustss 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    482       1.123  augustss 	clsqh->elink = NULL;
    483       1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    484       1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    485       1.223    bouyer 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    486       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    487         1.1  augustss 
    488       1.152  augustss 	/*
    489         1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    490         1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    491         1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    492         1.1  augustss 	 */
    493         1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    494         1.1  augustss 		std = uhci_alloc_std(sc);
    495         1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    496        1.67  augustss 		if (std == NULL || sqh == NULL)
    497        1.13  augustss 			return (USBD_NOMEM);
    498        1.42  augustss 		std->link.sqh = sqh;
    499       1.121  augustss 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    500        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    501        1.88   tsutsui 		std->td.td_token = htole32(0);
    502        1.88   tsutsui 		std->td.td_buffer = htole32(0);
    503       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    504       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    505       1.123  augustss 		sqh->hlink = clsqh;
    506       1.123  augustss 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    507       1.121  augustss 		sqh->elink = NULL;
    508        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    509       1.223    bouyer 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    510       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    511         1.1  augustss 		sc->sc_vframes[i].htd = std;
    512         1.1  augustss 		sc->sc_vframes[i].etd = std;
    513         1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    514         1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    515       1.152  augustss 		for (j = i;
    516       1.152  augustss 		     j < UHCI_FRAMELIST_COUNT;
    517         1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    518        1.88   tsutsui 			sc->sc_pframes[j] = htole32(std->physaddr);
    519         1.1  augustss 	}
    520       1.223    bouyer 	usb_syncmem(&sc->sc_dma, 0,
    521       1.223    bouyer 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    522       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
    523       1.223    bouyer 
    524         1.1  augustss 
    525         1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    526         1.1  augustss 
    527        1.76  augustss 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    528        1.76  augustss 
    529   1.240.6.2       mrg 	callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE);
    530   1.240.6.2       mrg 
    531   1.240.6.2       mrg 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    532   1.240.6.6       mrg 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
    533   1.240.6.2       mrg 	cv_init(&sc->sc_softwake_cv, "uhciab");
    534        1.96  augustss 
    535         1.1  augustss 	/* Set up the bus struct. */
    536        1.48  augustss 	sc->sc_bus.methods = &uhci_bus_methods;
    537         1.1  augustss 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    538         1.1  augustss 
    539       1.190  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    540       1.190  augustss 
    541         1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    542       1.225    bouyer 
    543       1.225    bouyer 	err =  uhci_run(sc, 1);		/* and here we go... */
    544       1.152  augustss 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    545         1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    546       1.225    bouyer 	return err;
    547        1.53  augustss }
    548        1.53  augustss 
    549        1.53  augustss int
    550       1.215    dyoung uhci_activate(device_t self, enum devact act)
    551        1.53  augustss {
    552       1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    553        1.53  augustss 
    554        1.53  augustss 	switch (act) {
    555        1.53  augustss 	case DVACT_DEACTIVATE:
    556       1.210  kiyohara 		sc->sc_dying = 1;
    557       1.230    dyoung 		return 0;
    558       1.230    dyoung 	default:
    559       1.230    dyoung 		return EOPNOTSUPP;
    560        1.53  augustss 	}
    561        1.53  augustss }
    562        1.53  augustss 
    563       1.215    dyoung void
    564       1.215    dyoung uhci_childdet(device_t self, device_t child)
    565       1.215    dyoung {
    566       1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    567       1.215    dyoung 
    568       1.215    dyoung 	KASSERT(sc->sc_child == child);
    569       1.215    dyoung 	sc->sc_child = NULL;
    570       1.215    dyoung }
    571       1.215    dyoung 
    572        1.53  augustss int
    573       1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    574        1.53  augustss {
    575        1.76  augustss 	usbd_xfer_handle xfer;
    576        1.53  augustss 	int rv = 0;
    577        1.53  augustss 
    578        1.53  augustss 	if (sc->sc_child != NULL)
    579        1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    580       1.152  augustss 
    581        1.53  augustss 	if (rv != 0)
    582        1.53  augustss 		return (rv);
    583        1.53  augustss 
    584        1.76  augustss 	/* Free all xfers associated with this HC. */
    585        1.76  augustss 	for (;;) {
    586        1.76  augustss 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    587        1.76  augustss 		if (xfer == NULL)
    588        1.76  augustss 			break;
    589       1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    590   1.240.6.2       mrg 		kmem_free(xfer, sizeof(struct uhci_xfer));
    591       1.152  augustss 	}
    592        1.76  augustss 
    593       1.226        ad 	callout_halt(&sc->sc_poll_handle, NULL);
    594       1.226        ad 	callout_destroy(&sc->sc_poll_handle);
    595       1.226        ad 
    596   1.240.6.2       mrg 	cv_destroy(&sc->sc_softwake_cv);
    597   1.240.6.2       mrg 
    598   1.240.6.2       mrg 	mutex_destroy(&sc->sc_lock);
    599   1.240.6.2       mrg 	mutex_destroy(&sc->sc_intr_lock);
    600   1.240.6.2       mrg 
    601        1.76  augustss 	/* XXX free other data structures XXX */
    602        1.53  augustss 
    603        1.53  augustss 	return (rv);
    604         1.1  augustss }
    605         1.1  augustss 
    606        1.48  augustss usbd_status
    607       1.119  augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    608        1.48  augustss {
    609       1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    610       1.183      fvdl 	usbd_status status;
    611       1.102  augustss 	u_int32_t n;
    612       1.102  augustss 
    613       1.152  augustss 	/*
    614       1.102  augustss 	 * XXX
    615       1.102  augustss 	 * Since we are allocating a buffer we can assume that we will
    616       1.148  augustss 	 * need TDs for it.  Since we don't want to allocate those from
    617       1.102  augustss 	 * an interrupt context, we allocate them here and free them again.
    618       1.102  augustss 	 * This is no guarantee that we'll get the TDs next time...
    619       1.102  augustss 	 */
    620       1.102  augustss 	n = size / 8;
    621       1.102  augustss 	if (n > 16) {
    622       1.102  augustss 		u_int32_t i;
    623       1.102  augustss 		uhci_soft_td_t **stds;
    624   1.240.6.2       mrg 
    625       1.102  augustss 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
    626   1.240.6.2       mrg 		stds = kmem_alloc(sizeof(uhci_soft_td_t *) * n, KM_SLEEP);
    627   1.240.6.2       mrg 		if (!stds)
    628   1.240.6.2       mrg 			return USBD_NOMEM;
    629   1.240.6.2       mrg 		for(i = 0; i < n; i++)
    630       1.102  augustss 			stds[i] = uhci_alloc_std(sc);
    631   1.240.6.2       mrg 		for(i = 0; i < n; i++)
    632       1.102  augustss 			if (stds[i] != NULL)
    633       1.102  augustss 				uhci_free_std(sc, stds[i]);
    634   1.240.6.2       mrg 		kmem_free(stds, sizeof(uhci_soft_td_t *) * n);
    635       1.102  augustss 	}
    636       1.102  augustss 
    637       1.183      fvdl 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
    638       1.183      fvdl 	if (status == USBD_NOMEM)
    639       1.183      fvdl 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
    640       1.183      fvdl 	return status;
    641        1.48  augustss }
    642        1.48  augustss 
    643        1.48  augustss void
    644       1.119  augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    645        1.48  augustss {
    646       1.183      fvdl 	if (dma->block->flags & USB_DMA_RESERVE) {
    647       1.183      fvdl 		usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
    648       1.183      fvdl 		    dma);
    649       1.183      fvdl 		return;
    650       1.183      fvdl 	}
    651        1.63  augustss 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
    652        1.76  augustss }
    653        1.76  augustss 
    654        1.76  augustss usbd_xfer_handle
    655       1.119  augustss uhci_allocx(struct usbd_bus *bus)
    656        1.76  augustss {
    657       1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    658        1.76  augustss 	usbd_xfer_handle xfer;
    659        1.76  augustss 
    660        1.76  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    661        1.94  augustss 	if (xfer != NULL) {
    662       1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    663        1.98  augustss #ifdef DIAGNOSTIC
    664        1.94  augustss 		if (xfer->busy_free != XFER_FREE) {
    665       1.105  augustss 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    666        1.94  augustss 			       xfer->busy_free);
    667        1.94  augustss 		}
    668        1.98  augustss #endif
    669        1.94  augustss 	} else {
    670   1.240.6.2       mrg 		xfer = kmem_alloc(sizeof(struct uhci_xfer), KM_SLEEP);
    671        1.94  augustss 	}
    672        1.92  augustss 	if (xfer != NULL) {
    673       1.238   tsutsui 		memset(xfer, 0, sizeof (struct uhci_xfer));
    674       1.238   tsutsui 		UXFER(xfer)->iinfo.sc = sc;
    675        1.92  augustss #ifdef DIAGNOSTIC
    676       1.238   tsutsui 		UXFER(xfer)->iinfo.isdone = 1;
    677       1.135  augustss 		xfer->busy_free = XFER_BUSY;
    678        1.92  augustss #endif
    679        1.92  augustss 	}
    680        1.76  augustss 	return (xfer);
    681        1.76  augustss }
    682        1.76  augustss 
    683        1.76  augustss void
    684       1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    685        1.76  augustss {
    686       1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    687        1.76  augustss 
    688        1.93  augustss #ifdef DIAGNOSTIC
    689        1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
    690        1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    691        1.94  augustss 		       xfer->busy_free);
    692        1.93  augustss 	}
    693        1.94  augustss 	xfer->busy_free = XFER_FREE;
    694       1.238   tsutsui 	if (!UXFER(xfer)->iinfo.isdone) {
    695        1.96  augustss 		printf("uhci_freex: !isdone\n");
    696       1.105  augustss 	}
    697        1.93  augustss #endif
    698        1.76  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    699        1.48  augustss }
    700        1.48  augustss 
    701   1.240.6.2       mrg Static void
    702  1.240.6.11       mrg uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
    703   1.240.6.2       mrg {
    704   1.240.6.2       mrg 	struct uhci_softc *sc = bus->hci_private;
    705   1.240.6.2       mrg 
    706  1.240.6.11       mrg 	*lock = &sc->sc_lock;
    707   1.240.6.2       mrg }
    708   1.240.6.2       mrg 
    709   1.240.6.2       mrg 
    710        1.72  augustss /*
    711       1.212  jmcneill  * Handle suspend/resume.
    712       1.212  jmcneill  *
    713       1.212  jmcneill  * We need to switch to polling mode here, because this routine is
    714       1.212  jmcneill  * called from an interrupt context.  This is all right since we
    715       1.212  jmcneill  * are almost suspended anyway.
    716        1.72  augustss  */
    717       1.212  jmcneill bool
    718       1.232    dyoung uhci_resume(device_t dv, const pmf_qual_t *qual)
    719        1.72  augustss {
    720       1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    721       1.212  jmcneill 	int cmd;
    722        1.72  augustss 
    723   1.240.6.2       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
    724       1.193  augustss 
    725       1.212  jmcneill 	cmd = UREAD2(sc, UHCI_CMD);
    726       1.193  augustss 	sc->sc_bus.use_polling++;
    727       1.214       smb 	UWRITE2(sc, UHCI_INTR, 0);
    728       1.214       smb 	uhci_globalreset(sc);
    729       1.214       smb 	uhci_reset(sc);
    730       1.212  jmcneill 	if (cmd & UHCI_CMD_RS)
    731       1.212  jmcneill 		uhci_run(sc, 0);
    732       1.212  jmcneill 
    733       1.212  jmcneill 	/* restore saved state */
    734       1.212  jmcneill 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    735       1.212  jmcneill 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    736       1.212  jmcneill 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    737       1.212  jmcneill 
    738       1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
    739       1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    740       1.212  jmcneill 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    741       1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
    742       1.212  jmcneill 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
    743       1.214       smb 	UHCICMD(sc, UHCI_CMD_MAXP);
    744       1.212  jmcneill 	uhci_run(sc, 1); /* and start traffic again */
    745       1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    746       1.193  augustss 	sc->sc_bus.use_polling--;
    747       1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    748       1.234    dyoung 		callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
    749       1.212  jmcneill 		    sc->sc_intr_xfer);
    750       1.212  jmcneill #ifdef UHCI_DEBUG
    751       1.212  jmcneill 	if (uhcidebug > 2)
    752       1.212  jmcneill 		uhci_dumpregs(sc);
    753       1.212  jmcneill #endif
    754       1.212  jmcneill 
    755       1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    756   1.240.6.2       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
    757       1.212  jmcneill 
    758       1.212  jmcneill 	return true;
    759        1.72  augustss }
    760        1.72  augustss 
    761       1.212  jmcneill bool
    762       1.232    dyoung uhci_suspend(device_t dv, const pmf_qual_t *qual)
    763        1.30  augustss {
    764       1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    765        1.30  augustss 	int cmd;
    766        1.30  augustss 
    767   1.240.6.2       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
    768       1.212  jmcneill 
    769        1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    770        1.30  augustss 
    771       1.212  jmcneill #ifdef UHCI_DEBUG
    772       1.212  jmcneill 	if (uhcidebug > 2)
    773       1.212  jmcneill 		uhci_dumpregs(sc);
    774       1.212  jmcneill #endif
    775       1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    776       1.234    dyoung 		callout_stop(&sc->sc_poll_handle);
    777       1.219  jmcneill 	sc->sc_suspend = PWR_SUSPEND;
    778       1.212  jmcneill 	sc->sc_bus.use_polling++;
    779       1.219  jmcneill 
    780       1.212  jmcneill 	uhci_run(sc, 0); /* stop the controller */
    781       1.212  jmcneill 	cmd &= ~UHCI_CMD_RS;
    782       1.212  jmcneill 
    783       1.212  jmcneill 	/* save some state if BIOS doesn't */
    784       1.212  jmcneill 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    785       1.212  jmcneill 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    786       1.212  jmcneill 
    787       1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    788        1.30  augustss 
    789       1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
    790       1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    791       1.212  jmcneill 	sc->sc_bus.use_polling--;
    792        1.86  augustss 
    793   1.240.6.2       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
    794       1.212  jmcneill 
    795       1.212  jmcneill 	return true;
    796        1.30  augustss }
    797        1.30  augustss 
    798        1.59  augustss #ifdef UHCI_DEBUG
    799       1.101  augustss Static void
    800       1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
    801         1.1  augustss {
    802        1.48  augustss 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    803        1.48  augustss 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    804       1.216  drochner 		     device_xname(sc->sc_dev),
    805        1.48  augustss 		     UREAD2(sc, UHCI_CMD),
    806        1.48  augustss 		     UREAD2(sc, UHCI_STS),
    807        1.48  augustss 		     UREAD2(sc, UHCI_INTR),
    808        1.48  augustss 		     UREAD2(sc, UHCI_FRNUM),
    809        1.48  augustss 		     UREAD4(sc, UHCI_FLBASEADDR),
    810        1.48  augustss 		     UREAD1(sc, UHCI_SOF),
    811        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC1),
    812        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC2)));
    813         1.1  augustss }
    814         1.1  augustss 
    815         1.1  augustss void
    816       1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
    817         1.1  augustss {
    818       1.122        tv 	char sbuf[128], sbuf2[128];
    819       1.122        tv 
    820       1.223    bouyer 
    821       1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    822       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    823        1.48  augustss 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    824        1.48  augustss 		     "token=0x%08lx buffer=0x%08lx\n",
    825        1.48  augustss 		     p, (long)p->physaddr,
    826        1.88   tsutsui 		     (long)le32toh(p->td.td_link),
    827        1.88   tsutsui 		     (long)le32toh(p->td.td_status),
    828        1.88   tsutsui 		     (long)le32toh(p->td.td_token),
    829        1.88   tsutsui 		     (long)le32toh(p->td.td_buffer)));
    830       1.122        tv 
    831       1.224  christos 	snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF",
    832       1.224  christos 	    (u_int32_t)le32toh(p->td.td_link));
    833       1.224  christos 	snprintb(sbuf2, sizeof(sbuf2),
    834       1.224  christos 	    "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    835       1.224  christos 	    "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    836       1.224  christos 	    (u_int32_t)le32toh(p->td.td_status));
    837       1.122        tv 
    838       1.122        tv 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    839       1.122        tv 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    840        1.88   tsutsui 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    841        1.88   tsutsui 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    842        1.88   tsutsui 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    843        1.88   tsutsui 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    844        1.88   tsutsui 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    845        1.88   tsutsui 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    846        1.88   tsutsui 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    847       1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    848       1.223    bouyer 	    BUS_DMASYNC_PREREAD);
    849         1.1  augustss }
    850         1.1  augustss 
    851         1.1  augustss void
    852       1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
    853         1.1  augustss {
    854       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    855       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    856        1.67  augustss 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    857        1.88   tsutsui 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    858        1.88   tsutsui 	    le32toh(sqh->qh.qh_elink)));
    859       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    860         1.1  augustss }
    861         1.1  augustss 
    862        1.13  augustss 
    863       1.110  augustss #if 1
    864         1.1  augustss void
    865       1.119  augustss uhci_dump(void)
    866         1.1  augustss {
    867       1.110  augustss 	uhci_dump_all(thesc);
    868       1.110  augustss }
    869       1.110  augustss #endif
    870         1.1  augustss 
    871       1.110  augustss void
    872       1.119  augustss uhci_dump_all(uhci_softc_t *sc)
    873       1.110  augustss {
    874         1.1  augustss 	uhci_dumpregs(sc);
    875        1.50  augustss 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
    876       1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    877       1.123  augustss 	uhci_dump_qh(sc->sc_lctl_start);
    878         1.1  augustss }
    879         1.1  augustss 
    880        1.67  augustss 
    881        1.67  augustss void
    882       1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
    883        1.67  augustss {
    884        1.67  augustss 	uhci_dump_qh(sqh);
    885        1.67  augustss 
    886        1.67  augustss 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    887        1.67  augustss 	 * Traverses sideways first, then down.
    888        1.67  augustss 	 *
    889        1.67  augustss 	 * QH1
    890        1.67  augustss 	 * QH2
    891        1.67  augustss 	 * No QH
    892        1.67  augustss 	 * TD2.1
    893        1.67  augustss 	 * TD2.2
    894        1.67  augustss 	 * TD1.1
    895        1.67  augustss 	 * etc.
    896        1.67  augustss 	 *
    897        1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    898        1.67  augustss 	 */
    899        1.67  augustss 
    900        1.67  augustss 
    901       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    902       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    903        1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    904        1.67  augustss 		uhci_dump_qhs(sqh->hlink);
    905        1.67  augustss 	else
    906        1.67  augustss 		DPRINTF(("No QH\n"));
    907       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    908        1.67  augustss 
    909        1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    910        1.67  augustss 		uhci_dump_tds(sqh->elink);
    911        1.67  augustss 	else
    912        1.67  augustss 		DPRINTF(("No TD\n"));
    913        1.67  augustss }
    914        1.67  augustss 
    915         1.1  augustss void
    916       1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
    917         1.1  augustss {
    918        1.67  augustss 	uhci_soft_td_t *td;
    919       1.223    bouyer 	int stop;
    920        1.67  augustss 
    921        1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
    922        1.67  augustss 		uhci_dump_td(td);
    923         1.1  augustss 
    924        1.67  augustss 		/* Check whether the link pointer in this TD marks
    925        1.67  augustss 		 * the link pointer as end of queue. This avoids
    926        1.67  augustss 		 * printing the free list in case the queue/TD has
    927        1.67  augustss 		 * already been moved there (seatbelt).
    928        1.67  augustss 		 */
    929       1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    930       1.223    bouyer 		    sizeof(td->td.td_link),
    931       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    932       1.223    bouyer 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    933       1.223    bouyer 			le32toh(td->td.td_link) == 0);
    934       1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    935       1.223    bouyer 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    936       1.223    bouyer 		if (stop)
    937        1.67  augustss 			break;
    938        1.67  augustss 	}
    939         1.1  augustss }
    940        1.92  augustss 
    941       1.101  augustss Static void
    942       1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
    943        1.92  augustss {
    944        1.95  augustss 	usbd_pipe_handle pipe;
    945        1.95  augustss 	usb_endpoint_descriptor_t *ed;
    946        1.95  augustss 	usbd_device_handle dev;
    947       1.152  augustss 
    948        1.98  augustss #ifdef DIAGNOSTIC
    949        1.98  augustss #define DONE ii->isdone
    950        1.98  augustss #else
    951        1.98  augustss #define DONE 0
    952        1.98  augustss #endif
    953        1.95  augustss         if (ii == NULL) {
    954        1.95  augustss                 printf("ii NULL\n");
    955        1.95  augustss                 return;
    956        1.95  augustss         }
    957        1.95  augustss         if (ii->xfer == NULL) {
    958        1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
    959        1.98  augustss 		       ii, DONE);
    960        1.95  augustss                 return;
    961        1.95  augustss         }
    962        1.95  augustss         pipe = ii->xfer->pipe;
    963        1.95  augustss         if (pipe == NULL) {
    964        1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    965        1.98  augustss 		       ii, DONE, ii->xfer);
    966       1.139  augustss                 return;
    967       1.139  augustss 	}
    968       1.139  augustss         if (pipe->endpoint == NULL) {
    969       1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
    970       1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    971       1.139  augustss                 return;
    972       1.139  augustss 	}
    973       1.139  augustss         if (pipe->device == NULL) {
    974       1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
    975       1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    976        1.95  augustss                 return;
    977        1.95  augustss 	}
    978        1.95  augustss         ed = pipe->endpoint->edesc;
    979        1.95  augustss         dev = pipe->device;
    980       1.152  augustss 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    981       1.152  augustss 	       ii, DONE, ii->xfer, dev,
    982        1.95  augustss 	       UGETW(dev->ddesc.idVendor),
    983        1.92  augustss 	       UGETW(dev->ddesc.idProduct),
    984        1.92  augustss 	       dev->address, pipe,
    985        1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
    986        1.98  augustss #undef DONE
    987        1.92  augustss }
    988        1.92  augustss 
    989       1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
    990        1.92  augustss void
    991       1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
    992        1.92  augustss {
    993        1.92  augustss 	uhci_intr_info_t *ii;
    994        1.92  augustss 
    995        1.92  augustss 	printf("intr_info list:\n");
    996        1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
    997        1.92  augustss 		uhci_dump_ii(ii);
    998        1.92  augustss }
    999        1.92  augustss 
   1000       1.120  augustss void iidump(void);
   1001       1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
   1002        1.92  augustss 
   1003         1.1  augustss #endif
   1004         1.1  augustss 
   1005         1.1  augustss /*
   1006         1.1  augustss  * This routine is executed periodically and simulates interrupts
   1007         1.1  augustss  * from the root controller interrupt pipe for port status change.
   1008         1.1  augustss  */
   1009         1.1  augustss void
   1010       1.119  augustss uhci_poll_hub(void *addr)
   1011         1.1  augustss {
   1012        1.63  augustss 	usbd_xfer_handle xfer = addr;
   1013        1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   1014       1.227    martin 	uhci_softc_t *sc;
   1015         1.1  augustss 	u_char *p;
   1016         1.1  augustss 
   1017        1.96  augustss 	DPRINTFN(20, ("uhci_poll_hub\n"));
   1018         1.1  augustss 
   1019       1.228    martin 	if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL))
   1020       1.228    martin 		return;	/* device has detached */
   1021       1.227    martin 	sc = pipe->device->bus->hci_private;
   1022       1.234    dyoung 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1023        1.41  augustss 
   1024       1.159  augustss 	p = KERNADDR(&xfer->dmabuf, 0);
   1025         1.1  augustss 	p[0] = 0;
   1026         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1027         1.1  augustss 		p[0] |= 1<<1;
   1028         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1029         1.1  augustss 		p[0] |= 1<<2;
   1030        1.41  augustss 	if (p[0] == 0)
   1031        1.41  augustss 		/* No change, try again in a while */
   1032        1.41  augustss 		return;
   1033        1.41  augustss 
   1034        1.63  augustss 	xfer->actlen = 1;
   1035        1.63  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
   1036   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   1037        1.63  augustss 	usb_transfer_complete(xfer);
   1038   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   1039        1.41  augustss }
   1040        1.41  augustss 
   1041        1.41  augustss void
   1042       1.205  christos uhci_root_intr_done(usbd_xfer_handle xfer)
   1043        1.84  augustss {
   1044        1.84  augustss }
   1045        1.84  augustss 
   1046        1.84  augustss void
   1047       1.205  christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
   1048        1.41  augustss {
   1049         1.1  augustss }
   1050         1.1  augustss 
   1051       1.123  augustss /*
   1052       1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
   1053       1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
   1054       1.123  augustss  * USB performance a lot for some devices.
   1055       1.123  augustss  * If we are already looping, just count it.
   1056       1.123  augustss  */
   1057         1.1  augustss void
   1058       1.123  augustss uhci_add_loop(uhci_softc_t *sc) {
   1059       1.125  augustss #ifdef UHCI_DEBUG
   1060       1.125  augustss 	if (uhcinoloop)
   1061       1.125  augustss 		return;
   1062       1.125  augustss #endif
   1063       1.123  augustss 	if (++sc->sc_loops == 1) {
   1064       1.125  augustss 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1065       1.123  augustss 		/* Note, we don't loop back the soft pointer. */
   1066       1.152  augustss 		sc->sc_last_qh->qh.qh_hlink =
   1067       1.123  augustss 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1068       1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1069       1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1070       1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1071       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1072       1.123  augustss 	}
   1073       1.123  augustss }
   1074       1.123  augustss 
   1075       1.123  augustss void
   1076       1.123  augustss uhci_rem_loop(uhci_softc_t *sc) {
   1077       1.125  augustss #ifdef UHCI_DEBUG
   1078       1.125  augustss 	if (uhcinoloop)
   1079       1.125  augustss 		return;
   1080       1.125  augustss #endif
   1081       1.123  augustss 	if (--sc->sc_loops == 0) {
   1082       1.123  augustss 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1083       1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1084       1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1085       1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1086       1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1087       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1088       1.123  augustss 	}
   1089       1.123  augustss }
   1090       1.123  augustss 
   1091  1.240.6.11       mrg /* Add high speed control QH, called with lock held. */
   1092       1.123  augustss void
   1093       1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1094         1.1  augustss {
   1095        1.42  augustss 	uhci_soft_qh_t *eqh;
   1096         1.1  augustss 
   1097   1.240.6.5       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1098        1.52  augustss 
   1099         1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1100       1.123  augustss 	eqh = sc->sc_hctl_end;
   1101       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1102       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   1103       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   1104        1.42  augustss 	sqh->hlink       = eqh->hlink;
   1105        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1106       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1107       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1108        1.42  augustss 	eqh->hlink       = sqh;
   1109       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1110       1.123  augustss 	sc->sc_hctl_end = sqh;
   1111       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1112       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1113       1.125  augustss #ifdef UHCI_CTL_LOOP
   1114       1.123  augustss 	uhci_add_loop(sc);
   1115       1.125  augustss #endif
   1116         1.1  augustss }
   1117         1.1  augustss 
   1118  1.240.6.11       mrg /* Remove high speed control QH, called with lock held. */
   1119         1.1  augustss void
   1120       1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1121         1.1  augustss {
   1122         1.1  augustss 	uhci_soft_qh_t *pqh;
   1123         1.1  augustss 
   1124   1.240.6.5       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1125        1.52  augustss 
   1126       1.123  augustss 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1127       1.125  augustss #ifdef UHCI_CTL_LOOP
   1128       1.123  augustss 	uhci_rem_loop(sc);
   1129       1.125  augustss #endif
   1130       1.124  augustss 	/*
   1131       1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1132       1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1133       1.124  augustss 	 * the transferred packet was short so that the QH still points
   1134       1.124  augustss 	 * at the last used TD.
   1135       1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1136       1.124  augustss 	 * to stop looking at the TD.
   1137       1.223    bouyer 	 * Note that if the TD chain is large enough, the controller
   1138       1.223    bouyer 	 * may still be looking at the chain at the end of this function.
   1139       1.223    bouyer 	 * uhci_free_std_chain() will make sure the controller stops
   1140       1.223    bouyer 	 * looking at it quickly, but until then we should not change
   1141       1.223    bouyer 	 * sqh->hlink.
   1142       1.124  augustss 	 */
   1143       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1144       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1145       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1146       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1147       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1148       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1149       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1150       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1151       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1152       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1153       1.124  augustss 	}
   1154       1.124  augustss 
   1155       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1156       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1157       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1158       1.152  augustss 	pqh->hlink = sqh->hlink;
   1159        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1160       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1161       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1162       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1163       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1164       1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1165       1.123  augustss 		sc->sc_hctl_end = pqh;
   1166       1.123  augustss }
   1167       1.123  augustss 
   1168  1.240.6.11       mrg /* Add low speed control QH, called with lock held. */
   1169       1.123  augustss void
   1170       1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1171       1.123  augustss {
   1172       1.123  augustss 	uhci_soft_qh_t *eqh;
   1173       1.123  augustss 
   1174   1.240.6.5       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1175       1.123  augustss 
   1176       1.123  augustss 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1177       1.123  augustss 	eqh = sc->sc_lctl_end;
   1178       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1179       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1180       1.152  augustss 	sqh->hlink = eqh->hlink;
   1181       1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1182       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1183       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1184       1.152  augustss 	eqh->hlink = sqh;
   1185       1.123  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1186       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1187       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1188       1.123  augustss 	sc->sc_lctl_end = sqh;
   1189       1.123  augustss }
   1190       1.123  augustss 
   1191  1.240.6.11       mrg /* Remove low speed control QH, called with lock held. */
   1192       1.123  augustss void
   1193       1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1194       1.123  augustss {
   1195       1.123  augustss 	uhci_soft_qh_t *pqh;
   1196       1.123  augustss 
   1197   1.240.6.5       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1198       1.123  augustss 
   1199       1.123  augustss 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1200       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1201       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1202       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1203       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1204       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1205       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1206       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1207       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1208       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1209       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1210       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1211       1.124  augustss 	}
   1212       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1213       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1214       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1215       1.152  augustss 	pqh->hlink = sqh->hlink;
   1216       1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1217       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1218       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1219       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1220       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1221       1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1222       1.123  augustss 		sc->sc_lctl_end = pqh;
   1223         1.1  augustss }
   1224         1.1  augustss 
   1225  1.240.6.11       mrg /* Add bulk QH, called with lock held. */
   1226         1.1  augustss void
   1227       1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1228         1.1  augustss {
   1229        1.42  augustss 	uhci_soft_qh_t *eqh;
   1230         1.1  augustss 
   1231   1.240.6.5       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1232        1.52  augustss 
   1233         1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1234        1.42  augustss 	eqh = sc->sc_bulk_end;
   1235       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1236       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1237       1.152  augustss 	sqh->hlink = eqh->hlink;
   1238        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1239       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1240       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1241       1.152  augustss 	eqh->hlink = sqh;
   1242       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1243       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1244       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1245         1.1  augustss 	sc->sc_bulk_end = sqh;
   1246       1.123  augustss 	uhci_add_loop(sc);
   1247         1.1  augustss }
   1248         1.1  augustss 
   1249  1.240.6.11       mrg /* Remove bulk QH, called with lock held. */
   1250         1.1  augustss void
   1251       1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1252         1.1  augustss {
   1253         1.1  augustss 	uhci_soft_qh_t *pqh;
   1254         1.1  augustss 
   1255   1.240.6.5       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1256        1.52  augustss 
   1257         1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1258       1.123  augustss 	uhci_rem_loop(sc);
   1259       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1260       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1261       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1262       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1263       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1264       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1265       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1266       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1267       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1268       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1269       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1270       1.124  augustss 	}
   1271        1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1272       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1273       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1274        1.42  augustss 	pqh->hlink       = sqh->hlink;
   1275        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1276       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1277       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1278       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1279         1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1280         1.1  augustss 		sc->sc_bulk_end = pqh;
   1281         1.1  augustss }
   1282         1.1  augustss 
   1283       1.141  augustss Static int uhci_intr1(uhci_softc_t *);
   1284       1.141  augustss 
   1285         1.1  augustss int
   1286       1.119  augustss uhci_intr(void *arg)
   1287         1.1  augustss {
   1288        1.44  augustss 	uhci_softc_t *sc = arg;
   1289   1.240.6.2       mrg 	int ret = 0;
   1290   1.240.6.2       mrg 
   1291   1.240.6.2       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1292       1.146  augustss 
   1293       1.216  drochner 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1294   1.240.6.2       mrg 		goto done;
   1295       1.141  augustss 
   1296       1.225    bouyer 	if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) {
   1297       1.141  augustss #ifdef DIAGNOSTIC
   1298       1.179   mycroft 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
   1299       1.141  augustss #endif
   1300   1.240.6.2       mrg 		goto done;
   1301       1.141  augustss 	}
   1302       1.179   mycroft 
   1303   1.240.6.2       mrg 	ret = uhci_intr1(sc);
   1304   1.240.6.2       mrg 
   1305   1.240.6.2       mrg  done:
   1306   1.240.6.2       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1307   1.240.6.2       mrg 	return ret;
   1308       1.141  augustss }
   1309       1.141  augustss 
   1310       1.141  augustss int
   1311       1.141  augustss uhci_intr1(uhci_softc_t *sc)
   1312       1.141  augustss {
   1313        1.44  augustss 	int status;
   1314        1.44  augustss 	int ack;
   1315         1.1  augustss 
   1316        1.67  augustss #ifdef UHCI_DEBUG
   1317        1.44  augustss 	if (uhcidebug > 15) {
   1318       1.216  drochner 		DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
   1319         1.1  augustss 		uhci_dumpregs(sc);
   1320         1.1  augustss 	}
   1321         1.1  augustss #endif
   1322       1.117  augustss 
   1323   1.240.6.3       mrg 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1324   1.240.6.2       mrg 
   1325       1.153  augustss 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1326       1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1327       1.127     soren 		return (0);
   1328       1.127     soren 
   1329       1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1330       1.201  jmcneill #ifdef DIAGNOSTIC
   1331       1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1332       1.216  drochner 		       device_xname(sc->sc_dev));
   1333       1.201  jmcneill #endif
   1334       1.134  augustss 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1335       1.117  augustss 		return (0);
   1336       1.117  augustss 	}
   1337        1.44  augustss 
   1338        1.44  augustss 	ack = 0;
   1339        1.44  augustss 	if (status & UHCI_STS_USBINT)
   1340        1.44  augustss 		ack |= UHCI_STS_USBINT;
   1341        1.44  augustss 	if (status & UHCI_STS_USBEI)
   1342        1.44  augustss 		ack |= UHCI_STS_USBEI;
   1343         1.1  augustss 	if (status & UHCI_STS_RD) {
   1344        1.44  augustss 		ack |= UHCI_STS_RD;
   1345       1.118  augustss #ifdef UHCI_DEBUG
   1346       1.216  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1347       1.118  augustss #endif
   1348         1.1  augustss 	}
   1349         1.1  augustss 	if (status & UHCI_STS_HSE) {
   1350        1.44  augustss 		ack |= UHCI_STS_HSE;
   1351       1.216  drochner 		printf("%s: host system error\n", device_xname(sc->sc_dev));
   1352         1.1  augustss 	}
   1353         1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1354        1.44  augustss 		ack |= UHCI_STS_HCPE;
   1355       1.152  augustss 		printf("%s: host controller process error\n",
   1356       1.216  drochner 		       device_xname(sc->sc_dev));
   1357        1.44  augustss 	}
   1358       1.233   msaitoh 
   1359       1.233   msaitoh 	/* When HCHalted=1 and Run/Stop=0 , it is normal */
   1360       1.233   msaitoh 	if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) {
   1361        1.44  augustss 		/* no acknowledge needed */
   1362       1.136  augustss 		if (!sc->sc_dying) {
   1363       1.152  augustss 			printf("%s: host controller halted\n",
   1364       1.216  drochner 			    device_xname(sc->sc_dev));
   1365       1.110  augustss #ifdef UHCI_DEBUG
   1366       1.136  augustss 			uhci_dump_all(sc);
   1367       1.110  augustss #endif
   1368       1.136  augustss 		}
   1369       1.136  augustss 		sc->sc_dying = 1;
   1370         1.1  augustss 	}
   1371        1.44  augustss 
   1372       1.132  augustss 	if (!ack)
   1373       1.132  augustss 		return (0);	/* nothing to acknowledge */
   1374       1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1375         1.1  augustss 
   1376        1.85  augustss 	sc->sc_bus.no_intrs++;
   1377        1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1378        1.85  augustss 
   1379       1.216  drochner 	DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
   1380        1.85  augustss 
   1381        1.85  augustss 	return (1);
   1382        1.85  augustss }
   1383        1.85  augustss 
   1384        1.85  augustss void
   1385       1.133  augustss uhci_softintr(void *v)
   1386        1.85  augustss {
   1387       1.216  drochner 	struct usbd_bus *bus = v;
   1388       1.216  drochner 	uhci_softc_t *sc = bus->hci_private;
   1389       1.178    martin 	uhci_intr_info_t *ii, *nextii;
   1390        1.85  augustss 
   1391   1.240.6.7       mrg 	KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
   1392   1.240.6.7       mrg 
   1393  1.240.6.14       mrg 	DPRINTFN(10,("%s: uhci_softintr\n", device_xname(sc->sc_dev)));
   1394        1.50  augustss 
   1395         1.1  augustss 	/*
   1396         1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1397         1.1  augustss 	 * interrupts because a transfer is completed there is no
   1398         1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1399         1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1400         1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1401         1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1402         1.1  augustss 	 * output on a slow console).
   1403         1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1404         1.1  augustss 	 * completed.
   1405         1.1  augustss 	 */
   1406       1.178    martin 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1407       1.178    martin 		nextii = LIST_NEXT(ii, list);
   1408         1.1  augustss 		uhci_check_intr(sc, ii);
   1409       1.178    martin 	}
   1410         1.1  augustss 
   1411       1.153  augustss 	if (sc->sc_softwake) {
   1412       1.153  augustss 		sc->sc_softwake = 0;
   1413   1.240.6.2       mrg 		cv_broadcast(&sc->sc_softwake_cv);
   1414       1.153  augustss 	}
   1415         1.1  augustss }
   1416         1.1  augustss 
   1417         1.1  augustss /* Check for an interrupt. */
   1418         1.1  augustss void
   1419       1.205  christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1420         1.1  augustss {
   1421         1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1422        1.18  augustss 	u_int32_t status;
   1423         1.1  augustss 
   1424         1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1425         1.1  augustss #ifdef DIAGNOSTIC
   1426        1.63  augustss 	if (ii == NULL) {
   1427         1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1428         1.1  augustss 		return;
   1429         1.1  augustss 	}
   1430         1.1  augustss #endif
   1431       1.155  augustss 	if (ii->xfer->status == USBD_CANCELLED ||
   1432       1.155  augustss 	    ii->xfer->status == USBD_TIMEOUT) {
   1433       1.155  augustss 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1434       1.155  augustss 		return;
   1435       1.155  augustss 	}
   1436       1.155  augustss 
   1437        1.63  augustss 	if (ii->stdstart == NULL)
   1438         1.1  augustss 		return;
   1439         1.1  augustss 	lstd = ii->stdend;
   1440         1.1  augustss #ifdef DIAGNOSTIC
   1441        1.63  augustss 	if (lstd == NULL) {
   1442         1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1443         1.1  augustss 		return;
   1444         1.1  augustss 	}
   1445         1.1  augustss #endif
   1446       1.152  augustss 	/*
   1447        1.26  augustss 	 * If the last TD is still active we need to check whether there
   1448       1.186     skrll 	 * is an error somewhere in the middle, or whether there was a
   1449        1.26  augustss 	 * short packet (SPD and not ACTIVE).
   1450        1.26  augustss 	 */
   1451       1.223    bouyer 	usb_syncmem(&lstd->dma,
   1452       1.223    bouyer 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1453       1.223    bouyer 	    sizeof(lstd->td.td_status),
   1454       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1455        1.88   tsutsui 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1456        1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1457        1.48  augustss 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1458       1.223    bouyer 			usb_syncmem(&std->dma,
   1459       1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1460       1.223    bouyer 			    sizeof(std->td.td_status),
   1461       1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1462        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1463       1.223    bouyer 			usb_syncmem(&std->dma,
   1464       1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1465       1.223    bouyer 			    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1466        1.83  augustss 			/* If there's an active TD the xfer isn't done. */
   1467        1.83  augustss 			if (status & UHCI_TD_ACTIVE)
   1468        1.83  augustss 				break;
   1469        1.83  augustss 			/* Any kind of error makes the xfer done. */
   1470        1.83  augustss 			if (status & UHCI_TD_STALLED)
   1471        1.83  augustss 				goto done;
   1472        1.83  augustss 			/* We want short packets, and it is short: it's done */
   1473       1.223    bouyer 			usb_syncmem(&std->dma,
   1474       1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_token),
   1475       1.223    bouyer 			    sizeof(std->td.td_token),
   1476       1.223    bouyer 			    BUS_DMASYNC_POSTWRITE);
   1477        1.83  augustss 			if ((status & UHCI_TD_SPD) &&
   1478       1.152  augustss 			      UHCI_TD_GET_ACTLEN(status) <
   1479        1.88   tsutsui 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1480         1.1  augustss 				goto done;
   1481        1.18  augustss 		}
   1482        1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1483        1.18  augustss 			      ii, ii->stdstart));
   1484       1.223    bouyer 		usb_syncmem(&lstd->dma,
   1485       1.223    bouyer 		    lstd->offs + offsetof(uhci_td_t, td_status),
   1486       1.223    bouyer 		    sizeof(lstd->td.td_status),
   1487       1.223    bouyer 		    BUS_DMASYNC_PREREAD);
   1488         1.1  augustss 		return;
   1489         1.1  augustss 	}
   1490         1.1  augustss  done:
   1491        1.92  augustss 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1492       1.234    dyoung 	callout_stop(&ii->xfer->timeout_handle);
   1493        1.36  augustss 	uhci_idone(ii);
   1494         1.1  augustss }
   1495         1.1  augustss 
   1496  1.240.6.11       mrg /* Called with USB lock held. */
   1497         1.1  augustss void
   1498       1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1499         1.1  augustss {
   1500        1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1501        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1502   1.240.6.7       mrg 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   1503         1.1  augustss 	uhci_soft_td_t *std;
   1504        1.67  augustss 	u_int32_t status = 0, nstatus;
   1505        1.26  augustss 	int actlen;
   1506         1.1  augustss 
   1507   1.240.6.7       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1508   1.240.6.7       mrg 
   1509       1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1510         1.7  augustss #ifdef DIAGNOSTIC
   1511         1.7  augustss 	{
   1512   1.240.6.2       mrg 		/* XXX SMP? */
   1513         1.7  augustss 		int s = splhigh();
   1514         1.7  augustss 		if (ii->isdone) {
   1515        1.26  augustss 			splx(s);
   1516        1.92  augustss #ifdef UHCI_DEBUG
   1517        1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1518        1.92  augustss 			uhci_dump_ii(ii);
   1519        1.92  augustss #else
   1520        1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1521        1.92  augustss #endif
   1522         1.7  augustss 			return;
   1523         1.7  augustss 		}
   1524         1.7  augustss 		ii->isdone = 1;
   1525         1.7  augustss 		splx(s);
   1526         1.7  augustss 	}
   1527         1.7  augustss #endif
   1528        1.48  augustss 
   1529        1.63  augustss 	if (xfer->nframes != 0) {
   1530        1.48  augustss 		/* Isoc transfer, do things differently. */
   1531        1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1532       1.126  augustss 		int i, n, nframes, len;
   1533        1.48  augustss 
   1534        1.48  augustss 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1535        1.48  augustss 
   1536        1.63  augustss 		nframes = xfer->nframes;
   1537        1.48  augustss 		actlen = 0;
   1538        1.92  augustss 		n = UXFER(xfer)->curframe;
   1539        1.48  augustss 		for (i = 0; i < nframes; i++) {
   1540        1.48  augustss 			std = stds[n];
   1541        1.59  augustss #ifdef UHCI_DEBUG
   1542        1.48  augustss 			if (uhcidebug > 5) {
   1543        1.48  augustss 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1544        1.48  augustss 				uhci_dump_td(std);
   1545        1.48  augustss 			}
   1546        1.48  augustss #endif
   1547        1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1548        1.48  augustss 				n = 0;
   1549       1.223    bouyer 			usb_syncmem(&std->dma,
   1550       1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1551       1.223    bouyer 			    sizeof(std->td.td_status),
   1552       1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1553        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1554       1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1555       1.126  augustss 			xfer->frlengths[i] = len;
   1556       1.126  augustss 			actlen += len;
   1557        1.48  augustss 		}
   1558        1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1559        1.63  augustss 		xfer->actlen = actlen;
   1560        1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1561       1.140  augustss 		goto end;
   1562        1.48  augustss 	}
   1563        1.48  augustss 
   1564        1.59  augustss #ifdef UHCI_DEBUG
   1565        1.65  augustss 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1566        1.65  augustss 		      ii, xfer, upipe));
   1567        1.48  augustss 	if (uhcidebug > 10)
   1568        1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1569        1.48  augustss #endif
   1570        1.48  augustss 
   1571        1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1572        1.26  augustss 	actlen = 0;
   1573        1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1574       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1575       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1576        1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1577        1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1578        1.26  augustss 			break;
   1579        1.67  augustss 
   1580        1.64  augustss 		status = nstatus;
   1581        1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1582        1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1583        1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1584       1.176   mycroft 		else {
   1585       1.176   mycroft 			/*
   1586       1.176   mycroft 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1587       1.176   mycroft 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1588       1.176   mycroft 			 * CONTROL AND STATUS".
   1589       1.176   mycroft 			 */
   1590       1.176   mycroft 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1591       1.176   mycroft 				status &= ~UHCI_TD_CRCTO;
   1592       1.176   mycroft 		}
   1593         1.1  augustss 	}
   1594        1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1595        1.63  augustss 	if (std != NULL)
   1596        1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1597        1.38  augustss 
   1598         1.1  augustss 	status &= UHCI_TD_ERROR;
   1599       1.152  augustss 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1600        1.26  augustss 		      actlen, status));
   1601        1.63  augustss 	xfer->actlen = actlen;
   1602         1.1  augustss 	if (status != 0) {
   1603       1.122        tv #ifdef UHCI_DEBUG
   1604       1.122        tv 		char sbuf[128];
   1605       1.122        tv 
   1606       1.224  christos 		snprintb(sbuf, sizeof(sbuf),
   1607       1.224  christos 		    "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1608       1.224  christos 		    "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status);
   1609       1.122        tv 
   1610        1.75  augustss 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1611        1.36  augustss 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1612       1.122        tv 			  "status 0x%s\n",
   1613        1.63  augustss 			  xfer->pipe->device->address,
   1614        1.63  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1615       1.122        tv 			  sbuf));
   1616       1.122        tv #endif
   1617       1.122        tv 
   1618         1.1  augustss 		if (status == UHCI_TD_STALLED)
   1619        1.63  augustss 			xfer->status = USBD_STALLED;
   1620         1.1  augustss 		else
   1621        1.63  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
   1622         1.1  augustss 	} else {
   1623        1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1624         1.1  augustss 	}
   1625       1.140  augustss 
   1626       1.140  augustss  end:
   1627        1.63  augustss 	usb_transfer_complete(xfer);
   1628   1.240.6.7       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1629       1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1630         1.1  augustss }
   1631         1.1  augustss 
   1632        1.13  augustss /*
   1633        1.13  augustss  * Called when a request does not complete.
   1634        1.13  augustss  */
   1635         1.1  augustss void
   1636       1.119  augustss uhci_timeout(void *addr)
   1637         1.1  augustss {
   1638         1.1  augustss 	uhci_intr_info_t *ii = addr;
   1639       1.153  augustss 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1640       1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1641       1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   1642       1.153  augustss 
   1643       1.153  augustss 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1644       1.153  augustss 
   1645       1.153  augustss 	if (sc->sc_dying) {
   1646   1.240.6.7       mrg 		mutex_enter(&sc->sc_lock);
   1647       1.153  augustss 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1648   1.240.6.7       mrg 		mutex_exit(&sc->sc_lock);
   1649       1.153  augustss 		return;
   1650       1.153  augustss 	}
   1651         1.1  augustss 
   1652       1.153  augustss 	/* Execute the abort in a process context. */
   1653       1.238   tsutsui 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
   1654       1.204     joerg 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
   1655       1.204     joerg 	    USB_TASKQ_HC);
   1656       1.153  augustss }
   1657        1.51  augustss 
   1658       1.153  augustss void
   1659       1.153  augustss uhci_timeout_task(void *addr)
   1660       1.153  augustss {
   1661       1.153  augustss 	usbd_xfer_handle xfer = addr;
   1662   1.240.6.7       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   1663       1.153  augustss 
   1664       1.153  augustss 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1665        1.67  augustss 
   1666   1.240.6.7       mrg 	mutex_enter(&sc->sc_lock);
   1667       1.153  augustss 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1668   1.240.6.7       mrg 	mutex_exit(&sc->sc_lock);
   1669         1.1  augustss }
   1670         1.1  augustss 
   1671         1.1  augustss /*
   1672         1.1  augustss  * Wait here until controller claims to have an interrupt.
   1673         1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1674         1.1  augustss  * too long.
   1675        1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1676         1.1  augustss  */
   1677         1.1  augustss void
   1678       1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1679         1.1  augustss {
   1680        1.63  augustss 	int timo = xfer->timeout;
   1681        1.13  augustss 	uhci_intr_info_t *ii;
   1682        1.13  augustss 
   1683   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   1684   1.240.6.2       mrg 
   1685        1.26  augustss 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1686         1.1  augustss 
   1687        1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   1688        1.26  augustss 	for (; timo >= 0; timo--) {
   1689        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1690        1.26  augustss 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1691         1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1692   1.240.6.2       mrg 			mutex_spin_enter(&sc->sc_intr_lock);
   1693       1.141  augustss 			uhci_intr1(sc);
   1694   1.240.6.2       mrg 			mutex_spin_exit(&sc->sc_intr_lock);
   1695        1.63  augustss 			if (xfer->status != USBD_IN_PROGRESS)
   1696   1.240.6.2       mrg 				goto done;
   1697         1.1  augustss 		}
   1698         1.1  augustss 	}
   1699        1.13  augustss 
   1700        1.13  augustss 	/* Timeout */
   1701        1.13  augustss 	DPRINTF(("uhci_waitintr: timeout\n"));
   1702        1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1703       1.152  augustss 	     ii != NULL && ii->xfer != xfer;
   1704        1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1705        1.13  augustss 		;
   1706        1.41  augustss #ifdef DIAGNOSTIC
   1707        1.63  augustss 	if (ii == NULL)
   1708       1.163    provos 		panic("uhci_waitintr: lost intr_info");
   1709        1.41  augustss #endif
   1710        1.41  augustss 	uhci_idone(ii);
   1711   1.240.6.2       mrg 
   1712   1.240.6.2       mrg done:
   1713   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   1714         1.1  augustss }
   1715         1.1  augustss 
   1716         1.8  augustss void
   1717       1.119  augustss uhci_poll(struct usbd_bus *bus)
   1718         1.8  augustss {
   1719       1.216  drochner 	uhci_softc_t *sc = bus->hci_private;
   1720         1.8  augustss 
   1721   1.240.6.2       mrg 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1722   1.240.6.2       mrg 		mutex_spin_enter(&sc->sc_intr_lock);
   1723       1.141  augustss 		uhci_intr1(sc);
   1724   1.240.6.2       mrg 		mutex_spin_exit(&sc->sc_intr_lock);
   1725   1.240.6.2       mrg 	}
   1726         1.8  augustss }
   1727         1.8  augustss 
   1728         1.1  augustss void
   1729       1.119  augustss uhci_reset(uhci_softc_t *sc)
   1730         1.1  augustss {
   1731         1.1  augustss 	int n;
   1732         1.1  augustss 
   1733         1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1734         1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1735       1.152  augustss 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1736         1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1737        1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1738         1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1739       1.152  augustss 		printf("%s: controller did not reset\n",
   1740       1.216  drochner 		       device_xname(sc->sc_dev));
   1741         1.1  augustss }
   1742         1.1  augustss 
   1743        1.16  augustss usbd_status
   1744       1.119  augustss uhci_run(uhci_softc_t *sc, int run)
   1745         1.1  augustss {
   1746   1.240.6.2       mrg 	int n, running;
   1747        1.71  augustss 	u_int16_t cmd;
   1748         1.1  augustss 
   1749         1.1  augustss 	run = run != 0;
   1750   1.240.6.2       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1751        1.30  augustss 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1752        1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1753        1.71  augustss 	if (run)
   1754        1.71  augustss 		cmd |= UHCI_CMD_RS;
   1755        1.71  augustss 	else
   1756        1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1757        1.71  augustss 	UHCICMD(sc, cmd);
   1758        1.13  augustss 	for(n = 0; n < 10; n++) {
   1759         1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1760         1.1  augustss 		/* return when we've entered the state we want */
   1761         1.1  augustss 		if (run == running) {
   1762   1.240.6.2       mrg 			mutex_spin_exit(&sc->sc_intr_lock);
   1763        1.30  augustss 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1764        1.30  augustss 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1765        1.16  augustss 			return (USBD_NORMAL_COMPLETION);
   1766         1.1  augustss 		}
   1767        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1768         1.1  augustss 	}
   1769   1.240.6.2       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1770       1.216  drochner 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
   1771        1.14  augustss 	       run ? "start" : "stop");
   1772        1.16  augustss 	return (USBD_IOERROR);
   1773         1.1  augustss }
   1774         1.1  augustss 
   1775         1.1  augustss /*
   1776         1.1  augustss  * Memory management routines.
   1777         1.1  augustss  *  uhci_alloc_std allocates TDs
   1778         1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1779         1.7  augustss  * These two routines do their own free list management,
   1780         1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1781         1.1  augustss  * has page size granularaity so much memory would be wasted if
   1782        1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1783         1.1  augustss  */
   1784         1.1  augustss 
   1785         1.1  augustss uhci_soft_td_t *
   1786       1.119  augustss uhci_alloc_std(uhci_softc_t *sc)
   1787         1.1  augustss {
   1788         1.1  augustss 	uhci_soft_td_t *std;
   1789        1.63  augustss 	usbd_status err;
   1790        1.42  augustss 	int i, offs;
   1791         1.7  augustss 	usb_dma_t dma;
   1792         1.1  augustss 
   1793        1.63  augustss 	if (sc->sc_freetds == NULL) {
   1794         1.1  augustss 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1795        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1796        1.63  augustss 			  UHCI_TD_ALIGN, &dma);
   1797        1.63  augustss 		if (err)
   1798        1.16  augustss 			return (0);
   1799   1.240.6.2       mrg 		for (i = 0; i < UHCI_STD_CHUNK; i++) {
   1800        1.42  augustss 			offs = i * UHCI_STD_SIZE;
   1801       1.159  augustss 			std = KERNADDR(&dma, offs);
   1802       1.160  augustss 			std->physaddr = DMAADDR(&dma, offs);
   1803       1.223    bouyer 			std->dma = dma;
   1804       1.223    bouyer 			std->offs = offs;
   1805        1.42  augustss 			std->link.std = sc->sc_freetds;
   1806         1.1  augustss 			sc->sc_freetds = std;
   1807         1.1  augustss 		}
   1808         1.1  augustss 	}
   1809         1.1  augustss 	std = sc->sc_freetds;
   1810        1.42  augustss 	sc->sc_freetds = std->link.std;
   1811        1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1812         1.1  augustss 	return std;
   1813         1.1  augustss }
   1814         1.1  augustss 
   1815         1.1  augustss void
   1816       1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1817         1.1  augustss {
   1818         1.7  augustss #ifdef DIAGNOSTIC
   1819         1.7  augustss #define TD_IS_FREE 0x12345678
   1820        1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1821         1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1822         1.7  augustss 		return;
   1823         1.7  augustss 	}
   1824        1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1825         1.7  augustss #endif
   1826        1.42  augustss 	std->link.std = sc->sc_freetds;
   1827         1.1  augustss 	sc->sc_freetds = std;
   1828         1.1  augustss }
   1829         1.1  augustss 
   1830         1.1  augustss uhci_soft_qh_t *
   1831       1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   1832         1.1  augustss {
   1833         1.1  augustss 	uhci_soft_qh_t *sqh;
   1834        1.63  augustss 	usbd_status err;
   1835         1.1  augustss 	int i, offs;
   1836         1.7  augustss 	usb_dma_t dma;
   1837         1.1  augustss 
   1838        1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   1839         1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1840        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1841        1.63  augustss 			  UHCI_QH_ALIGN, &dma);
   1842        1.63  augustss 		if (err)
   1843        1.63  augustss 			return (0);
   1844        1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1845        1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   1846       1.159  augustss 			sqh = KERNADDR(&dma, offs);
   1847       1.160  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   1848       1.223    bouyer 			sqh->dma = dma;
   1849       1.223    bouyer 			sqh->offs = offs;
   1850        1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   1851         1.1  augustss 			sc->sc_freeqhs = sqh;
   1852         1.1  augustss 		}
   1853         1.1  augustss 	}
   1854         1.1  augustss 	sqh = sc->sc_freeqhs;
   1855        1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   1856        1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1857        1.16  augustss 	return (sqh);
   1858         1.1  augustss }
   1859         1.1  augustss 
   1860         1.1  augustss void
   1861       1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1862         1.1  augustss {
   1863        1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   1864         1.1  augustss 	sc->sc_freeqhs = sqh;
   1865         1.1  augustss }
   1866         1.1  augustss 
   1867         1.1  augustss void
   1868       1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1869       1.119  augustss 		    uhci_soft_td_t *stdend)
   1870         1.1  augustss {
   1871         1.1  augustss 	uhci_soft_td_t *p;
   1872         1.1  augustss 
   1873       1.223    bouyer 	/*
   1874       1.223    bouyer 	 * to avoid race condition with the controller which may be looking
   1875       1.223    bouyer 	 * at this chain, we need to first invalidate all links, and
   1876       1.223    bouyer 	 * then wait for the controller to move to another queue
   1877       1.223    bouyer 	 */
   1878       1.223    bouyer 	for (p = std; p != stdend; p = p->link.std) {
   1879       1.223    bouyer 		usb_syncmem(&p->dma,
   1880       1.223    bouyer 		    p->offs + offsetof(uhci_td_t, td_link),
   1881       1.223    bouyer 		    sizeof(p->td.td_link),
   1882       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1883       1.223    bouyer 		if ((p->td.td_link & UHCI_PTR_T) == 0) {
   1884       1.223    bouyer 			p->td.td_link = UHCI_PTR_T;
   1885       1.223    bouyer 			usb_syncmem(&p->dma,
   1886       1.223    bouyer 			    p->offs + offsetof(uhci_td_t, td_link),
   1887       1.223    bouyer 			    sizeof(p->td.td_link),
   1888       1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1889       1.223    bouyer 		}
   1890       1.223    bouyer 	}
   1891       1.223    bouyer 	delay(UHCI_QH_REMOVE_DELAY);
   1892       1.223    bouyer 
   1893         1.1  augustss 	for (; std != stdend; std = p) {
   1894        1.42  augustss 		p = std->link.std;
   1895         1.1  augustss 		uhci_free_std(sc, std);
   1896         1.1  augustss 	}
   1897         1.1  augustss }
   1898         1.1  augustss 
   1899         1.1  augustss usbd_status
   1900       1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1901       1.119  augustss 		     int rd, u_int16_t flags, usb_dma_t *dma,
   1902       1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1903         1.1  augustss {
   1904         1.1  augustss 	uhci_soft_td_t *p, *lastp;
   1905         1.1  augustss 	uhci_physaddr_t lastlink;
   1906         1.1  augustss 	int i, ntd, l, tog, maxp;
   1907        1.18  augustss 	u_int32_t status;
   1908         1.1  augustss 	int addr = upipe->pipe.device->address;
   1909         1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1910         1.1  augustss 
   1911       1.144  augustss 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1912       1.152  augustss 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1913       1.144  augustss 		      upipe->pipe.device->speed, flags));
   1914   1.240.6.2       mrg 
   1915   1.240.6.2       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1916   1.240.6.2       mrg 
   1917         1.4  augustss 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1918         1.1  augustss 	if (maxp == 0) {
   1919         1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1920         1.1  augustss 		return (USBD_INVAL);
   1921         1.1  augustss 	}
   1922         1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1923        1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1924        1.73  augustss 		ntd++;
   1925        1.39  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1926        1.73  augustss 	if (ntd == 0) {
   1927        1.73  augustss 		*sp = *ep = 0;
   1928        1.73  augustss 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1929        1.73  augustss 		return (USBD_NORMAL_COMPLETION);
   1930        1.73  augustss 	}
   1931        1.38  augustss 	tog = upipe->nexttoggle;
   1932         1.1  augustss 	if (ntd % 2 == 0)
   1933         1.1  augustss 		tog ^= 1;
   1934        1.32  augustss 	upipe->nexttoggle = tog ^ 1;
   1935       1.121  augustss 	lastp = NULL;
   1936         1.1  augustss 	lastlink = UHCI_PTR_T;
   1937         1.1  augustss 	ntd--;
   1938        1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1939       1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   1940        1.18  augustss 		status |= UHCI_TD_LS;
   1941        1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   1942        1.18  augustss 		status |= UHCI_TD_SPD;
   1943       1.223    bouyer 	usb_syncmem(dma, 0, len,
   1944       1.223    bouyer 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1945         1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1946         1.1  augustss 		p = uhci_alloc_std(sc);
   1947        1.63  augustss 		if (p == NULL) {
   1948       1.202  christos 			KASSERT(lastp != NULL);
   1949       1.149  augustss 			uhci_free_std_chain(sc, lastp, NULL);
   1950         1.1  augustss 			return (USBD_NOMEM);
   1951         1.1  augustss 		}
   1952        1.42  augustss 		p->link.std = lastp;
   1953       1.121  augustss 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1954         1.1  augustss 		lastp = p;
   1955         1.1  augustss 		lastlink = p->physaddr;
   1956        1.88   tsutsui 		p->td.td_status = htole32(status);
   1957         1.1  augustss 		if (i == ntd) {
   1958         1.1  augustss 			/* last TD */
   1959         1.1  augustss 			l = len % maxp;
   1960        1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1961        1.73  augustss 				l = maxp;
   1962         1.1  augustss 			*ep = p;
   1963         1.1  augustss 		} else
   1964         1.1  augustss 			l = maxp;
   1965       1.152  augustss 		p->td.td_token =
   1966        1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1967        1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1968       1.160  augustss 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1969       1.223    bouyer 		usb_syncmem(&p->dma, p->offs, sizeof(p->td),
   1970       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1971         1.1  augustss 		tog ^= 1;
   1972         1.1  augustss 	}
   1973         1.1  augustss 	*sp = lastp;
   1974       1.152  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1975        1.38  augustss 		      upipe->nexttoggle));
   1976         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1977         1.1  augustss }
   1978         1.1  augustss 
   1979        1.38  augustss void
   1980       1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1981        1.38  augustss {
   1982        1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1983        1.38  augustss 	upipe->nexttoggle = 0;
   1984        1.38  augustss }
   1985        1.38  augustss 
   1986        1.38  augustss void
   1987       1.205  christos uhci_noop(usbd_pipe_handle pipe)
   1988        1.38  augustss {
   1989        1.38  augustss }
   1990        1.38  augustss 
   1991         1.1  augustss usbd_status
   1992       1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   1993         1.1  augustss {
   1994   1.240.6.2       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   1995        1.63  augustss 	usbd_status err;
   1996        1.16  augustss 
   1997        1.52  augustss 	/* Insert last in queue. */
   1998   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   1999        1.63  augustss 	err = usb_insert_transfer(xfer);
   2000   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2001        1.63  augustss 	if (err)
   2002        1.63  augustss 		return (err);
   2003        1.52  augustss 
   2004       1.152  augustss 	/*
   2005        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2006        1.92  augustss 	 * so start it first.
   2007        1.67  augustss 	 */
   2008        1.63  augustss 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2009        1.16  augustss }
   2010        1.16  augustss 
   2011        1.16  augustss usbd_status
   2012       1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   2013        1.16  augustss {
   2014        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2015         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2016       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2017        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2018        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2019         1.1  augustss 	uhci_soft_qh_t *sqh;
   2020        1.63  augustss 	usbd_status err;
   2021        1.45  augustss 	int len, isread, endpt;
   2022         1.1  augustss 
   2023       1.169  augustss 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
   2024       1.169  augustss 		     xfer, xfer->length, xfer->flags, ii));
   2025         1.1  augustss 
   2026        1.82  augustss 	if (sc->sc_dying)
   2027        1.82  augustss 		return (USBD_IOERROR);
   2028        1.82  augustss 
   2029        1.48  augustss #ifdef DIAGNOSTIC
   2030        1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2031       1.163    provos 		panic("uhci_device_bulk_transfer: a request");
   2032        1.48  augustss #endif
   2033         1.1  augustss 
   2034   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   2035   1.240.6.2       mrg 
   2036        1.63  augustss 	len = xfer->length;
   2037       1.102  augustss 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2038        1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2039         1.1  augustss 	sqh = upipe->u.bulk.sqh;
   2040         1.1  augustss 
   2041         1.1  augustss 	upipe->u.bulk.isread = isread;
   2042         1.1  augustss 	upipe->u.bulk.length = len;
   2043         1.1  augustss 
   2044        1.73  augustss 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2045        1.73  augustss 				   &xfer->dmabuf, &data, &dataend);
   2046   1.240.6.2       mrg 	if (err) {
   2047   1.240.6.2       mrg 		mutex_exit(&sc->sc_lock);
   2048        1.63  augustss 		return (err);
   2049   1.240.6.2       mrg 	}
   2050        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2051       1.223    bouyer 	usb_syncmem(&dataend->dma,
   2052       1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2053       1.223    bouyer 	    sizeof(dataend->td.td_status),
   2054       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2055       1.223    bouyer 
   2056         1.1  augustss 
   2057        1.59  augustss #ifdef UHCI_DEBUG
   2058        1.33  augustss 	if (uhcidebug > 8) {
   2059        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   2060        1.55  augustss 		uhci_dump_tds(data);
   2061         1.1  augustss 	}
   2062         1.1  augustss #endif
   2063         1.1  augustss 
   2064         1.1  augustss 	/* Set up interrupt info. */
   2065        1.63  augustss 	ii->xfer = xfer;
   2066        1.55  augustss 	ii->stdstart = data;
   2067        1.55  augustss 	ii->stdend = dataend;
   2068         1.7  augustss #ifdef DIAGNOSTIC
   2069        1.70  augustss 	if (!ii->isdone) {
   2070        1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   2071        1.70  augustss 	}
   2072         1.7  augustss 	ii->isdone = 0;
   2073         1.7  augustss #endif
   2074         1.1  augustss 
   2075        1.55  augustss 	sqh->elink = data;
   2076       1.121  augustss 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2077       1.223    bouyer 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2078         1.1  augustss 
   2079         1.1  augustss 	uhci_add_bulk(sc, sqh);
   2080        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2081         1.1  augustss 
   2082        1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2083       1.234    dyoung 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   2084        1.91  augustss 			    uhci_timeout, ii);
   2085        1.13  augustss 	}
   2086        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2087         1.1  augustss 
   2088        1.59  augustss #ifdef UHCI_DEBUG
   2089         1.1  augustss 	if (uhcidebug > 10) {
   2090        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   2091        1.55  augustss 		uhci_dump_tds(data);
   2092         1.1  augustss 	}
   2093         1.1  augustss #endif
   2094         1.1  augustss 
   2095        1.26  augustss 	if (sc->sc_bus.use_polling)
   2096        1.63  augustss 		uhci_waitintr(sc, xfer);
   2097        1.26  augustss 
   2098   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2099         1.1  augustss 	return (USBD_IN_PROGRESS);
   2100         1.1  augustss }
   2101         1.1  augustss 
   2102         1.1  augustss /* Abort a device bulk request. */
   2103         1.1  augustss void
   2104       1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   2105         1.1  augustss {
   2106   1.240.6.7       mrg #ifdef DIAGNOSTIC
   2107   1.240.6.7       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2108   1.240.6.7       mrg #endif
   2109   1.240.6.7       mrg 
   2110   1.240.6.7       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2111   1.240.6.7       mrg 
   2112        1.33  augustss 	DPRINTF(("uhci_device_bulk_abort:\n"));
   2113        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2114        1.33  augustss }
   2115        1.33  augustss 
   2116        1.92  augustss /*
   2117       1.154  augustss  * Abort a device request.
   2118       1.154  augustss  * If this routine is called at splusb() it guarantees that the request
   2119       1.154  augustss  * will be removed from the hardware scheduling and that the callback
   2120       1.154  augustss  * for it will be called with USBD_CANCELLED status.
   2121       1.154  augustss  * It's impossible to guarantee that the requested transfer will not
   2122       1.154  augustss  * have happened since the hardware runs concurrently.
   2123       1.154  augustss  * If the transaction has already happened we rely on the ordinary
   2124       1.154  augustss  * interrupt processing to process it.
   2125   1.240.6.8       mrg  * XXX This is most probably wrong.
   2126   1.240.6.8       mrg  * XXXMRG this doesn't make sense anymore.
   2127        1.92  augustss  */
   2128        1.33  augustss void
   2129       1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2130        1.33  augustss {
   2131        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2132       1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2133       1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2134        1.33  augustss 	uhci_soft_td_t *std;
   2135       1.188  augustss 	int wake;
   2136        1.65  augustss 
   2137       1.106  augustss 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   2138        1.33  augustss 
   2139   1.240.6.7       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2140   1.240.6.7       mrg 
   2141       1.153  augustss 	if (sc->sc_dying) {
   2142       1.153  augustss 		/* If we're dying, just do the software part. */
   2143       1.153  augustss 		xfer->status = status;	/* make software ignore it */
   2144       1.234    dyoung 		callout_stop(&xfer->timeout_handle);
   2145       1.153  augustss 		usb_transfer_complete(xfer);
   2146       1.194  christos 		return;
   2147        1.92  augustss 	}
   2148        1.92  augustss 
   2149  1.240.6.14       mrg 	if (cpu_intr_p() || (curlwp->l_pflag & LP_INTR) != 0)
   2150       1.163    provos 		panic("uhci_abort_xfer: not in process context");
   2151       1.153  augustss 
   2152       1.153  augustss 	/*
   2153       1.188  augustss 	 * If an abort is already in progress then just wait for it to
   2154       1.188  augustss 	 * complete and return.
   2155       1.188  augustss 	 */
   2156       1.188  augustss 	if (xfer->hcflags & UXFER_ABORTING) {
   2157       1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
   2158       1.188  augustss #ifdef DIAGNOSTIC
   2159       1.188  augustss 		if (status == USBD_TIMEOUT)
   2160       1.188  augustss 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2161       1.188  augustss #endif
   2162       1.188  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2163       1.188  augustss 		xfer->status = status;
   2164       1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
   2165       1.188  augustss 		xfer->hcflags |= UXFER_ABORTWAIT;
   2166       1.188  augustss 		while (xfer->hcflags & UXFER_ABORTING)
   2167   1.240.6.2       mrg 			cv_wait(&xfer->hccv, &sc->sc_lock);
   2168   1.240.6.2       mrg 		goto done;
   2169       1.188  augustss 	}
   2170       1.188  augustss 	xfer->hcflags |= UXFER_ABORTING;
   2171       1.188  augustss 
   2172       1.188  augustss 	/*
   2173       1.153  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2174       1.153  augustss 	 */
   2175       1.153  augustss 	xfer->status = status;	/* make software ignore it */
   2176       1.234    dyoung 	callout_stop(&xfer->timeout_handle);
   2177       1.153  augustss 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   2178       1.223    bouyer 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   2179       1.223    bouyer 		usb_syncmem(&std->dma,
   2180       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2181       1.223    bouyer 		    sizeof(std->td.td_status),
   2182       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2183        1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2184       1.223    bouyer 		usb_syncmem(&std->dma,
   2185       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2186       1.223    bouyer 		    sizeof(std->td.td_status),
   2187       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2188       1.223    bouyer 	}
   2189        1.92  augustss 
   2190       1.162  augustss 	/*
   2191       1.153  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2192       1.153  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2193       1.153  augustss 	 * has run.
   2194       1.153  augustss 	 */
   2195       1.154  augustss 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
   2196       1.153  augustss 	sc->sc_softwake = 1;
   2197       1.153  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2198   1.240.6.2       mrg 	DPRINTFN(1,("uhci_abort_xfer: cv_wait\n"));
   2199   1.240.6.2       mrg 	cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
   2200       1.162  augustss 
   2201       1.153  augustss 	/*
   2202       1.153  augustss 	 * Step 3: Execute callback.
   2203       1.153  augustss 	 */
   2204       1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   2205       1.100  augustss #ifdef DIAGNOSTIC
   2206       1.106  augustss 	ii->isdone = 1;
   2207       1.100  augustss #endif
   2208       1.188  augustss 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2209       1.188  augustss 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2210       1.106  augustss 	usb_transfer_complete(xfer);
   2211       1.188  augustss 	if (wake)
   2212   1.240.6.2       mrg 		cv_broadcast(&xfer->hccv);
   2213   1.240.6.2       mrg done:
   2214   1.240.6.7       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2215         1.1  augustss }
   2216         1.1  augustss 
   2217         1.1  augustss /* Close a device bulk pipe. */
   2218         1.1  augustss void
   2219       1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   2220         1.1  augustss {
   2221         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2222         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2223       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2224         1.1  augustss 
   2225   1.240.6.6       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2226   1.240.6.6       mrg 
   2227         1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2228       1.236  drochner 
   2229       1.236  drochner 	pipe->endpoint->datatoggle = upipe->nexttoggle;
   2230         1.1  augustss }
   2231         1.1  augustss 
   2232         1.1  augustss usbd_status
   2233       1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2234         1.1  augustss {
   2235   1.240.6.2       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2236        1.63  augustss 	usbd_status err;
   2237        1.16  augustss 
   2238        1.52  augustss 	/* Insert last in queue. */
   2239   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   2240        1.63  augustss 	err = usb_insert_transfer(xfer);
   2241   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2242        1.63  augustss 	if (err)
   2243        1.63  augustss 		return (err);
   2244        1.52  augustss 
   2245       1.152  augustss 	/*
   2246        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2247        1.92  augustss 	 * so start it first.
   2248        1.67  augustss 	 */
   2249        1.63  augustss 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2250        1.16  augustss }
   2251        1.16  augustss 
   2252        1.16  augustss usbd_status
   2253       1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2254        1.16  augustss {
   2255       1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2256        1.63  augustss 	usbd_status err;
   2257         1.1  augustss 
   2258        1.82  augustss 	if (sc->sc_dying)
   2259        1.82  augustss 		return (USBD_IOERROR);
   2260        1.82  augustss 
   2261        1.48  augustss #ifdef DIAGNOSTIC
   2262        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2263       1.163    provos 		panic("uhci_device_ctrl_transfer: not a request");
   2264        1.48  augustss #endif
   2265         1.1  augustss 
   2266   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   2267        1.63  augustss 	err = uhci_device_request(xfer);
   2268   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2269        1.63  augustss 	if (err)
   2270        1.63  augustss 		return (err);
   2271         1.1  augustss 
   2272         1.9  augustss 	if (sc->sc_bus.use_polling)
   2273        1.63  augustss 		uhci_waitintr(sc, xfer);
   2274         1.1  augustss 	return (USBD_IN_PROGRESS);
   2275         1.1  augustss }
   2276         1.1  augustss 
   2277         1.1  augustss usbd_status
   2278       1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2279         1.1  augustss {
   2280   1.240.6.2       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2281        1.63  augustss 	usbd_status err;
   2282        1.16  augustss 
   2283        1.52  augustss 	/* Insert last in queue. */
   2284   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   2285        1.63  augustss 	err = usb_insert_transfer(xfer);
   2286   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2287        1.63  augustss 	if (err)
   2288        1.63  augustss 		return (err);
   2289        1.52  augustss 
   2290       1.152  augustss 	/*
   2291        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2292        1.92  augustss 	 * so start it first.
   2293        1.67  augustss 	 */
   2294        1.63  augustss 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2295        1.16  augustss }
   2296        1.16  augustss 
   2297        1.16  augustss usbd_status
   2298       1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2299        1.16  augustss {
   2300        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2301         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2302       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2303        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2304        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2305         1.1  augustss 	uhci_soft_qh_t *sqh;
   2306        1.63  augustss 	usbd_status err;
   2307       1.187     skrll 	int isread, endpt;
   2308   1.240.6.2       mrg 	int i;
   2309         1.1  augustss 
   2310        1.82  augustss 	if (sc->sc_dying)
   2311        1.82  augustss 		return (USBD_IOERROR);
   2312        1.82  augustss 
   2313        1.63  augustss 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2314        1.63  augustss 		    xfer, xfer->length, xfer->flags));
   2315         1.1  augustss 
   2316        1.48  augustss #ifdef DIAGNOSTIC
   2317        1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2318       1.163    provos 		panic("uhci_device_intr_transfer: a request");
   2319        1.48  augustss #endif
   2320         1.1  augustss 
   2321       1.187     skrll 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2322       1.187     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2323       1.187     skrll 
   2324       1.187     skrll 	upipe->u.intr.isread = isread;
   2325       1.187     skrll 
   2326       1.187     skrll 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
   2327       1.187     skrll 				   xfer->flags, &xfer->dmabuf, &data,
   2328       1.187     skrll 				   &dataend);
   2329        1.63  augustss 	if (err)
   2330        1.63  augustss 		return (err);
   2331        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2332       1.223    bouyer 	usb_syncmem(&dataend->dma,
   2333       1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2334       1.223    bouyer 	    sizeof(dataend->td.td_status),
   2335       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2336         1.1  augustss 
   2337        1.59  augustss #ifdef UHCI_DEBUG
   2338         1.1  augustss 	if (uhcidebug > 10) {
   2339        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2340        1.55  augustss 		uhci_dump_tds(data);
   2341         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2342         1.1  augustss 	}
   2343         1.1  augustss #endif
   2344         1.1  augustss 
   2345   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   2346         1.1  augustss 	/* Set up interrupt info. */
   2347        1.63  augustss 	ii->xfer = xfer;
   2348        1.55  augustss 	ii->stdstart = data;
   2349        1.55  augustss 	ii->stdend = dataend;
   2350         1.7  augustss #ifdef DIAGNOSTIC
   2351        1.70  augustss 	if (!ii->isdone) {
   2352        1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2353        1.70  augustss 	}
   2354         1.7  augustss 	ii->isdone = 0;
   2355         1.7  augustss #endif
   2356         1.1  augustss 
   2357       1.152  augustss 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2358        1.12  augustss 		     upipe->u.intr.qhs[0]));
   2359         1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2360         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2361        1.55  augustss 		sqh->elink = data;
   2362       1.121  augustss 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2363       1.223    bouyer 		usb_syncmem(&sqh->dma,
   2364       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2365       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2366       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2367         1.1  augustss 	}
   2368        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2369        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2370   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2371         1.1  augustss 
   2372        1.59  augustss #ifdef UHCI_DEBUG
   2373         1.1  augustss 	if (uhcidebug > 10) {
   2374        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2375        1.55  augustss 		uhci_dump_tds(data);
   2376         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2377         1.1  augustss 	}
   2378         1.1  augustss #endif
   2379         1.1  augustss 
   2380         1.1  augustss 	return (USBD_IN_PROGRESS);
   2381         1.1  augustss }
   2382         1.1  augustss 
   2383         1.1  augustss /* Abort a device control request. */
   2384         1.1  augustss void
   2385       1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2386         1.1  augustss {
   2387   1.240.6.7       mrg #ifdef DIAGNOSTIC
   2388   1.240.6.7       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2389   1.240.6.7       mrg #endif
   2390   1.240.6.7       mrg 
   2391   1.240.6.7       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2392   1.240.6.7       mrg 
   2393        1.33  augustss 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2394        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2395         1.1  augustss }
   2396         1.1  augustss 
   2397         1.1  augustss /* Close a device control pipe. */
   2398         1.1  augustss void
   2399       1.205  christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2400         1.1  augustss {
   2401         1.1  augustss }
   2402         1.1  augustss 
   2403         1.1  augustss /* Abort a device interrupt request. */
   2404         1.1  augustss void
   2405       1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2406         1.1  augustss {
   2407   1.240.6.7       mrg #ifdef DIAGNOSTIC
   2408   1.240.6.7       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2409   1.240.6.7       mrg #endif
   2410   1.240.6.7       mrg 
   2411   1.240.6.7       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2412   1.240.6.7       mrg 
   2413        1.63  augustss 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2414        1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2415        1.36  augustss 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2416       1.154  augustss 		xfer->pipe->intrxfer = NULL;
   2417         1.1  augustss 	}
   2418        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2419         1.1  augustss }
   2420         1.1  augustss 
   2421         1.1  augustss /* Close a device interrupt pipe. */
   2422         1.1  augustss void
   2423       1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2424         1.1  augustss {
   2425         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2426       1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   2427        1.92  augustss 	int i, npoll;
   2428         1.1  augustss 
   2429   1.240.6.6       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2430   1.240.6.6       mrg 
   2431         1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2432         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2433         1.1  augustss 	for (i = 0; i < npoll; i++)
   2434        1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2435         1.1  augustss 
   2436       1.152  augustss 	/*
   2437         1.1  augustss 	 * We now have to wait for any activity on the physical
   2438         1.1  augustss 	 * descriptors to stop.
   2439         1.1  augustss 	 */
   2440        1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2);
   2441         1.1  augustss 
   2442         1.1  augustss 	for(i = 0; i < npoll; i++)
   2443         1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2444   1.240.6.2       mrg 	kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *));
   2445         1.1  augustss 
   2446         1.1  augustss 	/* XXX free other resources */
   2447         1.1  augustss }
   2448         1.1  augustss 
   2449         1.1  augustss usbd_status
   2450       1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2451         1.1  augustss {
   2452        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2453        1.63  augustss 	usb_device_request_t *req = &xfer->request;
   2454         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2455       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2456         1.1  augustss 	int addr = dev->address;
   2457         1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2458        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2459        1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2460         1.1  augustss 	uhci_soft_qh_t *sqh;
   2461         1.1  augustss 	int len;
   2462         1.1  augustss 	u_int32_t ls;
   2463        1.63  augustss 	usbd_status err;
   2464         1.1  augustss 	int isread;
   2465   1.240.6.2       mrg 
   2466   1.240.6.2       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2467         1.1  augustss 
   2468        1.13  augustss 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2469        1.12  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2470         1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2471         1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   2472         1.1  augustss 		    addr, endpt));
   2473         1.1  augustss 
   2474       1.144  augustss 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2475         1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2476         1.1  augustss 	len = UGETW(req->wLength);
   2477         1.1  augustss 
   2478         1.1  augustss 	setup = upipe->u.ctl.setup;
   2479         1.1  augustss 	stat = upipe->u.ctl.stat;
   2480         1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2481         1.1  augustss 
   2482         1.1  augustss 	/* Set up data transaction */
   2483         1.1  augustss 	if (len != 0) {
   2484        1.38  augustss 		upipe->nexttoggle = 1;
   2485        1.73  augustss 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2486        1.73  augustss 					   &xfer->dmabuf, &data, &dataend);
   2487        1.63  augustss 		if (err)
   2488        1.63  augustss 			return (err);
   2489        1.55  augustss 		next = data;
   2490        1.55  augustss 		dataend->link.std = stat;
   2491       1.121  augustss 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2492       1.223    bouyer 		usb_syncmem(&dataend->dma,
   2493       1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2494       1.223    bouyer 		    sizeof(dataend->td.td_link),
   2495       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2496         1.1  augustss 	} else {
   2497         1.1  augustss 		next = stat;
   2498         1.1  augustss 	}
   2499         1.1  augustss 	upipe->u.ctl.length = len;
   2500         1.1  augustss 
   2501       1.159  augustss 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2502       1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   2503         1.1  augustss 
   2504        1.42  augustss 	setup->link.std = next;
   2505       1.121  augustss 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2506        1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2507        1.88   tsutsui 		UHCI_TD_ACTIVE);
   2508        1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2509       1.160  augustss 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2510       1.223    bouyer 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2511       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2512        1.42  augustss 
   2513        1.92  augustss 	stat->link.std = NULL;
   2514        1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2515       1.152  augustss 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2516        1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2517       1.152  augustss 	stat->td.td_token =
   2518        1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2519        1.88   tsutsui 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2520        1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2521       1.223    bouyer 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2522       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2523         1.1  augustss 
   2524        1.59  augustss #ifdef UHCI_DEBUG
   2525        1.67  augustss 	if (uhcidebug > 10) {
   2526        1.47  augustss 		DPRINTF(("uhci_device_request: before transfer\n"));
   2527        1.41  augustss 		uhci_dump_tds(setup);
   2528         1.1  augustss 	}
   2529         1.1  augustss #endif
   2530         1.1  augustss 
   2531         1.1  augustss 	/* Set up interrupt info. */
   2532        1.63  augustss 	ii->xfer = xfer;
   2533         1.1  augustss 	ii->stdstart = setup;
   2534         1.1  augustss 	ii->stdend = stat;
   2535         1.7  augustss #ifdef DIAGNOSTIC
   2536        1.70  augustss 	if (!ii->isdone) {
   2537        1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2538        1.70  augustss 	}
   2539         1.7  augustss 	ii->isdone = 0;
   2540         1.7  augustss #endif
   2541         1.1  augustss 
   2542        1.42  augustss 	sqh->elink = setup;
   2543       1.121  augustss 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2544       1.223    bouyer 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2545         1.1  augustss 
   2546       1.144  augustss 	if (dev->speed == USB_SPEED_LOW)
   2547       1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2548       1.123  augustss 	else
   2549       1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2550        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2551        1.59  augustss #ifdef UHCI_DEBUG
   2552         1.1  augustss 	if (uhcidebug > 12) {
   2553         1.1  augustss 		uhci_soft_td_t *std;
   2554         1.1  augustss 		uhci_soft_qh_t *xqh;
   2555        1.13  augustss 		uhci_soft_qh_t *sxqh;
   2556        1.13  augustss 		int maxqh = 0;
   2557         1.1  augustss 		uhci_physaddr_t link;
   2558        1.47  augustss 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2559         1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2560       1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2561        1.42  augustss 		     std = std->link.std) {
   2562        1.88   tsutsui 			link = le32toh(std->td.td_link);
   2563         1.1  augustss 			uhci_dump_td(std);
   2564         1.1  augustss 		}
   2565        1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2566        1.67  augustss 		uhci_dump_qh(sxqh);
   2567        1.67  augustss 		for (xqh = sxqh;
   2568        1.63  augustss 		     xqh != NULL;
   2569       1.152  augustss 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2570       1.121  augustss                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2571         1.1  augustss 			uhci_dump_qh(xqh);
   2572        1.13  augustss 		}
   2573        1.47  augustss 		DPRINTF(("Enqueued QH:\n"));
   2574         1.1  augustss 		uhci_dump_qh(sqh);
   2575        1.42  augustss 		uhci_dump_tds(sqh->elink);
   2576         1.1  augustss 	}
   2577         1.1  augustss #endif
   2578        1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2579       1.234    dyoung 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   2580        1.91  augustss 			    uhci_timeout, ii);
   2581        1.13  augustss 	}
   2582        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2583         1.1  augustss 
   2584         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2585         1.1  augustss }
   2586         1.1  augustss 
   2587        1.16  augustss usbd_status
   2588       1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2589        1.16  augustss {
   2590   1.240.6.2       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2591        1.63  augustss 	usbd_status err;
   2592        1.48  augustss 
   2593        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2594        1.48  augustss 
   2595        1.48  augustss 	/* Put it on our queue, */
   2596   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   2597        1.63  augustss 	err = usb_insert_transfer(xfer);
   2598   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2599        1.48  augustss 
   2600        1.48  augustss 	/* bail out on error, */
   2601        1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2602        1.63  augustss 		return (err);
   2603        1.48  augustss 
   2604        1.48  augustss 	/* XXX should check inuse here */
   2605        1.48  augustss 
   2606        1.48  augustss 	/* insert into schedule, */
   2607        1.63  augustss 	uhci_device_isoc_enter(xfer);
   2608        1.48  augustss 
   2609       1.102  augustss 	/* and start if the pipe wasn't running */
   2610        1.67  augustss 	if (!err)
   2611        1.63  augustss 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2612        1.48  augustss 
   2613        1.63  augustss 	return (err);
   2614        1.48  augustss }
   2615        1.48  augustss 
   2616        1.48  augustss void
   2617       1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2618        1.48  augustss {
   2619        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2620        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2621       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2622        1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2623       1.152  augustss 	uhci_soft_td_t *std;
   2624       1.223    bouyer 	u_int32_t buf, len, status, offs;
   2625   1.240.6.2       mrg 	int i, next, nframes;
   2626       1.223    bouyer 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2627        1.48  augustss 
   2628        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2629        1.48  augustss 		    "nframes=%d\n",
   2630        1.63  augustss 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2631        1.48  augustss 
   2632        1.82  augustss 	if (sc->sc_dying)
   2633        1.82  augustss 		return;
   2634        1.82  augustss 
   2635        1.63  augustss 	if (xfer->status == USBD_IN_PROGRESS) {
   2636        1.48  augustss 		/* This request has already been entered into the frame list */
   2637        1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2638        1.68  augustss 		/* XXX */
   2639        1.48  augustss 	}
   2640        1.48  augustss 
   2641        1.48  augustss #ifdef DIAGNOSTIC
   2642        1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2643        1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   2644        1.19  augustss #endif
   2645        1.16  augustss 
   2646        1.48  augustss 	next = iso->next;
   2647        1.48  augustss 	if (next == -1) {
   2648        1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   2649        1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2650        1.48  augustss 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2651        1.48  augustss 	}
   2652        1.48  augustss 
   2653        1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   2654        1.92  augustss 	UXFER(xfer)->curframe = next;
   2655        1.48  augustss 
   2656       1.160  augustss 	buf = DMAADDR(&xfer->dmabuf, 0);
   2657       1.223    bouyer 	offs = 0;
   2658        1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2659        1.88   tsutsui 				     UHCI_TD_ACTIVE |
   2660        1.88   tsutsui 				     UHCI_TD_IOS);
   2661        1.63  augustss 	nframes = xfer->nframes;
   2662   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   2663        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2664        1.48  augustss 		std = iso->stds[next];
   2665        1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2666        1.48  augustss 			next = 0;
   2667        1.63  augustss 		len = xfer->frlengths[i];
   2668        1.88   tsutsui 		std->td.td_buffer = htole32(buf);
   2669       1.223    bouyer 		usb_syncmem(&xfer->dmabuf, offs, len,
   2670       1.223    bouyer 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2671        1.48  augustss 		if (i == nframes - 1)
   2672        1.88   tsutsui 			status |= UHCI_TD_IOC;
   2673        1.88   tsutsui 		std->td.td_status = htole32(status);
   2674        1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2675        1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2676       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2677       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2678        1.59  augustss #ifdef UHCI_DEBUG
   2679        1.48  augustss 		if (uhcidebug > 5) {
   2680        1.48  augustss 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2681        1.48  augustss 			uhci_dump_td(std);
   2682        1.48  augustss 		}
   2683        1.48  augustss #endif
   2684        1.48  augustss 		buf += len;
   2685       1.223    bouyer 		offs += len;
   2686        1.48  augustss 	}
   2687        1.48  augustss 	iso->next = next;
   2688        1.63  augustss 	iso->inuse += xfer->nframes;
   2689        1.16  augustss 
   2690   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2691        1.16  augustss }
   2692        1.16  augustss 
   2693        1.16  augustss usbd_status
   2694       1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   2695        1.16  augustss {
   2696        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2697       1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2698        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2699        1.48  augustss 	uhci_soft_td_t *end;
   2700   1.240.6.2       mrg 	int i;
   2701        1.48  augustss 
   2702        1.96  augustss 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2703        1.96  augustss 
   2704   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   2705   1.240.6.2       mrg 
   2706   1.240.6.2       mrg 	if (sc->sc_dying) {
   2707   1.240.6.2       mrg 		mutex_exit(&sc->sc_lock);
   2708        1.82  augustss 		return (USBD_IOERROR);
   2709   1.240.6.2       mrg 	}
   2710        1.82  augustss 
   2711        1.48  augustss #ifdef DIAGNOSTIC
   2712        1.63  augustss 	if (xfer->status != USBD_IN_PROGRESS)
   2713        1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2714        1.48  augustss #endif
   2715        1.48  augustss 
   2716        1.48  augustss 	/* Find the last TD */
   2717        1.92  augustss 	i = UXFER(xfer)->curframe + xfer->nframes;
   2718        1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   2719        1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   2720        1.48  augustss 	end = upipe->u.iso.stds[i];
   2721        1.48  augustss 
   2722        1.96  augustss #ifdef DIAGNOSTIC
   2723        1.96  augustss 	if (end == NULL) {
   2724        1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   2725        1.96  augustss 		return (USBD_INVAL);
   2726        1.96  augustss 	}
   2727        1.96  augustss #endif
   2728        1.96  augustss 
   2729        1.48  augustss 	/* Set up interrupt info. */
   2730        1.63  augustss 	ii->xfer = xfer;
   2731        1.48  augustss 	ii->stdstart = end;
   2732        1.48  augustss 	ii->stdend = end;
   2733        1.48  augustss #ifdef DIAGNOSTIC
   2734       1.102  augustss 	if (!ii->isdone)
   2735        1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2736        1.48  augustss 	ii->isdone = 0;
   2737        1.48  augustss #endif
   2738        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2739       1.152  augustss 
   2740   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2741        1.48  augustss 
   2742        1.48  augustss 	return (USBD_IN_PROGRESS);
   2743        1.16  augustss }
   2744        1.16  augustss 
   2745        1.16  augustss void
   2746       1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2747        1.16  augustss {
   2748   1.240.6.2       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2749        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2750        1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2751        1.48  augustss 	uhci_soft_td_t *std;
   2752   1.240.6.2       mrg 	int i, n, nframes, maxlen, len;
   2753        1.92  augustss 
   2754   1.240.6.7       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2755        1.92  augustss 
   2756        1.92  augustss 	/* Transfer is already done. */
   2757       1.152  augustss 	if (xfer->status != USBD_NOT_STARTED &&
   2758        1.92  augustss 	    xfer->status != USBD_IN_PROGRESS) {
   2759        1.92  augustss 		return;
   2760        1.92  augustss 	}
   2761        1.48  augustss 
   2762        1.92  augustss 	/* Give xfer the requested abort code. */
   2763        1.63  augustss 	xfer->status = USBD_CANCELLED;
   2764        1.48  augustss 
   2765        1.48  augustss 	/* make hardware ignore it, */
   2766        1.63  augustss 	nframes = xfer->nframes;
   2767        1.92  augustss 	n = UXFER(xfer)->curframe;
   2768        1.92  augustss 	maxlen = 0;
   2769        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2770        1.48  augustss 		std = stds[n];
   2771       1.223    bouyer 		usb_syncmem(&std->dma,
   2772       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2773       1.223    bouyer 		    sizeof(std->td.td_status),
   2774       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2775        1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2776       1.223    bouyer 		usb_syncmem(&std->dma,
   2777       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2778       1.223    bouyer 		    sizeof(std->td.td_status),
   2779       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2780       1.223    bouyer 		usb_syncmem(&std->dma,
   2781       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_token),
   2782       1.223    bouyer 		    sizeof(std->td.td_token),
   2783       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2784       1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2785        1.92  augustss 		if (len > maxlen)
   2786        1.92  augustss 			maxlen = len;
   2787        1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2788        1.48  augustss 			n = 0;
   2789        1.48  augustss 	}
   2790        1.48  augustss 
   2791        1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   2792        1.92  augustss 	delay(maxlen);
   2793        1.92  augustss 
   2794        1.96  augustss #ifdef DIAGNOSTIC
   2795        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   2796        1.96  augustss #endif
   2797        1.92  augustss 	/* Run callback and remove from interrupt list. */
   2798        1.92  augustss 	usb_transfer_complete(xfer);
   2799        1.48  augustss 
   2800   1.240.6.7       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2801        1.16  augustss }
   2802        1.16  augustss 
   2803        1.16  augustss void
   2804       1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   2805        1.16  augustss {
   2806        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2807        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2808       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2809        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2810        1.16  augustss 	struct iso *iso;
   2811   1.240.6.2       mrg 	int i;
   2812        1.16  augustss 
   2813   1.240.6.6       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2814   1.240.6.6       mrg 
   2815        1.16  augustss 	/*
   2816        1.16  augustss 	 * Make sure all TDs are marked as inactive.
   2817        1.16  augustss 	 * Wait for completion.
   2818        1.16  augustss 	 * Unschedule.
   2819        1.16  augustss 	 * Deallocate.
   2820        1.16  augustss 	 */
   2821        1.16  augustss 	iso = &upipe->u.iso;
   2822        1.16  augustss 
   2823       1.223    bouyer 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2824       1.223    bouyer 		std = iso->stds[i];
   2825       1.223    bouyer 		usb_syncmem(&std->dma,
   2826       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2827       1.223    bouyer 		    sizeof(std->td.td_status),
   2828       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2829       1.223    bouyer 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2830       1.223    bouyer 		usb_syncmem(&std->dma,
   2831       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2832       1.223    bouyer 		    sizeof(std->td.td_status),
   2833       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2834       1.223    bouyer 	}
   2835        1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
   2836        1.16  augustss 
   2837        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2838        1.16  augustss 		std = iso->stds[i];
   2839        1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   2840        1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   2841        1.42  augustss 		     vstd = vstd->link.std)
   2842        1.16  augustss 			;
   2843        1.67  augustss 		if (vstd == NULL) {
   2844        1.16  augustss 			/*panic*/
   2845        1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   2846   1.240.6.2       mrg 			mutex_exit(&sc->sc_lock);
   2847        1.16  augustss 			return;
   2848        1.16  augustss 		}
   2849        1.42  augustss 		vstd->link = std->link;
   2850       1.223    bouyer 		usb_syncmem(&std->dma,
   2851       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2852       1.223    bouyer 		    sizeof(std->td.td_link),
   2853       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2854        1.42  augustss 		vstd->td.td_link = std->td.td_link;
   2855       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2856       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2857       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2858       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2859        1.16  augustss 		uhci_free_std(sc, std);
   2860        1.16  augustss 	}
   2861        1.16  augustss 
   2862   1.240.6.2       mrg 	kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *));
   2863        1.16  augustss }
   2864        1.16  augustss 
   2865        1.16  augustss usbd_status
   2866       1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   2867        1.16  augustss {
   2868        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2869        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2870       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2871        1.16  augustss 	int addr = upipe->pipe.device->address;
   2872        1.16  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2873        1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2874        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2875        1.48  augustss 	u_int32_t token;
   2876        1.16  augustss 	struct iso *iso;
   2877   1.240.6.2       mrg 	int i;
   2878        1.16  augustss 
   2879        1.16  augustss 	iso = &upipe->u.iso;
   2880   1.240.6.2       mrg 	iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT *
   2881   1.240.6.2       mrg 				 sizeof (uhci_soft_td_t *),
   2882   1.240.6.2       mrg 			       KM_SLEEP);
   2883   1.240.6.2       mrg 	if (iso->stds == NULL)
   2884   1.240.6.2       mrg 		return USBD_NOMEM;
   2885        1.16  augustss 
   2886        1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2887        1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2888        1.16  augustss 
   2889   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   2890   1.240.6.2       mrg 
   2891        1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   2892        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2893        1.48  augustss 		std = uhci_alloc_std(sc);
   2894        1.48  augustss 		if (std == 0)
   2895        1.48  augustss 			goto bad;
   2896        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2897        1.88   tsutsui 		std->td.td_token = htole32(token);
   2898       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2899       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2900        1.48  augustss 		iso->stds[i] = std;
   2901        1.16  augustss 	}
   2902        1.16  augustss 
   2903        1.48  augustss 	/* Insert TDs into schedule. */
   2904        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2905        1.16  augustss 		std = iso->stds[i];
   2906        1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   2907       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2908       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2909       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2910       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2911        1.42  augustss 		std->link = vstd->link;
   2912        1.42  augustss 		std->td.td_link = vstd->td.td_link;
   2913       1.223    bouyer 		usb_syncmem(&std->dma,
   2914       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2915       1.223    bouyer 		    sizeof(std->td.td_link),
   2916       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2917        1.42  augustss 		vstd->link.std = std;
   2918       1.121  augustss 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2919       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2920       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2921       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2922       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2923        1.16  augustss 	}
   2924   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2925        1.16  augustss 
   2926        1.48  augustss 	iso->next = -1;
   2927        1.48  augustss 	iso->inuse = 0;
   2928        1.48  augustss 
   2929        1.16  augustss 	return (USBD_NORMAL_COMPLETION);
   2930        1.16  augustss 
   2931        1.48  augustss  bad:
   2932        1.16  augustss 	while (--i >= 0)
   2933        1.16  augustss 		uhci_free_std(sc, iso->stds[i]);
   2934   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   2935   1.240.6.2       mrg 	kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *));
   2936        1.16  augustss 	return (USBD_NOMEM);
   2937        1.16  augustss }
   2938        1.16  augustss 
   2939        1.16  augustss void
   2940       1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   2941        1.16  augustss {
   2942        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2943       1.223    bouyer 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2944       1.223    bouyer 	int i, offs;
   2945       1.223    bouyer 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2946       1.223    bouyer 
   2947        1.48  augustss 
   2948       1.197   gdamore 	DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
   2949       1.197   gdamore 			xfer->actlen, xfer->busy_free));
   2950        1.93  augustss 
   2951        1.96  augustss 	if (ii->xfer != xfer)
   2952        1.96  augustss 		/* Not on interrupt list, ignore it. */
   2953       1.170  augustss 		return;
   2954       1.170  augustss 
   2955       1.170  augustss 	if (!uhci_active_intr_info(ii))
   2956        1.96  augustss 		return;
   2957        1.96  augustss 
   2958        1.93  augustss #ifdef DIAGNOSTIC
   2959        1.93  augustss         if (ii->stdend == NULL) {
   2960        1.93  augustss                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2961        1.93  augustss #ifdef UHCI_DEBUG
   2962        1.93  augustss 		uhci_dump_ii(ii);
   2963        1.93  augustss #endif
   2964        1.93  augustss 		return;
   2965        1.93  augustss 	}
   2966        1.93  augustss #endif
   2967        1.48  augustss 
   2968        1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   2969       1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2970       1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2971       1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2972       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2973        1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2974       1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2975       1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2976       1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2977       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2978        1.48  augustss 
   2979        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2980       1.223    bouyer 
   2981       1.223    bouyer 	offs = 0;
   2982       1.223    bouyer 	for (i = 0; i < xfer->nframes; i++) {
   2983       1.223    bouyer 		usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i],
   2984       1.223    bouyer 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2985       1.223    bouyer 		offs += xfer->frlengths[i];
   2986       1.223    bouyer 	}
   2987        1.16  augustss }
   2988        1.16  augustss 
   2989         1.1  augustss void
   2990       1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   2991         1.1  augustss {
   2992        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2993         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2994        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2995         1.1  augustss 	uhci_soft_qh_t *sqh;
   2996       1.223    bouyer 	int i, npoll, isread;
   2997         1.1  augustss 
   2998       1.173      gson 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
   2999         1.1  augustss 
   3000   1.240.6.2       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3001   1.240.6.2       mrg 
   3002         1.1  augustss 	npoll = upipe->u.intr.npoll;
   3003         1.1  augustss 	for(i = 0; i < npoll; i++) {
   3004         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   3005       1.121  augustss 		sqh->elink = NULL;
   3006        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3007       1.223    bouyer 		usb_syncmem(&sqh->dma,
   3008       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3009       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3010       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3011         1.1  augustss 	}
   3012       1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3013         1.1  augustss 
   3014       1.223    bouyer 	isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   3015       1.223    bouyer 	usb_syncmem(&xfer->dmabuf, 0, xfer->length,
   3016       1.223    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3017       1.223    bouyer 
   3018         1.1  augustss 	/* XXX Wasteful. */
   3019        1.63  augustss 	if (xfer->pipe->repeat) {
   3020        1.55  augustss 		uhci_soft_td_t *data, *dataend;
   3021         1.1  augustss 
   3022        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   3023        1.92  augustss 
   3024         1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   3025       1.221  jmcneill 		uhci_alloc_std_chain(upipe, sc, xfer->length,
   3026       1.221  jmcneill 				     upipe->u.intr.isread, xfer->flags,
   3027        1.63  augustss 				     &xfer->dmabuf, &data, &dataend);
   3028        1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   3029       1.223    bouyer 		usb_syncmem(&dataend->dma,
   3030       1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_status),
   3031       1.223    bouyer 		    sizeof(dataend->td.td_status),
   3032       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3033         1.1  augustss 
   3034        1.59  augustss #ifdef UHCI_DEBUG
   3035         1.1  augustss 		if (uhcidebug > 10) {
   3036        1.55  augustss 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   3037        1.55  augustss 			uhci_dump_tds(data);
   3038         1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   3039         1.1  augustss 		}
   3040         1.1  augustss #endif
   3041         1.1  augustss 
   3042        1.55  augustss 		ii->stdstart = data;
   3043        1.55  augustss 		ii->stdend = dataend;
   3044         1.7  augustss #ifdef DIAGNOSTIC
   3045        1.70  augustss 		if (!ii->isdone) {
   3046        1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   3047        1.70  augustss 		}
   3048         1.7  augustss 		ii->isdone = 0;
   3049         1.7  augustss #endif
   3050         1.1  augustss 		for (i = 0; i < npoll; i++) {
   3051         1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   3052        1.55  augustss 			sqh->elink = data;
   3053       1.121  augustss 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   3054       1.223    bouyer 			usb_syncmem(&sqh->dma,
   3055       1.223    bouyer 			    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3056       1.223    bouyer 			    sizeof(sqh->qh.qh_elink),
   3057       1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3058         1.1  augustss 		}
   3059        1.92  augustss 		xfer->status = USBD_IN_PROGRESS;
   3060        1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   3061         1.1  augustss 	} else {
   3062        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   3063       1.169  augustss 		if (uhci_active_intr_info(ii))
   3064       1.169  augustss 			uhci_del_intr_info(ii);
   3065         1.1  augustss 	}
   3066         1.1  augustss }
   3067         1.1  augustss 
   3068         1.1  augustss /* Deallocate request data structures */
   3069         1.1  augustss void
   3070       1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   3071         1.1  augustss {
   3072        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3073         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3074        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3075       1.223    bouyer 	int len = UGETW(xfer->request.wLength);
   3076       1.223    bouyer 	int isread = (xfer->request.bmRequestType & UT_READ);
   3077         1.1  augustss 
   3078   1.240.6.2       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3079   1.240.6.2       mrg 
   3080         1.7  augustss #ifdef DIAGNOSTIC
   3081        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3082       1.173      gson 		panic("uhci_device_ctrl_done: not a request");
   3083         1.7  augustss #endif
   3084         1.1  augustss 
   3085       1.169  augustss 	if (!uhci_active_intr_info(ii))
   3086       1.169  augustss 		return;
   3087       1.169  augustss 
   3088        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3089         1.1  augustss 
   3090       1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   3091       1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   3092       1.123  augustss 	else
   3093       1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   3094         1.1  augustss 
   3095        1.49  augustss 	if (upipe->u.ctl.length != 0)
   3096        1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   3097        1.49  augustss 
   3098       1.223    bouyer 	if (len) {
   3099       1.223    bouyer 		usb_syncmem(&xfer->dmabuf, 0, len,
   3100       1.223    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3101       1.223    bouyer 	}
   3102       1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0,
   3103       1.223    bouyer 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3104       1.223    bouyer 
   3105       1.173      gson 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
   3106         1.1  augustss }
   3107         1.1  augustss 
   3108         1.1  augustss /* Deallocate request data structures */
   3109         1.1  augustss void
   3110       1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   3111         1.1  augustss {
   3112        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3113         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3114        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3115       1.169  augustss 
   3116       1.173      gson 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
   3117       1.169  augustss 		    xfer, ii, sc, upipe));
   3118       1.169  augustss 
   3119   1.240.6.2       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3120   1.240.6.2       mrg 
   3121       1.169  augustss 	if (!uhci_active_intr_info(ii))
   3122       1.169  augustss 		return;
   3123         1.1  augustss 
   3124        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3125         1.1  augustss 
   3126         1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   3127        1.32  augustss 
   3128       1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3129        1.32  augustss 
   3130       1.173      gson 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
   3131         1.1  augustss }
   3132         1.1  augustss 
   3133         1.1  augustss /* Add interrupt QH, called with vflock. */
   3134         1.1  augustss void
   3135       1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3136         1.1  augustss {
   3137        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3138        1.42  augustss 	uhci_soft_qh_t *eqh;
   3139         1.1  augustss 
   3140        1.92  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3141        1.92  augustss 
   3142        1.42  augustss 	eqh = vf->eqh;
   3143       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3144       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3145       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   3146        1.42  augustss 	sqh->hlink       = eqh->hlink;
   3147        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3148       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3149       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3150       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3151        1.42  augustss 	eqh->hlink       = sqh;
   3152       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3153       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3154       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3155       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3156         1.1  augustss 	vf->eqh = sqh;
   3157         1.1  augustss 	vf->bandwidth++;
   3158         1.1  augustss }
   3159         1.1  augustss 
   3160       1.119  augustss /* Remove interrupt QH. */
   3161         1.1  augustss void
   3162       1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3163         1.1  augustss {
   3164        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3165         1.1  augustss 	uhci_soft_qh_t *pqh;
   3166         1.1  augustss 
   3167        1.92  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3168         1.1  augustss 
   3169       1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   3170       1.223    bouyer 
   3171       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3172       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   3173       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3174       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3175       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3176       1.223    bouyer 		usb_syncmem(&sqh->dma,
   3177       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3178       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3179       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3180       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   3181       1.124  augustss 	}
   3182       1.124  augustss 
   3183        1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3184       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3185       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3186       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3187        1.42  augustss 	pqh->hlink       = sqh->hlink;
   3188        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3189       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3190       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   3191       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3192       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   3193         1.1  augustss 	if (vf->eqh == sqh)
   3194         1.1  augustss 		vf->eqh = pqh;
   3195         1.1  augustss 	vf->bandwidth--;
   3196         1.1  augustss }
   3197         1.1  augustss 
   3198         1.1  augustss usbd_status
   3199       1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3200         1.1  augustss {
   3201         1.1  augustss 	uhci_soft_qh_t *sqh;
   3202   1.240.6.2       mrg 	int i, npoll;
   3203         1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   3204         1.1  augustss 
   3205       1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
   3206         1.1  augustss 	if (ival == 0) {
   3207       1.173      gson 		printf("uhci_device_setintr: 0 interval\n");
   3208         1.1  augustss 		return (USBD_INVAL);
   3209         1.1  augustss 	}
   3210         1.1  augustss 
   3211         1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   3212         1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   3213         1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3214       1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
   3215         1.1  augustss 
   3216         1.1  augustss 	upipe->u.intr.npoll = npoll;
   3217       1.152  augustss 	upipe->u.intr.qhs =
   3218   1.240.6.2       mrg 		kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP);
   3219   1.240.6.2       mrg 	if (upipe->u.intr.qhs == NULL)
   3220   1.240.6.2       mrg 		return USBD_NOMEM;
   3221         1.1  augustss 
   3222       1.152  augustss 	/*
   3223         1.1  augustss 	 * Figure out which offset in the schedule that has most
   3224         1.1  augustss 	 * bandwidth left over.
   3225         1.1  augustss 	 */
   3226         1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3227         1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3228         1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   3229         1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3230         1.1  augustss 		if (bw < bestbw) {
   3231         1.1  augustss 			bestbw = bw;
   3232         1.1  augustss 			bestoffs = offs;
   3233         1.1  augustss 		}
   3234         1.1  augustss 	}
   3235       1.173      gson 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   3236         1.1  augustss 
   3237   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   3238         1.1  augustss 	for(i = 0; i < npoll; i++) {
   3239         1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3240       1.121  augustss 		sqh->elink = NULL;
   3241        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3242       1.223    bouyer 		usb_syncmem(&sqh->dma,
   3243       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3244       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3245       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3246         1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   3247         1.1  augustss 	}
   3248         1.1  augustss #undef MOD
   3249         1.1  augustss 
   3250         1.1  augustss 	/* Enter QHs into the controller data structures. */
   3251         1.1  augustss 	for(i = 0; i < npoll; i++)
   3252        1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   3253   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   3254         1.1  augustss 
   3255       1.173      gson 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
   3256         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3257         1.1  augustss }
   3258         1.1  augustss 
   3259         1.1  augustss /* Open a new pipe. */
   3260         1.1  augustss usbd_status
   3261       1.119  augustss uhci_open(usbd_pipe_handle pipe)
   3262         1.1  augustss {
   3263       1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3264         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3265         1.1  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   3266   1.240.6.2       mrg 	usbd_status err = USBD_NOMEM;
   3267        1.79  augustss 	int ival;
   3268         1.1  augustss 
   3269         1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   3270       1.152  augustss 		     pipe, pipe->device->address,
   3271         1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   3272        1.92  augustss 
   3273   1.240.6.2       mrg 	if (sc->sc_dying)
   3274   1.240.6.2       mrg 		return USBD_IOERROR;
   3275   1.240.6.2       mrg 
   3276        1.92  augustss 	upipe->aborting = 0;
   3277       1.236  drochner 	/* toggle state needed for bulk endpoints */
   3278       1.236  drochner 	upipe->nexttoggle = pipe->endpoint->datatoggle;
   3279        1.92  augustss 
   3280         1.1  augustss 	if (pipe->device->address == sc->sc_addr) {
   3281         1.1  augustss 		switch (ed->bEndpointAddress) {
   3282         1.1  augustss 		case USB_CONTROL_ENDPOINT:
   3283         1.1  augustss 			pipe->methods = &uhci_root_ctrl_methods;
   3284         1.1  augustss 			break;
   3285        1.45  augustss 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   3286         1.1  augustss 			pipe->methods = &uhci_root_intr_methods;
   3287         1.1  augustss 			break;
   3288         1.1  augustss 		default:
   3289         1.1  augustss 			return (USBD_INVAL);
   3290         1.1  augustss 		}
   3291         1.1  augustss 	} else {
   3292         1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3293         1.1  augustss 		case UE_CONTROL:
   3294         1.1  augustss 			pipe->methods = &uhci_device_ctrl_methods;
   3295         1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   3296        1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   3297         1.5  augustss 				goto bad;
   3298         1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   3299        1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   3300         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3301         1.5  augustss 				goto bad;
   3302         1.5  augustss 			}
   3303         1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   3304        1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   3305         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3306         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3307         1.5  augustss 				goto bad;
   3308         1.5  augustss 			}
   3309       1.152  augustss 			err = usb_allocmem(&sc->sc_bus,
   3310       1.152  augustss 				  sizeof(usb_device_request_t),
   3311        1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   3312        1.63  augustss 			if (err) {
   3313         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3314         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3315         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   3316         1.5  augustss 				goto bad;
   3317         1.5  augustss 			}
   3318         1.1  augustss 			break;
   3319         1.1  augustss 		case UE_INTERRUPT:
   3320         1.1  augustss 			pipe->methods = &uhci_device_intr_methods;
   3321        1.79  augustss 			ival = pipe->interval;
   3322        1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   3323        1.79  augustss 				ival = ed->bInterval;
   3324        1.80  augustss 			return (uhci_device_setintr(sc, upipe, ival));
   3325         1.1  augustss 		case UE_ISOCHRONOUS:
   3326        1.16  augustss 			pipe->methods = &uhci_device_isoc_methods;
   3327        1.48  augustss 			return (uhci_setup_isoc(pipe));
   3328         1.1  augustss 		case UE_BULK:
   3329         1.1  augustss 			pipe->methods = &uhci_device_bulk_methods;
   3330         1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   3331        1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   3332         1.5  augustss 				goto bad;
   3333         1.1  augustss 			break;
   3334         1.1  augustss 		}
   3335         1.1  augustss 	}
   3336         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3337         1.5  augustss 
   3338         1.5  augustss  bad:
   3339   1.240.6.2       mrg 	return USBD_NOMEM;
   3340         1.1  augustss }
   3341         1.1  augustss 
   3342         1.1  augustss /*
   3343         1.1  augustss  * Data structures and routines to emulate the root hub.
   3344         1.1  augustss  */
   3345         1.1  augustss usb_device_descriptor_t uhci_devd = {
   3346         1.1  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   3347         1.1  augustss 	UDESC_DEVICE,		/* type */
   3348         1.1  augustss 	{0x00, 0x01},		/* USB version */
   3349        1.87  augustss 	UDCLASS_HUB,		/* class */
   3350        1.87  augustss 	UDSUBCLASS_HUB,		/* subclass */
   3351       1.144  augustss 	UDPROTO_FSHUB,		/* protocol */
   3352         1.1  augustss 	64,			/* max packet */
   3353         1.1  augustss 	{0},{0},{0x00,0x01},	/* device id */
   3354         1.1  augustss 	1,2,0,			/* string indicies */
   3355         1.1  augustss 	1			/* # of configurations */
   3356         1.1  augustss };
   3357         1.1  augustss 
   3358       1.208  drochner const usb_config_descriptor_t uhci_confd = {
   3359         1.1  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   3360         1.1  augustss 	UDESC_CONFIG,
   3361         1.1  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   3362         1.1  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   3363         1.1  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   3364         1.1  augustss 	1,
   3365         1.1  augustss 	1,
   3366         1.1  augustss 	0,
   3367       1.206  drochner 	UC_ATTR_MBO | UC_SELF_POWERED,
   3368         1.1  augustss 	0			/* max power */
   3369         1.1  augustss };
   3370         1.1  augustss 
   3371       1.208  drochner const usb_interface_descriptor_t uhci_ifcd = {
   3372         1.1  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   3373         1.1  augustss 	UDESC_INTERFACE,
   3374         1.1  augustss 	0,
   3375         1.1  augustss 	0,
   3376         1.1  augustss 	1,
   3377        1.87  augustss 	UICLASS_HUB,
   3378        1.87  augustss 	UISUBCLASS_HUB,
   3379       1.144  augustss 	UIPROTO_FSHUB,
   3380         1.1  augustss 	0
   3381         1.1  augustss };
   3382         1.1  augustss 
   3383       1.208  drochner const usb_endpoint_descriptor_t uhci_endpd = {
   3384         1.1  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   3385         1.1  augustss 	UDESC_ENDPOINT,
   3386        1.45  augustss 	UE_DIR_IN | UHCI_INTR_ENDPT,
   3387         1.1  augustss 	UE_INTERRUPT,
   3388         1.1  augustss 	{8},
   3389         1.1  augustss 	255
   3390         1.1  augustss };
   3391         1.1  augustss 
   3392       1.208  drochner const usb_hub_descriptor_t uhci_hubd_piix = {
   3393         1.1  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   3394         1.1  augustss 	UDESC_HUB,
   3395         1.1  augustss 	2,
   3396         1.1  augustss 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   3397         1.1  augustss 	50,			/* power on to power good */
   3398         1.1  augustss 	0,
   3399         1.1  augustss 	{ 0x00 },		/* both ports are removable */
   3400       1.199  christos 	{ 0 },
   3401         1.1  augustss };
   3402         1.1  augustss 
   3403         1.1  augustss /*
   3404       1.166   dsainty  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3405       1.166   dsainty  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3406       1.166   dsainty  * should not be used by the USB subsystem.  As we cannot issue a
   3407       1.166   dsainty  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3408       1.166   dsainty  * will be enabled as part of the reset.
   3409       1.166   dsainty  *
   3410       1.166   dsainty  * On the VT83C572, the port cannot be successfully enabled until the
   3411       1.166   dsainty  * outstanding "port enable change" and "connection status change"
   3412       1.166   dsainty  * events have been reset.
   3413       1.166   dsainty  */
   3414       1.166   dsainty Static usbd_status
   3415       1.166   dsainty uhci_portreset(uhci_softc_t *sc, int index)
   3416       1.166   dsainty {
   3417       1.166   dsainty 	int lim, port, x;
   3418       1.166   dsainty 
   3419       1.166   dsainty 	if (index == 1)
   3420       1.166   dsainty 		port = UHCI_PORTSC1;
   3421       1.166   dsainty 	else if (index == 2)
   3422       1.166   dsainty 		port = UHCI_PORTSC2;
   3423       1.166   dsainty 	else
   3424       1.166   dsainty 		return (USBD_IOERROR);
   3425       1.166   dsainty 
   3426       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3427       1.166   dsainty 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3428       1.166   dsainty 
   3429       1.166   dsainty 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3430       1.166   dsainty 
   3431       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   3432       1.166   dsainty 		    index, UREAD2(sc, port)));
   3433       1.166   dsainty 
   3434       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3435       1.222  drochner 	UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
   3436       1.166   dsainty 
   3437       1.166   dsainty 	delay(100);
   3438       1.166   dsainty 
   3439       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3440       1.166   dsainty 		    index, UREAD2(sc, port)));
   3441       1.166   dsainty 
   3442       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3443       1.166   dsainty 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3444       1.166   dsainty 
   3445       1.166   dsainty 	for (lim = 10; --lim > 0;) {
   3446       1.166   dsainty 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3447       1.166   dsainty 
   3448       1.166   dsainty 		x = UREAD2(sc, port);
   3449       1.166   dsainty 
   3450       1.166   dsainty 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3451       1.166   dsainty 			    index, lim, x));
   3452       1.166   dsainty 
   3453       1.166   dsainty 		if (!(x & UHCI_PORTSC_CCS)) {
   3454       1.166   dsainty 			/*
   3455       1.166   dsainty 			 * No device is connected (or was disconnected
   3456       1.166   dsainty 			 * during reset).  Consider the port reset.
   3457       1.166   dsainty 			 * The delay must be long enough to ensure on
   3458       1.166   dsainty 			 * the initial iteration that the device
   3459       1.166   dsainty 			 * connection will have been registered.  50ms
   3460       1.166   dsainty 			 * appears to be sufficient, but 20ms is not.
   3461       1.166   dsainty 			 */
   3462       1.166   dsainty 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3463       1.166   dsainty 				    index, lim));
   3464       1.166   dsainty 			break;
   3465       1.166   dsainty 		}
   3466       1.166   dsainty 
   3467       1.166   dsainty 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3468       1.166   dsainty 			/*
   3469       1.166   dsainty 			 * Port enabled changed and/or connection
   3470       1.166   dsainty 			 * status changed were set.  Reset either or
   3471       1.166   dsainty 			 * both raised flags (by writing a 1 to that
   3472       1.166   dsainty 			 * bit), and wait again for state to settle.
   3473       1.166   dsainty 			 */
   3474       1.166   dsainty 			UWRITE2(sc, port, URWMASK(x) |
   3475       1.166   dsainty 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3476       1.166   dsainty 			continue;
   3477       1.166   dsainty 		}
   3478       1.166   dsainty 
   3479       1.166   dsainty 		if (x & UHCI_PORTSC_PE)
   3480       1.166   dsainty 			/* Port is enabled */
   3481       1.166   dsainty 			break;
   3482       1.166   dsainty 
   3483       1.166   dsainty 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3484       1.166   dsainty 	}
   3485       1.166   dsainty 
   3486       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3487       1.166   dsainty 		    index, UREAD2(sc, port)));
   3488       1.166   dsainty 
   3489       1.166   dsainty 	if (lim <= 0) {
   3490       1.166   dsainty 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3491       1.166   dsainty 		return (USBD_TIMEOUT);
   3492       1.166   dsainty 	}
   3493       1.184     perry 
   3494       1.166   dsainty 	sc->sc_isreset = 1;
   3495       1.166   dsainty 	return (USBD_NORMAL_COMPLETION);
   3496       1.166   dsainty }
   3497       1.166   dsainty 
   3498       1.166   dsainty /*
   3499         1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   3500         1.1  augustss  */
   3501         1.1  augustss usbd_status
   3502       1.119  augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3503         1.1  augustss {
   3504   1.240.6.2       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3505        1.63  augustss 	usbd_status err;
   3506        1.16  augustss 
   3507        1.52  augustss 	/* Insert last in queue. */
   3508   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   3509        1.63  augustss 	err = usb_insert_transfer(xfer);
   3510   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   3511        1.63  augustss 	if (err)
   3512        1.63  augustss 		return (err);
   3513        1.52  augustss 
   3514       1.152  augustss 	/*
   3515        1.94  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3516        1.94  augustss 	 * so start it first.
   3517        1.67  augustss 	 */
   3518        1.63  augustss 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3519        1.16  augustss }
   3520        1.16  augustss 
   3521        1.16  augustss usbd_status
   3522       1.119  augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3523        1.16  augustss {
   3524       1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3525         1.1  augustss 	usb_device_request_t *req;
   3526        1.59  augustss 	void *buf = NULL;
   3527         1.1  augustss 	int port, x;
   3528   1.240.6.2       mrg 	int len, value, index, status, change, l, totlen = 0;
   3529         1.1  augustss 	usb_port_status_t ps;
   3530        1.63  augustss 	usbd_status err;
   3531         1.1  augustss 
   3532        1.82  augustss 	if (sc->sc_dying)
   3533        1.82  augustss 		return (USBD_IOERROR);
   3534        1.82  augustss 
   3535        1.48  augustss #ifdef DIAGNOSTIC
   3536        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3537   1.240.6.9       mrg 		panic("uhci_root_ctrl_start: not a request");
   3538        1.48  augustss #endif
   3539        1.63  augustss 	req = &xfer->request;
   3540         1.1  augustss 
   3541       1.152  augustss 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3542         1.1  augustss 		    req->bmRequestType, req->bRequest));
   3543         1.1  augustss 
   3544         1.1  augustss 	len = UGETW(req->wLength);
   3545         1.1  augustss 	value = UGETW(req->wValue);
   3546         1.1  augustss 	index = UGETW(req->wIndex);
   3547        1.49  augustss 
   3548        1.49  augustss 	if (len != 0)
   3549       1.159  augustss 		buf = KERNADDR(&xfer->dmabuf, 0);
   3550        1.49  augustss 
   3551         1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3552         1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   3553         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3554         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3555         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3556       1.152  augustss 		/*
   3557        1.13  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3558         1.1  augustss 		 * for the integrated root hub.
   3559         1.1  augustss 		 */
   3560         1.1  augustss 		break;
   3561         1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3562         1.1  augustss 		if (len > 0) {
   3563         1.1  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   3564         1.1  augustss 			totlen = 1;
   3565         1.1  augustss 		}
   3566         1.1  augustss 		break;
   3567         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3568         1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3569       1.195  christos 		if (len == 0)
   3570       1.195  christos 			break;
   3571         1.1  augustss 		switch(value >> 8) {
   3572         1.1  augustss 		case UDESC_DEVICE:
   3573         1.1  augustss 			if ((value & 0xff) != 0) {
   3574        1.63  augustss 				err = USBD_IOERROR;
   3575         1.1  augustss 				goto ret;
   3576         1.1  augustss 			}
   3577         1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3578        1.27  augustss 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3579         1.1  augustss 			memcpy(buf, &uhci_devd, l);
   3580         1.1  augustss 			break;
   3581         1.1  augustss 		case UDESC_CONFIG:
   3582         1.1  augustss 			if ((value & 0xff) != 0) {
   3583        1.63  augustss 				err = USBD_IOERROR;
   3584         1.1  augustss 				goto ret;
   3585         1.1  augustss 			}
   3586         1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3587         1.1  augustss 			memcpy(buf, &uhci_confd, l);
   3588         1.1  augustss 			buf = (char *)buf + l;
   3589         1.1  augustss 			len -= l;
   3590         1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3591         1.1  augustss 			totlen += l;
   3592         1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   3593         1.1  augustss 			buf = (char *)buf + l;
   3594         1.1  augustss 			len -= l;
   3595         1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3596         1.1  augustss 			totlen += l;
   3597         1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   3598         1.1  augustss 			break;
   3599         1.1  augustss 		case UDESC_STRING:
   3600       1.213  drochner #define sd ((usb_string_descriptor_t *)buf)
   3601         1.1  augustss 			switch (value & 0xff) {
   3602       1.182  augustss 			case 0: /* Language table */
   3603       1.213  drochner 				totlen = usb_makelangtbl(sd, len);
   3604       1.182  augustss 				break;
   3605         1.1  augustss 			case 1: /* Vendor */
   3606       1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3607       1.213  drochner 							 sc->sc_vendor);
   3608         1.1  augustss 				break;
   3609         1.1  augustss 			case 2: /* Product */
   3610       1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3611       1.213  drochner 							 "UHCI root hub");
   3612         1.1  augustss 				break;
   3613         1.1  augustss 			}
   3614       1.213  drochner #undef sd
   3615         1.1  augustss 			break;
   3616         1.1  augustss 		default:
   3617        1.63  augustss 			err = USBD_IOERROR;
   3618         1.1  augustss 			goto ret;
   3619         1.1  augustss 		}
   3620         1.1  augustss 		break;
   3621         1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3622         1.1  augustss 		if (len > 0) {
   3623         1.1  augustss 			*(u_int8_t *)buf = 0;
   3624         1.1  augustss 			totlen = 1;
   3625         1.1  augustss 		}
   3626         1.1  augustss 		break;
   3627         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3628         1.1  augustss 		if (len > 1) {
   3629         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3630         1.1  augustss 			totlen = 2;
   3631         1.1  augustss 		}
   3632         1.1  augustss 		break;
   3633         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3634         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3635         1.1  augustss 		if (len > 1) {
   3636         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3637         1.1  augustss 			totlen = 2;
   3638         1.1  augustss 		}
   3639         1.1  augustss 		break;
   3640         1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3641         1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   3642        1.63  augustss 			err = USBD_IOERROR;
   3643         1.1  augustss 			goto ret;
   3644         1.1  augustss 		}
   3645         1.1  augustss 		sc->sc_addr = value;
   3646         1.1  augustss 		break;
   3647         1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3648         1.1  augustss 		if (value != 0 && value != 1) {
   3649        1.63  augustss 			err = USBD_IOERROR;
   3650         1.1  augustss 			goto ret;
   3651         1.1  augustss 		}
   3652         1.1  augustss 		sc->sc_conf = value;
   3653         1.1  augustss 		break;
   3654         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3655         1.1  augustss 		break;
   3656         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3657         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3658         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3659        1.63  augustss 		err = USBD_IOERROR;
   3660         1.1  augustss 		goto ret;
   3661         1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3662         1.1  augustss 		break;
   3663         1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3664         1.1  augustss 		break;
   3665         1.1  augustss 	/* Hub requests */
   3666         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3667         1.1  augustss 		break;
   3668         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3669        1.12  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3670        1.12  augustss 			     "port=%d feature=%d\n",
   3671         1.1  augustss 			     index, value));
   3672         1.1  augustss 		if (index == 1)
   3673         1.1  augustss 			port = UHCI_PORTSC1;
   3674         1.1  augustss 		else if (index == 2)
   3675         1.1  augustss 			port = UHCI_PORTSC2;
   3676         1.1  augustss 		else {
   3677        1.63  augustss 			err = USBD_IOERROR;
   3678         1.1  augustss 			goto ret;
   3679         1.1  augustss 		}
   3680         1.1  augustss 		switch(value) {
   3681         1.1  augustss 		case UHF_PORT_ENABLE:
   3682       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3683         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3684         1.1  augustss 			break;
   3685         1.1  augustss 		case UHF_PORT_SUSPEND:
   3686       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3687       1.222  drochner 			if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
   3688       1.222  drochner 				break;
   3689       1.222  drochner 			UWRITE2(sc, port, x | UHCI_PORTSC_RD);
   3690       1.222  drochner 			/* see USB2 spec ch. 7.1.7.7 */
   3691       1.222  drochner 			usb_delay_ms(&sc->sc_bus, 20);
   3692         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3693       1.222  drochner 			/* 10ms resume delay must be provided by caller */
   3694         1.1  augustss 			break;
   3695         1.1  augustss 		case UHF_PORT_RESET:
   3696       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3697         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3698         1.1  augustss 			break;
   3699         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3700       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3701         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3702         1.1  augustss 			break;
   3703         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3704       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3705         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3706         1.1  augustss 			break;
   3707         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3708       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3709         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3710         1.1  augustss 			break;
   3711         1.1  augustss 		case UHF_C_PORT_RESET:
   3712         1.1  augustss 			sc->sc_isreset = 0;
   3713        1.63  augustss 			err = USBD_NORMAL_COMPLETION;
   3714         1.1  augustss 			goto ret;
   3715         1.1  augustss 		case UHF_PORT_CONNECTION:
   3716         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3717         1.1  augustss 		case UHF_PORT_POWER:
   3718         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3719         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3720         1.1  augustss 		default:
   3721        1.63  augustss 			err = USBD_IOERROR;
   3722         1.1  augustss 			goto ret;
   3723         1.1  augustss 		}
   3724         1.1  augustss 		break;
   3725         1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3726         1.1  augustss 		if (index == 1)
   3727         1.1  augustss 			port = UHCI_PORTSC1;
   3728         1.1  augustss 		else if (index == 2)
   3729         1.1  augustss 			port = UHCI_PORTSC2;
   3730         1.1  augustss 		else {
   3731        1.63  augustss 			err = USBD_IOERROR;
   3732         1.1  augustss 			goto ret;
   3733         1.1  augustss 		}
   3734         1.1  augustss 		if (len > 0) {
   3735       1.152  augustss 			*(u_int8_t *)buf =
   3736         1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3737         1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   3738         1.1  augustss 			totlen = 1;
   3739         1.1  augustss 		}
   3740         1.1  augustss 		break;
   3741         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3742       1.195  christos 		if (len == 0)
   3743       1.195  christos 			break;
   3744       1.177    toshii 		if ((value & 0xff) != 0) {
   3745        1.63  augustss 			err = USBD_IOERROR;
   3746         1.1  augustss 			goto ret;
   3747         1.1  augustss 		}
   3748         1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3749         1.1  augustss 		totlen = l;
   3750         1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   3751         1.1  augustss 		break;
   3752         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3753         1.1  augustss 		if (len != 4) {
   3754        1.63  augustss 			err = USBD_IOERROR;
   3755         1.1  augustss 			goto ret;
   3756         1.1  augustss 		}
   3757         1.1  augustss 		memset(buf, 0, len);
   3758         1.1  augustss 		totlen = len;
   3759         1.1  augustss 		break;
   3760         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3761         1.1  augustss 		if (index == 1)
   3762         1.1  augustss 			port = UHCI_PORTSC1;
   3763         1.1  augustss 		else if (index == 2)
   3764         1.1  augustss 			port = UHCI_PORTSC2;
   3765         1.1  augustss 		else {
   3766        1.63  augustss 			err = USBD_IOERROR;
   3767         1.1  augustss 			goto ret;
   3768         1.1  augustss 		}
   3769         1.1  augustss 		if (len != 4) {
   3770        1.63  augustss 			err = USBD_IOERROR;
   3771         1.1  augustss 			goto ret;
   3772         1.1  augustss 		}
   3773         1.1  augustss 		x = UREAD2(sc, port);
   3774         1.1  augustss 		status = change = 0;
   3775       1.142  augustss 		if (x & UHCI_PORTSC_CCS)
   3776         1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   3777       1.152  augustss 		if (x & UHCI_PORTSC_CSC)
   3778         1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   3779       1.152  augustss 		if (x & UHCI_PORTSC_PE)
   3780         1.1  augustss 			status |= UPS_PORT_ENABLED;
   3781       1.152  augustss 		if (x & UHCI_PORTSC_POEDC)
   3782         1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   3783       1.152  augustss 		if (x & UHCI_PORTSC_OCI)
   3784         1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   3785       1.152  augustss 		if (x & UHCI_PORTSC_OCIC)
   3786         1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3787       1.152  augustss 		if (x & UHCI_PORTSC_SUSP)
   3788         1.1  augustss 			status |= UPS_SUSPEND;
   3789       1.152  augustss 		if (x & UHCI_PORTSC_LSDA)
   3790         1.1  augustss 			status |= UPS_LOW_SPEED;
   3791         1.1  augustss 		status |= UPS_PORT_POWER;
   3792         1.1  augustss 		if (sc->sc_isreset)
   3793         1.1  augustss 			change |= UPS_C_PORT_RESET;
   3794         1.1  augustss 		USETW(ps.wPortStatus, status);
   3795         1.1  augustss 		USETW(ps.wPortChange, change);
   3796         1.1  augustss 		l = min(len, sizeof ps);
   3797         1.1  augustss 		memcpy(buf, &ps, l);
   3798         1.1  augustss 		totlen = l;
   3799         1.1  augustss 		break;
   3800         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3801        1.63  augustss 		err = USBD_IOERROR;
   3802         1.1  augustss 		goto ret;
   3803         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3804         1.1  augustss 		break;
   3805         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3806         1.1  augustss 		if (index == 1)
   3807         1.1  augustss 			port = UHCI_PORTSC1;
   3808         1.1  augustss 		else if (index == 2)
   3809         1.1  augustss 			port = UHCI_PORTSC2;
   3810         1.1  augustss 		else {
   3811        1.63  augustss 			err = USBD_IOERROR;
   3812         1.1  augustss 			goto ret;
   3813         1.1  augustss 		}
   3814         1.1  augustss 		switch(value) {
   3815         1.1  augustss 		case UHF_PORT_ENABLE:
   3816       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3817         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3818         1.1  augustss 			break;
   3819         1.1  augustss 		case UHF_PORT_SUSPEND:
   3820       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3821         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3822         1.1  augustss 			break;
   3823         1.1  augustss 		case UHF_PORT_RESET:
   3824       1.166   dsainty 			err = uhci_portreset(sc, index);
   3825       1.166   dsainty 			goto ret;
   3826       1.111  augustss 		case UHF_PORT_POWER:
   3827       1.111  augustss 			/* Pretend we turned on power */
   3828       1.115   mycroft 			err = USBD_NORMAL_COMPLETION;
   3829       1.111  augustss 			goto ret;
   3830         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3831         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3832         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3833         1.1  augustss 		case UHF_PORT_CONNECTION:
   3834         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3835         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3836         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3837         1.1  augustss 		case UHF_C_PORT_RESET:
   3838         1.1  augustss 		default:
   3839        1.63  augustss 			err = USBD_IOERROR;
   3840         1.1  augustss 			goto ret;
   3841         1.1  augustss 		}
   3842         1.1  augustss 		break;
   3843         1.1  augustss 	default:
   3844        1.63  augustss 		err = USBD_IOERROR;
   3845         1.1  augustss 		goto ret;
   3846         1.1  augustss 	}
   3847        1.63  augustss 	xfer->actlen = totlen;
   3848        1.63  augustss 	err = USBD_NORMAL_COMPLETION;
   3849         1.1  augustss  ret:
   3850        1.63  augustss 	xfer->status = err;
   3851   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   3852        1.63  augustss 	usb_transfer_complete(xfer);
   3853   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   3854         1.1  augustss 	return (USBD_IN_PROGRESS);
   3855         1.1  augustss }
   3856         1.1  augustss 
   3857         1.1  augustss /* Abort a root control request. */
   3858         1.1  augustss void
   3859       1.205  christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3860         1.1  augustss {
   3861        1.70  augustss 	/* Nothing to do, all transfers are synchronous. */
   3862         1.1  augustss }
   3863         1.1  augustss 
   3864         1.1  augustss /* Close the root pipe. */
   3865         1.1  augustss void
   3866       1.205  christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3867         1.1  augustss {
   3868         1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   3869         1.1  augustss }
   3870         1.1  augustss 
   3871         1.1  augustss /* Abort a root interrupt request. */
   3872         1.1  augustss void
   3873       1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   3874         1.1  augustss {
   3875       1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3876        1.30  augustss 
   3877   1.240.6.7       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3878   1.240.6.7       mrg 
   3879       1.234    dyoung 	callout_stop(&sc->sc_poll_handle);
   3880        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3881        1.58  augustss 
   3882        1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3883        1.58  augustss 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   3884        1.63  augustss 		xfer->pipe->intrxfer = 0;
   3885        1.58  augustss 	}
   3886        1.63  augustss 	xfer->status = USBD_CANCELLED;
   3887        1.96  augustss #ifdef DIAGNOSTIC
   3888        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3889        1.96  augustss #endif
   3890        1.63  augustss 	usb_transfer_complete(xfer);
   3891         1.1  augustss }
   3892         1.1  augustss 
   3893        1.16  augustss usbd_status
   3894       1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3895        1.16  augustss {
   3896   1.240.6.2       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3897        1.63  augustss 	usbd_status err;
   3898        1.16  augustss 
   3899        1.52  augustss 	/* Insert last in queue. */
   3900   1.240.6.2       mrg 	mutex_enter(&sc->sc_lock);
   3901        1.63  augustss 	err = usb_insert_transfer(xfer);
   3902   1.240.6.2       mrg 	mutex_exit(&sc->sc_lock);
   3903        1.63  augustss 	if (err)
   3904        1.63  augustss 		return (err);
   3905        1.52  augustss 
   3906       1.186     skrll 	/*
   3907       1.186     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3908        1.67  augustss 	 * start first
   3909        1.67  augustss 	 */
   3910        1.63  augustss 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3911        1.16  augustss }
   3912        1.16  augustss 
   3913         1.1  augustss /* Start a transfer on the root interrupt pipe */
   3914         1.1  augustss usbd_status
   3915       1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   3916         1.1  augustss {
   3917        1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   3918       1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3919       1.174  drochner 	unsigned int ival;
   3920         1.1  augustss 
   3921       1.173      gson 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
   3922        1.63  augustss 		     xfer, xfer->length, xfer->flags));
   3923        1.82  augustss 
   3924        1.82  augustss 	if (sc->sc_dying)
   3925        1.82  augustss 		return (USBD_IOERROR);
   3926         1.1  augustss 
   3927       1.174  drochner 	/* XXX temporary variable needed to avoid gcc3 warning */
   3928       1.174  drochner 	ival = xfer->pipe->endpoint->edesc->bInterval;
   3929       1.174  drochner 	sc->sc_ival = mstohz(ival);
   3930       1.234    dyoung 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3931        1.96  augustss 	sc->sc_intr_xfer = xfer;
   3932         1.1  augustss 	return (USBD_IN_PROGRESS);
   3933         1.1  augustss }
   3934         1.1  augustss 
   3935         1.1  augustss /* Close the root interrupt pipe. */
   3936         1.1  augustss void
   3937       1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   3938         1.1  augustss {
   3939       1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3940        1.30  augustss 
   3941   1.240.6.6       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3942   1.240.6.6       mrg 
   3943       1.234    dyoung 	callout_stop(&sc->sc_poll_handle);
   3944        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3945         1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   3946         1.1  augustss }
   3947