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uhci.c revision 1.247
      1  1.247       mrg /*	$NetBSD: uhci.c,v 1.247 2012/03/11 00:34:46 mrg Exp $	*/
      2   1.67  augustss /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
      3    1.1  augustss 
      4    1.1  augustss /*
      5  1.185   mycroft  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
      6    1.1  augustss  * All rights reserved.
      7    1.1  augustss  *
      8   1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      9  1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
     10   1.11  augustss  * Carlstedt Research & Technology.
     11    1.1  augustss  *
     12    1.1  augustss  * Redistribution and use in source and binary forms, with or without
     13    1.1  augustss  * modification, are permitted provided that the following conditions
     14    1.1  augustss  * are met:
     15    1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     16    1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     17    1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     18    1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     19    1.1  augustss  *    documentation and/or other materials provided with the distribution.
     20    1.1  augustss  *
     21    1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22    1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23    1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24    1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25    1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26    1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27    1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28    1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29    1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30    1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31    1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     32    1.1  augustss  */
     33    1.1  augustss 
     34    1.1  augustss /*
     35    1.1  augustss  * USB Universal Host Controller driver.
     36   1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     37    1.1  augustss  *
     38  1.229  uebayasi  * UHCI spec: http://www.intel.com/technology/usb/spec.htm
     39  1.229  uebayasi  * USB spec: http://www.usb.org/developers/docs/
     40   1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     41   1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     42    1.1  augustss  */
     43  1.143     lukem 
     44  1.143     lukem #include <sys/cdefs.h>
     45  1.247       mrg __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.247 2012/03/11 00:34:46 mrg Exp $");
     46  1.239      matt 
     47  1.239      matt #include "opt_usb.h"
     48    1.1  augustss 
     49    1.1  augustss #include <sys/param.h>
     50    1.1  augustss #include <sys/systm.h>
     51    1.1  augustss #include <sys/kernel.h>
     52    1.1  augustss #include <sys/malloc.h>
     53    1.1  augustss #include <sys/device.h>
     54   1.67  augustss #include <sys/select.h>
     55  1.183      fvdl #include <sys/extent.h>
     56    1.1  augustss #include <sys/proc.h>
     57    1.1  augustss #include <sys/queue.h>
     58  1.211        ad #include <sys/bus.h>
     59  1.247       mrg #include <sys/cpu.h>
     60    1.1  augustss 
     61   1.39  augustss #include <machine/endian.h>
     62    1.7  augustss 
     63    1.1  augustss #include <dev/usb/usb.h>
     64    1.1  augustss #include <dev/usb/usbdi.h>
     65    1.1  augustss #include <dev/usb/usbdivar.h>
     66    1.7  augustss #include <dev/usb/usb_mem.h>
     67    1.1  augustss #include <dev/usb/usb_quirks.h>
     68    1.1  augustss 
     69    1.1  augustss #include <dev/usb/uhcireg.h>
     70    1.1  augustss #include <dev/usb/uhcivar.h>
     71  1.213  drochner #include <dev/usb/usbroothub_subr.h>
     72    1.1  augustss 
     73  1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     74  1.125  augustss /*#define UHCI_CTL_LOOP */
     75  1.125  augustss 
     76   1.13  augustss 
     77   1.37  augustss 
     78   1.67  augustss #ifdef UHCI_DEBUG
     79   1.92  augustss uhci_softc_t *thesc;
     80   1.59  augustss #define DPRINTF(x)	if (uhcidebug) printf x
     81   1.59  augustss #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
     82   1.67  augustss int uhcidebug = 0;
     83  1.125  augustss int uhcinoloop = 0;
     84   1.59  augustss #else
     85   1.59  augustss #define DPRINTF(x)
     86   1.59  augustss #define DPRINTFN(n,x)
     87   1.59  augustss #endif
     88   1.59  augustss 
     89   1.39  augustss /*
     90   1.39  augustss  * The UHCI controller is little endian, so on big endian machines
     91  1.181  drochner  * the data stored in memory needs to be swapped.
     92   1.39  augustss  */
     93   1.39  augustss 
     94    1.1  augustss struct uhci_pipe {
     95    1.1  augustss 	struct usbd_pipe pipe;
     96   1.32  augustss 	int nexttoggle;
     97   1.92  augustss 
     98   1.92  augustss 	u_char aborting;
     99   1.92  augustss 	usbd_xfer_handle abortstart, abortend;
    100   1.92  augustss 
    101    1.1  augustss 	/* Info needed for different pipe kinds. */
    102    1.1  augustss 	union {
    103    1.1  augustss 		/* Control pipe */
    104    1.1  augustss 		struct {
    105    1.1  augustss 			uhci_soft_qh_t *sqh;
    106    1.7  augustss 			usb_dma_t reqdma;
    107   1.16  augustss 			uhci_soft_td_t *setup, *stat;
    108    1.1  augustss 			u_int length;
    109    1.1  augustss 		} ctl;
    110    1.1  augustss 		/* Interrupt pipe */
    111    1.1  augustss 		struct {
    112    1.1  augustss 			int npoll;
    113  1.187     skrll 			int isread;
    114    1.1  augustss 			uhci_soft_qh_t **qhs;
    115    1.1  augustss 		} intr;
    116    1.1  augustss 		/* Bulk pipe */
    117    1.1  augustss 		struct {
    118    1.1  augustss 			uhci_soft_qh_t *sqh;
    119    1.1  augustss 			u_int length;
    120    1.1  augustss 			int isread;
    121    1.1  augustss 		} bulk;
    122   1.16  augustss 		/* Iso pipe */
    123   1.16  augustss 		struct iso {
    124   1.16  augustss 			uhci_soft_td_t **stds;
    125   1.48  augustss 			int next, inuse;
    126   1.16  augustss 		} iso;
    127    1.1  augustss 	} u;
    128    1.1  augustss };
    129    1.1  augustss 
    130  1.142  augustss Static void		uhci_globalreset(uhci_softc_t *);
    131  1.166   dsainty Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    132  1.142  augustss Static void		uhci_reset(uhci_softc_t *);
    133  1.119  augustss Static usbd_status	uhci_run(uhci_softc_t *, int run);
    134  1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    135  1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    136  1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    137  1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    138   1.16  augustss #if 0
    139  1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    140  1.119  augustss 					 uhci_intr_info_t *);
    141  1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    142   1.16  augustss #endif
    143    1.1  augustss 
    144  1.152  augustss Static void		uhci_free_std_chain(uhci_softc_t *,
    145  1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    146  1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    147  1.152  augustss 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
    148  1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    149  1.119  augustss Static void		uhci_poll_hub(void *);
    150  1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    151  1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    152  1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    153  1.119  augustss 
    154  1.119  augustss Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    155  1.119  augustss 
    156  1.119  augustss Static void		uhci_timeout(void *);
    157  1.153  augustss Static void		uhci_timeout_task(void *);
    158  1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    159  1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    160  1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    161  1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    162  1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    163  1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    164  1.123  augustss Static void		uhci_add_loop(uhci_softc_t *sc);
    165  1.123  augustss Static void		uhci_rem_loop(uhci_softc_t *sc);
    166  1.119  augustss 
    167  1.119  augustss Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    168  1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    169  1.119  augustss 
    170  1.119  augustss Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    171  1.119  augustss Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
    172  1.119  augustss 
    173  1.119  augustss Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    174  1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    175  1.119  augustss 
    176  1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    177  1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    178  1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    179  1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    180  1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    181  1.119  augustss 
    182  1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    183  1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    184  1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    185  1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    186  1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    187  1.119  augustss 
    188  1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    189  1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    190  1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    191  1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    192  1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    193  1.119  augustss 
    194  1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    195  1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    196  1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    197  1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    198  1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    199  1.119  augustss 
    200  1.119  augustss Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    201  1.119  augustss Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    202  1.119  augustss Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    203  1.119  augustss Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    204  1.119  augustss Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    205  1.119  augustss 
    206  1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    207  1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    208  1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    209  1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    210  1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    211  1.119  augustss 
    212  1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    213  1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    214  1.133  augustss Static void		uhci_softintr(void *);
    215  1.119  augustss 
    216  1.119  augustss Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    217  1.119  augustss 
    218  1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    219  1.158  augustss Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    220  1.152  augustss Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    221  1.119  augustss 			    struct uhci_pipe *pipe, int ival);
    222  1.119  augustss 
    223  1.119  augustss Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    224  1.119  augustss Static void		uhci_noop(usbd_pipe_handle pipe);
    225  1.119  augustss 
    226  1.240  jakllsch static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    227  1.119  augustss 						    uhci_soft_qh_t *);
    228  1.119  augustss 
    229  1.119  augustss #ifdef UHCI_DEBUG
    230  1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    231  1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    232  1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    233  1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    234  1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    235  1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    236  1.119  augustss Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    237  1.119  augustss void			uhci_dump(void);
    238    1.1  augustss #endif
    239    1.1  augustss 
    240  1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    241  1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    242  1.112  augustss #define UWRITE1(sc, r, x) \
    243  1.165   dsainty  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    244  1.165   dsainty  } while (/*CONSTCOND*/0)
    245  1.112  augustss #define UWRITE2(sc, r, x) \
    246  1.165   dsainty  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    247  1.165   dsainty  } while (/*CONSTCOND*/0)
    248  1.112  augustss #define UWRITE4(sc, r, x) \
    249  1.165   dsainty  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    250  1.165   dsainty  } while (/*CONSTCOND*/0)
    251  1.196       mrg static __inline uint8_t
    252  1.196       mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
    253  1.196       mrg {
    254  1.196       mrg 
    255  1.196       mrg 	UBARR(sc);
    256  1.196       mrg 	return bus_space_read_1(sc->iot, sc->ioh, r);
    257  1.196       mrg }
    258  1.196       mrg 
    259  1.196       mrg static __inline uint16_t
    260  1.196       mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
    261  1.196       mrg {
    262  1.196       mrg 
    263  1.196       mrg 	UBARR(sc);
    264  1.196       mrg 	return bus_space_read_2(sc->iot, sc->ioh, r);
    265  1.196       mrg }
    266  1.196       mrg 
    267  1.196       mrg static __inline uint32_t
    268  1.196       mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
    269  1.196       mrg {
    270  1.196       mrg 
    271  1.196       mrg 	UBARR(sc);
    272  1.196       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    273  1.196       mrg }
    274    1.1  augustss 
    275    1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    276    1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    277    1.1  augustss 
    278  1.142  augustss #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    279    1.1  augustss 
    280    1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    281    1.1  augustss 
    282    1.1  augustss #define UHCI_INTR_ENDPT 1
    283    1.1  augustss 
    284  1.208  drochner const struct usbd_bus_methods uhci_bus_methods = {
    285  1.245       mrg 	.open_pipe =	uhci_open,
    286  1.245       mrg 	.soft_intr =	uhci_softintr,
    287  1.245       mrg 	.do_poll =	uhci_poll,
    288  1.245       mrg 	.allocm =	uhci_allocm,
    289  1.245       mrg 	.freem =	uhci_freem,
    290  1.245       mrg 	.allocx =	uhci_allocx,
    291  1.245       mrg 	.freex =	uhci_freex,
    292   1.48  augustss };
    293   1.48  augustss 
    294  1.208  drochner const struct usbd_pipe_methods uhci_root_ctrl_methods = {
    295  1.245       mrg 	.transfer =	uhci_root_ctrl_transfer,
    296  1.245       mrg 	.start =	uhci_root_ctrl_start,
    297  1.245       mrg 	.abort =	uhci_root_ctrl_abort,
    298  1.245       mrg 	.close =	uhci_root_ctrl_close,
    299  1.245       mrg 	.cleartoggle =	uhci_noop,
    300  1.245       mrg 	.done =		uhci_root_ctrl_done,
    301    1.1  augustss };
    302    1.1  augustss 
    303  1.208  drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
    304  1.245       mrg 	.transfer =	uhci_root_intr_transfer,
    305  1.245       mrg 	.start =	uhci_root_intr_start,
    306  1.245       mrg 	.abort =	uhci_root_intr_abort,
    307  1.245       mrg 	.close =	uhci_root_intr_close,
    308  1.245       mrg 	.cleartoggle =	uhci_noop,
    309  1.245       mrg 	.done =		uhci_root_intr_done,
    310    1.1  augustss };
    311    1.1  augustss 
    312  1.208  drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    313  1.245       mrg 	.transfer =	uhci_device_ctrl_transfer,
    314  1.245       mrg 	.start =	uhci_device_ctrl_start,
    315  1.245       mrg 	.abort =	uhci_device_ctrl_abort,
    316  1.245       mrg 	.close =	uhci_device_ctrl_close,
    317  1.245       mrg 	.cleartoggle =	uhci_noop,
    318  1.245       mrg 	.done =		uhci_device_ctrl_done,
    319    1.1  augustss };
    320    1.1  augustss 
    321  1.208  drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
    322  1.245       mrg 	.transfer =	uhci_device_intr_transfer,
    323  1.245       mrg 	.start =	uhci_device_intr_start,
    324  1.245       mrg 	.abort =	uhci_device_intr_abort,
    325  1.245       mrg 	.close =	uhci_device_intr_close,
    326  1.245       mrg 	.cleartoggle =	uhci_device_clear_toggle,
    327  1.245       mrg 	.done =		uhci_device_intr_done,
    328    1.1  augustss };
    329    1.1  augustss 
    330  1.208  drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
    331  1.245       mrg 	.transfer =	uhci_device_bulk_transfer,
    332  1.245       mrg 	.start =	uhci_device_bulk_start,
    333  1.245       mrg 	.abort =	uhci_device_bulk_abort,
    334  1.245       mrg 	.close =	uhci_device_bulk_close,
    335  1.245       mrg 	.cleartoggle =	uhci_device_clear_toggle,
    336  1.245       mrg 	.done =		uhci_device_bulk_done,
    337    1.1  augustss };
    338    1.1  augustss 
    339  1.208  drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
    340  1.245       mrg 	.transfer =	uhci_device_isoc_transfer,
    341  1.245       mrg 	.start =	uhci_device_isoc_start,
    342  1.245       mrg 	.abort =	uhci_device_isoc_abort,
    343  1.245       mrg 	.close =	uhci_device_isoc_close,
    344  1.245       mrg 	.cleartoggle =	uhci_noop,
    345  1.245       mrg 	.done =		uhci_device_isoc_done,
    346   1.16  augustss };
    347   1.16  augustss 
    348   1.92  augustss #define uhci_add_intr_info(sc, ii) \
    349  1.169  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    350   1.92  augustss #define uhci_del_intr_info(ii) \
    351  1.169  augustss 	do { \
    352  1.169  augustss 		LIST_REMOVE((ii), list); \
    353  1.169  augustss 		(ii)->list.le_prev = NULL; \
    354  1.169  augustss 	} while (0)
    355  1.169  augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    356   1.92  augustss 
    357  1.240  jakllsch static inline uhci_soft_qh_t *
    358  1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    359   1.92  augustss {
    360   1.92  augustss 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    361   1.92  augustss 
    362   1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    363  1.152  augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    364  1.223    bouyer 		usb_syncmem(&pqh->dma,
    365  1.223    bouyer 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    366  1.223    bouyer 		    sizeof(pqh->qh.qh_hlink),
    367  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
    368   1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    369  1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    370   1.92  augustss 			return (NULL);
    371   1.92  augustss 		}
    372   1.92  augustss #endif
    373   1.92  augustss 	}
    374   1.92  augustss 	return (pqh);
    375   1.92  augustss }
    376   1.92  augustss 
    377    1.1  augustss void
    378  1.142  augustss uhci_globalreset(uhci_softc_t *sc)
    379    1.1  augustss {
    380    1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    381   1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    382    1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    383    1.1  augustss }
    384    1.1  augustss 
    385    1.1  augustss usbd_status
    386  1.119  augustss uhci_init(uhci_softc_t *sc)
    387    1.1  augustss {
    388   1.63  augustss 	usbd_status err;
    389    1.1  augustss 	int i, j;
    390  1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    391    1.1  augustss 	uhci_soft_td_t *std;
    392    1.1  augustss 
    393    1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    394    1.1  augustss 
    395   1.67  augustss #ifdef UHCI_DEBUG
    396   1.92  augustss 	thesc = sc;
    397   1.92  augustss 
    398    1.1  augustss 	if (uhcidebug > 2)
    399    1.1  augustss 		uhci_dumpregs(sc);
    400    1.1  augustss #endif
    401    1.1  augustss 
    402  1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    403  1.219  jmcneill 
    404    1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    405  1.142  augustss 	uhci_globalreset(sc);			/* reset the controller */
    406  1.142  augustss 	uhci_reset(sc);
    407   1.24  augustss 
    408  1.218  drochner 	usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    409  1.183      fvdl 	    USB_MEM_RESERVE);
    410  1.183      fvdl 
    411    1.1  augustss 	/* Allocate and initialize real frame array. */
    412  1.152  augustss 	err = usb_allocmem(&sc->sc_bus,
    413   1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    414   1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    415   1.63  augustss 	if (err)
    416   1.63  augustss 		return (err);
    417  1.159  augustss 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    418    1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    419  1.160  augustss 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    420    1.1  augustss 
    421  1.152  augustss 	/*
    422  1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    423  1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    424  1.123  augustss 	 * otherwise.
    425  1.123  augustss 	 */
    426  1.123  augustss 	std = uhci_alloc_std(sc);
    427  1.123  augustss 	if (std == NULL)
    428  1.123  augustss 		return (USBD_NOMEM);
    429  1.123  augustss 	std->link.std = NULL;
    430  1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    431  1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    432  1.123  augustss 	std->td.td_token = htole32(0);
    433  1.123  augustss 	std->td.td_buffer = htole32(0);
    434  1.223    bouyer 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    435  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    436  1.123  augustss 
    437  1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    438  1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    439  1.123  augustss 	if (lsqh == NULL)
    440  1.123  augustss 		return (USBD_NOMEM);
    441  1.123  augustss 	lsqh->hlink = NULL;
    442  1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    443  1.123  augustss 	lsqh->elink = std;
    444  1.123  augustss 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    445  1.123  augustss 	sc->sc_last_qh = lsqh;
    446  1.223    bouyer 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    447  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    448  1.123  augustss 
    449    1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    450    1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    451   1.63  augustss 	if (bsqh == NULL)
    452    1.1  augustss 		return (USBD_NOMEM);
    453  1.123  augustss 	bsqh->hlink = lsqh;
    454  1.123  augustss 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    455  1.121  augustss 	bsqh->elink = NULL;
    456   1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    457    1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    458  1.223    bouyer 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    459  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    460    1.1  augustss 
    461  1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    462  1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    463  1.123  augustss 	if (chsqh == NULL)
    464  1.123  augustss 		return (USBD_NOMEM);
    465  1.123  augustss 	chsqh->hlink = bsqh;
    466  1.123  augustss 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    467  1.123  augustss 	chsqh->elink = NULL;
    468  1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    469  1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    470  1.223    bouyer 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    471  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    472  1.123  augustss 
    473  1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    474  1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    475  1.123  augustss 	if (clsqh == NULL)
    476    1.1  augustss 		return (USBD_NOMEM);
    477  1.220    bouyer 	clsqh->hlink = chsqh;
    478  1.123  augustss 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    479  1.123  augustss 	clsqh->elink = NULL;
    480  1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    481  1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    482  1.223    bouyer 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    483  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    484    1.1  augustss 
    485  1.152  augustss 	/*
    486    1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    487    1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    488    1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    489    1.1  augustss 	 */
    490    1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    491    1.1  augustss 		std = uhci_alloc_std(sc);
    492    1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    493   1.67  augustss 		if (std == NULL || sqh == NULL)
    494   1.13  augustss 			return (USBD_NOMEM);
    495   1.42  augustss 		std->link.sqh = sqh;
    496  1.121  augustss 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    497   1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    498   1.88   tsutsui 		std->td.td_token = htole32(0);
    499   1.88   tsutsui 		std->td.td_buffer = htole32(0);
    500  1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    501  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    502  1.123  augustss 		sqh->hlink = clsqh;
    503  1.123  augustss 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    504  1.121  augustss 		sqh->elink = NULL;
    505   1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    506  1.223    bouyer 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    507  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    508    1.1  augustss 		sc->sc_vframes[i].htd = std;
    509    1.1  augustss 		sc->sc_vframes[i].etd = std;
    510    1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    511    1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    512  1.152  augustss 		for (j = i;
    513  1.152  augustss 		     j < UHCI_FRAMELIST_COUNT;
    514    1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    515   1.88   tsutsui 			sc->sc_pframes[j] = htole32(std->physaddr);
    516    1.1  augustss 	}
    517  1.223    bouyer 	usb_syncmem(&sc->sc_dma, 0,
    518  1.223    bouyer 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    519  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
    520  1.223    bouyer 
    521    1.1  augustss 
    522    1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    523    1.1  augustss 
    524   1.76  augustss 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    525   1.76  augustss 
    526  1.234    dyoung 	callout_init(&sc->sc_poll_handle, 0);
    527   1.96  augustss 
    528    1.1  augustss 	/* Set up the bus struct. */
    529   1.48  augustss 	sc->sc_bus.methods = &uhci_bus_methods;
    530    1.1  augustss 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    531    1.1  augustss 
    532  1.190  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    533  1.190  augustss 
    534    1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    535  1.225    bouyer 
    536  1.225    bouyer 	err =  uhci_run(sc, 1);		/* and here we go... */
    537  1.152  augustss 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    538    1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    539  1.225    bouyer 	return err;
    540   1.53  augustss }
    541   1.53  augustss 
    542   1.53  augustss int
    543  1.215    dyoung uhci_activate(device_t self, enum devact act)
    544   1.53  augustss {
    545  1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    546   1.53  augustss 
    547   1.53  augustss 	switch (act) {
    548   1.53  augustss 	case DVACT_DEACTIVATE:
    549  1.210  kiyohara 		sc->sc_dying = 1;
    550  1.230    dyoung 		return 0;
    551  1.230    dyoung 	default:
    552  1.230    dyoung 		return EOPNOTSUPP;
    553   1.53  augustss 	}
    554   1.53  augustss }
    555   1.53  augustss 
    556  1.215    dyoung void
    557  1.215    dyoung uhci_childdet(device_t self, device_t child)
    558  1.215    dyoung {
    559  1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    560  1.215    dyoung 
    561  1.215    dyoung 	KASSERT(sc->sc_child == child);
    562  1.215    dyoung 	sc->sc_child = NULL;
    563  1.215    dyoung }
    564  1.215    dyoung 
    565   1.53  augustss int
    566  1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    567   1.53  augustss {
    568   1.76  augustss 	usbd_xfer_handle xfer;
    569   1.53  augustss 	int rv = 0;
    570   1.53  augustss 
    571   1.53  augustss 	if (sc->sc_child != NULL)
    572   1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    573  1.152  augustss 
    574   1.53  augustss 	if (rv != 0)
    575   1.53  augustss 		return (rv);
    576   1.53  augustss 
    577   1.76  augustss 	/* Free all xfers associated with this HC. */
    578   1.76  augustss 	for (;;) {
    579   1.76  augustss 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    580   1.76  augustss 		if (xfer == NULL)
    581   1.76  augustss 			break;
    582  1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    583   1.76  augustss 		free(xfer, M_USB);
    584  1.152  augustss 	}
    585   1.76  augustss 
    586  1.226        ad 	callout_halt(&sc->sc_poll_handle, NULL);
    587  1.226        ad 	callout_destroy(&sc->sc_poll_handle);
    588  1.226        ad 
    589   1.76  augustss 	/* XXX free other data structures XXX */
    590   1.53  augustss 
    591   1.53  augustss 	return (rv);
    592    1.1  augustss }
    593    1.1  augustss 
    594   1.48  augustss usbd_status
    595  1.119  augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    596   1.48  augustss {
    597  1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    598  1.183      fvdl 	usbd_status status;
    599  1.102  augustss 	u_int32_t n;
    600  1.102  augustss 
    601  1.152  augustss 	/*
    602  1.102  augustss 	 * XXX
    603  1.102  augustss 	 * Since we are allocating a buffer we can assume that we will
    604  1.148  augustss 	 * need TDs for it.  Since we don't want to allocate those from
    605  1.102  augustss 	 * an interrupt context, we allocate them here and free them again.
    606  1.102  augustss 	 * This is no guarantee that we'll get the TDs next time...
    607  1.102  augustss 	 */
    608  1.102  augustss 	n = size / 8;
    609  1.102  augustss 	if (n > 16) {
    610  1.102  augustss 		u_int32_t i;
    611  1.102  augustss 		uhci_soft_td_t **stds;
    612  1.102  augustss 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
    613  1.150   tsutsui 		stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
    614  1.151  augustss 		    M_WAITOK|M_ZERO);
    615  1.102  augustss 		for(i=0; i < n; i++)
    616  1.102  augustss 			stds[i] = uhci_alloc_std(sc);
    617  1.102  augustss 		for(i=0; i < n; i++)
    618  1.102  augustss 			if (stds[i] != NULL)
    619  1.102  augustss 				uhci_free_std(sc, stds[i]);
    620  1.102  augustss 		free(stds, M_TEMP);
    621  1.102  augustss 	}
    622  1.102  augustss 
    623  1.183      fvdl 
    624  1.183      fvdl 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
    625  1.183      fvdl 	if (status == USBD_NOMEM)
    626  1.183      fvdl 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
    627  1.183      fvdl 	return status;
    628   1.48  augustss }
    629   1.48  augustss 
    630   1.48  augustss void
    631  1.119  augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    632   1.48  augustss {
    633  1.183      fvdl 	if (dma->block->flags & USB_DMA_RESERVE) {
    634  1.183      fvdl 		usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
    635  1.183      fvdl 		    dma);
    636  1.183      fvdl 		return;
    637  1.183      fvdl 	}
    638   1.63  augustss 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
    639   1.76  augustss }
    640   1.76  augustss 
    641   1.76  augustss usbd_xfer_handle
    642  1.119  augustss uhci_allocx(struct usbd_bus *bus)
    643   1.76  augustss {
    644  1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    645   1.76  augustss 	usbd_xfer_handle xfer;
    646   1.76  augustss 
    647   1.76  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    648   1.94  augustss 	if (xfer != NULL) {
    649  1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    650   1.98  augustss #ifdef DIAGNOSTIC
    651   1.94  augustss 		if (xfer->busy_free != XFER_FREE) {
    652  1.105  augustss 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    653   1.94  augustss 			       xfer->busy_free);
    654   1.94  augustss 		}
    655   1.98  augustss #endif
    656   1.94  augustss 	} else {
    657  1.238   tsutsui 		xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
    658   1.94  augustss 	}
    659   1.92  augustss 	if (xfer != NULL) {
    660  1.238   tsutsui 		memset(xfer, 0, sizeof (struct uhci_xfer));
    661  1.238   tsutsui 		UXFER(xfer)->iinfo.sc = sc;
    662   1.92  augustss #ifdef DIAGNOSTIC
    663  1.238   tsutsui 		UXFER(xfer)->iinfo.isdone = 1;
    664  1.135  augustss 		xfer->busy_free = XFER_BUSY;
    665   1.92  augustss #endif
    666   1.92  augustss 	}
    667   1.76  augustss 	return (xfer);
    668   1.76  augustss }
    669   1.76  augustss 
    670   1.76  augustss void
    671  1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    672   1.76  augustss {
    673  1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    674   1.76  augustss 
    675   1.93  augustss #ifdef DIAGNOSTIC
    676   1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
    677   1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    678   1.94  augustss 		       xfer->busy_free);
    679   1.93  augustss 	}
    680   1.94  augustss 	xfer->busy_free = XFER_FREE;
    681  1.238   tsutsui 	if (!UXFER(xfer)->iinfo.isdone) {
    682   1.96  augustss 		printf("uhci_freex: !isdone\n");
    683  1.105  augustss 	}
    684   1.93  augustss #endif
    685   1.76  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    686   1.48  augustss }
    687   1.48  augustss 
    688   1.72  augustss /*
    689  1.212  jmcneill  * Handle suspend/resume.
    690  1.212  jmcneill  *
    691  1.212  jmcneill  * We need to switch to polling mode here, because this routine is
    692  1.212  jmcneill  * called from an interrupt context.  This is all right since we
    693  1.212  jmcneill  * are almost suspended anyway.
    694   1.72  augustss  */
    695  1.212  jmcneill bool
    696  1.232    dyoung uhci_resume(device_t dv, const pmf_qual_t *qual)
    697   1.72  augustss {
    698  1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    699  1.212  jmcneill 	int cmd;
    700  1.193  augustss 	int s;
    701   1.72  augustss 
    702  1.212  jmcneill 	s = splhardusb();
    703  1.193  augustss 
    704  1.212  jmcneill 	cmd = UREAD2(sc, UHCI_CMD);
    705  1.193  augustss 	sc->sc_bus.use_polling++;
    706  1.214       smb 	UWRITE2(sc, UHCI_INTR, 0);
    707  1.214       smb 	uhci_globalreset(sc);
    708  1.214       smb 	uhci_reset(sc);
    709  1.212  jmcneill 	if (cmd & UHCI_CMD_RS)
    710  1.212  jmcneill 		uhci_run(sc, 0);
    711  1.212  jmcneill 
    712  1.212  jmcneill 	/* restore saved state */
    713  1.212  jmcneill 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    714  1.212  jmcneill 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    715  1.212  jmcneill 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    716  1.212  jmcneill 
    717  1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
    718  1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    719  1.212  jmcneill 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    720  1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
    721  1.212  jmcneill 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
    722  1.214       smb 	UHCICMD(sc, UHCI_CMD_MAXP);
    723  1.212  jmcneill 	uhci_run(sc, 1); /* and start traffic again */
    724  1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    725  1.193  augustss 	sc->sc_bus.use_polling--;
    726  1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    727  1.234    dyoung 		callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
    728  1.212  jmcneill 		    sc->sc_intr_xfer);
    729  1.212  jmcneill #ifdef UHCI_DEBUG
    730  1.212  jmcneill 	if (uhcidebug > 2)
    731  1.212  jmcneill 		uhci_dumpregs(sc);
    732  1.212  jmcneill #endif
    733  1.212  jmcneill 
    734  1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    735  1.193  augustss 	splx(s);
    736  1.212  jmcneill 
    737  1.212  jmcneill 	return true;
    738   1.72  augustss }
    739   1.72  augustss 
    740  1.212  jmcneill bool
    741  1.232    dyoung uhci_suspend(device_t dv, const pmf_qual_t *qual)
    742   1.30  augustss {
    743  1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    744   1.30  augustss 	int cmd;
    745   1.30  augustss 	int s;
    746   1.30  augustss 
    747  1.132  augustss 	s = splhardusb();
    748  1.212  jmcneill 
    749   1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    750   1.30  augustss 
    751  1.212  jmcneill #ifdef UHCI_DEBUG
    752  1.212  jmcneill 	if (uhcidebug > 2)
    753  1.212  jmcneill 		uhci_dumpregs(sc);
    754  1.212  jmcneill #endif
    755  1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    756  1.234    dyoung 		callout_stop(&sc->sc_poll_handle);
    757  1.219  jmcneill 	sc->sc_suspend = PWR_SUSPEND;
    758  1.212  jmcneill 	sc->sc_bus.use_polling++;
    759  1.219  jmcneill 
    760  1.212  jmcneill 	uhci_run(sc, 0); /* stop the controller */
    761  1.212  jmcneill 	cmd &= ~UHCI_CMD_RS;
    762  1.212  jmcneill 
    763  1.212  jmcneill 	/* save some state if BIOS doesn't */
    764  1.212  jmcneill 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    765  1.212  jmcneill 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    766  1.212  jmcneill 
    767  1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    768   1.30  augustss 
    769  1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
    770  1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    771  1.212  jmcneill 	sc->sc_bus.use_polling--;
    772   1.86  augustss 
    773   1.30  augustss 	splx(s);
    774  1.212  jmcneill 
    775  1.212  jmcneill 	return true;
    776   1.30  augustss }
    777   1.30  augustss 
    778   1.59  augustss #ifdef UHCI_DEBUG
    779  1.101  augustss Static void
    780  1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
    781    1.1  augustss {
    782   1.48  augustss 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    783   1.48  augustss 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    784  1.216  drochner 		     device_xname(sc->sc_dev),
    785   1.48  augustss 		     UREAD2(sc, UHCI_CMD),
    786   1.48  augustss 		     UREAD2(sc, UHCI_STS),
    787   1.48  augustss 		     UREAD2(sc, UHCI_INTR),
    788   1.48  augustss 		     UREAD2(sc, UHCI_FRNUM),
    789   1.48  augustss 		     UREAD4(sc, UHCI_FLBASEADDR),
    790   1.48  augustss 		     UREAD1(sc, UHCI_SOF),
    791   1.48  augustss 		     UREAD2(sc, UHCI_PORTSC1),
    792   1.48  augustss 		     UREAD2(sc, UHCI_PORTSC2)));
    793    1.1  augustss }
    794    1.1  augustss 
    795    1.1  augustss void
    796  1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
    797    1.1  augustss {
    798  1.122        tv 	char sbuf[128], sbuf2[128];
    799  1.122        tv 
    800  1.242  jakllsch 
    801  1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    802  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    803   1.48  augustss 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    804   1.48  augustss 		     "token=0x%08lx buffer=0x%08lx\n",
    805   1.48  augustss 		     p, (long)p->physaddr,
    806   1.88   tsutsui 		     (long)le32toh(p->td.td_link),
    807   1.88   tsutsui 		     (long)le32toh(p->td.td_status),
    808   1.88   tsutsui 		     (long)le32toh(p->td.td_token),
    809   1.88   tsutsui 		     (long)le32toh(p->td.td_buffer)));
    810  1.122        tv 
    811  1.224  christos 	snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF",
    812  1.224  christos 	    (u_int32_t)le32toh(p->td.td_link));
    813  1.224  christos 	snprintb(sbuf2, sizeof(sbuf2),
    814  1.224  christos 	    "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    815  1.224  christos 	    "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    816  1.224  christos 	    (u_int32_t)le32toh(p->td.td_status));
    817  1.122        tv 
    818  1.122        tv 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    819  1.122        tv 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    820   1.88   tsutsui 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    821   1.88   tsutsui 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    822   1.88   tsutsui 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    823   1.88   tsutsui 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    824   1.88   tsutsui 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    825   1.88   tsutsui 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    826   1.88   tsutsui 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    827  1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    828  1.223    bouyer 	    BUS_DMASYNC_PREREAD);
    829    1.1  augustss }
    830    1.1  augustss 
    831    1.1  augustss void
    832  1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
    833    1.1  augustss {
    834  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    835  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    836   1.67  augustss 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    837   1.88   tsutsui 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    838   1.88   tsutsui 	    le32toh(sqh->qh.qh_elink)));
    839  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    840    1.1  augustss }
    841    1.1  augustss 
    842   1.13  augustss 
    843  1.110  augustss #if 1
    844    1.1  augustss void
    845  1.119  augustss uhci_dump(void)
    846    1.1  augustss {
    847  1.110  augustss 	uhci_dump_all(thesc);
    848  1.110  augustss }
    849  1.110  augustss #endif
    850    1.1  augustss 
    851  1.110  augustss void
    852  1.119  augustss uhci_dump_all(uhci_softc_t *sc)
    853  1.110  augustss {
    854    1.1  augustss 	uhci_dumpregs(sc);
    855   1.50  augustss 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
    856  1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    857  1.123  augustss 	uhci_dump_qh(sc->sc_lctl_start);
    858    1.1  augustss }
    859    1.1  augustss 
    860   1.67  augustss 
    861   1.67  augustss void
    862  1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
    863   1.67  augustss {
    864   1.67  augustss 	uhci_dump_qh(sqh);
    865   1.67  augustss 
    866   1.67  augustss 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    867   1.67  augustss 	 * Traverses sideways first, then down.
    868   1.67  augustss 	 *
    869   1.67  augustss 	 * QH1
    870   1.67  augustss 	 * QH2
    871   1.67  augustss 	 * No QH
    872   1.67  augustss 	 * TD2.1
    873   1.67  augustss 	 * TD2.2
    874   1.67  augustss 	 * TD1.1
    875   1.67  augustss 	 * etc.
    876   1.67  augustss 	 *
    877   1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    878   1.67  augustss 	 */
    879   1.67  augustss 
    880   1.67  augustss 
    881  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    882  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    883   1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    884   1.67  augustss 		uhci_dump_qhs(sqh->hlink);
    885   1.67  augustss 	else
    886   1.67  augustss 		DPRINTF(("No QH\n"));
    887  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    888   1.67  augustss 
    889   1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    890   1.67  augustss 		uhci_dump_tds(sqh->elink);
    891   1.67  augustss 	else
    892   1.67  augustss 		DPRINTF(("No TD\n"));
    893   1.67  augustss }
    894   1.67  augustss 
    895    1.1  augustss void
    896  1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
    897    1.1  augustss {
    898   1.67  augustss 	uhci_soft_td_t *td;
    899  1.223    bouyer 	int stop;
    900   1.67  augustss 
    901   1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
    902   1.67  augustss 		uhci_dump_td(td);
    903    1.1  augustss 
    904   1.67  augustss 		/* Check whether the link pointer in this TD marks
    905   1.67  augustss 		 * the link pointer as end of queue. This avoids
    906   1.67  augustss 		 * printing the free list in case the queue/TD has
    907   1.67  augustss 		 * already been moved there (seatbelt).
    908   1.67  augustss 		 */
    909  1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    910  1.223    bouyer 		    sizeof(td->td.td_link),
    911  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    912  1.223    bouyer 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    913  1.223    bouyer 			le32toh(td->td.td_link) == 0);
    914  1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    915  1.223    bouyer 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    916  1.223    bouyer 		if (stop)
    917   1.67  augustss 			break;
    918   1.67  augustss 	}
    919    1.1  augustss }
    920   1.92  augustss 
    921  1.101  augustss Static void
    922  1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
    923   1.92  augustss {
    924   1.95  augustss 	usbd_pipe_handle pipe;
    925   1.95  augustss 	usb_endpoint_descriptor_t *ed;
    926   1.95  augustss 	usbd_device_handle dev;
    927  1.152  augustss 
    928   1.98  augustss #ifdef DIAGNOSTIC
    929   1.98  augustss #define DONE ii->isdone
    930   1.98  augustss #else
    931   1.98  augustss #define DONE 0
    932   1.98  augustss #endif
    933   1.95  augustss         if (ii == NULL) {
    934   1.95  augustss                 printf("ii NULL\n");
    935   1.95  augustss                 return;
    936   1.95  augustss         }
    937   1.95  augustss         if (ii->xfer == NULL) {
    938   1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
    939   1.98  augustss 		       ii, DONE);
    940   1.95  augustss                 return;
    941   1.95  augustss         }
    942   1.95  augustss         pipe = ii->xfer->pipe;
    943   1.95  augustss         if (pipe == NULL) {
    944   1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    945   1.98  augustss 		       ii, DONE, ii->xfer);
    946  1.139  augustss                 return;
    947  1.139  augustss 	}
    948  1.139  augustss         if (pipe->endpoint == NULL) {
    949  1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
    950  1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    951  1.139  augustss                 return;
    952  1.139  augustss 	}
    953  1.139  augustss         if (pipe->device == NULL) {
    954  1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
    955  1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    956   1.95  augustss                 return;
    957   1.95  augustss 	}
    958   1.95  augustss         ed = pipe->endpoint->edesc;
    959   1.95  augustss         dev = pipe->device;
    960  1.152  augustss 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    961  1.152  augustss 	       ii, DONE, ii->xfer, dev,
    962   1.95  augustss 	       UGETW(dev->ddesc.idVendor),
    963   1.92  augustss 	       UGETW(dev->ddesc.idProduct),
    964   1.92  augustss 	       dev->address, pipe,
    965   1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
    966   1.98  augustss #undef DONE
    967   1.92  augustss }
    968   1.92  augustss 
    969  1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
    970   1.92  augustss void
    971  1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
    972   1.92  augustss {
    973   1.92  augustss 	uhci_intr_info_t *ii;
    974   1.92  augustss 
    975   1.92  augustss 	printf("intr_info list:\n");
    976   1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
    977   1.92  augustss 		uhci_dump_ii(ii);
    978   1.92  augustss }
    979   1.92  augustss 
    980  1.120  augustss void iidump(void);
    981  1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
    982   1.92  augustss 
    983    1.1  augustss #endif
    984    1.1  augustss 
    985    1.1  augustss /*
    986    1.1  augustss  * This routine is executed periodically and simulates interrupts
    987    1.1  augustss  * from the root controller interrupt pipe for port status change.
    988    1.1  augustss  */
    989    1.1  augustss void
    990  1.119  augustss uhci_poll_hub(void *addr)
    991    1.1  augustss {
    992   1.63  augustss 	usbd_xfer_handle xfer = addr;
    993   1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
    994  1.227    martin 	uhci_softc_t *sc;
    995    1.1  augustss 	int s;
    996    1.1  augustss 	u_char *p;
    997    1.1  augustss 
    998   1.96  augustss 	DPRINTFN(20, ("uhci_poll_hub\n"));
    999    1.1  augustss 
   1000  1.228    martin 	if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL))
   1001  1.228    martin 		return;	/* device has detached */
   1002  1.227    martin 	sc = pipe->device->bus->hci_private;
   1003  1.234    dyoung 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1004   1.41  augustss 
   1005  1.159  augustss 	p = KERNADDR(&xfer->dmabuf, 0);
   1006    1.1  augustss 	p[0] = 0;
   1007    1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1008    1.1  augustss 		p[0] |= 1<<1;
   1009    1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1010    1.1  augustss 		p[0] |= 1<<2;
   1011   1.41  augustss 	if (p[0] == 0)
   1012   1.41  augustss 		/* No change, try again in a while */
   1013   1.41  augustss 		return;
   1014   1.41  augustss 
   1015   1.63  augustss 	xfer->actlen = 1;
   1016   1.63  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
   1017   1.16  augustss 	s = splusb();
   1018   1.63  augustss 	usb_transfer_complete(xfer);
   1019   1.41  augustss 	splx(s);
   1020   1.41  augustss }
   1021   1.41  augustss 
   1022   1.41  augustss void
   1023  1.205  christos uhci_root_intr_done(usbd_xfer_handle xfer)
   1024   1.84  augustss {
   1025   1.84  augustss }
   1026   1.84  augustss 
   1027   1.84  augustss void
   1028  1.205  christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
   1029   1.41  augustss {
   1030    1.1  augustss }
   1031    1.1  augustss 
   1032  1.123  augustss /*
   1033  1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
   1034  1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
   1035  1.123  augustss  * USB performance a lot for some devices.
   1036  1.123  augustss  * If we are already looping, just count it.
   1037  1.123  augustss  */
   1038    1.1  augustss void
   1039  1.123  augustss uhci_add_loop(uhci_softc_t *sc) {
   1040  1.125  augustss #ifdef UHCI_DEBUG
   1041  1.125  augustss 	if (uhcinoloop)
   1042  1.125  augustss 		return;
   1043  1.125  augustss #endif
   1044  1.123  augustss 	if (++sc->sc_loops == 1) {
   1045  1.125  augustss 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1046  1.123  augustss 		/* Note, we don't loop back the soft pointer. */
   1047  1.152  augustss 		sc->sc_last_qh->qh.qh_hlink =
   1048  1.123  augustss 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1049  1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1050  1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1051  1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1052  1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1053  1.123  augustss 	}
   1054  1.123  augustss }
   1055  1.123  augustss 
   1056  1.123  augustss void
   1057  1.123  augustss uhci_rem_loop(uhci_softc_t *sc) {
   1058  1.125  augustss #ifdef UHCI_DEBUG
   1059  1.125  augustss 	if (uhcinoloop)
   1060  1.125  augustss 		return;
   1061  1.125  augustss #endif
   1062  1.123  augustss 	if (--sc->sc_loops == 0) {
   1063  1.123  augustss 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1064  1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1065  1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1066  1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1067  1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1068  1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1069  1.123  augustss 	}
   1070  1.123  augustss }
   1071  1.123  augustss 
   1072  1.123  augustss /* Add high speed control QH, called at splusb(). */
   1073  1.123  augustss void
   1074  1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1075    1.1  augustss {
   1076   1.42  augustss 	uhci_soft_qh_t *eqh;
   1077    1.1  augustss 
   1078    1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1079  1.123  augustss 	eqh = sc->sc_hctl_end;
   1080  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1081  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   1082  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   1083   1.42  augustss 	sqh->hlink       = eqh->hlink;
   1084   1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1085  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1086  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1087   1.42  augustss 	eqh->hlink       = sqh;
   1088  1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1089  1.123  augustss 	sc->sc_hctl_end = sqh;
   1090  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1091  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1092  1.125  augustss #ifdef UHCI_CTL_LOOP
   1093  1.123  augustss 	uhci_add_loop(sc);
   1094  1.125  augustss #endif
   1095    1.1  augustss }
   1096    1.1  augustss 
   1097  1.123  augustss /* Remove high speed control QH, called at splusb(). */
   1098    1.1  augustss void
   1099  1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1100    1.1  augustss {
   1101    1.1  augustss 	uhci_soft_qh_t *pqh;
   1102    1.1  augustss 
   1103  1.123  augustss 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1104  1.125  augustss #ifdef UHCI_CTL_LOOP
   1105  1.123  augustss 	uhci_rem_loop(sc);
   1106  1.125  augustss #endif
   1107  1.124  augustss 	/*
   1108  1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1109  1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1110  1.124  augustss 	 * the transferred packet was short so that the QH still points
   1111  1.124  augustss 	 * at the last used TD.
   1112  1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1113  1.124  augustss 	 * to stop looking at the TD.
   1114  1.223    bouyer 	 * Note that if the TD chain is large enough, the controller
   1115  1.223    bouyer 	 * may still be looking at the chain at the end of this function.
   1116  1.223    bouyer 	 * uhci_free_std_chain() will make sure the controller stops
   1117  1.223    bouyer 	 * looking at it quickly, but until then we should not change
   1118  1.223    bouyer 	 * sqh->hlink.
   1119  1.124  augustss 	 */
   1120  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1121  1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1122  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1123  1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1124  1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1125  1.223    bouyer 		usb_syncmem(&sqh->dma,
   1126  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1127  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1128  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1129  1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1130  1.124  augustss 	}
   1131  1.124  augustss 
   1132  1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1133  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1134  1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1135  1.152  augustss 	pqh->hlink = sqh->hlink;
   1136   1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1137  1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1138  1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1139  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1140  1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1141  1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1142  1.123  augustss 		sc->sc_hctl_end = pqh;
   1143  1.123  augustss }
   1144  1.123  augustss 
   1145  1.123  augustss /* Add low speed control QH, called at splusb(). */
   1146  1.123  augustss void
   1147  1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1148  1.123  augustss {
   1149  1.123  augustss 	uhci_soft_qh_t *eqh;
   1150  1.123  augustss 
   1151  1.123  augustss 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1152  1.123  augustss 	eqh = sc->sc_lctl_end;
   1153  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1154  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1155  1.152  augustss 	sqh->hlink = eqh->hlink;
   1156  1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1157  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1158  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1159  1.152  augustss 	eqh->hlink = sqh;
   1160  1.123  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1161  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1162  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1163  1.123  augustss 	sc->sc_lctl_end = sqh;
   1164  1.123  augustss }
   1165  1.123  augustss 
   1166  1.123  augustss /* Remove low speed control QH, called at splusb(). */
   1167  1.123  augustss void
   1168  1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1169  1.123  augustss {
   1170  1.123  augustss 	uhci_soft_qh_t *pqh;
   1171  1.123  augustss 
   1172  1.123  augustss 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1173  1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1174  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1175  1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1176  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1177  1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1178  1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1179  1.223    bouyer 		usb_syncmem(&sqh->dma,
   1180  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1181  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1182  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1183  1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1184  1.124  augustss 	}
   1185  1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1186  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1187  1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1188  1.152  augustss 	pqh->hlink = sqh->hlink;
   1189  1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1190  1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1191  1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1192  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1193  1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1194  1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1195  1.123  augustss 		sc->sc_lctl_end = pqh;
   1196    1.1  augustss }
   1197    1.1  augustss 
   1198    1.1  augustss /* Add bulk QH, called at splusb(). */
   1199    1.1  augustss void
   1200  1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1201    1.1  augustss {
   1202   1.42  augustss 	uhci_soft_qh_t *eqh;
   1203    1.1  augustss 
   1204    1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1205   1.42  augustss 	eqh = sc->sc_bulk_end;
   1206  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1207  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1208  1.152  augustss 	sqh->hlink = eqh->hlink;
   1209   1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1210  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1211  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1212  1.152  augustss 	eqh->hlink = sqh;
   1213  1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1214  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1215  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1216    1.1  augustss 	sc->sc_bulk_end = sqh;
   1217  1.123  augustss 	uhci_add_loop(sc);
   1218    1.1  augustss }
   1219    1.1  augustss 
   1220    1.1  augustss /* Remove bulk QH, called at splusb(). */
   1221    1.1  augustss void
   1222  1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1223    1.1  augustss {
   1224    1.1  augustss 	uhci_soft_qh_t *pqh;
   1225    1.1  augustss 
   1226    1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1227  1.123  augustss 	uhci_rem_loop(sc);
   1228  1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1229  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1230  1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1231  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1232  1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1233  1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1234  1.223    bouyer 		usb_syncmem(&sqh->dma,
   1235  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1236  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1237  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1238  1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1239  1.124  augustss 	}
   1240   1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1241  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1242  1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1243   1.42  augustss 	pqh->hlink       = sqh->hlink;
   1244   1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1245  1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1246  1.223    bouyer 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1247  1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1248    1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1249    1.1  augustss 		sc->sc_bulk_end = pqh;
   1250    1.1  augustss }
   1251    1.1  augustss 
   1252  1.141  augustss Static int uhci_intr1(uhci_softc_t *);
   1253  1.141  augustss 
   1254    1.1  augustss int
   1255  1.119  augustss uhci_intr(void *arg)
   1256    1.1  augustss {
   1257   1.44  augustss 	uhci_softc_t *sc = arg;
   1258  1.146  augustss 
   1259  1.216  drochner 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1260  1.146  augustss 		return (0);
   1261  1.141  augustss 
   1262  1.225    bouyer 	if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) {
   1263  1.141  augustss #ifdef DIAGNOSTIC
   1264  1.179   mycroft 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
   1265  1.141  augustss #endif
   1266  1.141  augustss 		return (0);
   1267  1.141  augustss 	}
   1268  1.179   mycroft 
   1269  1.141  augustss 	return (uhci_intr1(sc));
   1270  1.141  augustss }
   1271  1.141  augustss 
   1272  1.141  augustss int
   1273  1.141  augustss uhci_intr1(uhci_softc_t *sc)
   1274  1.141  augustss {
   1275   1.44  augustss 	int status;
   1276   1.44  augustss 	int ack;
   1277    1.1  augustss 
   1278   1.67  augustss #ifdef UHCI_DEBUG
   1279   1.44  augustss 	if (uhcidebug > 15) {
   1280  1.216  drochner 		DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
   1281    1.1  augustss 		uhci_dumpregs(sc);
   1282    1.1  augustss 	}
   1283    1.1  augustss #endif
   1284  1.117  augustss 
   1285  1.153  augustss 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1286  1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1287  1.127     soren 		return (0);
   1288  1.127     soren 
   1289  1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1290  1.201  jmcneill #ifdef DIAGNOSTIC
   1291  1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1292  1.216  drochner 		       device_xname(sc->sc_dev));
   1293  1.201  jmcneill #endif
   1294  1.134  augustss 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1295  1.117  augustss 		return (0);
   1296  1.117  augustss 	}
   1297   1.44  augustss 
   1298   1.44  augustss 	ack = 0;
   1299   1.44  augustss 	if (status & UHCI_STS_USBINT)
   1300   1.44  augustss 		ack |= UHCI_STS_USBINT;
   1301   1.44  augustss 	if (status & UHCI_STS_USBEI)
   1302   1.44  augustss 		ack |= UHCI_STS_USBEI;
   1303    1.1  augustss 	if (status & UHCI_STS_RD) {
   1304   1.44  augustss 		ack |= UHCI_STS_RD;
   1305  1.118  augustss #ifdef UHCI_DEBUG
   1306  1.216  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1307  1.118  augustss #endif
   1308    1.1  augustss 	}
   1309    1.1  augustss 	if (status & UHCI_STS_HSE) {
   1310   1.44  augustss 		ack |= UHCI_STS_HSE;
   1311  1.216  drochner 		printf("%s: host system error\n", device_xname(sc->sc_dev));
   1312    1.1  augustss 	}
   1313    1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1314   1.44  augustss 		ack |= UHCI_STS_HCPE;
   1315  1.152  augustss 		printf("%s: host controller process error\n",
   1316  1.216  drochner 		       device_xname(sc->sc_dev));
   1317   1.44  augustss 	}
   1318  1.233   msaitoh 
   1319  1.233   msaitoh 	/* When HCHalted=1 and Run/Stop=0 , it is normal */
   1320  1.233   msaitoh 	if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) {
   1321   1.44  augustss 		/* no acknowledge needed */
   1322  1.136  augustss 		if (!sc->sc_dying) {
   1323  1.152  augustss 			printf("%s: host controller halted\n",
   1324  1.216  drochner 			    device_xname(sc->sc_dev));
   1325  1.110  augustss #ifdef UHCI_DEBUG
   1326  1.136  augustss 			uhci_dump_all(sc);
   1327  1.110  augustss #endif
   1328  1.136  augustss 		}
   1329  1.136  augustss 		sc->sc_dying = 1;
   1330    1.1  augustss 	}
   1331   1.44  augustss 
   1332  1.132  augustss 	if (!ack)
   1333  1.132  augustss 		return (0);	/* nothing to acknowledge */
   1334  1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1335    1.1  augustss 
   1336   1.85  augustss 	sc->sc_bus.no_intrs++;
   1337   1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1338   1.85  augustss 
   1339  1.216  drochner 	DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
   1340   1.85  augustss 
   1341   1.85  augustss 	return (1);
   1342   1.85  augustss }
   1343   1.85  augustss 
   1344   1.85  augustss void
   1345  1.133  augustss uhci_softintr(void *v)
   1346   1.85  augustss {
   1347  1.216  drochner 	struct usbd_bus *bus = v;
   1348  1.216  drochner 	uhci_softc_t *sc = bus->hci_private;
   1349  1.178    martin 	uhci_intr_info_t *ii, *nextii;
   1350   1.85  augustss 
   1351  1.247       mrg 	DPRINTFN(10,("%s: uhci_softintr\n", device_xname(sc->sc_dev)));
   1352   1.50  augustss 
   1353    1.1  augustss 	/*
   1354    1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1355    1.1  augustss 	 * interrupts because a transfer is completed there is no
   1356    1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1357    1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1358    1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1359    1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1360    1.1  augustss 	 * output on a slow console).
   1361    1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1362    1.1  augustss 	 * completed.
   1363    1.1  augustss 	 */
   1364  1.178    martin 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1365  1.178    martin 		nextii = LIST_NEXT(ii, list);
   1366    1.1  augustss 		uhci_check_intr(sc, ii);
   1367  1.178    martin 	}
   1368    1.1  augustss 
   1369  1.153  augustss 	if (sc->sc_softwake) {
   1370  1.153  augustss 		sc->sc_softwake = 0;
   1371  1.153  augustss 		wakeup(&sc->sc_softwake);
   1372  1.153  augustss 	}
   1373    1.1  augustss }
   1374    1.1  augustss 
   1375    1.1  augustss /* Check for an interrupt. */
   1376    1.1  augustss void
   1377  1.205  christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1378    1.1  augustss {
   1379    1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1380   1.18  augustss 	u_int32_t status;
   1381    1.1  augustss 
   1382    1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1383    1.1  augustss #ifdef DIAGNOSTIC
   1384   1.63  augustss 	if (ii == NULL) {
   1385    1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1386    1.1  augustss 		return;
   1387    1.1  augustss 	}
   1388    1.1  augustss #endif
   1389  1.155  augustss 	if (ii->xfer->status == USBD_CANCELLED ||
   1390  1.155  augustss 	    ii->xfer->status == USBD_TIMEOUT) {
   1391  1.155  augustss 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1392  1.155  augustss 		return;
   1393  1.155  augustss 	}
   1394  1.155  augustss 
   1395   1.63  augustss 	if (ii->stdstart == NULL)
   1396    1.1  augustss 		return;
   1397    1.1  augustss 	lstd = ii->stdend;
   1398    1.1  augustss #ifdef DIAGNOSTIC
   1399   1.63  augustss 	if (lstd == NULL) {
   1400    1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1401    1.1  augustss 		return;
   1402    1.1  augustss 	}
   1403    1.1  augustss #endif
   1404  1.152  augustss 	/*
   1405   1.26  augustss 	 * If the last TD is still active we need to check whether there
   1406  1.186     skrll 	 * is an error somewhere in the middle, or whether there was a
   1407   1.26  augustss 	 * short packet (SPD and not ACTIVE).
   1408   1.26  augustss 	 */
   1409  1.223    bouyer 	usb_syncmem(&lstd->dma,
   1410  1.223    bouyer 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1411  1.223    bouyer 	    sizeof(lstd->td.td_status),
   1412  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1413   1.88   tsutsui 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1414   1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1415   1.48  augustss 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1416  1.223    bouyer 			usb_syncmem(&std->dma,
   1417  1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1418  1.223    bouyer 			    sizeof(std->td.td_status),
   1419  1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1420   1.88   tsutsui 			status = le32toh(std->td.td_status);
   1421  1.223    bouyer 			usb_syncmem(&std->dma,
   1422  1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1423  1.223    bouyer 			    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1424   1.83  augustss 			/* If there's an active TD the xfer isn't done. */
   1425   1.83  augustss 			if (status & UHCI_TD_ACTIVE)
   1426   1.83  augustss 				break;
   1427   1.83  augustss 			/* Any kind of error makes the xfer done. */
   1428   1.83  augustss 			if (status & UHCI_TD_STALLED)
   1429   1.83  augustss 				goto done;
   1430   1.83  augustss 			/* We want short packets, and it is short: it's done */
   1431  1.223    bouyer 			usb_syncmem(&std->dma,
   1432  1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_token),
   1433  1.223    bouyer 			    sizeof(std->td.td_token),
   1434  1.223    bouyer 			    BUS_DMASYNC_POSTWRITE);
   1435   1.83  augustss 			if ((status & UHCI_TD_SPD) &&
   1436  1.152  augustss 			      UHCI_TD_GET_ACTLEN(status) <
   1437   1.88   tsutsui 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1438    1.1  augustss 				goto done;
   1439   1.18  augustss 		}
   1440   1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1441   1.18  augustss 			      ii, ii->stdstart));
   1442  1.223    bouyer 		usb_syncmem(&lstd->dma,
   1443  1.223    bouyer 		    lstd->offs + offsetof(uhci_td_t, td_status),
   1444  1.223    bouyer 		    sizeof(lstd->td.td_status),
   1445  1.223    bouyer 		    BUS_DMASYNC_PREREAD);
   1446    1.1  augustss 		return;
   1447    1.1  augustss 	}
   1448    1.1  augustss  done:
   1449   1.92  augustss 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1450  1.234    dyoung 	callout_stop(&ii->xfer->timeout_handle);
   1451   1.36  augustss 	uhci_idone(ii);
   1452    1.1  augustss }
   1453    1.1  augustss 
   1454   1.52  augustss /* Called at splusb() */
   1455    1.1  augustss void
   1456  1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1457    1.1  augustss {
   1458   1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1459   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1460    1.1  augustss 	uhci_soft_td_t *std;
   1461   1.67  augustss 	u_int32_t status = 0, nstatus;
   1462   1.26  augustss 	int actlen;
   1463    1.1  augustss 
   1464  1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1465    1.7  augustss #ifdef DIAGNOSTIC
   1466    1.7  augustss 	{
   1467    1.7  augustss 		int s = splhigh();
   1468    1.7  augustss 		if (ii->isdone) {
   1469   1.26  augustss 			splx(s);
   1470   1.92  augustss #ifdef UHCI_DEBUG
   1471   1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1472   1.92  augustss 			uhci_dump_ii(ii);
   1473   1.92  augustss #else
   1474   1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1475   1.92  augustss #endif
   1476    1.7  augustss 			return;
   1477    1.7  augustss 		}
   1478    1.7  augustss 		ii->isdone = 1;
   1479    1.7  augustss 		splx(s);
   1480    1.7  augustss 	}
   1481    1.7  augustss #endif
   1482   1.48  augustss 
   1483   1.63  augustss 	if (xfer->nframes != 0) {
   1484   1.48  augustss 		/* Isoc transfer, do things differently. */
   1485   1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1486  1.126  augustss 		int i, n, nframes, len;
   1487   1.48  augustss 
   1488   1.48  augustss 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1489   1.48  augustss 
   1490   1.63  augustss 		nframes = xfer->nframes;
   1491   1.48  augustss 		actlen = 0;
   1492   1.92  augustss 		n = UXFER(xfer)->curframe;
   1493   1.48  augustss 		for (i = 0; i < nframes; i++) {
   1494   1.48  augustss 			std = stds[n];
   1495   1.59  augustss #ifdef UHCI_DEBUG
   1496   1.48  augustss 			if (uhcidebug > 5) {
   1497   1.48  augustss 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1498   1.48  augustss 				uhci_dump_td(std);
   1499   1.48  augustss 			}
   1500   1.48  augustss #endif
   1501   1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1502   1.48  augustss 				n = 0;
   1503  1.223    bouyer 			usb_syncmem(&std->dma,
   1504  1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1505  1.223    bouyer 			    sizeof(std->td.td_status),
   1506  1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1507   1.88   tsutsui 			status = le32toh(std->td.td_status);
   1508  1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1509  1.126  augustss 			xfer->frlengths[i] = len;
   1510  1.126  augustss 			actlen += len;
   1511   1.48  augustss 		}
   1512   1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1513   1.63  augustss 		xfer->actlen = actlen;
   1514   1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1515  1.140  augustss 		goto end;
   1516   1.48  augustss 	}
   1517   1.48  augustss 
   1518   1.59  augustss #ifdef UHCI_DEBUG
   1519   1.65  augustss 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1520   1.65  augustss 		      ii, xfer, upipe));
   1521   1.48  augustss 	if (uhcidebug > 10)
   1522   1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1523   1.48  augustss #endif
   1524   1.48  augustss 
   1525   1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1526   1.26  augustss 	actlen = 0;
   1527   1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1528  1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1529  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1530   1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1531   1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1532   1.26  augustss 			break;
   1533   1.67  augustss 
   1534   1.64  augustss 		status = nstatus;
   1535   1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1536   1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1537   1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1538  1.176   mycroft 		else {
   1539  1.176   mycroft 			/*
   1540  1.176   mycroft 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1541  1.176   mycroft 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1542  1.176   mycroft 			 * CONTROL AND STATUS".
   1543  1.176   mycroft 			 */
   1544  1.176   mycroft 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1545  1.176   mycroft 				status &= ~UHCI_TD_CRCTO;
   1546  1.176   mycroft 		}
   1547    1.1  augustss 	}
   1548   1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1549   1.63  augustss 	if (std != NULL)
   1550   1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1551   1.38  augustss 
   1552    1.1  augustss 	status &= UHCI_TD_ERROR;
   1553  1.152  augustss 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1554   1.26  augustss 		      actlen, status));
   1555   1.63  augustss 	xfer->actlen = actlen;
   1556    1.1  augustss 	if (status != 0) {
   1557  1.122        tv #ifdef UHCI_DEBUG
   1558  1.122        tv 		char sbuf[128];
   1559  1.122        tv 
   1560  1.224  christos 		snprintb(sbuf, sizeof(sbuf),
   1561  1.224  christos 		    "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1562  1.224  christos 		    "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status);
   1563  1.122        tv 
   1564   1.75  augustss 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1565   1.36  augustss 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1566  1.122        tv 			  "status 0x%s\n",
   1567   1.63  augustss 			  xfer->pipe->device->address,
   1568   1.63  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1569  1.122        tv 			  sbuf));
   1570  1.122        tv #endif
   1571  1.122        tv 
   1572    1.1  augustss 		if (status == UHCI_TD_STALLED)
   1573   1.63  augustss 			xfer->status = USBD_STALLED;
   1574    1.1  augustss 		else
   1575   1.63  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
   1576    1.1  augustss 	} else {
   1577   1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1578    1.1  augustss 	}
   1579  1.140  augustss 
   1580  1.140  augustss  end:
   1581   1.63  augustss 	usb_transfer_complete(xfer);
   1582  1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1583    1.1  augustss }
   1584    1.1  augustss 
   1585   1.13  augustss /*
   1586   1.13  augustss  * Called when a request does not complete.
   1587   1.13  augustss  */
   1588    1.1  augustss void
   1589  1.119  augustss uhci_timeout(void *addr)
   1590    1.1  augustss {
   1591    1.1  augustss 	uhci_intr_info_t *ii = addr;
   1592  1.153  augustss 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1593  1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1594  1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   1595  1.153  augustss 
   1596  1.153  augustss 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1597  1.153  augustss 
   1598  1.153  augustss 	if (sc->sc_dying) {
   1599  1.153  augustss 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1600  1.153  augustss 		return;
   1601  1.153  augustss 	}
   1602    1.1  augustss 
   1603  1.153  augustss 	/* Execute the abort in a process context. */
   1604  1.238   tsutsui 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
   1605  1.204     joerg 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
   1606  1.204     joerg 	    USB_TASKQ_HC);
   1607  1.153  augustss }
   1608   1.51  augustss 
   1609  1.153  augustss void
   1610  1.153  augustss uhci_timeout_task(void *addr)
   1611  1.153  augustss {
   1612  1.153  augustss 	usbd_xfer_handle xfer = addr;
   1613  1.153  augustss 	int s;
   1614  1.153  augustss 
   1615  1.153  augustss 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1616   1.67  augustss 
   1617  1.153  augustss 	s = splusb();
   1618  1.153  augustss 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1619  1.153  augustss 	splx(s);
   1620    1.1  augustss }
   1621    1.1  augustss 
   1622    1.1  augustss /*
   1623    1.1  augustss  * Wait here until controller claims to have an interrupt.
   1624    1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1625    1.1  augustss  * too long.
   1626   1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1627    1.1  augustss  */
   1628    1.1  augustss void
   1629  1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1630    1.1  augustss {
   1631   1.63  augustss 	int timo = xfer->timeout;
   1632   1.13  augustss 	uhci_intr_info_t *ii;
   1633   1.13  augustss 
   1634   1.26  augustss 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1635    1.1  augustss 
   1636   1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   1637   1.26  augustss 	for (; timo >= 0; timo--) {
   1638   1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1639   1.26  augustss 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1640    1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1641  1.141  augustss 			uhci_intr1(sc);
   1642   1.63  augustss 			if (xfer->status != USBD_IN_PROGRESS)
   1643    1.1  augustss 				return;
   1644    1.1  augustss 		}
   1645    1.1  augustss 	}
   1646   1.13  augustss 
   1647   1.13  augustss 	/* Timeout */
   1648   1.13  augustss 	DPRINTF(("uhci_waitintr: timeout\n"));
   1649   1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1650  1.152  augustss 	     ii != NULL && ii->xfer != xfer;
   1651   1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1652   1.13  augustss 		;
   1653   1.41  augustss #ifdef DIAGNOSTIC
   1654   1.63  augustss 	if (ii == NULL)
   1655  1.163    provos 		panic("uhci_waitintr: lost intr_info");
   1656   1.41  augustss #endif
   1657   1.41  augustss 	uhci_idone(ii);
   1658    1.1  augustss }
   1659    1.1  augustss 
   1660    1.8  augustss void
   1661  1.119  augustss uhci_poll(struct usbd_bus *bus)
   1662    1.8  augustss {
   1663  1.216  drochner 	uhci_softc_t *sc = bus->hci_private;
   1664    1.8  augustss 
   1665    1.8  augustss 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
   1666  1.141  augustss 		uhci_intr1(sc);
   1667    1.8  augustss }
   1668    1.8  augustss 
   1669    1.1  augustss void
   1670  1.119  augustss uhci_reset(uhci_softc_t *sc)
   1671    1.1  augustss {
   1672    1.1  augustss 	int n;
   1673    1.1  augustss 
   1674    1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1675    1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1676  1.152  augustss 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1677    1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1678   1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1679    1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1680  1.152  augustss 		printf("%s: controller did not reset\n",
   1681  1.216  drochner 		       device_xname(sc->sc_dev));
   1682    1.1  augustss }
   1683    1.1  augustss 
   1684   1.16  augustss usbd_status
   1685  1.119  augustss uhci_run(uhci_softc_t *sc, int run)
   1686    1.1  augustss {
   1687    1.1  augustss 	int s, n, running;
   1688   1.71  augustss 	u_int16_t cmd;
   1689    1.1  augustss 
   1690    1.1  augustss 	run = run != 0;
   1691  1.132  augustss 	s = splhardusb();
   1692   1.30  augustss 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1693   1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1694   1.71  augustss 	if (run)
   1695   1.71  augustss 		cmd |= UHCI_CMD_RS;
   1696   1.71  augustss 	else
   1697   1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1698   1.71  augustss 	UHCICMD(sc, cmd);
   1699   1.13  augustss 	for(n = 0; n < 10; n++) {
   1700    1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1701    1.1  augustss 		/* return when we've entered the state we want */
   1702    1.1  augustss 		if (run == running) {
   1703    1.1  augustss 			splx(s);
   1704   1.30  augustss 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1705   1.30  augustss 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1706   1.16  augustss 			return (USBD_NORMAL_COMPLETION);
   1707    1.1  augustss 		}
   1708   1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1709    1.1  augustss 	}
   1710    1.1  augustss 	splx(s);
   1711  1.216  drochner 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
   1712   1.14  augustss 	       run ? "start" : "stop");
   1713   1.16  augustss 	return (USBD_IOERROR);
   1714    1.1  augustss }
   1715    1.1  augustss 
   1716    1.1  augustss /*
   1717    1.1  augustss  * Memory management routines.
   1718    1.1  augustss  *  uhci_alloc_std allocates TDs
   1719    1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1720    1.7  augustss  * These two routines do their own free list management,
   1721    1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1722    1.1  augustss  * has page size granularaity so much memory would be wasted if
   1723   1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1724    1.1  augustss  */
   1725    1.1  augustss 
   1726    1.1  augustss uhci_soft_td_t *
   1727  1.119  augustss uhci_alloc_std(uhci_softc_t *sc)
   1728    1.1  augustss {
   1729    1.1  augustss 	uhci_soft_td_t *std;
   1730   1.63  augustss 	usbd_status err;
   1731   1.42  augustss 	int i, offs;
   1732    1.7  augustss 	usb_dma_t dma;
   1733    1.1  augustss 
   1734   1.63  augustss 	if (sc->sc_freetds == NULL) {
   1735    1.1  augustss 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1736   1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1737   1.63  augustss 			  UHCI_TD_ALIGN, &dma);
   1738   1.63  augustss 		if (err)
   1739   1.16  augustss 			return (0);
   1740   1.43  augustss 		for(i = 0; i < UHCI_STD_CHUNK; i++) {
   1741   1.42  augustss 			offs = i * UHCI_STD_SIZE;
   1742  1.159  augustss 			std = KERNADDR(&dma, offs);
   1743  1.160  augustss 			std->physaddr = DMAADDR(&dma, offs);
   1744  1.223    bouyer 			std->dma = dma;
   1745  1.223    bouyer 			std->offs = offs;
   1746   1.42  augustss 			std->link.std = sc->sc_freetds;
   1747    1.1  augustss 			sc->sc_freetds = std;
   1748    1.1  augustss 		}
   1749    1.1  augustss 	}
   1750    1.1  augustss 	std = sc->sc_freetds;
   1751   1.42  augustss 	sc->sc_freetds = std->link.std;
   1752   1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1753    1.1  augustss 	return std;
   1754    1.1  augustss }
   1755    1.1  augustss 
   1756    1.1  augustss void
   1757  1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1758    1.1  augustss {
   1759    1.7  augustss #ifdef DIAGNOSTIC
   1760    1.7  augustss #define TD_IS_FREE 0x12345678
   1761   1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1762    1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1763    1.7  augustss 		return;
   1764    1.7  augustss 	}
   1765   1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1766    1.7  augustss #endif
   1767   1.42  augustss 	std->link.std = sc->sc_freetds;
   1768    1.1  augustss 	sc->sc_freetds = std;
   1769    1.1  augustss }
   1770    1.1  augustss 
   1771    1.1  augustss uhci_soft_qh_t *
   1772  1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   1773    1.1  augustss {
   1774    1.1  augustss 	uhci_soft_qh_t *sqh;
   1775   1.63  augustss 	usbd_status err;
   1776    1.1  augustss 	int i, offs;
   1777    1.7  augustss 	usb_dma_t dma;
   1778    1.1  augustss 
   1779   1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   1780    1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1781   1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1782   1.63  augustss 			  UHCI_QH_ALIGN, &dma);
   1783   1.63  augustss 		if (err)
   1784   1.63  augustss 			return (0);
   1785   1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1786   1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   1787  1.159  augustss 			sqh = KERNADDR(&dma, offs);
   1788  1.160  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   1789  1.223    bouyer 			sqh->dma = dma;
   1790  1.223    bouyer 			sqh->offs = offs;
   1791   1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   1792    1.1  augustss 			sc->sc_freeqhs = sqh;
   1793    1.1  augustss 		}
   1794    1.1  augustss 	}
   1795    1.1  augustss 	sqh = sc->sc_freeqhs;
   1796   1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   1797   1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1798   1.16  augustss 	return (sqh);
   1799    1.1  augustss }
   1800    1.1  augustss 
   1801    1.1  augustss void
   1802  1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1803    1.1  augustss {
   1804   1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   1805    1.1  augustss 	sc->sc_freeqhs = sqh;
   1806    1.1  augustss }
   1807    1.1  augustss 
   1808    1.1  augustss void
   1809  1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1810  1.119  augustss 		    uhci_soft_td_t *stdend)
   1811    1.1  augustss {
   1812    1.1  augustss 	uhci_soft_td_t *p;
   1813    1.1  augustss 
   1814  1.223    bouyer 	/*
   1815  1.223    bouyer 	 * to avoid race condition with the controller which may be looking
   1816  1.223    bouyer 	 * at this chain, we need to first invalidate all links, and
   1817  1.223    bouyer 	 * then wait for the controller to move to another queue
   1818  1.223    bouyer 	 */
   1819  1.223    bouyer 	for (p = std; p != stdend; p = p->link.std) {
   1820  1.223    bouyer 		usb_syncmem(&p->dma,
   1821  1.223    bouyer 		    p->offs + offsetof(uhci_td_t, td_link),
   1822  1.223    bouyer 		    sizeof(p->td.td_link),
   1823  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1824  1.223    bouyer 		if ((p->td.td_link & UHCI_PTR_T) == 0) {
   1825  1.223    bouyer 			p->td.td_link = UHCI_PTR_T;
   1826  1.223    bouyer 			usb_syncmem(&p->dma,
   1827  1.223    bouyer 			    p->offs + offsetof(uhci_td_t, td_link),
   1828  1.223    bouyer 			    sizeof(p->td.td_link),
   1829  1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1830  1.223    bouyer 		}
   1831  1.223    bouyer 	}
   1832  1.223    bouyer 	delay(UHCI_QH_REMOVE_DELAY);
   1833  1.223    bouyer 
   1834    1.1  augustss 	for (; std != stdend; std = p) {
   1835   1.42  augustss 		p = std->link.std;
   1836    1.1  augustss 		uhci_free_std(sc, std);
   1837    1.1  augustss 	}
   1838    1.1  augustss }
   1839    1.1  augustss 
   1840    1.1  augustss usbd_status
   1841  1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1842  1.119  augustss 		     int rd, u_int16_t flags, usb_dma_t *dma,
   1843  1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1844    1.1  augustss {
   1845    1.1  augustss 	uhci_soft_td_t *p, *lastp;
   1846    1.1  augustss 	uhci_physaddr_t lastlink;
   1847    1.1  augustss 	int i, ntd, l, tog, maxp;
   1848   1.18  augustss 	u_int32_t status;
   1849    1.1  augustss 	int addr = upipe->pipe.device->address;
   1850    1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1851    1.1  augustss 
   1852  1.144  augustss 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1853  1.152  augustss 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1854  1.144  augustss 		      upipe->pipe.device->speed, flags));
   1855    1.4  augustss 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1856    1.1  augustss 	if (maxp == 0) {
   1857    1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1858    1.1  augustss 		return (USBD_INVAL);
   1859    1.1  augustss 	}
   1860    1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1861   1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1862   1.73  augustss 		ntd++;
   1863   1.39  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1864   1.73  augustss 	if (ntd == 0) {
   1865   1.73  augustss 		*sp = *ep = 0;
   1866   1.73  augustss 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1867   1.73  augustss 		return (USBD_NORMAL_COMPLETION);
   1868   1.73  augustss 	}
   1869   1.38  augustss 	tog = upipe->nexttoggle;
   1870    1.1  augustss 	if (ntd % 2 == 0)
   1871    1.1  augustss 		tog ^= 1;
   1872   1.32  augustss 	upipe->nexttoggle = tog ^ 1;
   1873  1.121  augustss 	lastp = NULL;
   1874    1.1  augustss 	lastlink = UHCI_PTR_T;
   1875    1.1  augustss 	ntd--;
   1876   1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1877  1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   1878   1.18  augustss 		status |= UHCI_TD_LS;
   1879   1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   1880   1.18  augustss 		status |= UHCI_TD_SPD;
   1881  1.223    bouyer 	usb_syncmem(dma, 0, len,
   1882  1.223    bouyer 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1883    1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1884    1.1  augustss 		p = uhci_alloc_std(sc);
   1885   1.63  augustss 		if (p == NULL) {
   1886  1.202  christos 			KASSERT(lastp != NULL);
   1887  1.149  augustss 			uhci_free_std_chain(sc, lastp, NULL);
   1888    1.1  augustss 			return (USBD_NOMEM);
   1889    1.1  augustss 		}
   1890   1.42  augustss 		p->link.std = lastp;
   1891  1.121  augustss 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1892    1.1  augustss 		lastp = p;
   1893    1.1  augustss 		lastlink = p->physaddr;
   1894   1.88   tsutsui 		p->td.td_status = htole32(status);
   1895    1.1  augustss 		if (i == ntd) {
   1896    1.1  augustss 			/* last TD */
   1897    1.1  augustss 			l = len % maxp;
   1898   1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1899   1.73  augustss 				l = maxp;
   1900    1.1  augustss 			*ep = p;
   1901    1.1  augustss 		} else
   1902    1.1  augustss 			l = maxp;
   1903  1.152  augustss 		p->td.td_token =
   1904   1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1905   1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1906  1.160  augustss 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1907  1.223    bouyer 		usb_syncmem(&p->dma, p->offs, sizeof(p->td),
   1908  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1909    1.1  augustss 		tog ^= 1;
   1910    1.1  augustss 	}
   1911    1.1  augustss 	*sp = lastp;
   1912  1.152  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1913   1.38  augustss 		      upipe->nexttoggle));
   1914    1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1915    1.1  augustss }
   1916    1.1  augustss 
   1917   1.38  augustss void
   1918  1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1919   1.38  augustss {
   1920   1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1921   1.38  augustss 	upipe->nexttoggle = 0;
   1922   1.38  augustss }
   1923   1.38  augustss 
   1924   1.38  augustss void
   1925  1.205  christos uhci_noop(usbd_pipe_handle pipe)
   1926   1.38  augustss {
   1927   1.38  augustss }
   1928   1.38  augustss 
   1929    1.1  augustss usbd_status
   1930  1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   1931    1.1  augustss {
   1932   1.63  augustss 	usbd_status err;
   1933   1.16  augustss 
   1934   1.52  augustss 	/* Insert last in queue. */
   1935   1.63  augustss 	err = usb_insert_transfer(xfer);
   1936   1.63  augustss 	if (err)
   1937   1.63  augustss 		return (err);
   1938   1.52  augustss 
   1939  1.152  augustss 	/*
   1940   1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1941   1.92  augustss 	 * so start it first.
   1942   1.67  augustss 	 */
   1943   1.63  augustss 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1944   1.16  augustss }
   1945   1.16  augustss 
   1946   1.16  augustss usbd_status
   1947  1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   1948   1.16  augustss {
   1949   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1950    1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   1951  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   1952   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   1953   1.55  augustss 	uhci_soft_td_t *data, *dataend;
   1954    1.1  augustss 	uhci_soft_qh_t *sqh;
   1955   1.63  augustss 	usbd_status err;
   1956   1.45  augustss 	int len, isread, endpt;
   1957    1.1  augustss 	int s;
   1958    1.1  augustss 
   1959  1.169  augustss 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
   1960  1.169  augustss 		     xfer, xfer->length, xfer->flags, ii));
   1961    1.1  augustss 
   1962   1.82  augustss 	if (sc->sc_dying)
   1963   1.82  augustss 		return (USBD_IOERROR);
   1964   1.82  augustss 
   1965   1.48  augustss #ifdef DIAGNOSTIC
   1966   1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   1967  1.163    provos 		panic("uhci_device_bulk_transfer: a request");
   1968   1.48  augustss #endif
   1969    1.1  augustss 
   1970   1.63  augustss 	len = xfer->length;
   1971  1.102  augustss 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1972   1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   1973    1.1  augustss 	sqh = upipe->u.bulk.sqh;
   1974    1.1  augustss 
   1975    1.1  augustss 	upipe->u.bulk.isread = isread;
   1976    1.1  augustss 	upipe->u.bulk.length = len;
   1977    1.1  augustss 
   1978   1.73  augustss 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   1979   1.73  augustss 				   &xfer->dmabuf, &data, &dataend);
   1980   1.63  augustss 	if (err)
   1981   1.63  augustss 		return (err);
   1982   1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   1983  1.223    bouyer 	usb_syncmem(&dataend->dma,
   1984  1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   1985  1.223    bouyer 	    sizeof(dataend->td.td_status),
   1986  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1987  1.223    bouyer 
   1988    1.1  augustss 
   1989   1.59  augustss #ifdef UHCI_DEBUG
   1990   1.33  augustss 	if (uhcidebug > 8) {
   1991   1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   1992   1.55  augustss 		uhci_dump_tds(data);
   1993    1.1  augustss 	}
   1994    1.1  augustss #endif
   1995    1.1  augustss 
   1996    1.1  augustss 	/* Set up interrupt info. */
   1997   1.63  augustss 	ii->xfer = xfer;
   1998   1.55  augustss 	ii->stdstart = data;
   1999   1.55  augustss 	ii->stdend = dataend;
   2000    1.7  augustss #ifdef DIAGNOSTIC
   2001   1.70  augustss 	if (!ii->isdone) {
   2002   1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   2003   1.70  augustss 	}
   2004    1.7  augustss 	ii->isdone = 0;
   2005    1.7  augustss #endif
   2006    1.1  augustss 
   2007   1.55  augustss 	sqh->elink = data;
   2008  1.121  augustss 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2009  1.223    bouyer 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2010    1.1  augustss 
   2011    1.1  augustss 	s = splusb();
   2012    1.1  augustss 	uhci_add_bulk(sc, sqh);
   2013   1.92  augustss 	uhci_add_intr_info(sc, ii);
   2014    1.1  augustss 
   2015   1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2016  1.234    dyoung 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   2017   1.91  augustss 			    uhci_timeout, ii);
   2018   1.13  augustss 	}
   2019   1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2020    1.1  augustss 	splx(s);
   2021    1.1  augustss 
   2022   1.59  augustss #ifdef UHCI_DEBUG
   2023    1.1  augustss 	if (uhcidebug > 10) {
   2024   1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   2025   1.55  augustss 		uhci_dump_tds(data);
   2026    1.1  augustss 	}
   2027    1.1  augustss #endif
   2028    1.1  augustss 
   2029   1.26  augustss 	if (sc->sc_bus.use_polling)
   2030   1.63  augustss 		uhci_waitintr(sc, xfer);
   2031   1.26  augustss 
   2032    1.1  augustss 	return (USBD_IN_PROGRESS);
   2033    1.1  augustss }
   2034    1.1  augustss 
   2035    1.1  augustss /* Abort a device bulk request. */
   2036    1.1  augustss void
   2037  1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   2038    1.1  augustss {
   2039   1.33  augustss 	DPRINTF(("uhci_device_bulk_abort:\n"));
   2040   1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2041   1.33  augustss }
   2042   1.33  augustss 
   2043   1.92  augustss /*
   2044  1.154  augustss  * Abort a device request.
   2045  1.154  augustss  * If this routine is called at splusb() it guarantees that the request
   2046  1.154  augustss  * will be removed from the hardware scheduling and that the callback
   2047  1.154  augustss  * for it will be called with USBD_CANCELLED status.
   2048  1.154  augustss  * It's impossible to guarantee that the requested transfer will not
   2049  1.154  augustss  * have happened since the hardware runs concurrently.
   2050  1.154  augustss  * If the transaction has already happened we rely on the ordinary
   2051  1.154  augustss  * interrupt processing to process it.
   2052   1.92  augustss  */
   2053   1.33  augustss void
   2054  1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2055   1.33  augustss {
   2056   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2057  1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2058  1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2059   1.33  augustss 	uhci_soft_td_t *std;
   2060   1.92  augustss 	int s;
   2061  1.188  augustss 	int wake;
   2062   1.65  augustss 
   2063  1.106  augustss 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   2064   1.33  augustss 
   2065  1.153  augustss 	if (sc->sc_dying) {
   2066  1.153  augustss 		/* If we're dying, just do the software part. */
   2067  1.153  augustss 		s = splusb();
   2068  1.153  augustss 		xfer->status = status;	/* make software ignore it */
   2069  1.234    dyoung 		callout_stop(&xfer->timeout_handle);
   2070  1.153  augustss 		usb_transfer_complete(xfer);
   2071   1.92  augustss 		splx(s);
   2072  1.194  christos 		return;
   2073   1.92  augustss 	}
   2074   1.92  augustss 
   2075  1.247       mrg 	if (cpu_intr_p() || cpu_softintr_p())
   2076  1.163    provos 		panic("uhci_abort_xfer: not in process context");
   2077  1.153  augustss 
   2078  1.153  augustss 	/*
   2079  1.188  augustss 	 * If an abort is already in progress then just wait for it to
   2080  1.188  augustss 	 * complete and return.
   2081  1.188  augustss 	 */
   2082  1.188  augustss 	if (xfer->hcflags & UXFER_ABORTING) {
   2083  1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
   2084  1.188  augustss #ifdef DIAGNOSTIC
   2085  1.188  augustss 		if (status == USBD_TIMEOUT)
   2086  1.188  augustss 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2087  1.188  augustss #endif
   2088  1.188  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2089  1.188  augustss 		xfer->status = status;
   2090  1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
   2091  1.188  augustss 		xfer->hcflags |= UXFER_ABORTWAIT;
   2092  1.188  augustss 		while (xfer->hcflags & UXFER_ABORTING)
   2093  1.188  augustss 			tsleep(&xfer->hcflags, PZERO, "uhciaw", 0);
   2094  1.188  augustss 		return;
   2095  1.188  augustss 	}
   2096  1.188  augustss 	xfer->hcflags |= UXFER_ABORTING;
   2097  1.188  augustss 
   2098  1.188  augustss 	/*
   2099  1.153  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2100  1.153  augustss 	 */
   2101  1.153  augustss 	s = splusb();
   2102  1.153  augustss 	xfer->status = status;	/* make software ignore it */
   2103  1.234    dyoung 	callout_stop(&xfer->timeout_handle);
   2104  1.153  augustss 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   2105  1.223    bouyer 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   2106  1.223    bouyer 		usb_syncmem(&std->dma,
   2107  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2108  1.223    bouyer 		    sizeof(std->td.td_status),
   2109  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2110   1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2111  1.223    bouyer 		usb_syncmem(&std->dma,
   2112  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2113  1.223    bouyer 		    sizeof(std->td.td_status),
   2114  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2115  1.223    bouyer 	}
   2116  1.153  augustss 	splx(s);
   2117   1.92  augustss 
   2118  1.162  augustss 	/*
   2119  1.153  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2120  1.153  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2121  1.153  augustss 	 * has run.
   2122  1.153  augustss 	 */
   2123  1.154  augustss 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
   2124  1.153  augustss 	s = splusb();
   2125  1.153  augustss 	sc->sc_softwake = 1;
   2126  1.153  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2127  1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
   2128  1.153  augustss 	tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
   2129  1.153  augustss 	splx(s);
   2130  1.162  augustss 
   2131  1.153  augustss 	/*
   2132  1.153  augustss 	 * Step 3: Execute callback.
   2133  1.153  augustss 	 */
   2134  1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   2135   1.92  augustss 	s = splusb();
   2136  1.100  augustss #ifdef DIAGNOSTIC
   2137  1.106  augustss 	ii->isdone = 1;
   2138  1.100  augustss #endif
   2139  1.188  augustss 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2140  1.188  augustss 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2141  1.106  augustss 	usb_transfer_complete(xfer);
   2142  1.188  augustss 	if (wake)
   2143  1.188  augustss 		wakeup(&xfer->hcflags);
   2144   1.33  augustss 	splx(s);
   2145    1.1  augustss }
   2146    1.1  augustss 
   2147    1.1  augustss /* Close a device bulk pipe. */
   2148    1.1  augustss void
   2149  1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   2150    1.1  augustss {
   2151    1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2152    1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2153  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2154    1.1  augustss 
   2155    1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2156  1.236  drochner 
   2157  1.236  drochner 	pipe->endpoint->datatoggle = upipe->nexttoggle;
   2158    1.1  augustss }
   2159    1.1  augustss 
   2160    1.1  augustss usbd_status
   2161  1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2162    1.1  augustss {
   2163   1.63  augustss 	usbd_status err;
   2164   1.16  augustss 
   2165   1.52  augustss 	/* Insert last in queue. */
   2166   1.63  augustss 	err = usb_insert_transfer(xfer);
   2167   1.63  augustss 	if (err)
   2168   1.63  augustss 		return (err);
   2169   1.52  augustss 
   2170  1.152  augustss 	/*
   2171   1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2172   1.92  augustss 	 * so start it first.
   2173   1.67  augustss 	 */
   2174   1.63  augustss 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2175   1.16  augustss }
   2176   1.16  augustss 
   2177   1.16  augustss usbd_status
   2178  1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2179   1.16  augustss {
   2180  1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2181   1.63  augustss 	usbd_status err;
   2182    1.1  augustss 
   2183   1.82  augustss 	if (sc->sc_dying)
   2184   1.82  augustss 		return (USBD_IOERROR);
   2185   1.82  augustss 
   2186   1.48  augustss #ifdef DIAGNOSTIC
   2187   1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2188  1.163    provos 		panic("uhci_device_ctrl_transfer: not a request");
   2189   1.48  augustss #endif
   2190    1.1  augustss 
   2191   1.63  augustss 	err = uhci_device_request(xfer);
   2192   1.63  augustss 	if (err)
   2193   1.63  augustss 		return (err);
   2194    1.1  augustss 
   2195    1.9  augustss 	if (sc->sc_bus.use_polling)
   2196   1.63  augustss 		uhci_waitintr(sc, xfer);
   2197    1.1  augustss 	return (USBD_IN_PROGRESS);
   2198    1.1  augustss }
   2199    1.1  augustss 
   2200    1.1  augustss usbd_status
   2201  1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2202    1.1  augustss {
   2203   1.63  augustss 	usbd_status err;
   2204   1.16  augustss 
   2205   1.52  augustss 	/* Insert last in queue. */
   2206   1.63  augustss 	err = usb_insert_transfer(xfer);
   2207   1.63  augustss 	if (err)
   2208   1.63  augustss 		return (err);
   2209   1.52  augustss 
   2210  1.152  augustss 	/*
   2211   1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2212   1.92  augustss 	 * so start it first.
   2213   1.67  augustss 	 */
   2214   1.63  augustss 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2215   1.16  augustss }
   2216   1.16  augustss 
   2217   1.16  augustss usbd_status
   2218  1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2219   1.16  augustss {
   2220   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2221    1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2222  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2223   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2224   1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2225    1.1  augustss 	uhci_soft_qh_t *sqh;
   2226   1.63  augustss 	usbd_status err;
   2227  1.187     skrll 	int isread, endpt;
   2228   1.49  augustss 	int i, s;
   2229    1.1  augustss 
   2230   1.82  augustss 	if (sc->sc_dying)
   2231   1.82  augustss 		return (USBD_IOERROR);
   2232   1.82  augustss 
   2233   1.63  augustss 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2234   1.63  augustss 		    xfer, xfer->length, xfer->flags));
   2235    1.1  augustss 
   2236   1.48  augustss #ifdef DIAGNOSTIC
   2237   1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2238  1.163    provos 		panic("uhci_device_intr_transfer: a request");
   2239   1.48  augustss #endif
   2240    1.1  augustss 
   2241  1.187     skrll 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2242  1.187     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2243  1.187     skrll 
   2244  1.187     skrll 	upipe->u.intr.isread = isread;
   2245  1.187     skrll 
   2246  1.187     skrll 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
   2247  1.187     skrll 				   xfer->flags, &xfer->dmabuf, &data,
   2248  1.187     skrll 				   &dataend);
   2249   1.63  augustss 	if (err)
   2250   1.63  augustss 		return (err);
   2251   1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2252  1.223    bouyer 	usb_syncmem(&dataend->dma,
   2253  1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2254  1.223    bouyer 	    sizeof(dataend->td.td_status),
   2255  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2256    1.1  augustss 
   2257   1.59  augustss #ifdef UHCI_DEBUG
   2258    1.1  augustss 	if (uhcidebug > 10) {
   2259   1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2260   1.55  augustss 		uhci_dump_tds(data);
   2261    1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2262    1.1  augustss 	}
   2263    1.1  augustss #endif
   2264    1.1  augustss 
   2265    1.1  augustss 	s = splusb();
   2266    1.1  augustss 	/* Set up interrupt info. */
   2267   1.63  augustss 	ii->xfer = xfer;
   2268   1.55  augustss 	ii->stdstart = data;
   2269   1.55  augustss 	ii->stdend = dataend;
   2270    1.7  augustss #ifdef DIAGNOSTIC
   2271   1.70  augustss 	if (!ii->isdone) {
   2272   1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2273   1.70  augustss 	}
   2274    1.7  augustss 	ii->isdone = 0;
   2275    1.7  augustss #endif
   2276    1.1  augustss 
   2277  1.152  augustss 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2278   1.12  augustss 		     upipe->u.intr.qhs[0]));
   2279    1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2280    1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2281   1.55  augustss 		sqh->elink = data;
   2282  1.121  augustss 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2283  1.223    bouyer 		usb_syncmem(&sqh->dma,
   2284  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2285  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2286  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2287    1.1  augustss 	}
   2288   1.92  augustss 	uhci_add_intr_info(sc, ii);
   2289   1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2290    1.1  augustss 	splx(s);
   2291    1.1  augustss 
   2292   1.59  augustss #ifdef UHCI_DEBUG
   2293    1.1  augustss 	if (uhcidebug > 10) {
   2294   1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2295   1.55  augustss 		uhci_dump_tds(data);
   2296    1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2297    1.1  augustss 	}
   2298    1.1  augustss #endif
   2299    1.1  augustss 
   2300    1.1  augustss 	return (USBD_IN_PROGRESS);
   2301    1.1  augustss }
   2302    1.1  augustss 
   2303    1.1  augustss /* Abort a device control request. */
   2304    1.1  augustss void
   2305  1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2306    1.1  augustss {
   2307   1.33  augustss 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2308   1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2309    1.1  augustss }
   2310    1.1  augustss 
   2311    1.1  augustss /* Close a device control pipe. */
   2312    1.1  augustss void
   2313  1.205  christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2314    1.1  augustss {
   2315    1.1  augustss }
   2316    1.1  augustss 
   2317    1.1  augustss /* Abort a device interrupt request. */
   2318    1.1  augustss void
   2319  1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2320    1.1  augustss {
   2321   1.63  augustss 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2322   1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2323   1.36  augustss 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2324  1.154  augustss 		xfer->pipe->intrxfer = NULL;
   2325    1.1  augustss 	}
   2326   1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2327    1.1  augustss }
   2328    1.1  augustss 
   2329    1.1  augustss /* Close a device interrupt pipe. */
   2330    1.1  augustss void
   2331  1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2332    1.1  augustss {
   2333    1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2334  1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   2335   1.92  augustss 	int i, npoll;
   2336   1.92  augustss 	int s;
   2337    1.1  augustss 
   2338    1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2339    1.1  augustss 	npoll = upipe->u.intr.npoll;
   2340   1.92  augustss 	s = splusb();
   2341    1.1  augustss 	for (i = 0; i < npoll; i++)
   2342   1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2343   1.92  augustss 	splx(s);
   2344    1.1  augustss 
   2345  1.152  augustss 	/*
   2346    1.1  augustss 	 * We now have to wait for any activity on the physical
   2347    1.1  augustss 	 * descriptors to stop.
   2348    1.1  augustss 	 */
   2349   1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2);
   2350    1.1  augustss 
   2351    1.1  augustss 	for(i = 0; i < npoll; i++)
   2352    1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2353   1.31  augustss 	free(upipe->u.intr.qhs, M_USBHC);
   2354    1.1  augustss 
   2355    1.1  augustss 	/* XXX free other resources */
   2356    1.1  augustss }
   2357    1.1  augustss 
   2358    1.1  augustss usbd_status
   2359  1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2360    1.1  augustss {
   2361   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2362   1.63  augustss 	usb_device_request_t *req = &xfer->request;
   2363    1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2364  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2365    1.1  augustss 	int addr = dev->address;
   2366    1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2367   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2368   1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2369    1.1  augustss 	uhci_soft_qh_t *sqh;
   2370    1.1  augustss 	int len;
   2371    1.1  augustss 	u_int32_t ls;
   2372   1.63  augustss 	usbd_status err;
   2373    1.1  augustss 	int isread;
   2374    1.1  augustss 	int s;
   2375    1.1  augustss 
   2376   1.13  augustss 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2377   1.12  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2378    1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2379    1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   2380    1.1  augustss 		    addr, endpt));
   2381    1.1  augustss 
   2382  1.144  augustss 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2383    1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2384    1.1  augustss 	len = UGETW(req->wLength);
   2385    1.1  augustss 
   2386    1.1  augustss 	setup = upipe->u.ctl.setup;
   2387    1.1  augustss 	stat = upipe->u.ctl.stat;
   2388    1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2389    1.1  augustss 
   2390    1.1  augustss 	/* Set up data transaction */
   2391    1.1  augustss 	if (len != 0) {
   2392   1.38  augustss 		upipe->nexttoggle = 1;
   2393   1.73  augustss 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2394   1.73  augustss 					   &xfer->dmabuf, &data, &dataend);
   2395   1.63  augustss 		if (err)
   2396   1.63  augustss 			return (err);
   2397   1.55  augustss 		next = data;
   2398   1.55  augustss 		dataend->link.std = stat;
   2399  1.121  augustss 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2400  1.223    bouyer 		usb_syncmem(&dataend->dma,
   2401  1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2402  1.223    bouyer 		    sizeof(dataend->td.td_link),
   2403  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2404    1.1  augustss 	} else {
   2405    1.1  augustss 		next = stat;
   2406    1.1  augustss 	}
   2407    1.1  augustss 	upipe->u.ctl.length = len;
   2408    1.1  augustss 
   2409  1.159  augustss 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2410  1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   2411    1.1  augustss 
   2412   1.42  augustss 	setup->link.std = next;
   2413  1.121  augustss 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2414   1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2415   1.88   tsutsui 		UHCI_TD_ACTIVE);
   2416   1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2417  1.160  augustss 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2418  1.223    bouyer 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2419  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2420   1.42  augustss 
   2421   1.92  augustss 	stat->link.std = NULL;
   2422   1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2423  1.152  augustss 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2424   1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2425  1.152  augustss 	stat->td.td_token =
   2426   1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2427   1.88   tsutsui 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2428   1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2429  1.223    bouyer 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2430  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2431    1.1  augustss 
   2432   1.59  augustss #ifdef UHCI_DEBUG
   2433   1.67  augustss 	if (uhcidebug > 10) {
   2434   1.47  augustss 		DPRINTF(("uhci_device_request: before transfer\n"));
   2435   1.41  augustss 		uhci_dump_tds(setup);
   2436    1.1  augustss 	}
   2437    1.1  augustss #endif
   2438    1.1  augustss 
   2439    1.1  augustss 	/* Set up interrupt info. */
   2440   1.63  augustss 	ii->xfer = xfer;
   2441    1.1  augustss 	ii->stdstart = setup;
   2442    1.1  augustss 	ii->stdend = stat;
   2443    1.7  augustss #ifdef DIAGNOSTIC
   2444   1.70  augustss 	if (!ii->isdone) {
   2445   1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2446   1.70  augustss 	}
   2447    1.7  augustss 	ii->isdone = 0;
   2448    1.7  augustss #endif
   2449    1.1  augustss 
   2450   1.42  augustss 	sqh->elink = setup;
   2451  1.121  augustss 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2452  1.223    bouyer 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2453    1.1  augustss 
   2454    1.1  augustss 	s = splusb();
   2455  1.144  augustss 	if (dev->speed == USB_SPEED_LOW)
   2456  1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2457  1.123  augustss 	else
   2458  1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2459   1.92  augustss 	uhci_add_intr_info(sc, ii);
   2460   1.59  augustss #ifdef UHCI_DEBUG
   2461    1.1  augustss 	if (uhcidebug > 12) {
   2462    1.1  augustss 		uhci_soft_td_t *std;
   2463    1.1  augustss 		uhci_soft_qh_t *xqh;
   2464   1.13  augustss 		uhci_soft_qh_t *sxqh;
   2465   1.13  augustss 		int maxqh = 0;
   2466    1.1  augustss 		uhci_physaddr_t link;
   2467   1.47  augustss 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2468    1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2469  1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2470   1.42  augustss 		     std = std->link.std) {
   2471   1.88   tsutsui 			link = le32toh(std->td.td_link);
   2472    1.1  augustss 			uhci_dump_td(std);
   2473    1.1  augustss 		}
   2474   1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2475   1.67  augustss 		uhci_dump_qh(sxqh);
   2476   1.67  augustss 		for (xqh = sxqh;
   2477   1.63  augustss 		     xqh != NULL;
   2478  1.152  augustss 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2479  1.121  augustss                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2480    1.1  augustss 			uhci_dump_qh(xqh);
   2481   1.13  augustss 		}
   2482   1.47  augustss 		DPRINTF(("Enqueued QH:\n"));
   2483    1.1  augustss 		uhci_dump_qh(sqh);
   2484   1.42  augustss 		uhci_dump_tds(sqh->elink);
   2485    1.1  augustss 	}
   2486    1.1  augustss #endif
   2487   1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2488  1.234    dyoung 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   2489   1.91  augustss 			    uhci_timeout, ii);
   2490   1.13  augustss 	}
   2491   1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2492    1.1  augustss 	splx(s);
   2493    1.1  augustss 
   2494    1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2495    1.1  augustss }
   2496    1.1  augustss 
   2497   1.16  augustss usbd_status
   2498  1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2499   1.16  augustss {
   2500   1.63  augustss 	usbd_status err;
   2501   1.48  augustss 
   2502   1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2503   1.48  augustss 
   2504   1.48  augustss 	/* Put it on our queue, */
   2505   1.63  augustss 	err = usb_insert_transfer(xfer);
   2506   1.48  augustss 
   2507   1.48  augustss 	/* bail out on error, */
   2508   1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2509   1.63  augustss 		return (err);
   2510   1.48  augustss 
   2511   1.48  augustss 	/* XXX should check inuse here */
   2512   1.48  augustss 
   2513   1.48  augustss 	/* insert into schedule, */
   2514   1.63  augustss 	uhci_device_isoc_enter(xfer);
   2515   1.48  augustss 
   2516  1.102  augustss 	/* and start if the pipe wasn't running */
   2517   1.67  augustss 	if (!err)
   2518   1.63  augustss 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2519   1.48  augustss 
   2520   1.63  augustss 	return (err);
   2521   1.48  augustss }
   2522   1.48  augustss 
   2523   1.48  augustss void
   2524  1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2525   1.48  augustss {
   2526   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2527   1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2528  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2529   1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2530  1.152  augustss 	uhci_soft_td_t *std;
   2531  1.223    bouyer 	u_int32_t buf, len, status, offs;
   2532   1.48  augustss 	int s, i, next, nframes;
   2533  1.223    bouyer 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2534   1.48  augustss 
   2535   1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2536   1.48  augustss 		    "nframes=%d\n",
   2537   1.63  augustss 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2538   1.48  augustss 
   2539   1.82  augustss 	if (sc->sc_dying)
   2540   1.82  augustss 		return;
   2541   1.82  augustss 
   2542   1.63  augustss 	if (xfer->status == USBD_IN_PROGRESS) {
   2543   1.48  augustss 		/* This request has already been entered into the frame list */
   2544   1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2545   1.68  augustss 		/* XXX */
   2546   1.48  augustss 	}
   2547   1.48  augustss 
   2548   1.48  augustss #ifdef DIAGNOSTIC
   2549   1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2550   1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   2551   1.19  augustss #endif
   2552   1.16  augustss 
   2553   1.48  augustss 	next = iso->next;
   2554   1.48  augustss 	if (next == -1) {
   2555   1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   2556   1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2557   1.48  augustss 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2558   1.48  augustss 	}
   2559   1.48  augustss 
   2560   1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   2561   1.92  augustss 	UXFER(xfer)->curframe = next;
   2562   1.48  augustss 
   2563  1.160  augustss 	buf = DMAADDR(&xfer->dmabuf, 0);
   2564  1.223    bouyer 	offs = 0;
   2565   1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2566   1.88   tsutsui 				     UHCI_TD_ACTIVE |
   2567   1.88   tsutsui 				     UHCI_TD_IOS);
   2568   1.63  augustss 	nframes = xfer->nframes;
   2569   1.48  augustss 	s = splusb();
   2570   1.48  augustss 	for (i = 0; i < nframes; i++) {
   2571   1.48  augustss 		std = iso->stds[next];
   2572   1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2573   1.48  augustss 			next = 0;
   2574   1.63  augustss 		len = xfer->frlengths[i];
   2575   1.88   tsutsui 		std->td.td_buffer = htole32(buf);
   2576  1.242  jakllsch 		usb_syncmem(&xfer->dmabuf, offs, len,
   2577  1.223    bouyer 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2578   1.48  augustss 		if (i == nframes - 1)
   2579   1.88   tsutsui 			status |= UHCI_TD_IOC;
   2580   1.88   tsutsui 		std->td.td_status = htole32(status);
   2581   1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2582   1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2583  1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2584  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2585   1.59  augustss #ifdef UHCI_DEBUG
   2586   1.48  augustss 		if (uhcidebug > 5) {
   2587   1.48  augustss 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2588   1.48  augustss 			uhci_dump_td(std);
   2589   1.48  augustss 		}
   2590   1.48  augustss #endif
   2591   1.48  augustss 		buf += len;
   2592  1.223    bouyer 		offs += len;
   2593   1.48  augustss 	}
   2594   1.48  augustss 	iso->next = next;
   2595   1.63  augustss 	iso->inuse += xfer->nframes;
   2596   1.16  augustss 
   2597   1.48  augustss 	splx(s);
   2598   1.16  augustss }
   2599   1.16  augustss 
   2600   1.16  augustss usbd_status
   2601  1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   2602   1.16  augustss {
   2603   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2604  1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2605   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2606   1.48  augustss 	uhci_soft_td_t *end;
   2607   1.48  augustss 	int s, i;
   2608   1.48  augustss 
   2609   1.96  augustss 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2610   1.96  augustss 
   2611   1.82  augustss 	if (sc->sc_dying)
   2612   1.82  augustss 		return (USBD_IOERROR);
   2613   1.82  augustss 
   2614   1.48  augustss #ifdef DIAGNOSTIC
   2615   1.63  augustss 	if (xfer->status != USBD_IN_PROGRESS)
   2616   1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2617   1.48  augustss #endif
   2618   1.48  augustss 
   2619   1.48  augustss 	/* Find the last TD */
   2620   1.92  augustss 	i = UXFER(xfer)->curframe + xfer->nframes;
   2621   1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   2622   1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   2623   1.48  augustss 	end = upipe->u.iso.stds[i];
   2624   1.48  augustss 
   2625   1.96  augustss #ifdef DIAGNOSTIC
   2626   1.96  augustss 	if (end == NULL) {
   2627   1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   2628   1.96  augustss 		return (USBD_INVAL);
   2629   1.96  augustss 	}
   2630   1.96  augustss #endif
   2631   1.96  augustss 
   2632   1.48  augustss 	s = splusb();
   2633  1.152  augustss 
   2634   1.48  augustss 	/* Set up interrupt info. */
   2635   1.63  augustss 	ii->xfer = xfer;
   2636   1.48  augustss 	ii->stdstart = end;
   2637   1.48  augustss 	ii->stdend = end;
   2638   1.48  augustss #ifdef DIAGNOSTIC
   2639  1.102  augustss 	if (!ii->isdone)
   2640   1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2641   1.48  augustss 	ii->isdone = 0;
   2642   1.48  augustss #endif
   2643   1.92  augustss 	uhci_add_intr_info(sc, ii);
   2644  1.152  augustss 
   2645   1.48  augustss 	splx(s);
   2646   1.48  augustss 
   2647   1.48  augustss 	return (USBD_IN_PROGRESS);
   2648   1.16  augustss }
   2649   1.16  augustss 
   2650   1.16  augustss void
   2651  1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2652   1.16  augustss {
   2653   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2654   1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2655   1.48  augustss 	uhci_soft_td_t *std;
   2656   1.92  augustss 	int i, n, s, nframes, maxlen, len;
   2657   1.92  augustss 
   2658   1.92  augustss 	s = splusb();
   2659   1.92  augustss 
   2660   1.92  augustss 	/* Transfer is already done. */
   2661  1.152  augustss 	if (xfer->status != USBD_NOT_STARTED &&
   2662   1.92  augustss 	    xfer->status != USBD_IN_PROGRESS) {
   2663   1.92  augustss 		splx(s);
   2664   1.92  augustss 		return;
   2665   1.92  augustss 	}
   2666   1.48  augustss 
   2667   1.92  augustss 	/* Give xfer the requested abort code. */
   2668   1.63  augustss 	xfer->status = USBD_CANCELLED;
   2669   1.48  augustss 
   2670   1.48  augustss 	/* make hardware ignore it, */
   2671   1.63  augustss 	nframes = xfer->nframes;
   2672   1.92  augustss 	n = UXFER(xfer)->curframe;
   2673   1.92  augustss 	maxlen = 0;
   2674   1.48  augustss 	for (i = 0; i < nframes; i++) {
   2675   1.48  augustss 		std = stds[n];
   2676  1.223    bouyer 		usb_syncmem(&std->dma,
   2677  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2678  1.223    bouyer 		    sizeof(std->td.td_status),
   2679  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2680   1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2681  1.223    bouyer 		usb_syncmem(&std->dma,
   2682  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2683  1.223    bouyer 		    sizeof(std->td.td_status),
   2684  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2685  1.223    bouyer 		usb_syncmem(&std->dma,
   2686  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_token),
   2687  1.223    bouyer 		    sizeof(std->td.td_token),
   2688  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2689  1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2690   1.92  augustss 		if (len > maxlen)
   2691   1.92  augustss 			maxlen = len;
   2692   1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2693   1.48  augustss 			n = 0;
   2694   1.48  augustss 	}
   2695   1.48  augustss 
   2696   1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   2697   1.92  augustss 	delay(maxlen);
   2698   1.92  augustss 
   2699   1.96  augustss #ifdef DIAGNOSTIC
   2700   1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   2701   1.96  augustss #endif
   2702   1.92  augustss 	/* Run callback and remove from interrupt list. */
   2703   1.92  augustss 	usb_transfer_complete(xfer);
   2704   1.48  augustss 
   2705   1.92  augustss 	splx(s);
   2706   1.16  augustss }
   2707   1.16  augustss 
   2708   1.16  augustss void
   2709  1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   2710   1.16  augustss {
   2711   1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2712   1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2713  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2714   1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2715   1.16  augustss 	struct iso *iso;
   2716   1.92  augustss 	int i, s;
   2717   1.16  augustss 
   2718   1.16  augustss 	/*
   2719   1.16  augustss 	 * Make sure all TDs are marked as inactive.
   2720   1.16  augustss 	 * Wait for completion.
   2721   1.16  augustss 	 * Unschedule.
   2722   1.16  augustss 	 * Deallocate.
   2723   1.16  augustss 	 */
   2724   1.16  augustss 	iso = &upipe->u.iso;
   2725   1.16  augustss 
   2726  1.223    bouyer 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2727  1.223    bouyer 		std = iso->stds[i];
   2728  1.223    bouyer 		usb_syncmem(&std->dma,
   2729  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2730  1.223    bouyer 		    sizeof(std->td.td_status),
   2731  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2732  1.223    bouyer 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2733  1.223    bouyer 		usb_syncmem(&std->dma,
   2734  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2735  1.223    bouyer 		    sizeof(std->td.td_status),
   2736  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2737  1.223    bouyer 	}
   2738   1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
   2739   1.16  augustss 
   2740   1.92  augustss 	s = splusb();
   2741   1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2742   1.16  augustss 		std = iso->stds[i];
   2743   1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   2744   1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   2745   1.42  augustss 		     vstd = vstd->link.std)
   2746   1.16  augustss 			;
   2747   1.67  augustss 		if (vstd == NULL) {
   2748   1.16  augustss 			/*panic*/
   2749   1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   2750   1.92  augustss 			splx(s);
   2751   1.16  augustss 			return;
   2752   1.16  augustss 		}
   2753   1.42  augustss 		vstd->link = std->link;
   2754  1.223    bouyer 		usb_syncmem(&std->dma,
   2755  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2756  1.223    bouyer 		    sizeof(std->td.td_link),
   2757  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2758   1.42  augustss 		vstd->td.td_link = std->td.td_link;
   2759  1.223    bouyer 		usb_syncmem(&vstd->dma,
   2760  1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2761  1.223    bouyer 		    sizeof(vstd->td.td_link),
   2762  1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2763   1.16  augustss 		uhci_free_std(sc, std);
   2764   1.16  augustss 	}
   2765   1.92  augustss 	splx(s);
   2766   1.16  augustss 
   2767   1.31  augustss 	free(iso->stds, M_USBHC);
   2768   1.16  augustss }
   2769   1.16  augustss 
   2770   1.16  augustss usbd_status
   2771  1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   2772   1.16  augustss {
   2773   1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2774   1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2775  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2776   1.16  augustss 	int addr = upipe->pipe.device->address;
   2777   1.16  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2778   1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2779   1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2780   1.48  augustss 	u_int32_t token;
   2781   1.16  augustss 	struct iso *iso;
   2782   1.92  augustss 	int i, s;
   2783   1.16  augustss 
   2784   1.16  augustss 	iso = &upipe->u.iso;
   2785   1.16  augustss 	iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
   2786   1.31  augustss 			   M_USBHC, M_WAITOK);
   2787   1.16  augustss 
   2788   1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2789   1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2790   1.16  augustss 
   2791   1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   2792   1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2793   1.48  augustss 		std = uhci_alloc_std(sc);
   2794   1.48  augustss 		if (std == 0)
   2795   1.48  augustss 			goto bad;
   2796   1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2797   1.88   tsutsui 		std->td.td_token = htole32(token);
   2798  1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2799  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2800   1.48  augustss 		iso->stds[i] = std;
   2801   1.16  augustss 	}
   2802   1.16  augustss 
   2803   1.48  augustss 	/* Insert TDs into schedule. */
   2804   1.92  augustss 	s = splusb();
   2805   1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2806   1.16  augustss 		std = iso->stds[i];
   2807   1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   2808  1.223    bouyer 		usb_syncmem(&vstd->dma,
   2809  1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2810  1.223    bouyer 		    sizeof(vstd->td.td_link),
   2811  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2812   1.42  augustss 		std->link = vstd->link;
   2813   1.42  augustss 		std->td.td_link = vstd->td.td_link;
   2814  1.223    bouyer 		usb_syncmem(&std->dma,
   2815  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2816  1.223    bouyer 		    sizeof(std->td.td_link),
   2817  1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2818   1.42  augustss 		vstd->link.std = std;
   2819  1.121  augustss 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2820  1.223    bouyer 		usb_syncmem(&vstd->dma,
   2821  1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2822  1.223    bouyer 		    sizeof(vstd->td.td_link),
   2823  1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2824   1.16  augustss 	}
   2825   1.92  augustss 	splx(s);
   2826   1.16  augustss 
   2827   1.48  augustss 	iso->next = -1;
   2828   1.48  augustss 	iso->inuse = 0;
   2829   1.48  augustss 
   2830   1.16  augustss 	return (USBD_NORMAL_COMPLETION);
   2831   1.16  augustss 
   2832   1.48  augustss  bad:
   2833   1.16  augustss 	while (--i >= 0)
   2834   1.16  augustss 		uhci_free_std(sc, iso->stds[i]);
   2835   1.31  augustss 	free(iso->stds, M_USBHC);
   2836   1.16  augustss 	return (USBD_NOMEM);
   2837   1.16  augustss }
   2838   1.16  augustss 
   2839   1.16  augustss void
   2840  1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   2841   1.16  augustss {
   2842   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2843  1.223    bouyer 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2844  1.223    bouyer 	int i, offs;
   2845  1.223    bouyer 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2846  1.223    bouyer 
   2847   1.48  augustss 
   2848  1.197   gdamore 	DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
   2849  1.197   gdamore 			xfer->actlen, xfer->busy_free));
   2850   1.93  augustss 
   2851   1.96  augustss 	if (ii->xfer != xfer)
   2852   1.96  augustss 		/* Not on interrupt list, ignore it. */
   2853  1.170  augustss 		return;
   2854  1.170  augustss 
   2855  1.170  augustss 	if (!uhci_active_intr_info(ii))
   2856   1.96  augustss 		return;
   2857   1.96  augustss 
   2858   1.93  augustss #ifdef DIAGNOSTIC
   2859   1.93  augustss         if (ii->stdend == NULL) {
   2860   1.93  augustss                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2861   1.93  augustss #ifdef UHCI_DEBUG
   2862   1.93  augustss 		uhci_dump_ii(ii);
   2863   1.93  augustss #endif
   2864   1.93  augustss 		return;
   2865   1.93  augustss 	}
   2866   1.93  augustss #endif
   2867   1.48  augustss 
   2868   1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   2869  1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2870  1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2871  1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2872  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2873   1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2874  1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2875  1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2876  1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2877  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2878   1.48  augustss 
   2879   1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2880  1.223    bouyer 
   2881  1.223    bouyer 	offs = 0;
   2882  1.223    bouyer 	for (i = 0; i < xfer->nframes; i++) {
   2883  1.223    bouyer 		usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i],
   2884  1.223    bouyer 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2885  1.223    bouyer 		offs += xfer->frlengths[i];
   2886  1.223    bouyer 	}
   2887   1.16  augustss }
   2888   1.16  augustss 
   2889    1.1  augustss void
   2890  1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   2891    1.1  augustss {
   2892   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2893    1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2894   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2895    1.1  augustss 	uhci_soft_qh_t *sqh;
   2896  1.223    bouyer 	int i, npoll, isread;
   2897    1.1  augustss 
   2898  1.173      gson 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
   2899    1.1  augustss 
   2900    1.1  augustss 	npoll = upipe->u.intr.npoll;
   2901    1.1  augustss 	for(i = 0; i < npoll; i++) {
   2902    1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2903  1.121  augustss 		sqh->elink = NULL;
   2904   1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2905  1.223    bouyer 		usb_syncmem(&sqh->dma,
   2906  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2907  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2908  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2909    1.1  augustss 	}
   2910  1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2911    1.1  augustss 
   2912  1.223    bouyer 	isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2913  1.242  jakllsch 	usb_syncmem(&xfer->dmabuf, 0, xfer->length,
   2914  1.223    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2915  1.223    bouyer 
   2916    1.1  augustss 	/* XXX Wasteful. */
   2917   1.63  augustss 	if (xfer->pipe->repeat) {
   2918   1.55  augustss 		uhci_soft_td_t *data, *dataend;
   2919    1.1  augustss 
   2920   1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   2921   1.92  augustss 
   2922    1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   2923  1.221  jmcneill 		uhci_alloc_std_chain(upipe, sc, xfer->length,
   2924  1.221  jmcneill 				     upipe->u.intr.isread, xfer->flags,
   2925   1.63  augustss 				     &xfer->dmabuf, &data, &dataend);
   2926   1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2927  1.223    bouyer 		usb_syncmem(&dataend->dma,
   2928  1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_status),
   2929  1.223    bouyer 		    sizeof(dataend->td.td_status),
   2930  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2931    1.1  augustss 
   2932   1.59  augustss #ifdef UHCI_DEBUG
   2933    1.1  augustss 		if (uhcidebug > 10) {
   2934   1.55  augustss 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   2935   1.55  augustss 			uhci_dump_tds(data);
   2936    1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   2937    1.1  augustss 		}
   2938    1.1  augustss #endif
   2939    1.1  augustss 
   2940   1.55  augustss 		ii->stdstart = data;
   2941   1.55  augustss 		ii->stdend = dataend;
   2942    1.7  augustss #ifdef DIAGNOSTIC
   2943   1.70  augustss 		if (!ii->isdone) {
   2944   1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   2945   1.70  augustss 		}
   2946    1.7  augustss 		ii->isdone = 0;
   2947    1.7  augustss #endif
   2948    1.1  augustss 		for (i = 0; i < npoll; i++) {
   2949    1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   2950   1.55  augustss 			sqh->elink = data;
   2951  1.121  augustss 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2952  1.223    bouyer 			usb_syncmem(&sqh->dma,
   2953  1.223    bouyer 			    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2954  1.223    bouyer 			    sizeof(sqh->qh.qh_elink),
   2955  1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2956    1.1  augustss 		}
   2957   1.92  augustss 		xfer->status = USBD_IN_PROGRESS;
   2958   1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   2959    1.1  augustss 	} else {
   2960   1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   2961  1.169  augustss 		if (uhci_active_intr_info(ii))
   2962  1.169  augustss 			uhci_del_intr_info(ii);
   2963    1.1  augustss 	}
   2964    1.1  augustss }
   2965    1.1  augustss 
   2966    1.1  augustss /* Deallocate request data structures */
   2967    1.1  augustss void
   2968  1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   2969    1.1  augustss {
   2970   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2971    1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2972   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2973  1.223    bouyer 	int len = UGETW(xfer->request.wLength);
   2974  1.223    bouyer 	int isread = (xfer->request.bmRequestType & UT_READ);
   2975    1.1  augustss 
   2976    1.7  augustss #ifdef DIAGNOSTIC
   2977   1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2978  1.173      gson 		panic("uhci_device_ctrl_done: not a request");
   2979    1.7  augustss #endif
   2980    1.1  augustss 
   2981  1.169  augustss 	if (!uhci_active_intr_info(ii))
   2982  1.169  augustss 		return;
   2983  1.169  augustss 
   2984   1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2985    1.1  augustss 
   2986  1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   2987  1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   2988  1.123  augustss 	else
   2989  1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   2990    1.1  augustss 
   2991   1.49  augustss 	if (upipe->u.ctl.length != 0)
   2992   1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   2993   1.49  augustss 
   2994  1.223    bouyer 	if (len) {
   2995  1.242  jakllsch 		usb_syncmem(&xfer->dmabuf, 0, len,
   2996  1.223    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2997  1.223    bouyer 	}
   2998  1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0,
   2999  1.223    bouyer 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3000  1.223    bouyer 
   3001  1.173      gson 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
   3002    1.1  augustss }
   3003    1.1  augustss 
   3004    1.1  augustss /* Deallocate request data structures */
   3005    1.1  augustss void
   3006  1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   3007    1.1  augustss {
   3008   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3009    1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3010   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3011  1.169  augustss 
   3012  1.173      gson 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
   3013  1.169  augustss 		    xfer, ii, sc, upipe));
   3014  1.169  augustss 
   3015  1.169  augustss 	if (!uhci_active_intr_info(ii))
   3016  1.169  augustss 		return;
   3017    1.1  augustss 
   3018   1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3019    1.1  augustss 
   3020    1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   3021   1.32  augustss 
   3022  1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3023   1.32  augustss 
   3024  1.173      gson 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
   3025    1.1  augustss }
   3026    1.1  augustss 
   3027    1.1  augustss /* Add interrupt QH, called with vflock. */
   3028    1.1  augustss void
   3029  1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3030    1.1  augustss {
   3031   1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3032   1.42  augustss 	uhci_soft_qh_t *eqh;
   3033    1.1  augustss 
   3034   1.92  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3035   1.92  augustss 
   3036   1.42  augustss 	eqh = vf->eqh;
   3037  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3038  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3039  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   3040   1.42  augustss 	sqh->hlink       = eqh->hlink;
   3041   1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3042  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3043  1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3044  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3045   1.42  augustss 	eqh->hlink       = sqh;
   3046  1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3047  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3048  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3049  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3050    1.1  augustss 	vf->eqh = sqh;
   3051    1.1  augustss 	vf->bandwidth++;
   3052    1.1  augustss }
   3053    1.1  augustss 
   3054  1.119  augustss /* Remove interrupt QH. */
   3055    1.1  augustss void
   3056  1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3057    1.1  augustss {
   3058   1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3059    1.1  augustss 	uhci_soft_qh_t *pqh;
   3060    1.1  augustss 
   3061   1.92  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3062    1.1  augustss 
   3063  1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   3064  1.223    bouyer 
   3065  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3066  1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   3067  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3068  1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3069  1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3070  1.223    bouyer 		usb_syncmem(&sqh->dma,
   3071  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3072  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3073  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3074  1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   3075  1.124  augustss 	}
   3076  1.124  augustss 
   3077   1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3078  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3079  1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3080  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3081   1.42  augustss 	pqh->hlink       = sqh->hlink;
   3082   1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3083  1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3084  1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   3085  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3086  1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   3087    1.1  augustss 	if (vf->eqh == sqh)
   3088    1.1  augustss 		vf->eqh = pqh;
   3089    1.1  augustss 	vf->bandwidth--;
   3090    1.1  augustss }
   3091    1.1  augustss 
   3092    1.1  augustss usbd_status
   3093  1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3094    1.1  augustss {
   3095    1.1  augustss 	uhci_soft_qh_t *sqh;
   3096    1.1  augustss 	int i, npoll, s;
   3097    1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   3098    1.1  augustss 
   3099  1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
   3100    1.1  augustss 	if (ival == 0) {
   3101  1.173      gson 		printf("uhci_device_setintr: 0 interval\n");
   3102    1.1  augustss 		return (USBD_INVAL);
   3103    1.1  augustss 	}
   3104    1.1  augustss 
   3105    1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   3106    1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   3107    1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3108  1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
   3109    1.1  augustss 
   3110    1.1  augustss 	upipe->u.intr.npoll = npoll;
   3111  1.152  augustss 	upipe->u.intr.qhs =
   3112   1.31  augustss 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
   3113    1.1  augustss 
   3114  1.152  augustss 	/*
   3115    1.1  augustss 	 * Figure out which offset in the schedule that has most
   3116    1.1  augustss 	 * bandwidth left over.
   3117    1.1  augustss 	 */
   3118    1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3119    1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3120    1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   3121    1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3122    1.1  augustss 		if (bw < bestbw) {
   3123    1.1  augustss 			bestbw = bw;
   3124    1.1  augustss 			bestoffs = offs;
   3125    1.1  augustss 		}
   3126    1.1  augustss 	}
   3127  1.173      gson 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   3128    1.1  augustss 
   3129    1.1  augustss 	for(i = 0; i < npoll; i++) {
   3130    1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3131  1.121  augustss 		sqh->elink = NULL;
   3132   1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3133  1.223    bouyer 		usb_syncmem(&sqh->dma,
   3134  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3135  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3136  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3137    1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   3138    1.1  augustss 	}
   3139    1.1  augustss #undef MOD
   3140    1.1  augustss 
   3141    1.1  augustss 	s = splusb();
   3142    1.1  augustss 	/* Enter QHs into the controller data structures. */
   3143    1.1  augustss 	for(i = 0; i < npoll; i++)
   3144   1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   3145   1.92  augustss 	splx(s);
   3146    1.1  augustss 
   3147  1.173      gson 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
   3148    1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3149    1.1  augustss }
   3150    1.1  augustss 
   3151    1.1  augustss /* Open a new pipe. */
   3152    1.1  augustss usbd_status
   3153  1.119  augustss uhci_open(usbd_pipe_handle pipe)
   3154    1.1  augustss {
   3155  1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3156    1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3157    1.1  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   3158   1.63  augustss 	usbd_status err;
   3159   1.79  augustss 	int ival;
   3160    1.1  augustss 
   3161    1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   3162  1.152  augustss 		     pipe, pipe->device->address,
   3163    1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   3164   1.92  augustss 
   3165   1.92  augustss 	upipe->aborting = 0;
   3166  1.236  drochner 	/* toggle state needed for bulk endpoints */
   3167  1.236  drochner 	upipe->nexttoggle = pipe->endpoint->datatoggle;
   3168   1.92  augustss 
   3169    1.1  augustss 	if (pipe->device->address == sc->sc_addr) {
   3170    1.1  augustss 		switch (ed->bEndpointAddress) {
   3171    1.1  augustss 		case USB_CONTROL_ENDPOINT:
   3172    1.1  augustss 			pipe->methods = &uhci_root_ctrl_methods;
   3173    1.1  augustss 			break;
   3174   1.45  augustss 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   3175    1.1  augustss 			pipe->methods = &uhci_root_intr_methods;
   3176    1.1  augustss 			break;
   3177    1.1  augustss 		default:
   3178    1.1  augustss 			return (USBD_INVAL);
   3179    1.1  augustss 		}
   3180    1.1  augustss 	} else {
   3181    1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3182    1.1  augustss 		case UE_CONTROL:
   3183    1.1  augustss 			pipe->methods = &uhci_device_ctrl_methods;
   3184    1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   3185   1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   3186    1.5  augustss 				goto bad;
   3187    1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   3188   1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   3189    1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3190    1.5  augustss 				goto bad;
   3191    1.5  augustss 			}
   3192    1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   3193   1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   3194    1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3195    1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3196    1.5  augustss 				goto bad;
   3197    1.5  augustss 			}
   3198  1.152  augustss 			err = usb_allocmem(&sc->sc_bus,
   3199  1.152  augustss 				  sizeof(usb_device_request_t),
   3200   1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   3201   1.63  augustss 			if (err) {
   3202    1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3203    1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3204    1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   3205    1.5  augustss 				goto bad;
   3206    1.5  augustss 			}
   3207    1.1  augustss 			break;
   3208    1.1  augustss 		case UE_INTERRUPT:
   3209    1.1  augustss 			pipe->methods = &uhci_device_intr_methods;
   3210   1.79  augustss 			ival = pipe->interval;
   3211   1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   3212   1.79  augustss 				ival = ed->bInterval;
   3213   1.80  augustss 			return (uhci_device_setintr(sc, upipe, ival));
   3214    1.1  augustss 		case UE_ISOCHRONOUS:
   3215   1.16  augustss 			pipe->methods = &uhci_device_isoc_methods;
   3216   1.48  augustss 			return (uhci_setup_isoc(pipe));
   3217    1.1  augustss 		case UE_BULK:
   3218    1.1  augustss 			pipe->methods = &uhci_device_bulk_methods;
   3219    1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   3220   1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   3221    1.5  augustss 				goto bad;
   3222    1.1  augustss 			break;
   3223    1.1  augustss 		}
   3224    1.1  augustss 	}
   3225    1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3226    1.5  augustss 
   3227    1.5  augustss  bad:
   3228    1.5  augustss 	return (USBD_NOMEM);
   3229    1.1  augustss }
   3230    1.1  augustss 
   3231    1.1  augustss /*
   3232    1.1  augustss  * Data structures and routines to emulate the root hub.
   3233    1.1  augustss  */
   3234    1.1  augustss usb_device_descriptor_t uhci_devd = {
   3235    1.1  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   3236    1.1  augustss 	UDESC_DEVICE,		/* type */
   3237    1.1  augustss 	{0x00, 0x01},		/* USB version */
   3238   1.87  augustss 	UDCLASS_HUB,		/* class */
   3239   1.87  augustss 	UDSUBCLASS_HUB,		/* subclass */
   3240  1.144  augustss 	UDPROTO_FSHUB,		/* protocol */
   3241    1.1  augustss 	64,			/* max packet */
   3242    1.1  augustss 	{0},{0},{0x00,0x01},	/* device id */
   3243    1.1  augustss 	1,2,0,			/* string indicies */
   3244    1.1  augustss 	1			/* # of configurations */
   3245    1.1  augustss };
   3246    1.1  augustss 
   3247  1.208  drochner const usb_config_descriptor_t uhci_confd = {
   3248    1.1  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   3249    1.1  augustss 	UDESC_CONFIG,
   3250    1.1  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   3251    1.1  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   3252    1.1  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   3253    1.1  augustss 	1,
   3254    1.1  augustss 	1,
   3255    1.1  augustss 	0,
   3256  1.206  drochner 	UC_ATTR_MBO | UC_SELF_POWERED,
   3257    1.1  augustss 	0			/* max power */
   3258    1.1  augustss };
   3259    1.1  augustss 
   3260  1.208  drochner const usb_interface_descriptor_t uhci_ifcd = {
   3261    1.1  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   3262    1.1  augustss 	UDESC_INTERFACE,
   3263    1.1  augustss 	0,
   3264    1.1  augustss 	0,
   3265    1.1  augustss 	1,
   3266   1.87  augustss 	UICLASS_HUB,
   3267   1.87  augustss 	UISUBCLASS_HUB,
   3268  1.144  augustss 	UIPROTO_FSHUB,
   3269    1.1  augustss 	0
   3270    1.1  augustss };
   3271    1.1  augustss 
   3272  1.208  drochner const usb_endpoint_descriptor_t uhci_endpd = {
   3273    1.1  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   3274    1.1  augustss 	UDESC_ENDPOINT,
   3275   1.45  augustss 	UE_DIR_IN | UHCI_INTR_ENDPT,
   3276    1.1  augustss 	UE_INTERRUPT,
   3277    1.1  augustss 	{8},
   3278    1.1  augustss 	255
   3279    1.1  augustss };
   3280    1.1  augustss 
   3281  1.208  drochner const usb_hub_descriptor_t uhci_hubd_piix = {
   3282    1.1  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   3283    1.1  augustss 	UDESC_HUB,
   3284    1.1  augustss 	2,
   3285    1.1  augustss 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   3286    1.1  augustss 	50,			/* power on to power good */
   3287    1.1  augustss 	0,
   3288    1.1  augustss 	{ 0x00 },		/* both ports are removable */
   3289  1.199  christos 	{ 0 },
   3290    1.1  augustss };
   3291    1.1  augustss 
   3292    1.1  augustss /*
   3293  1.166   dsainty  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3294  1.166   dsainty  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3295  1.166   dsainty  * should not be used by the USB subsystem.  As we cannot issue a
   3296  1.166   dsainty  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3297  1.166   dsainty  * will be enabled as part of the reset.
   3298  1.166   dsainty  *
   3299  1.166   dsainty  * On the VT83C572, the port cannot be successfully enabled until the
   3300  1.166   dsainty  * outstanding "port enable change" and "connection status change"
   3301  1.166   dsainty  * events have been reset.
   3302  1.166   dsainty  */
   3303  1.166   dsainty Static usbd_status
   3304  1.166   dsainty uhci_portreset(uhci_softc_t *sc, int index)
   3305  1.166   dsainty {
   3306  1.166   dsainty 	int lim, port, x;
   3307  1.166   dsainty 
   3308  1.166   dsainty 	if (index == 1)
   3309  1.166   dsainty 		port = UHCI_PORTSC1;
   3310  1.166   dsainty 	else if (index == 2)
   3311  1.166   dsainty 		port = UHCI_PORTSC2;
   3312  1.166   dsainty 	else
   3313  1.166   dsainty 		return (USBD_IOERROR);
   3314  1.166   dsainty 
   3315  1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3316  1.166   dsainty 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3317  1.166   dsainty 
   3318  1.166   dsainty 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3319  1.166   dsainty 
   3320  1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   3321  1.166   dsainty 		    index, UREAD2(sc, port)));
   3322  1.166   dsainty 
   3323  1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3324  1.222  drochner 	UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
   3325  1.166   dsainty 
   3326  1.166   dsainty 	delay(100);
   3327  1.166   dsainty 
   3328  1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3329  1.166   dsainty 		    index, UREAD2(sc, port)));
   3330  1.166   dsainty 
   3331  1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3332  1.166   dsainty 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3333  1.166   dsainty 
   3334  1.166   dsainty 	for (lim = 10; --lim > 0;) {
   3335  1.166   dsainty 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3336  1.166   dsainty 
   3337  1.166   dsainty 		x = UREAD2(sc, port);
   3338  1.166   dsainty 
   3339  1.166   dsainty 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3340  1.166   dsainty 			    index, lim, x));
   3341  1.166   dsainty 
   3342  1.166   dsainty 		if (!(x & UHCI_PORTSC_CCS)) {
   3343  1.166   dsainty 			/*
   3344  1.166   dsainty 			 * No device is connected (or was disconnected
   3345  1.166   dsainty 			 * during reset).  Consider the port reset.
   3346  1.166   dsainty 			 * The delay must be long enough to ensure on
   3347  1.166   dsainty 			 * the initial iteration that the device
   3348  1.166   dsainty 			 * connection will have been registered.  50ms
   3349  1.166   dsainty 			 * appears to be sufficient, but 20ms is not.
   3350  1.166   dsainty 			 */
   3351  1.166   dsainty 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3352  1.166   dsainty 				    index, lim));
   3353  1.166   dsainty 			break;
   3354  1.166   dsainty 		}
   3355  1.166   dsainty 
   3356  1.166   dsainty 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3357  1.166   dsainty 			/*
   3358  1.166   dsainty 			 * Port enabled changed and/or connection
   3359  1.166   dsainty 			 * status changed were set.  Reset either or
   3360  1.166   dsainty 			 * both raised flags (by writing a 1 to that
   3361  1.166   dsainty 			 * bit), and wait again for state to settle.
   3362  1.166   dsainty 			 */
   3363  1.166   dsainty 			UWRITE2(sc, port, URWMASK(x) |
   3364  1.166   dsainty 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3365  1.166   dsainty 			continue;
   3366  1.166   dsainty 		}
   3367  1.166   dsainty 
   3368  1.166   dsainty 		if (x & UHCI_PORTSC_PE)
   3369  1.166   dsainty 			/* Port is enabled */
   3370  1.166   dsainty 			break;
   3371  1.166   dsainty 
   3372  1.166   dsainty 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3373  1.166   dsainty 	}
   3374  1.166   dsainty 
   3375  1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3376  1.166   dsainty 		    index, UREAD2(sc, port)));
   3377  1.166   dsainty 
   3378  1.166   dsainty 	if (lim <= 0) {
   3379  1.166   dsainty 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3380  1.166   dsainty 		return (USBD_TIMEOUT);
   3381  1.166   dsainty 	}
   3382  1.184     perry 
   3383  1.166   dsainty 	sc->sc_isreset = 1;
   3384  1.166   dsainty 	return (USBD_NORMAL_COMPLETION);
   3385  1.166   dsainty }
   3386  1.166   dsainty 
   3387  1.166   dsainty /*
   3388    1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   3389    1.1  augustss  */
   3390    1.1  augustss usbd_status
   3391  1.119  augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3392    1.1  augustss {
   3393   1.63  augustss 	usbd_status err;
   3394   1.16  augustss 
   3395   1.52  augustss 	/* Insert last in queue. */
   3396   1.63  augustss 	err = usb_insert_transfer(xfer);
   3397   1.63  augustss 	if (err)
   3398   1.63  augustss 		return (err);
   3399   1.52  augustss 
   3400  1.152  augustss 	/*
   3401   1.94  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3402   1.94  augustss 	 * so start it first.
   3403   1.67  augustss 	 */
   3404   1.63  augustss 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3405   1.16  augustss }
   3406   1.16  augustss 
   3407   1.16  augustss usbd_status
   3408  1.119  augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3409   1.16  augustss {
   3410  1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3411    1.1  augustss 	usb_device_request_t *req;
   3412   1.59  augustss 	void *buf = NULL;
   3413    1.1  augustss 	int port, x;
   3414   1.52  augustss 	int s, len, value, index, status, change, l, totlen = 0;
   3415    1.1  augustss 	usb_port_status_t ps;
   3416   1.63  augustss 	usbd_status err;
   3417    1.1  augustss 
   3418   1.82  augustss 	if (sc->sc_dying)
   3419   1.82  augustss 		return (USBD_IOERROR);
   3420   1.82  augustss 
   3421   1.48  augustss #ifdef DIAGNOSTIC
   3422   1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3423  1.163    provos 		panic("uhci_root_ctrl_transfer: not a request");
   3424   1.48  augustss #endif
   3425   1.63  augustss 	req = &xfer->request;
   3426    1.1  augustss 
   3427  1.152  augustss 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3428    1.1  augustss 		    req->bmRequestType, req->bRequest));
   3429    1.1  augustss 
   3430    1.1  augustss 	len = UGETW(req->wLength);
   3431    1.1  augustss 	value = UGETW(req->wValue);
   3432    1.1  augustss 	index = UGETW(req->wIndex);
   3433   1.49  augustss 
   3434   1.49  augustss 	if (len != 0)
   3435  1.159  augustss 		buf = KERNADDR(&xfer->dmabuf, 0);
   3436   1.49  augustss 
   3437    1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3438    1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   3439    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3440    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3441    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3442  1.152  augustss 		/*
   3443   1.13  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3444    1.1  augustss 		 * for the integrated root hub.
   3445    1.1  augustss 		 */
   3446    1.1  augustss 		break;
   3447    1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3448    1.1  augustss 		if (len > 0) {
   3449    1.1  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   3450    1.1  augustss 			totlen = 1;
   3451    1.1  augustss 		}
   3452    1.1  augustss 		break;
   3453    1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3454    1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3455  1.195  christos 		if (len == 0)
   3456  1.195  christos 			break;
   3457    1.1  augustss 		switch(value >> 8) {
   3458    1.1  augustss 		case UDESC_DEVICE:
   3459    1.1  augustss 			if ((value & 0xff) != 0) {
   3460   1.63  augustss 				err = USBD_IOERROR;
   3461    1.1  augustss 				goto ret;
   3462    1.1  augustss 			}
   3463    1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3464   1.27  augustss 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3465    1.1  augustss 			memcpy(buf, &uhci_devd, l);
   3466    1.1  augustss 			break;
   3467    1.1  augustss 		case UDESC_CONFIG:
   3468    1.1  augustss 			if ((value & 0xff) != 0) {
   3469   1.63  augustss 				err = USBD_IOERROR;
   3470    1.1  augustss 				goto ret;
   3471    1.1  augustss 			}
   3472    1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3473    1.1  augustss 			memcpy(buf, &uhci_confd, l);
   3474    1.1  augustss 			buf = (char *)buf + l;
   3475    1.1  augustss 			len -= l;
   3476    1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3477    1.1  augustss 			totlen += l;
   3478    1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   3479    1.1  augustss 			buf = (char *)buf + l;
   3480    1.1  augustss 			len -= l;
   3481    1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3482    1.1  augustss 			totlen += l;
   3483    1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   3484    1.1  augustss 			break;
   3485    1.1  augustss 		case UDESC_STRING:
   3486  1.213  drochner #define sd ((usb_string_descriptor_t *)buf)
   3487    1.1  augustss 			switch (value & 0xff) {
   3488  1.182  augustss 			case 0: /* Language table */
   3489  1.213  drochner 				totlen = usb_makelangtbl(sd, len);
   3490  1.182  augustss 				break;
   3491    1.1  augustss 			case 1: /* Vendor */
   3492  1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3493  1.213  drochner 							 sc->sc_vendor);
   3494    1.1  augustss 				break;
   3495    1.1  augustss 			case 2: /* Product */
   3496  1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3497  1.213  drochner 							 "UHCI root hub");
   3498    1.1  augustss 				break;
   3499    1.1  augustss 			}
   3500  1.213  drochner #undef sd
   3501    1.1  augustss 			break;
   3502    1.1  augustss 		default:
   3503   1.63  augustss 			err = USBD_IOERROR;
   3504    1.1  augustss 			goto ret;
   3505    1.1  augustss 		}
   3506    1.1  augustss 		break;
   3507    1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3508    1.1  augustss 		if (len > 0) {
   3509    1.1  augustss 			*(u_int8_t *)buf = 0;
   3510    1.1  augustss 			totlen = 1;
   3511    1.1  augustss 		}
   3512    1.1  augustss 		break;
   3513    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3514    1.1  augustss 		if (len > 1) {
   3515    1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3516    1.1  augustss 			totlen = 2;
   3517    1.1  augustss 		}
   3518    1.1  augustss 		break;
   3519    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3520    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3521    1.1  augustss 		if (len > 1) {
   3522    1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3523    1.1  augustss 			totlen = 2;
   3524    1.1  augustss 		}
   3525    1.1  augustss 		break;
   3526    1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3527    1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   3528   1.63  augustss 			err = USBD_IOERROR;
   3529    1.1  augustss 			goto ret;
   3530    1.1  augustss 		}
   3531    1.1  augustss 		sc->sc_addr = value;
   3532    1.1  augustss 		break;
   3533    1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3534    1.1  augustss 		if (value != 0 && value != 1) {
   3535   1.63  augustss 			err = USBD_IOERROR;
   3536    1.1  augustss 			goto ret;
   3537    1.1  augustss 		}
   3538    1.1  augustss 		sc->sc_conf = value;
   3539    1.1  augustss 		break;
   3540    1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3541    1.1  augustss 		break;
   3542    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3543    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3544    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3545   1.63  augustss 		err = USBD_IOERROR;
   3546    1.1  augustss 		goto ret;
   3547    1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3548    1.1  augustss 		break;
   3549    1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3550    1.1  augustss 		break;
   3551    1.1  augustss 	/* Hub requests */
   3552    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3553    1.1  augustss 		break;
   3554    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3555   1.12  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3556   1.12  augustss 			     "port=%d feature=%d\n",
   3557    1.1  augustss 			     index, value));
   3558    1.1  augustss 		if (index == 1)
   3559    1.1  augustss 			port = UHCI_PORTSC1;
   3560    1.1  augustss 		else if (index == 2)
   3561    1.1  augustss 			port = UHCI_PORTSC2;
   3562    1.1  augustss 		else {
   3563   1.63  augustss 			err = USBD_IOERROR;
   3564    1.1  augustss 			goto ret;
   3565    1.1  augustss 		}
   3566    1.1  augustss 		switch(value) {
   3567    1.1  augustss 		case UHF_PORT_ENABLE:
   3568  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3569    1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3570    1.1  augustss 			break;
   3571    1.1  augustss 		case UHF_PORT_SUSPEND:
   3572  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3573  1.222  drochner 			if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
   3574  1.222  drochner 				break;
   3575  1.222  drochner 			UWRITE2(sc, port, x | UHCI_PORTSC_RD);
   3576  1.222  drochner 			/* see USB2 spec ch. 7.1.7.7 */
   3577  1.222  drochner 			usb_delay_ms(&sc->sc_bus, 20);
   3578    1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3579  1.222  drochner 			/* 10ms resume delay must be provided by caller */
   3580    1.1  augustss 			break;
   3581    1.1  augustss 		case UHF_PORT_RESET:
   3582  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3583    1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3584    1.1  augustss 			break;
   3585    1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3586  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3587    1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3588    1.1  augustss 			break;
   3589    1.1  augustss 		case UHF_C_PORT_ENABLE:
   3590  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3591    1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3592    1.1  augustss 			break;
   3593    1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3594  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3595    1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3596    1.1  augustss 			break;
   3597    1.1  augustss 		case UHF_C_PORT_RESET:
   3598    1.1  augustss 			sc->sc_isreset = 0;
   3599   1.63  augustss 			err = USBD_NORMAL_COMPLETION;
   3600    1.1  augustss 			goto ret;
   3601    1.1  augustss 		case UHF_PORT_CONNECTION:
   3602    1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3603    1.1  augustss 		case UHF_PORT_POWER:
   3604    1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3605    1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3606    1.1  augustss 		default:
   3607   1.63  augustss 			err = USBD_IOERROR;
   3608    1.1  augustss 			goto ret;
   3609    1.1  augustss 		}
   3610    1.1  augustss 		break;
   3611    1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3612    1.1  augustss 		if (index == 1)
   3613    1.1  augustss 			port = UHCI_PORTSC1;
   3614    1.1  augustss 		else if (index == 2)
   3615    1.1  augustss 			port = UHCI_PORTSC2;
   3616    1.1  augustss 		else {
   3617   1.63  augustss 			err = USBD_IOERROR;
   3618    1.1  augustss 			goto ret;
   3619    1.1  augustss 		}
   3620    1.1  augustss 		if (len > 0) {
   3621  1.152  augustss 			*(u_int8_t *)buf =
   3622    1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3623    1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   3624    1.1  augustss 			totlen = 1;
   3625    1.1  augustss 		}
   3626    1.1  augustss 		break;
   3627    1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3628  1.195  christos 		if (len == 0)
   3629  1.195  christos 			break;
   3630  1.177    toshii 		if ((value & 0xff) != 0) {
   3631   1.63  augustss 			err = USBD_IOERROR;
   3632    1.1  augustss 			goto ret;
   3633    1.1  augustss 		}
   3634    1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3635    1.1  augustss 		totlen = l;
   3636    1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   3637    1.1  augustss 		break;
   3638    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3639    1.1  augustss 		if (len != 4) {
   3640   1.63  augustss 			err = USBD_IOERROR;
   3641    1.1  augustss 			goto ret;
   3642    1.1  augustss 		}
   3643    1.1  augustss 		memset(buf, 0, len);
   3644    1.1  augustss 		totlen = len;
   3645    1.1  augustss 		break;
   3646    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3647    1.1  augustss 		if (index == 1)
   3648    1.1  augustss 			port = UHCI_PORTSC1;
   3649    1.1  augustss 		else if (index == 2)
   3650    1.1  augustss 			port = UHCI_PORTSC2;
   3651    1.1  augustss 		else {
   3652   1.63  augustss 			err = USBD_IOERROR;
   3653    1.1  augustss 			goto ret;
   3654    1.1  augustss 		}
   3655    1.1  augustss 		if (len != 4) {
   3656   1.63  augustss 			err = USBD_IOERROR;
   3657    1.1  augustss 			goto ret;
   3658    1.1  augustss 		}
   3659    1.1  augustss 		x = UREAD2(sc, port);
   3660    1.1  augustss 		status = change = 0;
   3661  1.142  augustss 		if (x & UHCI_PORTSC_CCS)
   3662    1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   3663  1.152  augustss 		if (x & UHCI_PORTSC_CSC)
   3664    1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   3665  1.152  augustss 		if (x & UHCI_PORTSC_PE)
   3666    1.1  augustss 			status |= UPS_PORT_ENABLED;
   3667  1.152  augustss 		if (x & UHCI_PORTSC_POEDC)
   3668    1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   3669  1.152  augustss 		if (x & UHCI_PORTSC_OCI)
   3670    1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   3671  1.152  augustss 		if (x & UHCI_PORTSC_OCIC)
   3672    1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3673  1.152  augustss 		if (x & UHCI_PORTSC_SUSP)
   3674    1.1  augustss 			status |= UPS_SUSPEND;
   3675  1.152  augustss 		if (x & UHCI_PORTSC_LSDA)
   3676    1.1  augustss 			status |= UPS_LOW_SPEED;
   3677    1.1  augustss 		status |= UPS_PORT_POWER;
   3678    1.1  augustss 		if (sc->sc_isreset)
   3679    1.1  augustss 			change |= UPS_C_PORT_RESET;
   3680    1.1  augustss 		USETW(ps.wPortStatus, status);
   3681    1.1  augustss 		USETW(ps.wPortChange, change);
   3682    1.1  augustss 		l = min(len, sizeof ps);
   3683    1.1  augustss 		memcpy(buf, &ps, l);
   3684    1.1  augustss 		totlen = l;
   3685    1.1  augustss 		break;
   3686    1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3687   1.63  augustss 		err = USBD_IOERROR;
   3688    1.1  augustss 		goto ret;
   3689    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3690    1.1  augustss 		break;
   3691    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3692    1.1  augustss 		if (index == 1)
   3693    1.1  augustss 			port = UHCI_PORTSC1;
   3694    1.1  augustss 		else if (index == 2)
   3695    1.1  augustss 			port = UHCI_PORTSC2;
   3696    1.1  augustss 		else {
   3697   1.63  augustss 			err = USBD_IOERROR;
   3698    1.1  augustss 			goto ret;
   3699    1.1  augustss 		}
   3700    1.1  augustss 		switch(value) {
   3701    1.1  augustss 		case UHF_PORT_ENABLE:
   3702  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3703    1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3704    1.1  augustss 			break;
   3705    1.1  augustss 		case UHF_PORT_SUSPEND:
   3706  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3707    1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3708    1.1  augustss 			break;
   3709    1.1  augustss 		case UHF_PORT_RESET:
   3710  1.166   dsainty 			err = uhci_portreset(sc, index);
   3711  1.166   dsainty 			goto ret;
   3712  1.111  augustss 		case UHF_PORT_POWER:
   3713  1.111  augustss 			/* Pretend we turned on power */
   3714  1.115   mycroft 			err = USBD_NORMAL_COMPLETION;
   3715  1.111  augustss 			goto ret;
   3716    1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3717    1.1  augustss 		case UHF_C_PORT_ENABLE:
   3718    1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3719    1.1  augustss 		case UHF_PORT_CONNECTION:
   3720    1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3721    1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3722    1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3723    1.1  augustss 		case UHF_C_PORT_RESET:
   3724    1.1  augustss 		default:
   3725   1.63  augustss 			err = USBD_IOERROR;
   3726    1.1  augustss 			goto ret;
   3727    1.1  augustss 		}
   3728    1.1  augustss 		break;
   3729    1.1  augustss 	default:
   3730   1.63  augustss 		err = USBD_IOERROR;
   3731    1.1  augustss 		goto ret;
   3732    1.1  augustss 	}
   3733   1.63  augustss 	xfer->actlen = totlen;
   3734   1.63  augustss 	err = USBD_NORMAL_COMPLETION;
   3735    1.1  augustss  ret:
   3736   1.63  augustss 	xfer->status = err;
   3737   1.52  augustss 	s = splusb();
   3738   1.63  augustss 	usb_transfer_complete(xfer);
   3739   1.52  augustss 	splx(s);
   3740    1.1  augustss 	return (USBD_IN_PROGRESS);
   3741    1.1  augustss }
   3742    1.1  augustss 
   3743    1.1  augustss /* Abort a root control request. */
   3744    1.1  augustss void
   3745  1.205  christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3746    1.1  augustss {
   3747   1.70  augustss 	/* Nothing to do, all transfers are synchronous. */
   3748    1.1  augustss }
   3749    1.1  augustss 
   3750    1.1  augustss /* Close the root pipe. */
   3751    1.1  augustss void
   3752  1.205  christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3753    1.1  augustss {
   3754    1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   3755    1.1  augustss }
   3756    1.1  augustss 
   3757    1.1  augustss /* Abort a root interrupt request. */
   3758    1.1  augustss void
   3759  1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   3760    1.1  augustss {
   3761  1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3762   1.30  augustss 
   3763  1.234    dyoung 	callout_stop(&sc->sc_poll_handle);
   3764   1.96  augustss 	sc->sc_intr_xfer = NULL;
   3765   1.58  augustss 
   3766   1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3767   1.58  augustss 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   3768   1.63  augustss 		xfer->pipe->intrxfer = 0;
   3769   1.58  augustss 	}
   3770   1.63  augustss 	xfer->status = USBD_CANCELLED;
   3771   1.96  augustss #ifdef DIAGNOSTIC
   3772   1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3773   1.96  augustss #endif
   3774   1.63  augustss 	usb_transfer_complete(xfer);
   3775    1.1  augustss }
   3776    1.1  augustss 
   3777   1.16  augustss usbd_status
   3778  1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3779   1.16  augustss {
   3780   1.63  augustss 	usbd_status err;
   3781   1.16  augustss 
   3782   1.52  augustss 	/* Insert last in queue. */
   3783   1.63  augustss 	err = usb_insert_transfer(xfer);
   3784   1.63  augustss 	if (err)
   3785   1.63  augustss 		return (err);
   3786   1.52  augustss 
   3787  1.186     skrll 	/*
   3788  1.186     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3789   1.67  augustss 	 * start first
   3790   1.67  augustss 	 */
   3791   1.63  augustss 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3792   1.16  augustss }
   3793   1.16  augustss 
   3794    1.1  augustss /* Start a transfer on the root interrupt pipe */
   3795    1.1  augustss usbd_status
   3796  1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   3797    1.1  augustss {
   3798   1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   3799  1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3800  1.174  drochner 	unsigned int ival;
   3801    1.1  augustss 
   3802  1.173      gson 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
   3803   1.63  augustss 		     xfer, xfer->length, xfer->flags));
   3804   1.82  augustss 
   3805   1.82  augustss 	if (sc->sc_dying)
   3806   1.82  augustss 		return (USBD_IOERROR);
   3807    1.1  augustss 
   3808  1.174  drochner 	/* XXX temporary variable needed to avoid gcc3 warning */
   3809  1.174  drochner 	ival = xfer->pipe->endpoint->edesc->bInterval;
   3810  1.174  drochner 	sc->sc_ival = mstohz(ival);
   3811  1.234    dyoung 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3812   1.96  augustss 	sc->sc_intr_xfer = xfer;
   3813    1.1  augustss 	return (USBD_IN_PROGRESS);
   3814    1.1  augustss }
   3815    1.1  augustss 
   3816    1.1  augustss /* Close the root interrupt pipe. */
   3817    1.1  augustss void
   3818  1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   3819    1.1  augustss {
   3820  1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3821   1.30  augustss 
   3822  1.234    dyoung 	callout_stop(&sc->sc_poll_handle);
   3823   1.96  augustss 	sc->sc_intr_xfer = NULL;
   3824    1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   3825    1.1  augustss }
   3826