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uhci.c revision 1.248
      1  1.248       mrg /*	$NetBSD: uhci.c,v 1.248 2012/06/10 06:15:53 mrg Exp $	*/
      2    1.1  augustss 
      3    1.1  augustss /*
      4  1.248       mrg  * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc.
      5    1.1  augustss  * All rights reserved.
      6    1.1  augustss  *
      7   1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8  1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9  1.248       mrg  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10  1.248       mrg  * and Matthew R. Green (mrg (at) eterna.com.au).
     11    1.1  augustss  *
     12    1.1  augustss  * Redistribution and use in source and binary forms, with or without
     13    1.1  augustss  * modification, are permitted provided that the following conditions
     14    1.1  augustss  * are met:
     15    1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     16    1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     17    1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     18    1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     19    1.1  augustss  *    documentation and/or other materials provided with the distribution.
     20    1.1  augustss  *
     21    1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22    1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23    1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24    1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25    1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26    1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27    1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28    1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29    1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30    1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31    1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     32    1.1  augustss  */
     33    1.1  augustss 
     34    1.1  augustss /*
     35    1.1  augustss  * USB Universal Host Controller driver.
     36   1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     37    1.1  augustss  *
     38  1.229  uebayasi  * UHCI spec: http://www.intel.com/technology/usb/spec.htm
     39  1.229  uebayasi  * USB spec: http://www.usb.org/developers/docs/
     40   1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     41   1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     42    1.1  augustss  */
     43  1.143     lukem 
     44  1.143     lukem #include <sys/cdefs.h>
     45  1.248       mrg __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.248 2012/06/10 06:15:53 mrg Exp $");
     46  1.239      matt 
     47  1.239      matt #include "opt_usb.h"
     48    1.1  augustss 
     49    1.1  augustss #include <sys/param.h>
     50    1.1  augustss #include <sys/systm.h>
     51    1.1  augustss #include <sys/kernel.h>
     52  1.248       mrg #include <sys/kmem.h>
     53    1.1  augustss #include <sys/device.h>
     54   1.67  augustss #include <sys/select.h>
     55  1.183      fvdl #include <sys/extent.h>
     56    1.1  augustss #include <sys/proc.h>
     57    1.1  augustss #include <sys/queue.h>
     58  1.211        ad #include <sys/bus.h>
     59  1.247       mrg #include <sys/cpu.h>
     60    1.1  augustss 
     61   1.39  augustss #include <machine/endian.h>
     62    1.7  augustss 
     63    1.1  augustss #include <dev/usb/usb.h>
     64    1.1  augustss #include <dev/usb/usbdi.h>
     65    1.1  augustss #include <dev/usb/usbdivar.h>
     66    1.7  augustss #include <dev/usb/usb_mem.h>
     67    1.1  augustss #include <dev/usb/usb_quirks.h>
     68    1.1  augustss 
     69    1.1  augustss #include <dev/usb/uhcireg.h>
     70    1.1  augustss #include <dev/usb/uhcivar.h>
     71  1.213  drochner #include <dev/usb/usbroothub_subr.h>
     72    1.1  augustss 
     73  1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     74  1.125  augustss /*#define UHCI_CTL_LOOP */
     75  1.125  augustss 
     76   1.13  augustss 
     77   1.37  augustss 
     78   1.67  augustss #ifdef UHCI_DEBUG
     79   1.92  augustss uhci_softc_t *thesc;
     80   1.59  augustss #define DPRINTF(x)	if (uhcidebug) printf x
     81   1.59  augustss #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
     82   1.67  augustss int uhcidebug = 0;
     83  1.125  augustss int uhcinoloop = 0;
     84   1.59  augustss #else
     85   1.59  augustss #define DPRINTF(x)
     86   1.59  augustss #define DPRINTFN(n,x)
     87   1.59  augustss #endif
     88   1.59  augustss 
     89   1.39  augustss /*
     90   1.39  augustss  * The UHCI controller is little endian, so on big endian machines
     91  1.181  drochner  * the data stored in memory needs to be swapped.
     92   1.39  augustss  */
     93   1.39  augustss 
     94    1.1  augustss struct uhci_pipe {
     95    1.1  augustss 	struct usbd_pipe pipe;
     96   1.32  augustss 	int nexttoggle;
     97   1.92  augustss 
     98   1.92  augustss 	u_char aborting;
     99   1.92  augustss 	usbd_xfer_handle abortstart, abortend;
    100   1.92  augustss 
    101    1.1  augustss 	/* Info needed for different pipe kinds. */
    102    1.1  augustss 	union {
    103    1.1  augustss 		/* Control pipe */
    104    1.1  augustss 		struct {
    105    1.1  augustss 			uhci_soft_qh_t *sqh;
    106    1.7  augustss 			usb_dma_t reqdma;
    107   1.16  augustss 			uhci_soft_td_t *setup, *stat;
    108    1.1  augustss 			u_int length;
    109    1.1  augustss 		} ctl;
    110    1.1  augustss 		/* Interrupt pipe */
    111    1.1  augustss 		struct {
    112    1.1  augustss 			int npoll;
    113  1.187     skrll 			int isread;
    114    1.1  augustss 			uhci_soft_qh_t **qhs;
    115    1.1  augustss 		} intr;
    116    1.1  augustss 		/* Bulk pipe */
    117    1.1  augustss 		struct {
    118    1.1  augustss 			uhci_soft_qh_t *sqh;
    119    1.1  augustss 			u_int length;
    120    1.1  augustss 			int isread;
    121    1.1  augustss 		} bulk;
    122   1.16  augustss 		/* Iso pipe */
    123   1.16  augustss 		struct iso {
    124   1.16  augustss 			uhci_soft_td_t **stds;
    125   1.48  augustss 			int next, inuse;
    126   1.16  augustss 		} iso;
    127    1.1  augustss 	} u;
    128    1.1  augustss };
    129    1.1  augustss 
    130  1.142  augustss Static void		uhci_globalreset(uhci_softc_t *);
    131  1.166   dsainty Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    132  1.142  augustss Static void		uhci_reset(uhci_softc_t *);
    133  1.119  augustss Static usbd_status	uhci_run(uhci_softc_t *, int run);
    134  1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    135  1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    136  1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    137  1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    138   1.16  augustss #if 0
    139  1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    140  1.119  augustss 					 uhci_intr_info_t *);
    141  1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    142   1.16  augustss #endif
    143    1.1  augustss 
    144  1.152  augustss Static void		uhci_free_std_chain(uhci_softc_t *,
    145  1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    146  1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    147  1.152  augustss 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
    148  1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    149  1.119  augustss Static void		uhci_poll_hub(void *);
    150  1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    151  1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    152  1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    153  1.119  augustss 
    154  1.119  augustss Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    155  1.119  augustss 
    156  1.119  augustss Static void		uhci_timeout(void *);
    157  1.153  augustss Static void		uhci_timeout_task(void *);
    158  1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    159  1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    160  1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    161  1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    162  1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    163  1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    164  1.123  augustss Static void		uhci_add_loop(uhci_softc_t *sc);
    165  1.123  augustss Static void		uhci_rem_loop(uhci_softc_t *sc);
    166  1.119  augustss 
    167  1.119  augustss Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    168  1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    169  1.119  augustss 
    170  1.119  augustss Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    171  1.119  augustss Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
    172  1.119  augustss 
    173  1.119  augustss Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    174  1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    175  1.248       mrg Static void		uhci_get_lock(struct usbd_bus *, kmutex_t **);
    176  1.119  augustss 
    177  1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    178  1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    179  1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    180  1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    181  1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    182  1.119  augustss 
    183  1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    184  1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    185  1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    186  1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    187  1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    188  1.119  augustss 
    189  1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    190  1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    191  1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    192  1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    193  1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    194  1.119  augustss 
    195  1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    196  1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    197  1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    198  1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    199  1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    200  1.119  augustss 
    201  1.119  augustss Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    202  1.119  augustss Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    203  1.119  augustss Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    204  1.119  augustss Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    205  1.119  augustss Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    206  1.119  augustss 
    207  1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    208  1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    209  1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    210  1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    211  1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    212  1.119  augustss 
    213  1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    214  1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    215  1.133  augustss Static void		uhci_softintr(void *);
    216  1.119  augustss 
    217  1.119  augustss Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    218  1.119  augustss 
    219  1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    220  1.158  augustss Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    221  1.152  augustss Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    222  1.119  augustss 			    struct uhci_pipe *pipe, int ival);
    223  1.119  augustss 
    224  1.119  augustss Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    225  1.119  augustss Static void		uhci_noop(usbd_pipe_handle pipe);
    226  1.119  augustss 
    227  1.240  jakllsch static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    228  1.119  augustss 						    uhci_soft_qh_t *);
    229  1.119  augustss 
    230  1.119  augustss #ifdef UHCI_DEBUG
    231  1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    232  1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    233  1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    234  1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    235  1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    236  1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    237  1.119  augustss Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    238  1.119  augustss void			uhci_dump(void);
    239    1.1  augustss #endif
    240    1.1  augustss 
    241  1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    242  1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    243  1.112  augustss #define UWRITE1(sc, r, x) \
    244  1.165   dsainty  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    245  1.165   dsainty  } while (/*CONSTCOND*/0)
    246  1.112  augustss #define UWRITE2(sc, r, x) \
    247  1.165   dsainty  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    248  1.165   dsainty  } while (/*CONSTCOND*/0)
    249  1.112  augustss #define UWRITE4(sc, r, x) \
    250  1.165   dsainty  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    251  1.165   dsainty  } while (/*CONSTCOND*/0)
    252  1.196       mrg static __inline uint8_t
    253  1.196       mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
    254  1.196       mrg {
    255  1.196       mrg 
    256  1.196       mrg 	UBARR(sc);
    257  1.196       mrg 	return bus_space_read_1(sc->iot, sc->ioh, r);
    258  1.196       mrg }
    259  1.196       mrg 
    260  1.196       mrg static __inline uint16_t
    261  1.196       mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
    262  1.196       mrg {
    263  1.196       mrg 
    264  1.196       mrg 	UBARR(sc);
    265  1.196       mrg 	return bus_space_read_2(sc->iot, sc->ioh, r);
    266  1.196       mrg }
    267  1.196       mrg 
    268  1.196       mrg static __inline uint32_t
    269  1.196       mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
    270  1.196       mrg {
    271  1.196       mrg 
    272  1.196       mrg 	UBARR(sc);
    273  1.196       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    274  1.196       mrg }
    275    1.1  augustss 
    276    1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    277    1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    278    1.1  augustss 
    279  1.142  augustss #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    280    1.1  augustss 
    281    1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    282    1.1  augustss 
    283    1.1  augustss #define UHCI_INTR_ENDPT 1
    284    1.1  augustss 
    285  1.208  drochner const struct usbd_bus_methods uhci_bus_methods = {
    286  1.245       mrg 	.open_pipe =	uhci_open,
    287  1.245       mrg 	.soft_intr =	uhci_softintr,
    288  1.245       mrg 	.do_poll =	uhci_poll,
    289  1.245       mrg 	.allocm =	uhci_allocm,
    290  1.245       mrg 	.freem =	uhci_freem,
    291  1.245       mrg 	.allocx =	uhci_allocx,
    292  1.245       mrg 	.freex =	uhci_freex,
    293  1.248       mrg 	.get_lock =	uhci_get_lock,
    294   1.48  augustss };
    295   1.48  augustss 
    296  1.208  drochner const struct usbd_pipe_methods uhci_root_ctrl_methods = {
    297  1.245       mrg 	.transfer =	uhci_root_ctrl_transfer,
    298  1.245       mrg 	.start =	uhci_root_ctrl_start,
    299  1.245       mrg 	.abort =	uhci_root_ctrl_abort,
    300  1.245       mrg 	.close =	uhci_root_ctrl_close,
    301  1.245       mrg 	.cleartoggle =	uhci_noop,
    302  1.245       mrg 	.done =		uhci_root_ctrl_done,
    303    1.1  augustss };
    304    1.1  augustss 
    305  1.208  drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
    306  1.245       mrg 	.transfer =	uhci_root_intr_transfer,
    307  1.245       mrg 	.start =	uhci_root_intr_start,
    308  1.245       mrg 	.abort =	uhci_root_intr_abort,
    309  1.245       mrg 	.close =	uhci_root_intr_close,
    310  1.245       mrg 	.cleartoggle =	uhci_noop,
    311  1.245       mrg 	.done =		uhci_root_intr_done,
    312    1.1  augustss };
    313    1.1  augustss 
    314  1.208  drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    315  1.245       mrg 	.transfer =	uhci_device_ctrl_transfer,
    316  1.245       mrg 	.start =	uhci_device_ctrl_start,
    317  1.245       mrg 	.abort =	uhci_device_ctrl_abort,
    318  1.245       mrg 	.close =	uhci_device_ctrl_close,
    319  1.245       mrg 	.cleartoggle =	uhci_noop,
    320  1.245       mrg 	.done =		uhci_device_ctrl_done,
    321    1.1  augustss };
    322    1.1  augustss 
    323  1.208  drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
    324  1.245       mrg 	.transfer =	uhci_device_intr_transfer,
    325  1.245       mrg 	.start =	uhci_device_intr_start,
    326  1.245       mrg 	.abort =	uhci_device_intr_abort,
    327  1.245       mrg 	.close =	uhci_device_intr_close,
    328  1.245       mrg 	.cleartoggle =	uhci_device_clear_toggle,
    329  1.245       mrg 	.done =		uhci_device_intr_done,
    330    1.1  augustss };
    331    1.1  augustss 
    332  1.208  drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
    333  1.245       mrg 	.transfer =	uhci_device_bulk_transfer,
    334  1.245       mrg 	.start =	uhci_device_bulk_start,
    335  1.245       mrg 	.abort =	uhci_device_bulk_abort,
    336  1.245       mrg 	.close =	uhci_device_bulk_close,
    337  1.245       mrg 	.cleartoggle =	uhci_device_clear_toggle,
    338  1.245       mrg 	.done =		uhci_device_bulk_done,
    339    1.1  augustss };
    340    1.1  augustss 
    341  1.208  drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
    342  1.245       mrg 	.transfer =	uhci_device_isoc_transfer,
    343  1.245       mrg 	.start =	uhci_device_isoc_start,
    344  1.245       mrg 	.abort =	uhci_device_isoc_abort,
    345  1.245       mrg 	.close =	uhci_device_isoc_close,
    346  1.245       mrg 	.cleartoggle =	uhci_noop,
    347  1.245       mrg 	.done =		uhci_device_isoc_done,
    348   1.16  augustss };
    349   1.16  augustss 
    350   1.92  augustss #define uhci_add_intr_info(sc, ii) \
    351  1.169  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    352   1.92  augustss #define uhci_del_intr_info(ii) \
    353  1.169  augustss 	do { \
    354  1.169  augustss 		LIST_REMOVE((ii), list); \
    355  1.169  augustss 		(ii)->list.le_prev = NULL; \
    356  1.169  augustss 	} while (0)
    357  1.169  augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    358   1.92  augustss 
    359  1.240  jakllsch static inline uhci_soft_qh_t *
    360  1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    361   1.92  augustss {
    362   1.92  augustss 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    363   1.92  augustss 
    364   1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    365  1.152  augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    366  1.223    bouyer 		usb_syncmem(&pqh->dma,
    367  1.223    bouyer 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    368  1.223    bouyer 		    sizeof(pqh->qh.qh_hlink),
    369  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
    370   1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    371  1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    372   1.92  augustss 			return (NULL);
    373   1.92  augustss 		}
    374   1.92  augustss #endif
    375   1.92  augustss 	}
    376   1.92  augustss 	return (pqh);
    377   1.92  augustss }
    378   1.92  augustss 
    379    1.1  augustss void
    380  1.142  augustss uhci_globalreset(uhci_softc_t *sc)
    381    1.1  augustss {
    382    1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    383   1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    384    1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    385    1.1  augustss }
    386    1.1  augustss 
    387    1.1  augustss usbd_status
    388  1.119  augustss uhci_init(uhci_softc_t *sc)
    389    1.1  augustss {
    390   1.63  augustss 	usbd_status err;
    391    1.1  augustss 	int i, j;
    392  1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    393    1.1  augustss 	uhci_soft_td_t *std;
    394    1.1  augustss 
    395    1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    396    1.1  augustss 
    397   1.67  augustss #ifdef UHCI_DEBUG
    398   1.92  augustss 	thesc = sc;
    399   1.92  augustss 
    400    1.1  augustss 	if (uhcidebug > 2)
    401    1.1  augustss 		uhci_dumpregs(sc);
    402    1.1  augustss #endif
    403    1.1  augustss 
    404  1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    405  1.219  jmcneill 
    406    1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    407  1.142  augustss 	uhci_globalreset(sc);			/* reset the controller */
    408  1.142  augustss 	uhci_reset(sc);
    409   1.24  augustss 
    410  1.218  drochner 	usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    411  1.183      fvdl 	    USB_MEM_RESERVE);
    412  1.183      fvdl 
    413    1.1  augustss 	/* Allocate and initialize real frame array. */
    414  1.152  augustss 	err = usb_allocmem(&sc->sc_bus,
    415   1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    416   1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    417   1.63  augustss 	if (err)
    418   1.63  augustss 		return (err);
    419  1.159  augustss 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    420    1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    421  1.160  augustss 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    422    1.1  augustss 
    423  1.152  augustss 	/*
    424  1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    425  1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    426  1.123  augustss 	 * otherwise.
    427  1.123  augustss 	 */
    428  1.123  augustss 	std = uhci_alloc_std(sc);
    429  1.123  augustss 	if (std == NULL)
    430  1.123  augustss 		return (USBD_NOMEM);
    431  1.123  augustss 	std->link.std = NULL;
    432  1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    433  1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    434  1.123  augustss 	std->td.td_token = htole32(0);
    435  1.123  augustss 	std->td.td_buffer = htole32(0);
    436  1.223    bouyer 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    437  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    438  1.123  augustss 
    439  1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    440  1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    441  1.123  augustss 	if (lsqh == NULL)
    442  1.123  augustss 		return (USBD_NOMEM);
    443  1.123  augustss 	lsqh->hlink = NULL;
    444  1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    445  1.123  augustss 	lsqh->elink = std;
    446  1.123  augustss 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    447  1.123  augustss 	sc->sc_last_qh = lsqh;
    448  1.223    bouyer 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    449  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    450  1.123  augustss 
    451    1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    452    1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    453   1.63  augustss 	if (bsqh == NULL)
    454    1.1  augustss 		return (USBD_NOMEM);
    455  1.123  augustss 	bsqh->hlink = lsqh;
    456  1.123  augustss 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    457  1.121  augustss 	bsqh->elink = NULL;
    458   1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    459    1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    460  1.223    bouyer 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    461  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    462    1.1  augustss 
    463  1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    464  1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    465  1.123  augustss 	if (chsqh == NULL)
    466  1.123  augustss 		return (USBD_NOMEM);
    467  1.123  augustss 	chsqh->hlink = bsqh;
    468  1.123  augustss 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    469  1.123  augustss 	chsqh->elink = NULL;
    470  1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    471  1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    472  1.223    bouyer 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    473  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    474  1.123  augustss 
    475  1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    476  1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    477  1.123  augustss 	if (clsqh == NULL)
    478    1.1  augustss 		return (USBD_NOMEM);
    479  1.220    bouyer 	clsqh->hlink = chsqh;
    480  1.123  augustss 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    481  1.123  augustss 	clsqh->elink = NULL;
    482  1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    483  1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    484  1.223    bouyer 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    485  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    486    1.1  augustss 
    487  1.152  augustss 	/*
    488    1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    489    1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    490    1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    491    1.1  augustss 	 */
    492    1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    493    1.1  augustss 		std = uhci_alloc_std(sc);
    494    1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    495   1.67  augustss 		if (std == NULL || sqh == NULL)
    496   1.13  augustss 			return (USBD_NOMEM);
    497   1.42  augustss 		std->link.sqh = sqh;
    498  1.121  augustss 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    499   1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    500   1.88   tsutsui 		std->td.td_token = htole32(0);
    501   1.88   tsutsui 		std->td.td_buffer = htole32(0);
    502  1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    503  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    504  1.123  augustss 		sqh->hlink = clsqh;
    505  1.123  augustss 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    506  1.121  augustss 		sqh->elink = NULL;
    507   1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    508  1.223    bouyer 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    509  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    510    1.1  augustss 		sc->sc_vframes[i].htd = std;
    511    1.1  augustss 		sc->sc_vframes[i].etd = std;
    512    1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    513    1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    514  1.152  augustss 		for (j = i;
    515  1.152  augustss 		     j < UHCI_FRAMELIST_COUNT;
    516    1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    517   1.88   tsutsui 			sc->sc_pframes[j] = htole32(std->physaddr);
    518    1.1  augustss 	}
    519  1.223    bouyer 	usb_syncmem(&sc->sc_dma, 0,
    520  1.223    bouyer 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    521  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
    522  1.223    bouyer 
    523    1.1  augustss 
    524    1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    525    1.1  augustss 
    526   1.76  augustss 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    527   1.76  augustss 
    528  1.248       mrg 	callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE);
    529  1.248       mrg 
    530  1.248       mrg 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    531  1.248       mrg 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
    532  1.248       mrg 	cv_init(&sc->sc_softwake_cv, "uhciab");
    533   1.96  augustss 
    534    1.1  augustss 	/* Set up the bus struct. */
    535   1.48  augustss 	sc->sc_bus.methods = &uhci_bus_methods;
    536    1.1  augustss 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    537    1.1  augustss 
    538  1.190  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    539  1.190  augustss 
    540    1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    541  1.225    bouyer 
    542  1.225    bouyer 	err =  uhci_run(sc, 1);		/* and here we go... */
    543  1.152  augustss 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    544    1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    545  1.225    bouyer 	return err;
    546   1.53  augustss }
    547   1.53  augustss 
    548   1.53  augustss int
    549  1.215    dyoung uhci_activate(device_t self, enum devact act)
    550   1.53  augustss {
    551  1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    552   1.53  augustss 
    553   1.53  augustss 	switch (act) {
    554   1.53  augustss 	case DVACT_DEACTIVATE:
    555  1.210  kiyohara 		sc->sc_dying = 1;
    556  1.230    dyoung 		return 0;
    557  1.230    dyoung 	default:
    558  1.230    dyoung 		return EOPNOTSUPP;
    559   1.53  augustss 	}
    560   1.53  augustss }
    561   1.53  augustss 
    562  1.215    dyoung void
    563  1.215    dyoung uhci_childdet(device_t self, device_t child)
    564  1.215    dyoung {
    565  1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    566  1.215    dyoung 
    567  1.215    dyoung 	KASSERT(sc->sc_child == child);
    568  1.215    dyoung 	sc->sc_child = NULL;
    569  1.215    dyoung }
    570  1.215    dyoung 
    571   1.53  augustss int
    572  1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    573   1.53  augustss {
    574   1.76  augustss 	usbd_xfer_handle xfer;
    575   1.53  augustss 	int rv = 0;
    576   1.53  augustss 
    577   1.53  augustss 	if (sc->sc_child != NULL)
    578   1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    579  1.152  augustss 
    580   1.53  augustss 	if (rv != 0)
    581   1.53  augustss 		return (rv);
    582   1.53  augustss 
    583   1.76  augustss 	/* Free all xfers associated with this HC. */
    584   1.76  augustss 	for (;;) {
    585   1.76  augustss 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    586   1.76  augustss 		if (xfer == NULL)
    587   1.76  augustss 			break;
    588  1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    589  1.248       mrg 		kmem_free(xfer, sizeof(struct uhci_xfer));
    590  1.152  augustss 	}
    591   1.76  augustss 
    592  1.226        ad 	callout_halt(&sc->sc_poll_handle, NULL);
    593  1.226        ad 	callout_destroy(&sc->sc_poll_handle);
    594  1.226        ad 
    595  1.248       mrg 	cv_destroy(&sc->sc_softwake_cv);
    596  1.248       mrg 
    597  1.248       mrg 	mutex_destroy(&sc->sc_lock);
    598  1.248       mrg 	mutex_destroy(&sc->sc_intr_lock);
    599  1.248       mrg 
    600   1.76  augustss 	/* XXX free other data structures XXX */
    601   1.53  augustss 
    602   1.53  augustss 	return (rv);
    603    1.1  augustss }
    604    1.1  augustss 
    605   1.48  augustss usbd_status
    606  1.119  augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    607   1.48  augustss {
    608  1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    609  1.183      fvdl 	usbd_status status;
    610  1.102  augustss 	u_int32_t n;
    611  1.102  augustss 
    612  1.152  augustss 	/*
    613  1.102  augustss 	 * XXX
    614  1.102  augustss 	 * Since we are allocating a buffer we can assume that we will
    615  1.148  augustss 	 * need TDs for it.  Since we don't want to allocate those from
    616  1.102  augustss 	 * an interrupt context, we allocate them here and free them again.
    617  1.102  augustss 	 * This is no guarantee that we'll get the TDs next time...
    618  1.102  augustss 	 */
    619  1.102  augustss 	n = size / 8;
    620  1.102  augustss 	if (n > 16) {
    621  1.102  augustss 		u_int32_t i;
    622  1.102  augustss 		uhci_soft_td_t **stds;
    623  1.248       mrg 
    624  1.102  augustss 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
    625  1.248       mrg 		stds = kmem_alloc(sizeof(uhci_soft_td_t *) * n, KM_SLEEP);
    626  1.248       mrg 		if (!stds)
    627  1.248       mrg 			return USBD_NOMEM;
    628  1.248       mrg 		for(i = 0; i < n; i++)
    629  1.102  augustss 			stds[i] = uhci_alloc_std(sc);
    630  1.248       mrg 		for(i = 0; i < n; i++)
    631  1.102  augustss 			if (stds[i] != NULL)
    632  1.102  augustss 				uhci_free_std(sc, stds[i]);
    633  1.248       mrg 		kmem_free(stds, sizeof(uhci_soft_td_t *) * n);
    634  1.102  augustss 	}
    635  1.102  augustss 
    636  1.183      fvdl 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
    637  1.183      fvdl 	if (status == USBD_NOMEM)
    638  1.183      fvdl 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
    639  1.183      fvdl 	return status;
    640   1.48  augustss }
    641   1.48  augustss 
    642   1.48  augustss void
    643  1.119  augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    644   1.48  augustss {
    645  1.183      fvdl 	if (dma->block->flags & USB_DMA_RESERVE) {
    646  1.183      fvdl 		usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
    647  1.183      fvdl 		    dma);
    648  1.183      fvdl 		return;
    649  1.183      fvdl 	}
    650   1.63  augustss 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
    651   1.76  augustss }
    652   1.76  augustss 
    653   1.76  augustss usbd_xfer_handle
    654  1.119  augustss uhci_allocx(struct usbd_bus *bus)
    655   1.76  augustss {
    656  1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    657   1.76  augustss 	usbd_xfer_handle xfer;
    658   1.76  augustss 
    659   1.76  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    660   1.94  augustss 	if (xfer != NULL) {
    661  1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    662   1.98  augustss #ifdef DIAGNOSTIC
    663   1.94  augustss 		if (xfer->busy_free != XFER_FREE) {
    664  1.105  augustss 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    665   1.94  augustss 			       xfer->busy_free);
    666   1.94  augustss 		}
    667   1.98  augustss #endif
    668   1.94  augustss 	} else {
    669  1.248       mrg 		xfer = kmem_alloc(sizeof(struct uhci_xfer), KM_SLEEP);
    670   1.94  augustss 	}
    671   1.92  augustss 	if (xfer != NULL) {
    672  1.238   tsutsui 		memset(xfer, 0, sizeof (struct uhci_xfer));
    673  1.238   tsutsui 		UXFER(xfer)->iinfo.sc = sc;
    674   1.92  augustss #ifdef DIAGNOSTIC
    675  1.238   tsutsui 		UXFER(xfer)->iinfo.isdone = 1;
    676  1.135  augustss 		xfer->busy_free = XFER_BUSY;
    677   1.92  augustss #endif
    678   1.92  augustss 	}
    679   1.76  augustss 	return (xfer);
    680   1.76  augustss }
    681   1.76  augustss 
    682   1.76  augustss void
    683  1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    684   1.76  augustss {
    685  1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    686   1.76  augustss 
    687   1.93  augustss #ifdef DIAGNOSTIC
    688   1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
    689   1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    690   1.94  augustss 		       xfer->busy_free);
    691   1.93  augustss 	}
    692   1.94  augustss 	xfer->busy_free = XFER_FREE;
    693  1.238   tsutsui 	if (!UXFER(xfer)->iinfo.isdone) {
    694   1.96  augustss 		printf("uhci_freex: !isdone\n");
    695  1.105  augustss 	}
    696   1.93  augustss #endif
    697   1.76  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    698   1.48  augustss }
    699   1.48  augustss 
    700  1.248       mrg Static void
    701  1.248       mrg uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
    702  1.248       mrg {
    703  1.248       mrg 	struct uhci_softc *sc = bus->hci_private;
    704  1.248       mrg 
    705  1.248       mrg 	*lock = &sc->sc_lock;
    706  1.248       mrg }
    707  1.248       mrg 
    708  1.248       mrg 
    709   1.72  augustss /*
    710  1.212  jmcneill  * Handle suspend/resume.
    711  1.212  jmcneill  *
    712  1.212  jmcneill  * We need to switch to polling mode here, because this routine is
    713  1.212  jmcneill  * called from an interrupt context.  This is all right since we
    714  1.212  jmcneill  * are almost suspended anyway.
    715   1.72  augustss  */
    716  1.212  jmcneill bool
    717  1.232    dyoung uhci_resume(device_t dv, const pmf_qual_t *qual)
    718   1.72  augustss {
    719  1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    720  1.212  jmcneill 	int cmd;
    721   1.72  augustss 
    722  1.248       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
    723  1.193  augustss 
    724  1.212  jmcneill 	cmd = UREAD2(sc, UHCI_CMD);
    725  1.193  augustss 	sc->sc_bus.use_polling++;
    726  1.214       smb 	UWRITE2(sc, UHCI_INTR, 0);
    727  1.214       smb 	uhci_globalreset(sc);
    728  1.214       smb 	uhci_reset(sc);
    729  1.212  jmcneill 	if (cmd & UHCI_CMD_RS)
    730  1.212  jmcneill 		uhci_run(sc, 0);
    731  1.212  jmcneill 
    732  1.212  jmcneill 	/* restore saved state */
    733  1.212  jmcneill 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    734  1.212  jmcneill 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    735  1.212  jmcneill 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    736  1.212  jmcneill 
    737  1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
    738  1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock);
    739  1.212  jmcneill 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    740  1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
    741  1.212  jmcneill 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
    742  1.214       smb 	UHCICMD(sc, UHCI_CMD_MAXP);
    743  1.212  jmcneill 	uhci_run(sc, 1); /* and start traffic again */
    744  1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock);
    745  1.193  augustss 	sc->sc_bus.use_polling--;
    746  1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    747  1.234    dyoung 		callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
    748  1.212  jmcneill 		    sc->sc_intr_xfer);
    749  1.212  jmcneill #ifdef UHCI_DEBUG
    750  1.212  jmcneill 	if (uhcidebug > 2)
    751  1.212  jmcneill 		uhci_dumpregs(sc);
    752  1.212  jmcneill #endif
    753  1.212  jmcneill 
    754  1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    755  1.248       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
    756  1.212  jmcneill 
    757  1.212  jmcneill 	return true;
    758   1.72  augustss }
    759   1.72  augustss 
    760  1.212  jmcneill bool
    761  1.232    dyoung uhci_suspend(device_t dv, const pmf_qual_t *qual)
    762   1.30  augustss {
    763  1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    764   1.30  augustss 	int cmd;
    765   1.30  augustss 
    766  1.248       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
    767  1.212  jmcneill 
    768   1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    769   1.30  augustss 
    770  1.212  jmcneill #ifdef UHCI_DEBUG
    771  1.212  jmcneill 	if (uhcidebug > 2)
    772  1.212  jmcneill 		uhci_dumpregs(sc);
    773  1.212  jmcneill #endif
    774  1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    775  1.234    dyoung 		callout_stop(&sc->sc_poll_handle);
    776  1.219  jmcneill 	sc->sc_suspend = PWR_SUSPEND;
    777  1.212  jmcneill 	sc->sc_bus.use_polling++;
    778  1.219  jmcneill 
    779  1.212  jmcneill 	uhci_run(sc, 0); /* stop the controller */
    780  1.212  jmcneill 	cmd &= ~UHCI_CMD_RS;
    781  1.212  jmcneill 
    782  1.212  jmcneill 	/* save some state if BIOS doesn't */
    783  1.212  jmcneill 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    784  1.212  jmcneill 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    785  1.212  jmcneill 
    786  1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    787   1.30  augustss 
    788  1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
    789  1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock);
    790  1.212  jmcneill 	sc->sc_bus.use_polling--;
    791   1.86  augustss 
    792  1.248       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
    793  1.212  jmcneill 
    794  1.212  jmcneill 	return true;
    795   1.30  augustss }
    796   1.30  augustss 
    797   1.59  augustss #ifdef UHCI_DEBUG
    798  1.101  augustss Static void
    799  1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
    800    1.1  augustss {
    801   1.48  augustss 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    802   1.48  augustss 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    803  1.216  drochner 		     device_xname(sc->sc_dev),
    804   1.48  augustss 		     UREAD2(sc, UHCI_CMD),
    805   1.48  augustss 		     UREAD2(sc, UHCI_STS),
    806   1.48  augustss 		     UREAD2(sc, UHCI_INTR),
    807   1.48  augustss 		     UREAD2(sc, UHCI_FRNUM),
    808   1.48  augustss 		     UREAD4(sc, UHCI_FLBASEADDR),
    809   1.48  augustss 		     UREAD1(sc, UHCI_SOF),
    810   1.48  augustss 		     UREAD2(sc, UHCI_PORTSC1),
    811   1.48  augustss 		     UREAD2(sc, UHCI_PORTSC2)));
    812    1.1  augustss }
    813    1.1  augustss 
    814    1.1  augustss void
    815  1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
    816    1.1  augustss {
    817  1.122        tv 	char sbuf[128], sbuf2[128];
    818  1.122        tv 
    819  1.242  jakllsch 
    820  1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    821  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    822   1.48  augustss 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    823   1.48  augustss 		     "token=0x%08lx buffer=0x%08lx\n",
    824   1.48  augustss 		     p, (long)p->physaddr,
    825   1.88   tsutsui 		     (long)le32toh(p->td.td_link),
    826   1.88   tsutsui 		     (long)le32toh(p->td.td_status),
    827   1.88   tsutsui 		     (long)le32toh(p->td.td_token),
    828   1.88   tsutsui 		     (long)le32toh(p->td.td_buffer)));
    829  1.122        tv 
    830  1.224  christos 	snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF",
    831  1.224  christos 	    (u_int32_t)le32toh(p->td.td_link));
    832  1.224  christos 	snprintb(sbuf2, sizeof(sbuf2),
    833  1.224  christos 	    "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    834  1.224  christos 	    "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    835  1.224  christos 	    (u_int32_t)le32toh(p->td.td_status));
    836  1.122        tv 
    837  1.122        tv 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    838  1.122        tv 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    839   1.88   tsutsui 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    840   1.88   tsutsui 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    841   1.88   tsutsui 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    842   1.88   tsutsui 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    843   1.88   tsutsui 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    844   1.88   tsutsui 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    845   1.88   tsutsui 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    846  1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    847  1.223    bouyer 	    BUS_DMASYNC_PREREAD);
    848    1.1  augustss }
    849    1.1  augustss 
    850    1.1  augustss void
    851  1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
    852    1.1  augustss {
    853  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    854  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    855   1.67  augustss 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    856   1.88   tsutsui 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    857   1.88   tsutsui 	    le32toh(sqh->qh.qh_elink)));
    858  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    859    1.1  augustss }
    860    1.1  augustss 
    861   1.13  augustss 
    862  1.110  augustss #if 1
    863    1.1  augustss void
    864  1.119  augustss uhci_dump(void)
    865    1.1  augustss {
    866  1.110  augustss 	uhci_dump_all(thesc);
    867  1.110  augustss }
    868  1.110  augustss #endif
    869    1.1  augustss 
    870  1.110  augustss void
    871  1.119  augustss uhci_dump_all(uhci_softc_t *sc)
    872  1.110  augustss {
    873    1.1  augustss 	uhci_dumpregs(sc);
    874   1.50  augustss 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
    875  1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    876  1.123  augustss 	uhci_dump_qh(sc->sc_lctl_start);
    877    1.1  augustss }
    878    1.1  augustss 
    879   1.67  augustss 
    880   1.67  augustss void
    881  1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
    882   1.67  augustss {
    883   1.67  augustss 	uhci_dump_qh(sqh);
    884   1.67  augustss 
    885   1.67  augustss 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    886   1.67  augustss 	 * Traverses sideways first, then down.
    887   1.67  augustss 	 *
    888   1.67  augustss 	 * QH1
    889   1.67  augustss 	 * QH2
    890   1.67  augustss 	 * No QH
    891   1.67  augustss 	 * TD2.1
    892   1.67  augustss 	 * TD2.2
    893   1.67  augustss 	 * TD1.1
    894   1.67  augustss 	 * etc.
    895   1.67  augustss 	 *
    896   1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    897   1.67  augustss 	 */
    898   1.67  augustss 
    899   1.67  augustss 
    900  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    901  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    902   1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    903   1.67  augustss 		uhci_dump_qhs(sqh->hlink);
    904   1.67  augustss 	else
    905   1.67  augustss 		DPRINTF(("No QH\n"));
    906  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    907   1.67  augustss 
    908   1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    909   1.67  augustss 		uhci_dump_tds(sqh->elink);
    910   1.67  augustss 	else
    911   1.67  augustss 		DPRINTF(("No TD\n"));
    912   1.67  augustss }
    913   1.67  augustss 
    914    1.1  augustss void
    915  1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
    916    1.1  augustss {
    917   1.67  augustss 	uhci_soft_td_t *td;
    918  1.223    bouyer 	int stop;
    919   1.67  augustss 
    920   1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
    921   1.67  augustss 		uhci_dump_td(td);
    922    1.1  augustss 
    923   1.67  augustss 		/* Check whether the link pointer in this TD marks
    924   1.67  augustss 		 * the link pointer as end of queue. This avoids
    925   1.67  augustss 		 * printing the free list in case the queue/TD has
    926   1.67  augustss 		 * already been moved there (seatbelt).
    927   1.67  augustss 		 */
    928  1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    929  1.223    bouyer 		    sizeof(td->td.td_link),
    930  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    931  1.223    bouyer 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    932  1.223    bouyer 			le32toh(td->td.td_link) == 0);
    933  1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    934  1.223    bouyer 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    935  1.223    bouyer 		if (stop)
    936   1.67  augustss 			break;
    937   1.67  augustss 	}
    938    1.1  augustss }
    939   1.92  augustss 
    940  1.101  augustss Static void
    941  1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
    942   1.92  augustss {
    943   1.95  augustss 	usbd_pipe_handle pipe;
    944   1.95  augustss 	usb_endpoint_descriptor_t *ed;
    945   1.95  augustss 	usbd_device_handle dev;
    946  1.152  augustss 
    947   1.98  augustss #ifdef DIAGNOSTIC
    948   1.98  augustss #define DONE ii->isdone
    949   1.98  augustss #else
    950   1.98  augustss #define DONE 0
    951   1.98  augustss #endif
    952   1.95  augustss         if (ii == NULL) {
    953   1.95  augustss                 printf("ii NULL\n");
    954   1.95  augustss                 return;
    955   1.95  augustss         }
    956   1.95  augustss         if (ii->xfer == NULL) {
    957   1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
    958   1.98  augustss 		       ii, DONE);
    959   1.95  augustss                 return;
    960   1.95  augustss         }
    961   1.95  augustss         pipe = ii->xfer->pipe;
    962   1.95  augustss         if (pipe == NULL) {
    963   1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    964   1.98  augustss 		       ii, DONE, ii->xfer);
    965  1.139  augustss                 return;
    966  1.139  augustss 	}
    967  1.139  augustss         if (pipe->endpoint == NULL) {
    968  1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
    969  1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    970  1.139  augustss                 return;
    971  1.139  augustss 	}
    972  1.139  augustss         if (pipe->device == NULL) {
    973  1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
    974  1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    975   1.95  augustss                 return;
    976   1.95  augustss 	}
    977   1.95  augustss         ed = pipe->endpoint->edesc;
    978   1.95  augustss         dev = pipe->device;
    979  1.152  augustss 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    980  1.152  augustss 	       ii, DONE, ii->xfer, dev,
    981   1.95  augustss 	       UGETW(dev->ddesc.idVendor),
    982   1.92  augustss 	       UGETW(dev->ddesc.idProduct),
    983   1.92  augustss 	       dev->address, pipe,
    984   1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
    985   1.98  augustss #undef DONE
    986   1.92  augustss }
    987   1.92  augustss 
    988  1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
    989   1.92  augustss void
    990  1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
    991   1.92  augustss {
    992   1.92  augustss 	uhci_intr_info_t *ii;
    993   1.92  augustss 
    994   1.92  augustss 	printf("intr_info list:\n");
    995   1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
    996   1.92  augustss 		uhci_dump_ii(ii);
    997   1.92  augustss }
    998   1.92  augustss 
    999  1.120  augustss void iidump(void);
   1000  1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
   1001   1.92  augustss 
   1002    1.1  augustss #endif
   1003    1.1  augustss 
   1004    1.1  augustss /*
   1005    1.1  augustss  * This routine is executed periodically and simulates interrupts
   1006    1.1  augustss  * from the root controller interrupt pipe for port status change.
   1007    1.1  augustss  */
   1008    1.1  augustss void
   1009  1.119  augustss uhci_poll_hub(void *addr)
   1010    1.1  augustss {
   1011   1.63  augustss 	usbd_xfer_handle xfer = addr;
   1012   1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   1013  1.227    martin 	uhci_softc_t *sc;
   1014    1.1  augustss 	u_char *p;
   1015    1.1  augustss 
   1016   1.96  augustss 	DPRINTFN(20, ("uhci_poll_hub\n"));
   1017    1.1  augustss 
   1018  1.228    martin 	if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL))
   1019  1.228    martin 		return;	/* device has detached */
   1020  1.227    martin 	sc = pipe->device->bus->hci_private;
   1021  1.234    dyoung 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1022   1.41  augustss 
   1023  1.159  augustss 	p = KERNADDR(&xfer->dmabuf, 0);
   1024    1.1  augustss 	p[0] = 0;
   1025    1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1026    1.1  augustss 		p[0] |= 1<<1;
   1027    1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1028    1.1  augustss 		p[0] |= 1<<2;
   1029   1.41  augustss 	if (p[0] == 0)
   1030   1.41  augustss 		/* No change, try again in a while */
   1031   1.41  augustss 		return;
   1032   1.41  augustss 
   1033   1.63  augustss 	xfer->actlen = 1;
   1034   1.63  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
   1035  1.248       mrg 	mutex_enter(&sc->sc_lock);
   1036   1.63  augustss 	usb_transfer_complete(xfer);
   1037  1.248       mrg 	mutex_exit(&sc->sc_lock);
   1038   1.41  augustss }
   1039   1.41  augustss 
   1040   1.41  augustss void
   1041  1.205  christos uhci_root_intr_done(usbd_xfer_handle xfer)
   1042   1.84  augustss {
   1043   1.84  augustss }
   1044   1.84  augustss 
   1045   1.84  augustss void
   1046  1.205  christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
   1047   1.41  augustss {
   1048    1.1  augustss }
   1049    1.1  augustss 
   1050  1.123  augustss /*
   1051  1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
   1052  1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
   1053  1.123  augustss  * USB performance a lot for some devices.
   1054  1.123  augustss  * If we are already looping, just count it.
   1055  1.123  augustss  */
   1056    1.1  augustss void
   1057  1.123  augustss uhci_add_loop(uhci_softc_t *sc) {
   1058  1.125  augustss #ifdef UHCI_DEBUG
   1059  1.125  augustss 	if (uhcinoloop)
   1060  1.125  augustss 		return;
   1061  1.125  augustss #endif
   1062  1.123  augustss 	if (++sc->sc_loops == 1) {
   1063  1.125  augustss 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1064  1.123  augustss 		/* Note, we don't loop back the soft pointer. */
   1065  1.152  augustss 		sc->sc_last_qh->qh.qh_hlink =
   1066  1.123  augustss 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1067  1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1068  1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1069  1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1070  1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1071  1.123  augustss 	}
   1072  1.123  augustss }
   1073  1.123  augustss 
   1074  1.123  augustss void
   1075  1.123  augustss uhci_rem_loop(uhci_softc_t *sc) {
   1076  1.125  augustss #ifdef UHCI_DEBUG
   1077  1.125  augustss 	if (uhcinoloop)
   1078  1.125  augustss 		return;
   1079  1.125  augustss #endif
   1080  1.123  augustss 	if (--sc->sc_loops == 0) {
   1081  1.123  augustss 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1082  1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1083  1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1084  1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1085  1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1086  1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1087  1.123  augustss 	}
   1088  1.123  augustss }
   1089  1.123  augustss 
   1090  1.248       mrg /* Add high speed control QH, called with lock held. */
   1091  1.123  augustss void
   1092  1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1093    1.1  augustss {
   1094   1.42  augustss 	uhci_soft_qh_t *eqh;
   1095    1.1  augustss 
   1096  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1097  1.248       mrg 
   1098    1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1099  1.123  augustss 	eqh = sc->sc_hctl_end;
   1100  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1101  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   1102  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   1103   1.42  augustss 	sqh->hlink       = eqh->hlink;
   1104   1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1105  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1106  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1107   1.42  augustss 	eqh->hlink       = sqh;
   1108  1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1109  1.123  augustss 	sc->sc_hctl_end = sqh;
   1110  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1111  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1112  1.125  augustss #ifdef UHCI_CTL_LOOP
   1113  1.123  augustss 	uhci_add_loop(sc);
   1114  1.125  augustss #endif
   1115    1.1  augustss }
   1116    1.1  augustss 
   1117  1.248       mrg /* Remove high speed control QH, called with lock held. */
   1118    1.1  augustss void
   1119  1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1120    1.1  augustss {
   1121    1.1  augustss 	uhci_soft_qh_t *pqh;
   1122    1.1  augustss 
   1123  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1124  1.248       mrg 
   1125  1.123  augustss 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1126  1.125  augustss #ifdef UHCI_CTL_LOOP
   1127  1.123  augustss 	uhci_rem_loop(sc);
   1128  1.125  augustss #endif
   1129  1.124  augustss 	/*
   1130  1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1131  1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1132  1.124  augustss 	 * the transferred packet was short so that the QH still points
   1133  1.124  augustss 	 * at the last used TD.
   1134  1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1135  1.124  augustss 	 * to stop looking at the TD.
   1136  1.223    bouyer 	 * Note that if the TD chain is large enough, the controller
   1137  1.223    bouyer 	 * may still be looking at the chain at the end of this function.
   1138  1.223    bouyer 	 * uhci_free_std_chain() will make sure the controller stops
   1139  1.223    bouyer 	 * looking at it quickly, but until then we should not change
   1140  1.223    bouyer 	 * sqh->hlink.
   1141  1.124  augustss 	 */
   1142  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1143  1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1144  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1145  1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1146  1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1147  1.223    bouyer 		usb_syncmem(&sqh->dma,
   1148  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1149  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1150  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1151  1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1152  1.124  augustss 	}
   1153  1.124  augustss 
   1154  1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1155  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1156  1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1157  1.152  augustss 	pqh->hlink = sqh->hlink;
   1158   1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1159  1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1160  1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1161  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1162  1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1163  1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1164  1.123  augustss 		sc->sc_hctl_end = pqh;
   1165  1.123  augustss }
   1166  1.123  augustss 
   1167  1.248       mrg /* Add low speed control QH, called with lock held. */
   1168  1.123  augustss void
   1169  1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1170  1.123  augustss {
   1171  1.123  augustss 	uhci_soft_qh_t *eqh;
   1172  1.123  augustss 
   1173  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1174  1.248       mrg 
   1175  1.123  augustss 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1176  1.123  augustss 	eqh = sc->sc_lctl_end;
   1177  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1178  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1179  1.152  augustss 	sqh->hlink = eqh->hlink;
   1180  1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1181  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1182  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1183  1.152  augustss 	eqh->hlink = sqh;
   1184  1.123  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1185  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1186  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1187  1.123  augustss 	sc->sc_lctl_end = sqh;
   1188  1.123  augustss }
   1189  1.123  augustss 
   1190  1.248       mrg /* Remove low speed control QH, called with lock held. */
   1191  1.123  augustss void
   1192  1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1193  1.123  augustss {
   1194  1.123  augustss 	uhci_soft_qh_t *pqh;
   1195  1.123  augustss 
   1196  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1197  1.248       mrg 
   1198  1.123  augustss 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1199  1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1200  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1201  1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1202  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1203  1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1204  1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1205  1.223    bouyer 		usb_syncmem(&sqh->dma,
   1206  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1207  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1208  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1209  1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1210  1.124  augustss 	}
   1211  1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1212  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1213  1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1214  1.152  augustss 	pqh->hlink = sqh->hlink;
   1215  1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1216  1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1217  1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1218  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1219  1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1220  1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1221  1.123  augustss 		sc->sc_lctl_end = pqh;
   1222    1.1  augustss }
   1223    1.1  augustss 
   1224  1.248       mrg /* Add bulk QH, called with lock held. */
   1225    1.1  augustss void
   1226  1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1227    1.1  augustss {
   1228   1.42  augustss 	uhci_soft_qh_t *eqh;
   1229    1.1  augustss 
   1230  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1231  1.248       mrg 
   1232    1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1233   1.42  augustss 	eqh = sc->sc_bulk_end;
   1234  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1235  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1236  1.152  augustss 	sqh->hlink = eqh->hlink;
   1237   1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1238  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1239  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1240  1.152  augustss 	eqh->hlink = sqh;
   1241  1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1242  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1243  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1244    1.1  augustss 	sc->sc_bulk_end = sqh;
   1245  1.123  augustss 	uhci_add_loop(sc);
   1246    1.1  augustss }
   1247    1.1  augustss 
   1248  1.248       mrg /* Remove bulk QH, called with lock held. */
   1249    1.1  augustss void
   1250  1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1251    1.1  augustss {
   1252    1.1  augustss 	uhci_soft_qh_t *pqh;
   1253    1.1  augustss 
   1254  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1255  1.248       mrg 
   1256    1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1257  1.123  augustss 	uhci_rem_loop(sc);
   1258  1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1259  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1260  1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1261  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1262  1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1263  1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1264  1.223    bouyer 		usb_syncmem(&sqh->dma,
   1265  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1266  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1267  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1268  1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1269  1.124  augustss 	}
   1270   1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1271  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1272  1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1273   1.42  augustss 	pqh->hlink       = sqh->hlink;
   1274   1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1275  1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1276  1.223    bouyer 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1277  1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1278    1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1279    1.1  augustss 		sc->sc_bulk_end = pqh;
   1280    1.1  augustss }
   1281    1.1  augustss 
   1282  1.141  augustss Static int uhci_intr1(uhci_softc_t *);
   1283  1.141  augustss 
   1284    1.1  augustss int
   1285  1.119  augustss uhci_intr(void *arg)
   1286    1.1  augustss {
   1287   1.44  augustss 	uhci_softc_t *sc = arg;
   1288  1.248       mrg 	int ret = 0;
   1289  1.248       mrg 
   1290  1.248       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1291  1.146  augustss 
   1292  1.216  drochner 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1293  1.248       mrg 		goto done;
   1294  1.141  augustss 
   1295  1.225    bouyer 	if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) {
   1296  1.141  augustss #ifdef DIAGNOSTIC
   1297  1.179   mycroft 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
   1298  1.141  augustss #endif
   1299  1.248       mrg 		goto done;
   1300  1.141  augustss 	}
   1301  1.179   mycroft 
   1302  1.248       mrg 	ret = uhci_intr1(sc);
   1303  1.248       mrg 
   1304  1.248       mrg  done:
   1305  1.248       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1306  1.248       mrg 	return ret;
   1307  1.141  augustss }
   1308  1.141  augustss 
   1309  1.141  augustss int
   1310  1.141  augustss uhci_intr1(uhci_softc_t *sc)
   1311  1.141  augustss {
   1312   1.44  augustss 	int status;
   1313   1.44  augustss 	int ack;
   1314    1.1  augustss 
   1315   1.67  augustss #ifdef UHCI_DEBUG
   1316   1.44  augustss 	if (uhcidebug > 15) {
   1317  1.216  drochner 		DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
   1318    1.1  augustss 		uhci_dumpregs(sc);
   1319    1.1  augustss 	}
   1320    1.1  augustss #endif
   1321  1.117  augustss 
   1322  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1323  1.248       mrg 
   1324  1.153  augustss 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1325  1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1326  1.127     soren 		return (0);
   1327  1.127     soren 
   1328  1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1329  1.201  jmcneill #ifdef DIAGNOSTIC
   1330  1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1331  1.216  drochner 		       device_xname(sc->sc_dev));
   1332  1.201  jmcneill #endif
   1333  1.134  augustss 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1334  1.117  augustss 		return (0);
   1335  1.117  augustss 	}
   1336   1.44  augustss 
   1337   1.44  augustss 	ack = 0;
   1338   1.44  augustss 	if (status & UHCI_STS_USBINT)
   1339   1.44  augustss 		ack |= UHCI_STS_USBINT;
   1340   1.44  augustss 	if (status & UHCI_STS_USBEI)
   1341   1.44  augustss 		ack |= UHCI_STS_USBEI;
   1342    1.1  augustss 	if (status & UHCI_STS_RD) {
   1343   1.44  augustss 		ack |= UHCI_STS_RD;
   1344  1.118  augustss #ifdef UHCI_DEBUG
   1345  1.216  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1346  1.118  augustss #endif
   1347    1.1  augustss 	}
   1348    1.1  augustss 	if (status & UHCI_STS_HSE) {
   1349   1.44  augustss 		ack |= UHCI_STS_HSE;
   1350  1.216  drochner 		printf("%s: host system error\n", device_xname(sc->sc_dev));
   1351    1.1  augustss 	}
   1352    1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1353   1.44  augustss 		ack |= UHCI_STS_HCPE;
   1354  1.152  augustss 		printf("%s: host controller process error\n",
   1355  1.216  drochner 		       device_xname(sc->sc_dev));
   1356   1.44  augustss 	}
   1357  1.233   msaitoh 
   1358  1.233   msaitoh 	/* When HCHalted=1 and Run/Stop=0 , it is normal */
   1359  1.233   msaitoh 	if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) {
   1360   1.44  augustss 		/* no acknowledge needed */
   1361  1.136  augustss 		if (!sc->sc_dying) {
   1362  1.152  augustss 			printf("%s: host controller halted\n",
   1363  1.216  drochner 			    device_xname(sc->sc_dev));
   1364  1.110  augustss #ifdef UHCI_DEBUG
   1365  1.136  augustss 			uhci_dump_all(sc);
   1366  1.110  augustss #endif
   1367  1.136  augustss 		}
   1368  1.136  augustss 		sc->sc_dying = 1;
   1369    1.1  augustss 	}
   1370   1.44  augustss 
   1371  1.132  augustss 	if (!ack)
   1372  1.132  augustss 		return (0);	/* nothing to acknowledge */
   1373  1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1374    1.1  augustss 
   1375   1.85  augustss 	sc->sc_bus.no_intrs++;
   1376   1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1377   1.85  augustss 
   1378  1.216  drochner 	DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
   1379   1.85  augustss 
   1380   1.85  augustss 	return (1);
   1381   1.85  augustss }
   1382   1.85  augustss 
   1383   1.85  augustss void
   1384  1.133  augustss uhci_softintr(void *v)
   1385   1.85  augustss {
   1386  1.216  drochner 	struct usbd_bus *bus = v;
   1387  1.216  drochner 	uhci_softc_t *sc = bus->hci_private;
   1388  1.178    martin 	uhci_intr_info_t *ii, *nextii;
   1389   1.85  augustss 
   1390  1.248       mrg 	KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
   1391  1.248       mrg 
   1392  1.247       mrg 	DPRINTFN(10,("%s: uhci_softintr\n", device_xname(sc->sc_dev)));
   1393   1.50  augustss 
   1394    1.1  augustss 	/*
   1395    1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1396    1.1  augustss 	 * interrupts because a transfer is completed there is no
   1397    1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1398    1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1399    1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1400    1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1401    1.1  augustss 	 * output on a slow console).
   1402    1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1403    1.1  augustss 	 * completed.
   1404    1.1  augustss 	 */
   1405  1.178    martin 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1406  1.178    martin 		nextii = LIST_NEXT(ii, list);
   1407    1.1  augustss 		uhci_check_intr(sc, ii);
   1408  1.178    martin 	}
   1409    1.1  augustss 
   1410  1.153  augustss 	if (sc->sc_softwake) {
   1411  1.153  augustss 		sc->sc_softwake = 0;
   1412  1.248       mrg 		cv_broadcast(&sc->sc_softwake_cv);
   1413  1.153  augustss 	}
   1414    1.1  augustss }
   1415    1.1  augustss 
   1416    1.1  augustss /* Check for an interrupt. */
   1417    1.1  augustss void
   1418  1.205  christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1419    1.1  augustss {
   1420    1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1421   1.18  augustss 	u_int32_t status;
   1422    1.1  augustss 
   1423    1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1424    1.1  augustss #ifdef DIAGNOSTIC
   1425   1.63  augustss 	if (ii == NULL) {
   1426    1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1427    1.1  augustss 		return;
   1428    1.1  augustss 	}
   1429    1.1  augustss #endif
   1430  1.155  augustss 	if (ii->xfer->status == USBD_CANCELLED ||
   1431  1.155  augustss 	    ii->xfer->status == USBD_TIMEOUT) {
   1432  1.155  augustss 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1433  1.155  augustss 		return;
   1434  1.155  augustss 	}
   1435  1.155  augustss 
   1436   1.63  augustss 	if (ii->stdstart == NULL)
   1437    1.1  augustss 		return;
   1438    1.1  augustss 	lstd = ii->stdend;
   1439    1.1  augustss #ifdef DIAGNOSTIC
   1440   1.63  augustss 	if (lstd == NULL) {
   1441    1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1442    1.1  augustss 		return;
   1443    1.1  augustss 	}
   1444    1.1  augustss #endif
   1445  1.152  augustss 	/*
   1446   1.26  augustss 	 * If the last TD is still active we need to check whether there
   1447  1.186     skrll 	 * is an error somewhere in the middle, or whether there was a
   1448   1.26  augustss 	 * short packet (SPD and not ACTIVE).
   1449   1.26  augustss 	 */
   1450  1.223    bouyer 	usb_syncmem(&lstd->dma,
   1451  1.223    bouyer 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1452  1.223    bouyer 	    sizeof(lstd->td.td_status),
   1453  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1454   1.88   tsutsui 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1455   1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1456   1.48  augustss 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1457  1.223    bouyer 			usb_syncmem(&std->dma,
   1458  1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1459  1.223    bouyer 			    sizeof(std->td.td_status),
   1460  1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1461   1.88   tsutsui 			status = le32toh(std->td.td_status);
   1462  1.223    bouyer 			usb_syncmem(&std->dma,
   1463  1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1464  1.223    bouyer 			    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1465   1.83  augustss 			/* If there's an active TD the xfer isn't done. */
   1466   1.83  augustss 			if (status & UHCI_TD_ACTIVE)
   1467   1.83  augustss 				break;
   1468   1.83  augustss 			/* Any kind of error makes the xfer done. */
   1469   1.83  augustss 			if (status & UHCI_TD_STALLED)
   1470   1.83  augustss 				goto done;
   1471   1.83  augustss 			/* We want short packets, and it is short: it's done */
   1472  1.223    bouyer 			usb_syncmem(&std->dma,
   1473  1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_token),
   1474  1.223    bouyer 			    sizeof(std->td.td_token),
   1475  1.223    bouyer 			    BUS_DMASYNC_POSTWRITE);
   1476   1.83  augustss 			if ((status & UHCI_TD_SPD) &&
   1477  1.152  augustss 			      UHCI_TD_GET_ACTLEN(status) <
   1478   1.88   tsutsui 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1479    1.1  augustss 				goto done;
   1480   1.18  augustss 		}
   1481   1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1482   1.18  augustss 			      ii, ii->stdstart));
   1483  1.223    bouyer 		usb_syncmem(&lstd->dma,
   1484  1.223    bouyer 		    lstd->offs + offsetof(uhci_td_t, td_status),
   1485  1.223    bouyer 		    sizeof(lstd->td.td_status),
   1486  1.223    bouyer 		    BUS_DMASYNC_PREREAD);
   1487    1.1  augustss 		return;
   1488    1.1  augustss 	}
   1489    1.1  augustss  done:
   1490   1.92  augustss 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1491  1.234    dyoung 	callout_stop(&ii->xfer->timeout_handle);
   1492   1.36  augustss 	uhci_idone(ii);
   1493    1.1  augustss }
   1494    1.1  augustss 
   1495  1.248       mrg /* Called with USB lock held. */
   1496    1.1  augustss void
   1497  1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1498    1.1  augustss {
   1499   1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1500   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1501  1.248       mrg #ifdef DIAGNOSTIC
   1502  1.248       mrg 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   1503  1.248       mrg #endif
   1504    1.1  augustss 	uhci_soft_td_t *std;
   1505   1.67  augustss 	u_int32_t status = 0, nstatus;
   1506   1.26  augustss 	int actlen;
   1507    1.1  augustss 
   1508  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1509  1.248       mrg 
   1510  1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1511    1.7  augustss #ifdef DIAGNOSTIC
   1512    1.7  augustss 	{
   1513  1.248       mrg 		/* XXX SMP? */
   1514    1.7  augustss 		int s = splhigh();
   1515    1.7  augustss 		if (ii->isdone) {
   1516   1.26  augustss 			splx(s);
   1517   1.92  augustss #ifdef UHCI_DEBUG
   1518   1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1519   1.92  augustss 			uhci_dump_ii(ii);
   1520   1.92  augustss #else
   1521   1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1522   1.92  augustss #endif
   1523    1.7  augustss 			return;
   1524    1.7  augustss 		}
   1525    1.7  augustss 		ii->isdone = 1;
   1526    1.7  augustss 		splx(s);
   1527    1.7  augustss 	}
   1528    1.7  augustss #endif
   1529   1.48  augustss 
   1530   1.63  augustss 	if (xfer->nframes != 0) {
   1531   1.48  augustss 		/* Isoc transfer, do things differently. */
   1532   1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1533  1.126  augustss 		int i, n, nframes, len;
   1534   1.48  augustss 
   1535   1.48  augustss 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1536   1.48  augustss 
   1537   1.63  augustss 		nframes = xfer->nframes;
   1538   1.48  augustss 		actlen = 0;
   1539   1.92  augustss 		n = UXFER(xfer)->curframe;
   1540   1.48  augustss 		for (i = 0; i < nframes; i++) {
   1541   1.48  augustss 			std = stds[n];
   1542   1.59  augustss #ifdef UHCI_DEBUG
   1543   1.48  augustss 			if (uhcidebug > 5) {
   1544   1.48  augustss 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1545   1.48  augustss 				uhci_dump_td(std);
   1546   1.48  augustss 			}
   1547   1.48  augustss #endif
   1548   1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1549   1.48  augustss 				n = 0;
   1550  1.223    bouyer 			usb_syncmem(&std->dma,
   1551  1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1552  1.223    bouyer 			    sizeof(std->td.td_status),
   1553  1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1554   1.88   tsutsui 			status = le32toh(std->td.td_status);
   1555  1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1556  1.126  augustss 			xfer->frlengths[i] = len;
   1557  1.126  augustss 			actlen += len;
   1558   1.48  augustss 		}
   1559   1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1560   1.63  augustss 		xfer->actlen = actlen;
   1561   1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1562  1.140  augustss 		goto end;
   1563   1.48  augustss 	}
   1564   1.48  augustss 
   1565   1.59  augustss #ifdef UHCI_DEBUG
   1566   1.65  augustss 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1567   1.65  augustss 		      ii, xfer, upipe));
   1568   1.48  augustss 	if (uhcidebug > 10)
   1569   1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1570   1.48  augustss #endif
   1571   1.48  augustss 
   1572   1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1573   1.26  augustss 	actlen = 0;
   1574   1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1575  1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1576  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1577   1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1578   1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1579   1.26  augustss 			break;
   1580   1.67  augustss 
   1581   1.64  augustss 		status = nstatus;
   1582   1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1583   1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1584   1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1585  1.176   mycroft 		else {
   1586  1.176   mycroft 			/*
   1587  1.176   mycroft 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1588  1.176   mycroft 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1589  1.176   mycroft 			 * CONTROL AND STATUS".
   1590  1.176   mycroft 			 */
   1591  1.176   mycroft 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1592  1.176   mycroft 				status &= ~UHCI_TD_CRCTO;
   1593  1.176   mycroft 		}
   1594    1.1  augustss 	}
   1595   1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1596   1.63  augustss 	if (std != NULL)
   1597   1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1598   1.38  augustss 
   1599    1.1  augustss 	status &= UHCI_TD_ERROR;
   1600  1.152  augustss 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1601   1.26  augustss 		      actlen, status));
   1602   1.63  augustss 	xfer->actlen = actlen;
   1603    1.1  augustss 	if (status != 0) {
   1604  1.122        tv #ifdef UHCI_DEBUG
   1605  1.122        tv 		char sbuf[128];
   1606  1.122        tv 
   1607  1.224  christos 		snprintb(sbuf, sizeof(sbuf),
   1608  1.224  christos 		    "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1609  1.224  christos 		    "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status);
   1610  1.122        tv 
   1611   1.75  augustss 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1612   1.36  augustss 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1613  1.122        tv 			  "status 0x%s\n",
   1614   1.63  augustss 			  xfer->pipe->device->address,
   1615   1.63  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1616  1.122        tv 			  sbuf));
   1617  1.122        tv #endif
   1618  1.122        tv 
   1619    1.1  augustss 		if (status == UHCI_TD_STALLED)
   1620   1.63  augustss 			xfer->status = USBD_STALLED;
   1621    1.1  augustss 		else
   1622   1.63  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
   1623    1.1  augustss 	} else {
   1624   1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1625    1.1  augustss 	}
   1626  1.140  augustss 
   1627  1.140  augustss  end:
   1628   1.63  augustss 	usb_transfer_complete(xfer);
   1629  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1630  1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1631    1.1  augustss }
   1632    1.1  augustss 
   1633   1.13  augustss /*
   1634   1.13  augustss  * Called when a request does not complete.
   1635   1.13  augustss  */
   1636    1.1  augustss void
   1637  1.119  augustss uhci_timeout(void *addr)
   1638    1.1  augustss {
   1639    1.1  augustss 	uhci_intr_info_t *ii = addr;
   1640  1.153  augustss 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1641  1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1642  1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   1643  1.153  augustss 
   1644  1.153  augustss 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1645  1.153  augustss 
   1646  1.153  augustss 	if (sc->sc_dying) {
   1647  1.248       mrg 		mutex_enter(&sc->sc_lock);
   1648  1.153  augustss 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1649  1.248       mrg 		mutex_exit(&sc->sc_lock);
   1650  1.153  augustss 		return;
   1651  1.153  augustss 	}
   1652    1.1  augustss 
   1653  1.153  augustss 	/* Execute the abort in a process context. */
   1654  1.238   tsutsui 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
   1655  1.204     joerg 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
   1656  1.204     joerg 	    USB_TASKQ_HC);
   1657  1.153  augustss }
   1658   1.51  augustss 
   1659  1.153  augustss void
   1660  1.153  augustss uhci_timeout_task(void *addr)
   1661  1.153  augustss {
   1662  1.153  augustss 	usbd_xfer_handle xfer = addr;
   1663  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   1664  1.153  augustss 
   1665  1.153  augustss 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1666   1.67  augustss 
   1667  1.248       mrg 	mutex_enter(&sc->sc_lock);
   1668  1.153  augustss 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1669  1.248       mrg 	mutex_exit(&sc->sc_lock);
   1670    1.1  augustss }
   1671    1.1  augustss 
   1672    1.1  augustss /*
   1673    1.1  augustss  * Wait here until controller claims to have an interrupt.
   1674    1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1675    1.1  augustss  * too long.
   1676   1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1677    1.1  augustss  */
   1678    1.1  augustss void
   1679  1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1680    1.1  augustss {
   1681   1.63  augustss 	int timo = xfer->timeout;
   1682   1.13  augustss 	uhci_intr_info_t *ii;
   1683   1.13  augustss 
   1684  1.248       mrg 	mutex_enter(&sc->sc_lock);
   1685  1.248       mrg 
   1686   1.26  augustss 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1687    1.1  augustss 
   1688   1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   1689   1.26  augustss 	for (; timo >= 0; timo--) {
   1690  1.248       mrg 		usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_lock);
   1691   1.26  augustss 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1692    1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1693  1.248       mrg 			mutex_spin_enter(&sc->sc_intr_lock);
   1694  1.141  augustss 			uhci_intr1(sc);
   1695  1.248       mrg 			mutex_spin_exit(&sc->sc_intr_lock);
   1696   1.63  augustss 			if (xfer->status != USBD_IN_PROGRESS)
   1697  1.248       mrg 				goto done;
   1698    1.1  augustss 		}
   1699    1.1  augustss 	}
   1700   1.13  augustss 
   1701   1.13  augustss 	/* Timeout */
   1702   1.13  augustss 	DPRINTF(("uhci_waitintr: timeout\n"));
   1703   1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1704  1.152  augustss 	     ii != NULL && ii->xfer != xfer;
   1705   1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1706   1.13  augustss 		;
   1707   1.41  augustss #ifdef DIAGNOSTIC
   1708   1.63  augustss 	if (ii == NULL)
   1709  1.163    provos 		panic("uhci_waitintr: lost intr_info");
   1710   1.41  augustss #endif
   1711   1.41  augustss 	uhci_idone(ii);
   1712  1.248       mrg 
   1713  1.248       mrg done:
   1714  1.248       mrg 	mutex_exit(&sc->sc_lock);
   1715    1.1  augustss }
   1716    1.1  augustss 
   1717    1.8  augustss void
   1718  1.119  augustss uhci_poll(struct usbd_bus *bus)
   1719    1.8  augustss {
   1720  1.216  drochner 	uhci_softc_t *sc = bus->hci_private;
   1721    1.8  augustss 
   1722  1.248       mrg 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1723  1.248       mrg 		mutex_spin_enter(&sc->sc_intr_lock);
   1724  1.141  augustss 		uhci_intr1(sc);
   1725  1.248       mrg 		mutex_spin_exit(&sc->sc_intr_lock);
   1726  1.248       mrg 	}
   1727    1.8  augustss }
   1728    1.8  augustss 
   1729    1.1  augustss void
   1730  1.119  augustss uhci_reset(uhci_softc_t *sc)
   1731    1.1  augustss {
   1732    1.1  augustss 	int n;
   1733    1.1  augustss 
   1734    1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1735    1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1736  1.152  augustss 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1737    1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1738   1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1739    1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1740  1.152  augustss 		printf("%s: controller did not reset\n",
   1741  1.216  drochner 		       device_xname(sc->sc_dev));
   1742    1.1  augustss }
   1743    1.1  augustss 
   1744   1.16  augustss usbd_status
   1745  1.119  augustss uhci_run(uhci_softc_t *sc, int run)
   1746    1.1  augustss {
   1747  1.248       mrg 	int n, running;
   1748   1.71  augustss 	u_int16_t cmd;
   1749    1.1  augustss 
   1750    1.1  augustss 	run = run != 0;
   1751  1.248       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1752   1.30  augustss 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1753   1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1754   1.71  augustss 	if (run)
   1755   1.71  augustss 		cmd |= UHCI_CMD_RS;
   1756   1.71  augustss 	else
   1757   1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1758   1.71  augustss 	UHCICMD(sc, cmd);
   1759   1.13  augustss 	for(n = 0; n < 10; n++) {
   1760    1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1761    1.1  augustss 		/* return when we've entered the state we want */
   1762    1.1  augustss 		if (run == running) {
   1763  1.248       mrg 			mutex_spin_exit(&sc->sc_intr_lock);
   1764   1.30  augustss 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1765   1.30  augustss 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1766   1.16  augustss 			return (USBD_NORMAL_COMPLETION);
   1767    1.1  augustss 		}
   1768  1.248       mrg 		usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock);
   1769    1.1  augustss 	}
   1770  1.248       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1771  1.216  drochner 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
   1772   1.14  augustss 	       run ? "start" : "stop");
   1773   1.16  augustss 	return (USBD_IOERROR);
   1774    1.1  augustss }
   1775    1.1  augustss 
   1776    1.1  augustss /*
   1777    1.1  augustss  * Memory management routines.
   1778    1.1  augustss  *  uhci_alloc_std allocates TDs
   1779    1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1780    1.7  augustss  * These two routines do their own free list management,
   1781    1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1782    1.1  augustss  * has page size granularaity so much memory would be wasted if
   1783   1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1784    1.1  augustss  */
   1785    1.1  augustss 
   1786    1.1  augustss uhci_soft_td_t *
   1787  1.119  augustss uhci_alloc_std(uhci_softc_t *sc)
   1788    1.1  augustss {
   1789    1.1  augustss 	uhci_soft_td_t *std;
   1790   1.63  augustss 	usbd_status err;
   1791   1.42  augustss 	int i, offs;
   1792    1.7  augustss 	usb_dma_t dma;
   1793    1.1  augustss 
   1794   1.63  augustss 	if (sc->sc_freetds == NULL) {
   1795    1.1  augustss 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1796   1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1797   1.63  augustss 			  UHCI_TD_ALIGN, &dma);
   1798   1.63  augustss 		if (err)
   1799   1.16  augustss 			return (0);
   1800  1.248       mrg 		for (i = 0; i < UHCI_STD_CHUNK; i++) {
   1801   1.42  augustss 			offs = i * UHCI_STD_SIZE;
   1802  1.159  augustss 			std = KERNADDR(&dma, offs);
   1803  1.160  augustss 			std->physaddr = DMAADDR(&dma, offs);
   1804  1.223    bouyer 			std->dma = dma;
   1805  1.223    bouyer 			std->offs = offs;
   1806   1.42  augustss 			std->link.std = sc->sc_freetds;
   1807    1.1  augustss 			sc->sc_freetds = std;
   1808    1.1  augustss 		}
   1809    1.1  augustss 	}
   1810    1.1  augustss 	std = sc->sc_freetds;
   1811   1.42  augustss 	sc->sc_freetds = std->link.std;
   1812   1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1813    1.1  augustss 	return std;
   1814    1.1  augustss }
   1815    1.1  augustss 
   1816    1.1  augustss void
   1817  1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1818    1.1  augustss {
   1819    1.7  augustss #ifdef DIAGNOSTIC
   1820    1.7  augustss #define TD_IS_FREE 0x12345678
   1821   1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1822    1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1823    1.7  augustss 		return;
   1824    1.7  augustss 	}
   1825   1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1826    1.7  augustss #endif
   1827   1.42  augustss 	std->link.std = sc->sc_freetds;
   1828    1.1  augustss 	sc->sc_freetds = std;
   1829    1.1  augustss }
   1830    1.1  augustss 
   1831    1.1  augustss uhci_soft_qh_t *
   1832  1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   1833    1.1  augustss {
   1834    1.1  augustss 	uhci_soft_qh_t *sqh;
   1835   1.63  augustss 	usbd_status err;
   1836    1.1  augustss 	int i, offs;
   1837    1.7  augustss 	usb_dma_t dma;
   1838    1.1  augustss 
   1839   1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   1840    1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1841   1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1842   1.63  augustss 			  UHCI_QH_ALIGN, &dma);
   1843   1.63  augustss 		if (err)
   1844   1.63  augustss 			return (0);
   1845   1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1846   1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   1847  1.159  augustss 			sqh = KERNADDR(&dma, offs);
   1848  1.160  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   1849  1.223    bouyer 			sqh->dma = dma;
   1850  1.223    bouyer 			sqh->offs = offs;
   1851   1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   1852    1.1  augustss 			sc->sc_freeqhs = sqh;
   1853    1.1  augustss 		}
   1854    1.1  augustss 	}
   1855    1.1  augustss 	sqh = sc->sc_freeqhs;
   1856   1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   1857   1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1858   1.16  augustss 	return (sqh);
   1859    1.1  augustss }
   1860    1.1  augustss 
   1861    1.1  augustss void
   1862  1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1863    1.1  augustss {
   1864   1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   1865    1.1  augustss 	sc->sc_freeqhs = sqh;
   1866    1.1  augustss }
   1867    1.1  augustss 
   1868    1.1  augustss void
   1869  1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1870  1.119  augustss 		    uhci_soft_td_t *stdend)
   1871    1.1  augustss {
   1872    1.1  augustss 	uhci_soft_td_t *p;
   1873    1.1  augustss 
   1874  1.223    bouyer 	/*
   1875  1.223    bouyer 	 * to avoid race condition with the controller which may be looking
   1876  1.223    bouyer 	 * at this chain, we need to first invalidate all links, and
   1877  1.223    bouyer 	 * then wait for the controller to move to another queue
   1878  1.223    bouyer 	 */
   1879  1.223    bouyer 	for (p = std; p != stdend; p = p->link.std) {
   1880  1.223    bouyer 		usb_syncmem(&p->dma,
   1881  1.223    bouyer 		    p->offs + offsetof(uhci_td_t, td_link),
   1882  1.223    bouyer 		    sizeof(p->td.td_link),
   1883  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1884  1.223    bouyer 		if ((p->td.td_link & UHCI_PTR_T) == 0) {
   1885  1.223    bouyer 			p->td.td_link = UHCI_PTR_T;
   1886  1.223    bouyer 			usb_syncmem(&p->dma,
   1887  1.223    bouyer 			    p->offs + offsetof(uhci_td_t, td_link),
   1888  1.223    bouyer 			    sizeof(p->td.td_link),
   1889  1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1890  1.223    bouyer 		}
   1891  1.223    bouyer 	}
   1892  1.223    bouyer 	delay(UHCI_QH_REMOVE_DELAY);
   1893  1.223    bouyer 
   1894    1.1  augustss 	for (; std != stdend; std = p) {
   1895   1.42  augustss 		p = std->link.std;
   1896    1.1  augustss 		uhci_free_std(sc, std);
   1897    1.1  augustss 	}
   1898    1.1  augustss }
   1899    1.1  augustss 
   1900    1.1  augustss usbd_status
   1901  1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1902  1.119  augustss 		     int rd, u_int16_t flags, usb_dma_t *dma,
   1903  1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1904    1.1  augustss {
   1905    1.1  augustss 	uhci_soft_td_t *p, *lastp;
   1906    1.1  augustss 	uhci_physaddr_t lastlink;
   1907    1.1  augustss 	int i, ntd, l, tog, maxp;
   1908   1.18  augustss 	u_int32_t status;
   1909    1.1  augustss 	int addr = upipe->pipe.device->address;
   1910    1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1911    1.1  augustss 
   1912  1.144  augustss 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1913  1.152  augustss 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1914  1.144  augustss 		      upipe->pipe.device->speed, flags));
   1915  1.248       mrg 
   1916  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1917  1.248       mrg 
   1918    1.4  augustss 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1919    1.1  augustss 	if (maxp == 0) {
   1920    1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1921    1.1  augustss 		return (USBD_INVAL);
   1922    1.1  augustss 	}
   1923    1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1924   1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1925   1.73  augustss 		ntd++;
   1926   1.39  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1927   1.73  augustss 	if (ntd == 0) {
   1928   1.73  augustss 		*sp = *ep = 0;
   1929   1.73  augustss 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1930   1.73  augustss 		return (USBD_NORMAL_COMPLETION);
   1931   1.73  augustss 	}
   1932   1.38  augustss 	tog = upipe->nexttoggle;
   1933    1.1  augustss 	if (ntd % 2 == 0)
   1934    1.1  augustss 		tog ^= 1;
   1935   1.32  augustss 	upipe->nexttoggle = tog ^ 1;
   1936  1.121  augustss 	lastp = NULL;
   1937    1.1  augustss 	lastlink = UHCI_PTR_T;
   1938    1.1  augustss 	ntd--;
   1939   1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1940  1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   1941   1.18  augustss 		status |= UHCI_TD_LS;
   1942   1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   1943   1.18  augustss 		status |= UHCI_TD_SPD;
   1944  1.223    bouyer 	usb_syncmem(dma, 0, len,
   1945  1.223    bouyer 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1946    1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1947    1.1  augustss 		p = uhci_alloc_std(sc);
   1948   1.63  augustss 		if (p == NULL) {
   1949  1.202  christos 			KASSERT(lastp != NULL);
   1950  1.149  augustss 			uhci_free_std_chain(sc, lastp, NULL);
   1951    1.1  augustss 			return (USBD_NOMEM);
   1952    1.1  augustss 		}
   1953   1.42  augustss 		p->link.std = lastp;
   1954  1.121  augustss 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1955    1.1  augustss 		lastp = p;
   1956    1.1  augustss 		lastlink = p->physaddr;
   1957   1.88   tsutsui 		p->td.td_status = htole32(status);
   1958    1.1  augustss 		if (i == ntd) {
   1959    1.1  augustss 			/* last TD */
   1960    1.1  augustss 			l = len % maxp;
   1961   1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1962   1.73  augustss 				l = maxp;
   1963    1.1  augustss 			*ep = p;
   1964    1.1  augustss 		} else
   1965    1.1  augustss 			l = maxp;
   1966  1.152  augustss 		p->td.td_token =
   1967   1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1968   1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1969  1.160  augustss 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1970  1.223    bouyer 		usb_syncmem(&p->dma, p->offs, sizeof(p->td),
   1971  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1972    1.1  augustss 		tog ^= 1;
   1973    1.1  augustss 	}
   1974    1.1  augustss 	*sp = lastp;
   1975  1.152  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1976   1.38  augustss 		      upipe->nexttoggle));
   1977    1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1978    1.1  augustss }
   1979    1.1  augustss 
   1980   1.38  augustss void
   1981  1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1982   1.38  augustss {
   1983   1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1984   1.38  augustss 	upipe->nexttoggle = 0;
   1985   1.38  augustss }
   1986   1.38  augustss 
   1987   1.38  augustss void
   1988  1.205  christos uhci_noop(usbd_pipe_handle pipe)
   1989   1.38  augustss {
   1990   1.38  augustss }
   1991   1.38  augustss 
   1992    1.1  augustss usbd_status
   1993  1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   1994    1.1  augustss {
   1995  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   1996   1.63  augustss 	usbd_status err;
   1997   1.16  augustss 
   1998   1.52  augustss 	/* Insert last in queue. */
   1999  1.248       mrg 	mutex_enter(&sc->sc_lock);
   2000   1.63  augustss 	err = usb_insert_transfer(xfer);
   2001  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2002   1.63  augustss 	if (err)
   2003   1.63  augustss 		return (err);
   2004   1.52  augustss 
   2005  1.152  augustss 	/*
   2006   1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2007   1.92  augustss 	 * so start it first.
   2008   1.67  augustss 	 */
   2009   1.63  augustss 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2010   1.16  augustss }
   2011   1.16  augustss 
   2012   1.16  augustss usbd_status
   2013  1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   2014   1.16  augustss {
   2015   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2016    1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2017  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2018   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2019   1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2020    1.1  augustss 	uhci_soft_qh_t *sqh;
   2021   1.63  augustss 	usbd_status err;
   2022   1.45  augustss 	int len, isread, endpt;
   2023    1.1  augustss 
   2024  1.169  augustss 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
   2025  1.169  augustss 		     xfer, xfer->length, xfer->flags, ii));
   2026    1.1  augustss 
   2027   1.82  augustss 	if (sc->sc_dying)
   2028   1.82  augustss 		return (USBD_IOERROR);
   2029   1.82  augustss 
   2030   1.48  augustss #ifdef DIAGNOSTIC
   2031   1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2032  1.163    provos 		panic("uhci_device_bulk_transfer: a request");
   2033   1.48  augustss #endif
   2034    1.1  augustss 
   2035  1.248       mrg 	mutex_enter(&sc->sc_lock);
   2036  1.248       mrg 
   2037   1.63  augustss 	len = xfer->length;
   2038  1.102  augustss 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2039   1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2040    1.1  augustss 	sqh = upipe->u.bulk.sqh;
   2041    1.1  augustss 
   2042    1.1  augustss 	upipe->u.bulk.isread = isread;
   2043    1.1  augustss 	upipe->u.bulk.length = len;
   2044    1.1  augustss 
   2045   1.73  augustss 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2046   1.73  augustss 				   &xfer->dmabuf, &data, &dataend);
   2047  1.248       mrg 	if (err) {
   2048  1.248       mrg 		mutex_exit(&sc->sc_lock);
   2049   1.63  augustss 		return (err);
   2050  1.248       mrg 	}
   2051   1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2052  1.223    bouyer 	usb_syncmem(&dataend->dma,
   2053  1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2054  1.223    bouyer 	    sizeof(dataend->td.td_status),
   2055  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2056  1.223    bouyer 
   2057    1.1  augustss 
   2058   1.59  augustss #ifdef UHCI_DEBUG
   2059   1.33  augustss 	if (uhcidebug > 8) {
   2060   1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   2061   1.55  augustss 		uhci_dump_tds(data);
   2062    1.1  augustss 	}
   2063    1.1  augustss #endif
   2064    1.1  augustss 
   2065    1.1  augustss 	/* Set up interrupt info. */
   2066   1.63  augustss 	ii->xfer = xfer;
   2067   1.55  augustss 	ii->stdstart = data;
   2068   1.55  augustss 	ii->stdend = dataend;
   2069    1.7  augustss #ifdef DIAGNOSTIC
   2070   1.70  augustss 	if (!ii->isdone) {
   2071   1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   2072   1.70  augustss 	}
   2073    1.7  augustss 	ii->isdone = 0;
   2074    1.7  augustss #endif
   2075    1.1  augustss 
   2076   1.55  augustss 	sqh->elink = data;
   2077  1.121  augustss 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2078  1.223    bouyer 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2079    1.1  augustss 
   2080    1.1  augustss 	uhci_add_bulk(sc, sqh);
   2081   1.92  augustss 	uhci_add_intr_info(sc, ii);
   2082    1.1  augustss 
   2083   1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2084  1.234    dyoung 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   2085   1.91  augustss 			    uhci_timeout, ii);
   2086   1.13  augustss 	}
   2087   1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2088    1.1  augustss 
   2089   1.59  augustss #ifdef UHCI_DEBUG
   2090    1.1  augustss 	if (uhcidebug > 10) {
   2091   1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   2092   1.55  augustss 		uhci_dump_tds(data);
   2093    1.1  augustss 	}
   2094    1.1  augustss #endif
   2095    1.1  augustss 
   2096   1.26  augustss 	if (sc->sc_bus.use_polling)
   2097   1.63  augustss 		uhci_waitintr(sc, xfer);
   2098   1.26  augustss 
   2099  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2100    1.1  augustss 	return (USBD_IN_PROGRESS);
   2101    1.1  augustss }
   2102    1.1  augustss 
   2103    1.1  augustss /* Abort a device bulk request. */
   2104    1.1  augustss void
   2105  1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   2106    1.1  augustss {
   2107  1.248       mrg #ifdef DIAGNOSTIC
   2108  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2109  1.248       mrg #endif
   2110  1.248       mrg 
   2111  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2112  1.248       mrg 
   2113   1.33  augustss 	DPRINTF(("uhci_device_bulk_abort:\n"));
   2114   1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2115   1.33  augustss }
   2116   1.33  augustss 
   2117   1.92  augustss /*
   2118  1.154  augustss  * Abort a device request.
   2119  1.154  augustss  * If this routine is called at splusb() it guarantees that the request
   2120  1.154  augustss  * will be removed from the hardware scheduling and that the callback
   2121  1.154  augustss  * for it will be called with USBD_CANCELLED status.
   2122  1.154  augustss  * It's impossible to guarantee that the requested transfer will not
   2123  1.154  augustss  * have happened since the hardware runs concurrently.
   2124  1.154  augustss  * If the transaction has already happened we rely on the ordinary
   2125  1.154  augustss  * interrupt processing to process it.
   2126  1.248       mrg  * XXX This is most probably wrong.
   2127  1.248       mrg  * XXXMRG this doesn't make sense anymore.
   2128   1.92  augustss  */
   2129   1.33  augustss void
   2130  1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2131   1.33  augustss {
   2132   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2133  1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2134  1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2135   1.33  augustss 	uhci_soft_td_t *std;
   2136  1.188  augustss 	int wake;
   2137   1.65  augustss 
   2138  1.106  augustss 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   2139   1.33  augustss 
   2140  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2141  1.248       mrg 
   2142  1.153  augustss 	if (sc->sc_dying) {
   2143  1.153  augustss 		/* If we're dying, just do the software part. */
   2144  1.153  augustss 		xfer->status = status;	/* make software ignore it */
   2145  1.234    dyoung 		callout_stop(&xfer->timeout_handle);
   2146  1.153  augustss 		usb_transfer_complete(xfer);
   2147  1.194  christos 		return;
   2148   1.92  augustss 	}
   2149   1.92  augustss 
   2150  1.247       mrg 	if (cpu_intr_p() || cpu_softintr_p())
   2151  1.163    provos 		panic("uhci_abort_xfer: not in process context");
   2152  1.153  augustss 
   2153  1.153  augustss 	/*
   2154  1.188  augustss 	 * If an abort is already in progress then just wait for it to
   2155  1.188  augustss 	 * complete and return.
   2156  1.188  augustss 	 */
   2157  1.188  augustss 	if (xfer->hcflags & UXFER_ABORTING) {
   2158  1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
   2159  1.188  augustss #ifdef DIAGNOSTIC
   2160  1.188  augustss 		if (status == USBD_TIMEOUT)
   2161  1.188  augustss 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2162  1.188  augustss #endif
   2163  1.188  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2164  1.188  augustss 		xfer->status = status;
   2165  1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
   2166  1.188  augustss 		xfer->hcflags |= UXFER_ABORTWAIT;
   2167  1.188  augustss 		while (xfer->hcflags & UXFER_ABORTING)
   2168  1.248       mrg 			cv_wait(&xfer->hccv, &sc->sc_lock);
   2169  1.248       mrg 		goto done;
   2170  1.188  augustss 	}
   2171  1.188  augustss 	xfer->hcflags |= UXFER_ABORTING;
   2172  1.188  augustss 
   2173  1.188  augustss 	/*
   2174  1.153  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2175  1.153  augustss 	 */
   2176  1.153  augustss 	xfer->status = status;	/* make software ignore it */
   2177  1.234    dyoung 	callout_stop(&xfer->timeout_handle);
   2178  1.153  augustss 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   2179  1.223    bouyer 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   2180  1.223    bouyer 		usb_syncmem(&std->dma,
   2181  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2182  1.223    bouyer 		    sizeof(std->td.td_status),
   2183  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2184   1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2185  1.223    bouyer 		usb_syncmem(&std->dma,
   2186  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2187  1.223    bouyer 		    sizeof(std->td.td_status),
   2188  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2189  1.223    bouyer 	}
   2190   1.92  augustss 
   2191  1.162  augustss 	/*
   2192  1.153  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2193  1.153  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2194  1.153  augustss 	 * has run.
   2195  1.153  augustss 	 */
   2196  1.248       mrg 	/* Hardware finishes in 1ms */
   2197  1.248       mrg 	usb_delay_ms_locked(upipe->pipe.device->bus, 2, &sc->sc_lock);
   2198  1.153  augustss 	sc->sc_softwake = 1;
   2199  1.153  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2200  1.248       mrg 	DPRINTFN(1,("uhci_abort_xfer: cv_wait\n"));
   2201  1.248       mrg 	cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
   2202  1.162  augustss 
   2203  1.153  augustss 	/*
   2204  1.153  augustss 	 * Step 3: Execute callback.
   2205  1.153  augustss 	 */
   2206  1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   2207  1.100  augustss #ifdef DIAGNOSTIC
   2208  1.106  augustss 	ii->isdone = 1;
   2209  1.100  augustss #endif
   2210  1.188  augustss 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2211  1.188  augustss 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2212  1.106  augustss 	usb_transfer_complete(xfer);
   2213  1.188  augustss 	if (wake)
   2214  1.248       mrg 		cv_broadcast(&xfer->hccv);
   2215  1.248       mrg done:
   2216  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2217    1.1  augustss }
   2218    1.1  augustss 
   2219    1.1  augustss /* Close a device bulk pipe. */
   2220    1.1  augustss void
   2221  1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   2222    1.1  augustss {
   2223    1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2224    1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2225  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2226    1.1  augustss 
   2227  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2228  1.248       mrg 
   2229    1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2230  1.236  drochner 
   2231  1.236  drochner 	pipe->endpoint->datatoggle = upipe->nexttoggle;
   2232    1.1  augustss }
   2233    1.1  augustss 
   2234    1.1  augustss usbd_status
   2235  1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2236    1.1  augustss {
   2237  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2238   1.63  augustss 	usbd_status err;
   2239   1.16  augustss 
   2240   1.52  augustss 	/* Insert last in queue. */
   2241  1.248       mrg 	mutex_enter(&sc->sc_lock);
   2242   1.63  augustss 	err = usb_insert_transfer(xfer);
   2243  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2244   1.63  augustss 	if (err)
   2245   1.63  augustss 		return (err);
   2246   1.52  augustss 
   2247  1.152  augustss 	/*
   2248   1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2249   1.92  augustss 	 * so start it first.
   2250   1.67  augustss 	 */
   2251   1.63  augustss 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2252   1.16  augustss }
   2253   1.16  augustss 
   2254   1.16  augustss usbd_status
   2255  1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2256   1.16  augustss {
   2257  1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2258   1.63  augustss 	usbd_status err;
   2259    1.1  augustss 
   2260   1.82  augustss 	if (sc->sc_dying)
   2261   1.82  augustss 		return (USBD_IOERROR);
   2262   1.82  augustss 
   2263   1.48  augustss #ifdef DIAGNOSTIC
   2264   1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2265  1.163    provos 		panic("uhci_device_ctrl_transfer: not a request");
   2266   1.48  augustss #endif
   2267    1.1  augustss 
   2268  1.248       mrg 	mutex_enter(&sc->sc_lock);
   2269   1.63  augustss 	err = uhci_device_request(xfer);
   2270  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2271   1.63  augustss 	if (err)
   2272   1.63  augustss 		return (err);
   2273    1.1  augustss 
   2274    1.9  augustss 	if (sc->sc_bus.use_polling)
   2275   1.63  augustss 		uhci_waitintr(sc, xfer);
   2276    1.1  augustss 	return (USBD_IN_PROGRESS);
   2277    1.1  augustss }
   2278    1.1  augustss 
   2279    1.1  augustss usbd_status
   2280  1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2281    1.1  augustss {
   2282  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2283   1.63  augustss 	usbd_status err;
   2284   1.16  augustss 
   2285   1.52  augustss 	/* Insert last in queue. */
   2286  1.248       mrg 	mutex_enter(&sc->sc_lock);
   2287   1.63  augustss 	err = usb_insert_transfer(xfer);
   2288  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2289   1.63  augustss 	if (err)
   2290   1.63  augustss 		return (err);
   2291   1.52  augustss 
   2292  1.152  augustss 	/*
   2293   1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2294   1.92  augustss 	 * so start it first.
   2295   1.67  augustss 	 */
   2296   1.63  augustss 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2297   1.16  augustss }
   2298   1.16  augustss 
   2299   1.16  augustss usbd_status
   2300  1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2301   1.16  augustss {
   2302   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2303    1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2304  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2305   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2306   1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2307    1.1  augustss 	uhci_soft_qh_t *sqh;
   2308   1.63  augustss 	usbd_status err;
   2309  1.187     skrll 	int isread, endpt;
   2310  1.248       mrg 	int i;
   2311    1.1  augustss 
   2312   1.82  augustss 	if (sc->sc_dying)
   2313   1.82  augustss 		return (USBD_IOERROR);
   2314   1.82  augustss 
   2315   1.63  augustss 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2316   1.63  augustss 		    xfer, xfer->length, xfer->flags));
   2317    1.1  augustss 
   2318   1.48  augustss #ifdef DIAGNOSTIC
   2319   1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2320  1.163    provos 		panic("uhci_device_intr_transfer: a request");
   2321   1.48  augustss #endif
   2322    1.1  augustss 
   2323  1.248       mrg 	mutex_enter(&sc->sc_lock);
   2324  1.248       mrg 
   2325  1.187     skrll 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2326  1.187     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2327  1.187     skrll 
   2328  1.187     skrll 	upipe->u.intr.isread = isread;
   2329  1.187     skrll 
   2330  1.187     skrll 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
   2331  1.187     skrll 				   xfer->flags, &xfer->dmabuf, &data,
   2332  1.187     skrll 				   &dataend);
   2333  1.248       mrg 	if (err) {
   2334  1.248       mrg 		mutex_exit(&sc->sc_lock);
   2335   1.63  augustss 		return (err);
   2336  1.248       mrg 	}
   2337  1.248       mrg 
   2338   1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2339  1.223    bouyer 	usb_syncmem(&dataend->dma,
   2340  1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2341  1.223    bouyer 	    sizeof(dataend->td.td_status),
   2342  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2343    1.1  augustss 
   2344   1.59  augustss #ifdef UHCI_DEBUG
   2345    1.1  augustss 	if (uhcidebug > 10) {
   2346   1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2347   1.55  augustss 		uhci_dump_tds(data);
   2348    1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2349    1.1  augustss 	}
   2350    1.1  augustss #endif
   2351    1.1  augustss 
   2352    1.1  augustss 	/* Set up interrupt info. */
   2353   1.63  augustss 	ii->xfer = xfer;
   2354   1.55  augustss 	ii->stdstart = data;
   2355   1.55  augustss 	ii->stdend = dataend;
   2356    1.7  augustss #ifdef DIAGNOSTIC
   2357   1.70  augustss 	if (!ii->isdone) {
   2358   1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2359   1.70  augustss 	}
   2360    1.7  augustss 	ii->isdone = 0;
   2361    1.7  augustss #endif
   2362    1.1  augustss 
   2363  1.152  augustss 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2364   1.12  augustss 		     upipe->u.intr.qhs[0]));
   2365    1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2366    1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2367   1.55  augustss 		sqh->elink = data;
   2368  1.121  augustss 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2369  1.223    bouyer 		usb_syncmem(&sqh->dma,
   2370  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2371  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2372  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2373    1.1  augustss 	}
   2374   1.92  augustss 	uhci_add_intr_info(sc, ii);
   2375   1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2376  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2377    1.1  augustss 
   2378   1.59  augustss #ifdef UHCI_DEBUG
   2379    1.1  augustss 	if (uhcidebug > 10) {
   2380   1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2381   1.55  augustss 		uhci_dump_tds(data);
   2382    1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2383    1.1  augustss 	}
   2384    1.1  augustss #endif
   2385    1.1  augustss 
   2386    1.1  augustss 	return (USBD_IN_PROGRESS);
   2387    1.1  augustss }
   2388    1.1  augustss 
   2389    1.1  augustss /* Abort a device control request. */
   2390    1.1  augustss void
   2391  1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2392    1.1  augustss {
   2393  1.248       mrg #ifdef DIAGNOSTIC
   2394  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2395  1.248       mrg #endif
   2396  1.248       mrg 
   2397  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2398  1.248       mrg 
   2399   1.33  augustss 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2400   1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2401    1.1  augustss }
   2402    1.1  augustss 
   2403    1.1  augustss /* Close a device control pipe. */
   2404    1.1  augustss void
   2405  1.205  christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2406    1.1  augustss {
   2407    1.1  augustss }
   2408    1.1  augustss 
   2409    1.1  augustss /* Abort a device interrupt request. */
   2410    1.1  augustss void
   2411  1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2412    1.1  augustss {
   2413  1.248       mrg #ifdef DIAGNOSTIC
   2414  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2415  1.248       mrg #endif
   2416  1.248       mrg 
   2417  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2418  1.248       mrg 
   2419   1.63  augustss 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2420   1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2421   1.36  augustss 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2422  1.154  augustss 		xfer->pipe->intrxfer = NULL;
   2423    1.1  augustss 	}
   2424   1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2425    1.1  augustss }
   2426    1.1  augustss 
   2427    1.1  augustss /* Close a device interrupt pipe. */
   2428    1.1  augustss void
   2429  1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2430    1.1  augustss {
   2431    1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2432  1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   2433   1.92  augustss 	int i, npoll;
   2434  1.248       mrg 
   2435  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2436    1.1  augustss 
   2437    1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2438    1.1  augustss 	npoll = upipe->u.intr.npoll;
   2439    1.1  augustss 	for (i = 0; i < npoll; i++)
   2440   1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2441    1.1  augustss 
   2442  1.152  augustss 	/*
   2443    1.1  augustss 	 * We now have to wait for any activity on the physical
   2444    1.1  augustss 	 * descriptors to stop.
   2445    1.1  augustss 	 */
   2446  1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   2447    1.1  augustss 
   2448    1.1  augustss 	for(i = 0; i < npoll; i++)
   2449    1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2450  1.248       mrg 	kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *));
   2451    1.1  augustss 
   2452    1.1  augustss 	/* XXX free other resources */
   2453    1.1  augustss }
   2454    1.1  augustss 
   2455    1.1  augustss usbd_status
   2456  1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2457    1.1  augustss {
   2458   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2459   1.63  augustss 	usb_device_request_t *req = &xfer->request;
   2460    1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2461  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2462    1.1  augustss 	int addr = dev->address;
   2463    1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2464   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2465   1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2466    1.1  augustss 	uhci_soft_qh_t *sqh;
   2467    1.1  augustss 	int len;
   2468    1.1  augustss 	u_int32_t ls;
   2469   1.63  augustss 	usbd_status err;
   2470    1.1  augustss 	int isread;
   2471  1.248       mrg 
   2472  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2473    1.1  augustss 
   2474   1.13  augustss 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2475   1.12  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2476    1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2477    1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   2478    1.1  augustss 		    addr, endpt));
   2479    1.1  augustss 
   2480  1.144  augustss 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2481    1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2482    1.1  augustss 	len = UGETW(req->wLength);
   2483    1.1  augustss 
   2484    1.1  augustss 	setup = upipe->u.ctl.setup;
   2485    1.1  augustss 	stat = upipe->u.ctl.stat;
   2486    1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2487    1.1  augustss 
   2488    1.1  augustss 	/* Set up data transaction */
   2489    1.1  augustss 	if (len != 0) {
   2490   1.38  augustss 		upipe->nexttoggle = 1;
   2491   1.73  augustss 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2492   1.73  augustss 					   &xfer->dmabuf, &data, &dataend);
   2493   1.63  augustss 		if (err)
   2494   1.63  augustss 			return (err);
   2495   1.55  augustss 		next = data;
   2496   1.55  augustss 		dataend->link.std = stat;
   2497  1.121  augustss 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2498  1.223    bouyer 		usb_syncmem(&dataend->dma,
   2499  1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2500  1.223    bouyer 		    sizeof(dataend->td.td_link),
   2501  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2502    1.1  augustss 	} else {
   2503    1.1  augustss 		next = stat;
   2504    1.1  augustss 	}
   2505    1.1  augustss 	upipe->u.ctl.length = len;
   2506    1.1  augustss 
   2507  1.159  augustss 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2508  1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   2509    1.1  augustss 
   2510   1.42  augustss 	setup->link.std = next;
   2511  1.121  augustss 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2512   1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2513   1.88   tsutsui 		UHCI_TD_ACTIVE);
   2514   1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2515  1.160  augustss 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2516  1.223    bouyer 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2517  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2518   1.42  augustss 
   2519   1.92  augustss 	stat->link.std = NULL;
   2520   1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2521  1.152  augustss 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2522   1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2523  1.152  augustss 	stat->td.td_token =
   2524   1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2525   1.88   tsutsui 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2526   1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2527  1.223    bouyer 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2528  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2529    1.1  augustss 
   2530   1.59  augustss #ifdef UHCI_DEBUG
   2531   1.67  augustss 	if (uhcidebug > 10) {
   2532   1.47  augustss 		DPRINTF(("uhci_device_request: before transfer\n"));
   2533   1.41  augustss 		uhci_dump_tds(setup);
   2534    1.1  augustss 	}
   2535    1.1  augustss #endif
   2536    1.1  augustss 
   2537    1.1  augustss 	/* Set up interrupt info. */
   2538   1.63  augustss 	ii->xfer = xfer;
   2539    1.1  augustss 	ii->stdstart = setup;
   2540    1.1  augustss 	ii->stdend = stat;
   2541    1.7  augustss #ifdef DIAGNOSTIC
   2542   1.70  augustss 	if (!ii->isdone) {
   2543   1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2544   1.70  augustss 	}
   2545    1.7  augustss 	ii->isdone = 0;
   2546    1.7  augustss #endif
   2547    1.1  augustss 
   2548   1.42  augustss 	sqh->elink = setup;
   2549  1.121  augustss 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2550  1.223    bouyer 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2551    1.1  augustss 
   2552  1.144  augustss 	if (dev->speed == USB_SPEED_LOW)
   2553  1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2554  1.123  augustss 	else
   2555  1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2556   1.92  augustss 	uhci_add_intr_info(sc, ii);
   2557   1.59  augustss #ifdef UHCI_DEBUG
   2558    1.1  augustss 	if (uhcidebug > 12) {
   2559    1.1  augustss 		uhci_soft_td_t *std;
   2560    1.1  augustss 		uhci_soft_qh_t *xqh;
   2561   1.13  augustss 		uhci_soft_qh_t *sxqh;
   2562   1.13  augustss 		int maxqh = 0;
   2563    1.1  augustss 		uhci_physaddr_t link;
   2564   1.47  augustss 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2565    1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2566  1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2567   1.42  augustss 		     std = std->link.std) {
   2568   1.88   tsutsui 			link = le32toh(std->td.td_link);
   2569    1.1  augustss 			uhci_dump_td(std);
   2570    1.1  augustss 		}
   2571   1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2572   1.67  augustss 		uhci_dump_qh(sxqh);
   2573   1.67  augustss 		for (xqh = sxqh;
   2574   1.63  augustss 		     xqh != NULL;
   2575  1.152  augustss 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2576  1.121  augustss                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2577    1.1  augustss 			uhci_dump_qh(xqh);
   2578   1.13  augustss 		}
   2579   1.47  augustss 		DPRINTF(("Enqueued QH:\n"));
   2580    1.1  augustss 		uhci_dump_qh(sqh);
   2581   1.42  augustss 		uhci_dump_tds(sqh->elink);
   2582    1.1  augustss 	}
   2583    1.1  augustss #endif
   2584   1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2585  1.234    dyoung 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   2586   1.91  augustss 			    uhci_timeout, ii);
   2587   1.13  augustss 	}
   2588   1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2589    1.1  augustss 
   2590    1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2591    1.1  augustss }
   2592    1.1  augustss 
   2593   1.16  augustss usbd_status
   2594  1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2595   1.16  augustss {
   2596  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2597   1.63  augustss 	usbd_status err;
   2598   1.48  augustss 
   2599   1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2600   1.48  augustss 
   2601   1.48  augustss 	/* Put it on our queue, */
   2602  1.248       mrg 	mutex_enter(&sc->sc_lock);
   2603   1.63  augustss 	err = usb_insert_transfer(xfer);
   2604  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2605   1.48  augustss 
   2606   1.48  augustss 	/* bail out on error, */
   2607   1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2608   1.63  augustss 		return (err);
   2609   1.48  augustss 
   2610   1.48  augustss 	/* XXX should check inuse here */
   2611   1.48  augustss 
   2612   1.48  augustss 	/* insert into schedule, */
   2613   1.63  augustss 	uhci_device_isoc_enter(xfer);
   2614   1.48  augustss 
   2615  1.102  augustss 	/* and start if the pipe wasn't running */
   2616   1.67  augustss 	if (!err)
   2617   1.63  augustss 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2618   1.48  augustss 
   2619   1.63  augustss 	return (err);
   2620   1.48  augustss }
   2621   1.48  augustss 
   2622   1.48  augustss void
   2623  1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2624   1.48  augustss {
   2625   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2626   1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2627  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2628   1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2629  1.152  augustss 	uhci_soft_td_t *std;
   2630  1.223    bouyer 	u_int32_t buf, len, status, offs;
   2631  1.248       mrg 	int i, next, nframes;
   2632  1.223    bouyer 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2633   1.48  augustss 
   2634   1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2635   1.48  augustss 		    "nframes=%d\n",
   2636   1.63  augustss 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2637   1.48  augustss 
   2638   1.82  augustss 	if (sc->sc_dying)
   2639   1.82  augustss 		return;
   2640   1.82  augustss 
   2641   1.63  augustss 	if (xfer->status == USBD_IN_PROGRESS) {
   2642   1.48  augustss 		/* This request has already been entered into the frame list */
   2643   1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2644   1.68  augustss 		/* XXX */
   2645   1.48  augustss 	}
   2646   1.48  augustss 
   2647   1.48  augustss #ifdef DIAGNOSTIC
   2648   1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2649   1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   2650   1.19  augustss #endif
   2651   1.16  augustss 
   2652   1.48  augustss 	next = iso->next;
   2653   1.48  augustss 	if (next == -1) {
   2654   1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   2655   1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2656   1.48  augustss 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2657   1.48  augustss 	}
   2658   1.48  augustss 
   2659   1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   2660   1.92  augustss 	UXFER(xfer)->curframe = next;
   2661   1.48  augustss 
   2662  1.160  augustss 	buf = DMAADDR(&xfer->dmabuf, 0);
   2663  1.223    bouyer 	offs = 0;
   2664   1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2665   1.88   tsutsui 				     UHCI_TD_ACTIVE |
   2666   1.88   tsutsui 				     UHCI_TD_IOS);
   2667   1.63  augustss 	nframes = xfer->nframes;
   2668  1.248       mrg 	mutex_enter(&sc->sc_lock);
   2669   1.48  augustss 	for (i = 0; i < nframes; i++) {
   2670   1.48  augustss 		std = iso->stds[next];
   2671   1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2672   1.48  augustss 			next = 0;
   2673   1.63  augustss 		len = xfer->frlengths[i];
   2674   1.88   tsutsui 		std->td.td_buffer = htole32(buf);
   2675  1.242  jakllsch 		usb_syncmem(&xfer->dmabuf, offs, len,
   2676  1.223    bouyer 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2677   1.48  augustss 		if (i == nframes - 1)
   2678   1.88   tsutsui 			status |= UHCI_TD_IOC;
   2679   1.88   tsutsui 		std->td.td_status = htole32(status);
   2680   1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2681   1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2682  1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2683  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2684   1.59  augustss #ifdef UHCI_DEBUG
   2685   1.48  augustss 		if (uhcidebug > 5) {
   2686   1.48  augustss 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2687   1.48  augustss 			uhci_dump_td(std);
   2688   1.48  augustss 		}
   2689   1.48  augustss #endif
   2690   1.48  augustss 		buf += len;
   2691  1.223    bouyer 		offs += len;
   2692   1.48  augustss 	}
   2693   1.48  augustss 	iso->next = next;
   2694   1.63  augustss 	iso->inuse += xfer->nframes;
   2695   1.16  augustss 
   2696  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2697   1.16  augustss }
   2698   1.16  augustss 
   2699   1.16  augustss usbd_status
   2700  1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   2701   1.16  augustss {
   2702   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2703  1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2704   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2705   1.48  augustss 	uhci_soft_td_t *end;
   2706  1.248       mrg 	int i;
   2707   1.48  augustss 
   2708   1.96  augustss 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2709   1.96  augustss 
   2710  1.248       mrg 	mutex_enter(&sc->sc_lock);
   2711  1.248       mrg 
   2712  1.248       mrg 	if (sc->sc_dying) {
   2713  1.248       mrg 		mutex_exit(&sc->sc_lock);
   2714   1.82  augustss 		return (USBD_IOERROR);
   2715  1.248       mrg 	}
   2716   1.82  augustss 
   2717   1.48  augustss #ifdef DIAGNOSTIC
   2718   1.63  augustss 	if (xfer->status != USBD_IN_PROGRESS)
   2719   1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2720   1.48  augustss #endif
   2721   1.48  augustss 
   2722   1.48  augustss 	/* Find the last TD */
   2723   1.92  augustss 	i = UXFER(xfer)->curframe + xfer->nframes;
   2724   1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   2725   1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   2726   1.48  augustss 	end = upipe->u.iso.stds[i];
   2727   1.48  augustss 
   2728   1.96  augustss #ifdef DIAGNOSTIC
   2729   1.96  augustss 	if (end == NULL) {
   2730   1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   2731   1.96  augustss 		return (USBD_INVAL);
   2732   1.96  augustss 	}
   2733   1.96  augustss #endif
   2734   1.96  augustss 
   2735   1.48  augustss 	/* Set up interrupt info. */
   2736   1.63  augustss 	ii->xfer = xfer;
   2737   1.48  augustss 	ii->stdstart = end;
   2738   1.48  augustss 	ii->stdend = end;
   2739   1.48  augustss #ifdef DIAGNOSTIC
   2740  1.102  augustss 	if (!ii->isdone)
   2741   1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2742   1.48  augustss 	ii->isdone = 0;
   2743   1.48  augustss #endif
   2744   1.92  augustss 	uhci_add_intr_info(sc, ii);
   2745  1.152  augustss 
   2746  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2747   1.48  augustss 
   2748   1.48  augustss 	return (USBD_IN_PROGRESS);
   2749   1.16  augustss }
   2750   1.16  augustss 
   2751   1.16  augustss void
   2752  1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2753   1.16  augustss {
   2754  1.248       mrg #ifdef DIAGNOSTIC
   2755  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2756  1.248       mrg #endif
   2757   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2758   1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2759   1.48  augustss 	uhci_soft_td_t *std;
   2760  1.248       mrg 	int i, n, nframes, maxlen, len;
   2761   1.92  augustss 
   2762  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2763   1.92  augustss 
   2764   1.92  augustss 	/* Transfer is already done. */
   2765  1.152  augustss 	if (xfer->status != USBD_NOT_STARTED &&
   2766   1.92  augustss 	    xfer->status != USBD_IN_PROGRESS) {
   2767   1.92  augustss 		return;
   2768   1.92  augustss 	}
   2769   1.48  augustss 
   2770   1.92  augustss 	/* Give xfer the requested abort code. */
   2771   1.63  augustss 	xfer->status = USBD_CANCELLED;
   2772   1.48  augustss 
   2773   1.48  augustss 	/* make hardware ignore it, */
   2774   1.63  augustss 	nframes = xfer->nframes;
   2775   1.92  augustss 	n = UXFER(xfer)->curframe;
   2776   1.92  augustss 	maxlen = 0;
   2777   1.48  augustss 	for (i = 0; i < nframes; i++) {
   2778   1.48  augustss 		std = stds[n];
   2779  1.223    bouyer 		usb_syncmem(&std->dma,
   2780  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2781  1.223    bouyer 		    sizeof(std->td.td_status),
   2782  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2783   1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2784  1.223    bouyer 		usb_syncmem(&std->dma,
   2785  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2786  1.223    bouyer 		    sizeof(std->td.td_status),
   2787  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2788  1.223    bouyer 		usb_syncmem(&std->dma,
   2789  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_token),
   2790  1.223    bouyer 		    sizeof(std->td.td_token),
   2791  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2792  1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2793   1.92  augustss 		if (len > maxlen)
   2794   1.92  augustss 			maxlen = len;
   2795   1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2796   1.48  augustss 			n = 0;
   2797   1.48  augustss 	}
   2798   1.48  augustss 
   2799   1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   2800   1.92  augustss 	delay(maxlen);
   2801   1.92  augustss 
   2802   1.96  augustss #ifdef DIAGNOSTIC
   2803   1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   2804   1.96  augustss #endif
   2805   1.92  augustss 	/* Run callback and remove from interrupt list. */
   2806   1.92  augustss 	usb_transfer_complete(xfer);
   2807   1.48  augustss 
   2808  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2809   1.16  augustss }
   2810   1.16  augustss 
   2811   1.16  augustss void
   2812  1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   2813   1.16  augustss {
   2814   1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2815   1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2816  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2817   1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2818   1.16  augustss 	struct iso *iso;
   2819  1.248       mrg 	int i;
   2820  1.248       mrg 
   2821  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2822   1.16  augustss 
   2823   1.16  augustss 	/*
   2824   1.16  augustss 	 * Make sure all TDs are marked as inactive.
   2825   1.16  augustss 	 * Wait for completion.
   2826   1.16  augustss 	 * Unschedule.
   2827   1.16  augustss 	 * Deallocate.
   2828   1.16  augustss 	 */
   2829   1.16  augustss 	iso = &upipe->u.iso;
   2830   1.16  augustss 
   2831  1.223    bouyer 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2832  1.223    bouyer 		std = iso->stds[i];
   2833  1.223    bouyer 		usb_syncmem(&std->dma,
   2834  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2835  1.223    bouyer 		    sizeof(std->td.td_status),
   2836  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2837  1.223    bouyer 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2838  1.223    bouyer 		usb_syncmem(&std->dma,
   2839  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2840  1.223    bouyer 		    sizeof(std->td.td_status),
   2841  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2842  1.223    bouyer 	}
   2843  1.248       mrg 	/* wait for completion */
   2844  1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   2845   1.16  augustss 
   2846   1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2847   1.16  augustss 		std = iso->stds[i];
   2848   1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   2849   1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   2850   1.42  augustss 		     vstd = vstd->link.std)
   2851   1.16  augustss 			;
   2852   1.67  augustss 		if (vstd == NULL) {
   2853   1.16  augustss 			/*panic*/
   2854   1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   2855  1.248       mrg 			mutex_exit(&sc->sc_lock);
   2856   1.16  augustss 			return;
   2857   1.16  augustss 		}
   2858   1.42  augustss 		vstd->link = std->link;
   2859  1.223    bouyer 		usb_syncmem(&std->dma,
   2860  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2861  1.223    bouyer 		    sizeof(std->td.td_link),
   2862  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2863   1.42  augustss 		vstd->td.td_link = std->td.td_link;
   2864  1.223    bouyer 		usb_syncmem(&vstd->dma,
   2865  1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2866  1.223    bouyer 		    sizeof(vstd->td.td_link),
   2867  1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2868   1.16  augustss 		uhci_free_std(sc, std);
   2869   1.16  augustss 	}
   2870   1.16  augustss 
   2871  1.248       mrg 	kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *));
   2872   1.16  augustss }
   2873   1.16  augustss 
   2874   1.16  augustss usbd_status
   2875  1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   2876   1.16  augustss {
   2877   1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2878   1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2879  1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2880   1.16  augustss 	int addr = upipe->pipe.device->address;
   2881   1.16  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2882   1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2883   1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2884   1.48  augustss 	u_int32_t token;
   2885   1.16  augustss 	struct iso *iso;
   2886  1.248       mrg 	int i;
   2887   1.16  augustss 
   2888   1.16  augustss 	iso = &upipe->u.iso;
   2889  1.248       mrg 	iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT *
   2890  1.248       mrg 				 sizeof (uhci_soft_td_t *),
   2891  1.248       mrg 			       KM_SLEEP);
   2892  1.248       mrg 	if (iso->stds == NULL)
   2893  1.248       mrg 		return USBD_NOMEM;
   2894   1.16  augustss 
   2895   1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2896   1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2897   1.16  augustss 
   2898  1.248       mrg 	mutex_enter(&sc->sc_lock);
   2899  1.248       mrg 
   2900   1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   2901   1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2902   1.48  augustss 		std = uhci_alloc_std(sc);
   2903   1.48  augustss 		if (std == 0)
   2904   1.48  augustss 			goto bad;
   2905   1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2906   1.88   tsutsui 		std->td.td_token = htole32(token);
   2907  1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2908  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2909   1.48  augustss 		iso->stds[i] = std;
   2910   1.16  augustss 	}
   2911   1.16  augustss 
   2912   1.48  augustss 	/* Insert TDs into schedule. */
   2913   1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2914   1.16  augustss 		std = iso->stds[i];
   2915   1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   2916  1.223    bouyer 		usb_syncmem(&vstd->dma,
   2917  1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2918  1.223    bouyer 		    sizeof(vstd->td.td_link),
   2919  1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2920   1.42  augustss 		std->link = vstd->link;
   2921   1.42  augustss 		std->td.td_link = vstd->td.td_link;
   2922  1.223    bouyer 		usb_syncmem(&std->dma,
   2923  1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2924  1.223    bouyer 		    sizeof(std->td.td_link),
   2925  1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2926   1.42  augustss 		vstd->link.std = std;
   2927  1.121  augustss 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2928  1.223    bouyer 		usb_syncmem(&vstd->dma,
   2929  1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2930  1.223    bouyer 		    sizeof(vstd->td.td_link),
   2931  1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2932   1.16  augustss 	}
   2933  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2934   1.16  augustss 
   2935   1.48  augustss 	iso->next = -1;
   2936   1.48  augustss 	iso->inuse = 0;
   2937   1.48  augustss 
   2938   1.16  augustss 	return (USBD_NORMAL_COMPLETION);
   2939   1.16  augustss 
   2940   1.48  augustss  bad:
   2941   1.16  augustss 	while (--i >= 0)
   2942   1.16  augustss 		uhci_free_std(sc, iso->stds[i]);
   2943  1.248       mrg 	mutex_exit(&sc->sc_lock);
   2944  1.248       mrg 	kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *));
   2945   1.16  augustss 	return (USBD_NOMEM);
   2946   1.16  augustss }
   2947   1.16  augustss 
   2948   1.16  augustss void
   2949  1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   2950   1.16  augustss {
   2951   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2952  1.223    bouyer 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2953  1.223    bouyer 	int i, offs;
   2954  1.223    bouyer 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2955  1.223    bouyer 
   2956   1.48  augustss 
   2957  1.197   gdamore 	DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
   2958  1.197   gdamore 			xfer->actlen, xfer->busy_free));
   2959   1.93  augustss 
   2960   1.96  augustss 	if (ii->xfer != xfer)
   2961   1.96  augustss 		/* Not on interrupt list, ignore it. */
   2962  1.170  augustss 		return;
   2963  1.170  augustss 
   2964  1.170  augustss 	if (!uhci_active_intr_info(ii))
   2965   1.96  augustss 		return;
   2966   1.96  augustss 
   2967   1.93  augustss #ifdef DIAGNOSTIC
   2968   1.93  augustss         if (ii->stdend == NULL) {
   2969   1.93  augustss                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2970   1.93  augustss #ifdef UHCI_DEBUG
   2971   1.93  augustss 		uhci_dump_ii(ii);
   2972   1.93  augustss #endif
   2973   1.93  augustss 		return;
   2974   1.93  augustss 	}
   2975   1.93  augustss #endif
   2976   1.48  augustss 
   2977   1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   2978  1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2979  1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2980  1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2981  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2982   1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2983  1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2984  1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2985  1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2986  1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2987   1.48  augustss 
   2988   1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2989  1.223    bouyer 
   2990  1.223    bouyer 	offs = 0;
   2991  1.223    bouyer 	for (i = 0; i < xfer->nframes; i++) {
   2992  1.223    bouyer 		usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i],
   2993  1.223    bouyer 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2994  1.223    bouyer 		offs += xfer->frlengths[i];
   2995  1.223    bouyer 	}
   2996   1.16  augustss }
   2997   1.16  augustss 
   2998    1.1  augustss void
   2999  1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   3000    1.1  augustss {
   3001   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3002    1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3003   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3004    1.1  augustss 	uhci_soft_qh_t *sqh;
   3005  1.223    bouyer 	int i, npoll, isread;
   3006    1.1  augustss 
   3007  1.173      gson 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
   3008    1.1  augustss 
   3009  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3010  1.248       mrg 
   3011    1.1  augustss 	npoll = upipe->u.intr.npoll;
   3012    1.1  augustss 	for(i = 0; i < npoll; i++) {
   3013    1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   3014  1.121  augustss 		sqh->elink = NULL;
   3015   1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3016  1.223    bouyer 		usb_syncmem(&sqh->dma,
   3017  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3018  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3019  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3020    1.1  augustss 	}
   3021  1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3022    1.1  augustss 
   3023  1.223    bouyer 	isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   3024  1.242  jakllsch 	usb_syncmem(&xfer->dmabuf, 0, xfer->length,
   3025  1.223    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3026  1.223    bouyer 
   3027    1.1  augustss 	/* XXX Wasteful. */
   3028   1.63  augustss 	if (xfer->pipe->repeat) {
   3029   1.55  augustss 		uhci_soft_td_t *data, *dataend;
   3030    1.1  augustss 
   3031   1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   3032   1.92  augustss 
   3033    1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   3034  1.221  jmcneill 		uhci_alloc_std_chain(upipe, sc, xfer->length,
   3035  1.221  jmcneill 				     upipe->u.intr.isread, xfer->flags,
   3036   1.63  augustss 				     &xfer->dmabuf, &data, &dataend);
   3037   1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   3038  1.223    bouyer 		usb_syncmem(&dataend->dma,
   3039  1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_status),
   3040  1.223    bouyer 		    sizeof(dataend->td.td_status),
   3041  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3042    1.1  augustss 
   3043   1.59  augustss #ifdef UHCI_DEBUG
   3044    1.1  augustss 		if (uhcidebug > 10) {
   3045   1.55  augustss 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   3046   1.55  augustss 			uhci_dump_tds(data);
   3047    1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   3048    1.1  augustss 		}
   3049    1.1  augustss #endif
   3050    1.1  augustss 
   3051   1.55  augustss 		ii->stdstart = data;
   3052   1.55  augustss 		ii->stdend = dataend;
   3053    1.7  augustss #ifdef DIAGNOSTIC
   3054   1.70  augustss 		if (!ii->isdone) {
   3055   1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   3056   1.70  augustss 		}
   3057    1.7  augustss 		ii->isdone = 0;
   3058    1.7  augustss #endif
   3059    1.1  augustss 		for (i = 0; i < npoll; i++) {
   3060    1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   3061   1.55  augustss 			sqh->elink = data;
   3062  1.121  augustss 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   3063  1.223    bouyer 			usb_syncmem(&sqh->dma,
   3064  1.223    bouyer 			    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3065  1.223    bouyer 			    sizeof(sqh->qh.qh_elink),
   3066  1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3067    1.1  augustss 		}
   3068   1.92  augustss 		xfer->status = USBD_IN_PROGRESS;
   3069   1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   3070    1.1  augustss 	} else {
   3071   1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   3072  1.169  augustss 		if (uhci_active_intr_info(ii))
   3073  1.169  augustss 			uhci_del_intr_info(ii);
   3074    1.1  augustss 	}
   3075    1.1  augustss }
   3076    1.1  augustss 
   3077    1.1  augustss /* Deallocate request data structures */
   3078    1.1  augustss void
   3079  1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   3080    1.1  augustss {
   3081   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3082    1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3083   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3084  1.223    bouyer 	int len = UGETW(xfer->request.wLength);
   3085  1.223    bouyer 	int isread = (xfer->request.bmRequestType & UT_READ);
   3086    1.1  augustss 
   3087  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3088  1.248       mrg 
   3089    1.7  augustss #ifdef DIAGNOSTIC
   3090   1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3091  1.173      gson 		panic("uhci_device_ctrl_done: not a request");
   3092    1.7  augustss #endif
   3093    1.1  augustss 
   3094  1.169  augustss 	if (!uhci_active_intr_info(ii))
   3095  1.169  augustss 		return;
   3096  1.169  augustss 
   3097   1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3098    1.1  augustss 
   3099  1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   3100  1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   3101  1.123  augustss 	else
   3102  1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   3103    1.1  augustss 
   3104   1.49  augustss 	if (upipe->u.ctl.length != 0)
   3105   1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   3106   1.49  augustss 
   3107  1.223    bouyer 	if (len) {
   3108  1.242  jakllsch 		usb_syncmem(&xfer->dmabuf, 0, len,
   3109  1.223    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3110  1.223    bouyer 	}
   3111  1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0,
   3112  1.223    bouyer 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3113  1.223    bouyer 
   3114  1.173      gson 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
   3115    1.1  augustss }
   3116    1.1  augustss 
   3117    1.1  augustss /* Deallocate request data structures */
   3118    1.1  augustss void
   3119  1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   3120    1.1  augustss {
   3121   1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3122    1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3123   1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3124  1.169  augustss 
   3125  1.173      gson 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
   3126  1.169  augustss 		    xfer, ii, sc, upipe));
   3127  1.169  augustss 
   3128  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3129  1.248       mrg 
   3130  1.169  augustss 	if (!uhci_active_intr_info(ii))
   3131  1.169  augustss 		return;
   3132    1.1  augustss 
   3133   1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3134    1.1  augustss 
   3135    1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   3136   1.32  augustss 
   3137  1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3138   1.32  augustss 
   3139  1.173      gson 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
   3140    1.1  augustss }
   3141    1.1  augustss 
   3142    1.1  augustss /* Add interrupt QH, called with vflock. */
   3143    1.1  augustss void
   3144  1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3145    1.1  augustss {
   3146   1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3147   1.42  augustss 	uhci_soft_qh_t *eqh;
   3148    1.1  augustss 
   3149   1.92  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3150   1.92  augustss 
   3151   1.42  augustss 	eqh = vf->eqh;
   3152  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3153  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3154  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   3155   1.42  augustss 	sqh->hlink       = eqh->hlink;
   3156   1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3157  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3158  1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3159  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3160   1.42  augustss 	eqh->hlink       = sqh;
   3161  1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3162  1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3163  1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3164  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3165    1.1  augustss 	vf->eqh = sqh;
   3166    1.1  augustss 	vf->bandwidth++;
   3167    1.1  augustss }
   3168    1.1  augustss 
   3169  1.119  augustss /* Remove interrupt QH. */
   3170    1.1  augustss void
   3171  1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3172    1.1  augustss {
   3173   1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3174    1.1  augustss 	uhci_soft_qh_t *pqh;
   3175    1.1  augustss 
   3176   1.92  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3177    1.1  augustss 
   3178  1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   3179  1.223    bouyer 
   3180  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3181  1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   3182  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3183  1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3184  1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3185  1.223    bouyer 		usb_syncmem(&sqh->dma,
   3186  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3187  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3188  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3189  1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   3190  1.124  augustss 	}
   3191  1.124  augustss 
   3192   1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3193  1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3194  1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3195  1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3196   1.42  augustss 	pqh->hlink       = sqh->hlink;
   3197   1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3198  1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3199  1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   3200  1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3201  1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   3202    1.1  augustss 	if (vf->eqh == sqh)
   3203    1.1  augustss 		vf->eqh = pqh;
   3204    1.1  augustss 	vf->bandwidth--;
   3205    1.1  augustss }
   3206    1.1  augustss 
   3207    1.1  augustss usbd_status
   3208  1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3209    1.1  augustss {
   3210    1.1  augustss 	uhci_soft_qh_t *sqh;
   3211  1.248       mrg 	int i, npoll;
   3212    1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   3213    1.1  augustss 
   3214  1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
   3215    1.1  augustss 	if (ival == 0) {
   3216  1.173      gson 		printf("uhci_device_setintr: 0 interval\n");
   3217    1.1  augustss 		return (USBD_INVAL);
   3218    1.1  augustss 	}
   3219    1.1  augustss 
   3220    1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   3221    1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   3222    1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3223  1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
   3224    1.1  augustss 
   3225    1.1  augustss 	upipe->u.intr.npoll = npoll;
   3226  1.152  augustss 	upipe->u.intr.qhs =
   3227  1.248       mrg 		kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP);
   3228  1.248       mrg 	if (upipe->u.intr.qhs == NULL)
   3229  1.248       mrg 		return USBD_NOMEM;
   3230    1.1  augustss 
   3231  1.152  augustss 	/*
   3232    1.1  augustss 	 * Figure out which offset in the schedule that has most
   3233    1.1  augustss 	 * bandwidth left over.
   3234    1.1  augustss 	 */
   3235    1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3236    1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3237    1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   3238    1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3239    1.1  augustss 		if (bw < bestbw) {
   3240    1.1  augustss 			bestbw = bw;
   3241    1.1  augustss 			bestoffs = offs;
   3242    1.1  augustss 		}
   3243    1.1  augustss 	}
   3244  1.173      gson 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   3245    1.1  augustss 
   3246  1.248       mrg 	mutex_enter(&sc->sc_lock);
   3247    1.1  augustss 	for(i = 0; i < npoll; i++) {
   3248    1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3249  1.121  augustss 		sqh->elink = NULL;
   3250   1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3251  1.223    bouyer 		usb_syncmem(&sqh->dma,
   3252  1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3253  1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3254  1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3255    1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   3256    1.1  augustss 	}
   3257    1.1  augustss #undef MOD
   3258    1.1  augustss 
   3259    1.1  augustss 	/* Enter QHs into the controller data structures. */
   3260    1.1  augustss 	for(i = 0; i < npoll; i++)
   3261   1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   3262  1.248       mrg 	mutex_exit(&sc->sc_lock);
   3263    1.1  augustss 
   3264  1.173      gson 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
   3265    1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3266    1.1  augustss }
   3267    1.1  augustss 
   3268    1.1  augustss /* Open a new pipe. */
   3269    1.1  augustss usbd_status
   3270  1.119  augustss uhci_open(usbd_pipe_handle pipe)
   3271    1.1  augustss {
   3272  1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3273    1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3274    1.1  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   3275  1.248       mrg 	usbd_status err = USBD_NOMEM;
   3276   1.79  augustss 	int ival;
   3277    1.1  augustss 
   3278    1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   3279  1.152  augustss 		     pipe, pipe->device->address,
   3280    1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   3281   1.92  augustss 
   3282  1.248       mrg 	if (sc->sc_dying)
   3283  1.248       mrg 		return USBD_IOERROR;
   3284  1.248       mrg 
   3285   1.92  augustss 	upipe->aborting = 0;
   3286  1.236  drochner 	/* toggle state needed for bulk endpoints */
   3287  1.236  drochner 	upipe->nexttoggle = pipe->endpoint->datatoggle;
   3288   1.92  augustss 
   3289    1.1  augustss 	if (pipe->device->address == sc->sc_addr) {
   3290    1.1  augustss 		switch (ed->bEndpointAddress) {
   3291    1.1  augustss 		case USB_CONTROL_ENDPOINT:
   3292    1.1  augustss 			pipe->methods = &uhci_root_ctrl_methods;
   3293    1.1  augustss 			break;
   3294   1.45  augustss 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   3295    1.1  augustss 			pipe->methods = &uhci_root_intr_methods;
   3296    1.1  augustss 			break;
   3297    1.1  augustss 		default:
   3298    1.1  augustss 			return (USBD_INVAL);
   3299    1.1  augustss 		}
   3300    1.1  augustss 	} else {
   3301    1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3302    1.1  augustss 		case UE_CONTROL:
   3303    1.1  augustss 			pipe->methods = &uhci_device_ctrl_methods;
   3304    1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   3305   1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   3306    1.5  augustss 				goto bad;
   3307    1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   3308   1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   3309    1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3310    1.5  augustss 				goto bad;
   3311    1.5  augustss 			}
   3312    1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   3313   1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   3314    1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3315    1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3316    1.5  augustss 				goto bad;
   3317    1.5  augustss 			}
   3318  1.152  augustss 			err = usb_allocmem(&sc->sc_bus,
   3319  1.152  augustss 				  sizeof(usb_device_request_t),
   3320   1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   3321   1.63  augustss 			if (err) {
   3322    1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3323    1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3324    1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   3325    1.5  augustss 				goto bad;
   3326    1.5  augustss 			}
   3327    1.1  augustss 			break;
   3328    1.1  augustss 		case UE_INTERRUPT:
   3329    1.1  augustss 			pipe->methods = &uhci_device_intr_methods;
   3330   1.79  augustss 			ival = pipe->interval;
   3331   1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   3332   1.79  augustss 				ival = ed->bInterval;
   3333   1.80  augustss 			return (uhci_device_setintr(sc, upipe, ival));
   3334    1.1  augustss 		case UE_ISOCHRONOUS:
   3335   1.16  augustss 			pipe->methods = &uhci_device_isoc_methods;
   3336   1.48  augustss 			return (uhci_setup_isoc(pipe));
   3337    1.1  augustss 		case UE_BULK:
   3338    1.1  augustss 			pipe->methods = &uhci_device_bulk_methods;
   3339    1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   3340   1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   3341    1.5  augustss 				goto bad;
   3342    1.1  augustss 			break;
   3343    1.1  augustss 		}
   3344    1.1  augustss 	}
   3345    1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3346    1.5  augustss 
   3347    1.5  augustss  bad:
   3348  1.248       mrg 	return USBD_NOMEM;
   3349    1.1  augustss }
   3350    1.1  augustss 
   3351    1.1  augustss /*
   3352    1.1  augustss  * Data structures and routines to emulate the root hub.
   3353    1.1  augustss  */
   3354    1.1  augustss usb_device_descriptor_t uhci_devd = {
   3355    1.1  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   3356    1.1  augustss 	UDESC_DEVICE,		/* type */
   3357    1.1  augustss 	{0x00, 0x01},		/* USB version */
   3358   1.87  augustss 	UDCLASS_HUB,		/* class */
   3359   1.87  augustss 	UDSUBCLASS_HUB,		/* subclass */
   3360  1.144  augustss 	UDPROTO_FSHUB,		/* protocol */
   3361    1.1  augustss 	64,			/* max packet */
   3362    1.1  augustss 	{0},{0},{0x00,0x01},	/* device id */
   3363    1.1  augustss 	1,2,0,			/* string indicies */
   3364    1.1  augustss 	1			/* # of configurations */
   3365    1.1  augustss };
   3366    1.1  augustss 
   3367  1.208  drochner const usb_config_descriptor_t uhci_confd = {
   3368    1.1  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   3369    1.1  augustss 	UDESC_CONFIG,
   3370    1.1  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   3371    1.1  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   3372    1.1  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   3373    1.1  augustss 	1,
   3374    1.1  augustss 	1,
   3375    1.1  augustss 	0,
   3376  1.206  drochner 	UC_ATTR_MBO | UC_SELF_POWERED,
   3377    1.1  augustss 	0			/* max power */
   3378    1.1  augustss };
   3379    1.1  augustss 
   3380  1.208  drochner const usb_interface_descriptor_t uhci_ifcd = {
   3381    1.1  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   3382    1.1  augustss 	UDESC_INTERFACE,
   3383    1.1  augustss 	0,
   3384    1.1  augustss 	0,
   3385    1.1  augustss 	1,
   3386   1.87  augustss 	UICLASS_HUB,
   3387   1.87  augustss 	UISUBCLASS_HUB,
   3388  1.144  augustss 	UIPROTO_FSHUB,
   3389    1.1  augustss 	0
   3390    1.1  augustss };
   3391    1.1  augustss 
   3392  1.208  drochner const usb_endpoint_descriptor_t uhci_endpd = {
   3393    1.1  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   3394    1.1  augustss 	UDESC_ENDPOINT,
   3395   1.45  augustss 	UE_DIR_IN | UHCI_INTR_ENDPT,
   3396    1.1  augustss 	UE_INTERRUPT,
   3397    1.1  augustss 	{8},
   3398    1.1  augustss 	255
   3399    1.1  augustss };
   3400    1.1  augustss 
   3401  1.208  drochner const usb_hub_descriptor_t uhci_hubd_piix = {
   3402    1.1  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   3403    1.1  augustss 	UDESC_HUB,
   3404    1.1  augustss 	2,
   3405    1.1  augustss 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   3406    1.1  augustss 	50,			/* power on to power good */
   3407    1.1  augustss 	0,
   3408    1.1  augustss 	{ 0x00 },		/* both ports are removable */
   3409  1.199  christos 	{ 0 },
   3410    1.1  augustss };
   3411    1.1  augustss 
   3412    1.1  augustss /*
   3413  1.166   dsainty  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3414  1.166   dsainty  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3415  1.166   dsainty  * should not be used by the USB subsystem.  As we cannot issue a
   3416  1.166   dsainty  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3417  1.166   dsainty  * will be enabled as part of the reset.
   3418  1.166   dsainty  *
   3419  1.166   dsainty  * On the VT83C572, the port cannot be successfully enabled until the
   3420  1.166   dsainty  * outstanding "port enable change" and "connection status change"
   3421  1.166   dsainty  * events have been reset.
   3422  1.166   dsainty  */
   3423  1.166   dsainty Static usbd_status
   3424  1.166   dsainty uhci_portreset(uhci_softc_t *sc, int index)
   3425  1.166   dsainty {
   3426  1.166   dsainty 	int lim, port, x;
   3427  1.166   dsainty 
   3428  1.166   dsainty 	if (index == 1)
   3429  1.166   dsainty 		port = UHCI_PORTSC1;
   3430  1.166   dsainty 	else if (index == 2)
   3431  1.166   dsainty 		port = UHCI_PORTSC2;
   3432  1.166   dsainty 	else
   3433  1.166   dsainty 		return (USBD_IOERROR);
   3434  1.166   dsainty 
   3435  1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3436  1.166   dsainty 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3437  1.166   dsainty 
   3438  1.166   dsainty 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3439  1.166   dsainty 
   3440  1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   3441  1.166   dsainty 		    index, UREAD2(sc, port)));
   3442  1.166   dsainty 
   3443  1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3444  1.222  drochner 	UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
   3445  1.166   dsainty 
   3446  1.166   dsainty 	delay(100);
   3447  1.166   dsainty 
   3448  1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3449  1.166   dsainty 		    index, UREAD2(sc, port)));
   3450  1.166   dsainty 
   3451  1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3452  1.166   dsainty 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3453  1.166   dsainty 
   3454  1.166   dsainty 	for (lim = 10; --lim > 0;) {
   3455  1.166   dsainty 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3456  1.166   dsainty 
   3457  1.166   dsainty 		x = UREAD2(sc, port);
   3458  1.166   dsainty 
   3459  1.166   dsainty 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3460  1.166   dsainty 			    index, lim, x));
   3461  1.166   dsainty 
   3462  1.166   dsainty 		if (!(x & UHCI_PORTSC_CCS)) {
   3463  1.166   dsainty 			/*
   3464  1.166   dsainty 			 * No device is connected (or was disconnected
   3465  1.166   dsainty 			 * during reset).  Consider the port reset.
   3466  1.166   dsainty 			 * The delay must be long enough to ensure on
   3467  1.166   dsainty 			 * the initial iteration that the device
   3468  1.166   dsainty 			 * connection will have been registered.  50ms
   3469  1.166   dsainty 			 * appears to be sufficient, but 20ms is not.
   3470  1.166   dsainty 			 */
   3471  1.166   dsainty 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3472  1.166   dsainty 				    index, lim));
   3473  1.166   dsainty 			break;
   3474  1.166   dsainty 		}
   3475  1.166   dsainty 
   3476  1.166   dsainty 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3477  1.166   dsainty 			/*
   3478  1.166   dsainty 			 * Port enabled changed and/or connection
   3479  1.166   dsainty 			 * status changed were set.  Reset either or
   3480  1.166   dsainty 			 * both raised flags (by writing a 1 to that
   3481  1.166   dsainty 			 * bit), and wait again for state to settle.
   3482  1.166   dsainty 			 */
   3483  1.166   dsainty 			UWRITE2(sc, port, URWMASK(x) |
   3484  1.166   dsainty 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3485  1.166   dsainty 			continue;
   3486  1.166   dsainty 		}
   3487  1.166   dsainty 
   3488  1.166   dsainty 		if (x & UHCI_PORTSC_PE)
   3489  1.166   dsainty 			/* Port is enabled */
   3490  1.166   dsainty 			break;
   3491  1.166   dsainty 
   3492  1.166   dsainty 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3493  1.166   dsainty 	}
   3494  1.166   dsainty 
   3495  1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3496  1.166   dsainty 		    index, UREAD2(sc, port)));
   3497  1.166   dsainty 
   3498  1.166   dsainty 	if (lim <= 0) {
   3499  1.166   dsainty 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3500  1.166   dsainty 		return (USBD_TIMEOUT);
   3501  1.166   dsainty 	}
   3502  1.184     perry 
   3503  1.166   dsainty 	sc->sc_isreset = 1;
   3504  1.166   dsainty 	return (USBD_NORMAL_COMPLETION);
   3505  1.166   dsainty }
   3506  1.166   dsainty 
   3507  1.166   dsainty /*
   3508    1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   3509    1.1  augustss  */
   3510    1.1  augustss usbd_status
   3511  1.119  augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3512    1.1  augustss {
   3513  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3514   1.63  augustss 	usbd_status err;
   3515   1.16  augustss 
   3516   1.52  augustss 	/* Insert last in queue. */
   3517  1.248       mrg 	mutex_enter(&sc->sc_lock);
   3518   1.63  augustss 	err = usb_insert_transfer(xfer);
   3519  1.248       mrg 	mutex_exit(&sc->sc_lock);
   3520   1.63  augustss 	if (err)
   3521   1.63  augustss 		return (err);
   3522   1.52  augustss 
   3523  1.152  augustss 	/*
   3524   1.94  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3525   1.94  augustss 	 * so start it first.
   3526   1.67  augustss 	 */
   3527   1.63  augustss 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3528   1.16  augustss }
   3529   1.16  augustss 
   3530   1.16  augustss usbd_status
   3531  1.119  augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3532   1.16  augustss {
   3533  1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3534    1.1  augustss 	usb_device_request_t *req;
   3535   1.59  augustss 	void *buf = NULL;
   3536    1.1  augustss 	int port, x;
   3537  1.248       mrg 	int len, value, index, status, change, l, totlen = 0;
   3538    1.1  augustss 	usb_port_status_t ps;
   3539   1.63  augustss 	usbd_status err;
   3540    1.1  augustss 
   3541   1.82  augustss 	if (sc->sc_dying)
   3542   1.82  augustss 		return (USBD_IOERROR);
   3543   1.82  augustss 
   3544   1.48  augustss #ifdef DIAGNOSTIC
   3545   1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3546  1.248       mrg 		panic("uhci_root_ctrl_start: not a request");
   3547   1.48  augustss #endif
   3548   1.63  augustss 	req = &xfer->request;
   3549    1.1  augustss 
   3550  1.152  augustss 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3551    1.1  augustss 		    req->bmRequestType, req->bRequest));
   3552    1.1  augustss 
   3553    1.1  augustss 	len = UGETW(req->wLength);
   3554    1.1  augustss 	value = UGETW(req->wValue);
   3555    1.1  augustss 	index = UGETW(req->wIndex);
   3556   1.49  augustss 
   3557   1.49  augustss 	if (len != 0)
   3558  1.159  augustss 		buf = KERNADDR(&xfer->dmabuf, 0);
   3559   1.49  augustss 
   3560    1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3561    1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   3562    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3563    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3564    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3565  1.152  augustss 		/*
   3566   1.13  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3567    1.1  augustss 		 * for the integrated root hub.
   3568    1.1  augustss 		 */
   3569    1.1  augustss 		break;
   3570    1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3571    1.1  augustss 		if (len > 0) {
   3572    1.1  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   3573    1.1  augustss 			totlen = 1;
   3574    1.1  augustss 		}
   3575    1.1  augustss 		break;
   3576    1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3577    1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3578  1.195  christos 		if (len == 0)
   3579  1.195  christos 			break;
   3580    1.1  augustss 		switch(value >> 8) {
   3581    1.1  augustss 		case UDESC_DEVICE:
   3582    1.1  augustss 			if ((value & 0xff) != 0) {
   3583   1.63  augustss 				err = USBD_IOERROR;
   3584    1.1  augustss 				goto ret;
   3585    1.1  augustss 			}
   3586    1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3587   1.27  augustss 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3588    1.1  augustss 			memcpy(buf, &uhci_devd, l);
   3589    1.1  augustss 			break;
   3590    1.1  augustss 		case UDESC_CONFIG:
   3591    1.1  augustss 			if ((value & 0xff) != 0) {
   3592   1.63  augustss 				err = USBD_IOERROR;
   3593    1.1  augustss 				goto ret;
   3594    1.1  augustss 			}
   3595    1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3596    1.1  augustss 			memcpy(buf, &uhci_confd, l);
   3597    1.1  augustss 			buf = (char *)buf + l;
   3598    1.1  augustss 			len -= l;
   3599    1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3600    1.1  augustss 			totlen += l;
   3601    1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   3602    1.1  augustss 			buf = (char *)buf + l;
   3603    1.1  augustss 			len -= l;
   3604    1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3605    1.1  augustss 			totlen += l;
   3606    1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   3607    1.1  augustss 			break;
   3608    1.1  augustss 		case UDESC_STRING:
   3609  1.213  drochner #define sd ((usb_string_descriptor_t *)buf)
   3610    1.1  augustss 			switch (value & 0xff) {
   3611  1.182  augustss 			case 0: /* Language table */
   3612  1.213  drochner 				totlen = usb_makelangtbl(sd, len);
   3613  1.182  augustss 				break;
   3614    1.1  augustss 			case 1: /* Vendor */
   3615  1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3616  1.213  drochner 							 sc->sc_vendor);
   3617    1.1  augustss 				break;
   3618    1.1  augustss 			case 2: /* Product */
   3619  1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3620  1.213  drochner 							 "UHCI root hub");
   3621    1.1  augustss 				break;
   3622    1.1  augustss 			}
   3623  1.213  drochner #undef sd
   3624    1.1  augustss 			break;
   3625    1.1  augustss 		default:
   3626   1.63  augustss 			err = USBD_IOERROR;
   3627    1.1  augustss 			goto ret;
   3628    1.1  augustss 		}
   3629    1.1  augustss 		break;
   3630    1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3631    1.1  augustss 		if (len > 0) {
   3632    1.1  augustss 			*(u_int8_t *)buf = 0;
   3633    1.1  augustss 			totlen = 1;
   3634    1.1  augustss 		}
   3635    1.1  augustss 		break;
   3636    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3637    1.1  augustss 		if (len > 1) {
   3638    1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3639    1.1  augustss 			totlen = 2;
   3640    1.1  augustss 		}
   3641    1.1  augustss 		break;
   3642    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3643    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3644    1.1  augustss 		if (len > 1) {
   3645    1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3646    1.1  augustss 			totlen = 2;
   3647    1.1  augustss 		}
   3648    1.1  augustss 		break;
   3649    1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3650    1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   3651   1.63  augustss 			err = USBD_IOERROR;
   3652    1.1  augustss 			goto ret;
   3653    1.1  augustss 		}
   3654    1.1  augustss 		sc->sc_addr = value;
   3655    1.1  augustss 		break;
   3656    1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3657    1.1  augustss 		if (value != 0 && value != 1) {
   3658   1.63  augustss 			err = USBD_IOERROR;
   3659    1.1  augustss 			goto ret;
   3660    1.1  augustss 		}
   3661    1.1  augustss 		sc->sc_conf = value;
   3662    1.1  augustss 		break;
   3663    1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3664    1.1  augustss 		break;
   3665    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3666    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3667    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3668   1.63  augustss 		err = USBD_IOERROR;
   3669    1.1  augustss 		goto ret;
   3670    1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3671    1.1  augustss 		break;
   3672    1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3673    1.1  augustss 		break;
   3674    1.1  augustss 	/* Hub requests */
   3675    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3676    1.1  augustss 		break;
   3677    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3678   1.12  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3679   1.12  augustss 			     "port=%d feature=%d\n",
   3680    1.1  augustss 			     index, value));
   3681    1.1  augustss 		if (index == 1)
   3682    1.1  augustss 			port = UHCI_PORTSC1;
   3683    1.1  augustss 		else if (index == 2)
   3684    1.1  augustss 			port = UHCI_PORTSC2;
   3685    1.1  augustss 		else {
   3686   1.63  augustss 			err = USBD_IOERROR;
   3687    1.1  augustss 			goto ret;
   3688    1.1  augustss 		}
   3689    1.1  augustss 		switch(value) {
   3690    1.1  augustss 		case UHF_PORT_ENABLE:
   3691  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3692    1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3693    1.1  augustss 			break;
   3694    1.1  augustss 		case UHF_PORT_SUSPEND:
   3695  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3696  1.222  drochner 			if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
   3697  1.222  drochner 				break;
   3698  1.222  drochner 			UWRITE2(sc, port, x | UHCI_PORTSC_RD);
   3699  1.222  drochner 			/* see USB2 spec ch. 7.1.7.7 */
   3700  1.222  drochner 			usb_delay_ms(&sc->sc_bus, 20);
   3701    1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3702  1.222  drochner 			/* 10ms resume delay must be provided by caller */
   3703    1.1  augustss 			break;
   3704    1.1  augustss 		case UHF_PORT_RESET:
   3705  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3706    1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3707    1.1  augustss 			break;
   3708    1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3709  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3710    1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3711    1.1  augustss 			break;
   3712    1.1  augustss 		case UHF_C_PORT_ENABLE:
   3713  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3714    1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3715    1.1  augustss 			break;
   3716    1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3717  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3718    1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3719    1.1  augustss 			break;
   3720    1.1  augustss 		case UHF_C_PORT_RESET:
   3721    1.1  augustss 			sc->sc_isreset = 0;
   3722   1.63  augustss 			err = USBD_NORMAL_COMPLETION;
   3723    1.1  augustss 			goto ret;
   3724    1.1  augustss 		case UHF_PORT_CONNECTION:
   3725    1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3726    1.1  augustss 		case UHF_PORT_POWER:
   3727    1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3728    1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3729    1.1  augustss 		default:
   3730   1.63  augustss 			err = USBD_IOERROR;
   3731    1.1  augustss 			goto ret;
   3732    1.1  augustss 		}
   3733    1.1  augustss 		break;
   3734    1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3735    1.1  augustss 		if (index == 1)
   3736    1.1  augustss 			port = UHCI_PORTSC1;
   3737    1.1  augustss 		else if (index == 2)
   3738    1.1  augustss 			port = UHCI_PORTSC2;
   3739    1.1  augustss 		else {
   3740   1.63  augustss 			err = USBD_IOERROR;
   3741    1.1  augustss 			goto ret;
   3742    1.1  augustss 		}
   3743    1.1  augustss 		if (len > 0) {
   3744  1.152  augustss 			*(u_int8_t *)buf =
   3745    1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3746    1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   3747    1.1  augustss 			totlen = 1;
   3748    1.1  augustss 		}
   3749    1.1  augustss 		break;
   3750    1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3751  1.195  christos 		if (len == 0)
   3752  1.195  christos 			break;
   3753  1.177    toshii 		if ((value & 0xff) != 0) {
   3754   1.63  augustss 			err = USBD_IOERROR;
   3755    1.1  augustss 			goto ret;
   3756    1.1  augustss 		}
   3757    1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3758    1.1  augustss 		totlen = l;
   3759    1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   3760    1.1  augustss 		break;
   3761    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3762    1.1  augustss 		if (len != 4) {
   3763   1.63  augustss 			err = USBD_IOERROR;
   3764    1.1  augustss 			goto ret;
   3765    1.1  augustss 		}
   3766    1.1  augustss 		memset(buf, 0, len);
   3767    1.1  augustss 		totlen = len;
   3768    1.1  augustss 		break;
   3769    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3770    1.1  augustss 		if (index == 1)
   3771    1.1  augustss 			port = UHCI_PORTSC1;
   3772    1.1  augustss 		else if (index == 2)
   3773    1.1  augustss 			port = UHCI_PORTSC2;
   3774    1.1  augustss 		else {
   3775   1.63  augustss 			err = USBD_IOERROR;
   3776    1.1  augustss 			goto ret;
   3777    1.1  augustss 		}
   3778    1.1  augustss 		if (len != 4) {
   3779   1.63  augustss 			err = USBD_IOERROR;
   3780    1.1  augustss 			goto ret;
   3781    1.1  augustss 		}
   3782    1.1  augustss 		x = UREAD2(sc, port);
   3783    1.1  augustss 		status = change = 0;
   3784  1.142  augustss 		if (x & UHCI_PORTSC_CCS)
   3785    1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   3786  1.152  augustss 		if (x & UHCI_PORTSC_CSC)
   3787    1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   3788  1.152  augustss 		if (x & UHCI_PORTSC_PE)
   3789    1.1  augustss 			status |= UPS_PORT_ENABLED;
   3790  1.152  augustss 		if (x & UHCI_PORTSC_POEDC)
   3791    1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   3792  1.152  augustss 		if (x & UHCI_PORTSC_OCI)
   3793    1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   3794  1.152  augustss 		if (x & UHCI_PORTSC_OCIC)
   3795    1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3796  1.152  augustss 		if (x & UHCI_PORTSC_SUSP)
   3797    1.1  augustss 			status |= UPS_SUSPEND;
   3798  1.152  augustss 		if (x & UHCI_PORTSC_LSDA)
   3799    1.1  augustss 			status |= UPS_LOW_SPEED;
   3800    1.1  augustss 		status |= UPS_PORT_POWER;
   3801    1.1  augustss 		if (sc->sc_isreset)
   3802    1.1  augustss 			change |= UPS_C_PORT_RESET;
   3803    1.1  augustss 		USETW(ps.wPortStatus, status);
   3804    1.1  augustss 		USETW(ps.wPortChange, change);
   3805    1.1  augustss 		l = min(len, sizeof ps);
   3806    1.1  augustss 		memcpy(buf, &ps, l);
   3807    1.1  augustss 		totlen = l;
   3808    1.1  augustss 		break;
   3809    1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3810   1.63  augustss 		err = USBD_IOERROR;
   3811    1.1  augustss 		goto ret;
   3812    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3813    1.1  augustss 		break;
   3814    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3815    1.1  augustss 		if (index == 1)
   3816    1.1  augustss 			port = UHCI_PORTSC1;
   3817    1.1  augustss 		else if (index == 2)
   3818    1.1  augustss 			port = UHCI_PORTSC2;
   3819    1.1  augustss 		else {
   3820   1.63  augustss 			err = USBD_IOERROR;
   3821    1.1  augustss 			goto ret;
   3822    1.1  augustss 		}
   3823    1.1  augustss 		switch(value) {
   3824    1.1  augustss 		case UHF_PORT_ENABLE:
   3825  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3826    1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3827    1.1  augustss 			break;
   3828    1.1  augustss 		case UHF_PORT_SUSPEND:
   3829  1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3830    1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3831    1.1  augustss 			break;
   3832    1.1  augustss 		case UHF_PORT_RESET:
   3833  1.166   dsainty 			err = uhci_portreset(sc, index);
   3834  1.166   dsainty 			goto ret;
   3835  1.111  augustss 		case UHF_PORT_POWER:
   3836  1.111  augustss 			/* Pretend we turned on power */
   3837  1.115   mycroft 			err = USBD_NORMAL_COMPLETION;
   3838  1.111  augustss 			goto ret;
   3839    1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3840    1.1  augustss 		case UHF_C_PORT_ENABLE:
   3841    1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3842    1.1  augustss 		case UHF_PORT_CONNECTION:
   3843    1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3844    1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3845    1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3846    1.1  augustss 		case UHF_C_PORT_RESET:
   3847    1.1  augustss 		default:
   3848   1.63  augustss 			err = USBD_IOERROR;
   3849    1.1  augustss 			goto ret;
   3850    1.1  augustss 		}
   3851    1.1  augustss 		break;
   3852    1.1  augustss 	default:
   3853   1.63  augustss 		err = USBD_IOERROR;
   3854    1.1  augustss 		goto ret;
   3855    1.1  augustss 	}
   3856   1.63  augustss 	xfer->actlen = totlen;
   3857   1.63  augustss 	err = USBD_NORMAL_COMPLETION;
   3858    1.1  augustss  ret:
   3859   1.63  augustss 	xfer->status = err;
   3860  1.248       mrg 	mutex_enter(&sc->sc_lock);
   3861   1.63  augustss 	usb_transfer_complete(xfer);
   3862  1.248       mrg 	mutex_exit(&sc->sc_lock);
   3863    1.1  augustss 	return (USBD_IN_PROGRESS);
   3864    1.1  augustss }
   3865    1.1  augustss 
   3866    1.1  augustss /* Abort a root control request. */
   3867    1.1  augustss void
   3868  1.205  christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3869    1.1  augustss {
   3870   1.70  augustss 	/* Nothing to do, all transfers are synchronous. */
   3871    1.1  augustss }
   3872    1.1  augustss 
   3873    1.1  augustss /* Close the root pipe. */
   3874    1.1  augustss void
   3875  1.205  christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3876    1.1  augustss {
   3877    1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   3878    1.1  augustss }
   3879    1.1  augustss 
   3880    1.1  augustss /* Abort a root interrupt request. */
   3881    1.1  augustss void
   3882  1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   3883    1.1  augustss {
   3884  1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3885   1.30  augustss 
   3886  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3887  1.248       mrg 
   3888  1.234    dyoung 	callout_stop(&sc->sc_poll_handle);
   3889   1.96  augustss 	sc->sc_intr_xfer = NULL;
   3890   1.58  augustss 
   3891   1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3892   1.58  augustss 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   3893   1.63  augustss 		xfer->pipe->intrxfer = 0;
   3894   1.58  augustss 	}
   3895   1.63  augustss 	xfer->status = USBD_CANCELLED;
   3896   1.96  augustss #ifdef DIAGNOSTIC
   3897   1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3898   1.96  augustss #endif
   3899   1.63  augustss 	usb_transfer_complete(xfer);
   3900    1.1  augustss }
   3901    1.1  augustss 
   3902   1.16  augustss usbd_status
   3903  1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3904   1.16  augustss {
   3905  1.248       mrg 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3906   1.63  augustss 	usbd_status err;
   3907   1.16  augustss 
   3908   1.52  augustss 	/* Insert last in queue. */
   3909  1.248       mrg 	mutex_enter(&sc->sc_lock);
   3910   1.63  augustss 	err = usb_insert_transfer(xfer);
   3911  1.248       mrg 	mutex_exit(&sc->sc_lock);
   3912   1.63  augustss 	if (err)
   3913   1.63  augustss 		return (err);
   3914   1.52  augustss 
   3915  1.186     skrll 	/*
   3916  1.186     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3917   1.67  augustss 	 * start first
   3918   1.67  augustss 	 */
   3919   1.63  augustss 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3920   1.16  augustss }
   3921   1.16  augustss 
   3922    1.1  augustss /* Start a transfer on the root interrupt pipe */
   3923    1.1  augustss usbd_status
   3924  1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   3925    1.1  augustss {
   3926   1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   3927  1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3928  1.174  drochner 	unsigned int ival;
   3929    1.1  augustss 
   3930  1.173      gson 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
   3931   1.63  augustss 		     xfer, xfer->length, xfer->flags));
   3932   1.82  augustss 
   3933   1.82  augustss 	if (sc->sc_dying)
   3934   1.82  augustss 		return (USBD_IOERROR);
   3935    1.1  augustss 
   3936  1.174  drochner 	/* XXX temporary variable needed to avoid gcc3 warning */
   3937  1.174  drochner 	ival = xfer->pipe->endpoint->edesc->bInterval;
   3938  1.174  drochner 	sc->sc_ival = mstohz(ival);
   3939  1.234    dyoung 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3940   1.96  augustss 	sc->sc_intr_xfer = xfer;
   3941    1.1  augustss 	return (USBD_IN_PROGRESS);
   3942    1.1  augustss }
   3943    1.1  augustss 
   3944    1.1  augustss /* Close the root interrupt pipe. */
   3945    1.1  augustss void
   3946  1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   3947    1.1  augustss {
   3948  1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3949   1.30  augustss 
   3950  1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3951  1.248       mrg 
   3952  1.234    dyoung 	callout_stop(&sc->sc_poll_handle);
   3953   1.96  augustss 	sc->sc_intr_xfer = NULL;
   3954    1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   3955    1.1  augustss }
   3956