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uhci.c revision 1.264.4.10
      1  1.264.4.10     skrll /*	$NetBSD: uhci.c,v 1.264.4.10 2014/12/03 22:40:55 skrll Exp $	*/
      2         1.1  augustss 
      3         1.1  augustss /*
      4       1.248       mrg  * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc.
      5         1.1  augustss  * All rights reserved.
      6         1.1  augustss  *
      7        1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8       1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9       1.248       mrg  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10       1.248       mrg  * and Matthew R. Green (mrg (at) eterna.com.au).
     11         1.1  augustss  *
     12         1.1  augustss  * Redistribution and use in source and binary forms, with or without
     13         1.1  augustss  * modification, are permitted provided that the following conditions
     14         1.1  augustss  * are met:
     15         1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     16         1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     17         1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     18         1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     19         1.1  augustss  *    documentation and/or other materials provided with the distribution.
     20         1.1  augustss  *
     21         1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22         1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23         1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24         1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25         1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26         1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27         1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28         1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29         1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30         1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31         1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     32         1.1  augustss  */
     33         1.1  augustss 
     34         1.1  augustss /*
     35         1.1  augustss  * USB Universal Host Controller driver.
     36        1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     37         1.1  augustss  *
     38       1.229  uebayasi  * UHCI spec: http://www.intel.com/technology/usb/spec.htm
     39       1.229  uebayasi  * USB spec: http://www.usb.org/developers/docs/
     40        1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     41        1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     42         1.1  augustss  */
     43       1.143     lukem 
     44       1.143     lukem #include <sys/cdefs.h>
     45  1.264.4.10     skrll __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.264.4.10 2014/12/03 22:40:55 skrll Exp $");
     46         1.1  augustss 
     47         1.1  augustss #include <sys/param.h>
     48         1.1  augustss #include <sys/systm.h>
     49         1.1  augustss #include <sys/kernel.h>
     50       1.248       mrg #include <sys/kmem.h>
     51         1.1  augustss #include <sys/device.h>
     52        1.67  augustss #include <sys/select.h>
     53       1.183      fvdl #include <sys/extent.h>
     54         1.1  augustss #include <sys/proc.h>
     55         1.1  augustss #include <sys/queue.h>
     56       1.211        ad #include <sys/bus.h>
     57       1.247       mrg #include <sys/cpu.h>
     58         1.1  augustss 
     59        1.39  augustss #include <machine/endian.h>
     60         1.7  augustss 
     61         1.1  augustss #include <dev/usb/usb.h>
     62         1.1  augustss #include <dev/usb/usbdi.h>
     63         1.1  augustss #include <dev/usb/usbdivar.h>
     64         1.7  augustss #include <dev/usb/usb_mem.h>
     65         1.1  augustss #include <dev/usb/usb_quirks.h>
     66         1.1  augustss 
     67         1.1  augustss #include <dev/usb/uhcireg.h>
     68         1.1  augustss #include <dev/usb/uhcivar.h>
     69       1.213  drochner #include <dev/usb/usbroothub_subr.h>
     70         1.1  augustss 
     71       1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     72       1.125  augustss /*#define UHCI_CTL_LOOP */
     73       1.125  augustss 
     74        1.13  augustss 
     75        1.37  augustss 
     76        1.67  augustss #ifdef UHCI_DEBUG
     77        1.92  augustss uhci_softc_t *thesc;
     78        1.59  augustss #define DPRINTF(x)	if (uhcidebug) printf x
     79        1.59  augustss #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
     80        1.67  augustss int uhcidebug = 0;
     81       1.125  augustss int uhcinoloop = 0;
     82        1.59  augustss #else
     83        1.59  augustss #define DPRINTF(x)
     84        1.59  augustss #define DPRINTFN(n,x)
     85        1.59  augustss #endif
     86        1.59  augustss 
     87        1.39  augustss /*
     88        1.39  augustss  * The UHCI controller is little endian, so on big endian machines
     89       1.181  drochner  * the data stored in memory needs to be swapped.
     90        1.39  augustss  */
     91        1.39  augustss 
     92         1.1  augustss struct uhci_pipe {
     93         1.1  augustss 	struct usbd_pipe pipe;
     94        1.32  augustss 	int nexttoggle;
     95        1.92  augustss 
     96        1.92  augustss 	u_char aborting;
     97        1.92  augustss 	usbd_xfer_handle abortstart, abortend;
     98        1.92  augustss 
     99         1.1  augustss 	/* Info needed for different pipe kinds. */
    100         1.1  augustss 	union {
    101         1.1  augustss 		/* Control pipe */
    102         1.1  augustss 		struct {
    103         1.1  augustss 			uhci_soft_qh_t *sqh;
    104         1.7  augustss 			usb_dma_t reqdma;
    105        1.16  augustss 			uhci_soft_td_t *setup, *stat;
    106         1.1  augustss 			u_int length;
    107         1.1  augustss 		} ctl;
    108         1.1  augustss 		/* Interrupt pipe */
    109         1.1  augustss 		struct {
    110         1.1  augustss 			int npoll;
    111       1.187     skrll 			int isread;
    112         1.1  augustss 			uhci_soft_qh_t **qhs;
    113         1.1  augustss 		} intr;
    114         1.1  augustss 		/* Bulk pipe */
    115         1.1  augustss 		struct {
    116         1.1  augustss 			uhci_soft_qh_t *sqh;
    117         1.1  augustss 			u_int length;
    118         1.1  augustss 			int isread;
    119         1.1  augustss 		} bulk;
    120        1.16  augustss 		/* Iso pipe */
    121        1.16  augustss 		struct iso {
    122        1.16  augustss 			uhci_soft_td_t **stds;
    123        1.48  augustss 			int next, inuse;
    124        1.16  augustss 		} iso;
    125         1.1  augustss 	} u;
    126         1.1  augustss };
    127         1.1  augustss 
    128       1.142  augustss Static void		uhci_globalreset(uhci_softc_t *);
    129       1.166   dsainty Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    130       1.142  augustss Static void		uhci_reset(uhci_softc_t *);
    131       1.249  drochner Static usbd_status	uhci_run(uhci_softc_t *, int run, int locked);
    132       1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    133       1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    134       1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    135       1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    136        1.16  augustss #if 0
    137       1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    138       1.119  augustss 					 uhci_intr_info_t *);
    139       1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    140        1.16  augustss #endif
    141         1.1  augustss 
    142       1.152  augustss Static void		uhci_free_std_chain(uhci_softc_t *,
    143       1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    144       1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    145   1.264.4.1     skrll 			    uhci_softc_t *, int, int, uint16_t, usb_dma_t *,
    146       1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    147       1.119  augustss Static void		uhci_poll_hub(void *);
    148       1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    149       1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    150       1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    151       1.119  augustss 
    152       1.119  augustss Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    153       1.119  augustss 
    154       1.119  augustss Static void		uhci_timeout(void *);
    155       1.153  augustss Static void		uhci_timeout_task(void *);
    156       1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    157       1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    158       1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    159       1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    160       1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    161       1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    162       1.123  augustss Static void		uhci_add_loop(uhci_softc_t *sc);
    163       1.123  augustss Static void		uhci_rem_loop(uhci_softc_t *sc);
    164       1.119  augustss 
    165       1.119  augustss Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    166       1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    167       1.119  augustss 
    168       1.119  augustss Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    169       1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    170       1.248       mrg Static void		uhci_get_lock(struct usbd_bus *, kmutex_t **);
    171       1.119  augustss 
    172       1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    173       1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    174       1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    175       1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    176       1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    177       1.119  augustss 
    178       1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    179       1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    180       1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    181       1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    182       1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    183       1.119  augustss 
    184       1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    185       1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    186       1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    187       1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    188       1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    189       1.119  augustss 
    190       1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    191       1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    192       1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    193       1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    194       1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    195       1.119  augustss 
    196       1.119  augustss Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    197       1.119  augustss Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    198       1.119  augustss Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    199       1.119  augustss Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    200       1.119  augustss Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    201       1.119  augustss 
    202       1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    203       1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    204       1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    205       1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    206       1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    207       1.119  augustss 
    208       1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    209       1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    210       1.133  augustss Static void		uhci_softintr(void *);
    211       1.119  augustss 
    212       1.119  augustss Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    213       1.119  augustss 
    214       1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    215       1.158  augustss Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    216       1.152  augustss Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    217       1.119  augustss 			    struct uhci_pipe *pipe, int ival);
    218       1.119  augustss 
    219       1.119  augustss Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    220       1.119  augustss Static void		uhci_noop(usbd_pipe_handle pipe);
    221       1.119  augustss 
    222       1.240  jakllsch static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    223       1.119  augustss 						    uhci_soft_qh_t *);
    224       1.119  augustss 
    225       1.119  augustss #ifdef UHCI_DEBUG
    226       1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    227       1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    228       1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    229       1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    230       1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    231       1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    232       1.119  augustss Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    233       1.119  augustss void			uhci_dump(void);
    234         1.1  augustss #endif
    235         1.1  augustss 
    236       1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    237       1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    238       1.112  augustss #define UWRITE1(sc, r, x) \
    239       1.165   dsainty  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    240       1.165   dsainty  } while (/*CONSTCOND*/0)
    241       1.112  augustss #define UWRITE2(sc, r, x) \
    242       1.165   dsainty  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    243       1.165   dsainty  } while (/*CONSTCOND*/0)
    244       1.112  augustss #define UWRITE4(sc, r, x) \
    245       1.165   dsainty  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    246       1.165   dsainty  } while (/*CONSTCOND*/0)
    247       1.196       mrg static __inline uint8_t
    248       1.196       mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
    249       1.196       mrg {
    250       1.196       mrg 
    251       1.196       mrg 	UBARR(sc);
    252       1.196       mrg 	return bus_space_read_1(sc->iot, sc->ioh, r);
    253       1.196       mrg }
    254       1.196       mrg 
    255       1.196       mrg static __inline uint16_t
    256       1.196       mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
    257       1.196       mrg {
    258       1.196       mrg 
    259       1.196       mrg 	UBARR(sc);
    260       1.196       mrg 	return bus_space_read_2(sc->iot, sc->ioh, r);
    261       1.196       mrg }
    262       1.196       mrg 
    263       1.260     joerg #ifdef UHCI_DEBUG
    264       1.196       mrg static __inline uint32_t
    265       1.196       mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
    266       1.196       mrg {
    267       1.196       mrg 
    268       1.196       mrg 	UBARR(sc);
    269       1.196       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    270       1.196       mrg }
    271       1.260     joerg #endif
    272         1.1  augustss 
    273         1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    274         1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    275         1.1  augustss 
    276       1.142  augustss #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    277         1.1  augustss 
    278         1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    279         1.1  augustss 
    280         1.1  augustss #define UHCI_INTR_ENDPT 1
    281         1.1  augustss 
    282       1.208  drochner const struct usbd_bus_methods uhci_bus_methods = {
    283   1.264.4.5     skrll 	.ubm_open =	uhci_open,
    284   1.264.4.5     skrll 	.ubm_softint =	uhci_softintr,
    285   1.264.4.5     skrll 	.ubm_dopoll =	uhci_poll,
    286   1.264.4.5     skrll 	.ubm_allocx =	uhci_allocx,
    287   1.264.4.5     skrll 	.ubm_freex =	uhci_freex,
    288   1.264.4.5     skrll 	.ubm_getlock =	uhci_get_lock,
    289   1.264.4.5     skrll 	.ubm_newdev =	NULL,
    290        1.48  augustss };
    291        1.48  augustss 
    292       1.208  drochner const struct usbd_pipe_methods uhci_root_ctrl_methods = {
    293   1.264.4.5     skrll 	.upm_transfer =	uhci_root_ctrl_transfer,
    294   1.264.4.5     skrll 	.upm_start =	uhci_root_ctrl_start,
    295   1.264.4.5     skrll 	.upm_abort =	uhci_root_ctrl_abort,
    296   1.264.4.5     skrll 	.upm_close =	uhci_root_ctrl_close,
    297   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_noop,
    298   1.264.4.5     skrll 	.upm_done =	uhci_root_ctrl_done,
    299         1.1  augustss };
    300         1.1  augustss 
    301       1.208  drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
    302   1.264.4.5     skrll 	.upm_transfer =	uhci_root_intr_transfer,
    303   1.264.4.5     skrll 	.upm_start =	uhci_root_intr_start,
    304   1.264.4.5     skrll 	.upm_abort =	uhci_root_intr_abort,
    305   1.264.4.5     skrll 	.upm_close =	uhci_root_intr_close,
    306   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_noop,
    307   1.264.4.5     skrll 	.upm_done =	uhci_root_intr_done,
    308         1.1  augustss };
    309         1.1  augustss 
    310       1.208  drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    311   1.264.4.5     skrll 	.upm_transfer =	uhci_device_ctrl_transfer,
    312   1.264.4.5     skrll 	.upm_start =	uhci_device_ctrl_start,
    313   1.264.4.5     skrll 	.upm_abort =	uhci_device_ctrl_abort,
    314   1.264.4.5     skrll 	.upm_close =	uhci_device_ctrl_close,
    315   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_noop,
    316   1.264.4.5     skrll 	.upm_done =	uhci_device_ctrl_done,
    317         1.1  augustss };
    318         1.1  augustss 
    319       1.208  drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
    320   1.264.4.5     skrll 	.upm_transfer =	uhci_device_intr_transfer,
    321   1.264.4.5     skrll 	.upm_start =	uhci_device_intr_start,
    322   1.264.4.5     skrll 	.upm_abort =	uhci_device_intr_abort,
    323   1.264.4.5     skrll 	.upm_close =	uhci_device_intr_close,
    324   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_device_clear_toggle,
    325   1.264.4.5     skrll 	.upm_done =	uhci_device_intr_done,
    326         1.1  augustss };
    327         1.1  augustss 
    328       1.208  drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
    329   1.264.4.5     skrll 	.upm_transfer =	uhci_device_bulk_transfer,
    330   1.264.4.5     skrll 	.upm_start =	uhci_device_bulk_start,
    331   1.264.4.5     skrll 	.upm_abort =	uhci_device_bulk_abort,
    332   1.264.4.5     skrll 	.upm_close =	uhci_device_bulk_close,
    333   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_device_clear_toggle,
    334   1.264.4.5     skrll 	.upm_done =	uhci_device_bulk_done,
    335         1.1  augustss };
    336         1.1  augustss 
    337       1.208  drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
    338   1.264.4.5     skrll 	.upm_transfer =	uhci_device_isoc_transfer,
    339   1.264.4.5     skrll 	.upm_start =	uhci_device_isoc_start,
    340   1.264.4.5     skrll 	.upm_abort =	uhci_device_isoc_abort,
    341   1.264.4.5     skrll 	.upm_close =	uhci_device_isoc_close,
    342   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_noop,
    343   1.264.4.5     skrll 	.upm_done =	uhci_device_isoc_done,
    344        1.16  augustss };
    345        1.16  augustss 
    346        1.92  augustss #define uhci_add_intr_info(sc, ii) \
    347       1.169  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    348        1.92  augustss #define uhci_del_intr_info(ii) \
    349       1.169  augustss 	do { \
    350       1.169  augustss 		LIST_REMOVE((ii), list); \
    351       1.169  augustss 		(ii)->list.le_prev = NULL; \
    352       1.169  augustss 	} while (0)
    353       1.169  augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    354        1.92  augustss 
    355       1.240  jakllsch static inline uhci_soft_qh_t *
    356       1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    357        1.92  augustss {
    358        1.92  augustss 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    359        1.92  augustss 
    360        1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    361       1.152  augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    362       1.223    bouyer 		usb_syncmem(&pqh->dma,
    363       1.223    bouyer 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    364       1.223    bouyer 		    sizeof(pqh->qh.qh_hlink),
    365       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
    366        1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    367       1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    368        1.92  augustss 			return (NULL);
    369        1.92  augustss 		}
    370        1.92  augustss #endif
    371        1.92  augustss 	}
    372        1.92  augustss 	return (pqh);
    373        1.92  augustss }
    374        1.92  augustss 
    375         1.1  augustss void
    376       1.142  augustss uhci_globalreset(uhci_softc_t *sc)
    377         1.1  augustss {
    378         1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    379        1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    380         1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    381         1.1  augustss }
    382         1.1  augustss 
    383         1.1  augustss usbd_status
    384       1.119  augustss uhci_init(uhci_softc_t *sc)
    385         1.1  augustss {
    386        1.63  augustss 	usbd_status err;
    387         1.1  augustss 	int i, j;
    388       1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    389         1.1  augustss 	uhci_soft_td_t *std;
    390         1.1  augustss 
    391         1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    392         1.1  augustss 
    393        1.67  augustss #ifdef UHCI_DEBUG
    394        1.92  augustss 	thesc = sc;
    395        1.92  augustss 
    396         1.1  augustss 	if (uhcidebug > 2)
    397         1.1  augustss 		uhci_dumpregs(sc);
    398         1.1  augustss #endif
    399         1.1  augustss 
    400       1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    401       1.219  jmcneill 
    402         1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    403       1.142  augustss 	uhci_globalreset(sc);			/* reset the controller */
    404       1.142  augustss 	uhci_reset(sc);
    405        1.24  augustss 
    406         1.1  augustss 	/* Allocate and initialize real frame array. */
    407       1.152  augustss 	err = usb_allocmem(&sc->sc_bus,
    408        1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    409        1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    410        1.63  augustss 	if (err)
    411        1.63  augustss 		return (err);
    412       1.159  augustss 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    413         1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    414       1.160  augustss 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    415         1.1  augustss 
    416       1.152  augustss 	/*
    417       1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    418       1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    419       1.123  augustss 	 * otherwise.
    420       1.123  augustss 	 */
    421       1.123  augustss 	std = uhci_alloc_std(sc);
    422       1.123  augustss 	if (std == NULL)
    423       1.123  augustss 		return (USBD_NOMEM);
    424       1.123  augustss 	std->link.std = NULL;
    425       1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    426       1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    427       1.123  augustss 	std->td.td_token = htole32(0);
    428       1.123  augustss 	std->td.td_buffer = htole32(0);
    429       1.223    bouyer 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    430       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    431       1.123  augustss 
    432       1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    433       1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    434       1.123  augustss 	if (lsqh == NULL)
    435       1.123  augustss 		return (USBD_NOMEM);
    436       1.123  augustss 	lsqh->hlink = NULL;
    437       1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    438       1.123  augustss 	lsqh->elink = std;
    439       1.123  augustss 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    440       1.123  augustss 	sc->sc_last_qh = lsqh;
    441       1.223    bouyer 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    442       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    443       1.123  augustss 
    444         1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    445         1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    446        1.63  augustss 	if (bsqh == NULL)
    447         1.1  augustss 		return (USBD_NOMEM);
    448       1.123  augustss 	bsqh->hlink = lsqh;
    449       1.123  augustss 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    450       1.121  augustss 	bsqh->elink = NULL;
    451        1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    452         1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    453       1.223    bouyer 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    454       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    455         1.1  augustss 
    456       1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    457       1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    458       1.123  augustss 	if (chsqh == NULL)
    459       1.123  augustss 		return (USBD_NOMEM);
    460       1.123  augustss 	chsqh->hlink = bsqh;
    461       1.123  augustss 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    462       1.123  augustss 	chsqh->elink = NULL;
    463       1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    464       1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    465       1.223    bouyer 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    466       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    467       1.123  augustss 
    468       1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    469       1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    470       1.123  augustss 	if (clsqh == NULL)
    471         1.1  augustss 		return (USBD_NOMEM);
    472       1.220    bouyer 	clsqh->hlink = chsqh;
    473       1.123  augustss 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    474       1.123  augustss 	clsqh->elink = NULL;
    475       1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    476       1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    477       1.223    bouyer 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    478       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    479         1.1  augustss 
    480       1.152  augustss 	/*
    481         1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    482         1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    483         1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    484         1.1  augustss 	 */
    485         1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    486         1.1  augustss 		std = uhci_alloc_std(sc);
    487         1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    488        1.67  augustss 		if (std == NULL || sqh == NULL)
    489        1.13  augustss 			return (USBD_NOMEM);
    490        1.42  augustss 		std->link.sqh = sqh;
    491       1.121  augustss 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    492        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    493        1.88   tsutsui 		std->td.td_token = htole32(0);
    494        1.88   tsutsui 		std->td.td_buffer = htole32(0);
    495       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    496       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    497       1.123  augustss 		sqh->hlink = clsqh;
    498       1.123  augustss 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    499       1.121  augustss 		sqh->elink = NULL;
    500        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    501       1.223    bouyer 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    502       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    503         1.1  augustss 		sc->sc_vframes[i].htd = std;
    504         1.1  augustss 		sc->sc_vframes[i].etd = std;
    505         1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    506         1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    507       1.152  augustss 		for (j = i;
    508       1.152  augustss 		     j < UHCI_FRAMELIST_COUNT;
    509         1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    510        1.88   tsutsui 			sc->sc_pframes[j] = htole32(std->physaddr);
    511         1.1  augustss 	}
    512       1.223    bouyer 	usb_syncmem(&sc->sc_dma, 0,
    513       1.223    bouyer 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    514       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
    515       1.223    bouyer 
    516         1.1  augustss 
    517         1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    518         1.1  augustss 
    519       1.253  christos 	sc->sc_xferpool = pool_cache_init(sizeof(struct uhci_xfer), 0, 0, 0,
    520       1.253  christos 	    "uhcixfer", NULL, IPL_USB, NULL, NULL, NULL);
    521        1.76  augustss 
    522       1.248       mrg 	callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE);
    523       1.248       mrg 
    524       1.248       mrg 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    525       1.248       mrg 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
    526       1.248       mrg 	cv_init(&sc->sc_softwake_cv, "uhciab");
    527        1.96  augustss 
    528         1.1  augustss 	/* Set up the bus struct. */
    529   1.264.4.7     skrll 	sc->sc_bus.ub_methods = &uhci_bus_methods;
    530   1.264.4.7     skrll 	sc->sc_bus.ub_pipesize = sizeof(struct uhci_pipe);
    531   1.264.4.7     skrll 	sc->sc_bus.ub_usedma = true;
    532         1.1  augustss 
    533       1.190  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    534       1.190  augustss 
    535         1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    536       1.225    bouyer 
    537       1.249  drochner 	err =  uhci_run(sc, 1, 0);		/* and here we go... */
    538       1.152  augustss 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    539         1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    540       1.225    bouyer 	return err;
    541        1.53  augustss }
    542        1.53  augustss 
    543        1.53  augustss int
    544       1.215    dyoung uhci_activate(device_t self, enum devact act)
    545        1.53  augustss {
    546       1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    547        1.53  augustss 
    548        1.53  augustss 	switch (act) {
    549        1.53  augustss 	case DVACT_DEACTIVATE:
    550       1.210  kiyohara 		sc->sc_dying = 1;
    551       1.230    dyoung 		return 0;
    552       1.230    dyoung 	default:
    553       1.230    dyoung 		return EOPNOTSUPP;
    554        1.53  augustss 	}
    555        1.53  augustss }
    556        1.53  augustss 
    557       1.215    dyoung void
    558       1.215    dyoung uhci_childdet(device_t self, device_t child)
    559       1.215    dyoung {
    560       1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    561       1.215    dyoung 
    562       1.215    dyoung 	KASSERT(sc->sc_child == child);
    563       1.215    dyoung 	sc->sc_child = NULL;
    564       1.215    dyoung }
    565       1.215    dyoung 
    566        1.53  augustss int
    567       1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    568        1.53  augustss {
    569        1.53  augustss 	int rv = 0;
    570        1.53  augustss 
    571        1.53  augustss 	if (sc->sc_child != NULL)
    572        1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    573       1.152  augustss 
    574        1.53  augustss 	if (rv != 0)
    575        1.53  augustss 		return (rv);
    576        1.53  augustss 
    577       1.226        ad 	callout_halt(&sc->sc_poll_handle, NULL);
    578       1.226        ad 	callout_destroy(&sc->sc_poll_handle);
    579       1.226        ad 
    580       1.248       mrg 	cv_destroy(&sc->sc_softwake_cv);
    581       1.248       mrg 
    582       1.248       mrg 	mutex_destroy(&sc->sc_lock);
    583       1.248       mrg 	mutex_destroy(&sc->sc_intr_lock);
    584       1.248       mrg 
    585       1.254  christos 	pool_cache_destroy(sc->sc_xferpool);
    586       1.254  christos 
    587        1.76  augustss 	/* XXX free other data structures XXX */
    588        1.53  augustss 
    589        1.53  augustss 	return (rv);
    590         1.1  augustss }
    591         1.1  augustss 
    592        1.76  augustss usbd_xfer_handle
    593       1.119  augustss uhci_allocx(struct usbd_bus *bus)
    594        1.76  augustss {
    595   1.264.4.7     skrll 	struct uhci_softc *sc = bus->ub_hcpriv;
    596        1.76  augustss 	usbd_xfer_handle xfer;
    597        1.76  augustss 
    598       1.253  christos 	xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
    599        1.92  augustss 	if (xfer != NULL) {
    600       1.253  christos 		memset(xfer, 0, sizeof(struct uhci_xfer));
    601       1.254  christos 		UXFER(xfer)->iinfo.sc = sc;
    602        1.92  augustss #ifdef DIAGNOSTIC
    603       1.238   tsutsui 		UXFER(xfer)->iinfo.isdone = 1;
    604   1.264.4.7     skrll 		xfer->ux_state = XFER_BUSY;
    605        1.92  augustss #endif
    606        1.92  augustss 	}
    607        1.76  augustss 	return (xfer);
    608        1.76  augustss }
    609        1.76  augustss 
    610        1.76  augustss void
    611       1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    612        1.76  augustss {
    613   1.264.4.7     skrll 	struct uhci_softc *sc = bus->ub_hcpriv;
    614        1.76  augustss 
    615        1.93  augustss #ifdef DIAGNOSTIC
    616   1.264.4.7     skrll 	if (xfer->ux_state != XFER_BUSY) {
    617        1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    618   1.264.4.7     skrll 		       xfer->ux_state);
    619        1.93  augustss 	}
    620   1.264.4.7     skrll 	xfer->ux_state = XFER_FREE;
    621       1.238   tsutsui 	if (!UXFER(xfer)->iinfo.isdone) {
    622        1.96  augustss 		printf("uhci_freex: !isdone\n");
    623       1.105  augustss 	}
    624        1.93  augustss #endif
    625       1.253  christos 	pool_cache_put(sc->sc_xferpool, xfer);
    626        1.48  augustss }
    627        1.48  augustss 
    628       1.248       mrg Static void
    629       1.248       mrg uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
    630       1.248       mrg {
    631   1.264.4.7     skrll 	struct uhci_softc *sc = bus->ub_hcpriv;
    632       1.248       mrg 
    633       1.248       mrg 	*lock = &sc->sc_lock;
    634       1.248       mrg }
    635       1.248       mrg 
    636       1.248       mrg 
    637        1.72  augustss /*
    638       1.212  jmcneill  * Handle suspend/resume.
    639       1.212  jmcneill  *
    640       1.212  jmcneill  * We need to switch to polling mode here, because this routine is
    641       1.212  jmcneill  * called from an interrupt context.  This is all right since we
    642       1.212  jmcneill  * are almost suspended anyway.
    643        1.72  augustss  */
    644       1.212  jmcneill bool
    645       1.232    dyoung uhci_resume(device_t dv, const pmf_qual_t *qual)
    646        1.72  augustss {
    647       1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    648       1.212  jmcneill 	int cmd;
    649        1.72  augustss 
    650       1.248       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
    651       1.193  augustss 
    652       1.212  jmcneill 	cmd = UREAD2(sc, UHCI_CMD);
    653   1.264.4.7     skrll 	sc->sc_bus.ub_usepolling++;
    654       1.214       smb 	UWRITE2(sc, UHCI_INTR, 0);
    655       1.214       smb 	uhci_globalreset(sc);
    656       1.214       smb 	uhci_reset(sc);
    657       1.212  jmcneill 	if (cmd & UHCI_CMD_RS)
    658       1.249  drochner 		uhci_run(sc, 0, 1);
    659       1.212  jmcneill 
    660       1.212  jmcneill 	/* restore saved state */
    661       1.212  jmcneill 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    662       1.212  jmcneill 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    663       1.212  jmcneill 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    664       1.212  jmcneill 
    665       1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
    666       1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock);
    667       1.212  jmcneill 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    668       1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
    669       1.212  jmcneill 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
    670       1.214       smb 	UHCICMD(sc, UHCI_CMD_MAXP);
    671       1.249  drochner 	uhci_run(sc, 1, 1); /* and start traffic again */
    672       1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock);
    673   1.264.4.7     skrll 	sc->sc_bus.ub_usepolling--;
    674       1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    675       1.234    dyoung 		callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
    676       1.212  jmcneill 		    sc->sc_intr_xfer);
    677       1.212  jmcneill #ifdef UHCI_DEBUG
    678       1.212  jmcneill 	if (uhcidebug > 2)
    679       1.212  jmcneill 		uhci_dumpregs(sc);
    680       1.212  jmcneill #endif
    681       1.212  jmcneill 
    682       1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    683       1.248       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
    684       1.212  jmcneill 
    685       1.212  jmcneill 	return true;
    686        1.72  augustss }
    687        1.72  augustss 
    688       1.212  jmcneill bool
    689       1.232    dyoung uhci_suspend(device_t dv, const pmf_qual_t *qual)
    690        1.30  augustss {
    691       1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    692        1.30  augustss 	int cmd;
    693        1.30  augustss 
    694       1.248       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
    695       1.212  jmcneill 
    696        1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    697        1.30  augustss 
    698       1.212  jmcneill #ifdef UHCI_DEBUG
    699       1.212  jmcneill 	if (uhcidebug > 2)
    700       1.212  jmcneill 		uhci_dumpregs(sc);
    701       1.212  jmcneill #endif
    702       1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    703       1.234    dyoung 		callout_stop(&sc->sc_poll_handle);
    704       1.219  jmcneill 	sc->sc_suspend = PWR_SUSPEND;
    705   1.264.4.7     skrll 	sc->sc_bus.ub_usepolling++;
    706       1.219  jmcneill 
    707       1.249  drochner 	uhci_run(sc, 0, 1); /* stop the controller */
    708       1.212  jmcneill 	cmd &= ~UHCI_CMD_RS;
    709       1.212  jmcneill 
    710       1.212  jmcneill 	/* save some state if BIOS doesn't */
    711       1.212  jmcneill 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    712       1.212  jmcneill 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    713       1.212  jmcneill 
    714       1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    715        1.30  augustss 
    716       1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
    717       1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock);
    718   1.264.4.7     skrll 	sc->sc_bus.ub_usepolling--;
    719        1.86  augustss 
    720       1.248       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
    721       1.212  jmcneill 
    722       1.212  jmcneill 	return true;
    723        1.30  augustss }
    724        1.30  augustss 
    725        1.59  augustss #ifdef UHCI_DEBUG
    726       1.101  augustss Static void
    727       1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
    728         1.1  augustss {
    729        1.48  augustss 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    730        1.48  augustss 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    731       1.216  drochner 		     device_xname(sc->sc_dev),
    732        1.48  augustss 		     UREAD2(sc, UHCI_CMD),
    733        1.48  augustss 		     UREAD2(sc, UHCI_STS),
    734        1.48  augustss 		     UREAD2(sc, UHCI_INTR),
    735        1.48  augustss 		     UREAD2(sc, UHCI_FRNUM),
    736        1.48  augustss 		     UREAD4(sc, UHCI_FLBASEADDR),
    737        1.48  augustss 		     UREAD1(sc, UHCI_SOF),
    738        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC1),
    739        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC2)));
    740         1.1  augustss }
    741         1.1  augustss 
    742         1.1  augustss void
    743       1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
    744         1.1  augustss {
    745       1.122        tv 	char sbuf[128], sbuf2[128];
    746       1.122        tv 
    747       1.250  christos 
    748       1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    749       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    750        1.48  augustss 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    751        1.48  augustss 		     "token=0x%08lx buffer=0x%08lx\n",
    752        1.48  augustss 		     p, (long)p->physaddr,
    753        1.88   tsutsui 		     (long)le32toh(p->td.td_link),
    754        1.88   tsutsui 		     (long)le32toh(p->td.td_status),
    755        1.88   tsutsui 		     (long)le32toh(p->td.td_token),
    756        1.88   tsutsui 		     (long)le32toh(p->td.td_buffer)));
    757       1.122        tv 
    758       1.224  christos 	snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF",
    759   1.264.4.1     skrll 	    (uint32_t)le32toh(p->td.td_link));
    760       1.224  christos 	snprintb(sbuf2, sizeof(sbuf2),
    761       1.224  christos 	    "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    762       1.224  christos 	    "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    763   1.264.4.1     skrll 	    (uint32_t)le32toh(p->td.td_status));
    764       1.122        tv 
    765       1.122        tv 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    766       1.122        tv 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    767        1.88   tsutsui 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    768        1.88   tsutsui 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    769        1.88   tsutsui 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    770        1.88   tsutsui 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    771        1.88   tsutsui 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    772        1.88   tsutsui 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    773        1.88   tsutsui 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    774       1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    775       1.223    bouyer 	    BUS_DMASYNC_PREREAD);
    776         1.1  augustss }
    777         1.1  augustss 
    778         1.1  augustss void
    779       1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
    780         1.1  augustss {
    781       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    782       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    783        1.67  augustss 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    784        1.88   tsutsui 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    785        1.88   tsutsui 	    le32toh(sqh->qh.qh_elink)));
    786       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    787         1.1  augustss }
    788         1.1  augustss 
    789        1.13  augustss 
    790       1.110  augustss #if 1
    791         1.1  augustss void
    792       1.119  augustss uhci_dump(void)
    793         1.1  augustss {
    794       1.110  augustss 	uhci_dump_all(thesc);
    795       1.110  augustss }
    796       1.110  augustss #endif
    797         1.1  augustss 
    798       1.110  augustss void
    799       1.119  augustss uhci_dump_all(uhci_softc_t *sc)
    800       1.110  augustss {
    801         1.1  augustss 	uhci_dumpregs(sc);
    802       1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    803       1.261     skrll 	uhci_dump_qhs(sc->sc_lctl_start);
    804         1.1  augustss }
    805         1.1  augustss 
    806        1.67  augustss 
    807        1.67  augustss void
    808       1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
    809        1.67  augustss {
    810        1.67  augustss 	uhci_dump_qh(sqh);
    811        1.67  augustss 
    812        1.67  augustss 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    813        1.67  augustss 	 * Traverses sideways first, then down.
    814        1.67  augustss 	 *
    815        1.67  augustss 	 * QH1
    816        1.67  augustss 	 * QH2
    817        1.67  augustss 	 * No QH
    818        1.67  augustss 	 * TD2.1
    819        1.67  augustss 	 * TD2.2
    820        1.67  augustss 	 * TD1.1
    821        1.67  augustss 	 * etc.
    822        1.67  augustss 	 *
    823        1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    824        1.67  augustss 	 */
    825        1.67  augustss 
    826        1.67  augustss 
    827       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    828       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    829        1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    830        1.67  augustss 		uhci_dump_qhs(sqh->hlink);
    831        1.67  augustss 	else
    832        1.67  augustss 		DPRINTF(("No QH\n"));
    833       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    834        1.67  augustss 
    835        1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    836        1.67  augustss 		uhci_dump_tds(sqh->elink);
    837        1.67  augustss 	else
    838        1.67  augustss 		DPRINTF(("No TD\n"));
    839        1.67  augustss }
    840        1.67  augustss 
    841         1.1  augustss void
    842       1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
    843         1.1  augustss {
    844        1.67  augustss 	uhci_soft_td_t *td;
    845       1.223    bouyer 	int stop;
    846        1.67  augustss 
    847        1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
    848        1.67  augustss 		uhci_dump_td(td);
    849         1.1  augustss 
    850        1.67  augustss 		/* Check whether the link pointer in this TD marks
    851        1.67  augustss 		 * the link pointer as end of queue. This avoids
    852        1.67  augustss 		 * printing the free list in case the queue/TD has
    853        1.67  augustss 		 * already been moved there (seatbelt).
    854        1.67  augustss 		 */
    855       1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    856       1.223    bouyer 		    sizeof(td->td.td_link),
    857       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    858       1.223    bouyer 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    859       1.223    bouyer 			le32toh(td->td.td_link) == 0);
    860       1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    861       1.223    bouyer 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    862       1.223    bouyer 		if (stop)
    863        1.67  augustss 			break;
    864        1.67  augustss 	}
    865         1.1  augustss }
    866        1.92  augustss 
    867       1.101  augustss Static void
    868       1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
    869        1.92  augustss {
    870        1.95  augustss 	usbd_pipe_handle pipe;
    871        1.95  augustss 	usb_endpoint_descriptor_t *ed;
    872        1.95  augustss 	usbd_device_handle dev;
    873       1.152  augustss 
    874        1.98  augustss #ifdef DIAGNOSTIC
    875        1.98  augustss #define DONE ii->isdone
    876        1.98  augustss #else
    877        1.98  augustss #define DONE 0
    878        1.98  augustss #endif
    879   1.264.4.2     skrll 	if (ii == NULL) {
    880   1.264.4.2     skrll 		printf("ii NULL\n");
    881   1.264.4.2     skrll 		return;
    882   1.264.4.2     skrll 	}
    883   1.264.4.2     skrll 	if (ii->xfer == NULL) {
    884        1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
    885        1.98  augustss 		       ii, DONE);
    886   1.264.4.2     skrll 		return;
    887   1.264.4.2     skrll 	}
    888   1.264.4.7     skrll 	pipe = ii->xfer->ux_pipe;
    889   1.264.4.2     skrll 	if (pipe == NULL) {
    890        1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    891   1.264.4.2     skrll 		    ii, DONE, ii->xfer);
    892   1.264.4.2     skrll 		return;
    893       1.139  augustss 	}
    894   1.264.4.7     skrll 	if (pipe->up_endpoint == NULL) {
    895   1.264.4.7     skrll 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->up_endpoint=NULL\n",
    896       1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    897   1.264.4.2     skrll 		return;
    898       1.139  augustss 	}
    899   1.264.4.7     skrll 	if (pipe->up_dev == NULL) {
    900   1.264.4.7     skrll 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->up_dev=NULL\n",
    901       1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    902   1.264.4.2     skrll 		return;
    903        1.95  augustss 	}
    904   1.264.4.7     skrll 	ed = pipe->up_endpoint->ue_edesc;
    905   1.264.4.7     skrll 	dev = pipe->up_dev;
    906       1.152  augustss 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    907       1.152  augustss 	       ii, DONE, ii->xfer, dev,
    908   1.264.4.7     skrll 	       UGETW(dev->ud_ddesc.idVendor),
    909   1.264.4.7     skrll 	       UGETW(dev->ud_ddesc.idProduct),
    910   1.264.4.7     skrll 	       dev->ud_addr, pipe,
    911        1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
    912        1.98  augustss #undef DONE
    913        1.92  augustss }
    914        1.92  augustss 
    915       1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
    916        1.92  augustss void
    917       1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
    918        1.92  augustss {
    919        1.92  augustss 	uhci_intr_info_t *ii;
    920        1.92  augustss 
    921        1.92  augustss 	printf("intr_info list:\n");
    922        1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
    923        1.92  augustss 		uhci_dump_ii(ii);
    924        1.92  augustss }
    925        1.92  augustss 
    926       1.120  augustss void iidump(void);
    927       1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
    928        1.92  augustss 
    929         1.1  augustss #endif
    930         1.1  augustss 
    931         1.1  augustss /*
    932         1.1  augustss  * This routine is executed periodically and simulates interrupts
    933         1.1  augustss  * from the root controller interrupt pipe for port status change.
    934         1.1  augustss  */
    935         1.1  augustss void
    936       1.119  augustss uhci_poll_hub(void *addr)
    937         1.1  augustss {
    938        1.63  augustss 	usbd_xfer_handle xfer = addr;
    939   1.264.4.7     skrll 	usbd_pipe_handle pipe = xfer->ux_pipe;
    940       1.227    martin 	uhci_softc_t *sc;
    941         1.1  augustss 	u_char *p;
    942         1.1  augustss 
    943        1.96  augustss 	DPRINTFN(20, ("uhci_poll_hub\n"));
    944         1.1  augustss 
    945   1.264.4.7     skrll 	if (__predict_false(pipe->up_dev == NULL || pipe->up_dev->ud_bus == NULL))
    946       1.228    martin 		return;	/* device has detached */
    947   1.264.4.7     skrll 	sc = pipe->up_dev->ud_bus->ub_hcpriv;
    948       1.234    dyoung 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
    949        1.41  augustss 
    950   1.264.4.7     skrll 	p = xfer->ux_buf;
    951         1.1  augustss 	p[0] = 0;
    952         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
    953         1.1  augustss 		p[0] |= 1<<1;
    954         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
    955         1.1  augustss 		p[0] |= 1<<2;
    956        1.41  augustss 	if (p[0] == 0)
    957        1.41  augustss 		/* No change, try again in a while */
    958        1.41  augustss 		return;
    959        1.41  augustss 
    960   1.264.4.7     skrll 	xfer->ux_actlen = 1;
    961   1.264.4.7     skrll 	xfer->ux_status = USBD_NORMAL_COMPLETION;
    962       1.248       mrg 	mutex_enter(&sc->sc_lock);
    963        1.63  augustss 	usb_transfer_complete(xfer);
    964       1.248       mrg 	mutex_exit(&sc->sc_lock);
    965        1.41  augustss }
    966        1.41  augustss 
    967        1.41  augustss void
    968       1.205  christos uhci_root_intr_done(usbd_xfer_handle xfer)
    969        1.84  augustss {
    970        1.84  augustss }
    971        1.84  augustss 
    972        1.84  augustss void
    973       1.205  christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
    974        1.41  augustss {
    975         1.1  augustss }
    976         1.1  augustss 
    977       1.123  augustss /*
    978       1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
    979       1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
    980       1.123  augustss  * USB performance a lot for some devices.
    981       1.123  augustss  * If we are already looping, just count it.
    982       1.123  augustss  */
    983         1.1  augustss void
    984       1.123  augustss uhci_add_loop(uhci_softc_t *sc) {
    985       1.125  augustss #ifdef UHCI_DEBUG
    986       1.125  augustss 	if (uhcinoloop)
    987       1.125  augustss 		return;
    988       1.125  augustss #endif
    989       1.123  augustss 	if (++sc->sc_loops == 1) {
    990       1.125  augustss 		DPRINTFN(5,("uhci_start_loop: add\n"));
    991       1.123  augustss 		/* Note, we don't loop back the soft pointer. */
    992       1.152  augustss 		sc->sc_last_qh->qh.qh_hlink =
    993       1.123  augustss 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
    994       1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
    995       1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
    996       1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
    997       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
    998       1.123  augustss 	}
    999       1.123  augustss }
   1000       1.123  augustss 
   1001       1.123  augustss void
   1002       1.123  augustss uhci_rem_loop(uhci_softc_t *sc) {
   1003       1.125  augustss #ifdef UHCI_DEBUG
   1004       1.125  augustss 	if (uhcinoloop)
   1005       1.125  augustss 		return;
   1006       1.125  augustss #endif
   1007       1.123  augustss 	if (--sc->sc_loops == 0) {
   1008       1.123  augustss 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1009       1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1010       1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1011       1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1012       1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1013       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1014       1.123  augustss 	}
   1015       1.123  augustss }
   1016       1.123  augustss 
   1017       1.248       mrg /* Add high speed control QH, called with lock held. */
   1018       1.123  augustss void
   1019       1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1020         1.1  augustss {
   1021        1.42  augustss 	uhci_soft_qh_t *eqh;
   1022         1.1  augustss 
   1023       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1024       1.248       mrg 
   1025         1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1026       1.123  augustss 	eqh = sc->sc_hctl_end;
   1027       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1028       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   1029       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   1030        1.42  augustss 	sqh->hlink       = eqh->hlink;
   1031        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1032       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1033       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1034        1.42  augustss 	eqh->hlink       = sqh;
   1035       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1036       1.123  augustss 	sc->sc_hctl_end = sqh;
   1037       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1038       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1039       1.125  augustss #ifdef UHCI_CTL_LOOP
   1040       1.123  augustss 	uhci_add_loop(sc);
   1041       1.125  augustss #endif
   1042         1.1  augustss }
   1043         1.1  augustss 
   1044       1.248       mrg /* Remove high speed control QH, called with lock held. */
   1045         1.1  augustss void
   1046       1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1047         1.1  augustss {
   1048         1.1  augustss 	uhci_soft_qh_t *pqh;
   1049       1.256   tsutsui 	uint32_t elink;
   1050         1.1  augustss 
   1051       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1052       1.248       mrg 
   1053       1.123  augustss 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1054       1.125  augustss #ifdef UHCI_CTL_LOOP
   1055       1.123  augustss 	uhci_rem_loop(sc);
   1056       1.125  augustss #endif
   1057       1.124  augustss 	/*
   1058       1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1059       1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1060       1.124  augustss 	 * the transferred packet was short so that the QH still points
   1061       1.124  augustss 	 * at the last used TD.
   1062       1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1063       1.124  augustss 	 * to stop looking at the TD.
   1064       1.223    bouyer 	 * Note that if the TD chain is large enough, the controller
   1065       1.223    bouyer 	 * may still be looking at the chain at the end of this function.
   1066       1.223    bouyer 	 * uhci_free_std_chain() will make sure the controller stops
   1067       1.223    bouyer 	 * looking at it quickly, but until then we should not change
   1068       1.223    bouyer 	 * sqh->hlink.
   1069       1.124  augustss 	 */
   1070       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1071       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1072       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1073       1.256   tsutsui 	elink = le32toh(sqh->qh.qh_elink);
   1074       1.256   tsutsui 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1075       1.256   tsutsui 	    sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD);
   1076       1.256   tsutsui 	if (!(elink & UHCI_PTR_T)) {
   1077       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1078       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1079       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1080       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1081       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1082       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1083       1.124  augustss 	}
   1084       1.124  augustss 
   1085       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1086       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1087       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1088       1.152  augustss 	pqh->hlink = sqh->hlink;
   1089        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1090       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1091       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1092       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1093       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1094       1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1095       1.123  augustss 		sc->sc_hctl_end = pqh;
   1096       1.123  augustss }
   1097       1.123  augustss 
   1098       1.248       mrg /* Add low speed control QH, called with lock held. */
   1099       1.123  augustss void
   1100       1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1101       1.123  augustss {
   1102       1.123  augustss 	uhci_soft_qh_t *eqh;
   1103       1.123  augustss 
   1104       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1105       1.248       mrg 
   1106       1.123  augustss 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1107       1.123  augustss 	eqh = sc->sc_lctl_end;
   1108       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1109       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1110       1.152  augustss 	sqh->hlink = eqh->hlink;
   1111       1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1112       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1113       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1114       1.152  augustss 	eqh->hlink = sqh;
   1115       1.123  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1116       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1117       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1118       1.123  augustss 	sc->sc_lctl_end = sqh;
   1119       1.123  augustss }
   1120       1.123  augustss 
   1121       1.248       mrg /* Remove low speed control QH, called with lock held. */
   1122       1.123  augustss void
   1123       1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1124       1.123  augustss {
   1125       1.123  augustss 	uhci_soft_qh_t *pqh;
   1126       1.256   tsutsui 	uint32_t elink;
   1127       1.123  augustss 
   1128       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1129       1.248       mrg 
   1130       1.123  augustss 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1131       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1132       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1133       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1134       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1135       1.256   tsutsui 	elink = le32toh(sqh->qh.qh_elink);
   1136       1.256   tsutsui 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1137       1.256   tsutsui 	    sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD);
   1138       1.256   tsutsui 	if (!(elink & UHCI_PTR_T)) {
   1139       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1140       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1141       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1142       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1143       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1144       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1145       1.124  augustss 	}
   1146       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1147       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1148       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1149       1.152  augustss 	pqh->hlink = sqh->hlink;
   1150       1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1151       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1152       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1153       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1154       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1155       1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1156       1.123  augustss 		sc->sc_lctl_end = pqh;
   1157         1.1  augustss }
   1158         1.1  augustss 
   1159       1.248       mrg /* Add bulk QH, called with lock held. */
   1160         1.1  augustss void
   1161       1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1162         1.1  augustss {
   1163        1.42  augustss 	uhci_soft_qh_t *eqh;
   1164         1.1  augustss 
   1165       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1166       1.248       mrg 
   1167         1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1168        1.42  augustss 	eqh = sc->sc_bulk_end;
   1169       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1170       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1171       1.152  augustss 	sqh->hlink = eqh->hlink;
   1172        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1173       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1174       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1175       1.152  augustss 	eqh->hlink = sqh;
   1176       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1177       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1178       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1179         1.1  augustss 	sc->sc_bulk_end = sqh;
   1180       1.123  augustss 	uhci_add_loop(sc);
   1181         1.1  augustss }
   1182         1.1  augustss 
   1183       1.248       mrg /* Remove bulk QH, called with lock held. */
   1184         1.1  augustss void
   1185       1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1186         1.1  augustss {
   1187         1.1  augustss 	uhci_soft_qh_t *pqh;
   1188         1.1  augustss 
   1189       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1190       1.248       mrg 
   1191         1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1192       1.123  augustss 	uhci_rem_loop(sc);
   1193       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1194       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1195       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1196       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1197       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1198       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1199       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1200       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1201       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1202       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1203       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1204       1.124  augustss 	}
   1205        1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1206       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1207       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1208        1.42  augustss 	pqh->hlink       = sqh->hlink;
   1209        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1210       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1211       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1212       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1213         1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1214         1.1  augustss 		sc->sc_bulk_end = pqh;
   1215         1.1  augustss }
   1216         1.1  augustss 
   1217       1.141  augustss Static int uhci_intr1(uhci_softc_t *);
   1218       1.141  augustss 
   1219         1.1  augustss int
   1220       1.119  augustss uhci_intr(void *arg)
   1221         1.1  augustss {
   1222        1.44  augustss 	uhci_softc_t *sc = arg;
   1223       1.248       mrg 	int ret = 0;
   1224       1.248       mrg 
   1225       1.248       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1226       1.146  augustss 
   1227       1.216  drochner 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1228       1.248       mrg 		goto done;
   1229       1.141  augustss 
   1230   1.264.4.7     skrll 	if (sc->sc_bus.ub_usepolling || UREAD2(sc, UHCI_INTR) == 0) {
   1231       1.141  augustss #ifdef DIAGNOSTIC
   1232       1.179   mycroft 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
   1233       1.141  augustss #endif
   1234       1.248       mrg 		goto done;
   1235       1.141  augustss 	}
   1236       1.179   mycroft 
   1237       1.248       mrg 	ret = uhci_intr1(sc);
   1238       1.248       mrg 
   1239       1.248       mrg  done:
   1240       1.248       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1241       1.248       mrg 	return ret;
   1242       1.141  augustss }
   1243       1.141  augustss 
   1244       1.141  augustss int
   1245       1.141  augustss uhci_intr1(uhci_softc_t *sc)
   1246       1.141  augustss {
   1247        1.44  augustss 	int status;
   1248        1.44  augustss 	int ack;
   1249         1.1  augustss 
   1250        1.67  augustss #ifdef UHCI_DEBUG
   1251        1.44  augustss 	if (uhcidebug > 15) {
   1252       1.216  drochner 		DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
   1253         1.1  augustss 		uhci_dumpregs(sc);
   1254         1.1  augustss 	}
   1255         1.1  augustss #endif
   1256       1.117  augustss 
   1257       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1258       1.248       mrg 
   1259       1.153  augustss 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1260       1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1261       1.127     soren 		return (0);
   1262       1.127     soren 
   1263       1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1264       1.201  jmcneill #ifdef DIAGNOSTIC
   1265       1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1266       1.216  drochner 		       device_xname(sc->sc_dev));
   1267       1.201  jmcneill #endif
   1268       1.134  augustss 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1269       1.117  augustss 		return (0);
   1270       1.117  augustss 	}
   1271        1.44  augustss 
   1272        1.44  augustss 	ack = 0;
   1273        1.44  augustss 	if (status & UHCI_STS_USBINT)
   1274        1.44  augustss 		ack |= UHCI_STS_USBINT;
   1275        1.44  augustss 	if (status & UHCI_STS_USBEI)
   1276        1.44  augustss 		ack |= UHCI_STS_USBEI;
   1277         1.1  augustss 	if (status & UHCI_STS_RD) {
   1278        1.44  augustss 		ack |= UHCI_STS_RD;
   1279       1.118  augustss #ifdef UHCI_DEBUG
   1280       1.216  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1281       1.118  augustss #endif
   1282         1.1  augustss 	}
   1283         1.1  augustss 	if (status & UHCI_STS_HSE) {
   1284        1.44  augustss 		ack |= UHCI_STS_HSE;
   1285       1.216  drochner 		printf("%s: host system error\n", device_xname(sc->sc_dev));
   1286         1.1  augustss 	}
   1287         1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1288        1.44  augustss 		ack |= UHCI_STS_HCPE;
   1289       1.152  augustss 		printf("%s: host controller process error\n",
   1290       1.216  drochner 		       device_xname(sc->sc_dev));
   1291        1.44  augustss 	}
   1292       1.233   msaitoh 
   1293       1.233   msaitoh 	/* When HCHalted=1 and Run/Stop=0 , it is normal */
   1294       1.233   msaitoh 	if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) {
   1295        1.44  augustss 		/* no acknowledge needed */
   1296       1.136  augustss 		if (!sc->sc_dying) {
   1297       1.152  augustss 			printf("%s: host controller halted\n",
   1298       1.216  drochner 			    device_xname(sc->sc_dev));
   1299       1.110  augustss #ifdef UHCI_DEBUG
   1300       1.136  augustss 			uhci_dump_all(sc);
   1301       1.110  augustss #endif
   1302       1.136  augustss 		}
   1303       1.136  augustss 		sc->sc_dying = 1;
   1304         1.1  augustss 	}
   1305        1.44  augustss 
   1306       1.132  augustss 	if (!ack)
   1307       1.132  augustss 		return (0);	/* nothing to acknowledge */
   1308       1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1309         1.1  augustss 
   1310        1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1311        1.85  augustss 
   1312       1.216  drochner 	DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
   1313        1.85  augustss 
   1314        1.85  augustss 	return (1);
   1315        1.85  augustss }
   1316        1.85  augustss 
   1317        1.85  augustss void
   1318       1.133  augustss uhci_softintr(void *v)
   1319        1.85  augustss {
   1320       1.216  drochner 	struct usbd_bus *bus = v;
   1321   1.264.4.7     skrll 	uhci_softc_t *sc = bus->ub_hcpriv;
   1322       1.178    martin 	uhci_intr_info_t *ii, *nextii;
   1323        1.85  augustss 
   1324   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1325       1.248       mrg 
   1326       1.247       mrg 	DPRINTFN(10,("%s: uhci_softintr\n", device_xname(sc->sc_dev)));
   1327        1.50  augustss 
   1328         1.1  augustss 	/*
   1329         1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1330         1.1  augustss 	 * interrupts because a transfer is completed there is no
   1331         1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1332         1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1333         1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1334         1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1335         1.1  augustss 	 * output on a slow console).
   1336         1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1337         1.1  augustss 	 * completed.
   1338         1.1  augustss 	 */
   1339       1.178    martin 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1340       1.178    martin 		nextii = LIST_NEXT(ii, list);
   1341         1.1  augustss 		uhci_check_intr(sc, ii);
   1342       1.178    martin 	}
   1343         1.1  augustss 
   1344       1.153  augustss 	if (sc->sc_softwake) {
   1345       1.153  augustss 		sc->sc_softwake = 0;
   1346       1.248       mrg 		cv_broadcast(&sc->sc_softwake_cv);
   1347       1.153  augustss 	}
   1348         1.1  augustss }
   1349         1.1  augustss 
   1350         1.1  augustss /* Check for an interrupt. */
   1351         1.1  augustss void
   1352       1.205  christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1353         1.1  augustss {
   1354         1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1355   1.264.4.1     skrll 	uint32_t status;
   1356         1.1  augustss 
   1357         1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1358         1.1  augustss #ifdef DIAGNOSTIC
   1359        1.63  augustss 	if (ii == NULL) {
   1360         1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1361         1.1  augustss 		return;
   1362         1.1  augustss 	}
   1363         1.1  augustss #endif
   1364   1.264.4.7     skrll 	if (ii->xfer->ux_status == USBD_CANCELLED ||
   1365   1.264.4.7     skrll 	    ii->xfer->ux_status == USBD_TIMEOUT) {
   1366       1.155  augustss 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1367       1.155  augustss 		return;
   1368       1.155  augustss 	}
   1369       1.155  augustss 
   1370        1.63  augustss 	if (ii->stdstart == NULL)
   1371         1.1  augustss 		return;
   1372         1.1  augustss 	lstd = ii->stdend;
   1373         1.1  augustss #ifdef DIAGNOSTIC
   1374        1.63  augustss 	if (lstd == NULL) {
   1375         1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1376         1.1  augustss 		return;
   1377         1.1  augustss 	}
   1378         1.1  augustss #endif
   1379       1.223    bouyer 	usb_syncmem(&lstd->dma,
   1380       1.223    bouyer 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1381       1.223    bouyer 	    sizeof(lstd->td.td_status),
   1382       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1383       1.256   tsutsui 	status = le32toh(lstd->td.td_status);
   1384       1.256   tsutsui 	usb_syncmem(&lstd->dma,
   1385       1.256   tsutsui 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1386       1.256   tsutsui 	    sizeof(lstd->td.td_status),
   1387       1.256   tsutsui 	    BUS_DMASYNC_PREREAD);
   1388       1.258     skrll 
   1389       1.258     skrll 	/* If the last TD is not marked active we can complete */
   1390       1.258     skrll 	if (!(status & UHCI_TD_ACTIVE)) {
   1391       1.258     skrll  done:
   1392       1.258     skrll 		DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1393   1.264.4.7     skrll 		callout_stop(&ii->xfer->ux_callout);
   1394       1.258     skrll 		uhci_idone(ii);
   1395       1.258     skrll 		return;
   1396       1.258     skrll 	}
   1397       1.258     skrll 
   1398       1.258     skrll 	/*
   1399       1.258     skrll 	 * If the last TD is still active we need to check whether there
   1400       1.258     skrll 	 * is an error somewhere in the middle, or whether there was a
   1401       1.258     skrll 	 * short packet (SPD and not ACTIVE).
   1402       1.258     skrll 	 */
   1403       1.258     skrll 	DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1404       1.258     skrll 	for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1405       1.258     skrll 		usb_syncmem(&std->dma,
   1406       1.258     skrll 		    std->offs + offsetof(uhci_td_t, td_status),
   1407       1.258     skrll 		    sizeof(std->td.td_status),
   1408       1.258     skrll 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1409       1.258     skrll 		status = le32toh(std->td.td_status);
   1410       1.258     skrll 		usb_syncmem(&std->dma,
   1411       1.258     skrll 		    std->offs + offsetof(uhci_td_t, td_status),
   1412       1.258     skrll 		    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1413       1.258     skrll 
   1414       1.258     skrll 		/* If there's an active TD the xfer isn't done. */
   1415       1.258     skrll 		if (status & UHCI_TD_ACTIVE) {
   1416       1.258     skrll 			DPRINTFN(12, ("%s: ii=%p std=%p still active\n",
   1417       1.258     skrll 			    __func__, ii, std));
   1418       1.258     skrll 			return;
   1419       1.258     skrll 		}
   1420       1.258     skrll 
   1421       1.258     skrll 		/* Any kind of error makes the xfer done. */
   1422       1.258     skrll 		if (status & UHCI_TD_STALLED)
   1423       1.258     skrll 			goto done;
   1424       1.258     skrll 
   1425       1.258     skrll 		/*
   1426       1.258     skrll 		 * If the data phase of a control transfer is short, we need
   1427       1.258     skrll 		 * to complete the status stage
   1428       1.258     skrll 		 */
   1429       1.258     skrll 		usbd_xfer_handle xfer = ii->xfer;
   1430   1.264.4.7     skrll 		usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc;
   1431       1.258     skrll 		uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes);
   1432       1.258     skrll 
   1433       1.258     skrll 		if ((status & UHCI_TD_SPD) && xfertype == UE_CONTROL) {
   1434       1.258     skrll 			struct uhci_pipe *upipe =
   1435   1.264.4.7     skrll 			    (struct uhci_pipe *)xfer->ux_pipe;
   1436       1.258     skrll 			uhci_soft_qh_t *sqh = upipe->u.ctl.sqh;
   1437       1.258     skrll 			uhci_soft_td_t *stat = upipe->u.ctl.stat;
   1438       1.258     skrll 
   1439       1.258     skrll 			DPRINTFN(12, ("%s: ii=%p std=%p control status"
   1440       1.258     skrll 			    "phase needs completion\n", __func__, ii,
   1441       1.258     skrll 			    ii->stdstart));
   1442       1.258     skrll 
   1443       1.258     skrll 			sqh->qh.qh_elink =
   1444       1.258     skrll 			    htole32(stat->physaddr | UHCI_PTR_TD);
   1445       1.258     skrll 			usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1446       1.258     skrll 			    BUS_DMASYNC_PREWRITE);
   1447       1.258     skrll 			break;
   1448       1.258     skrll 		}
   1449       1.258     skrll 
   1450       1.258     skrll 		/* We want short packets, and it is short: it's done */
   1451       1.258     skrll 		usb_syncmem(&std->dma,
   1452       1.258     skrll 		    std->offs + offsetof(uhci_td_t, td_token),
   1453       1.258     skrll 		    sizeof(std->td.td_token),
   1454       1.258     skrll 		    BUS_DMASYNC_POSTWRITE);
   1455       1.258     skrll 
   1456       1.258     skrll 		if ((status & UHCI_TD_SPD) &&
   1457       1.258     skrll 			UHCI_TD_GET_ACTLEN(status) <
   1458       1.258     skrll 			UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) {
   1459       1.258     skrll 			goto done;
   1460        1.18  augustss 		}
   1461         1.1  augustss 	}
   1462         1.1  augustss }
   1463         1.1  augustss 
   1464       1.248       mrg /* Called with USB lock held. */
   1465         1.1  augustss void
   1466       1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1467         1.1  augustss {
   1468        1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1469   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   1470       1.248       mrg #ifdef DIAGNOSTIC
   1471   1.264.4.7     skrll 	uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv;
   1472       1.248       mrg #endif
   1473         1.1  augustss 	uhci_soft_td_t *std;
   1474   1.264.4.1     skrll 	uint32_t status = 0, nstatus;
   1475        1.26  augustss 	int actlen;
   1476         1.1  augustss 
   1477   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1478       1.248       mrg 
   1479       1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1480         1.7  augustss #ifdef DIAGNOSTIC
   1481         1.7  augustss 	{
   1482       1.248       mrg 		/* XXX SMP? */
   1483         1.7  augustss 		int s = splhigh();
   1484         1.7  augustss 		if (ii->isdone) {
   1485        1.26  augustss 			splx(s);
   1486        1.92  augustss #ifdef UHCI_DEBUG
   1487        1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1488        1.92  augustss 			uhci_dump_ii(ii);
   1489        1.92  augustss #else
   1490        1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1491        1.92  augustss #endif
   1492         1.7  augustss 			return;
   1493         1.7  augustss 		}
   1494         1.7  augustss 		ii->isdone = 1;
   1495         1.7  augustss 		splx(s);
   1496         1.7  augustss 	}
   1497         1.7  augustss #endif
   1498        1.48  augustss 
   1499   1.264.4.7     skrll 	if (xfer->ux_nframes != 0) {
   1500        1.48  augustss 		/* Isoc transfer, do things differently. */
   1501        1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1502       1.126  augustss 		int i, n, nframes, len;
   1503        1.48  augustss 
   1504        1.48  augustss 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1505        1.48  augustss 
   1506   1.264.4.7     skrll 		nframes = xfer->ux_nframes;
   1507        1.48  augustss 		actlen = 0;
   1508        1.92  augustss 		n = UXFER(xfer)->curframe;
   1509        1.48  augustss 		for (i = 0; i < nframes; i++) {
   1510        1.48  augustss 			std = stds[n];
   1511        1.59  augustss #ifdef UHCI_DEBUG
   1512        1.48  augustss 			if (uhcidebug > 5) {
   1513        1.48  augustss 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1514        1.48  augustss 				uhci_dump_td(std);
   1515        1.48  augustss 			}
   1516        1.48  augustss #endif
   1517        1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1518        1.48  augustss 				n = 0;
   1519       1.223    bouyer 			usb_syncmem(&std->dma,
   1520       1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1521       1.223    bouyer 			    sizeof(std->td.td_status),
   1522       1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1523        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1524       1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1525   1.264.4.7     skrll 			xfer->ux_frlengths[i] = len;
   1526       1.126  augustss 			actlen += len;
   1527        1.48  augustss 		}
   1528        1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1529   1.264.4.7     skrll 		xfer->ux_actlen = actlen;
   1530   1.264.4.7     skrll 		xfer->ux_status = USBD_NORMAL_COMPLETION;
   1531       1.140  augustss 		goto end;
   1532        1.48  augustss 	}
   1533        1.48  augustss 
   1534        1.59  augustss #ifdef UHCI_DEBUG
   1535        1.65  augustss 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1536        1.65  augustss 		      ii, xfer, upipe));
   1537        1.48  augustss 	if (uhcidebug > 10)
   1538        1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1539        1.48  augustss #endif
   1540        1.48  augustss 
   1541        1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1542        1.26  augustss 	actlen = 0;
   1543        1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1544       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1545       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1546        1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1547        1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1548        1.26  augustss 			break;
   1549        1.67  augustss 
   1550        1.64  augustss 		status = nstatus;
   1551        1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1552        1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1553        1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1554       1.176   mycroft 		else {
   1555       1.176   mycroft 			/*
   1556       1.176   mycroft 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1557       1.176   mycroft 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1558       1.176   mycroft 			 * CONTROL AND STATUS".
   1559       1.176   mycroft 			 */
   1560       1.176   mycroft 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1561       1.176   mycroft 				status &= ~UHCI_TD_CRCTO;
   1562       1.176   mycroft 		}
   1563         1.1  augustss 	}
   1564        1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1565        1.63  augustss 	if (std != NULL)
   1566        1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1567        1.38  augustss 
   1568         1.1  augustss 	status &= UHCI_TD_ERROR;
   1569       1.152  augustss 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1570        1.26  augustss 		      actlen, status));
   1571   1.264.4.7     skrll 	xfer->ux_actlen = actlen;
   1572         1.1  augustss 	if (status != 0) {
   1573       1.122        tv #ifdef UHCI_DEBUG
   1574       1.122        tv 		char sbuf[128];
   1575       1.122        tv 
   1576       1.224  christos 		snprintb(sbuf, sizeof(sbuf),
   1577       1.224  christos 		    "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1578   1.264.4.1     skrll 		    "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(uint32_t)status);
   1579       1.122        tv 
   1580        1.75  augustss 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1581        1.36  augustss 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1582       1.122        tv 			  "status 0x%s\n",
   1583   1.264.4.7     skrll 			  xfer->ux_pipe->up_dev->ud_addr,
   1584   1.264.4.7     skrll 			  xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress,
   1585       1.122        tv 			  sbuf));
   1586       1.122        tv #endif
   1587       1.122        tv 
   1588         1.1  augustss 		if (status == UHCI_TD_STALLED)
   1589   1.264.4.7     skrll 			xfer->ux_status = USBD_STALLED;
   1590         1.1  augustss 		else
   1591   1.264.4.7     skrll 			xfer->ux_status = USBD_IOERROR; /* more info XXX */
   1592         1.1  augustss 	} else {
   1593   1.264.4.7     skrll 		xfer->ux_status = USBD_NORMAL_COMPLETION;
   1594         1.1  augustss 	}
   1595       1.140  augustss 
   1596       1.140  augustss  end:
   1597        1.63  augustss 	usb_transfer_complete(xfer);
   1598   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1599       1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1600         1.1  augustss }
   1601         1.1  augustss 
   1602        1.13  augustss /*
   1603        1.13  augustss  * Called when a request does not complete.
   1604        1.13  augustss  */
   1605         1.1  augustss void
   1606       1.119  augustss uhci_timeout(void *addr)
   1607         1.1  augustss {
   1608         1.1  augustss 	uhci_intr_info_t *ii = addr;
   1609       1.153  augustss 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1610   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.ux_pipe;
   1611   1.264.4.7     skrll 	uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv;
   1612       1.153  augustss 
   1613       1.153  augustss 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1614       1.153  augustss 
   1615       1.153  augustss 	if (sc->sc_dying) {
   1616       1.248       mrg 		mutex_enter(&sc->sc_lock);
   1617       1.153  augustss 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1618       1.248       mrg 		mutex_exit(&sc->sc_lock);
   1619       1.153  augustss 		return;
   1620       1.153  augustss 	}
   1621         1.1  augustss 
   1622       1.153  augustss 	/* Execute the abort in a process context. */
   1623       1.252  jmcneill 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer,
   1624       1.252  jmcneill 	    USB_TASKQ_MPSAFE);
   1625   1.264.4.7     skrll 	usb_add_task(uxfer->xfer.ux_pipe->up_dev, &uxfer->abort_task,
   1626       1.204     joerg 	    USB_TASKQ_HC);
   1627       1.153  augustss }
   1628        1.51  augustss 
   1629       1.153  augustss void
   1630       1.153  augustss uhci_timeout_task(void *addr)
   1631       1.153  augustss {
   1632       1.153  augustss 	usbd_xfer_handle xfer = addr;
   1633   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   1634       1.153  augustss 
   1635       1.153  augustss 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1636        1.67  augustss 
   1637       1.248       mrg 	mutex_enter(&sc->sc_lock);
   1638       1.153  augustss 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1639       1.248       mrg 	mutex_exit(&sc->sc_lock);
   1640         1.1  augustss }
   1641         1.1  augustss 
   1642         1.1  augustss /*
   1643         1.1  augustss  * Wait here until controller claims to have an interrupt.
   1644         1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1645         1.1  augustss  * too long.
   1646        1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1647         1.1  augustss  */
   1648         1.1  augustss void
   1649       1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1650         1.1  augustss {
   1651   1.264.4.7     skrll 	int timo = xfer->ux_timeout;
   1652        1.13  augustss 	uhci_intr_info_t *ii;
   1653        1.13  augustss 
   1654       1.248       mrg 	mutex_enter(&sc->sc_lock);
   1655       1.248       mrg 
   1656        1.26  augustss 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1657         1.1  augustss 
   1658   1.264.4.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   1659        1.26  augustss 	for (; timo >= 0; timo--) {
   1660       1.248       mrg 		usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_lock);
   1661        1.26  augustss 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1662         1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1663       1.248       mrg 			mutex_spin_enter(&sc->sc_intr_lock);
   1664       1.141  augustss 			uhci_intr1(sc);
   1665       1.248       mrg 			mutex_spin_exit(&sc->sc_intr_lock);
   1666   1.264.4.7     skrll 			if (xfer->ux_status != USBD_IN_PROGRESS)
   1667       1.248       mrg 				goto done;
   1668         1.1  augustss 		}
   1669         1.1  augustss 	}
   1670        1.13  augustss 
   1671        1.13  augustss 	/* Timeout */
   1672        1.13  augustss 	DPRINTF(("uhci_waitintr: timeout\n"));
   1673        1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1674       1.152  augustss 	     ii != NULL && ii->xfer != xfer;
   1675        1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1676        1.13  augustss 		;
   1677        1.41  augustss #ifdef DIAGNOSTIC
   1678        1.63  augustss 	if (ii == NULL)
   1679       1.163    provos 		panic("uhci_waitintr: lost intr_info");
   1680        1.41  augustss #endif
   1681        1.41  augustss 	uhci_idone(ii);
   1682       1.248       mrg 
   1683       1.248       mrg done:
   1684       1.248       mrg 	mutex_exit(&sc->sc_lock);
   1685         1.1  augustss }
   1686         1.1  augustss 
   1687         1.8  augustss void
   1688       1.119  augustss uhci_poll(struct usbd_bus *bus)
   1689         1.8  augustss {
   1690   1.264.4.7     skrll 	uhci_softc_t *sc = bus->ub_hcpriv;
   1691         1.8  augustss 
   1692       1.248       mrg 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1693       1.248       mrg 		mutex_spin_enter(&sc->sc_intr_lock);
   1694       1.141  augustss 		uhci_intr1(sc);
   1695       1.248       mrg 		mutex_spin_exit(&sc->sc_intr_lock);
   1696       1.248       mrg 	}
   1697         1.8  augustss }
   1698         1.8  augustss 
   1699         1.1  augustss void
   1700       1.119  augustss uhci_reset(uhci_softc_t *sc)
   1701         1.1  augustss {
   1702         1.1  augustss 	int n;
   1703         1.1  augustss 
   1704         1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1705         1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1706       1.152  augustss 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1707         1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1708        1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1709         1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1710       1.152  augustss 		printf("%s: controller did not reset\n",
   1711       1.216  drochner 		       device_xname(sc->sc_dev));
   1712         1.1  augustss }
   1713         1.1  augustss 
   1714        1.16  augustss usbd_status
   1715       1.249  drochner uhci_run(uhci_softc_t *sc, int run, int locked)
   1716         1.1  augustss {
   1717       1.248       mrg 	int n, running;
   1718   1.264.4.1     skrll 	uint16_t cmd;
   1719         1.1  augustss 
   1720         1.1  augustss 	run = run != 0;
   1721       1.249  drochner 	if (!locked)
   1722       1.249  drochner 		mutex_spin_enter(&sc->sc_intr_lock);
   1723        1.30  augustss 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1724        1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1725        1.71  augustss 	if (run)
   1726        1.71  augustss 		cmd |= UHCI_CMD_RS;
   1727        1.71  augustss 	else
   1728        1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1729        1.71  augustss 	UHCICMD(sc, cmd);
   1730        1.13  augustss 	for(n = 0; n < 10; n++) {
   1731         1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1732         1.1  augustss 		/* return when we've entered the state we want */
   1733         1.1  augustss 		if (run == running) {
   1734       1.249  drochner 			if (!locked)
   1735       1.249  drochner 				mutex_spin_exit(&sc->sc_intr_lock);
   1736        1.30  augustss 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1737        1.30  augustss 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1738        1.16  augustss 			return (USBD_NORMAL_COMPLETION);
   1739         1.1  augustss 		}
   1740       1.248       mrg 		usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock);
   1741         1.1  augustss 	}
   1742       1.249  drochner 	if (!locked)
   1743       1.249  drochner 		mutex_spin_exit(&sc->sc_intr_lock);
   1744       1.216  drochner 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
   1745        1.14  augustss 	       run ? "start" : "stop");
   1746        1.16  augustss 	return (USBD_IOERROR);
   1747         1.1  augustss }
   1748         1.1  augustss 
   1749         1.1  augustss /*
   1750         1.1  augustss  * Memory management routines.
   1751         1.1  augustss  *  uhci_alloc_std allocates TDs
   1752         1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1753         1.7  augustss  * These two routines do their own free list management,
   1754         1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1755         1.1  augustss  * has page size granularaity so much memory would be wasted if
   1756        1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1757         1.1  augustss  */
   1758         1.1  augustss 
   1759         1.1  augustss uhci_soft_td_t *
   1760       1.119  augustss uhci_alloc_std(uhci_softc_t *sc)
   1761         1.1  augustss {
   1762         1.1  augustss 	uhci_soft_td_t *std;
   1763        1.63  augustss 	usbd_status err;
   1764        1.42  augustss 	int i, offs;
   1765         1.7  augustss 	usb_dma_t dma;
   1766         1.1  augustss 
   1767        1.63  augustss 	if (sc->sc_freetds == NULL) {
   1768         1.1  augustss 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1769        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1770        1.63  augustss 			  UHCI_TD_ALIGN, &dma);
   1771        1.63  augustss 		if (err)
   1772        1.16  augustss 			return (0);
   1773       1.248       mrg 		for (i = 0; i < UHCI_STD_CHUNK; i++) {
   1774        1.42  augustss 			offs = i * UHCI_STD_SIZE;
   1775       1.159  augustss 			std = KERNADDR(&dma, offs);
   1776       1.160  augustss 			std->physaddr = DMAADDR(&dma, offs);
   1777       1.223    bouyer 			std->dma = dma;
   1778       1.223    bouyer 			std->offs = offs;
   1779        1.42  augustss 			std->link.std = sc->sc_freetds;
   1780         1.1  augustss 			sc->sc_freetds = std;
   1781         1.1  augustss 		}
   1782         1.1  augustss 	}
   1783         1.1  augustss 	std = sc->sc_freetds;
   1784        1.42  augustss 	sc->sc_freetds = std->link.std;
   1785        1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1786         1.1  augustss 	return std;
   1787         1.1  augustss }
   1788         1.1  augustss 
   1789         1.1  augustss void
   1790       1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1791         1.1  augustss {
   1792         1.7  augustss #ifdef DIAGNOSTIC
   1793         1.7  augustss #define TD_IS_FREE 0x12345678
   1794        1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1795         1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1796         1.7  augustss 		return;
   1797         1.7  augustss 	}
   1798        1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1799         1.7  augustss #endif
   1800        1.42  augustss 	std->link.std = sc->sc_freetds;
   1801         1.1  augustss 	sc->sc_freetds = std;
   1802         1.1  augustss }
   1803         1.1  augustss 
   1804         1.1  augustss uhci_soft_qh_t *
   1805       1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   1806         1.1  augustss {
   1807         1.1  augustss 	uhci_soft_qh_t *sqh;
   1808        1.63  augustss 	usbd_status err;
   1809         1.1  augustss 	int i, offs;
   1810         1.7  augustss 	usb_dma_t dma;
   1811         1.1  augustss 
   1812        1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   1813         1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1814        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1815        1.63  augustss 			  UHCI_QH_ALIGN, &dma);
   1816        1.63  augustss 		if (err)
   1817        1.63  augustss 			return (0);
   1818        1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1819        1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   1820       1.159  augustss 			sqh = KERNADDR(&dma, offs);
   1821       1.160  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   1822       1.223    bouyer 			sqh->dma = dma;
   1823       1.223    bouyer 			sqh->offs = offs;
   1824        1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   1825         1.1  augustss 			sc->sc_freeqhs = sqh;
   1826         1.1  augustss 		}
   1827         1.1  augustss 	}
   1828         1.1  augustss 	sqh = sc->sc_freeqhs;
   1829        1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   1830        1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1831        1.16  augustss 	return (sqh);
   1832         1.1  augustss }
   1833         1.1  augustss 
   1834         1.1  augustss void
   1835       1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1836         1.1  augustss {
   1837        1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   1838         1.1  augustss 	sc->sc_freeqhs = sqh;
   1839         1.1  augustss }
   1840         1.1  augustss 
   1841         1.1  augustss void
   1842       1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1843       1.119  augustss 		    uhci_soft_td_t *stdend)
   1844         1.1  augustss {
   1845         1.1  augustss 	uhci_soft_td_t *p;
   1846       1.256   tsutsui 	uint32_t td_link;
   1847         1.1  augustss 
   1848       1.223    bouyer 	/*
   1849       1.223    bouyer 	 * to avoid race condition with the controller which may be looking
   1850       1.223    bouyer 	 * at this chain, we need to first invalidate all links, and
   1851       1.223    bouyer 	 * then wait for the controller to move to another queue
   1852       1.223    bouyer 	 */
   1853       1.223    bouyer 	for (p = std; p != stdend; p = p->link.std) {
   1854       1.223    bouyer 		usb_syncmem(&p->dma,
   1855       1.223    bouyer 		    p->offs + offsetof(uhci_td_t, td_link),
   1856       1.223    bouyer 		    sizeof(p->td.td_link),
   1857       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1858       1.256   tsutsui 		td_link = le32toh(p->td.td_link);
   1859       1.256   tsutsui 		usb_syncmem(&p->dma,
   1860       1.256   tsutsui 		    p->offs + offsetof(uhci_td_t, td_link),
   1861       1.256   tsutsui 		    sizeof(p->td.td_link),
   1862       1.256   tsutsui 		    BUS_DMASYNC_PREREAD);
   1863       1.256   tsutsui 		if ((td_link & UHCI_PTR_T) == 0) {
   1864       1.255   tsutsui 			p->td.td_link = htole32(UHCI_PTR_T);
   1865       1.223    bouyer 			usb_syncmem(&p->dma,
   1866       1.223    bouyer 			    p->offs + offsetof(uhci_td_t, td_link),
   1867       1.223    bouyer 			    sizeof(p->td.td_link),
   1868       1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1869       1.223    bouyer 		}
   1870       1.223    bouyer 	}
   1871       1.223    bouyer 	delay(UHCI_QH_REMOVE_DELAY);
   1872       1.223    bouyer 
   1873         1.1  augustss 	for (; std != stdend; std = p) {
   1874        1.42  augustss 		p = std->link.std;
   1875         1.1  augustss 		uhci_free_std(sc, std);
   1876         1.1  augustss 	}
   1877         1.1  augustss }
   1878         1.1  augustss 
   1879         1.1  augustss usbd_status
   1880       1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1881   1.264.4.1     skrll 		     int rd, uint16_t flags, usb_dma_t *dma,
   1882       1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1883         1.1  augustss {
   1884         1.1  augustss 	uhci_soft_td_t *p, *lastp;
   1885         1.1  augustss 	uhci_physaddr_t lastlink;
   1886         1.1  augustss 	int i, ntd, l, tog, maxp;
   1887   1.264.4.1     skrll 	uint32_t status;
   1888   1.264.4.7     skrll 	int addr = upipe->pipe.up_dev->ud_addr;
   1889   1.264.4.7     skrll 	int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   1890         1.1  augustss 
   1891       1.144  augustss 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1892       1.152  augustss 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1893   1.264.4.7     skrll 		      upipe->pipe.up_dev->ud_speed, flags));
   1894       1.248       mrg 
   1895   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1896       1.248       mrg 
   1897   1.264.4.7     skrll 	maxp = UGETW(upipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize);
   1898         1.1  augustss 	if (maxp == 0) {
   1899         1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1900         1.1  augustss 		return (USBD_INVAL);
   1901         1.1  augustss 	}
   1902         1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1903        1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1904        1.73  augustss 		ntd++;
   1905        1.39  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1906        1.73  augustss 	if (ntd == 0) {
   1907        1.73  augustss 		*sp = *ep = 0;
   1908        1.73  augustss 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1909        1.73  augustss 		return (USBD_NORMAL_COMPLETION);
   1910        1.73  augustss 	}
   1911        1.38  augustss 	tog = upipe->nexttoggle;
   1912         1.1  augustss 	if (ntd % 2 == 0)
   1913         1.1  augustss 		tog ^= 1;
   1914        1.32  augustss 	upipe->nexttoggle = tog ^ 1;
   1915       1.121  augustss 	lastp = NULL;
   1916         1.1  augustss 	lastlink = UHCI_PTR_T;
   1917         1.1  augustss 	ntd--;
   1918        1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1919   1.264.4.7     skrll 	if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW)
   1920        1.18  augustss 		status |= UHCI_TD_LS;
   1921        1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   1922        1.18  augustss 		status |= UHCI_TD_SPD;
   1923       1.223    bouyer 	usb_syncmem(dma, 0, len,
   1924       1.223    bouyer 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1925         1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1926         1.1  augustss 		p = uhci_alloc_std(sc);
   1927        1.63  augustss 		if (p == NULL) {
   1928       1.202  christos 			KASSERT(lastp != NULL);
   1929       1.149  augustss 			uhci_free_std_chain(sc, lastp, NULL);
   1930         1.1  augustss 			return (USBD_NOMEM);
   1931         1.1  augustss 		}
   1932        1.42  augustss 		p->link.std = lastp;
   1933       1.121  augustss 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1934         1.1  augustss 		lastp = p;
   1935         1.1  augustss 		lastlink = p->physaddr;
   1936        1.88   tsutsui 		p->td.td_status = htole32(status);
   1937         1.1  augustss 		if (i == ntd) {
   1938         1.1  augustss 			/* last TD */
   1939         1.1  augustss 			l = len % maxp;
   1940        1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1941        1.73  augustss 				l = maxp;
   1942         1.1  augustss 			*ep = p;
   1943         1.1  augustss 		} else
   1944         1.1  augustss 			l = maxp;
   1945       1.152  augustss 		p->td.td_token =
   1946        1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1947        1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1948       1.160  augustss 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1949       1.223    bouyer 		usb_syncmem(&p->dma, p->offs, sizeof(p->td),
   1950       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1951         1.1  augustss 		tog ^= 1;
   1952         1.1  augustss 	}
   1953         1.1  augustss 	*sp = lastp;
   1954       1.152  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1955        1.38  augustss 		      upipe->nexttoggle));
   1956         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1957         1.1  augustss }
   1958         1.1  augustss 
   1959        1.38  augustss void
   1960       1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1961        1.38  augustss {
   1962        1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1963        1.38  augustss 	upipe->nexttoggle = 0;
   1964        1.38  augustss }
   1965        1.38  augustss 
   1966        1.38  augustss void
   1967       1.205  christos uhci_noop(usbd_pipe_handle pipe)
   1968        1.38  augustss {
   1969        1.38  augustss }
   1970        1.38  augustss 
   1971         1.1  augustss usbd_status
   1972       1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   1973         1.1  augustss {
   1974   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   1975        1.63  augustss 	usbd_status err;
   1976        1.16  augustss 
   1977        1.52  augustss 	/* Insert last in queue. */
   1978       1.248       mrg 	mutex_enter(&sc->sc_lock);
   1979        1.63  augustss 	err = usb_insert_transfer(xfer);
   1980       1.248       mrg 	mutex_exit(&sc->sc_lock);
   1981        1.63  augustss 	if (err)
   1982        1.63  augustss 		return (err);
   1983        1.52  augustss 
   1984       1.152  augustss 	/*
   1985        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1986        1.92  augustss 	 * so start it first.
   1987        1.67  augustss 	 */
   1988   1.264.4.7     skrll 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)));
   1989        1.16  augustss }
   1990        1.16  augustss 
   1991        1.16  augustss usbd_status
   1992       1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   1993        1.16  augustss {
   1994   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   1995   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   1996   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   1997        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   1998        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   1999         1.1  augustss 	uhci_soft_qh_t *sqh;
   2000        1.63  augustss 	usbd_status err;
   2001        1.45  augustss 	int len, isread, endpt;
   2002         1.1  augustss 
   2003       1.169  augustss 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
   2004   1.264.4.7     skrll 		     xfer, xfer->ux_length, xfer->ux_flags, ii));
   2005         1.1  augustss 
   2006        1.82  augustss 	if (sc->sc_dying)
   2007        1.82  augustss 		return (USBD_IOERROR);
   2008        1.82  augustss 
   2009        1.48  augustss #ifdef DIAGNOSTIC
   2010   1.264.4.7     skrll 	if (xfer->ux_rqflags & URQ_REQUEST)
   2011       1.163    provos 		panic("uhci_device_bulk_transfer: a request");
   2012        1.48  augustss #endif
   2013         1.1  augustss 
   2014       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2015       1.248       mrg 
   2016   1.264.4.7     skrll 	len = xfer->ux_length;
   2017   1.264.4.7     skrll 	endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2018        1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2019         1.1  augustss 	sqh = upipe->u.bulk.sqh;
   2020         1.1  augustss 
   2021         1.1  augustss 	upipe->u.bulk.isread = isread;
   2022         1.1  augustss 	upipe->u.bulk.length = len;
   2023         1.1  augustss 
   2024   1.264.4.7     skrll 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->ux_flags,
   2025   1.264.4.7     skrll 				   &xfer->ux_dmabuf, &data, &dataend);
   2026       1.248       mrg 	if (err) {
   2027       1.248       mrg 		mutex_exit(&sc->sc_lock);
   2028        1.63  augustss 		return (err);
   2029       1.248       mrg 	}
   2030        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2031       1.223    bouyer 	usb_syncmem(&dataend->dma,
   2032       1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2033       1.223    bouyer 	    sizeof(dataend->td.td_status),
   2034       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2035       1.223    bouyer 
   2036         1.1  augustss 
   2037        1.59  augustss #ifdef UHCI_DEBUG
   2038        1.33  augustss 	if (uhcidebug > 8) {
   2039        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   2040        1.55  augustss 		uhci_dump_tds(data);
   2041         1.1  augustss 	}
   2042         1.1  augustss #endif
   2043         1.1  augustss 
   2044         1.1  augustss 	/* Set up interrupt info. */
   2045        1.63  augustss 	ii->xfer = xfer;
   2046        1.55  augustss 	ii->stdstart = data;
   2047        1.55  augustss 	ii->stdend = dataend;
   2048         1.7  augustss #ifdef DIAGNOSTIC
   2049        1.70  augustss 	if (!ii->isdone) {
   2050        1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   2051        1.70  augustss 	}
   2052         1.7  augustss 	ii->isdone = 0;
   2053         1.7  augustss #endif
   2054         1.1  augustss 
   2055        1.55  augustss 	sqh->elink = data;
   2056       1.121  augustss 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2057       1.223    bouyer 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2058         1.1  augustss 
   2059         1.1  augustss 	uhci_add_bulk(sc, sqh);
   2060        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2061         1.1  augustss 
   2062   1.264.4.7     skrll 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   2063   1.264.4.7     skrll 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   2064        1.91  augustss 			    uhci_timeout, ii);
   2065        1.13  augustss 	}
   2066   1.264.4.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   2067         1.1  augustss 
   2068        1.59  augustss #ifdef UHCI_DEBUG
   2069         1.1  augustss 	if (uhcidebug > 10) {
   2070        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   2071        1.55  augustss 		uhci_dump_tds(data);
   2072         1.1  augustss 	}
   2073         1.1  augustss #endif
   2074         1.1  augustss 
   2075   1.264.4.7     skrll 	if (sc->sc_bus.ub_usepolling)
   2076        1.63  augustss 		uhci_waitintr(sc, xfer);
   2077        1.26  augustss 
   2078       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2079         1.1  augustss 	return (USBD_IN_PROGRESS);
   2080         1.1  augustss }
   2081         1.1  augustss 
   2082         1.1  augustss /* Abort a device bulk request. */
   2083         1.1  augustss void
   2084       1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   2085         1.1  augustss {
   2086       1.248       mrg #ifdef DIAGNOSTIC
   2087   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2088       1.248       mrg #endif
   2089       1.248       mrg 
   2090       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2091       1.248       mrg 
   2092        1.33  augustss 	DPRINTF(("uhci_device_bulk_abort:\n"));
   2093        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2094        1.33  augustss }
   2095        1.33  augustss 
   2096        1.92  augustss /*
   2097       1.154  augustss  * Abort a device request.
   2098       1.154  augustss  * If this routine is called at splusb() it guarantees that the request
   2099       1.154  augustss  * will be removed from the hardware scheduling and that the callback
   2100       1.154  augustss  * for it will be called with USBD_CANCELLED status.
   2101       1.154  augustss  * It's impossible to guarantee that the requested transfer will not
   2102       1.154  augustss  * have happened since the hardware runs concurrently.
   2103       1.154  augustss  * If the transaction has already happened we rely on the ordinary
   2104       1.154  augustss  * interrupt processing to process it.
   2105       1.248       mrg  * XXX This is most probably wrong.
   2106       1.248       mrg  * XXXMRG this doesn't make sense anymore.
   2107        1.92  augustss  */
   2108        1.33  augustss void
   2109       1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2110        1.33  augustss {
   2111        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2112   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2113   1.264.4.7     skrll 	uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv;
   2114        1.33  augustss 	uhci_soft_td_t *std;
   2115       1.188  augustss 	int wake;
   2116        1.65  augustss 
   2117       1.106  augustss 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   2118        1.33  augustss 
   2119       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2120   1.264.4.3     skrll 	ASSERT_SLEEPABLE();
   2121       1.248       mrg 
   2122       1.153  augustss 	if (sc->sc_dying) {
   2123       1.153  augustss 		/* If we're dying, just do the software part. */
   2124   1.264.4.7     skrll 		xfer->ux_status = status;	/* make software ignore it */
   2125   1.264.4.7     skrll 		callout_stop(&xfer->ux_callout);
   2126       1.153  augustss 		usb_transfer_complete(xfer);
   2127       1.194  christos 		return;
   2128        1.92  augustss 	}
   2129        1.92  augustss 
   2130       1.153  augustss 	/*
   2131       1.188  augustss 	 * If an abort is already in progress then just wait for it to
   2132       1.188  augustss 	 * complete and return.
   2133       1.188  augustss 	 */
   2134   1.264.4.7     skrll 	if (xfer->ux_hcflags & UXFER_ABORTING) {
   2135       1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
   2136       1.188  augustss #ifdef DIAGNOSTIC
   2137       1.188  augustss 		if (status == USBD_TIMEOUT)
   2138       1.188  augustss 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2139       1.188  augustss #endif
   2140       1.188  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2141   1.264.4.7     skrll 		xfer->ux_status = status;
   2142       1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
   2143   1.264.4.7     skrll 		xfer->ux_hcflags |= UXFER_ABORTWAIT;
   2144   1.264.4.7     skrll 		while (xfer->ux_hcflags & UXFER_ABORTING)
   2145   1.264.4.7     skrll 			cv_wait(&xfer->ux_hccv, &sc->sc_lock);
   2146       1.248       mrg 		goto done;
   2147       1.188  augustss 	}
   2148   1.264.4.7     skrll 	xfer->ux_hcflags |= UXFER_ABORTING;
   2149       1.188  augustss 
   2150       1.188  augustss 	/*
   2151       1.153  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2152       1.153  augustss 	 */
   2153   1.264.4.7     skrll 	xfer->ux_status = status;	/* make software ignore it */
   2154   1.264.4.7     skrll 	callout_stop(&xfer->ux_callout);
   2155       1.153  augustss 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   2156       1.223    bouyer 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   2157       1.223    bouyer 		usb_syncmem(&std->dma,
   2158       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2159       1.223    bouyer 		    sizeof(std->td.td_status),
   2160       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2161        1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2162       1.223    bouyer 		usb_syncmem(&std->dma,
   2163       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2164       1.223    bouyer 		    sizeof(std->td.td_status),
   2165       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2166       1.223    bouyer 	}
   2167        1.92  augustss 
   2168       1.162  augustss 	/*
   2169       1.153  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2170       1.153  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2171       1.153  augustss 	 * has run.
   2172       1.153  augustss 	 */
   2173       1.248       mrg 	/* Hardware finishes in 1ms */
   2174   1.264.4.7     skrll 	usb_delay_ms_locked(upipe->pipe.up_dev->ud_bus, 2, &sc->sc_lock);
   2175       1.153  augustss 	sc->sc_softwake = 1;
   2176       1.153  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2177       1.248       mrg 	DPRINTFN(1,("uhci_abort_xfer: cv_wait\n"));
   2178       1.248       mrg 	cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
   2179       1.162  augustss 
   2180       1.153  augustss 	/*
   2181       1.153  augustss 	 * Step 3: Execute callback.
   2182       1.153  augustss 	 */
   2183       1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   2184       1.100  augustss #ifdef DIAGNOSTIC
   2185       1.106  augustss 	ii->isdone = 1;
   2186       1.100  augustss #endif
   2187   1.264.4.7     skrll 	wake = xfer->ux_hcflags & UXFER_ABORTWAIT;
   2188   1.264.4.7     skrll 	xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2189       1.106  augustss 	usb_transfer_complete(xfer);
   2190       1.188  augustss 	if (wake)
   2191   1.264.4.7     skrll 		cv_broadcast(&xfer->ux_hccv);
   2192       1.248       mrg done:
   2193       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2194         1.1  augustss }
   2195         1.1  augustss 
   2196         1.1  augustss /* Close a device bulk pipe. */
   2197         1.1  augustss void
   2198       1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   2199         1.1  augustss {
   2200         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2201   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2202   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2203         1.1  augustss 
   2204       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2205       1.248       mrg 
   2206         1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2207       1.236  drochner 
   2208   1.264.4.7     skrll 	pipe->up_endpoint->ue_toggle = upipe->nexttoggle;
   2209         1.1  augustss }
   2210         1.1  augustss 
   2211         1.1  augustss usbd_status
   2212       1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2213         1.1  augustss {
   2214   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2215        1.63  augustss 	usbd_status err;
   2216        1.16  augustss 
   2217        1.52  augustss 	/* Insert last in queue. */
   2218       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2219        1.63  augustss 	err = usb_insert_transfer(xfer);
   2220       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2221        1.63  augustss 	if (err)
   2222        1.63  augustss 		return (err);
   2223        1.52  augustss 
   2224       1.152  augustss 	/*
   2225        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2226        1.92  augustss 	 * so start it first.
   2227        1.67  augustss 	 */
   2228   1.264.4.7     skrll 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)));
   2229        1.16  augustss }
   2230        1.16  augustss 
   2231        1.16  augustss usbd_status
   2232       1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2233        1.16  augustss {
   2234   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2235        1.63  augustss 	usbd_status err;
   2236         1.1  augustss 
   2237        1.82  augustss 	if (sc->sc_dying)
   2238        1.82  augustss 		return (USBD_IOERROR);
   2239        1.82  augustss 
   2240        1.48  augustss #ifdef DIAGNOSTIC
   2241   1.264.4.7     skrll 	if (!(xfer->ux_rqflags & URQ_REQUEST))
   2242       1.163    provos 		panic("uhci_device_ctrl_transfer: not a request");
   2243        1.48  augustss #endif
   2244         1.1  augustss 
   2245       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2246        1.63  augustss 	err = uhci_device_request(xfer);
   2247       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2248        1.63  augustss 	if (err)
   2249        1.63  augustss 		return (err);
   2250         1.1  augustss 
   2251   1.264.4.7     skrll 	if (sc->sc_bus.ub_usepolling)
   2252        1.63  augustss 		uhci_waitintr(sc, xfer);
   2253         1.1  augustss 	return (USBD_IN_PROGRESS);
   2254         1.1  augustss }
   2255         1.1  augustss 
   2256         1.1  augustss usbd_status
   2257       1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2258         1.1  augustss {
   2259   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2260        1.63  augustss 	usbd_status err;
   2261        1.16  augustss 
   2262        1.52  augustss 	/* Insert last in queue. */
   2263       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2264        1.63  augustss 	err = usb_insert_transfer(xfer);
   2265       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2266        1.63  augustss 	if (err)
   2267        1.63  augustss 		return (err);
   2268        1.52  augustss 
   2269       1.152  augustss 	/*
   2270        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2271        1.92  augustss 	 * so start it first.
   2272        1.67  augustss 	 */
   2273   1.264.4.7     skrll 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)));
   2274        1.16  augustss }
   2275        1.16  augustss 
   2276        1.16  augustss usbd_status
   2277       1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2278        1.16  augustss {
   2279   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2280   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2281   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2282        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2283        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2284         1.1  augustss 	uhci_soft_qh_t *sqh;
   2285        1.63  augustss 	usbd_status err;
   2286       1.187     skrll 	int isread, endpt;
   2287       1.248       mrg 	int i;
   2288         1.1  augustss 
   2289        1.82  augustss 	if (sc->sc_dying)
   2290        1.82  augustss 		return (USBD_IOERROR);
   2291        1.82  augustss 
   2292        1.63  augustss 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2293   1.264.4.7     skrll 		    xfer, xfer->ux_length, xfer->ux_flags));
   2294         1.1  augustss 
   2295        1.48  augustss #ifdef DIAGNOSTIC
   2296   1.264.4.7     skrll 	if (xfer->ux_rqflags & URQ_REQUEST)
   2297       1.163    provos 		panic("uhci_device_intr_transfer: a request");
   2298        1.48  augustss #endif
   2299         1.1  augustss 
   2300       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2301       1.248       mrg 
   2302   1.264.4.7     skrll 	endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2303       1.187     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2304       1.187     skrll 
   2305       1.187     skrll 	upipe->u.intr.isread = isread;
   2306       1.187     skrll 
   2307   1.264.4.7     skrll 	err = uhci_alloc_std_chain(upipe, sc, xfer->ux_length, isread,
   2308   1.264.4.7     skrll 				   xfer->ux_flags, &xfer->ux_dmabuf, &data,
   2309       1.187     skrll 				   &dataend);
   2310       1.248       mrg 	if (err) {
   2311       1.248       mrg 		mutex_exit(&sc->sc_lock);
   2312        1.63  augustss 		return (err);
   2313       1.248       mrg 	}
   2314       1.248       mrg 
   2315        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2316       1.223    bouyer 	usb_syncmem(&dataend->dma,
   2317       1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2318       1.223    bouyer 	    sizeof(dataend->td.td_status),
   2319       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2320         1.1  augustss 
   2321        1.59  augustss #ifdef UHCI_DEBUG
   2322         1.1  augustss 	if (uhcidebug > 10) {
   2323        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2324        1.55  augustss 		uhci_dump_tds(data);
   2325         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2326         1.1  augustss 	}
   2327         1.1  augustss #endif
   2328         1.1  augustss 
   2329         1.1  augustss 	/* Set up interrupt info. */
   2330        1.63  augustss 	ii->xfer = xfer;
   2331        1.55  augustss 	ii->stdstart = data;
   2332        1.55  augustss 	ii->stdend = dataend;
   2333         1.7  augustss #ifdef DIAGNOSTIC
   2334        1.70  augustss 	if (!ii->isdone) {
   2335        1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2336        1.70  augustss 	}
   2337         1.7  augustss 	ii->isdone = 0;
   2338         1.7  augustss #endif
   2339         1.1  augustss 
   2340       1.152  augustss 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2341        1.12  augustss 		     upipe->u.intr.qhs[0]));
   2342         1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2343         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2344        1.55  augustss 		sqh->elink = data;
   2345       1.121  augustss 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2346       1.223    bouyer 		usb_syncmem(&sqh->dma,
   2347       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2348       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2349       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2350         1.1  augustss 	}
   2351        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2352   1.264.4.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   2353       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2354         1.1  augustss 
   2355        1.59  augustss #ifdef UHCI_DEBUG
   2356         1.1  augustss 	if (uhcidebug > 10) {
   2357        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2358        1.55  augustss 		uhci_dump_tds(data);
   2359         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2360         1.1  augustss 	}
   2361         1.1  augustss #endif
   2362         1.1  augustss 
   2363         1.1  augustss 	return (USBD_IN_PROGRESS);
   2364         1.1  augustss }
   2365         1.1  augustss 
   2366         1.1  augustss /* Abort a device control request. */
   2367         1.1  augustss void
   2368       1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2369         1.1  augustss {
   2370       1.248       mrg #ifdef DIAGNOSTIC
   2371   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2372       1.248       mrg #endif
   2373       1.248       mrg 
   2374       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2375       1.248       mrg 
   2376        1.33  augustss 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2377        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2378         1.1  augustss }
   2379         1.1  augustss 
   2380         1.1  augustss /* Close a device control pipe. */
   2381         1.1  augustss void
   2382       1.205  christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2383         1.1  augustss {
   2384         1.1  augustss }
   2385         1.1  augustss 
   2386         1.1  augustss /* Abort a device interrupt request. */
   2387         1.1  augustss void
   2388       1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2389         1.1  augustss {
   2390       1.248       mrg #ifdef DIAGNOSTIC
   2391   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2392       1.248       mrg #endif
   2393       1.248       mrg 
   2394       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2395   1.264.4.7     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   2396       1.248       mrg 
   2397        1.63  augustss 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2398       1.264     skrll 
   2399        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2400         1.1  augustss }
   2401         1.1  augustss 
   2402         1.1  augustss /* Close a device interrupt pipe. */
   2403         1.1  augustss void
   2404       1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2405         1.1  augustss {
   2406         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2407   1.264.4.7     skrll 	uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   2408        1.92  augustss 	int i, npoll;
   2409       1.248       mrg 
   2410       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2411         1.1  augustss 
   2412         1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2413         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2414         1.1  augustss 	for (i = 0; i < npoll; i++)
   2415        1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2416         1.1  augustss 
   2417       1.152  augustss 	/*
   2418         1.1  augustss 	 * We now have to wait for any activity on the physical
   2419         1.1  augustss 	 * descriptors to stop.
   2420         1.1  augustss 	 */
   2421       1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   2422         1.1  augustss 
   2423         1.1  augustss 	for(i = 0; i < npoll; i++)
   2424         1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2425       1.248       mrg 	kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *));
   2426         1.1  augustss 
   2427         1.1  augustss 	/* XXX free other resources */
   2428         1.1  augustss }
   2429         1.1  augustss 
   2430         1.1  augustss usbd_status
   2431       1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2432         1.1  augustss {
   2433   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2434   1.264.4.7     skrll 	usb_device_request_t *req = &xfer->ux_request;
   2435   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2436   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2437   1.264.4.7     skrll 	int addr = dev->ud_addr;
   2438   1.264.4.7     skrll 	int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2439        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2440        1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2441         1.1  augustss 	uhci_soft_qh_t *sqh;
   2442         1.1  augustss 	int len;
   2443   1.264.4.1     skrll 	uint32_t ls;
   2444        1.63  augustss 	usbd_status err;
   2445         1.1  augustss 	int isread;
   2446       1.248       mrg 
   2447       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2448         1.1  augustss 
   2449        1.13  augustss 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2450        1.12  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2451         1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2452         1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   2453         1.1  augustss 		    addr, endpt));
   2454         1.1  augustss 
   2455   1.264.4.7     skrll 	ls = dev->ud_speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2456         1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2457         1.1  augustss 	len = UGETW(req->wLength);
   2458         1.1  augustss 
   2459         1.1  augustss 	setup = upipe->u.ctl.setup;
   2460         1.1  augustss 	stat = upipe->u.ctl.stat;
   2461         1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2462         1.1  augustss 
   2463         1.1  augustss 	/* Set up data transaction */
   2464         1.1  augustss 	if (len != 0) {
   2465        1.38  augustss 		upipe->nexttoggle = 1;
   2466   1.264.4.7     skrll 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->ux_flags,
   2467   1.264.4.7     skrll 					   &xfer->ux_dmabuf, &data, &dataend);
   2468        1.63  augustss 		if (err)
   2469        1.63  augustss 			return (err);
   2470        1.55  augustss 		next = data;
   2471        1.55  augustss 		dataend->link.std = stat;
   2472       1.258     skrll 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_TD);
   2473       1.223    bouyer 		usb_syncmem(&dataend->dma,
   2474       1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2475       1.223    bouyer 		    sizeof(dataend->td.td_link),
   2476       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2477         1.1  augustss 	} else {
   2478         1.1  augustss 		next = stat;
   2479         1.1  augustss 	}
   2480         1.1  augustss 	upipe->u.ctl.length = len;
   2481         1.1  augustss 
   2482       1.159  augustss 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2483       1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   2484         1.1  augustss 
   2485        1.42  augustss 	setup->link.std = next;
   2486       1.258     skrll 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_TD);
   2487        1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2488        1.88   tsutsui 		UHCI_TD_ACTIVE);
   2489        1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2490       1.160  augustss 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2491       1.223    bouyer 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2492       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2493        1.42  augustss 
   2494        1.92  augustss 	stat->link.std = NULL;
   2495        1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2496       1.152  augustss 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2497        1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2498       1.152  augustss 	stat->td.td_token =
   2499        1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2500   1.264.4.2     skrll 				 UHCI_TD_IN (0, endpt, addr, 1));
   2501        1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2502       1.223    bouyer 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2503       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2504         1.1  augustss 
   2505        1.59  augustss #ifdef UHCI_DEBUG
   2506        1.67  augustss 	if (uhcidebug > 10) {
   2507        1.47  augustss 		DPRINTF(("uhci_device_request: before transfer\n"));
   2508        1.41  augustss 		uhci_dump_tds(setup);
   2509         1.1  augustss 	}
   2510         1.1  augustss #endif
   2511         1.1  augustss 
   2512         1.1  augustss 	/* Set up interrupt info. */
   2513        1.63  augustss 	ii->xfer = xfer;
   2514         1.1  augustss 	ii->stdstart = setup;
   2515         1.1  augustss 	ii->stdend = stat;
   2516         1.7  augustss #ifdef DIAGNOSTIC
   2517        1.70  augustss 	if (!ii->isdone) {
   2518        1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2519        1.70  augustss 	}
   2520         1.7  augustss 	ii->isdone = 0;
   2521         1.7  augustss #endif
   2522         1.1  augustss 
   2523        1.42  augustss 	sqh->elink = setup;
   2524       1.121  augustss 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2525       1.223    bouyer 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2526         1.1  augustss 
   2527   1.264.4.7     skrll 	if (dev->ud_speed == USB_SPEED_LOW)
   2528       1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2529       1.123  augustss 	else
   2530       1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2531        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2532        1.59  augustss #ifdef UHCI_DEBUG
   2533         1.1  augustss 	if (uhcidebug > 12) {
   2534         1.1  augustss 		uhci_soft_td_t *std;
   2535         1.1  augustss 		uhci_soft_qh_t *xqh;
   2536        1.13  augustss 		uhci_soft_qh_t *sxqh;
   2537        1.13  augustss 		int maxqh = 0;
   2538         1.1  augustss 		uhci_physaddr_t link;
   2539        1.47  augustss 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2540         1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2541       1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2542        1.42  augustss 		     std = std->link.std) {
   2543        1.88   tsutsui 			link = le32toh(std->td.td_link);
   2544         1.1  augustss 			uhci_dump_td(std);
   2545         1.1  augustss 		}
   2546        1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2547        1.67  augustss 		uhci_dump_qh(sxqh);
   2548        1.67  augustss 		for (xqh = sxqh;
   2549        1.63  augustss 		     xqh != NULL;
   2550       1.152  augustss 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2551   1.264.4.2     skrll 			xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2552         1.1  augustss 			uhci_dump_qh(xqh);
   2553        1.13  augustss 		}
   2554        1.47  augustss 		DPRINTF(("Enqueued QH:\n"));
   2555         1.1  augustss 		uhci_dump_qh(sqh);
   2556        1.42  augustss 		uhci_dump_tds(sqh->elink);
   2557         1.1  augustss 	}
   2558         1.1  augustss #endif
   2559   1.264.4.7     skrll 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   2560   1.264.4.7     skrll 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   2561        1.91  augustss 			    uhci_timeout, ii);
   2562        1.13  augustss 	}
   2563   1.264.4.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   2564         1.1  augustss 
   2565         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2566         1.1  augustss }
   2567         1.1  augustss 
   2568        1.16  augustss usbd_status
   2569       1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2570        1.16  augustss {
   2571   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2572        1.63  augustss 	usbd_status err;
   2573        1.48  augustss 
   2574        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2575        1.48  augustss 
   2576        1.48  augustss 	/* Put it on our queue, */
   2577       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2578        1.63  augustss 	err = usb_insert_transfer(xfer);
   2579       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2580        1.48  augustss 
   2581        1.48  augustss 	/* bail out on error, */
   2582        1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2583        1.63  augustss 		return (err);
   2584        1.48  augustss 
   2585        1.48  augustss 	/* XXX should check inuse here */
   2586        1.48  augustss 
   2587        1.48  augustss 	/* insert into schedule, */
   2588        1.63  augustss 	uhci_device_isoc_enter(xfer);
   2589        1.48  augustss 
   2590       1.102  augustss 	/* and start if the pipe wasn't running */
   2591        1.67  augustss 	if (!err)
   2592   1.264.4.7     skrll 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2593        1.48  augustss 
   2594        1.63  augustss 	return (err);
   2595        1.48  augustss }
   2596        1.48  augustss 
   2597        1.48  augustss void
   2598       1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2599        1.48  augustss {
   2600   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2601   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2602   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2603        1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2604       1.152  augustss 	uhci_soft_td_t *std;
   2605   1.264.4.1     skrll 	uint32_t buf, len, status, offs;
   2606       1.248       mrg 	int i, next, nframes;
   2607   1.264.4.7     skrll 	int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN;
   2608        1.48  augustss 
   2609        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2610        1.48  augustss 		    "nframes=%d\n",
   2611   1.264.4.7     skrll 		    iso->inuse, iso->next, xfer, xfer->ux_nframes));
   2612        1.48  augustss 
   2613        1.82  augustss 	if (sc->sc_dying)
   2614        1.82  augustss 		return;
   2615        1.82  augustss 
   2616   1.264.4.7     skrll 	if (xfer->ux_status == USBD_IN_PROGRESS) {
   2617        1.48  augustss 		/* This request has already been entered into the frame list */
   2618        1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2619        1.68  augustss 		/* XXX */
   2620        1.48  augustss 	}
   2621        1.48  augustss 
   2622        1.48  augustss #ifdef DIAGNOSTIC
   2623        1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2624        1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   2625        1.19  augustss #endif
   2626        1.16  augustss 
   2627        1.48  augustss 	next = iso->next;
   2628        1.48  augustss 	if (next == -1) {
   2629        1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   2630        1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2631        1.48  augustss 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2632        1.48  augustss 	}
   2633        1.48  augustss 
   2634   1.264.4.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   2635        1.92  augustss 	UXFER(xfer)->curframe = next;
   2636        1.48  augustss 
   2637   1.264.4.7     skrll 	buf = DMAADDR(&xfer->ux_dmabuf, 0);
   2638       1.223    bouyer 	offs = 0;
   2639        1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2640        1.88   tsutsui 				     UHCI_TD_ACTIVE |
   2641        1.88   tsutsui 				     UHCI_TD_IOS);
   2642   1.264.4.7     skrll 	nframes = xfer->ux_nframes;
   2643       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2644        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2645        1.48  augustss 		std = iso->stds[next];
   2646        1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2647        1.48  augustss 			next = 0;
   2648   1.264.4.7     skrll 		len = xfer->ux_frlengths[i];
   2649        1.88   tsutsui 		std->td.td_buffer = htole32(buf);
   2650   1.264.4.7     skrll 		usb_syncmem(&xfer->ux_dmabuf, offs, len,
   2651       1.223    bouyer 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2652        1.48  augustss 		if (i == nframes - 1)
   2653        1.88   tsutsui 			status |= UHCI_TD_IOC;
   2654        1.88   tsutsui 		std->td.td_status = htole32(status);
   2655        1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2656        1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2657       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2658       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2659        1.59  augustss #ifdef UHCI_DEBUG
   2660        1.48  augustss 		if (uhcidebug > 5) {
   2661        1.48  augustss 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2662        1.48  augustss 			uhci_dump_td(std);
   2663        1.48  augustss 		}
   2664        1.48  augustss #endif
   2665        1.48  augustss 		buf += len;
   2666       1.223    bouyer 		offs += len;
   2667        1.48  augustss 	}
   2668        1.48  augustss 	iso->next = next;
   2669   1.264.4.7     skrll 	iso->inuse += xfer->ux_nframes;
   2670        1.16  augustss 
   2671       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2672        1.16  augustss }
   2673        1.16  augustss 
   2674        1.16  augustss usbd_status
   2675       1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   2676        1.16  augustss {
   2677   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2678   1.264.4.7     skrll 	uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv;
   2679        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2680        1.48  augustss 	uhci_soft_td_t *end;
   2681       1.248       mrg 	int i;
   2682        1.48  augustss 
   2683        1.96  augustss 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2684        1.96  augustss 
   2685       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2686       1.248       mrg 
   2687       1.248       mrg 	if (sc->sc_dying) {
   2688       1.248       mrg 		mutex_exit(&sc->sc_lock);
   2689        1.82  augustss 		return (USBD_IOERROR);
   2690       1.248       mrg 	}
   2691        1.82  augustss 
   2692        1.48  augustss #ifdef DIAGNOSTIC
   2693   1.264.4.7     skrll 	if (xfer->ux_status != USBD_IN_PROGRESS)
   2694        1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2695        1.48  augustss #endif
   2696        1.48  augustss 
   2697        1.48  augustss 	/* Find the last TD */
   2698   1.264.4.7     skrll 	i = UXFER(xfer)->curframe + xfer->ux_nframes;
   2699        1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   2700        1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   2701        1.48  augustss 	end = upipe->u.iso.stds[i];
   2702        1.48  augustss 
   2703        1.96  augustss #ifdef DIAGNOSTIC
   2704        1.96  augustss 	if (end == NULL) {
   2705        1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   2706        1.96  augustss 		return (USBD_INVAL);
   2707        1.96  augustss 	}
   2708        1.96  augustss #endif
   2709        1.96  augustss 
   2710        1.48  augustss 	/* Set up interrupt info. */
   2711        1.63  augustss 	ii->xfer = xfer;
   2712        1.48  augustss 	ii->stdstart = end;
   2713        1.48  augustss 	ii->stdend = end;
   2714        1.48  augustss #ifdef DIAGNOSTIC
   2715       1.102  augustss 	if (!ii->isdone)
   2716        1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2717        1.48  augustss 	ii->isdone = 0;
   2718        1.48  augustss #endif
   2719        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2720       1.152  augustss 
   2721       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2722        1.48  augustss 
   2723        1.48  augustss 	return (USBD_IN_PROGRESS);
   2724        1.16  augustss }
   2725        1.16  augustss 
   2726        1.16  augustss void
   2727       1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2728        1.16  augustss {
   2729       1.248       mrg #ifdef DIAGNOSTIC
   2730   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2731       1.248       mrg #endif
   2732   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2733        1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2734        1.48  augustss 	uhci_soft_td_t *std;
   2735       1.248       mrg 	int i, n, nframes, maxlen, len;
   2736        1.92  augustss 
   2737       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2738        1.92  augustss 
   2739        1.92  augustss 	/* Transfer is already done. */
   2740   1.264.4.7     skrll 	if (xfer->ux_status != USBD_NOT_STARTED &&
   2741   1.264.4.7     skrll 	    xfer->ux_status != USBD_IN_PROGRESS) {
   2742        1.92  augustss 		return;
   2743        1.92  augustss 	}
   2744        1.48  augustss 
   2745        1.92  augustss 	/* Give xfer the requested abort code. */
   2746   1.264.4.7     skrll 	xfer->ux_status = USBD_CANCELLED;
   2747        1.48  augustss 
   2748        1.48  augustss 	/* make hardware ignore it, */
   2749   1.264.4.7     skrll 	nframes = xfer->ux_nframes;
   2750        1.92  augustss 	n = UXFER(xfer)->curframe;
   2751        1.92  augustss 	maxlen = 0;
   2752        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2753        1.48  augustss 		std = stds[n];
   2754       1.223    bouyer 		usb_syncmem(&std->dma,
   2755       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2756       1.223    bouyer 		    sizeof(std->td.td_status),
   2757       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2758        1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2759       1.223    bouyer 		usb_syncmem(&std->dma,
   2760       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2761       1.223    bouyer 		    sizeof(std->td.td_status),
   2762       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2763       1.223    bouyer 		usb_syncmem(&std->dma,
   2764       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_token),
   2765       1.223    bouyer 		    sizeof(std->td.td_token),
   2766       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2767       1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2768        1.92  augustss 		if (len > maxlen)
   2769        1.92  augustss 			maxlen = len;
   2770        1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2771        1.48  augustss 			n = 0;
   2772        1.48  augustss 	}
   2773        1.48  augustss 
   2774        1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   2775        1.92  augustss 	delay(maxlen);
   2776        1.92  augustss 
   2777        1.96  augustss #ifdef DIAGNOSTIC
   2778        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   2779        1.96  augustss #endif
   2780        1.92  augustss 	/* Run callback and remove from interrupt list. */
   2781        1.92  augustss 	usb_transfer_complete(xfer);
   2782        1.48  augustss 
   2783       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2784        1.16  augustss }
   2785        1.16  augustss 
   2786        1.16  augustss void
   2787       1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   2788        1.16  augustss {
   2789        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2790   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2791   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2792        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2793        1.16  augustss 	struct iso *iso;
   2794       1.248       mrg 	int i;
   2795       1.248       mrg 
   2796       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2797        1.16  augustss 
   2798        1.16  augustss 	/*
   2799        1.16  augustss 	 * Make sure all TDs are marked as inactive.
   2800        1.16  augustss 	 * Wait for completion.
   2801        1.16  augustss 	 * Unschedule.
   2802        1.16  augustss 	 * Deallocate.
   2803        1.16  augustss 	 */
   2804        1.16  augustss 	iso = &upipe->u.iso;
   2805        1.16  augustss 
   2806       1.223    bouyer 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2807       1.223    bouyer 		std = iso->stds[i];
   2808       1.223    bouyer 		usb_syncmem(&std->dma,
   2809       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2810       1.223    bouyer 		    sizeof(std->td.td_status),
   2811       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2812       1.223    bouyer 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2813       1.223    bouyer 		usb_syncmem(&std->dma,
   2814       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2815       1.223    bouyer 		    sizeof(std->td.td_status),
   2816       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2817       1.223    bouyer 	}
   2818       1.248       mrg 	/* wait for completion */
   2819       1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   2820        1.16  augustss 
   2821        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2822        1.16  augustss 		std = iso->stds[i];
   2823        1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   2824        1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   2825        1.42  augustss 		     vstd = vstd->link.std)
   2826        1.16  augustss 			;
   2827        1.67  augustss 		if (vstd == NULL) {
   2828        1.16  augustss 			/*panic*/
   2829        1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   2830       1.248       mrg 			mutex_exit(&sc->sc_lock);
   2831        1.16  augustss 			return;
   2832        1.16  augustss 		}
   2833        1.42  augustss 		vstd->link = std->link;
   2834       1.223    bouyer 		usb_syncmem(&std->dma,
   2835       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2836       1.223    bouyer 		    sizeof(std->td.td_link),
   2837       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2838        1.42  augustss 		vstd->td.td_link = std->td.td_link;
   2839       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2840       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2841       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2842       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2843        1.16  augustss 		uhci_free_std(sc, std);
   2844        1.16  augustss 	}
   2845        1.16  augustss 
   2846       1.248       mrg 	kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *));
   2847        1.16  augustss }
   2848        1.16  augustss 
   2849        1.16  augustss usbd_status
   2850       1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   2851        1.16  augustss {
   2852        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2853   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2854   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2855   1.264.4.7     skrll 	int addr = upipe->pipe.up_dev->ud_addr;
   2856   1.264.4.7     skrll 	int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2857        1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2858        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2859   1.264.4.1     skrll 	uint32_t token;
   2860        1.16  augustss 	struct iso *iso;
   2861       1.248       mrg 	int i;
   2862        1.16  augustss 
   2863        1.16  augustss 	iso = &upipe->u.iso;
   2864       1.248       mrg 	iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT *
   2865       1.248       mrg 				 sizeof (uhci_soft_td_t *),
   2866       1.248       mrg 			       KM_SLEEP);
   2867       1.248       mrg 	if (iso->stds == NULL)
   2868       1.248       mrg 		return USBD_NOMEM;
   2869        1.16  augustss 
   2870        1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2871        1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2872        1.16  augustss 
   2873       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2874       1.248       mrg 
   2875        1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   2876        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2877        1.48  augustss 		std = uhci_alloc_std(sc);
   2878        1.48  augustss 		if (std == 0)
   2879        1.48  augustss 			goto bad;
   2880        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2881        1.88   tsutsui 		std->td.td_token = htole32(token);
   2882       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2883       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2884        1.48  augustss 		iso->stds[i] = std;
   2885        1.16  augustss 	}
   2886        1.16  augustss 
   2887        1.48  augustss 	/* Insert TDs into schedule. */
   2888        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2889        1.16  augustss 		std = iso->stds[i];
   2890        1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   2891       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2892       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2893       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2894       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2895        1.42  augustss 		std->link = vstd->link;
   2896        1.42  augustss 		std->td.td_link = vstd->td.td_link;
   2897       1.223    bouyer 		usb_syncmem(&std->dma,
   2898       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2899       1.223    bouyer 		    sizeof(std->td.td_link),
   2900       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2901        1.42  augustss 		vstd->link.std = std;
   2902       1.121  augustss 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2903       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2904       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2905       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2906       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2907        1.16  augustss 	}
   2908       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2909        1.16  augustss 
   2910        1.48  augustss 	iso->next = -1;
   2911        1.48  augustss 	iso->inuse = 0;
   2912        1.48  augustss 
   2913        1.16  augustss 	return (USBD_NORMAL_COMPLETION);
   2914        1.16  augustss 
   2915        1.48  augustss  bad:
   2916        1.16  augustss 	while (--i >= 0)
   2917        1.16  augustss 		uhci_free_std(sc, iso->stds[i]);
   2918       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2919       1.248       mrg 	kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *));
   2920        1.16  augustss 	return (USBD_NOMEM);
   2921        1.16  augustss }
   2922        1.16  augustss 
   2923        1.16  augustss void
   2924       1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   2925        1.16  augustss {
   2926        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2927   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2928       1.223    bouyer 	int i, offs;
   2929   1.264.4.7     skrll 	int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN;
   2930       1.223    bouyer 
   2931        1.48  augustss 
   2932   1.264.4.7     skrll 	DPRINTFN(4, ("uhci_isoc_done: length=%d, ux_state=0x%08x\n",
   2933   1.264.4.7     skrll 			xfer->ux_actlen, xfer->ux_state));
   2934        1.93  augustss 
   2935        1.96  augustss 	if (ii->xfer != xfer)
   2936        1.96  augustss 		/* Not on interrupt list, ignore it. */
   2937       1.170  augustss 		return;
   2938       1.170  augustss 
   2939       1.170  augustss 	if (!uhci_active_intr_info(ii))
   2940        1.96  augustss 		return;
   2941        1.96  augustss 
   2942        1.93  augustss #ifdef DIAGNOSTIC
   2943   1.264.4.2     skrll 	if (ii->stdend == NULL) {
   2944   1.264.4.2     skrll 		printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2945        1.93  augustss #ifdef UHCI_DEBUG
   2946        1.93  augustss 		uhci_dump_ii(ii);
   2947        1.93  augustss #endif
   2948        1.93  augustss 		return;
   2949        1.93  augustss 	}
   2950        1.93  augustss #endif
   2951        1.48  augustss 
   2952        1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   2953       1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2954       1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2955       1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2956       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2957        1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2958       1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2959       1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2960       1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2961       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2962        1.48  augustss 
   2963        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2964       1.223    bouyer 
   2965       1.223    bouyer 	offs = 0;
   2966   1.264.4.7     skrll 	for (i = 0; i < xfer->ux_nframes; i++) {
   2967   1.264.4.7     skrll 		usb_syncmem(&xfer->ux_dmabuf, offs, xfer->ux_frlengths[i],
   2968       1.223    bouyer 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2969   1.264.4.7     skrll 		offs += xfer->ux_frlengths[i];
   2970       1.223    bouyer 	}
   2971        1.16  augustss }
   2972        1.16  augustss 
   2973         1.1  augustss void
   2974       1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   2975         1.1  augustss {
   2976        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2977         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2978   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2979         1.1  augustss 	uhci_soft_qh_t *sqh;
   2980       1.223    bouyer 	int i, npoll, isread;
   2981         1.1  augustss 
   2982   1.264.4.7     skrll 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->ux_actlen));
   2983         1.1  augustss 
   2984   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   2985       1.248       mrg 
   2986         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2987         1.1  augustss 	for(i = 0; i < npoll; i++) {
   2988         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2989       1.121  augustss 		sqh->elink = NULL;
   2990        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2991       1.223    bouyer 		usb_syncmem(&sqh->dma,
   2992       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2993       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2994       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2995         1.1  augustss 	}
   2996       1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2997         1.1  augustss 
   2998   1.264.4.7     skrll 	isread = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN;
   2999   1.264.4.7     skrll 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   3000       1.223    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3001       1.223    bouyer 
   3002         1.1  augustss 	/* XXX Wasteful. */
   3003   1.264.4.7     skrll 	if (xfer->ux_pipe->up_repeat) {
   3004        1.55  augustss 		uhci_soft_td_t *data, *dataend;
   3005         1.1  augustss 
   3006        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   3007        1.92  augustss 
   3008         1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   3009   1.264.4.7     skrll 		uhci_alloc_std_chain(upipe, sc, xfer->ux_length,
   3010   1.264.4.7     skrll 				     upipe->u.intr.isread, xfer->ux_flags,
   3011   1.264.4.7     skrll 				     &xfer->ux_dmabuf, &data, &dataend);
   3012        1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   3013       1.223    bouyer 		usb_syncmem(&dataend->dma,
   3014       1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_status),
   3015       1.223    bouyer 		    sizeof(dataend->td.td_status),
   3016       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3017         1.1  augustss 
   3018        1.59  augustss #ifdef UHCI_DEBUG
   3019         1.1  augustss 		if (uhcidebug > 10) {
   3020        1.55  augustss 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   3021        1.55  augustss 			uhci_dump_tds(data);
   3022         1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   3023         1.1  augustss 		}
   3024         1.1  augustss #endif
   3025         1.1  augustss 
   3026        1.55  augustss 		ii->stdstart = data;
   3027        1.55  augustss 		ii->stdend = dataend;
   3028         1.7  augustss #ifdef DIAGNOSTIC
   3029        1.70  augustss 		if (!ii->isdone) {
   3030        1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   3031        1.70  augustss 		}
   3032         1.7  augustss 		ii->isdone = 0;
   3033         1.7  augustss #endif
   3034         1.1  augustss 		for (i = 0; i < npoll; i++) {
   3035         1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   3036        1.55  augustss 			sqh->elink = data;
   3037       1.121  augustss 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   3038       1.223    bouyer 			usb_syncmem(&sqh->dma,
   3039       1.223    bouyer 			    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3040       1.223    bouyer 			    sizeof(sqh->qh.qh_elink),
   3041       1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3042         1.1  augustss 		}
   3043   1.264.4.7     skrll 		xfer->ux_status = USBD_IN_PROGRESS;
   3044        1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   3045         1.1  augustss 	} else {
   3046        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   3047       1.169  augustss 		if (uhci_active_intr_info(ii))
   3048       1.169  augustss 			uhci_del_intr_info(ii);
   3049         1.1  augustss 	}
   3050         1.1  augustss }
   3051         1.1  augustss 
   3052         1.1  augustss /* Deallocate request data structures */
   3053         1.1  augustss void
   3054       1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   3055         1.1  augustss {
   3056        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3057         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3058   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   3059   1.264.4.7     skrll 	int len = UGETW(xfer->ux_request.wLength);
   3060   1.264.4.7     skrll 	int isread = (xfer->ux_request.bmRequestType & UT_READ);
   3061         1.1  augustss 
   3062   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   3063       1.248       mrg 
   3064         1.7  augustss #ifdef DIAGNOSTIC
   3065   1.264.4.7     skrll 	if (!(xfer->ux_rqflags & URQ_REQUEST))
   3066       1.173      gson 		panic("uhci_device_ctrl_done: not a request");
   3067         1.7  augustss #endif
   3068         1.1  augustss 
   3069       1.169  augustss 	if (!uhci_active_intr_info(ii))
   3070       1.169  augustss 		return;
   3071       1.169  augustss 
   3072        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3073         1.1  augustss 
   3074   1.264.4.7     skrll 	if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW)
   3075       1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   3076       1.123  augustss 	else
   3077       1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   3078         1.1  augustss 
   3079        1.49  augustss 	if (upipe->u.ctl.length != 0)
   3080        1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   3081        1.49  augustss 
   3082       1.223    bouyer 	if (len) {
   3083   1.264.4.7     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   3084       1.223    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3085       1.223    bouyer 	}
   3086       1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0,
   3087       1.223    bouyer 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3088       1.223    bouyer 
   3089   1.264.4.7     skrll 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->ux_actlen));
   3090         1.1  augustss }
   3091         1.1  augustss 
   3092         1.1  augustss /* Deallocate request data structures */
   3093         1.1  augustss void
   3094       1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   3095         1.1  augustss {
   3096        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3097         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3098   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   3099       1.169  augustss 
   3100       1.173      gson 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
   3101       1.169  augustss 		    xfer, ii, sc, upipe));
   3102       1.169  augustss 
   3103       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3104       1.248       mrg 
   3105       1.169  augustss 	if (!uhci_active_intr_info(ii))
   3106       1.169  augustss 		return;
   3107         1.1  augustss 
   3108        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3109         1.1  augustss 
   3110         1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   3111        1.32  augustss 
   3112       1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3113        1.32  augustss 
   3114   1.264.4.7     skrll 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->ux_actlen));
   3115         1.1  augustss }
   3116         1.1  augustss 
   3117         1.1  augustss /* Add interrupt QH, called with vflock. */
   3118         1.1  augustss void
   3119       1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3120         1.1  augustss {
   3121        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3122        1.42  augustss 	uhci_soft_qh_t *eqh;
   3123         1.1  augustss 
   3124        1.92  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3125        1.92  augustss 
   3126        1.42  augustss 	eqh = vf->eqh;
   3127       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3128       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3129       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   3130        1.42  augustss 	sqh->hlink       = eqh->hlink;
   3131        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3132       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3133       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3134       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3135        1.42  augustss 	eqh->hlink       = sqh;
   3136       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3137       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3138       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3139       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3140         1.1  augustss 	vf->eqh = sqh;
   3141         1.1  augustss 	vf->bandwidth++;
   3142         1.1  augustss }
   3143         1.1  augustss 
   3144       1.119  augustss /* Remove interrupt QH. */
   3145         1.1  augustss void
   3146       1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3147         1.1  augustss {
   3148        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3149         1.1  augustss 	uhci_soft_qh_t *pqh;
   3150         1.1  augustss 
   3151        1.92  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3152         1.1  augustss 
   3153       1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   3154       1.223    bouyer 
   3155       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3156       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   3157       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3158       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3159       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3160       1.223    bouyer 		usb_syncmem(&sqh->dma,
   3161       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3162       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3163       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3164       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   3165       1.124  augustss 	}
   3166       1.124  augustss 
   3167        1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3168       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3169       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3170       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3171        1.42  augustss 	pqh->hlink       = sqh->hlink;
   3172        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3173       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3174       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   3175       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3176       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   3177         1.1  augustss 	if (vf->eqh == sqh)
   3178         1.1  augustss 		vf->eqh = pqh;
   3179         1.1  augustss 	vf->bandwidth--;
   3180         1.1  augustss }
   3181         1.1  augustss 
   3182         1.1  augustss usbd_status
   3183       1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3184         1.1  augustss {
   3185         1.1  augustss 	uhci_soft_qh_t *sqh;
   3186       1.248       mrg 	int i, npoll;
   3187         1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   3188         1.1  augustss 
   3189       1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
   3190         1.1  augustss 	if (ival == 0) {
   3191       1.173      gson 		printf("uhci_device_setintr: 0 interval\n");
   3192         1.1  augustss 		return (USBD_INVAL);
   3193         1.1  augustss 	}
   3194         1.1  augustss 
   3195         1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   3196         1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   3197         1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3198       1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
   3199         1.1  augustss 
   3200         1.1  augustss 	upipe->u.intr.npoll = npoll;
   3201       1.152  augustss 	upipe->u.intr.qhs =
   3202       1.248       mrg 		kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP);
   3203       1.248       mrg 	if (upipe->u.intr.qhs == NULL)
   3204       1.248       mrg 		return USBD_NOMEM;
   3205         1.1  augustss 
   3206       1.152  augustss 	/*
   3207         1.1  augustss 	 * Figure out which offset in the schedule that has most
   3208         1.1  augustss 	 * bandwidth left over.
   3209         1.1  augustss 	 */
   3210         1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3211         1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3212         1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   3213         1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3214         1.1  augustss 		if (bw < bestbw) {
   3215         1.1  augustss 			bestbw = bw;
   3216         1.1  augustss 			bestoffs = offs;
   3217         1.1  augustss 		}
   3218         1.1  augustss 	}
   3219       1.173      gson 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   3220         1.1  augustss 
   3221       1.248       mrg 	mutex_enter(&sc->sc_lock);
   3222         1.1  augustss 	for(i = 0; i < npoll; i++) {
   3223         1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3224       1.121  augustss 		sqh->elink = NULL;
   3225        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3226       1.223    bouyer 		usb_syncmem(&sqh->dma,
   3227       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3228       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3229       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3230         1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   3231         1.1  augustss 	}
   3232         1.1  augustss #undef MOD
   3233         1.1  augustss 
   3234         1.1  augustss 	/* Enter QHs into the controller data structures. */
   3235         1.1  augustss 	for(i = 0; i < npoll; i++)
   3236        1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   3237       1.248       mrg 	mutex_exit(&sc->sc_lock);
   3238         1.1  augustss 
   3239       1.173      gson 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
   3240         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3241         1.1  augustss }
   3242         1.1  augustss 
   3243         1.1  augustss /* Open a new pipe. */
   3244         1.1  augustss usbd_status
   3245       1.119  augustss uhci_open(usbd_pipe_handle pipe)
   3246         1.1  augustss {
   3247   1.264.4.7     skrll 	uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   3248         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3249   1.264.4.7     skrll 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
   3250       1.248       mrg 	usbd_status err = USBD_NOMEM;
   3251        1.79  augustss 	int ival;
   3252         1.1  augustss 
   3253         1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   3254   1.264.4.7     skrll 		     pipe, pipe->up_dev->ud_addr,
   3255         1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   3256        1.92  augustss 
   3257       1.248       mrg 	if (sc->sc_dying)
   3258       1.248       mrg 		return USBD_IOERROR;
   3259       1.248       mrg 
   3260        1.92  augustss 	upipe->aborting = 0;
   3261       1.236  drochner 	/* toggle state needed for bulk endpoints */
   3262   1.264.4.7     skrll 	upipe->nexttoggle = pipe->up_endpoint->ue_toggle;
   3263        1.92  augustss 
   3264   1.264.4.7     skrll 	if (pipe->up_dev->ud_addr == sc->sc_addr) {
   3265         1.1  augustss 		switch (ed->bEndpointAddress) {
   3266         1.1  augustss 		case USB_CONTROL_ENDPOINT:
   3267   1.264.4.7     skrll 			pipe->up_methods = &uhci_root_ctrl_methods;
   3268         1.1  augustss 			break;
   3269        1.45  augustss 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   3270   1.264.4.7     skrll 			pipe->up_methods = &uhci_root_intr_methods;
   3271         1.1  augustss 			break;
   3272         1.1  augustss 		default:
   3273         1.1  augustss 			return (USBD_INVAL);
   3274         1.1  augustss 		}
   3275         1.1  augustss 	} else {
   3276         1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3277         1.1  augustss 		case UE_CONTROL:
   3278   1.264.4.7     skrll 			pipe->up_methods = &uhci_device_ctrl_methods;
   3279         1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   3280        1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   3281         1.5  augustss 				goto bad;
   3282         1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   3283        1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   3284         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3285         1.5  augustss 				goto bad;
   3286         1.5  augustss 			}
   3287         1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   3288        1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   3289         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3290         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3291         1.5  augustss 				goto bad;
   3292         1.5  augustss 			}
   3293       1.152  augustss 			err = usb_allocmem(&sc->sc_bus,
   3294       1.152  augustss 				  sizeof(usb_device_request_t),
   3295        1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   3296        1.63  augustss 			if (err) {
   3297         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3298         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3299         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   3300         1.5  augustss 				goto bad;
   3301         1.5  augustss 			}
   3302         1.1  augustss 			break;
   3303         1.1  augustss 		case UE_INTERRUPT:
   3304   1.264.4.7     skrll 			pipe->up_methods = &uhci_device_intr_methods;
   3305   1.264.4.7     skrll 			ival = pipe->up_interval;
   3306        1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   3307        1.79  augustss 				ival = ed->bInterval;
   3308        1.80  augustss 			return (uhci_device_setintr(sc, upipe, ival));
   3309         1.1  augustss 		case UE_ISOCHRONOUS:
   3310   1.264.4.7     skrll 			pipe->up_methods = &uhci_device_isoc_methods;
   3311        1.48  augustss 			return (uhci_setup_isoc(pipe));
   3312         1.1  augustss 		case UE_BULK:
   3313   1.264.4.7     skrll 			pipe->up_methods = &uhci_device_bulk_methods;
   3314         1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   3315        1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   3316         1.5  augustss 				goto bad;
   3317         1.1  augustss 			break;
   3318         1.1  augustss 		}
   3319         1.1  augustss 	}
   3320         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3321         1.5  augustss 
   3322         1.5  augustss  bad:
   3323       1.248       mrg 	return USBD_NOMEM;
   3324         1.1  augustss }
   3325         1.1  augustss 
   3326         1.1  augustss /*
   3327         1.1  augustss  * Data structures and routines to emulate the root hub.
   3328         1.1  augustss  */
   3329         1.1  augustss usb_device_descriptor_t uhci_devd = {
   3330   1.264.4.8     skrll 	.bLength = USB_DEVICE_DESCRIPTOR_SIZE,
   3331   1.264.4.8     skrll 	.bDescriptorType = UDESC_DEVICE,
   3332   1.264.4.8     skrll 	.bcdUSB = {0x00, 0x01},
   3333   1.264.4.8     skrll 	.bDeviceClass = UDCLASS_HUB,
   3334   1.264.4.8     skrll 	.bDeviceSubClass = UDSUBCLASS_HUB,
   3335   1.264.4.8     skrll 	.bDeviceProtocol = UDPROTO_FSHUB,
   3336   1.264.4.8     skrll 	.bMaxPacketSize = 64,
   3337   1.264.4.8     skrll 	.idVendor = {0},
   3338   1.264.4.8     skrll 	.idProduct = {0},
   3339   1.264.4.8     skrll 	.bcdDevice = {0x00,0x01},
   3340   1.264.4.8     skrll 	.iManufacturer = 1,
   3341   1.264.4.8     skrll 	.iProduct = 2,
   3342   1.264.4.8     skrll 	.iSerialNumber = 0,
   3343   1.264.4.8     skrll 	.bNumConfigurations = 1
   3344         1.1  augustss };
   3345         1.1  augustss 
   3346       1.208  drochner const usb_config_descriptor_t uhci_confd = {
   3347   1.264.4.9     skrll 	.bLength = USB_CONFIG_DESCRIPTOR_SIZE,
   3348   1.264.4.9     skrll 	.bDescriptorType = UDESC_CONFIG,
   3349  1.264.4.10     skrll 	.wTotalLength = USETWD(
   3350  1.264.4.10     skrll 	    USB_CONFIG_DESCRIPTOR_SIZE +
   3351  1.264.4.10     skrll 	    USB_INTERFACE_DESCRIPTOR_SIZE +
   3352  1.264.4.10     skrll 	    USB_ENDPOINT_DESCRIPTOR_SIZE),
   3353   1.264.4.9     skrll 	.bNumInterface = 1,
   3354   1.264.4.9     skrll 	.bConfigurationValue = 1,
   3355   1.264.4.9     skrll 	.iConfiguration = 0,
   3356   1.264.4.9     skrll 	.bmAttributes = UC_ATTR_MBO | UC_SELF_POWERED,
   3357   1.264.4.9     skrll 	.bMaxPower = 0
   3358         1.1  augustss };
   3359         1.1  augustss 
   3360       1.208  drochner const usb_interface_descriptor_t uhci_ifcd = {
   3361   1.264.4.9     skrll 	.bLength = USB_INTERFACE_DESCRIPTOR_SIZE,
   3362   1.264.4.9     skrll 	.bDescriptorType = UDESC_INTERFACE,
   3363   1.264.4.9     skrll 	.bInterfaceNumber = 0,
   3364   1.264.4.9     skrll 	.bAlternateSetting = 0,
   3365   1.264.4.9     skrll 	.bNumEndpoints = 1,
   3366   1.264.4.9     skrll 	.bInterfaceClass = UICLASS_HUB,
   3367   1.264.4.9     skrll 	.bInterfaceSubClass = UISUBCLASS_HUB,
   3368   1.264.4.9     skrll 	.bInterfaceProtocol = UIPROTO_FSHUB,
   3369   1.264.4.9     skrll 	.iInterface = 0
   3370         1.1  augustss };
   3371         1.1  augustss 
   3372       1.208  drochner const usb_endpoint_descriptor_t uhci_endpd = {
   3373   1.264.4.9     skrll 	.bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
   3374   1.264.4.9     skrll 	.bDescriptorType = UDESC_ENDPOINT,
   3375   1.264.4.9     skrll 	.bEndpointAddress = UE_DIR_IN | UHCI_INTR_ENDPT,
   3376   1.264.4.9     skrll 	.bmAttributes = UE_INTERRUPT,
   3377  1.264.4.10     skrll 	.wMaxPacketSize = USETWD(8),
   3378   1.264.4.9     skrll 	.bInterval = 255
   3379         1.1  augustss };
   3380         1.1  augustss 
   3381       1.208  drochner const usb_hub_descriptor_t uhci_hubd_piix = {
   3382   1.264.4.9     skrll 	.bDescLength = USB_HUB_DESCRIPTOR_SIZE,
   3383   1.264.4.9     skrll 	.bDescriptorType = UDESC_HUB,
   3384   1.264.4.9     skrll 	.bNbrPorts = 2,
   3385  1.264.4.10     skrll 	.wHubCharacteristics = USETWD(UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL),
   3386   1.264.4.9     skrll 	.bPwrOn2PwrGood = 50,
   3387   1.264.4.9     skrll 	.bHubContrCurrent = 0,
   3388   1.264.4.9     skrll 	.DeviceRemovable = { 0x00 },
   3389   1.264.4.9     skrll 	.PortPowerCtrlMask = { 0 },
   3390         1.1  augustss };
   3391         1.1  augustss 
   3392         1.1  augustss /*
   3393       1.166   dsainty  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3394       1.166   dsainty  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3395       1.166   dsainty  * should not be used by the USB subsystem.  As we cannot issue a
   3396       1.166   dsainty  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3397       1.166   dsainty  * will be enabled as part of the reset.
   3398       1.166   dsainty  *
   3399       1.166   dsainty  * On the VT83C572, the port cannot be successfully enabled until the
   3400       1.166   dsainty  * outstanding "port enable change" and "connection status change"
   3401       1.166   dsainty  * events have been reset.
   3402       1.166   dsainty  */
   3403       1.166   dsainty Static usbd_status
   3404       1.166   dsainty uhci_portreset(uhci_softc_t *sc, int index)
   3405       1.166   dsainty {
   3406       1.166   dsainty 	int lim, port, x;
   3407       1.166   dsainty 
   3408       1.166   dsainty 	if (index == 1)
   3409       1.166   dsainty 		port = UHCI_PORTSC1;
   3410       1.166   dsainty 	else if (index == 2)
   3411       1.166   dsainty 		port = UHCI_PORTSC2;
   3412       1.166   dsainty 	else
   3413       1.166   dsainty 		return (USBD_IOERROR);
   3414       1.166   dsainty 
   3415       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3416       1.166   dsainty 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3417       1.166   dsainty 
   3418       1.166   dsainty 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3419       1.166   dsainty 
   3420       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   3421       1.166   dsainty 		    index, UREAD2(sc, port)));
   3422       1.166   dsainty 
   3423       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3424       1.222  drochner 	UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
   3425       1.166   dsainty 
   3426       1.166   dsainty 	delay(100);
   3427       1.166   dsainty 
   3428       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3429       1.166   dsainty 		    index, UREAD2(sc, port)));
   3430       1.166   dsainty 
   3431       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3432       1.166   dsainty 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3433       1.166   dsainty 
   3434       1.166   dsainty 	for (lim = 10; --lim > 0;) {
   3435       1.166   dsainty 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3436       1.166   dsainty 
   3437       1.166   dsainty 		x = UREAD2(sc, port);
   3438       1.166   dsainty 
   3439       1.166   dsainty 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3440       1.166   dsainty 			    index, lim, x));
   3441       1.166   dsainty 
   3442       1.166   dsainty 		if (!(x & UHCI_PORTSC_CCS)) {
   3443       1.166   dsainty 			/*
   3444       1.166   dsainty 			 * No device is connected (or was disconnected
   3445       1.166   dsainty 			 * during reset).  Consider the port reset.
   3446       1.166   dsainty 			 * The delay must be long enough to ensure on
   3447       1.166   dsainty 			 * the initial iteration that the device
   3448       1.166   dsainty 			 * connection will have been registered.  50ms
   3449       1.166   dsainty 			 * appears to be sufficient, but 20ms is not.
   3450       1.166   dsainty 			 */
   3451       1.166   dsainty 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3452       1.166   dsainty 				    index, lim));
   3453       1.166   dsainty 			break;
   3454       1.166   dsainty 		}
   3455       1.166   dsainty 
   3456       1.166   dsainty 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3457       1.166   dsainty 			/*
   3458       1.166   dsainty 			 * Port enabled changed and/or connection
   3459       1.166   dsainty 			 * status changed were set.  Reset either or
   3460       1.166   dsainty 			 * both raised flags (by writing a 1 to that
   3461       1.166   dsainty 			 * bit), and wait again for state to settle.
   3462       1.166   dsainty 			 */
   3463       1.166   dsainty 			UWRITE2(sc, port, URWMASK(x) |
   3464       1.166   dsainty 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3465       1.166   dsainty 			continue;
   3466       1.166   dsainty 		}
   3467       1.166   dsainty 
   3468       1.166   dsainty 		if (x & UHCI_PORTSC_PE)
   3469       1.166   dsainty 			/* Port is enabled */
   3470       1.166   dsainty 			break;
   3471       1.166   dsainty 
   3472       1.166   dsainty 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3473       1.166   dsainty 	}
   3474       1.166   dsainty 
   3475       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3476       1.166   dsainty 		    index, UREAD2(sc, port)));
   3477       1.166   dsainty 
   3478       1.166   dsainty 	if (lim <= 0) {
   3479       1.166   dsainty 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3480       1.166   dsainty 		return (USBD_TIMEOUT);
   3481       1.166   dsainty 	}
   3482       1.184     perry 
   3483       1.166   dsainty 	sc->sc_isreset = 1;
   3484       1.166   dsainty 	return (USBD_NORMAL_COMPLETION);
   3485       1.166   dsainty }
   3486       1.166   dsainty 
   3487       1.166   dsainty /*
   3488         1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   3489         1.1  augustss  */
   3490         1.1  augustss usbd_status
   3491       1.119  augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3492         1.1  augustss {
   3493   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   3494        1.63  augustss 	usbd_status err;
   3495        1.16  augustss 
   3496        1.52  augustss 	/* Insert last in queue. */
   3497       1.248       mrg 	mutex_enter(&sc->sc_lock);
   3498        1.63  augustss 	err = usb_insert_transfer(xfer);
   3499       1.248       mrg 	mutex_exit(&sc->sc_lock);
   3500        1.63  augustss 	if (err)
   3501        1.63  augustss 		return (err);
   3502        1.52  augustss 
   3503       1.152  augustss 	/*
   3504        1.94  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3505        1.94  augustss 	 * so start it first.
   3506        1.67  augustss 	 */
   3507   1.264.4.7     skrll 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)));
   3508        1.16  augustss }
   3509        1.16  augustss 
   3510        1.16  augustss usbd_status
   3511       1.119  augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3512        1.16  augustss {
   3513   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   3514         1.1  augustss 	usb_device_request_t *req;
   3515        1.59  augustss 	void *buf = NULL;
   3516         1.1  augustss 	int port, x;
   3517       1.248       mrg 	int len, value, index, status, change, l, totlen = 0;
   3518         1.1  augustss 	usb_port_status_t ps;
   3519        1.63  augustss 	usbd_status err;
   3520         1.1  augustss 
   3521        1.82  augustss 	if (sc->sc_dying)
   3522        1.82  augustss 		return (USBD_IOERROR);
   3523        1.82  augustss 
   3524        1.48  augustss #ifdef DIAGNOSTIC
   3525   1.264.4.7     skrll 	if (!(xfer->ux_rqflags & URQ_REQUEST))
   3526       1.248       mrg 		panic("uhci_root_ctrl_start: not a request");
   3527        1.48  augustss #endif
   3528   1.264.4.7     skrll 	req = &xfer->ux_request;
   3529         1.1  augustss 
   3530       1.152  augustss 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3531         1.1  augustss 		    req->bmRequestType, req->bRequest));
   3532         1.1  augustss 
   3533         1.1  augustss 	len = UGETW(req->wLength);
   3534         1.1  augustss 	value = UGETW(req->wValue);
   3535         1.1  augustss 	index = UGETW(req->wIndex);
   3536        1.49  augustss 
   3537        1.49  augustss 	if (len != 0)
   3538   1.264.4.7     skrll 		buf = xfer->ux_buf;
   3539        1.49  augustss 
   3540         1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3541         1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   3542         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3543         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3544         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3545       1.152  augustss 		/*
   3546        1.13  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3547         1.1  augustss 		 * for the integrated root hub.
   3548         1.1  augustss 		 */
   3549         1.1  augustss 		break;
   3550         1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3551         1.1  augustss 		if (len > 0) {
   3552   1.264.4.1     skrll 			*(uint8_t *)buf = sc->sc_conf;
   3553         1.1  augustss 			totlen = 1;
   3554         1.1  augustss 		}
   3555         1.1  augustss 		break;
   3556         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3557         1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3558       1.195  christos 		if (len == 0)
   3559       1.195  christos 			break;
   3560         1.1  augustss 		switch(value >> 8) {
   3561         1.1  augustss 		case UDESC_DEVICE:
   3562         1.1  augustss 			if ((value & 0xff) != 0) {
   3563        1.63  augustss 				err = USBD_IOERROR;
   3564         1.1  augustss 				goto ret;
   3565         1.1  augustss 			}
   3566         1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3567        1.27  augustss 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3568         1.1  augustss 			memcpy(buf, &uhci_devd, l);
   3569         1.1  augustss 			break;
   3570         1.1  augustss 		case UDESC_CONFIG:
   3571         1.1  augustss 			if ((value & 0xff) != 0) {
   3572        1.63  augustss 				err = USBD_IOERROR;
   3573         1.1  augustss 				goto ret;
   3574         1.1  augustss 			}
   3575         1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3576         1.1  augustss 			memcpy(buf, &uhci_confd, l);
   3577         1.1  augustss 			buf = (char *)buf + l;
   3578         1.1  augustss 			len -= l;
   3579         1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3580         1.1  augustss 			totlen += l;
   3581         1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   3582         1.1  augustss 			buf = (char *)buf + l;
   3583         1.1  augustss 			len -= l;
   3584         1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3585         1.1  augustss 			totlen += l;
   3586         1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   3587         1.1  augustss 			break;
   3588         1.1  augustss 		case UDESC_STRING:
   3589       1.213  drochner #define sd ((usb_string_descriptor_t *)buf)
   3590         1.1  augustss 			switch (value & 0xff) {
   3591       1.182  augustss 			case 0: /* Language table */
   3592       1.213  drochner 				totlen = usb_makelangtbl(sd, len);
   3593       1.182  augustss 				break;
   3594         1.1  augustss 			case 1: /* Vendor */
   3595       1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3596       1.213  drochner 							 sc->sc_vendor);
   3597         1.1  augustss 				break;
   3598         1.1  augustss 			case 2: /* Product */
   3599       1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3600       1.213  drochner 							 "UHCI root hub");
   3601         1.1  augustss 				break;
   3602         1.1  augustss 			}
   3603       1.213  drochner #undef sd
   3604         1.1  augustss 			break;
   3605         1.1  augustss 		default:
   3606        1.63  augustss 			err = USBD_IOERROR;
   3607         1.1  augustss 			goto ret;
   3608         1.1  augustss 		}
   3609         1.1  augustss 		break;
   3610         1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3611         1.1  augustss 		if (len > 0) {
   3612   1.264.4.1     skrll 			*(uint8_t *)buf = 0;
   3613         1.1  augustss 			totlen = 1;
   3614         1.1  augustss 		}
   3615         1.1  augustss 		break;
   3616         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3617         1.1  augustss 		if (len > 1) {
   3618         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3619         1.1  augustss 			totlen = 2;
   3620         1.1  augustss 		}
   3621         1.1  augustss 		break;
   3622         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3623         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3624         1.1  augustss 		if (len > 1) {
   3625         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3626         1.1  augustss 			totlen = 2;
   3627         1.1  augustss 		}
   3628         1.1  augustss 		break;
   3629         1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3630         1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   3631        1.63  augustss 			err = USBD_IOERROR;
   3632         1.1  augustss 			goto ret;
   3633         1.1  augustss 		}
   3634         1.1  augustss 		sc->sc_addr = value;
   3635         1.1  augustss 		break;
   3636         1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3637         1.1  augustss 		if (value != 0 && value != 1) {
   3638        1.63  augustss 			err = USBD_IOERROR;
   3639         1.1  augustss 			goto ret;
   3640         1.1  augustss 		}
   3641         1.1  augustss 		sc->sc_conf = value;
   3642         1.1  augustss 		break;
   3643         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3644         1.1  augustss 		break;
   3645         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3646         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3647         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3648        1.63  augustss 		err = USBD_IOERROR;
   3649         1.1  augustss 		goto ret;
   3650         1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3651         1.1  augustss 		break;
   3652         1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3653         1.1  augustss 		break;
   3654         1.1  augustss 	/* Hub requests */
   3655         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3656         1.1  augustss 		break;
   3657         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3658        1.12  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3659        1.12  augustss 			     "port=%d feature=%d\n",
   3660         1.1  augustss 			     index, value));
   3661         1.1  augustss 		if (index == 1)
   3662         1.1  augustss 			port = UHCI_PORTSC1;
   3663         1.1  augustss 		else if (index == 2)
   3664         1.1  augustss 			port = UHCI_PORTSC2;
   3665         1.1  augustss 		else {
   3666        1.63  augustss 			err = USBD_IOERROR;
   3667         1.1  augustss 			goto ret;
   3668         1.1  augustss 		}
   3669         1.1  augustss 		switch(value) {
   3670         1.1  augustss 		case UHF_PORT_ENABLE:
   3671       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3672         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3673         1.1  augustss 			break;
   3674         1.1  augustss 		case UHF_PORT_SUSPEND:
   3675       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3676       1.222  drochner 			if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
   3677       1.222  drochner 				break;
   3678       1.222  drochner 			UWRITE2(sc, port, x | UHCI_PORTSC_RD);
   3679       1.222  drochner 			/* see USB2 spec ch. 7.1.7.7 */
   3680       1.222  drochner 			usb_delay_ms(&sc->sc_bus, 20);
   3681         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3682       1.222  drochner 			/* 10ms resume delay must be provided by caller */
   3683         1.1  augustss 			break;
   3684         1.1  augustss 		case UHF_PORT_RESET:
   3685       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3686         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3687         1.1  augustss 			break;
   3688         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3689       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3690         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3691         1.1  augustss 			break;
   3692         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3693       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3694         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3695         1.1  augustss 			break;
   3696         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3697       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3698         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3699         1.1  augustss 			break;
   3700         1.1  augustss 		case UHF_C_PORT_RESET:
   3701         1.1  augustss 			sc->sc_isreset = 0;
   3702        1.63  augustss 			err = USBD_NORMAL_COMPLETION;
   3703         1.1  augustss 			goto ret;
   3704         1.1  augustss 		case UHF_PORT_CONNECTION:
   3705         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3706         1.1  augustss 		case UHF_PORT_POWER:
   3707         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3708         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3709         1.1  augustss 		default:
   3710        1.63  augustss 			err = USBD_IOERROR;
   3711         1.1  augustss 			goto ret;
   3712         1.1  augustss 		}
   3713         1.1  augustss 		break;
   3714         1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3715         1.1  augustss 		if (index == 1)
   3716         1.1  augustss 			port = UHCI_PORTSC1;
   3717         1.1  augustss 		else if (index == 2)
   3718         1.1  augustss 			port = UHCI_PORTSC2;
   3719         1.1  augustss 		else {
   3720        1.63  augustss 			err = USBD_IOERROR;
   3721         1.1  augustss 			goto ret;
   3722         1.1  augustss 		}
   3723         1.1  augustss 		if (len > 0) {
   3724   1.264.4.1     skrll 			*(uint8_t *)buf =
   3725         1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3726         1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   3727         1.1  augustss 			totlen = 1;
   3728         1.1  augustss 		}
   3729         1.1  augustss 		break;
   3730         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3731       1.195  christos 		if (len == 0)
   3732       1.195  christos 			break;
   3733       1.177    toshii 		if ((value & 0xff) != 0) {
   3734        1.63  augustss 			err = USBD_IOERROR;
   3735         1.1  augustss 			goto ret;
   3736         1.1  augustss 		}
   3737         1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3738         1.1  augustss 		totlen = l;
   3739         1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   3740         1.1  augustss 		break;
   3741         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3742         1.1  augustss 		if (len != 4) {
   3743        1.63  augustss 			err = USBD_IOERROR;
   3744         1.1  augustss 			goto ret;
   3745         1.1  augustss 		}
   3746         1.1  augustss 		memset(buf, 0, len);
   3747         1.1  augustss 		totlen = len;
   3748         1.1  augustss 		break;
   3749         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3750         1.1  augustss 		if (index == 1)
   3751         1.1  augustss 			port = UHCI_PORTSC1;
   3752         1.1  augustss 		else if (index == 2)
   3753         1.1  augustss 			port = UHCI_PORTSC2;
   3754         1.1  augustss 		else {
   3755        1.63  augustss 			err = USBD_IOERROR;
   3756         1.1  augustss 			goto ret;
   3757         1.1  augustss 		}
   3758         1.1  augustss 		if (len != 4) {
   3759        1.63  augustss 			err = USBD_IOERROR;
   3760         1.1  augustss 			goto ret;
   3761         1.1  augustss 		}
   3762         1.1  augustss 		x = UREAD2(sc, port);
   3763         1.1  augustss 		status = change = 0;
   3764       1.142  augustss 		if (x & UHCI_PORTSC_CCS)
   3765         1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   3766       1.152  augustss 		if (x & UHCI_PORTSC_CSC)
   3767         1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   3768       1.152  augustss 		if (x & UHCI_PORTSC_PE)
   3769         1.1  augustss 			status |= UPS_PORT_ENABLED;
   3770       1.152  augustss 		if (x & UHCI_PORTSC_POEDC)
   3771         1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   3772       1.152  augustss 		if (x & UHCI_PORTSC_OCI)
   3773         1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   3774       1.152  augustss 		if (x & UHCI_PORTSC_OCIC)
   3775         1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3776       1.152  augustss 		if (x & UHCI_PORTSC_SUSP)
   3777         1.1  augustss 			status |= UPS_SUSPEND;
   3778       1.152  augustss 		if (x & UHCI_PORTSC_LSDA)
   3779         1.1  augustss 			status |= UPS_LOW_SPEED;
   3780         1.1  augustss 		status |= UPS_PORT_POWER;
   3781         1.1  augustss 		if (sc->sc_isreset)
   3782         1.1  augustss 			change |= UPS_C_PORT_RESET;
   3783         1.1  augustss 		USETW(ps.wPortStatus, status);
   3784         1.1  augustss 		USETW(ps.wPortChange, change);
   3785         1.1  augustss 		l = min(len, sizeof ps);
   3786         1.1  augustss 		memcpy(buf, &ps, l);
   3787         1.1  augustss 		totlen = l;
   3788         1.1  augustss 		break;
   3789         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3790        1.63  augustss 		err = USBD_IOERROR;
   3791         1.1  augustss 		goto ret;
   3792         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3793         1.1  augustss 		break;
   3794         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3795         1.1  augustss 		if (index == 1)
   3796         1.1  augustss 			port = UHCI_PORTSC1;
   3797         1.1  augustss 		else if (index == 2)
   3798         1.1  augustss 			port = UHCI_PORTSC2;
   3799         1.1  augustss 		else {
   3800        1.63  augustss 			err = USBD_IOERROR;
   3801         1.1  augustss 			goto ret;
   3802         1.1  augustss 		}
   3803         1.1  augustss 		switch(value) {
   3804         1.1  augustss 		case UHF_PORT_ENABLE:
   3805       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3806         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3807         1.1  augustss 			break;
   3808         1.1  augustss 		case UHF_PORT_SUSPEND:
   3809       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3810         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3811         1.1  augustss 			break;
   3812         1.1  augustss 		case UHF_PORT_RESET:
   3813       1.166   dsainty 			err = uhci_portreset(sc, index);
   3814       1.166   dsainty 			goto ret;
   3815       1.111  augustss 		case UHF_PORT_POWER:
   3816       1.111  augustss 			/* Pretend we turned on power */
   3817       1.115   mycroft 			err = USBD_NORMAL_COMPLETION;
   3818       1.111  augustss 			goto ret;
   3819         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3820         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3821         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3822         1.1  augustss 		case UHF_PORT_CONNECTION:
   3823         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3824         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3825         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3826         1.1  augustss 		case UHF_C_PORT_RESET:
   3827         1.1  augustss 		default:
   3828        1.63  augustss 			err = USBD_IOERROR;
   3829         1.1  augustss 			goto ret;
   3830         1.1  augustss 		}
   3831         1.1  augustss 		break;
   3832         1.1  augustss 	default:
   3833        1.63  augustss 		err = USBD_IOERROR;
   3834         1.1  augustss 		goto ret;
   3835         1.1  augustss 	}
   3836   1.264.4.7     skrll 	xfer->ux_actlen = totlen;
   3837        1.63  augustss 	err = USBD_NORMAL_COMPLETION;
   3838         1.1  augustss  ret:
   3839   1.264.4.7     skrll 	xfer->ux_status = err;
   3840       1.248       mrg 	mutex_enter(&sc->sc_lock);
   3841        1.63  augustss 	usb_transfer_complete(xfer);
   3842       1.248       mrg 	mutex_exit(&sc->sc_lock);
   3843         1.1  augustss 	return (USBD_IN_PROGRESS);
   3844         1.1  augustss }
   3845         1.1  augustss 
   3846         1.1  augustss /* Abort a root control request. */
   3847         1.1  augustss void
   3848       1.205  christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3849         1.1  augustss {
   3850        1.70  augustss 	/* Nothing to do, all transfers are synchronous. */
   3851         1.1  augustss }
   3852         1.1  augustss 
   3853         1.1  augustss /* Close the root pipe. */
   3854         1.1  augustss void
   3855       1.205  christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3856         1.1  augustss {
   3857         1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   3858         1.1  augustss }
   3859         1.1  augustss 
   3860         1.1  augustss /* Abort a root interrupt request. */
   3861         1.1  augustss void
   3862       1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   3863         1.1  augustss {
   3864   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   3865        1.30  augustss 
   3866       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3867   1.264.4.7     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   3868       1.248       mrg 
   3869       1.234    dyoung 	callout_stop(&sc->sc_poll_handle);
   3870        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3871        1.58  augustss 
   3872   1.264.4.7     skrll 	xfer->ux_status = USBD_CANCELLED;
   3873        1.96  augustss #ifdef DIAGNOSTIC
   3874        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3875        1.96  augustss #endif
   3876        1.63  augustss 	usb_transfer_complete(xfer);
   3877         1.1  augustss }
   3878         1.1  augustss 
   3879        1.16  augustss usbd_status
   3880       1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3881        1.16  augustss {
   3882   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   3883        1.63  augustss 	usbd_status err;
   3884        1.16  augustss 
   3885        1.52  augustss 	/* Insert last in queue. */
   3886       1.248       mrg 	mutex_enter(&sc->sc_lock);
   3887        1.63  augustss 	err = usb_insert_transfer(xfer);
   3888       1.248       mrg 	mutex_exit(&sc->sc_lock);
   3889        1.63  augustss 	if (err)
   3890        1.63  augustss 		return (err);
   3891        1.52  augustss 
   3892       1.186     skrll 	/*
   3893       1.186     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3894        1.67  augustss 	 * start first
   3895        1.67  augustss 	 */
   3896   1.264.4.7     skrll 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)));
   3897        1.16  augustss }
   3898        1.16  augustss 
   3899         1.1  augustss /* Start a transfer on the root interrupt pipe */
   3900         1.1  augustss usbd_status
   3901       1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   3902         1.1  augustss {
   3903   1.264.4.7     skrll 	usbd_pipe_handle pipe = xfer->ux_pipe;
   3904   1.264.4.7     skrll 	uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   3905       1.174  drochner 	unsigned int ival;
   3906         1.1  augustss 
   3907       1.173      gson 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
   3908   1.264.4.7     skrll 		     xfer, xfer->ux_length, xfer->ux_flags));
   3909        1.82  augustss 
   3910        1.82  augustss 	if (sc->sc_dying)
   3911        1.82  augustss 		return (USBD_IOERROR);
   3912         1.1  augustss 
   3913       1.174  drochner 	/* XXX temporary variable needed to avoid gcc3 warning */
   3914   1.264.4.7     skrll 	ival = xfer->ux_pipe->up_endpoint->ue_edesc->bInterval;
   3915       1.174  drochner 	sc->sc_ival = mstohz(ival);
   3916       1.234    dyoung 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3917        1.96  augustss 	sc->sc_intr_xfer = xfer;
   3918         1.1  augustss 	return (USBD_IN_PROGRESS);
   3919         1.1  augustss }
   3920         1.1  augustss 
   3921         1.1  augustss /* Close the root interrupt pipe. */
   3922         1.1  augustss void
   3923       1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   3924         1.1  augustss {
   3925   1.264.4.7     skrll 	uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   3926        1.30  augustss 
   3927       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3928       1.248       mrg 
   3929       1.234    dyoung 	callout_stop(&sc->sc_poll_handle);
   3930        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3931         1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   3932         1.1  augustss }
   3933