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uhci.c revision 1.264.4.21
      1  1.264.4.21     skrll /*	$NetBSD: uhci.c,v 1.264.4.21 2015/02/20 09:17:17 skrll Exp $	*/
      2         1.1  augustss 
      3         1.1  augustss /*
      4       1.248       mrg  * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc.
      5         1.1  augustss  * All rights reserved.
      6         1.1  augustss  *
      7        1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8       1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9       1.248       mrg  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10       1.248       mrg  * and Matthew R. Green (mrg (at) eterna.com.au).
     11         1.1  augustss  *
     12         1.1  augustss  * Redistribution and use in source and binary forms, with or without
     13         1.1  augustss  * modification, are permitted provided that the following conditions
     14         1.1  augustss  * are met:
     15         1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     16         1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     17         1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     18         1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     19         1.1  augustss  *    documentation and/or other materials provided with the distribution.
     20         1.1  augustss  *
     21         1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22         1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23         1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24         1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25         1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26         1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27         1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28         1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29         1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30         1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31         1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     32         1.1  augustss  */
     33         1.1  augustss 
     34         1.1  augustss /*
     35         1.1  augustss  * USB Universal Host Controller driver.
     36        1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     37         1.1  augustss  *
     38       1.229  uebayasi  * UHCI spec: http://www.intel.com/technology/usb/spec.htm
     39       1.229  uebayasi  * USB spec: http://www.usb.org/developers/docs/
     40        1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     41        1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     42         1.1  augustss  */
     43       1.143     lukem 
     44       1.143     lukem #include <sys/cdefs.h>
     45  1.264.4.21     skrll __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.264.4.21 2015/02/20 09:17:17 skrll Exp $");
     46         1.1  augustss 
     47         1.1  augustss #include <sys/param.h>
     48  1.264.4.20     skrll 
     49  1.264.4.20     skrll #include <sys/bus.h>
     50  1.264.4.20     skrll #include <sys/cpu.h>
     51  1.264.4.20     skrll #include <sys/device.h>
     52         1.1  augustss #include <sys/kernel.h>
     53       1.248       mrg #include <sys/kmem.h>
     54  1.264.4.20     skrll #include <sys/mutex.h>
     55         1.1  augustss #include <sys/proc.h>
     56         1.1  augustss #include <sys/queue.h>
     57  1.264.4.20     skrll #include <sys/select.h>
     58  1.264.4.20     skrll #include <sys/sysctl.h>
     59  1.264.4.20     skrll #include <sys/systm.h>
     60         1.1  augustss 
     61        1.39  augustss #include <machine/endian.h>
     62         1.7  augustss 
     63         1.1  augustss #include <dev/usb/usb.h>
     64         1.1  augustss #include <dev/usb/usbdi.h>
     65         1.1  augustss #include <dev/usb/usbdivar.h>
     66         1.7  augustss #include <dev/usb/usb_mem.h>
     67         1.1  augustss #include <dev/usb/usb_quirks.h>
     68         1.1  augustss 
     69         1.1  augustss #include <dev/usb/uhcireg.h>
     70         1.1  augustss #include <dev/usb/uhcivar.h>
     71  1.264.4.11     skrll #include <dev/usb/usbroothub.h>
     72  1.264.4.21     skrll #include <dev/usb/usbhist.h>
     73         1.1  augustss 
     74       1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     75       1.125  augustss /*#define UHCI_CTL_LOOP */
     76       1.125  augustss 
     77        1.67  augustss #ifdef UHCI_DEBUG
     78        1.92  augustss uhci_softc_t *thesc;
     79       1.125  augustss int uhcinoloop = 0;
     80        1.59  augustss #endif
     81        1.59  augustss 
     82  1.264.4.21     skrll #ifdef USB_DEBUG
     83  1.264.4.21     skrll #ifndef UHCI_DEBUG
     84  1.264.4.21     skrll #define uhcidebug 0
     85  1.264.4.21     skrll #else
     86  1.264.4.21     skrll static int uhcidebug = 0;
     87  1.264.4.21     skrll 
     88  1.264.4.21     skrll SYSCTL_SETUP(sysctl_hw_uhci_setup, "sysctl hw.uhci setup")
     89  1.264.4.21     skrll {
     90  1.264.4.21     skrll 	int err;
     91  1.264.4.21     skrll 	const struct sysctlnode *rnode;
     92  1.264.4.21     skrll 	const struct sysctlnode *cnode;
     93  1.264.4.21     skrll 
     94  1.264.4.21     skrll 	err = sysctl_createv(clog, 0, NULL, &rnode,
     95  1.264.4.21     skrll 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "uhci",
     96  1.264.4.21     skrll 	    SYSCTL_DESCR("uhci global controls"),
     97  1.264.4.21     skrll 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
     98  1.264.4.21     skrll 
     99  1.264.4.21     skrll 	if (err)
    100  1.264.4.21     skrll 		goto fail;
    101  1.264.4.21     skrll 
    102  1.264.4.21     skrll 	/* control debugging printfs */
    103  1.264.4.21     skrll 	err = sysctl_createv(clog, 0, &rnode, &cnode,
    104  1.264.4.21     skrll 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
    105  1.264.4.21     skrll 	    "debug", SYSCTL_DESCR("Enable debugging output"),
    106  1.264.4.21     skrll 	    NULL, 0, &uhcidebug, sizeof(uhcidebug), CTL_CREATE, CTL_EOL);
    107  1.264.4.21     skrll 	if (err)
    108  1.264.4.21     skrll 		goto fail;
    109  1.264.4.21     skrll 
    110  1.264.4.21     skrll 	return;
    111  1.264.4.21     skrll fail:
    112  1.264.4.21     skrll 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
    113  1.264.4.21     skrll }
    114  1.264.4.21     skrll 
    115  1.264.4.21     skrll #endif /* UHCI_DEBUG */
    116  1.264.4.21     skrll #endif /* USB_DEBUG */
    117  1.264.4.21     skrll 
    118  1.264.4.21     skrll 
    119  1.264.4.21     skrll #define	DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGN(uhcidebug,N,FMT,A,B,C,D)
    120  1.264.4.21     skrll #define	UHCIHIST_FUNC()		USBHIST_FUNC()
    121  1.264.4.21     skrll #define	UHCIHIST_CALLED(name)	USBHIST_CALLED(uhcidebug)
    122  1.264.4.21     skrll 
    123        1.39  augustss /*
    124        1.39  augustss  * The UHCI controller is little endian, so on big endian machines
    125       1.181  drochner  * the data stored in memory needs to be swapped.
    126        1.39  augustss  */
    127        1.39  augustss 
    128         1.1  augustss struct uhci_pipe {
    129         1.1  augustss 	struct usbd_pipe pipe;
    130        1.32  augustss 	int nexttoggle;
    131        1.92  augustss 
    132        1.92  augustss 	u_char aborting;
    133        1.92  augustss 	usbd_xfer_handle abortstart, abortend;
    134        1.92  augustss 
    135         1.1  augustss 	/* Info needed for different pipe kinds. */
    136         1.1  augustss 	union {
    137         1.1  augustss 		/* Control pipe */
    138         1.1  augustss 		struct {
    139         1.1  augustss 			uhci_soft_qh_t *sqh;
    140         1.7  augustss 			usb_dma_t reqdma;
    141        1.16  augustss 			uhci_soft_td_t *setup, *stat;
    142         1.1  augustss 			u_int length;
    143         1.1  augustss 		} ctl;
    144         1.1  augustss 		/* Interrupt pipe */
    145         1.1  augustss 		struct {
    146         1.1  augustss 			int npoll;
    147       1.187     skrll 			int isread;
    148         1.1  augustss 			uhci_soft_qh_t **qhs;
    149         1.1  augustss 		} intr;
    150         1.1  augustss 		/* Bulk pipe */
    151         1.1  augustss 		struct {
    152         1.1  augustss 			uhci_soft_qh_t *sqh;
    153         1.1  augustss 			u_int length;
    154         1.1  augustss 			int isread;
    155         1.1  augustss 		} bulk;
    156        1.16  augustss 		/* Iso pipe */
    157        1.16  augustss 		struct iso {
    158        1.16  augustss 			uhci_soft_td_t **stds;
    159        1.48  augustss 			int next, inuse;
    160        1.16  augustss 		} iso;
    161         1.1  augustss 	} u;
    162         1.1  augustss };
    163         1.1  augustss 
    164       1.142  augustss Static void		uhci_globalreset(uhci_softc_t *);
    165       1.166   dsainty Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    166       1.142  augustss Static void		uhci_reset(uhci_softc_t *);
    167  1.264.4.15     skrll Static usbd_status	uhci_run(uhci_softc_t *, int, int);
    168       1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    169       1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    170       1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    171       1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    172        1.16  augustss #if 0
    173       1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    174       1.119  augustss 					 uhci_intr_info_t *);
    175       1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    176        1.16  augustss #endif
    177         1.1  augustss 
    178       1.152  augustss Static void		uhci_free_std_chain(uhci_softc_t *,
    179       1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    180       1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    181   1.264.4.1     skrll 			    uhci_softc_t *, int, int, uint16_t, usb_dma_t *,
    182       1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    183       1.119  augustss Static void		uhci_poll_hub(void *);
    184       1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    185       1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    186       1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    187       1.119  augustss 
    188  1.264.4.15     skrll Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status);
    189       1.119  augustss 
    190       1.119  augustss Static void		uhci_timeout(void *);
    191       1.153  augustss Static void		uhci_timeout_task(void *);
    192       1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    193       1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    194       1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    195       1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    196       1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    197       1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    198  1.264.4.15     skrll Static void		uhci_add_loop(uhci_softc_t *);
    199  1.264.4.15     skrll Static void		uhci_rem_loop(uhci_softc_t *);
    200       1.119  augustss 
    201  1.264.4.15     skrll Static usbd_status	uhci_setup_isoc(usbd_pipe_handle);
    202       1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    203       1.119  augustss 
    204       1.119  augustss Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    205       1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    206       1.248       mrg Static void		uhci_get_lock(struct usbd_bus *, kmutex_t **);
    207  1.264.4.13     skrll Static int		uhci_roothub_ctrl(struct usbd_bus *,
    208  1.264.4.12     skrll     usb_device_request_t *, void *, int);
    209       1.119  augustss 
    210       1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    211       1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    212       1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    213       1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    214       1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    215       1.119  augustss 
    216       1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    217       1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    218       1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    219       1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    220       1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    221       1.119  augustss 
    222       1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    223       1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    224       1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    225       1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    226       1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    227       1.119  augustss 
    228       1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    229       1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    230       1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    231       1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    232       1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    233       1.119  augustss 
    234       1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    235       1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    236       1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    237       1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    238       1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    239       1.119  augustss 
    240       1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    241       1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    242       1.133  augustss Static void		uhci_softintr(void *);
    243       1.119  augustss 
    244  1.264.4.15     skrll Static usbd_status	uhci_device_request(usbd_xfer_handle);
    245       1.119  augustss 
    246       1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    247       1.158  augustss Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    248  1.264.4.15     skrll Static usbd_status	uhci_device_setintr(uhci_softc_t *,
    249  1.264.4.15     skrll 			    struct uhci_pipe *, int);
    250       1.119  augustss 
    251  1.264.4.15     skrll Static void		uhci_device_clear_toggle(usbd_pipe_handle);
    252  1.264.4.15     skrll Static void		uhci_noop(usbd_pipe_handle);
    253       1.119  augustss 
    254       1.240  jakllsch static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    255       1.119  augustss 						    uhci_soft_qh_t *);
    256       1.119  augustss 
    257       1.119  augustss #ifdef UHCI_DEBUG
    258       1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    259       1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    260       1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    261       1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    262       1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    263       1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    264  1.264.4.15     skrll Static void		uhci_dump_ii(uhci_intr_info_t *);
    265       1.119  augustss void			uhci_dump(void);
    266         1.1  augustss #endif
    267         1.1  augustss 
    268       1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    269       1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    270       1.112  augustss #define UWRITE1(sc, r, x) \
    271       1.165   dsainty  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    272       1.165   dsainty  } while (/*CONSTCOND*/0)
    273       1.112  augustss #define UWRITE2(sc, r, x) \
    274       1.165   dsainty  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    275       1.165   dsainty  } while (/*CONSTCOND*/0)
    276       1.112  augustss #define UWRITE4(sc, r, x) \
    277       1.165   dsainty  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    278       1.165   dsainty  } while (/*CONSTCOND*/0)
    279       1.196       mrg static __inline uint8_t
    280       1.196       mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
    281       1.196       mrg {
    282       1.196       mrg 
    283       1.196       mrg 	UBARR(sc);
    284       1.196       mrg 	return bus_space_read_1(sc->iot, sc->ioh, r);
    285       1.196       mrg }
    286       1.196       mrg 
    287       1.196       mrg static __inline uint16_t
    288       1.196       mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
    289       1.196       mrg {
    290       1.196       mrg 
    291       1.196       mrg 	UBARR(sc);
    292       1.196       mrg 	return bus_space_read_2(sc->iot, sc->ioh, r);
    293       1.196       mrg }
    294       1.196       mrg 
    295       1.260     joerg #ifdef UHCI_DEBUG
    296       1.196       mrg static __inline uint32_t
    297       1.196       mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
    298       1.196       mrg {
    299       1.196       mrg 
    300       1.196       mrg 	UBARR(sc);
    301       1.196       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    302       1.196       mrg }
    303       1.260     joerg #endif
    304         1.1  augustss 
    305         1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    306         1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    307         1.1  augustss 
    308       1.142  augustss #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    309         1.1  augustss 
    310         1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    311         1.1  augustss 
    312       1.208  drochner const struct usbd_bus_methods uhci_bus_methods = {
    313   1.264.4.5     skrll 	.ubm_open =	uhci_open,
    314   1.264.4.5     skrll 	.ubm_softint =	uhci_softintr,
    315   1.264.4.5     skrll 	.ubm_dopoll =	uhci_poll,
    316   1.264.4.5     skrll 	.ubm_allocx =	uhci_allocx,
    317   1.264.4.5     skrll 	.ubm_freex =	uhci_freex,
    318   1.264.4.5     skrll 	.ubm_getlock =	uhci_get_lock,
    319  1.264.4.12     skrll 	.ubm_rhctrl =	uhci_roothub_ctrl,
    320         1.1  augustss };
    321         1.1  augustss 
    322       1.208  drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
    323   1.264.4.5     skrll 	.upm_transfer =	uhci_root_intr_transfer,
    324   1.264.4.5     skrll 	.upm_start =	uhci_root_intr_start,
    325   1.264.4.5     skrll 	.upm_abort =	uhci_root_intr_abort,
    326   1.264.4.5     skrll 	.upm_close =	uhci_root_intr_close,
    327   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_noop,
    328   1.264.4.5     skrll 	.upm_done =	uhci_root_intr_done,
    329         1.1  augustss };
    330         1.1  augustss 
    331       1.208  drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    332   1.264.4.5     skrll 	.upm_transfer =	uhci_device_ctrl_transfer,
    333   1.264.4.5     skrll 	.upm_start =	uhci_device_ctrl_start,
    334   1.264.4.5     skrll 	.upm_abort =	uhci_device_ctrl_abort,
    335   1.264.4.5     skrll 	.upm_close =	uhci_device_ctrl_close,
    336   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_noop,
    337   1.264.4.5     skrll 	.upm_done =	uhci_device_ctrl_done,
    338         1.1  augustss };
    339         1.1  augustss 
    340       1.208  drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
    341   1.264.4.5     skrll 	.upm_transfer =	uhci_device_intr_transfer,
    342   1.264.4.5     skrll 	.upm_start =	uhci_device_intr_start,
    343   1.264.4.5     skrll 	.upm_abort =	uhci_device_intr_abort,
    344   1.264.4.5     skrll 	.upm_close =	uhci_device_intr_close,
    345   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_device_clear_toggle,
    346   1.264.4.5     skrll 	.upm_done =	uhci_device_intr_done,
    347         1.1  augustss };
    348         1.1  augustss 
    349       1.208  drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
    350   1.264.4.5     skrll 	.upm_transfer =	uhci_device_bulk_transfer,
    351   1.264.4.5     skrll 	.upm_start =	uhci_device_bulk_start,
    352   1.264.4.5     skrll 	.upm_abort =	uhci_device_bulk_abort,
    353   1.264.4.5     skrll 	.upm_close =	uhci_device_bulk_close,
    354   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_device_clear_toggle,
    355   1.264.4.5     skrll 	.upm_done =	uhci_device_bulk_done,
    356         1.1  augustss };
    357         1.1  augustss 
    358       1.208  drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
    359   1.264.4.5     skrll 	.upm_transfer =	uhci_device_isoc_transfer,
    360   1.264.4.5     skrll 	.upm_start =	uhci_device_isoc_start,
    361   1.264.4.5     skrll 	.upm_abort =	uhci_device_isoc_abort,
    362   1.264.4.5     skrll 	.upm_close =	uhci_device_isoc_close,
    363   1.264.4.5     skrll 	.upm_cleartoggle =	uhci_noop,
    364   1.264.4.5     skrll 	.upm_done =	uhci_device_isoc_done,
    365        1.16  augustss };
    366        1.16  augustss 
    367        1.92  augustss #define uhci_add_intr_info(sc, ii) \
    368       1.169  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    369        1.92  augustss #define uhci_del_intr_info(ii) \
    370       1.169  augustss 	do { \
    371       1.169  augustss 		LIST_REMOVE((ii), list); \
    372       1.169  augustss 		(ii)->list.le_prev = NULL; \
    373       1.169  augustss 	} while (0)
    374       1.169  augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    375        1.92  augustss 
    376       1.240  jakllsch static inline uhci_soft_qh_t *
    377       1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    378        1.92  augustss {
    379  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    380  1.264.4.21     skrll 	DPRINTFN(15, "pqh=%p sqh=%p", pqh, sqh, 0, 0);
    381        1.92  augustss 
    382        1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    383       1.152  augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    384       1.223    bouyer 		usb_syncmem(&pqh->dma,
    385       1.223    bouyer 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    386       1.223    bouyer 		    sizeof(pqh->qh.qh_hlink),
    387       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
    388        1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    389       1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    390  1.264.4.13     skrll 			return NULL;
    391        1.92  augustss 		}
    392        1.92  augustss #endif
    393        1.92  augustss 	}
    394  1.264.4.13     skrll 	return pqh;
    395        1.92  augustss }
    396        1.92  augustss 
    397         1.1  augustss void
    398       1.142  augustss uhci_globalreset(uhci_softc_t *sc)
    399         1.1  augustss {
    400         1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    401        1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    402         1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    403         1.1  augustss }
    404         1.1  augustss 
    405  1.264.4.14     skrll int
    406       1.119  augustss uhci_init(uhci_softc_t *sc)
    407         1.1  augustss {
    408        1.63  augustss 	usbd_status err;
    409         1.1  augustss 	int i, j;
    410       1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    411         1.1  augustss 	uhci_soft_td_t *std;
    412         1.1  augustss 
    413  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    414         1.1  augustss 
    415        1.67  augustss #ifdef UHCI_DEBUG
    416        1.92  augustss 	thesc = sc;
    417        1.92  augustss 
    418         1.1  augustss 	if (uhcidebug > 2)
    419         1.1  augustss 		uhci_dumpregs(sc);
    420         1.1  augustss #endif
    421         1.1  augustss 
    422       1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    423       1.219  jmcneill 
    424         1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    425       1.142  augustss 	uhci_globalreset(sc);			/* reset the controller */
    426       1.142  augustss 	uhci_reset(sc);
    427        1.24  augustss 
    428         1.1  augustss 	/* Allocate and initialize real frame array. */
    429       1.152  augustss 	err = usb_allocmem(&sc->sc_bus,
    430        1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    431        1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    432        1.63  augustss 	if (err)
    433  1.264.4.13     skrll 		return err;
    434       1.159  augustss 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    435         1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    436       1.160  augustss 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    437         1.1  augustss 
    438       1.152  augustss 	/*
    439       1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    440       1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    441       1.123  augustss 	 * otherwise.
    442       1.123  augustss 	 */
    443       1.123  augustss 	std = uhci_alloc_std(sc);
    444       1.123  augustss 	if (std == NULL)
    445  1.264.4.14     skrll 		return ENOMEM;
    446       1.123  augustss 	std->link.std = NULL;
    447       1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    448       1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    449       1.123  augustss 	std->td.td_token = htole32(0);
    450       1.123  augustss 	std->td.td_buffer = htole32(0);
    451       1.223    bouyer 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    452       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    453       1.123  augustss 
    454       1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    455       1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    456       1.123  augustss 	if (lsqh == NULL)
    457  1.264.4.14     skrll 		return ENOMEM;
    458       1.123  augustss 	lsqh->hlink = NULL;
    459       1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    460       1.123  augustss 	lsqh->elink = std;
    461       1.123  augustss 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    462       1.123  augustss 	sc->sc_last_qh = lsqh;
    463       1.223    bouyer 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    464       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    465       1.123  augustss 
    466         1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    467         1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    468        1.63  augustss 	if (bsqh == NULL)
    469  1.264.4.14     skrll 		return ENOMEM;
    470       1.123  augustss 	bsqh->hlink = lsqh;
    471       1.123  augustss 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    472       1.121  augustss 	bsqh->elink = NULL;
    473        1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    474         1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    475       1.223    bouyer 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    476       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    477         1.1  augustss 
    478       1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    479       1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    480       1.123  augustss 	if (chsqh == NULL)
    481  1.264.4.14     skrll 		return ENOMEM;
    482       1.123  augustss 	chsqh->hlink = bsqh;
    483       1.123  augustss 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    484       1.123  augustss 	chsqh->elink = NULL;
    485       1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    486       1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    487       1.223    bouyer 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    488       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    489       1.123  augustss 
    490       1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    491       1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    492       1.123  augustss 	if (clsqh == NULL)
    493  1.264.4.14     skrll 		return ENOMEM;
    494       1.220    bouyer 	clsqh->hlink = chsqh;
    495       1.123  augustss 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    496       1.123  augustss 	clsqh->elink = NULL;
    497       1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    498       1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    499       1.223    bouyer 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    500       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    501         1.1  augustss 
    502       1.152  augustss 	/*
    503         1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    504         1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    505         1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    506         1.1  augustss 	 */
    507         1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    508         1.1  augustss 		std = uhci_alloc_std(sc);
    509         1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    510        1.67  augustss 		if (std == NULL || sqh == NULL)
    511  1.264.4.13     skrll 			return USBD_NOMEM;
    512        1.42  augustss 		std->link.sqh = sqh;
    513       1.121  augustss 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    514        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    515        1.88   tsutsui 		std->td.td_token = htole32(0);
    516        1.88   tsutsui 		std->td.td_buffer = htole32(0);
    517       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    518       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    519       1.123  augustss 		sqh->hlink = clsqh;
    520       1.123  augustss 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    521       1.121  augustss 		sqh->elink = NULL;
    522        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    523       1.223    bouyer 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    524       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    525         1.1  augustss 		sc->sc_vframes[i].htd = std;
    526         1.1  augustss 		sc->sc_vframes[i].etd = std;
    527         1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    528         1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    529       1.152  augustss 		for (j = i;
    530       1.152  augustss 		     j < UHCI_FRAMELIST_COUNT;
    531         1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    532        1.88   tsutsui 			sc->sc_pframes[j] = htole32(std->physaddr);
    533         1.1  augustss 	}
    534       1.223    bouyer 	usb_syncmem(&sc->sc_dma, 0,
    535       1.223    bouyer 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    536       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
    537       1.223    bouyer 
    538         1.1  augustss 
    539         1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    540         1.1  augustss 
    541       1.253  christos 	sc->sc_xferpool = pool_cache_init(sizeof(struct uhci_xfer), 0, 0, 0,
    542       1.253  christos 	    "uhcixfer", NULL, IPL_USB, NULL, NULL, NULL);
    543        1.76  augustss 
    544       1.248       mrg 	callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE);
    545       1.248       mrg 
    546       1.248       mrg 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    547       1.248       mrg 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
    548       1.248       mrg 	cv_init(&sc->sc_softwake_cv, "uhciab");
    549        1.96  augustss 
    550         1.1  augustss 	/* Set up the bus struct. */
    551   1.264.4.7     skrll 	sc->sc_bus.ub_methods = &uhci_bus_methods;
    552   1.264.4.7     skrll 	sc->sc_bus.ub_pipesize = sizeof(struct uhci_pipe);
    553   1.264.4.7     skrll 	sc->sc_bus.ub_usedma = true;
    554         1.1  augustss 
    555       1.190  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    556       1.190  augustss 
    557  1.264.4.21     skrll 	DPRINTFN(1, "Enabling...", 0, 0, 0, 0);
    558       1.225    bouyer 
    559       1.249  drochner 	err =  uhci_run(sc, 1, 0);		/* and here we go... */
    560       1.152  augustss 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    561         1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    562       1.225    bouyer 	return err;
    563        1.53  augustss }
    564        1.53  augustss 
    565        1.53  augustss int
    566       1.215    dyoung uhci_activate(device_t self, enum devact act)
    567        1.53  augustss {
    568       1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    569        1.53  augustss 
    570        1.53  augustss 	switch (act) {
    571        1.53  augustss 	case DVACT_DEACTIVATE:
    572       1.210  kiyohara 		sc->sc_dying = 1;
    573       1.230    dyoung 		return 0;
    574       1.230    dyoung 	default:
    575       1.230    dyoung 		return EOPNOTSUPP;
    576        1.53  augustss 	}
    577        1.53  augustss }
    578        1.53  augustss 
    579       1.215    dyoung void
    580       1.215    dyoung uhci_childdet(device_t self, device_t child)
    581       1.215    dyoung {
    582       1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    583       1.215    dyoung 
    584       1.215    dyoung 	KASSERT(sc->sc_child == child);
    585       1.215    dyoung 	sc->sc_child = NULL;
    586       1.215    dyoung }
    587       1.215    dyoung 
    588        1.53  augustss int
    589       1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    590        1.53  augustss {
    591        1.53  augustss 	int rv = 0;
    592        1.53  augustss 
    593        1.53  augustss 	if (sc->sc_child != NULL)
    594        1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    595       1.152  augustss 
    596        1.53  augustss 	if (rv != 0)
    597  1.264.4.13     skrll 		return rv;
    598        1.53  augustss 
    599       1.226        ad 	callout_halt(&sc->sc_poll_handle, NULL);
    600       1.226        ad 	callout_destroy(&sc->sc_poll_handle);
    601       1.226        ad 
    602       1.248       mrg 	cv_destroy(&sc->sc_softwake_cv);
    603       1.248       mrg 
    604       1.248       mrg 	mutex_destroy(&sc->sc_lock);
    605       1.248       mrg 	mutex_destroy(&sc->sc_intr_lock);
    606       1.248       mrg 
    607       1.254  christos 	pool_cache_destroy(sc->sc_xferpool);
    608       1.254  christos 
    609        1.76  augustss 	/* XXX free other data structures XXX */
    610        1.53  augustss 
    611  1.264.4.13     skrll 	return rv;
    612         1.1  augustss }
    613         1.1  augustss 
    614        1.76  augustss usbd_xfer_handle
    615       1.119  augustss uhci_allocx(struct usbd_bus *bus)
    616        1.76  augustss {
    617   1.264.4.7     skrll 	struct uhci_softc *sc = bus->ub_hcpriv;
    618        1.76  augustss 	usbd_xfer_handle xfer;
    619        1.76  augustss 
    620       1.253  christos 	xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
    621        1.92  augustss 	if (xfer != NULL) {
    622       1.253  christos 		memset(xfer, 0, sizeof(struct uhci_xfer));
    623       1.254  christos 		UXFER(xfer)->iinfo.sc = sc;
    624        1.92  augustss #ifdef DIAGNOSTIC
    625       1.238   tsutsui 		UXFER(xfer)->iinfo.isdone = 1;
    626   1.264.4.7     skrll 		xfer->ux_state = XFER_BUSY;
    627        1.92  augustss #endif
    628        1.92  augustss 	}
    629  1.264.4.13     skrll 	return xfer;
    630        1.76  augustss }
    631        1.76  augustss 
    632        1.76  augustss void
    633       1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    634        1.76  augustss {
    635   1.264.4.7     skrll 	struct uhci_softc *sc = bus->ub_hcpriv;
    636        1.76  augustss 
    637        1.93  augustss #ifdef DIAGNOSTIC
    638   1.264.4.7     skrll 	if (xfer->ux_state != XFER_BUSY) {
    639        1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    640   1.264.4.7     skrll 		       xfer->ux_state);
    641        1.93  augustss 	}
    642   1.264.4.7     skrll 	xfer->ux_state = XFER_FREE;
    643       1.238   tsutsui 	if (!UXFER(xfer)->iinfo.isdone) {
    644        1.96  augustss 		printf("uhci_freex: !isdone\n");
    645       1.105  augustss 	}
    646        1.93  augustss #endif
    647       1.253  christos 	pool_cache_put(sc->sc_xferpool, xfer);
    648        1.48  augustss }
    649        1.48  augustss 
    650       1.248       mrg Static void
    651       1.248       mrg uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
    652       1.248       mrg {
    653   1.264.4.7     skrll 	struct uhci_softc *sc = bus->ub_hcpriv;
    654       1.248       mrg 
    655       1.248       mrg 	*lock = &sc->sc_lock;
    656       1.248       mrg }
    657       1.248       mrg 
    658       1.248       mrg 
    659        1.72  augustss /*
    660       1.212  jmcneill  * Handle suspend/resume.
    661       1.212  jmcneill  *
    662       1.212  jmcneill  * We need to switch to polling mode here, because this routine is
    663       1.212  jmcneill  * called from an interrupt context.  This is all right since we
    664       1.212  jmcneill  * are almost suspended anyway.
    665        1.72  augustss  */
    666       1.212  jmcneill bool
    667       1.232    dyoung uhci_resume(device_t dv, const pmf_qual_t *qual)
    668        1.72  augustss {
    669       1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    670       1.212  jmcneill 	int cmd;
    671        1.72  augustss 
    672       1.248       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
    673       1.193  augustss 
    674       1.212  jmcneill 	cmd = UREAD2(sc, UHCI_CMD);
    675   1.264.4.7     skrll 	sc->sc_bus.ub_usepolling++;
    676       1.214       smb 	UWRITE2(sc, UHCI_INTR, 0);
    677       1.214       smb 	uhci_globalreset(sc);
    678       1.214       smb 	uhci_reset(sc);
    679       1.212  jmcneill 	if (cmd & UHCI_CMD_RS)
    680       1.249  drochner 		uhci_run(sc, 0, 1);
    681       1.212  jmcneill 
    682       1.212  jmcneill 	/* restore saved state */
    683       1.212  jmcneill 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    684       1.212  jmcneill 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    685       1.212  jmcneill 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    686       1.212  jmcneill 
    687       1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
    688       1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock);
    689       1.212  jmcneill 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    690       1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
    691       1.212  jmcneill 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
    692       1.214       smb 	UHCICMD(sc, UHCI_CMD_MAXP);
    693       1.249  drochner 	uhci_run(sc, 1, 1); /* and start traffic again */
    694       1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock);
    695   1.264.4.7     skrll 	sc->sc_bus.ub_usepolling--;
    696       1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    697       1.234    dyoung 		callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
    698       1.212  jmcneill 		    sc->sc_intr_xfer);
    699       1.212  jmcneill #ifdef UHCI_DEBUG
    700       1.212  jmcneill 	if (uhcidebug > 2)
    701       1.212  jmcneill 		uhci_dumpregs(sc);
    702       1.212  jmcneill #endif
    703       1.212  jmcneill 
    704       1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    705       1.248       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
    706       1.212  jmcneill 
    707       1.212  jmcneill 	return true;
    708        1.72  augustss }
    709        1.72  augustss 
    710       1.212  jmcneill bool
    711       1.232    dyoung uhci_suspend(device_t dv, const pmf_qual_t *qual)
    712        1.30  augustss {
    713       1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    714        1.30  augustss 	int cmd;
    715        1.30  augustss 
    716       1.248       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
    717       1.212  jmcneill 
    718        1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    719        1.30  augustss 
    720       1.212  jmcneill #ifdef UHCI_DEBUG
    721       1.212  jmcneill 	if (uhcidebug > 2)
    722       1.212  jmcneill 		uhci_dumpregs(sc);
    723       1.212  jmcneill #endif
    724       1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    725       1.234    dyoung 		callout_stop(&sc->sc_poll_handle);
    726       1.219  jmcneill 	sc->sc_suspend = PWR_SUSPEND;
    727   1.264.4.7     skrll 	sc->sc_bus.ub_usepolling++;
    728       1.219  jmcneill 
    729       1.249  drochner 	uhci_run(sc, 0, 1); /* stop the controller */
    730       1.212  jmcneill 	cmd &= ~UHCI_CMD_RS;
    731       1.212  jmcneill 
    732       1.212  jmcneill 	/* save some state if BIOS doesn't */
    733       1.212  jmcneill 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    734       1.212  jmcneill 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    735       1.212  jmcneill 
    736       1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    737        1.30  augustss 
    738       1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
    739       1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock);
    740   1.264.4.7     skrll 	sc->sc_bus.ub_usepolling--;
    741        1.86  augustss 
    742       1.248       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
    743       1.212  jmcneill 
    744       1.212  jmcneill 	return true;
    745        1.30  augustss }
    746        1.30  augustss 
    747        1.59  augustss #ifdef UHCI_DEBUG
    748       1.101  augustss Static void
    749       1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
    750         1.1  augustss {
    751  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    752  1.264.4.21     skrll 	DPRINTFN(1, "cmd =%04x  sts    =%04x  intr   =%04x  frnum =%04x",
    753  1.264.4.21     skrll 	    UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS),
    754  1.264.4.21     skrll 	    UREAD2(sc, UHCI_INTR), UREAD2(sc, UHCI_FRNUM));
    755  1.264.4.21     skrll 	DPRINTFN(1, "sof =%04x  portsc1=%04x  portsc2=%04x  flbase=%08x",
    756  1.264.4.21     skrll 	    UREAD1(sc, UHCI_SOF), UREAD2(sc, UHCI_PORTSC1),
    757  1.264.4.21     skrll 	    UREAD2(sc, UHCI_PORTSC2), UREAD4(sc, UHCI_FLBASEADDR));
    758         1.1  augustss }
    759         1.1  augustss 
    760         1.1  augustss void
    761       1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
    762         1.1  augustss {
    763  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    764       1.250  christos 
    765       1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    766       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    767  1.264.4.21     skrll 
    768  1.264.4.21     skrll 	DPRINTFN(1, "TD(%p) at %08x", p, p->physaddr, 0, 0);
    769  1.264.4.21     skrll  	DPRINTFN(1, "   link=0x%08x status=0x%08x "
    770  1.264.4.21     skrll 	    "token=0x%08x buffer=0x%08x",
    771  1.264.4.21     skrll 	     le32toh(p->td.td_link),
    772  1.264.4.21     skrll 	     le32toh(p->td.td_status),
    773  1.264.4.21     skrll 	     le32toh(p->td.td_token),
    774  1.264.4.21     skrll 	     le32toh(p->td.td_buffer));
    775  1.264.4.21     skrll 
    776  1.264.4.21     skrll 	DPRINTFN(1, "bitstuff=%d crcto   =%d nak     =%d babble  =%d",
    777  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_BITSTUFF),
    778  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_CRCTO),
    779  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_NAK),
    780  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_BABBLE));
    781  1.264.4.21     skrll 	DPRINTFN(1, "dbuffer =%d stalled =%d active  =%d ioc     =%d",
    782  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_DBUFFER),
    783  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_STALLED),
    784  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_ACTIVE),
    785  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_IOC));
    786  1.264.4.21     skrll 	DPRINTFN(1, "ios     =%d ls      =%d spd     =%d",
    787  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_IOS),
    788  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_LS),
    789  1.264.4.21     skrll 	    !!(le32toh(p->td.td_status) & UHCI_TD_SPD), 0);
    790  1.264.4.21     skrll 	DPRINTFN(1, "errcnt  =%d actlen  =%d pid=%02x",
    791  1.264.4.21     skrll 	    UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    792  1.264.4.21     skrll 	    UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    793  1.264.4.21     skrll 	    UHCI_TD_GET_PID(le32toh(p->td.td_token)), 0);
    794  1.264.4.21     skrll 	DPRINTFN(1, "addr=%d  endpt=%d  D=%d  maxlen=%d,",
    795  1.264.4.21     skrll 	    UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    796  1.264.4.21     skrll 	    UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    797  1.264.4.21     skrll 	    UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    798  1.264.4.21     skrll 	    UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)));
    799         1.1  augustss }
    800         1.1  augustss 
    801         1.1  augustss void
    802       1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
    803         1.1  augustss {
    804  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    805  1.264.4.21     skrll 
    806       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    807       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    808  1.264.4.21     skrll 
    809  1.264.4.21     skrll 	DPRINTFN(1, "QH(%p) at %08x: hlink=%08x elink=%08x", sqh,
    810        1.88   tsutsui 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    811  1.264.4.21     skrll 	    le32toh(sqh->qh.qh_elink));
    812  1.264.4.21     skrll 
    813       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    814         1.1  augustss }
    815         1.1  augustss 
    816        1.13  augustss 
    817       1.110  augustss #if 1
    818         1.1  augustss void
    819       1.119  augustss uhci_dump(void)
    820         1.1  augustss {
    821       1.110  augustss 	uhci_dump_all(thesc);
    822       1.110  augustss }
    823       1.110  augustss #endif
    824         1.1  augustss 
    825       1.110  augustss void
    826       1.119  augustss uhci_dump_all(uhci_softc_t *sc)
    827       1.110  augustss {
    828         1.1  augustss 	uhci_dumpregs(sc);
    829       1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    830       1.261     skrll 	uhci_dump_qhs(sc->sc_lctl_start);
    831         1.1  augustss }
    832         1.1  augustss 
    833        1.67  augustss 
    834        1.67  augustss void
    835       1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
    836        1.67  augustss {
    837  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    838  1.264.4.21     skrll 
    839        1.67  augustss 	uhci_dump_qh(sqh);
    840        1.67  augustss 
    841  1.264.4.18     skrll 	/*
    842  1.264.4.18     skrll 	 * uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    843        1.67  augustss 	 * Traverses sideways first, then down.
    844        1.67  augustss 	 *
    845        1.67  augustss 	 * QH1
    846        1.67  augustss 	 * QH2
    847        1.67  augustss 	 * No QH
    848        1.67  augustss 	 * TD2.1
    849        1.67  augustss 	 * TD2.2
    850        1.67  augustss 	 * TD1.1
    851        1.67  augustss 	 * etc.
    852        1.67  augustss 	 *
    853        1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    854        1.67  augustss 	 */
    855        1.67  augustss 
    856       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    857       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    858        1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    859        1.67  augustss 		uhci_dump_qhs(sqh->hlink);
    860        1.67  augustss 	else
    861  1.264.4.21     skrll 		DPRINTFN(1, "No QH", 0, 0, 0, 0);
    862       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    863        1.67  augustss 
    864        1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    865        1.67  augustss 		uhci_dump_tds(sqh->elink);
    866        1.67  augustss 	else
    867  1.264.4.21     skrll 		DPRINTFN(1, "No QH", 0, 0, 0, 0);
    868        1.67  augustss }
    869        1.67  augustss 
    870         1.1  augustss void
    871       1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
    872         1.1  augustss {
    873        1.67  augustss 	uhci_soft_td_t *td;
    874       1.223    bouyer 	int stop;
    875        1.67  augustss 
    876        1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
    877        1.67  augustss 		uhci_dump_td(td);
    878         1.1  augustss 
    879  1.264.4.18     skrll 		/*
    880  1.264.4.18     skrll 		 * Check whether the link pointer in this TD marks
    881        1.67  augustss 		 * the link pointer as end of queue. This avoids
    882        1.67  augustss 		 * printing the free list in case the queue/TD has
    883        1.67  augustss 		 * already been moved there (seatbelt).
    884        1.67  augustss 		 */
    885       1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    886       1.223    bouyer 		    sizeof(td->td.td_link),
    887       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    888       1.223    bouyer 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    889       1.223    bouyer 			le32toh(td->td.td_link) == 0);
    890       1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    891       1.223    bouyer 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    892       1.223    bouyer 		if (stop)
    893        1.67  augustss 			break;
    894        1.67  augustss 	}
    895         1.1  augustss }
    896        1.92  augustss 
    897       1.101  augustss Static void
    898       1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
    899        1.92  augustss {
    900        1.95  augustss 	usbd_pipe_handle pipe;
    901        1.95  augustss 	usb_endpoint_descriptor_t *ed;
    902        1.95  augustss 	usbd_device_handle dev;
    903       1.152  augustss 
    904        1.98  augustss #ifdef DIAGNOSTIC
    905        1.98  augustss #define DONE ii->isdone
    906        1.98  augustss #else
    907        1.98  augustss #define DONE 0
    908        1.98  augustss #endif
    909   1.264.4.2     skrll 	if (ii == NULL) {
    910   1.264.4.2     skrll 		printf("ii NULL\n");
    911   1.264.4.2     skrll 		return;
    912   1.264.4.2     skrll 	}
    913   1.264.4.2     skrll 	if (ii->xfer == NULL) {
    914        1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
    915        1.98  augustss 		       ii, DONE);
    916   1.264.4.2     skrll 		return;
    917   1.264.4.2     skrll 	}
    918   1.264.4.7     skrll 	pipe = ii->xfer->ux_pipe;
    919   1.264.4.2     skrll 	if (pipe == NULL) {
    920        1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    921   1.264.4.2     skrll 		    ii, DONE, ii->xfer);
    922   1.264.4.2     skrll 		return;
    923       1.139  augustss 	}
    924   1.264.4.7     skrll 	if (pipe->up_endpoint == NULL) {
    925   1.264.4.7     skrll 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->up_endpoint=NULL\n",
    926       1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    927   1.264.4.2     skrll 		return;
    928       1.139  augustss 	}
    929   1.264.4.7     skrll 	if (pipe->up_dev == NULL) {
    930   1.264.4.7     skrll 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->up_dev=NULL\n",
    931       1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    932   1.264.4.2     skrll 		return;
    933        1.95  augustss 	}
    934   1.264.4.7     skrll 	ed = pipe->up_endpoint->ue_edesc;
    935   1.264.4.7     skrll 	dev = pipe->up_dev;
    936       1.152  augustss 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    937       1.152  augustss 	       ii, DONE, ii->xfer, dev,
    938   1.264.4.7     skrll 	       UGETW(dev->ud_ddesc.idVendor),
    939   1.264.4.7     skrll 	       UGETW(dev->ud_ddesc.idProduct),
    940   1.264.4.7     skrll 	       dev->ud_addr, pipe,
    941        1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
    942        1.98  augustss #undef DONE
    943        1.92  augustss }
    944        1.92  augustss 
    945       1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
    946        1.92  augustss void
    947       1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
    948        1.92  augustss {
    949        1.92  augustss 	uhci_intr_info_t *ii;
    950        1.92  augustss 
    951        1.92  augustss 	printf("intr_info list:\n");
    952        1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
    953        1.92  augustss 		uhci_dump_ii(ii);
    954        1.92  augustss }
    955        1.92  augustss 
    956       1.120  augustss void iidump(void);
    957       1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
    958        1.92  augustss 
    959         1.1  augustss #endif
    960         1.1  augustss 
    961         1.1  augustss /*
    962         1.1  augustss  * This routine is executed periodically and simulates interrupts
    963         1.1  augustss  * from the root controller interrupt pipe for port status change.
    964         1.1  augustss  */
    965         1.1  augustss void
    966       1.119  augustss uhci_poll_hub(void *addr)
    967         1.1  augustss {
    968        1.63  augustss 	usbd_xfer_handle xfer = addr;
    969   1.264.4.7     skrll 	usbd_pipe_handle pipe = xfer->ux_pipe;
    970       1.227    martin 	uhci_softc_t *sc;
    971         1.1  augustss 	u_char *p;
    972         1.1  augustss 
    973  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    974         1.1  augustss 
    975   1.264.4.7     skrll 	if (__predict_false(pipe->up_dev == NULL || pipe->up_dev->ud_bus == NULL))
    976       1.228    martin 		return;	/* device has detached */
    977   1.264.4.7     skrll 	sc = pipe->up_dev->ud_bus->ub_hcpriv;
    978       1.234    dyoung 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
    979        1.41  augustss 
    980   1.264.4.7     skrll 	p = xfer->ux_buf;
    981         1.1  augustss 	p[0] = 0;
    982         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
    983         1.1  augustss 		p[0] |= 1<<1;
    984         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
    985         1.1  augustss 		p[0] |= 1<<2;
    986        1.41  augustss 	if (p[0] == 0)
    987        1.41  augustss 		/* No change, try again in a while */
    988        1.41  augustss 		return;
    989        1.41  augustss 
    990   1.264.4.7     skrll 	xfer->ux_actlen = 1;
    991   1.264.4.7     skrll 	xfer->ux_status = USBD_NORMAL_COMPLETION;
    992       1.248       mrg 	mutex_enter(&sc->sc_lock);
    993        1.63  augustss 	usb_transfer_complete(xfer);
    994       1.248       mrg 	mutex_exit(&sc->sc_lock);
    995        1.41  augustss }
    996        1.41  augustss 
    997        1.41  augustss void
    998       1.205  christos uhci_root_intr_done(usbd_xfer_handle xfer)
    999        1.84  augustss {
   1000        1.84  augustss }
   1001        1.84  augustss 
   1002       1.123  augustss /*
   1003       1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
   1004       1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
   1005       1.123  augustss  * USB performance a lot for some devices.
   1006       1.123  augustss  * If we are already looping, just count it.
   1007       1.123  augustss  */
   1008         1.1  augustss void
   1009  1.264.4.17     skrll uhci_add_loop(uhci_softc_t *sc)
   1010  1.264.4.17     skrll {
   1011  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1012  1.264.4.21     skrll 
   1013       1.125  augustss #ifdef UHCI_DEBUG
   1014       1.125  augustss 	if (uhcinoloop)
   1015       1.125  augustss 		return;
   1016       1.125  augustss #endif
   1017       1.123  augustss 	if (++sc->sc_loops == 1) {
   1018  1.264.4.21     skrll 		DPRINTFN(5, "add loop", 0, 0, 0, 0);
   1019       1.123  augustss 		/* Note, we don't loop back the soft pointer. */
   1020       1.152  augustss 		sc->sc_last_qh->qh.qh_hlink =
   1021       1.123  augustss 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1022       1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1023       1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1024       1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1025       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1026       1.123  augustss 	}
   1027       1.123  augustss }
   1028       1.123  augustss 
   1029       1.123  augustss void
   1030  1.264.4.17     skrll uhci_rem_loop(uhci_softc_t *sc)
   1031  1.264.4.17     skrll {
   1032  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1033  1.264.4.21     skrll 
   1034       1.125  augustss #ifdef UHCI_DEBUG
   1035       1.125  augustss 	if (uhcinoloop)
   1036       1.125  augustss 		return;
   1037       1.125  augustss #endif
   1038       1.123  augustss 	if (--sc->sc_loops == 0) {
   1039  1.264.4.21     skrll 		DPRINTFN(5, "remove loop", 0, 0, 0, 0);
   1040       1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1041       1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1042       1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1043       1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1044       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1045       1.123  augustss 	}
   1046       1.123  augustss }
   1047       1.123  augustss 
   1048       1.248       mrg /* Add high speed control QH, called with lock held. */
   1049       1.123  augustss void
   1050       1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1051         1.1  augustss {
   1052        1.42  augustss 	uhci_soft_qh_t *eqh;
   1053         1.1  augustss 
   1054  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1055  1.264.4.21     skrll 
   1056       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1057       1.248       mrg 
   1058  1.264.4.21     skrll 	DPRINTFN(10, "sqh %p", sqh, 0, 0, 0);
   1059       1.123  augustss 	eqh = sc->sc_hctl_end;
   1060       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1061       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   1062       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   1063        1.42  augustss 	sqh->hlink       = eqh->hlink;
   1064        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1065       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1066       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1067        1.42  augustss 	eqh->hlink       = sqh;
   1068       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1069       1.123  augustss 	sc->sc_hctl_end = sqh;
   1070       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1071       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1072       1.125  augustss #ifdef UHCI_CTL_LOOP
   1073       1.123  augustss 	uhci_add_loop(sc);
   1074       1.125  augustss #endif
   1075         1.1  augustss }
   1076         1.1  augustss 
   1077       1.248       mrg /* Remove high speed control QH, called with lock held. */
   1078         1.1  augustss void
   1079       1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1080         1.1  augustss {
   1081         1.1  augustss 	uhci_soft_qh_t *pqh;
   1082       1.256   tsutsui 	uint32_t elink;
   1083         1.1  augustss 
   1084       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1085       1.248       mrg 
   1086  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1087  1.264.4.21     skrll 	DPRINTFN(10, "sqh %p", sqh, 0, 0, 0);
   1088       1.125  augustss #ifdef UHCI_CTL_LOOP
   1089       1.123  augustss 	uhci_rem_loop(sc);
   1090       1.125  augustss #endif
   1091       1.124  augustss 	/*
   1092       1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1093       1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1094       1.124  augustss 	 * the transferred packet was short so that the QH still points
   1095       1.124  augustss 	 * at the last used TD.
   1096       1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1097       1.124  augustss 	 * to stop looking at the TD.
   1098       1.223    bouyer 	 * Note that if the TD chain is large enough, the controller
   1099       1.223    bouyer 	 * may still be looking at the chain at the end of this function.
   1100       1.223    bouyer 	 * uhci_free_std_chain() will make sure the controller stops
   1101       1.223    bouyer 	 * looking at it quickly, but until then we should not change
   1102       1.223    bouyer 	 * sqh->hlink.
   1103       1.124  augustss 	 */
   1104       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1105       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1106       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1107       1.256   tsutsui 	elink = le32toh(sqh->qh.qh_elink);
   1108       1.256   tsutsui 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1109       1.256   tsutsui 	    sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD);
   1110       1.256   tsutsui 	if (!(elink & UHCI_PTR_T)) {
   1111       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1112       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1113       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1114       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1115       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1116       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1117       1.124  augustss 	}
   1118       1.124  augustss 
   1119       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1120       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1121       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1122       1.152  augustss 	pqh->hlink = sqh->hlink;
   1123        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1124       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1125       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1126       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1127       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1128       1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1129       1.123  augustss 		sc->sc_hctl_end = pqh;
   1130       1.123  augustss }
   1131       1.123  augustss 
   1132       1.248       mrg /* Add low speed control QH, called with lock held. */
   1133       1.123  augustss void
   1134       1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1135       1.123  augustss {
   1136       1.123  augustss 	uhci_soft_qh_t *eqh;
   1137       1.123  augustss 
   1138       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1139       1.248       mrg 
   1140  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1141  1.264.4.21     skrll 	DPRINTFN(10, "sqh %p", sqh, 0, 0, 0);
   1142  1.264.4.21     skrll 
   1143       1.123  augustss 	eqh = sc->sc_lctl_end;
   1144       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1145       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1146       1.152  augustss 	sqh->hlink = eqh->hlink;
   1147       1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1148       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1149       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1150       1.152  augustss 	eqh->hlink = sqh;
   1151       1.123  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1152       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1153       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1154       1.123  augustss 	sc->sc_lctl_end = sqh;
   1155       1.123  augustss }
   1156       1.123  augustss 
   1157       1.248       mrg /* Remove low speed control QH, called with lock held. */
   1158       1.123  augustss void
   1159       1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1160       1.123  augustss {
   1161       1.123  augustss 	uhci_soft_qh_t *pqh;
   1162       1.256   tsutsui 	uint32_t elink;
   1163       1.123  augustss 
   1164       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1165       1.248       mrg 
   1166  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1167  1.264.4.21     skrll 	DPRINTFN(10, "sqh %p", sqh, 0, 0, 0);
   1168  1.264.4.21     skrll 
   1169       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1170       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1171       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1172       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1173       1.256   tsutsui 	elink = le32toh(sqh->qh.qh_elink);
   1174       1.256   tsutsui 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1175       1.256   tsutsui 	    sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD);
   1176       1.256   tsutsui 	if (!(elink & UHCI_PTR_T)) {
   1177       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1178       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1179       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1180       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1181       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1182       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1183       1.124  augustss 	}
   1184       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1185       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1186       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1187       1.152  augustss 	pqh->hlink = sqh->hlink;
   1188       1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1189       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1190       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1191       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1192       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1193       1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1194       1.123  augustss 		sc->sc_lctl_end = pqh;
   1195         1.1  augustss }
   1196         1.1  augustss 
   1197       1.248       mrg /* Add bulk QH, called with lock held. */
   1198         1.1  augustss void
   1199       1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1200         1.1  augustss {
   1201        1.42  augustss 	uhci_soft_qh_t *eqh;
   1202         1.1  augustss 
   1203       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1204       1.248       mrg 
   1205  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1206  1.264.4.21     skrll 	DPRINTFN(10, "sqh %p", sqh, 0, 0, 0);
   1207  1.264.4.21     skrll 
   1208        1.42  augustss 	eqh = sc->sc_bulk_end;
   1209       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1210       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1211       1.152  augustss 	sqh->hlink = eqh->hlink;
   1212        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1213       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1214       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1215       1.152  augustss 	eqh->hlink = sqh;
   1216       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1217       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1218       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1219         1.1  augustss 	sc->sc_bulk_end = sqh;
   1220       1.123  augustss 	uhci_add_loop(sc);
   1221         1.1  augustss }
   1222         1.1  augustss 
   1223       1.248       mrg /* Remove bulk QH, called with lock held. */
   1224         1.1  augustss void
   1225       1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1226         1.1  augustss {
   1227         1.1  augustss 	uhci_soft_qh_t *pqh;
   1228         1.1  augustss 
   1229       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1230       1.248       mrg 
   1231  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1232  1.264.4.21     skrll 	DPRINTFN(10, "sqh %p", sqh, 0, 0, 0);
   1233  1.264.4.21     skrll 
   1234       1.123  augustss 	uhci_rem_loop(sc);
   1235       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1236       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1237       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1238       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1239       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1240       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1241       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1242       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1243       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1244       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1245       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1246       1.124  augustss 	}
   1247        1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1248       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1249       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1250        1.42  augustss 	pqh->hlink       = sqh->hlink;
   1251        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1252       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1253       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1254       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1255         1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1256         1.1  augustss 		sc->sc_bulk_end = pqh;
   1257         1.1  augustss }
   1258         1.1  augustss 
   1259       1.141  augustss Static int uhci_intr1(uhci_softc_t *);
   1260       1.141  augustss 
   1261         1.1  augustss int
   1262       1.119  augustss uhci_intr(void *arg)
   1263         1.1  augustss {
   1264        1.44  augustss 	uhci_softc_t *sc = arg;
   1265       1.248       mrg 	int ret = 0;
   1266       1.248       mrg 
   1267  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1268  1.264.4.21     skrll 
   1269       1.248       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1270       1.146  augustss 
   1271       1.216  drochner 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1272       1.248       mrg 		goto done;
   1273       1.141  augustss 
   1274   1.264.4.7     skrll 	if (sc->sc_bus.ub_usepolling || UREAD2(sc, UHCI_INTR) == 0) {
   1275  1.264.4.21     skrll 		DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0);
   1276       1.248       mrg 		goto done;
   1277       1.141  augustss 	}
   1278       1.179   mycroft 
   1279       1.248       mrg 	ret = uhci_intr1(sc);
   1280       1.248       mrg 
   1281       1.248       mrg  done:
   1282       1.248       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1283       1.248       mrg 	return ret;
   1284       1.141  augustss }
   1285       1.141  augustss 
   1286       1.141  augustss int
   1287       1.141  augustss uhci_intr1(uhci_softc_t *sc)
   1288       1.141  augustss {
   1289        1.44  augustss 	int status;
   1290        1.44  augustss 	int ack;
   1291         1.1  augustss 
   1292  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1293  1.264.4.21     skrll 
   1294        1.67  augustss #ifdef UHCI_DEBUG
   1295        1.44  augustss 	if (uhcidebug > 15) {
   1296  1.264.4.21     skrll 		DPRINTFN(1, "sc %p", sc, 0, 0, 0);
   1297         1.1  augustss 		uhci_dumpregs(sc);
   1298         1.1  augustss 	}
   1299         1.1  augustss #endif
   1300       1.117  augustss 
   1301       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1302       1.248       mrg 
   1303       1.153  augustss 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1304       1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1305  1.264.4.13     skrll 		return 0;
   1306       1.127     soren 
   1307       1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1308       1.201  jmcneill #ifdef DIAGNOSTIC
   1309       1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1310       1.216  drochner 		       device_xname(sc->sc_dev));
   1311       1.201  jmcneill #endif
   1312       1.134  augustss 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1313  1.264.4.13     skrll 		return 0;
   1314       1.117  augustss 	}
   1315        1.44  augustss 
   1316        1.44  augustss 	ack = 0;
   1317        1.44  augustss 	if (status & UHCI_STS_USBINT)
   1318        1.44  augustss 		ack |= UHCI_STS_USBINT;
   1319        1.44  augustss 	if (status & UHCI_STS_USBEI)
   1320        1.44  augustss 		ack |= UHCI_STS_USBEI;
   1321         1.1  augustss 	if (status & UHCI_STS_RD) {
   1322        1.44  augustss 		ack |= UHCI_STS_RD;
   1323       1.118  augustss #ifdef UHCI_DEBUG
   1324       1.216  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1325       1.118  augustss #endif
   1326         1.1  augustss 	}
   1327         1.1  augustss 	if (status & UHCI_STS_HSE) {
   1328        1.44  augustss 		ack |= UHCI_STS_HSE;
   1329       1.216  drochner 		printf("%s: host system error\n", device_xname(sc->sc_dev));
   1330         1.1  augustss 	}
   1331         1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1332        1.44  augustss 		ack |= UHCI_STS_HCPE;
   1333       1.152  augustss 		printf("%s: host controller process error\n",
   1334       1.216  drochner 		       device_xname(sc->sc_dev));
   1335        1.44  augustss 	}
   1336       1.233   msaitoh 
   1337       1.233   msaitoh 	/* When HCHalted=1 and Run/Stop=0 , it is normal */
   1338       1.233   msaitoh 	if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) {
   1339        1.44  augustss 		/* no acknowledge needed */
   1340       1.136  augustss 		if (!sc->sc_dying) {
   1341       1.152  augustss 			printf("%s: host controller halted\n",
   1342       1.216  drochner 			    device_xname(sc->sc_dev));
   1343       1.110  augustss #ifdef UHCI_DEBUG
   1344       1.136  augustss 			uhci_dump_all(sc);
   1345       1.110  augustss #endif
   1346       1.136  augustss 		}
   1347       1.136  augustss 		sc->sc_dying = 1;
   1348         1.1  augustss 	}
   1349        1.44  augustss 
   1350       1.132  augustss 	if (!ack)
   1351  1.264.4.13     skrll 		return 0;	/* nothing to acknowledge */
   1352       1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1353         1.1  augustss 
   1354        1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1355        1.85  augustss 
   1356  1.264.4.21     skrll 	DPRINTFN(15, "sc %p done", sc, 0, 0, 0);
   1357        1.85  augustss 
   1358  1.264.4.13     skrll 	return 1;
   1359        1.85  augustss }
   1360        1.85  augustss 
   1361        1.85  augustss void
   1362       1.133  augustss uhci_softintr(void *v)
   1363        1.85  augustss {
   1364       1.216  drochner 	struct usbd_bus *bus = v;
   1365   1.264.4.7     skrll 	uhci_softc_t *sc = bus->ub_hcpriv;
   1366       1.178    martin 	uhci_intr_info_t *ii, *nextii;
   1367        1.85  augustss 
   1368  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1369  1.264.4.21     skrll 	DPRINTFN(1, "sc %p", sc, 0, 0, 0);
   1370       1.248       mrg 
   1371  1.264.4.21     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1372        1.50  augustss 
   1373         1.1  augustss 	/*
   1374         1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1375         1.1  augustss 	 * interrupts because a transfer is completed there is no
   1376         1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1377         1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1378         1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1379         1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1380         1.1  augustss 	 * output on a slow console).
   1381         1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1382         1.1  augustss 	 * completed.
   1383         1.1  augustss 	 */
   1384       1.178    martin 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1385       1.178    martin 		nextii = LIST_NEXT(ii, list);
   1386         1.1  augustss 		uhci_check_intr(sc, ii);
   1387       1.178    martin 	}
   1388         1.1  augustss 
   1389       1.153  augustss 	if (sc->sc_softwake) {
   1390       1.153  augustss 		sc->sc_softwake = 0;
   1391       1.248       mrg 		cv_broadcast(&sc->sc_softwake_cv);
   1392       1.153  augustss 	}
   1393         1.1  augustss }
   1394         1.1  augustss 
   1395         1.1  augustss /* Check for an interrupt. */
   1396         1.1  augustss void
   1397       1.205  christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1398         1.1  augustss {
   1399         1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1400   1.264.4.1     skrll 	uint32_t status;
   1401         1.1  augustss 
   1402  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1403  1.264.4.21     skrll 	DPRINTFN(15, "ii %p", ii, 0, 0, 0);
   1404         1.1  augustss #ifdef DIAGNOSTIC
   1405        1.63  augustss 	if (ii == NULL) {
   1406         1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1407         1.1  augustss 		return;
   1408         1.1  augustss 	}
   1409         1.1  augustss #endif
   1410   1.264.4.7     skrll 	if (ii->xfer->ux_status == USBD_CANCELLED ||
   1411   1.264.4.7     skrll 	    ii->xfer->ux_status == USBD_TIMEOUT) {
   1412  1.264.4.21     skrll 		DPRINTFN(1, "aborted xfer %p", ii->xfer, 0, 0, 0);
   1413       1.155  augustss 		return;
   1414       1.155  augustss 	}
   1415       1.155  augustss 
   1416        1.63  augustss 	if (ii->stdstart == NULL)
   1417         1.1  augustss 		return;
   1418         1.1  augustss 	lstd = ii->stdend;
   1419         1.1  augustss #ifdef DIAGNOSTIC
   1420        1.63  augustss 	if (lstd == NULL) {
   1421         1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1422         1.1  augustss 		return;
   1423         1.1  augustss 	}
   1424         1.1  augustss #endif
   1425       1.223    bouyer 	usb_syncmem(&lstd->dma,
   1426       1.223    bouyer 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1427       1.223    bouyer 	    sizeof(lstd->td.td_status),
   1428       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1429       1.256   tsutsui 	status = le32toh(lstd->td.td_status);
   1430       1.256   tsutsui 	usb_syncmem(&lstd->dma,
   1431       1.256   tsutsui 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1432       1.256   tsutsui 	    sizeof(lstd->td.td_status),
   1433       1.256   tsutsui 	    BUS_DMASYNC_PREREAD);
   1434       1.258     skrll 
   1435       1.258     skrll 	/* If the last TD is not marked active we can complete */
   1436       1.258     skrll 	if (!(status & UHCI_TD_ACTIVE)) {
   1437       1.258     skrll  done:
   1438  1.264.4.21     skrll 		DPRINTFN(12, "ii=%p done", ii, 0, 0, 0);
   1439  1.264.4.21     skrll 
   1440   1.264.4.7     skrll 		callout_stop(&ii->xfer->ux_callout);
   1441       1.258     skrll 		uhci_idone(ii);
   1442       1.258     skrll 		return;
   1443       1.258     skrll 	}
   1444       1.258     skrll 
   1445       1.258     skrll 	/*
   1446       1.258     skrll 	 * If the last TD is still active we need to check whether there
   1447       1.258     skrll 	 * is an error somewhere in the middle, or whether there was a
   1448       1.258     skrll 	 * short packet (SPD and not ACTIVE).
   1449       1.258     skrll 	 */
   1450  1.264.4.21     skrll 	DPRINTFN(12, "active ii=%p", ii, 0, 0, 0);
   1451       1.258     skrll 	for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1452       1.258     skrll 		usb_syncmem(&std->dma,
   1453       1.258     skrll 		    std->offs + offsetof(uhci_td_t, td_status),
   1454       1.258     skrll 		    sizeof(std->td.td_status),
   1455       1.258     skrll 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1456       1.258     skrll 		status = le32toh(std->td.td_status);
   1457       1.258     skrll 		usb_syncmem(&std->dma,
   1458       1.258     skrll 		    std->offs + offsetof(uhci_td_t, td_status),
   1459       1.258     skrll 		    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1460       1.258     skrll 
   1461       1.258     skrll 		/* If there's an active TD the xfer isn't done. */
   1462       1.258     skrll 		if (status & UHCI_TD_ACTIVE) {
   1463  1.264.4.21     skrll 			DPRINTFN(12, "ii=%p std=%p still active",
   1464  1.264.4.21     skrll 			    ii, std, 0, 0);
   1465       1.258     skrll 			return;
   1466       1.258     skrll 		}
   1467       1.258     skrll 
   1468       1.258     skrll 		/* Any kind of error makes the xfer done. */
   1469       1.258     skrll 		if (status & UHCI_TD_STALLED)
   1470       1.258     skrll 			goto done;
   1471       1.258     skrll 
   1472       1.258     skrll 		/*
   1473       1.258     skrll 		 * If the data phase of a control transfer is short, we need
   1474       1.258     skrll 		 * to complete the status stage
   1475       1.258     skrll 		 */
   1476       1.258     skrll 		usbd_xfer_handle xfer = ii->xfer;
   1477   1.264.4.7     skrll 		usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc;
   1478       1.258     skrll 		uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes);
   1479       1.258     skrll 
   1480       1.258     skrll 		if ((status & UHCI_TD_SPD) && xfertype == UE_CONTROL) {
   1481       1.258     skrll 			struct uhci_pipe *upipe =
   1482   1.264.4.7     skrll 			    (struct uhci_pipe *)xfer->ux_pipe;
   1483       1.258     skrll 			uhci_soft_qh_t *sqh = upipe->u.ctl.sqh;
   1484       1.258     skrll 			uhci_soft_td_t *stat = upipe->u.ctl.stat;
   1485       1.258     skrll 
   1486  1.264.4.21     skrll 			DPRINTFN(12, "ii=%p std=%p control status"
   1487  1.264.4.21     skrll 			    "phase needs completion", ii, ii->stdstart, 0, 0);
   1488       1.258     skrll 
   1489       1.258     skrll 			sqh->qh.qh_elink =
   1490       1.258     skrll 			    htole32(stat->physaddr | UHCI_PTR_TD);
   1491       1.258     skrll 			usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1492       1.258     skrll 			    BUS_DMASYNC_PREWRITE);
   1493       1.258     skrll 			break;
   1494       1.258     skrll 		}
   1495       1.258     skrll 
   1496       1.258     skrll 		/* We want short packets, and it is short: it's done */
   1497       1.258     skrll 		usb_syncmem(&std->dma,
   1498       1.258     skrll 		    std->offs + offsetof(uhci_td_t, td_token),
   1499       1.258     skrll 		    sizeof(std->td.td_token),
   1500       1.258     skrll 		    BUS_DMASYNC_POSTWRITE);
   1501       1.258     skrll 
   1502       1.258     skrll 		if ((status & UHCI_TD_SPD) &&
   1503       1.258     skrll 			UHCI_TD_GET_ACTLEN(status) <
   1504       1.258     skrll 			UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) {
   1505       1.258     skrll 			goto done;
   1506        1.18  augustss 		}
   1507         1.1  augustss 	}
   1508         1.1  augustss }
   1509         1.1  augustss 
   1510       1.248       mrg /* Called with USB lock held. */
   1511         1.1  augustss void
   1512       1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1513         1.1  augustss {
   1514        1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1515   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   1516       1.248       mrg #ifdef DIAGNOSTIC
   1517   1.264.4.7     skrll 	uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv;
   1518       1.248       mrg #endif
   1519         1.1  augustss 	uhci_soft_td_t *std;
   1520   1.264.4.1     skrll 	uint32_t status = 0, nstatus;
   1521        1.26  augustss 	int actlen;
   1522         1.1  augustss 
   1523   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1524       1.248       mrg 
   1525  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1526  1.264.4.21     skrll 	DPRINTFN(12, "ii=%p", ii, 0, 0, 0);
   1527  1.264.4.21     skrll 
   1528         1.7  augustss #ifdef DIAGNOSTIC
   1529         1.7  augustss 	{
   1530       1.248       mrg 		/* XXX SMP? */
   1531         1.7  augustss 		int s = splhigh();
   1532         1.7  augustss 		if (ii->isdone) {
   1533        1.26  augustss 			splx(s);
   1534        1.92  augustss #ifdef UHCI_DEBUG
   1535        1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1536        1.92  augustss 			uhci_dump_ii(ii);
   1537        1.92  augustss #else
   1538        1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1539        1.92  augustss #endif
   1540         1.7  augustss 			return;
   1541         1.7  augustss 		}
   1542         1.7  augustss 		ii->isdone = 1;
   1543         1.7  augustss 		splx(s);
   1544         1.7  augustss 	}
   1545         1.7  augustss #endif
   1546        1.48  augustss 
   1547   1.264.4.7     skrll 	if (xfer->ux_nframes != 0) {
   1548        1.48  augustss 		/* Isoc transfer, do things differently. */
   1549        1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1550       1.126  augustss 		int i, n, nframes, len;
   1551        1.48  augustss 
   1552  1.264.4.21     skrll 		DPRINTFN(5, "ii=%p isoc ready", ii, 0, 0, 0);
   1553        1.48  augustss 
   1554   1.264.4.7     skrll 		nframes = xfer->ux_nframes;
   1555        1.48  augustss 		actlen = 0;
   1556        1.92  augustss 		n = UXFER(xfer)->curframe;
   1557        1.48  augustss 		for (i = 0; i < nframes; i++) {
   1558        1.48  augustss 			std = stds[n];
   1559        1.59  augustss #ifdef UHCI_DEBUG
   1560        1.48  augustss 			if (uhcidebug > 5) {
   1561  1.264.4.21     skrll 				DPRINTFN(1, "isoc TD %d", i, 0, 0, 0);
   1562        1.48  augustss 				uhci_dump_td(std);
   1563        1.48  augustss 			}
   1564        1.48  augustss #endif
   1565        1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1566        1.48  augustss 				n = 0;
   1567       1.223    bouyer 			usb_syncmem(&std->dma,
   1568       1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1569       1.223    bouyer 			    sizeof(std->td.td_status),
   1570       1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1571        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1572       1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1573   1.264.4.7     skrll 			xfer->ux_frlengths[i] = len;
   1574       1.126  augustss 			actlen += len;
   1575        1.48  augustss 		}
   1576        1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1577   1.264.4.7     skrll 		xfer->ux_actlen = actlen;
   1578   1.264.4.7     skrll 		xfer->ux_status = USBD_NORMAL_COMPLETION;
   1579       1.140  augustss 		goto end;
   1580        1.48  augustss 	}
   1581        1.48  augustss 
   1582        1.59  augustss #ifdef UHCI_DEBUG
   1583  1.264.4.21     skrll 	DPRINTFN(10, "ii=%p, xfer=%p, pipe=%p ready",
   1584  1.264.4.21     skrll 	    ii, xfer, upipe, 0);
   1585        1.48  augustss 	if (uhcidebug > 10)
   1586        1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1587        1.48  augustss #endif
   1588        1.48  augustss 
   1589        1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1590        1.26  augustss 	actlen = 0;
   1591        1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1592       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1593       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1594        1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1595        1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1596        1.26  augustss 			break;
   1597        1.67  augustss 
   1598        1.64  augustss 		status = nstatus;
   1599        1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1600        1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1601        1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1602       1.176   mycroft 		else {
   1603       1.176   mycroft 			/*
   1604       1.176   mycroft 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1605       1.176   mycroft 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1606       1.176   mycroft 			 * CONTROL AND STATUS".
   1607       1.176   mycroft 			 */
   1608       1.176   mycroft 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1609       1.176   mycroft 				status &= ~UHCI_TD_CRCTO;
   1610       1.176   mycroft 		}
   1611         1.1  augustss 	}
   1612        1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1613        1.63  augustss 	if (std != NULL)
   1614        1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1615        1.38  augustss 
   1616         1.1  augustss 	status &= UHCI_TD_ERROR;
   1617  1.264.4.21     skrll 	DPRINTFN(10, "actlen=%d, status=0x%x", actlen, status,
   1618  1.264.4.21     skrll 	    0, 0);
   1619   1.264.4.7     skrll 	xfer->ux_actlen = actlen;
   1620         1.1  augustss 	if (status != 0) {
   1621       1.122        tv 
   1622  1.264.4.21     skrll 		DPRINTFN((status == UHCI_TD_STALLED) * 10,
   1623  1.264.4.21     skrll 		    "error, addr=%d, endpt=0x%02x",
   1624  1.264.4.21     skrll 		    xfer->ux_pipe->up_dev->ud_addr,
   1625  1.264.4.21     skrll 		    xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress,
   1626  1.264.4.21     skrll 		    0, 0);
   1627  1.264.4.21     skrll 		DPRINTFN((status == UHCI_TD_STALLED) * 10,
   1628  1.264.4.21     skrll 		    "bitstuff=%d crcto   =%d nak     =%d babble  =%d",
   1629  1.264.4.21     skrll 		    status & UHCI_TD_BITSTUFF,
   1630  1.264.4.21     skrll 		    status & UHCI_TD_CRCTO,
   1631  1.264.4.21     skrll 		    status & UHCI_TD_NAK,
   1632  1.264.4.21     skrll 		    status & UHCI_TD_BABBLE);
   1633  1.264.4.21     skrll 		DPRINTFN((status == UHCI_TD_STALLED) * 10,
   1634  1.264.4.21     skrll 		    "dbuffer =%d stalled =%d active  =%d",
   1635  1.264.4.21     skrll 		    status & UHCI_TD_DBUFFER,
   1636  1.264.4.21     skrll 		    status & UHCI_TD_STALLED,
   1637  1.264.4.21     skrll 		    status & UHCI_TD_ACTIVE,
   1638  1.264.4.21     skrll 		    0);
   1639       1.122        tv 
   1640         1.1  augustss 		if (status == UHCI_TD_STALLED)
   1641   1.264.4.7     skrll 			xfer->ux_status = USBD_STALLED;
   1642         1.1  augustss 		else
   1643   1.264.4.7     skrll 			xfer->ux_status = USBD_IOERROR; /* more info XXX */
   1644         1.1  augustss 	} else {
   1645   1.264.4.7     skrll 		xfer->ux_status = USBD_NORMAL_COMPLETION;
   1646         1.1  augustss 	}
   1647       1.140  augustss 
   1648       1.140  augustss  end:
   1649        1.63  augustss 	usb_transfer_complete(xfer);
   1650   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1651  1.264.4.21     skrll 	DPRINTFN(12, "ii=%p done", ii, 0, 0, 0);
   1652         1.1  augustss }
   1653         1.1  augustss 
   1654        1.13  augustss /*
   1655        1.13  augustss  * Called when a request does not complete.
   1656        1.13  augustss  */
   1657         1.1  augustss void
   1658       1.119  augustss uhci_timeout(void *addr)
   1659         1.1  augustss {
   1660         1.1  augustss 	uhci_intr_info_t *ii = addr;
   1661       1.153  augustss 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1662   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.ux_pipe;
   1663   1.264.4.7     skrll 	uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv;
   1664       1.153  augustss 
   1665  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1666  1.264.4.21     skrll 
   1667  1.264.4.21     skrll 	DPRINTFN(1, "uxfer %p", uxfer, 0, 0, 0);
   1668       1.153  augustss 
   1669       1.153  augustss 	if (sc->sc_dying) {
   1670       1.248       mrg 		mutex_enter(&sc->sc_lock);
   1671       1.153  augustss 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1672       1.248       mrg 		mutex_exit(&sc->sc_lock);
   1673       1.153  augustss 		return;
   1674       1.153  augustss 	}
   1675         1.1  augustss 
   1676       1.153  augustss 	/* Execute the abort in a process context. */
   1677       1.252  jmcneill 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer,
   1678       1.252  jmcneill 	    USB_TASKQ_MPSAFE);
   1679   1.264.4.7     skrll 	usb_add_task(uxfer->xfer.ux_pipe->up_dev, &uxfer->abort_task,
   1680       1.204     joerg 	    USB_TASKQ_HC);
   1681       1.153  augustss }
   1682        1.51  augustss 
   1683       1.153  augustss void
   1684       1.153  augustss uhci_timeout_task(void *addr)
   1685       1.153  augustss {
   1686       1.153  augustss 	usbd_xfer_handle xfer = addr;
   1687   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   1688       1.153  augustss 
   1689  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1690  1.264.4.21     skrll 
   1691  1.264.4.21     skrll 	DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0);
   1692        1.67  augustss 
   1693       1.248       mrg 	mutex_enter(&sc->sc_lock);
   1694       1.153  augustss 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1695       1.248       mrg 	mutex_exit(&sc->sc_lock);
   1696         1.1  augustss }
   1697         1.1  augustss 
   1698         1.1  augustss /*
   1699         1.1  augustss  * Wait here until controller claims to have an interrupt.
   1700         1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1701         1.1  augustss  * too long.
   1702        1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1703         1.1  augustss  */
   1704         1.1  augustss void
   1705       1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1706         1.1  augustss {
   1707   1.264.4.7     skrll 	int timo = xfer->ux_timeout;
   1708        1.13  augustss 	uhci_intr_info_t *ii;
   1709        1.13  augustss 
   1710       1.248       mrg 	mutex_enter(&sc->sc_lock);
   1711       1.248       mrg 
   1712  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1713  1.264.4.21     skrll 	DPRINTFN(10, "timeout = %dms", timo, 0, 0, 0);
   1714         1.1  augustss 
   1715   1.264.4.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   1716        1.26  augustss 	for (; timo >= 0; timo--) {
   1717       1.248       mrg 		usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_lock);
   1718  1.264.4.21     skrll 		DPRINTFN(20, "0x%04x",
   1719  1.264.4.21     skrll 		    UREAD2(sc, UHCI_STS), 0, 0, 0);
   1720         1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1721       1.248       mrg 			mutex_spin_enter(&sc->sc_intr_lock);
   1722       1.141  augustss 			uhci_intr1(sc);
   1723       1.248       mrg 			mutex_spin_exit(&sc->sc_intr_lock);
   1724   1.264.4.7     skrll 			if (xfer->ux_status != USBD_IN_PROGRESS)
   1725       1.248       mrg 				goto done;
   1726         1.1  augustss 		}
   1727         1.1  augustss 	}
   1728        1.13  augustss 
   1729        1.13  augustss 	/* Timeout */
   1730  1.264.4.21     skrll 	DPRINTFN(1, "timeout", 0, 0, 0, 0);
   1731        1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1732       1.152  augustss 	     ii != NULL && ii->xfer != xfer;
   1733        1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1734        1.13  augustss 		;
   1735        1.41  augustss #ifdef DIAGNOSTIC
   1736        1.63  augustss 	if (ii == NULL)
   1737       1.163    provos 		panic("uhci_waitintr: lost intr_info");
   1738        1.41  augustss #endif
   1739        1.41  augustss 	uhci_idone(ii);
   1740       1.248       mrg 
   1741       1.248       mrg done:
   1742       1.248       mrg 	mutex_exit(&sc->sc_lock);
   1743         1.1  augustss }
   1744         1.1  augustss 
   1745         1.8  augustss void
   1746       1.119  augustss uhci_poll(struct usbd_bus *bus)
   1747         1.8  augustss {
   1748   1.264.4.7     skrll 	uhci_softc_t *sc = bus->ub_hcpriv;
   1749         1.8  augustss 
   1750       1.248       mrg 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1751       1.248       mrg 		mutex_spin_enter(&sc->sc_intr_lock);
   1752       1.141  augustss 		uhci_intr1(sc);
   1753       1.248       mrg 		mutex_spin_exit(&sc->sc_intr_lock);
   1754       1.248       mrg 	}
   1755         1.8  augustss }
   1756         1.8  augustss 
   1757         1.1  augustss void
   1758       1.119  augustss uhci_reset(uhci_softc_t *sc)
   1759         1.1  augustss {
   1760         1.1  augustss 	int n;
   1761         1.1  augustss 
   1762         1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1763         1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1764       1.152  augustss 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1765         1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1766        1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1767         1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1768       1.152  augustss 		printf("%s: controller did not reset\n",
   1769       1.216  drochner 		       device_xname(sc->sc_dev));
   1770         1.1  augustss }
   1771         1.1  augustss 
   1772        1.16  augustss usbd_status
   1773       1.249  drochner uhci_run(uhci_softc_t *sc, int run, int locked)
   1774         1.1  augustss {
   1775       1.248       mrg 	int n, running;
   1776   1.264.4.1     skrll 	uint16_t cmd;
   1777         1.1  augustss 
   1778  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1779  1.264.4.21     skrll 
   1780         1.1  augustss 	run = run != 0;
   1781       1.249  drochner 	if (!locked)
   1782       1.249  drochner 		mutex_spin_enter(&sc->sc_intr_lock);
   1783  1.264.4.21     skrll 
   1784  1.264.4.21     skrll 	DPRINTFN(1, "setting run=%d", run, 0, 0, 0);
   1785        1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1786        1.71  augustss 	if (run)
   1787        1.71  augustss 		cmd |= UHCI_CMD_RS;
   1788        1.71  augustss 	else
   1789        1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1790        1.71  augustss 	UHCICMD(sc, cmd);
   1791        1.13  augustss 	for(n = 0; n < 10; n++) {
   1792         1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1793         1.1  augustss 		/* return when we've entered the state we want */
   1794         1.1  augustss 		if (run == running) {
   1795       1.249  drochner 			if (!locked)
   1796       1.249  drochner 				mutex_spin_exit(&sc->sc_intr_lock);
   1797  1.264.4.21     skrll 			DPRINTFN(1, "done cmd=0x%x sts=0x%x",
   1798  1.264.4.21     skrll 			    UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 0, 0);
   1799  1.264.4.13     skrll 			return USBD_NORMAL_COMPLETION;
   1800         1.1  augustss 		}
   1801       1.248       mrg 		usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock);
   1802         1.1  augustss 	}
   1803       1.249  drochner 	if (!locked)
   1804       1.249  drochner 		mutex_spin_exit(&sc->sc_intr_lock);
   1805       1.216  drochner 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
   1806        1.14  augustss 	       run ? "start" : "stop");
   1807  1.264.4.13     skrll 	return USBD_IOERROR;
   1808         1.1  augustss }
   1809         1.1  augustss 
   1810         1.1  augustss /*
   1811         1.1  augustss  * Memory management routines.
   1812         1.1  augustss  *  uhci_alloc_std allocates TDs
   1813         1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1814         1.7  augustss  * These two routines do their own free list management,
   1815         1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1816         1.1  augustss  * has page size granularaity so much memory would be wasted if
   1817        1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1818         1.1  augustss  */
   1819         1.1  augustss 
   1820         1.1  augustss uhci_soft_td_t *
   1821       1.119  augustss uhci_alloc_std(uhci_softc_t *sc)
   1822         1.1  augustss {
   1823         1.1  augustss 	uhci_soft_td_t *std;
   1824        1.63  augustss 	usbd_status err;
   1825        1.42  augustss 	int i, offs;
   1826         1.7  augustss 	usb_dma_t dma;
   1827         1.1  augustss 
   1828  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1829  1.264.4.21     skrll 
   1830        1.63  augustss 	if (sc->sc_freetds == NULL) {
   1831  1.264.4.21     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
   1832        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1833        1.63  augustss 			  UHCI_TD_ALIGN, &dma);
   1834        1.63  augustss 		if (err)
   1835  1.264.4.13     skrll 			return 0;
   1836       1.248       mrg 		for (i = 0; i < UHCI_STD_CHUNK; i++) {
   1837        1.42  augustss 			offs = i * UHCI_STD_SIZE;
   1838       1.159  augustss 			std = KERNADDR(&dma, offs);
   1839       1.160  augustss 			std->physaddr = DMAADDR(&dma, offs);
   1840       1.223    bouyer 			std->dma = dma;
   1841       1.223    bouyer 			std->offs = offs;
   1842        1.42  augustss 			std->link.std = sc->sc_freetds;
   1843         1.1  augustss 			sc->sc_freetds = std;
   1844         1.1  augustss 		}
   1845         1.1  augustss 	}
   1846         1.1  augustss 	std = sc->sc_freetds;
   1847        1.42  augustss 	sc->sc_freetds = std->link.std;
   1848        1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1849         1.1  augustss 	return std;
   1850         1.1  augustss }
   1851         1.1  augustss 
   1852         1.1  augustss void
   1853       1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1854         1.1  augustss {
   1855         1.7  augustss #ifdef DIAGNOSTIC
   1856         1.7  augustss #define TD_IS_FREE 0x12345678
   1857        1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1858         1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1859         1.7  augustss 		return;
   1860         1.7  augustss 	}
   1861        1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1862         1.7  augustss #endif
   1863        1.42  augustss 	std->link.std = sc->sc_freetds;
   1864         1.1  augustss 	sc->sc_freetds = std;
   1865         1.1  augustss }
   1866         1.1  augustss 
   1867         1.1  augustss uhci_soft_qh_t *
   1868       1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   1869         1.1  augustss {
   1870         1.1  augustss 	uhci_soft_qh_t *sqh;
   1871        1.63  augustss 	usbd_status err;
   1872         1.1  augustss 	int i, offs;
   1873         1.7  augustss 	usb_dma_t dma;
   1874         1.1  augustss 
   1875  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1876  1.264.4.21     skrll 
   1877        1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   1878  1.264.4.21     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
   1879        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1880        1.63  augustss 			  UHCI_QH_ALIGN, &dma);
   1881        1.63  augustss 		if (err)
   1882  1.264.4.13     skrll 			return 0;
   1883        1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1884        1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   1885       1.159  augustss 			sqh = KERNADDR(&dma, offs);
   1886       1.160  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   1887       1.223    bouyer 			sqh->dma = dma;
   1888       1.223    bouyer 			sqh->offs = offs;
   1889        1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   1890         1.1  augustss 			sc->sc_freeqhs = sqh;
   1891         1.1  augustss 		}
   1892         1.1  augustss 	}
   1893         1.1  augustss 	sqh = sc->sc_freeqhs;
   1894        1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   1895        1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1896  1.264.4.13     skrll 	return sqh;
   1897         1.1  augustss }
   1898         1.1  augustss 
   1899         1.1  augustss void
   1900       1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1901         1.1  augustss {
   1902        1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   1903         1.1  augustss 	sc->sc_freeqhs = sqh;
   1904         1.1  augustss }
   1905         1.1  augustss 
   1906         1.1  augustss void
   1907       1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1908       1.119  augustss 		    uhci_soft_td_t *stdend)
   1909         1.1  augustss {
   1910         1.1  augustss 	uhci_soft_td_t *p;
   1911       1.256   tsutsui 	uint32_t td_link;
   1912         1.1  augustss 
   1913       1.223    bouyer 	/*
   1914       1.223    bouyer 	 * to avoid race condition with the controller which may be looking
   1915       1.223    bouyer 	 * at this chain, we need to first invalidate all links, and
   1916       1.223    bouyer 	 * then wait for the controller to move to another queue
   1917       1.223    bouyer 	 */
   1918       1.223    bouyer 	for (p = std; p != stdend; p = p->link.std) {
   1919       1.223    bouyer 		usb_syncmem(&p->dma,
   1920       1.223    bouyer 		    p->offs + offsetof(uhci_td_t, td_link),
   1921       1.223    bouyer 		    sizeof(p->td.td_link),
   1922       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1923       1.256   tsutsui 		td_link = le32toh(p->td.td_link);
   1924       1.256   tsutsui 		usb_syncmem(&p->dma,
   1925       1.256   tsutsui 		    p->offs + offsetof(uhci_td_t, td_link),
   1926       1.256   tsutsui 		    sizeof(p->td.td_link),
   1927       1.256   tsutsui 		    BUS_DMASYNC_PREREAD);
   1928       1.256   tsutsui 		if ((td_link & UHCI_PTR_T) == 0) {
   1929       1.255   tsutsui 			p->td.td_link = htole32(UHCI_PTR_T);
   1930       1.223    bouyer 			usb_syncmem(&p->dma,
   1931       1.223    bouyer 			    p->offs + offsetof(uhci_td_t, td_link),
   1932       1.223    bouyer 			    sizeof(p->td.td_link),
   1933       1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1934       1.223    bouyer 		}
   1935       1.223    bouyer 	}
   1936       1.223    bouyer 	delay(UHCI_QH_REMOVE_DELAY);
   1937       1.223    bouyer 
   1938         1.1  augustss 	for (; std != stdend; std = p) {
   1939        1.42  augustss 		p = std->link.std;
   1940         1.1  augustss 		uhci_free_std(sc, std);
   1941         1.1  augustss 	}
   1942         1.1  augustss }
   1943         1.1  augustss 
   1944         1.1  augustss usbd_status
   1945       1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1946   1.264.4.1     skrll 		     int rd, uint16_t flags, usb_dma_t *dma,
   1947       1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1948         1.1  augustss {
   1949         1.1  augustss 	uhci_soft_td_t *p, *lastp;
   1950         1.1  augustss 	uhci_physaddr_t lastlink;
   1951         1.1  augustss 	int i, ntd, l, tog, maxp;
   1952   1.264.4.1     skrll 	uint32_t status;
   1953   1.264.4.7     skrll 	int addr = upipe->pipe.up_dev->ud_addr;
   1954   1.264.4.7     skrll 	int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   1955         1.1  augustss 
   1956  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1957  1.264.4.21     skrll 
   1958  1.264.4.21     skrll 	DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d",
   1959  1.264.4.21     skrll 	    addr, UE_GET_ADDR(endpt), len, upipe->pipe.up_dev->ud_speed);
   1960       1.248       mrg 
   1961   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1962       1.248       mrg 
   1963   1.264.4.7     skrll 	maxp = UGETW(upipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize);
   1964         1.1  augustss 	if (maxp == 0) {
   1965         1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1966  1.264.4.13     skrll 		return USBD_INVAL;
   1967         1.1  augustss 	}
   1968         1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1969        1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1970        1.73  augustss 		ntd++;
   1971  1.264.4.21     skrll 	DPRINTFN(10, "maxp=%d ntd=%d",
   1972  1.264.4.21     skrll 	    maxp, ntd, 0, 0);
   1973  1.264.4.21     skrll 
   1974        1.73  augustss 	if (ntd == 0) {
   1975        1.73  augustss 		*sp = *ep = 0;
   1976  1.264.4.21     skrll 		DPRINTFN(1, "ntd=0", 0, 0, 0, 0);
   1977  1.264.4.13     skrll 		return USBD_NORMAL_COMPLETION;
   1978        1.73  augustss 	}
   1979        1.38  augustss 	tog = upipe->nexttoggle;
   1980         1.1  augustss 	if (ntd % 2 == 0)
   1981         1.1  augustss 		tog ^= 1;
   1982        1.32  augustss 	upipe->nexttoggle = tog ^ 1;
   1983       1.121  augustss 	lastp = NULL;
   1984         1.1  augustss 	lastlink = UHCI_PTR_T;
   1985         1.1  augustss 	ntd--;
   1986        1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1987   1.264.4.7     skrll 	if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW)
   1988        1.18  augustss 		status |= UHCI_TD_LS;
   1989        1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   1990        1.18  augustss 		status |= UHCI_TD_SPD;
   1991       1.223    bouyer 	usb_syncmem(dma, 0, len,
   1992       1.223    bouyer 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1993         1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1994         1.1  augustss 		p = uhci_alloc_std(sc);
   1995        1.63  augustss 		if (p == NULL) {
   1996       1.202  christos 			KASSERT(lastp != NULL);
   1997       1.149  augustss 			uhci_free_std_chain(sc, lastp, NULL);
   1998  1.264.4.13     skrll 			return USBD_NOMEM;
   1999         1.1  augustss 		}
   2000        1.42  augustss 		p->link.std = lastp;
   2001       1.121  augustss 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   2002         1.1  augustss 		lastp = p;
   2003         1.1  augustss 		lastlink = p->physaddr;
   2004        1.88   tsutsui 		p->td.td_status = htole32(status);
   2005         1.1  augustss 		if (i == ntd) {
   2006         1.1  augustss 			/* last TD */
   2007         1.1  augustss 			l = len % maxp;
   2008        1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   2009        1.73  augustss 				l = maxp;
   2010         1.1  augustss 			*ep = p;
   2011         1.1  augustss 		} else
   2012         1.1  augustss 			l = maxp;
   2013       1.152  augustss 		p->td.td_token =
   2014        1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   2015        1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   2016       1.160  augustss 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   2017       1.223    bouyer 		usb_syncmem(&p->dma, p->offs, sizeof(p->td),
   2018       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2019         1.1  augustss 		tog ^= 1;
   2020         1.1  augustss 	}
   2021         1.1  augustss 	*sp = lastp;
   2022  1.264.4.21     skrll 	DPRINTFN(10, "nexttog=%d", upipe->nexttoggle,
   2023  1.264.4.21     skrll 	    0, 0, 0);
   2024  1.264.4.21     skrll 
   2025  1.264.4.13     skrll 	return USBD_NORMAL_COMPLETION;
   2026         1.1  augustss }
   2027         1.1  augustss 
   2028        1.38  augustss void
   2029       1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   2030        1.38  augustss {
   2031        1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2032        1.38  augustss 	upipe->nexttoggle = 0;
   2033        1.38  augustss }
   2034        1.38  augustss 
   2035        1.38  augustss void
   2036       1.205  christos uhci_noop(usbd_pipe_handle pipe)
   2037        1.38  augustss {
   2038        1.38  augustss }
   2039        1.38  augustss 
   2040         1.1  augustss usbd_status
   2041       1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   2042         1.1  augustss {
   2043   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2044        1.63  augustss 	usbd_status err;
   2045        1.16  augustss 
   2046        1.52  augustss 	/* Insert last in queue. */
   2047       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2048        1.63  augustss 	err = usb_insert_transfer(xfer);
   2049       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2050        1.63  augustss 	if (err)
   2051  1.264.4.13     skrll 		return err;
   2052        1.52  augustss 
   2053       1.152  augustss 	/*
   2054        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2055        1.92  augustss 	 * so start it first.
   2056        1.67  augustss 	 */
   2057  1.264.4.13     skrll 	return uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2058        1.16  augustss }
   2059        1.16  augustss 
   2060        1.16  augustss usbd_status
   2061       1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   2062        1.16  augustss {
   2063   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2064   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2065   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2066        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2067        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2068         1.1  augustss 	uhci_soft_qh_t *sqh;
   2069        1.63  augustss 	usbd_status err;
   2070        1.45  augustss 	int len, isread, endpt;
   2071         1.1  augustss 
   2072  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2073  1.264.4.21     skrll 	DPRINTFN(3, "xfer=%p len=%d flags=%d ii=%p",
   2074  1.264.4.21     skrll 	     xfer, xfer->ux_length, xfer->ux_flags, ii);
   2075         1.1  augustss 
   2076        1.82  augustss 	if (sc->sc_dying)
   2077  1.264.4.13     skrll 		return USBD_IOERROR;
   2078        1.82  augustss 
   2079        1.48  augustss #ifdef DIAGNOSTIC
   2080   1.264.4.7     skrll 	if (xfer->ux_rqflags & URQ_REQUEST)
   2081       1.163    provos 		panic("uhci_device_bulk_transfer: a request");
   2082        1.48  augustss #endif
   2083         1.1  augustss 
   2084       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2085       1.248       mrg 
   2086   1.264.4.7     skrll 	len = xfer->ux_length;
   2087   1.264.4.7     skrll 	endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2088        1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2089         1.1  augustss 	sqh = upipe->u.bulk.sqh;
   2090         1.1  augustss 
   2091         1.1  augustss 	upipe->u.bulk.isread = isread;
   2092         1.1  augustss 	upipe->u.bulk.length = len;
   2093         1.1  augustss 
   2094   1.264.4.7     skrll 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->ux_flags,
   2095   1.264.4.7     skrll 				   &xfer->ux_dmabuf, &data, &dataend);
   2096       1.248       mrg 	if (err) {
   2097       1.248       mrg 		mutex_exit(&sc->sc_lock);
   2098  1.264.4.13     skrll 		return err;
   2099       1.248       mrg 	}
   2100        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2101       1.223    bouyer 	usb_syncmem(&dataend->dma,
   2102       1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2103       1.223    bouyer 	    sizeof(dataend->td.td_status),
   2104       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2105       1.223    bouyer 
   2106         1.1  augustss 
   2107        1.59  augustss #ifdef UHCI_DEBUG
   2108        1.33  augustss 	if (uhcidebug > 8) {
   2109  1.264.4.21     skrll 		DPRINTFN(8, "data(1)", 0, 0, 0, 0);
   2110        1.55  augustss 		uhci_dump_tds(data);
   2111         1.1  augustss 	}
   2112         1.1  augustss #endif
   2113         1.1  augustss 
   2114         1.1  augustss 	/* Set up interrupt info. */
   2115        1.63  augustss 	ii->xfer = xfer;
   2116        1.55  augustss 	ii->stdstart = data;
   2117        1.55  augustss 	ii->stdend = dataend;
   2118         1.7  augustss #ifdef DIAGNOSTIC
   2119        1.70  augustss 	if (!ii->isdone) {
   2120        1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   2121        1.70  augustss 	}
   2122         1.7  augustss 	ii->isdone = 0;
   2123         1.7  augustss #endif
   2124         1.1  augustss 
   2125        1.55  augustss 	sqh->elink = data;
   2126       1.121  augustss 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2127       1.223    bouyer 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2128         1.1  augustss 
   2129         1.1  augustss 	uhci_add_bulk(sc, sqh);
   2130        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2131         1.1  augustss 
   2132   1.264.4.7     skrll 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   2133   1.264.4.7     skrll 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   2134        1.91  augustss 			    uhci_timeout, ii);
   2135        1.13  augustss 	}
   2136   1.264.4.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   2137         1.1  augustss 
   2138        1.59  augustss #ifdef UHCI_DEBUG
   2139         1.1  augustss 	if (uhcidebug > 10) {
   2140  1.264.4.21     skrll 		DPRINTFN(10, "data(2)", 0, 0, 0, 0);
   2141        1.55  augustss 		uhci_dump_tds(data);
   2142         1.1  augustss 	}
   2143         1.1  augustss #endif
   2144         1.1  augustss 
   2145   1.264.4.7     skrll 	if (sc->sc_bus.ub_usepolling)
   2146        1.63  augustss 		uhci_waitintr(sc, xfer);
   2147        1.26  augustss 
   2148       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2149  1.264.4.13     skrll 	return USBD_IN_PROGRESS;
   2150         1.1  augustss }
   2151         1.1  augustss 
   2152         1.1  augustss /* Abort a device bulk request. */
   2153         1.1  augustss void
   2154       1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   2155         1.1  augustss {
   2156       1.248       mrg #ifdef DIAGNOSTIC
   2157   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2158       1.248       mrg #endif
   2159       1.248       mrg 
   2160       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2161       1.248       mrg 
   2162  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2163  1.264.4.21     skrll 
   2164        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2165        1.33  augustss }
   2166        1.33  augustss 
   2167        1.92  augustss /*
   2168       1.154  augustss  * Abort a device request.
   2169       1.154  augustss  * If this routine is called at splusb() it guarantees that the request
   2170       1.154  augustss  * will be removed from the hardware scheduling and that the callback
   2171       1.154  augustss  * for it will be called with USBD_CANCELLED status.
   2172       1.154  augustss  * It's impossible to guarantee that the requested transfer will not
   2173       1.154  augustss  * have happened since the hardware runs concurrently.
   2174       1.154  augustss  * If the transaction has already happened we rely on the ordinary
   2175       1.154  augustss  * interrupt processing to process it.
   2176       1.248       mrg  * XXX This is most probably wrong.
   2177       1.248       mrg  * XXXMRG this doesn't make sense anymore.
   2178        1.92  augustss  */
   2179        1.33  augustss void
   2180       1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2181        1.33  augustss {
   2182        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2183   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2184   1.264.4.7     skrll 	uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv;
   2185        1.33  augustss 	uhci_soft_td_t *std;
   2186       1.188  augustss 	int wake;
   2187        1.65  augustss 
   2188  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2189  1.264.4.21     skrll 	DPRINTFN(1,"xfer=%p, status=%d", xfer, status, 0, 0);
   2190        1.33  augustss 
   2191       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2192   1.264.4.3     skrll 	ASSERT_SLEEPABLE();
   2193       1.248       mrg 
   2194       1.153  augustss 	if (sc->sc_dying) {
   2195       1.153  augustss 		/* If we're dying, just do the software part. */
   2196   1.264.4.7     skrll 		xfer->ux_status = status;	/* make software ignore it */
   2197   1.264.4.7     skrll 		callout_stop(&xfer->ux_callout);
   2198       1.153  augustss 		usb_transfer_complete(xfer);
   2199       1.194  christos 		return;
   2200        1.92  augustss 	}
   2201        1.92  augustss 
   2202       1.153  augustss 	/*
   2203       1.188  augustss 	 * If an abort is already in progress then just wait for it to
   2204       1.188  augustss 	 * complete and return.
   2205       1.188  augustss 	 */
   2206   1.264.4.7     skrll 	if (xfer->ux_hcflags & UXFER_ABORTING) {
   2207  1.264.4.21     skrll 		DPRINTFN(2, "already aborting", 0, 0, 0, 0);
   2208       1.188  augustss #ifdef DIAGNOSTIC
   2209       1.188  augustss 		if (status == USBD_TIMEOUT)
   2210       1.188  augustss 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2211       1.188  augustss #endif
   2212       1.188  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2213   1.264.4.7     skrll 		xfer->ux_status = status;
   2214  1.264.4.21     skrll 		DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0);
   2215   1.264.4.7     skrll 		xfer->ux_hcflags |= UXFER_ABORTWAIT;
   2216   1.264.4.7     skrll 		while (xfer->ux_hcflags & UXFER_ABORTING)
   2217   1.264.4.7     skrll 			cv_wait(&xfer->ux_hccv, &sc->sc_lock);
   2218       1.248       mrg 		goto done;
   2219       1.188  augustss 	}
   2220   1.264.4.7     skrll 	xfer->ux_hcflags |= UXFER_ABORTING;
   2221       1.188  augustss 
   2222       1.188  augustss 	/*
   2223       1.153  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2224       1.153  augustss 	 */
   2225   1.264.4.7     skrll 	xfer->ux_status = status;	/* make software ignore it */
   2226   1.264.4.7     skrll 	callout_stop(&xfer->ux_callout);
   2227  1.264.4.21     skrll 	DPRINTFN(1, "stop ii=%p", ii, 0, 0, 0);
   2228       1.223    bouyer 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   2229       1.223    bouyer 		usb_syncmem(&std->dma,
   2230       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2231       1.223    bouyer 		    sizeof(std->td.td_status),
   2232       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2233        1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2234       1.223    bouyer 		usb_syncmem(&std->dma,
   2235       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2236       1.223    bouyer 		    sizeof(std->td.td_status),
   2237       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2238       1.223    bouyer 	}
   2239        1.92  augustss 
   2240       1.162  augustss 	/*
   2241       1.153  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2242       1.153  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2243       1.153  augustss 	 * has run.
   2244       1.153  augustss 	 */
   2245       1.248       mrg 	/* Hardware finishes in 1ms */
   2246   1.264.4.7     skrll 	usb_delay_ms_locked(upipe->pipe.up_dev->ud_bus, 2, &sc->sc_lock);
   2247       1.153  augustss 	sc->sc_softwake = 1;
   2248       1.153  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2249  1.264.4.21     skrll 	DPRINTFN(1, "cv_wait", 0, 0, 0, 0);
   2250       1.248       mrg 	cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
   2251       1.162  augustss 
   2252       1.153  augustss 	/*
   2253       1.153  augustss 	 * Step 3: Execute callback.
   2254       1.153  augustss 	 */
   2255  1.264.4.21     skrll 	DPRINTFN(1, "callback", 0, 0, 0, 0);
   2256       1.100  augustss #ifdef DIAGNOSTIC
   2257       1.106  augustss 	ii->isdone = 1;
   2258       1.100  augustss #endif
   2259   1.264.4.7     skrll 	wake = xfer->ux_hcflags & UXFER_ABORTWAIT;
   2260   1.264.4.7     skrll 	xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2261       1.106  augustss 	usb_transfer_complete(xfer);
   2262       1.188  augustss 	if (wake)
   2263   1.264.4.7     skrll 		cv_broadcast(&xfer->ux_hccv);
   2264       1.248       mrg done:
   2265       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2266         1.1  augustss }
   2267         1.1  augustss 
   2268         1.1  augustss /* Close a device bulk pipe. */
   2269         1.1  augustss void
   2270       1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   2271         1.1  augustss {
   2272         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2273   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2274   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2275         1.1  augustss 
   2276       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2277       1.248       mrg 
   2278         1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2279       1.236  drochner 
   2280   1.264.4.7     skrll 	pipe->up_endpoint->ue_toggle = upipe->nexttoggle;
   2281         1.1  augustss }
   2282         1.1  augustss 
   2283         1.1  augustss usbd_status
   2284       1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2285         1.1  augustss {
   2286   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2287        1.63  augustss 	usbd_status err;
   2288        1.16  augustss 
   2289        1.52  augustss 	/* Insert last in queue. */
   2290       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2291        1.63  augustss 	err = usb_insert_transfer(xfer);
   2292       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2293        1.63  augustss 	if (err)
   2294  1.264.4.13     skrll 		return err;
   2295        1.52  augustss 
   2296       1.152  augustss 	/*
   2297        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2298        1.92  augustss 	 * so start it first.
   2299        1.67  augustss 	 */
   2300  1.264.4.13     skrll 	return uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2301        1.16  augustss }
   2302        1.16  augustss 
   2303        1.16  augustss usbd_status
   2304       1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2305        1.16  augustss {
   2306   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2307        1.63  augustss 	usbd_status err;
   2308         1.1  augustss 
   2309        1.82  augustss 	if (sc->sc_dying)
   2310  1.264.4.13     skrll 		return USBD_IOERROR;
   2311        1.82  augustss 
   2312        1.48  augustss #ifdef DIAGNOSTIC
   2313   1.264.4.7     skrll 	if (!(xfer->ux_rqflags & URQ_REQUEST))
   2314       1.163    provos 		panic("uhci_device_ctrl_transfer: not a request");
   2315        1.48  augustss #endif
   2316         1.1  augustss 
   2317       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2318        1.63  augustss 	err = uhci_device_request(xfer);
   2319       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2320        1.63  augustss 	if (err)
   2321  1.264.4.13     skrll 		return err;
   2322         1.1  augustss 
   2323   1.264.4.7     skrll 	if (sc->sc_bus.ub_usepolling)
   2324        1.63  augustss 		uhci_waitintr(sc, xfer);
   2325  1.264.4.13     skrll 	return USBD_IN_PROGRESS;
   2326         1.1  augustss }
   2327         1.1  augustss 
   2328         1.1  augustss usbd_status
   2329       1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2330         1.1  augustss {
   2331   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2332        1.63  augustss 	usbd_status err;
   2333        1.16  augustss 
   2334        1.52  augustss 	/* Insert last in queue. */
   2335       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2336        1.63  augustss 	err = usb_insert_transfer(xfer);
   2337       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2338        1.63  augustss 	if (err)
   2339  1.264.4.13     skrll 		return err;
   2340        1.52  augustss 
   2341       1.152  augustss 	/*
   2342        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2343        1.92  augustss 	 * so start it first.
   2344        1.67  augustss 	 */
   2345  1.264.4.13     skrll 	return uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2346        1.16  augustss }
   2347        1.16  augustss 
   2348        1.16  augustss usbd_status
   2349       1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2350        1.16  augustss {
   2351   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2352   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2353   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2354        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2355        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2356         1.1  augustss 	uhci_soft_qh_t *sqh;
   2357        1.63  augustss 	usbd_status err;
   2358       1.187     skrll 	int isread, endpt;
   2359       1.248       mrg 	int i;
   2360         1.1  augustss 
   2361        1.82  augustss 	if (sc->sc_dying)
   2362  1.264.4.13     skrll 		return USBD_IOERROR;
   2363        1.82  augustss 
   2364  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2365  1.264.4.21     skrll 
   2366  1.264.4.21     skrll 	DPRINTFN(3, "xfer=%p len=%d flags=%d",
   2367  1.264.4.21     skrll 	    xfer, xfer->ux_length, xfer->ux_flags, 0);
   2368         1.1  augustss 
   2369        1.48  augustss #ifdef DIAGNOSTIC
   2370   1.264.4.7     skrll 	if (xfer->ux_rqflags & URQ_REQUEST)
   2371       1.163    provos 		panic("uhci_device_intr_transfer: a request");
   2372        1.48  augustss #endif
   2373         1.1  augustss 
   2374       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2375       1.248       mrg 
   2376   1.264.4.7     skrll 	endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2377       1.187     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2378       1.187     skrll 
   2379       1.187     skrll 	upipe->u.intr.isread = isread;
   2380       1.187     skrll 
   2381   1.264.4.7     skrll 	err = uhci_alloc_std_chain(upipe, sc, xfer->ux_length, isread,
   2382   1.264.4.7     skrll 				   xfer->ux_flags, &xfer->ux_dmabuf, &data,
   2383       1.187     skrll 				   &dataend);
   2384       1.248       mrg 	if (err) {
   2385       1.248       mrg 		mutex_exit(&sc->sc_lock);
   2386  1.264.4.13     skrll 		return err;
   2387       1.248       mrg 	}
   2388       1.248       mrg 
   2389        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2390       1.223    bouyer 	usb_syncmem(&dataend->dma,
   2391       1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2392       1.223    bouyer 	    sizeof(dataend->td.td_status),
   2393       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2394         1.1  augustss 
   2395  1.264.4.21     skrll 	DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0);
   2396        1.59  augustss #ifdef UHCI_DEBUG
   2397         1.1  augustss 	if (uhcidebug > 10) {
   2398        1.55  augustss 		uhci_dump_tds(data);
   2399         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2400         1.1  augustss 	}
   2401         1.1  augustss #endif
   2402  1.264.4.21     skrll 	DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0);
   2403         1.1  augustss 
   2404         1.1  augustss 	/* Set up interrupt info. */
   2405        1.63  augustss 	ii->xfer = xfer;
   2406        1.55  augustss 	ii->stdstart = data;
   2407        1.55  augustss 	ii->stdend = dataend;
   2408         1.7  augustss #ifdef DIAGNOSTIC
   2409        1.70  augustss 	if (!ii->isdone) {
   2410        1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2411        1.70  augustss 	}
   2412         1.7  augustss 	ii->isdone = 0;
   2413         1.7  augustss #endif
   2414         1.1  augustss 
   2415  1.264.4.21     skrll 	DPRINTFN(10, "qhs[0]=%p", upipe->u.intr.qhs[0], 0, 0, 0);
   2416         1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2417         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2418        1.55  augustss 		sqh->elink = data;
   2419       1.121  augustss 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2420       1.223    bouyer 		usb_syncmem(&sqh->dma,
   2421       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2422       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2423       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2424         1.1  augustss 	}
   2425        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2426   1.264.4.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   2427       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2428         1.1  augustss 
   2429  1.264.4.21     skrll 	DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0);
   2430        1.59  augustss #ifdef UHCI_DEBUG
   2431         1.1  augustss 	if (uhcidebug > 10) {
   2432        1.55  augustss 		uhci_dump_tds(data);
   2433         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2434         1.1  augustss 	}
   2435         1.1  augustss #endif
   2436  1.264.4.21     skrll 	DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0);
   2437         1.1  augustss 
   2438  1.264.4.13     skrll 	return USBD_IN_PROGRESS;
   2439         1.1  augustss }
   2440         1.1  augustss 
   2441         1.1  augustss /* Abort a device control request. */
   2442         1.1  augustss void
   2443       1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2444         1.1  augustss {
   2445       1.248       mrg #ifdef DIAGNOSTIC
   2446   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2447       1.248       mrg #endif
   2448       1.248       mrg 
   2449       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2450       1.248       mrg 
   2451  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2452        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2453         1.1  augustss }
   2454         1.1  augustss 
   2455         1.1  augustss /* Close a device control pipe. */
   2456         1.1  augustss void
   2457       1.205  christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2458         1.1  augustss {
   2459         1.1  augustss }
   2460         1.1  augustss 
   2461         1.1  augustss /* Abort a device interrupt request. */
   2462         1.1  augustss void
   2463       1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2464         1.1  augustss {
   2465       1.248       mrg #ifdef DIAGNOSTIC
   2466   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2467       1.248       mrg #endif
   2468       1.248       mrg 
   2469       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2470   1.264.4.7     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   2471       1.248       mrg 
   2472  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2473  1.264.4.21     skrll 	DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0);
   2474       1.264     skrll 
   2475        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2476         1.1  augustss }
   2477         1.1  augustss 
   2478         1.1  augustss /* Close a device interrupt pipe. */
   2479         1.1  augustss void
   2480       1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2481         1.1  augustss {
   2482         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2483   1.264.4.7     skrll 	uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   2484        1.92  augustss 	int i, npoll;
   2485       1.248       mrg 
   2486       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2487         1.1  augustss 
   2488         1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2489         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2490         1.1  augustss 	for (i = 0; i < npoll; i++)
   2491        1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2492         1.1  augustss 
   2493       1.152  augustss 	/*
   2494         1.1  augustss 	 * We now have to wait for any activity on the physical
   2495         1.1  augustss 	 * descriptors to stop.
   2496         1.1  augustss 	 */
   2497       1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   2498         1.1  augustss 
   2499         1.1  augustss 	for(i = 0; i < npoll; i++)
   2500         1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2501       1.248       mrg 	kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *));
   2502         1.1  augustss 
   2503         1.1  augustss 	/* XXX free other resources */
   2504         1.1  augustss }
   2505         1.1  augustss 
   2506         1.1  augustss usbd_status
   2507       1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2508         1.1  augustss {
   2509   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2510   1.264.4.7     skrll 	usb_device_request_t *req = &xfer->ux_request;
   2511   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2512   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2513   1.264.4.7     skrll 	int addr = dev->ud_addr;
   2514   1.264.4.7     skrll 	int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2515        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2516        1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2517         1.1  augustss 	uhci_soft_qh_t *sqh;
   2518         1.1  augustss 	int len;
   2519   1.264.4.1     skrll 	uint32_t ls;
   2520        1.63  augustss 	usbd_status err;
   2521         1.1  augustss 	int isread;
   2522       1.248       mrg 
   2523       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2524         1.1  augustss 
   2525  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2526  1.264.4.21     skrll 	DPRINTFN(3, "type=0x%02x, request=0x%02x, "
   2527  1.264.4.21     skrll 	    "wValue=0x%04x, wIndex=0x%04x",
   2528  1.264.4.21     skrll 	    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2529  1.264.4.21     skrll 	    UGETW(req->wIndex));
   2530  1.264.4.21     skrll 	DPRINTFN(3, "len=%d, addr=%d, endpt=%d",
   2531  1.264.4.21     skrll 	    UGETW(req->wLength), dev->ud_addr, endpt, 0);
   2532         1.1  augustss 
   2533   1.264.4.7     skrll 	ls = dev->ud_speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2534         1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2535         1.1  augustss 	len = UGETW(req->wLength);
   2536         1.1  augustss 
   2537         1.1  augustss 	setup = upipe->u.ctl.setup;
   2538         1.1  augustss 	stat = upipe->u.ctl.stat;
   2539         1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2540         1.1  augustss 
   2541         1.1  augustss 	/* Set up data transaction */
   2542         1.1  augustss 	if (len != 0) {
   2543        1.38  augustss 		upipe->nexttoggle = 1;
   2544   1.264.4.7     skrll 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->ux_flags,
   2545   1.264.4.7     skrll 					   &xfer->ux_dmabuf, &data, &dataend);
   2546        1.63  augustss 		if (err)
   2547  1.264.4.13     skrll 			return err;
   2548        1.55  augustss 		next = data;
   2549        1.55  augustss 		dataend->link.std = stat;
   2550       1.258     skrll 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_TD);
   2551       1.223    bouyer 		usb_syncmem(&dataend->dma,
   2552       1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2553       1.223    bouyer 		    sizeof(dataend->td.td_link),
   2554       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2555         1.1  augustss 	} else {
   2556         1.1  augustss 		next = stat;
   2557         1.1  augustss 	}
   2558         1.1  augustss 	upipe->u.ctl.length = len;
   2559         1.1  augustss 
   2560       1.159  augustss 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2561       1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   2562         1.1  augustss 
   2563        1.42  augustss 	setup->link.std = next;
   2564       1.258     skrll 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_TD);
   2565        1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2566        1.88   tsutsui 		UHCI_TD_ACTIVE);
   2567        1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2568       1.160  augustss 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2569       1.223    bouyer 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2570       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2571        1.42  augustss 
   2572        1.92  augustss 	stat->link.std = NULL;
   2573        1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2574       1.152  augustss 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2575        1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2576       1.152  augustss 	stat->td.td_token =
   2577        1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2578   1.264.4.2     skrll 				 UHCI_TD_IN (0, endpt, addr, 1));
   2579        1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2580       1.223    bouyer 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2581       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2582         1.1  augustss 
   2583  1.264.4.21     skrll 	DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0);
   2584        1.59  augustss #ifdef UHCI_DEBUG
   2585        1.67  augustss 	if (uhcidebug > 10) {
   2586  1.264.4.21     skrll 		DPRINTFN(10, "before transfer", 0, 0, 0, 0);
   2587        1.41  augustss 		uhci_dump_tds(setup);
   2588         1.1  augustss 	}
   2589         1.1  augustss #endif
   2590  1.264.4.21     skrll 	DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0);
   2591         1.1  augustss 
   2592         1.1  augustss 	/* Set up interrupt info. */
   2593        1.63  augustss 	ii->xfer = xfer;
   2594         1.1  augustss 	ii->stdstart = setup;
   2595         1.1  augustss 	ii->stdend = stat;
   2596         1.7  augustss #ifdef DIAGNOSTIC
   2597        1.70  augustss 	if (!ii->isdone) {
   2598        1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2599        1.70  augustss 	}
   2600         1.7  augustss 	ii->isdone = 0;
   2601         1.7  augustss #endif
   2602         1.1  augustss 
   2603        1.42  augustss 	sqh->elink = setup;
   2604       1.121  augustss 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2605       1.223    bouyer 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2606         1.1  augustss 
   2607   1.264.4.7     skrll 	if (dev->ud_speed == USB_SPEED_LOW)
   2608       1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2609       1.123  augustss 	else
   2610       1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2611        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2612  1.264.4.21     skrll 	DPRINTFN(12, "--- dump start ---", 0, 0, 0, 0);
   2613        1.59  augustss #ifdef UHCI_DEBUG
   2614         1.1  augustss 	if (uhcidebug > 12) {
   2615         1.1  augustss 		uhci_soft_td_t *std;
   2616         1.1  augustss 		uhci_soft_qh_t *xqh;
   2617        1.13  augustss 		uhci_soft_qh_t *sxqh;
   2618        1.13  augustss 		int maxqh = 0;
   2619         1.1  augustss 		uhci_physaddr_t link;
   2620  1.264.4.21     skrll 		DPRINTFN(12, "follow from [0]", 0, 0, 0, 0);
   2621         1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2622       1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2623        1.42  augustss 		     std = std->link.std) {
   2624        1.88   tsutsui 			link = le32toh(std->td.td_link);
   2625         1.1  augustss 			uhci_dump_td(std);
   2626         1.1  augustss 		}
   2627        1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2628        1.67  augustss 		uhci_dump_qh(sxqh);
   2629        1.67  augustss 		for (xqh = sxqh;
   2630        1.63  augustss 		     xqh != NULL;
   2631       1.152  augustss 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2632   1.264.4.2     skrll 			xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2633         1.1  augustss 			uhci_dump_qh(xqh);
   2634        1.13  augustss 		}
   2635  1.264.4.21     skrll 		DPRINTFN(12, "Enqueued QH:", 0, 0, 0, 0);
   2636         1.1  augustss 		uhci_dump_qh(sqh);
   2637        1.42  augustss 		uhci_dump_tds(sqh->elink);
   2638         1.1  augustss 	}
   2639         1.1  augustss #endif
   2640  1.264.4.21     skrll 	DPRINTFN(12, "--- dump end ---", 0, 0, 0, 0);
   2641   1.264.4.7     skrll 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   2642   1.264.4.7     skrll 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   2643        1.91  augustss 			    uhci_timeout, ii);
   2644        1.13  augustss 	}
   2645   1.264.4.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   2646         1.1  augustss 
   2647  1.264.4.13     skrll 	return USBD_NORMAL_COMPLETION;
   2648         1.1  augustss }
   2649         1.1  augustss 
   2650        1.16  augustss usbd_status
   2651       1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2652        1.16  augustss {
   2653   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2654        1.63  augustss 	usbd_status err;
   2655        1.48  augustss 
   2656  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2657  1.264.4.21     skrll 	DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0);
   2658        1.48  augustss 
   2659        1.48  augustss 	/* Put it on our queue, */
   2660       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2661        1.63  augustss 	err = usb_insert_transfer(xfer);
   2662       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2663        1.48  augustss 
   2664        1.48  augustss 	/* bail out on error, */
   2665        1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2666  1.264.4.13     skrll 		return err;
   2667        1.48  augustss 
   2668        1.48  augustss 	/* XXX should check inuse here */
   2669        1.48  augustss 
   2670        1.48  augustss 	/* insert into schedule, */
   2671        1.63  augustss 	uhci_device_isoc_enter(xfer);
   2672        1.48  augustss 
   2673       1.102  augustss 	/* and start if the pipe wasn't running */
   2674        1.67  augustss 	if (!err)
   2675   1.264.4.7     skrll 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2676        1.48  augustss 
   2677  1.264.4.13     skrll 	return err;
   2678        1.48  augustss }
   2679        1.48  augustss 
   2680        1.48  augustss void
   2681       1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2682        1.48  augustss {
   2683   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2684   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2685   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2686        1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2687       1.152  augustss 	uhci_soft_td_t *std;
   2688   1.264.4.1     skrll 	uint32_t buf, len, status, offs;
   2689       1.248       mrg 	int i, next, nframes;
   2690   1.264.4.7     skrll 	int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN;
   2691        1.48  augustss 
   2692  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2693  1.264.4.21     skrll 	DPRINTFN(5, "used=%d next=%d xfer=%p nframes=%d",
   2694  1.264.4.21     skrll 	    iso->inuse, iso->next, xfer, xfer->ux_nframes);
   2695        1.48  augustss 
   2696        1.82  augustss 	if (sc->sc_dying)
   2697        1.82  augustss 		return;
   2698        1.82  augustss 
   2699   1.264.4.7     skrll 	if (xfer->ux_status == USBD_IN_PROGRESS) {
   2700        1.48  augustss 		/* This request has already been entered into the frame list */
   2701        1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2702        1.68  augustss 		/* XXX */
   2703        1.48  augustss 	}
   2704        1.48  augustss 
   2705        1.48  augustss #ifdef DIAGNOSTIC
   2706        1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2707        1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   2708        1.19  augustss #endif
   2709        1.16  augustss 
   2710        1.48  augustss 	next = iso->next;
   2711        1.48  augustss 	if (next == -1) {
   2712        1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   2713        1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2714  1.264.4.21     skrll 		DPRINTFN(2, "start next=%d", next, 0, 0, 0);
   2715        1.48  augustss 	}
   2716        1.48  augustss 
   2717   1.264.4.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   2718        1.92  augustss 	UXFER(xfer)->curframe = next;
   2719        1.48  augustss 
   2720   1.264.4.7     skrll 	buf = DMAADDR(&xfer->ux_dmabuf, 0);
   2721       1.223    bouyer 	offs = 0;
   2722        1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2723        1.88   tsutsui 				     UHCI_TD_ACTIVE |
   2724        1.88   tsutsui 				     UHCI_TD_IOS);
   2725   1.264.4.7     skrll 	nframes = xfer->ux_nframes;
   2726       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2727        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2728        1.48  augustss 		std = iso->stds[next];
   2729        1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2730        1.48  augustss 			next = 0;
   2731   1.264.4.7     skrll 		len = xfer->ux_frlengths[i];
   2732        1.88   tsutsui 		std->td.td_buffer = htole32(buf);
   2733   1.264.4.7     skrll 		usb_syncmem(&xfer->ux_dmabuf, offs, len,
   2734       1.223    bouyer 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2735        1.48  augustss 		if (i == nframes - 1)
   2736        1.88   tsutsui 			status |= UHCI_TD_IOC;
   2737        1.88   tsutsui 		std->td.td_status = htole32(status);
   2738        1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2739        1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2740       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2741       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2742  1.264.4.21     skrll 		DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
   2743        1.59  augustss #ifdef UHCI_DEBUG
   2744        1.48  augustss 		if (uhcidebug > 5) {
   2745  1.264.4.21     skrll 			DPRINTFN(1, "TD %d", i, 0, 0, 0);
   2746        1.48  augustss 			uhci_dump_td(std);
   2747        1.48  augustss 		}
   2748        1.48  augustss #endif
   2749  1.264.4.21     skrll 		DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
   2750        1.48  augustss 		buf += len;
   2751       1.223    bouyer 		offs += len;
   2752        1.48  augustss 	}
   2753        1.48  augustss 	iso->next = next;
   2754   1.264.4.7     skrll 	iso->inuse += xfer->ux_nframes;
   2755        1.16  augustss 
   2756       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2757        1.16  augustss }
   2758        1.16  augustss 
   2759        1.16  augustss usbd_status
   2760       1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   2761        1.16  augustss {
   2762   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2763   1.264.4.7     skrll 	uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv;
   2764        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2765        1.48  augustss 	uhci_soft_td_t *end;
   2766       1.248       mrg 	int i;
   2767        1.48  augustss 
   2768  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2769  1.264.4.21     skrll 	DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0);
   2770        1.96  augustss 
   2771       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2772       1.248       mrg 
   2773       1.248       mrg 	if (sc->sc_dying) {
   2774       1.248       mrg 		mutex_exit(&sc->sc_lock);
   2775  1.264.4.13     skrll 		return USBD_IOERROR;
   2776       1.248       mrg 	}
   2777        1.82  augustss 
   2778        1.48  augustss #ifdef DIAGNOSTIC
   2779   1.264.4.7     skrll 	if (xfer->ux_status != USBD_IN_PROGRESS)
   2780        1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2781        1.48  augustss #endif
   2782        1.48  augustss 
   2783        1.48  augustss 	/* Find the last TD */
   2784   1.264.4.7     skrll 	i = UXFER(xfer)->curframe + xfer->ux_nframes;
   2785        1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   2786        1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   2787        1.48  augustss 	end = upipe->u.iso.stds[i];
   2788        1.48  augustss 
   2789        1.96  augustss #ifdef DIAGNOSTIC
   2790        1.96  augustss 	if (end == NULL) {
   2791        1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   2792  1.264.4.13     skrll 		return USBD_INVAL;
   2793        1.96  augustss 	}
   2794        1.96  augustss #endif
   2795        1.96  augustss 
   2796        1.48  augustss 	/* Set up interrupt info. */
   2797        1.63  augustss 	ii->xfer = xfer;
   2798        1.48  augustss 	ii->stdstart = end;
   2799        1.48  augustss 	ii->stdend = end;
   2800        1.48  augustss #ifdef DIAGNOSTIC
   2801       1.102  augustss 	if (!ii->isdone)
   2802        1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2803        1.48  augustss 	ii->isdone = 0;
   2804        1.48  augustss #endif
   2805        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2806       1.152  augustss 
   2807       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2808        1.48  augustss 
   2809  1.264.4.13     skrll 	return USBD_IN_PROGRESS;
   2810        1.16  augustss }
   2811        1.16  augustss 
   2812        1.16  augustss void
   2813       1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2814        1.16  augustss {
   2815       1.248       mrg #ifdef DIAGNOSTIC
   2816   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2817       1.248       mrg #endif
   2818   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   2819        1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2820        1.48  augustss 	uhci_soft_td_t *std;
   2821       1.248       mrg 	int i, n, nframes, maxlen, len;
   2822        1.92  augustss 
   2823       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2824        1.92  augustss 
   2825        1.92  augustss 	/* Transfer is already done. */
   2826   1.264.4.7     skrll 	if (xfer->ux_status != USBD_NOT_STARTED &&
   2827   1.264.4.7     skrll 	    xfer->ux_status != USBD_IN_PROGRESS) {
   2828        1.92  augustss 		return;
   2829        1.92  augustss 	}
   2830        1.48  augustss 
   2831        1.92  augustss 	/* Give xfer the requested abort code. */
   2832   1.264.4.7     skrll 	xfer->ux_status = USBD_CANCELLED;
   2833        1.48  augustss 
   2834        1.48  augustss 	/* make hardware ignore it, */
   2835   1.264.4.7     skrll 	nframes = xfer->ux_nframes;
   2836        1.92  augustss 	n = UXFER(xfer)->curframe;
   2837        1.92  augustss 	maxlen = 0;
   2838        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2839        1.48  augustss 		std = stds[n];
   2840       1.223    bouyer 		usb_syncmem(&std->dma,
   2841       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2842       1.223    bouyer 		    sizeof(std->td.td_status),
   2843       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2844        1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2845       1.223    bouyer 		usb_syncmem(&std->dma,
   2846       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2847       1.223    bouyer 		    sizeof(std->td.td_status),
   2848       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2849       1.223    bouyer 		usb_syncmem(&std->dma,
   2850       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_token),
   2851       1.223    bouyer 		    sizeof(std->td.td_token),
   2852       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2853       1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2854        1.92  augustss 		if (len > maxlen)
   2855        1.92  augustss 			maxlen = len;
   2856        1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2857        1.48  augustss 			n = 0;
   2858        1.48  augustss 	}
   2859        1.48  augustss 
   2860        1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   2861        1.92  augustss 	delay(maxlen);
   2862        1.92  augustss 
   2863        1.96  augustss #ifdef DIAGNOSTIC
   2864        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   2865        1.96  augustss #endif
   2866        1.92  augustss 	/* Run callback and remove from interrupt list. */
   2867        1.92  augustss 	usb_transfer_complete(xfer);
   2868        1.48  augustss 
   2869       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2870        1.16  augustss }
   2871        1.16  augustss 
   2872        1.16  augustss void
   2873       1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   2874        1.16  augustss {
   2875        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2876   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2877   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2878        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2879        1.16  augustss 	struct iso *iso;
   2880       1.248       mrg 	int i;
   2881       1.248       mrg 
   2882       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2883        1.16  augustss 
   2884        1.16  augustss 	/*
   2885        1.16  augustss 	 * Make sure all TDs are marked as inactive.
   2886        1.16  augustss 	 * Wait for completion.
   2887        1.16  augustss 	 * Unschedule.
   2888        1.16  augustss 	 * Deallocate.
   2889        1.16  augustss 	 */
   2890        1.16  augustss 	iso = &upipe->u.iso;
   2891        1.16  augustss 
   2892       1.223    bouyer 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2893       1.223    bouyer 		std = iso->stds[i];
   2894       1.223    bouyer 		usb_syncmem(&std->dma,
   2895       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2896       1.223    bouyer 		    sizeof(std->td.td_status),
   2897       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2898       1.223    bouyer 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2899       1.223    bouyer 		usb_syncmem(&std->dma,
   2900       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2901       1.223    bouyer 		    sizeof(std->td.td_status),
   2902       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2903       1.223    bouyer 	}
   2904       1.248       mrg 	/* wait for completion */
   2905       1.248       mrg 	usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   2906        1.16  augustss 
   2907        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2908        1.16  augustss 		std = iso->stds[i];
   2909        1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   2910        1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   2911        1.42  augustss 		     vstd = vstd->link.std)
   2912        1.16  augustss 			;
   2913        1.67  augustss 		if (vstd == NULL) {
   2914        1.16  augustss 			/*panic*/
   2915        1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   2916       1.248       mrg 			mutex_exit(&sc->sc_lock);
   2917        1.16  augustss 			return;
   2918        1.16  augustss 		}
   2919        1.42  augustss 		vstd->link = std->link;
   2920       1.223    bouyer 		usb_syncmem(&std->dma,
   2921       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2922       1.223    bouyer 		    sizeof(std->td.td_link),
   2923       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2924        1.42  augustss 		vstd->td.td_link = std->td.td_link;
   2925       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2926       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2927       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2928       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2929        1.16  augustss 		uhci_free_std(sc, std);
   2930        1.16  augustss 	}
   2931        1.16  augustss 
   2932       1.248       mrg 	kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *));
   2933        1.16  augustss }
   2934        1.16  augustss 
   2935        1.16  augustss usbd_status
   2936       1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   2937        1.16  augustss {
   2938        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2939   1.264.4.7     skrll 	usbd_device_handle dev = upipe->pipe.up_dev;
   2940   1.264.4.7     skrll 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2941   1.264.4.7     skrll 	int addr = upipe->pipe.up_dev->ud_addr;
   2942   1.264.4.7     skrll 	int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2943        1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2944        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2945   1.264.4.1     skrll 	uint32_t token;
   2946        1.16  augustss 	struct iso *iso;
   2947       1.248       mrg 	int i;
   2948        1.16  augustss 
   2949        1.16  augustss 	iso = &upipe->u.iso;
   2950       1.248       mrg 	iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT *
   2951       1.248       mrg 				 sizeof (uhci_soft_td_t *),
   2952       1.248       mrg 			       KM_SLEEP);
   2953       1.248       mrg 	if (iso->stds == NULL)
   2954       1.248       mrg 		return USBD_NOMEM;
   2955        1.16  augustss 
   2956        1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2957        1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2958        1.16  augustss 
   2959       1.248       mrg 	mutex_enter(&sc->sc_lock);
   2960       1.248       mrg 
   2961        1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   2962        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2963        1.48  augustss 		std = uhci_alloc_std(sc);
   2964        1.48  augustss 		if (std == 0)
   2965        1.48  augustss 			goto bad;
   2966        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2967        1.88   tsutsui 		std->td.td_token = htole32(token);
   2968       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2969       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2970        1.48  augustss 		iso->stds[i] = std;
   2971        1.16  augustss 	}
   2972        1.16  augustss 
   2973        1.48  augustss 	/* Insert TDs into schedule. */
   2974        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2975        1.16  augustss 		std = iso->stds[i];
   2976        1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   2977       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2978       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2979       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2980       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2981        1.42  augustss 		std->link = vstd->link;
   2982        1.42  augustss 		std->td.td_link = vstd->td.td_link;
   2983       1.223    bouyer 		usb_syncmem(&std->dma,
   2984       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2985       1.223    bouyer 		    sizeof(std->td.td_link),
   2986       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2987        1.42  augustss 		vstd->link.std = std;
   2988       1.121  augustss 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2989       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2990       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2991       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2992       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2993        1.16  augustss 	}
   2994       1.248       mrg 	mutex_exit(&sc->sc_lock);
   2995        1.16  augustss 
   2996        1.48  augustss 	iso->next = -1;
   2997        1.48  augustss 	iso->inuse = 0;
   2998        1.48  augustss 
   2999  1.264.4.13     skrll 	return USBD_NORMAL_COMPLETION;
   3000        1.16  augustss 
   3001        1.48  augustss  bad:
   3002        1.16  augustss 	while (--i >= 0)
   3003        1.16  augustss 		uhci_free_std(sc, iso->stds[i]);
   3004       1.248       mrg 	mutex_exit(&sc->sc_lock);
   3005       1.248       mrg 	kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *));
   3006  1.264.4.13     skrll 	return USBD_NOMEM;
   3007        1.16  augustss }
   3008        1.16  augustss 
   3009        1.16  augustss void
   3010       1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   3011        1.16  augustss {
   3012        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3013   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   3014       1.223    bouyer 	int i, offs;
   3015   1.264.4.7     skrll 	int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN;
   3016       1.223    bouyer 
   3017        1.48  augustss 
   3018  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3019  1.264.4.21     skrll 	DPRINTFN(4, "length=%d, ux_state=0x%08x",
   3020  1.264.4.21     skrll 	    xfer->ux_actlen, xfer->ux_state, 0, 0);
   3021        1.93  augustss 
   3022        1.96  augustss 	if (ii->xfer != xfer)
   3023        1.96  augustss 		/* Not on interrupt list, ignore it. */
   3024       1.170  augustss 		return;
   3025       1.170  augustss 
   3026       1.170  augustss 	if (!uhci_active_intr_info(ii))
   3027        1.96  augustss 		return;
   3028        1.96  augustss 
   3029        1.93  augustss #ifdef DIAGNOSTIC
   3030   1.264.4.2     skrll 	if (ii->stdend == NULL) {
   3031   1.264.4.2     skrll 		printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   3032        1.93  augustss #ifdef UHCI_DEBUG
   3033        1.93  augustss 		uhci_dump_ii(ii);
   3034        1.93  augustss #endif
   3035        1.93  augustss 		return;
   3036        1.93  augustss 	}
   3037        1.93  augustss #endif
   3038        1.48  augustss 
   3039        1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   3040       1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   3041       1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   3042       1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   3043       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3044        1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   3045       1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   3046       1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   3047       1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   3048       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3049        1.48  augustss 
   3050        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3051       1.223    bouyer 
   3052       1.223    bouyer 	offs = 0;
   3053   1.264.4.7     skrll 	for (i = 0; i < xfer->ux_nframes; i++) {
   3054   1.264.4.7     skrll 		usb_syncmem(&xfer->ux_dmabuf, offs, xfer->ux_frlengths[i],
   3055       1.223    bouyer 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3056   1.264.4.7     skrll 		offs += xfer->ux_frlengths[i];
   3057       1.223    bouyer 	}
   3058        1.16  augustss }
   3059        1.16  augustss 
   3060         1.1  augustss void
   3061       1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   3062         1.1  augustss {
   3063        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3064         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3065   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   3066         1.1  augustss 	uhci_soft_qh_t *sqh;
   3067       1.223    bouyer 	int i, npoll, isread;
   3068         1.1  augustss 
   3069  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3070  1.264.4.21     skrll 	DPRINTFN(5, "length=%d", xfer->ux_actlen, 0, 0, 0);
   3071         1.1  augustss 
   3072   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   3073       1.248       mrg 
   3074         1.1  augustss 	npoll = upipe->u.intr.npoll;
   3075         1.1  augustss 	for(i = 0; i < npoll; i++) {
   3076         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   3077       1.121  augustss 		sqh->elink = NULL;
   3078        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3079       1.223    bouyer 		usb_syncmem(&sqh->dma,
   3080       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3081       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3082       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3083         1.1  augustss 	}
   3084       1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3085         1.1  augustss 
   3086   1.264.4.7     skrll 	isread = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN;
   3087   1.264.4.7     skrll 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   3088       1.223    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3089       1.223    bouyer 
   3090         1.1  augustss 	/* XXX Wasteful. */
   3091   1.264.4.7     skrll 	if (xfer->ux_pipe->up_repeat) {
   3092        1.55  augustss 		uhci_soft_td_t *data, *dataend;
   3093         1.1  augustss 
   3094  1.264.4.21     skrll 		DPRINTFN(5, "re-queueing", 0, 0, 0, 0);
   3095        1.92  augustss 
   3096         1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   3097   1.264.4.7     skrll 		uhci_alloc_std_chain(upipe, sc, xfer->ux_length,
   3098   1.264.4.7     skrll 				     upipe->u.intr.isread, xfer->ux_flags,
   3099   1.264.4.7     skrll 				     &xfer->ux_dmabuf, &data, &dataend);
   3100        1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   3101       1.223    bouyer 		usb_syncmem(&dataend->dma,
   3102       1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_status),
   3103       1.223    bouyer 		    sizeof(dataend->td.td_status),
   3104       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3105         1.1  augustss 
   3106  1.264.4.21     skrll 		DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0);
   3107        1.59  augustss #ifdef UHCI_DEBUG
   3108         1.1  augustss 		if (uhcidebug > 10) {
   3109        1.55  augustss 			uhci_dump_tds(data);
   3110         1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   3111         1.1  augustss 		}
   3112         1.1  augustss #endif
   3113  1.264.4.21     skrll 		DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0);
   3114         1.1  augustss 
   3115        1.55  augustss 		ii->stdstart = data;
   3116        1.55  augustss 		ii->stdend = dataend;
   3117         1.7  augustss #ifdef DIAGNOSTIC
   3118        1.70  augustss 		if (!ii->isdone) {
   3119        1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   3120        1.70  augustss 		}
   3121         1.7  augustss 		ii->isdone = 0;
   3122         1.7  augustss #endif
   3123         1.1  augustss 		for (i = 0; i < npoll; i++) {
   3124         1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   3125        1.55  augustss 			sqh->elink = data;
   3126       1.121  augustss 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   3127       1.223    bouyer 			usb_syncmem(&sqh->dma,
   3128       1.223    bouyer 			    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3129       1.223    bouyer 			    sizeof(sqh->qh.qh_elink),
   3130       1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3131         1.1  augustss 		}
   3132   1.264.4.7     skrll 		xfer->ux_status = USBD_IN_PROGRESS;
   3133        1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   3134         1.1  augustss 	} else {
   3135  1.264.4.21     skrll 		DPRINTFN(5, "removing", 0, 0, 0, 0);
   3136       1.169  augustss 		if (uhci_active_intr_info(ii))
   3137       1.169  augustss 			uhci_del_intr_info(ii);
   3138         1.1  augustss 	}
   3139         1.1  augustss }
   3140         1.1  augustss 
   3141         1.1  augustss /* Deallocate request data structures */
   3142         1.1  augustss void
   3143       1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   3144         1.1  augustss {
   3145        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3146         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3147   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   3148   1.264.4.7     skrll 	int len = UGETW(xfer->ux_request.wLength);
   3149   1.264.4.7     skrll 	int isread = (xfer->ux_request.bmRequestType & UT_READ);
   3150         1.1  augustss 
   3151   1.264.4.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   3152       1.248       mrg 
   3153  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3154         1.7  augustss #ifdef DIAGNOSTIC
   3155   1.264.4.7     skrll 	if (!(xfer->ux_rqflags & URQ_REQUEST))
   3156       1.173      gson 		panic("uhci_device_ctrl_done: not a request");
   3157         1.7  augustss #endif
   3158         1.1  augustss 
   3159       1.169  augustss 	if (!uhci_active_intr_info(ii))
   3160       1.169  augustss 		return;
   3161       1.169  augustss 
   3162        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3163         1.1  augustss 
   3164   1.264.4.7     skrll 	if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW)
   3165       1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   3166       1.123  augustss 	else
   3167       1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   3168         1.1  augustss 
   3169        1.49  augustss 	if (upipe->u.ctl.length != 0)
   3170        1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   3171        1.49  augustss 
   3172       1.223    bouyer 	if (len) {
   3173   1.264.4.7     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   3174       1.223    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3175       1.223    bouyer 	}
   3176       1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0,
   3177       1.223    bouyer 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3178       1.223    bouyer 
   3179  1.264.4.21     skrll 	DPRINTFN(1, "length=%d", xfer->ux_actlen, 0, 0, 0);
   3180         1.1  augustss }
   3181         1.1  augustss 
   3182         1.1  augustss /* Deallocate request data structures */
   3183         1.1  augustss void
   3184       1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   3185         1.1  augustss {
   3186        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3187         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3188   1.264.4.7     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe;
   3189       1.169  augustss 
   3190  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3191  1.264.4.21     skrll 	DPRINTFN(5, "xfer=%p ii=%p sc=%p upipe=%p", xfer, ii, sc,
   3192  1.264.4.21     skrll 	    upipe);
   3193       1.169  augustss 
   3194       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3195       1.248       mrg 
   3196       1.169  augustss 	if (!uhci_active_intr_info(ii))
   3197       1.169  augustss 		return;
   3198         1.1  augustss 
   3199        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3200         1.1  augustss 
   3201         1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   3202        1.32  augustss 
   3203       1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3204        1.32  augustss 
   3205  1.264.4.21     skrll 	DPRINTFN(5, "length=%d", xfer->ux_actlen, 0, 0, 0);
   3206         1.1  augustss }
   3207         1.1  augustss 
   3208         1.1  augustss /* Add interrupt QH, called with vflock. */
   3209         1.1  augustss void
   3210       1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3211         1.1  augustss {
   3212        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3213        1.42  augustss 	uhci_soft_qh_t *eqh;
   3214         1.1  augustss 
   3215  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3216  1.264.4.21     skrll 	DPRINTFN(4, "n=%d sqh=%p", sqh->pos, sqh, 0, 0);
   3217        1.92  augustss 
   3218        1.42  augustss 	eqh = vf->eqh;
   3219       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3220       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3221       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   3222        1.42  augustss 	sqh->hlink       = eqh->hlink;
   3223        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3224       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3225       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3226       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3227        1.42  augustss 	eqh->hlink       = sqh;
   3228       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3229       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3230       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3231       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3232         1.1  augustss 	vf->eqh = sqh;
   3233         1.1  augustss 	vf->bandwidth++;
   3234         1.1  augustss }
   3235         1.1  augustss 
   3236       1.119  augustss /* Remove interrupt QH. */
   3237         1.1  augustss void
   3238       1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3239         1.1  augustss {
   3240        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3241         1.1  augustss 	uhci_soft_qh_t *pqh;
   3242         1.1  augustss 
   3243  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3244  1.264.4.21     skrll 	DPRINTFN(4, "n=%d sqh=%p", sqh->pos, sqh, 0, 0);
   3245         1.1  augustss 
   3246       1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   3247       1.223    bouyer 
   3248       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3249       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   3250       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3251       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3252       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3253       1.223    bouyer 		usb_syncmem(&sqh->dma,
   3254       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3255       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3256       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3257       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   3258       1.124  augustss 	}
   3259       1.124  augustss 
   3260        1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3261       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3262       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3263       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3264        1.42  augustss 	pqh->hlink       = sqh->hlink;
   3265        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3266       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3267       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   3268       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3269       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   3270         1.1  augustss 	if (vf->eqh == sqh)
   3271         1.1  augustss 		vf->eqh = pqh;
   3272         1.1  augustss 	vf->bandwidth--;
   3273         1.1  augustss }
   3274         1.1  augustss 
   3275         1.1  augustss usbd_status
   3276       1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3277         1.1  augustss {
   3278         1.1  augustss 	uhci_soft_qh_t *sqh;
   3279       1.248       mrg 	int i, npoll;
   3280         1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   3281         1.1  augustss 
   3282  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3283  1.264.4.21     skrll 	DPRINTFN(2, "pipe=%p", upipe, 0, 0, 0);
   3284         1.1  augustss 	if (ival == 0) {
   3285       1.173      gson 		printf("uhci_device_setintr: 0 interval\n");
   3286  1.264.4.13     skrll 		return USBD_INVAL;
   3287         1.1  augustss 	}
   3288         1.1  augustss 
   3289         1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   3290         1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   3291         1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3292  1.264.4.21     skrll 	DPRINTFN(1, "ival=%d npoll=%d", ival, npoll, 0, 0);
   3293         1.1  augustss 
   3294         1.1  augustss 	upipe->u.intr.npoll = npoll;
   3295       1.152  augustss 	upipe->u.intr.qhs =
   3296       1.248       mrg 		kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP);
   3297       1.248       mrg 	if (upipe->u.intr.qhs == NULL)
   3298       1.248       mrg 		return USBD_NOMEM;
   3299         1.1  augustss 
   3300       1.152  augustss 	/*
   3301         1.1  augustss 	 * Figure out which offset in the schedule that has most
   3302         1.1  augustss 	 * bandwidth left over.
   3303         1.1  augustss 	 */
   3304         1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3305         1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3306         1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   3307         1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3308         1.1  augustss 		if (bw < bestbw) {
   3309         1.1  augustss 			bestbw = bw;
   3310         1.1  augustss 			bestoffs = offs;
   3311         1.1  augustss 		}
   3312         1.1  augustss 	}
   3313  1.264.4.21     skrll 	DPRINTFN(1, "bw=%d offs=%d", bestbw, bestoffs, 0, 0);
   3314       1.248       mrg 	mutex_enter(&sc->sc_lock);
   3315         1.1  augustss 	for(i = 0; i < npoll; i++) {
   3316         1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3317       1.121  augustss 		sqh->elink = NULL;
   3318        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3319       1.223    bouyer 		usb_syncmem(&sqh->dma,
   3320       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3321       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3322       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3323         1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   3324         1.1  augustss 	}
   3325         1.1  augustss #undef MOD
   3326         1.1  augustss 
   3327         1.1  augustss 	/* Enter QHs into the controller data structures. */
   3328         1.1  augustss 	for(i = 0; i < npoll; i++)
   3329        1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   3330       1.248       mrg 	mutex_exit(&sc->sc_lock);
   3331         1.1  augustss 
   3332  1.264.4.21     skrll 	DPRINTFN(5, "returns %p", upipe, 0, 0, 0);
   3333  1.264.4.21     skrll 
   3334  1.264.4.13     skrll 	return USBD_NORMAL_COMPLETION;
   3335         1.1  augustss }
   3336         1.1  augustss 
   3337         1.1  augustss /* Open a new pipe. */
   3338         1.1  augustss usbd_status
   3339       1.119  augustss uhci_open(usbd_pipe_handle pipe)
   3340         1.1  augustss {
   3341   1.264.4.7     skrll 	uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   3342  1.264.4.12     skrll 	struct usbd_bus *bus = pipe->up_dev->ud_bus;
   3343         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3344   1.264.4.7     skrll 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
   3345       1.248       mrg 	usbd_status err = USBD_NOMEM;
   3346        1.79  augustss 	int ival;
   3347         1.1  augustss 
   3348  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3349  1.264.4.21     skrll 	DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)",
   3350  1.264.4.21     skrll 	    pipe, pipe->up_dev->ud_addr, ed->bEndpointAddress, bus->ub_rhaddr);
   3351        1.92  augustss 
   3352       1.248       mrg 	if (sc->sc_dying)
   3353       1.248       mrg 		return USBD_IOERROR;
   3354       1.248       mrg 
   3355        1.92  augustss 	upipe->aborting = 0;
   3356       1.236  drochner 	/* toggle state needed for bulk endpoints */
   3357   1.264.4.7     skrll 	upipe->nexttoggle = pipe->up_endpoint->ue_toggle;
   3358        1.92  augustss 
   3359  1.264.4.12     skrll 	if (pipe->up_dev->ud_addr == bus->ub_rhaddr) {
   3360         1.1  augustss 		switch (ed->bEndpointAddress) {
   3361         1.1  augustss 		case USB_CONTROL_ENDPOINT:
   3362  1.264.4.12     skrll 			pipe->up_methods = &roothub_ctrl_methods;
   3363         1.1  augustss 			break;
   3364  1.264.4.12     skrll 		case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
   3365   1.264.4.7     skrll 			pipe->up_methods = &uhci_root_intr_methods;
   3366         1.1  augustss 			break;
   3367         1.1  augustss 		default:
   3368  1.264.4.13     skrll 			return USBD_INVAL;
   3369         1.1  augustss 		}
   3370         1.1  augustss 	} else {
   3371         1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3372         1.1  augustss 		case UE_CONTROL:
   3373   1.264.4.7     skrll 			pipe->up_methods = &uhci_device_ctrl_methods;
   3374         1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   3375        1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   3376         1.5  augustss 				goto bad;
   3377         1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   3378        1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   3379         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3380         1.5  augustss 				goto bad;
   3381         1.5  augustss 			}
   3382         1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   3383        1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   3384         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3385         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3386         1.5  augustss 				goto bad;
   3387         1.5  augustss 			}
   3388       1.152  augustss 			err = usb_allocmem(&sc->sc_bus,
   3389       1.152  augustss 				  sizeof(usb_device_request_t),
   3390        1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   3391        1.63  augustss 			if (err) {
   3392         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3393         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3394         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   3395         1.5  augustss 				goto bad;
   3396         1.5  augustss 			}
   3397         1.1  augustss 			break;
   3398         1.1  augustss 		case UE_INTERRUPT:
   3399   1.264.4.7     skrll 			pipe->up_methods = &uhci_device_intr_methods;
   3400   1.264.4.7     skrll 			ival = pipe->up_interval;
   3401        1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   3402        1.79  augustss 				ival = ed->bInterval;
   3403  1.264.4.13     skrll 			return uhci_device_setintr(sc, upipe, ival);
   3404         1.1  augustss 		case UE_ISOCHRONOUS:
   3405   1.264.4.7     skrll 			pipe->up_methods = &uhci_device_isoc_methods;
   3406  1.264.4.13     skrll 			return uhci_setup_isoc(pipe);
   3407         1.1  augustss 		case UE_BULK:
   3408   1.264.4.7     skrll 			pipe->up_methods = &uhci_device_bulk_methods;
   3409         1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   3410        1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   3411         1.5  augustss 				goto bad;
   3412         1.1  augustss 			break;
   3413         1.1  augustss 		}
   3414         1.1  augustss 	}
   3415  1.264.4.13     skrll 	return USBD_NORMAL_COMPLETION;
   3416         1.5  augustss 
   3417         1.5  augustss  bad:
   3418       1.248       mrg 	return USBD_NOMEM;
   3419         1.1  augustss }
   3420         1.1  augustss 
   3421         1.1  augustss /*
   3422         1.1  augustss  * Data structures and routines to emulate the root hub.
   3423         1.1  augustss  */
   3424         1.1  augustss /*
   3425       1.166   dsainty  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3426       1.166   dsainty  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3427       1.166   dsainty  * should not be used by the USB subsystem.  As we cannot issue a
   3428       1.166   dsainty  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3429       1.166   dsainty  * will be enabled as part of the reset.
   3430       1.166   dsainty  *
   3431       1.166   dsainty  * On the VT83C572, the port cannot be successfully enabled until the
   3432       1.166   dsainty  * outstanding "port enable change" and "connection status change"
   3433       1.166   dsainty  * events have been reset.
   3434       1.166   dsainty  */
   3435       1.166   dsainty Static usbd_status
   3436       1.166   dsainty uhci_portreset(uhci_softc_t *sc, int index)
   3437       1.166   dsainty {
   3438       1.166   dsainty 	int lim, port, x;
   3439  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3440       1.166   dsainty 
   3441       1.166   dsainty 	if (index == 1)
   3442       1.166   dsainty 		port = UHCI_PORTSC1;
   3443       1.166   dsainty 	else if (index == 2)
   3444       1.166   dsainty 		port = UHCI_PORTSC2;
   3445       1.166   dsainty 	else
   3446  1.264.4.13     skrll 		return USBD_IOERROR;
   3447       1.166   dsainty 
   3448       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3449       1.166   dsainty 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3450       1.166   dsainty 
   3451       1.166   dsainty 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3452       1.166   dsainty 
   3453  1.264.4.21     skrll 	DPRINTFN(1, "uhci port %d reset, status0 = 0x%04x", index,
   3454  1.264.4.21     skrll 	    UREAD2(sc, port), 0, 0);
   3455       1.166   dsainty 
   3456       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3457       1.222  drochner 	UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
   3458       1.166   dsainty 
   3459       1.166   dsainty 	delay(100);
   3460       1.166   dsainty 
   3461  1.264.4.21     skrll 	DPRINTFN(1, "uhci port %d reset, status1 = 0x%04x", index,
   3462  1.264.4.21     skrll 	    UREAD2(sc, port), 0, 0);
   3463       1.166   dsainty 
   3464       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3465       1.166   dsainty 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3466       1.166   dsainty 
   3467       1.166   dsainty 	for (lim = 10; --lim > 0;) {
   3468       1.166   dsainty 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3469       1.166   dsainty 
   3470       1.166   dsainty 		x = UREAD2(sc, port);
   3471  1.264.4.21     skrll 		DPRINTFN(1, "uhci port %d iteration %u, status = 0x%04x", index,
   3472  1.264.4.21     skrll 		    lim, x, 0);
   3473       1.166   dsainty 
   3474       1.166   dsainty 		if (!(x & UHCI_PORTSC_CCS)) {
   3475       1.166   dsainty 			/*
   3476       1.166   dsainty 			 * No device is connected (or was disconnected
   3477       1.166   dsainty 			 * during reset).  Consider the port reset.
   3478       1.166   dsainty 			 * The delay must be long enough to ensure on
   3479       1.166   dsainty 			 * the initial iteration that the device
   3480       1.166   dsainty 			 * connection will have been registered.  50ms
   3481       1.166   dsainty 			 * appears to be sufficient, but 20ms is not.
   3482       1.166   dsainty 			 */
   3483  1.264.4.21     skrll 			DPRINTFN(3, "uhci port %d loop %u, device detached",
   3484  1.264.4.21     skrll 			    index, lim, 0, 0);
   3485       1.166   dsainty 			break;
   3486       1.166   dsainty 		}
   3487       1.166   dsainty 
   3488       1.166   dsainty 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3489       1.166   dsainty 			/*
   3490       1.166   dsainty 			 * Port enabled changed and/or connection
   3491       1.166   dsainty 			 * status changed were set.  Reset either or
   3492       1.166   dsainty 			 * both raised flags (by writing a 1 to that
   3493       1.166   dsainty 			 * bit), and wait again for state to settle.
   3494       1.166   dsainty 			 */
   3495       1.166   dsainty 			UWRITE2(sc, port, URWMASK(x) |
   3496       1.166   dsainty 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3497       1.166   dsainty 			continue;
   3498       1.166   dsainty 		}
   3499       1.166   dsainty 
   3500       1.166   dsainty 		if (x & UHCI_PORTSC_PE)
   3501       1.166   dsainty 			/* Port is enabled */
   3502       1.166   dsainty 			break;
   3503       1.166   dsainty 
   3504       1.166   dsainty 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3505       1.166   dsainty 	}
   3506       1.166   dsainty 
   3507  1.264.4.21     skrll 	DPRINTFN(3, "uhci port %d reset, status2 = 0x%04x", index,
   3508  1.264.4.21     skrll 	    UREAD2(sc, port), 0, 0);
   3509       1.166   dsainty 
   3510       1.166   dsainty 	if (lim <= 0) {
   3511  1.264.4.21     skrll 		DPRINTFN(1, "uhci port %d reset timed out", index,
   3512  1.264.4.21     skrll 		    0, 0, 0);
   3513  1.264.4.13     skrll 		return USBD_TIMEOUT;
   3514       1.166   dsainty 	}
   3515       1.184     perry 
   3516       1.166   dsainty 	sc->sc_isreset = 1;
   3517  1.264.4.13     skrll 	return USBD_NORMAL_COMPLETION;
   3518       1.166   dsainty }
   3519       1.166   dsainty 
   3520  1.264.4.12     skrll Static int
   3521  1.264.4.12     skrll uhci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
   3522  1.264.4.12     skrll     void *buf, int buflen)
   3523         1.1  augustss {
   3524  1.264.4.12     skrll 	uhci_softc_t *sc = bus->ub_hcpriv;
   3525         1.1  augustss 	int port, x;
   3526  1.264.4.12     skrll 	int status, change, totlen = 0;
   3527  1.264.4.12     skrll 	uint16_t len, value, index;
   3528         1.1  augustss 	usb_port_status_t ps;
   3529        1.63  augustss 	usbd_status err;
   3530         1.1  augustss 
   3531  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3532  1.264.4.21     skrll 
   3533        1.82  augustss 	if (sc->sc_dying)
   3534  1.264.4.12     skrll 		return -1;
   3535         1.1  augustss 
   3536  1.264.4.21     skrll 	DPRINTFN(1, "type=0x%02x request=%02x", req->bmRequestType,
   3537  1.264.4.21     skrll 	    req->bRequest, 0, 0);
   3538         1.1  augustss 
   3539         1.1  augustss 	len = UGETW(req->wLength);
   3540         1.1  augustss 	value = UGETW(req->wValue);
   3541         1.1  augustss 	index = UGETW(req->wIndex);
   3542        1.49  augustss 
   3543         1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3544  1.264.4.12     skrll 	switch (C(req->bRequest, req->bmRequestType)) {
   3545         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3546  1.264.4.21     skrll 		DPRINTFN(1, "wValue=0x%04x", value, 0, 0, 0);
   3547       1.195  christos 		if (len == 0)
   3548       1.195  christos 			break;
   3549  1.264.4.12     skrll 		switch (value) {
   3550  1.264.4.12     skrll 		case C(0, UDESC_DEVICE): {
   3551  1.264.4.12     skrll 			usb_device_descriptor_t devd;
   3552  1.264.4.12     skrll 
   3553  1.264.4.12     skrll 			totlen = min(buflen, sizeof(devd));
   3554  1.264.4.12     skrll 			memcpy(&devd, buf, totlen);
   3555  1.264.4.12     skrll 			USETW(devd.idVendor, sc->sc_id_vendor);
   3556  1.264.4.12     skrll 			memcpy(buf, &devd, totlen);
   3557         1.1  augustss 			break;
   3558  1.264.4.12     skrll 		}
   3559  1.264.4.12     skrll 		case C(1, UDESC_STRING):
   3560       1.213  drochner #define sd ((usb_string_descriptor_t *)buf)
   3561  1.264.4.12     skrll 			/* Vendor */
   3562  1.264.4.12     skrll 			totlen = usb_makestrdesc(sd, len, sc->sc_vendor);
   3563  1.264.4.12     skrll 			break;
   3564  1.264.4.12     skrll 		case C(2, UDESC_STRING):
   3565  1.264.4.12     skrll 			/* Product */
   3566  1.264.4.12     skrll 			totlen = usb_makestrdesc(sd, len, "UHCI root hub");
   3567         1.1  augustss 			break;
   3568  1.264.4.12     skrll #undef sd
   3569         1.1  augustss 		default:
   3570  1.264.4.12     skrll 			/* default from usbroothub */
   3571  1.264.4.12     skrll 			return buflen;
   3572         1.1  augustss 		}
   3573         1.1  augustss 		break;
   3574  1.264.4.12     skrll 
   3575         1.1  augustss 	/* Hub requests */
   3576         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3577         1.1  augustss 		break;
   3578         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3579  1.264.4.21     skrll 		DPRINTFN(1, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", index,
   3580  1.264.4.21     skrll 		    value, 0, 0);
   3581         1.1  augustss 		if (index == 1)
   3582         1.1  augustss 			port = UHCI_PORTSC1;
   3583         1.1  augustss 		else if (index == 2)
   3584         1.1  augustss 			port = UHCI_PORTSC2;
   3585         1.1  augustss 		else {
   3586  1.264.4.12     skrll 			return -1;
   3587         1.1  augustss 		}
   3588         1.1  augustss 		switch(value) {
   3589         1.1  augustss 		case UHF_PORT_ENABLE:
   3590       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3591         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3592         1.1  augustss 			break;
   3593         1.1  augustss 		case UHF_PORT_SUSPEND:
   3594       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3595       1.222  drochner 			if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
   3596       1.222  drochner 				break;
   3597       1.222  drochner 			UWRITE2(sc, port, x | UHCI_PORTSC_RD);
   3598       1.222  drochner 			/* see USB2 spec ch. 7.1.7.7 */
   3599       1.222  drochner 			usb_delay_ms(&sc->sc_bus, 20);
   3600         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3601       1.222  drochner 			/* 10ms resume delay must be provided by caller */
   3602         1.1  augustss 			break;
   3603         1.1  augustss 		case UHF_PORT_RESET:
   3604       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3605         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3606         1.1  augustss 			break;
   3607         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3608       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3609         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3610         1.1  augustss 			break;
   3611         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3612       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3613         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3614         1.1  augustss 			break;
   3615         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3616       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3617         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3618         1.1  augustss 			break;
   3619         1.1  augustss 		case UHF_C_PORT_RESET:
   3620         1.1  augustss 			sc->sc_isreset = 0;
   3621  1.264.4.16     skrll 			break;
   3622         1.1  augustss 		case UHF_PORT_CONNECTION:
   3623         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3624         1.1  augustss 		case UHF_PORT_POWER:
   3625         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3626         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3627         1.1  augustss 		default:
   3628  1.264.4.12     skrll 			return -1;
   3629         1.1  augustss 		}
   3630         1.1  augustss 		break;
   3631         1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3632         1.1  augustss 		if (index == 1)
   3633         1.1  augustss 			port = UHCI_PORTSC1;
   3634         1.1  augustss 		else if (index == 2)
   3635         1.1  augustss 			port = UHCI_PORTSC2;
   3636         1.1  augustss 		else {
   3637  1.264.4.12     skrll 			return -1;
   3638         1.1  augustss 		}
   3639         1.1  augustss 		if (len > 0) {
   3640   1.264.4.1     skrll 			*(uint8_t *)buf =
   3641         1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3642         1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   3643         1.1  augustss 			totlen = 1;
   3644         1.1  augustss 		}
   3645         1.1  augustss 		break;
   3646         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3647       1.195  christos 		if (len == 0)
   3648       1.195  christos 			break;
   3649       1.177    toshii 		if ((value & 0xff) != 0) {
   3650  1.264.4.12     skrll 			return -1;
   3651         1.1  augustss 		}
   3652  1.264.4.12     skrll 		usb_hub_descriptor_t hubd;
   3653  1.264.4.12     skrll 
   3654  1.264.4.12     skrll 		totlen = min(buflen, sizeof(hubd));
   3655  1.264.4.12     skrll 		memcpy(&hubd, buf, totlen);
   3656  1.264.4.12     skrll 		hubd.bNbrPorts = 2;
   3657  1.264.4.12     skrll 		memcpy(buf, &hubd, totlen);
   3658         1.1  augustss 		break;
   3659         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3660         1.1  augustss 		if (len != 4) {
   3661  1.264.4.12     skrll 			return -1;
   3662         1.1  augustss 		}
   3663         1.1  augustss 		memset(buf, 0, len);
   3664         1.1  augustss 		totlen = len;
   3665         1.1  augustss 		break;
   3666         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3667         1.1  augustss 		if (index == 1)
   3668         1.1  augustss 			port = UHCI_PORTSC1;
   3669         1.1  augustss 		else if (index == 2)
   3670         1.1  augustss 			port = UHCI_PORTSC2;
   3671         1.1  augustss 		else {
   3672  1.264.4.12     skrll 			return -1;
   3673         1.1  augustss 		}
   3674         1.1  augustss 		if (len != 4) {
   3675  1.264.4.12     skrll 			return -1;
   3676         1.1  augustss 		}
   3677         1.1  augustss 		x = UREAD2(sc, port);
   3678         1.1  augustss 		status = change = 0;
   3679       1.142  augustss 		if (x & UHCI_PORTSC_CCS)
   3680         1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   3681       1.152  augustss 		if (x & UHCI_PORTSC_CSC)
   3682         1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   3683       1.152  augustss 		if (x & UHCI_PORTSC_PE)
   3684         1.1  augustss 			status |= UPS_PORT_ENABLED;
   3685       1.152  augustss 		if (x & UHCI_PORTSC_POEDC)
   3686         1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   3687       1.152  augustss 		if (x & UHCI_PORTSC_OCI)
   3688         1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   3689       1.152  augustss 		if (x & UHCI_PORTSC_OCIC)
   3690         1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3691       1.152  augustss 		if (x & UHCI_PORTSC_SUSP)
   3692         1.1  augustss 			status |= UPS_SUSPEND;
   3693       1.152  augustss 		if (x & UHCI_PORTSC_LSDA)
   3694         1.1  augustss 			status |= UPS_LOW_SPEED;
   3695         1.1  augustss 		status |= UPS_PORT_POWER;
   3696         1.1  augustss 		if (sc->sc_isreset)
   3697         1.1  augustss 			change |= UPS_C_PORT_RESET;
   3698         1.1  augustss 		USETW(ps.wPortStatus, status);
   3699         1.1  augustss 		USETW(ps.wPortChange, change);
   3700  1.264.4.12     skrll 		totlen = min(len, sizeof(ps));
   3701  1.264.4.12     skrll 		memcpy(buf, &ps, totlen);
   3702         1.1  augustss 		break;
   3703         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3704  1.264.4.12     skrll 		return -1;
   3705         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3706         1.1  augustss 		break;
   3707         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3708         1.1  augustss 		if (index == 1)
   3709         1.1  augustss 			port = UHCI_PORTSC1;
   3710         1.1  augustss 		else if (index == 2)
   3711         1.1  augustss 			port = UHCI_PORTSC2;
   3712         1.1  augustss 		else {
   3713  1.264.4.12     skrll 			return -1;
   3714         1.1  augustss 		}
   3715         1.1  augustss 		switch(value) {
   3716         1.1  augustss 		case UHF_PORT_ENABLE:
   3717       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3718         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3719         1.1  augustss 			break;
   3720         1.1  augustss 		case UHF_PORT_SUSPEND:
   3721       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3722         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3723         1.1  augustss 			break;
   3724         1.1  augustss 		case UHF_PORT_RESET:
   3725       1.166   dsainty 			err = uhci_portreset(sc, index);
   3726  1.264.4.12     skrll 			if (err != USBD_NORMAL_COMPLETION)
   3727  1.264.4.12     skrll 				return -1;
   3728  1.264.4.12     skrll 			return 0;
   3729       1.111  augustss 		case UHF_PORT_POWER:
   3730       1.111  augustss 			/* Pretend we turned on power */
   3731  1.264.4.12     skrll 			return 0;
   3732         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3733         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3734         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3735         1.1  augustss 		case UHF_PORT_CONNECTION:
   3736         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3737         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3738         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3739         1.1  augustss 		case UHF_C_PORT_RESET:
   3740         1.1  augustss 		default:
   3741  1.264.4.12     skrll 			return -1;
   3742         1.1  augustss 		}
   3743         1.1  augustss 		break;
   3744         1.1  augustss 	default:
   3745  1.264.4.12     skrll 		/* default from usbroothub */
   3746  1.264.4.21     skrll 		DPRINTFN(1, "returning %d (usbroothub default)",
   3747  1.264.4.21     skrll 		    buflen, 0, 0, 0);
   3748  1.264.4.12     skrll 		return buflen;
   3749         1.1  augustss 	}
   3750         1.1  augustss 
   3751  1.264.4.21     skrll 	DPRINTFN(1, "returning %d", totlen, 0, 0, 0);
   3752  1.264.4.21     skrll 
   3753  1.264.4.12     skrll 	return totlen;
   3754         1.1  augustss }
   3755         1.1  augustss 
   3756         1.1  augustss /* Abort a root interrupt request. */
   3757         1.1  augustss void
   3758       1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   3759         1.1  augustss {
   3760   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   3761        1.30  augustss 
   3762       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3763   1.264.4.7     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   3764       1.248       mrg 
   3765       1.234    dyoung 	callout_stop(&sc->sc_poll_handle);
   3766        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3767        1.58  augustss 
   3768   1.264.4.7     skrll 	xfer->ux_status = USBD_CANCELLED;
   3769        1.96  augustss #ifdef DIAGNOSTIC
   3770        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3771        1.96  augustss #endif
   3772        1.63  augustss 	usb_transfer_complete(xfer);
   3773         1.1  augustss }
   3774         1.1  augustss 
   3775        1.16  augustss usbd_status
   3776       1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3777        1.16  augustss {
   3778   1.264.4.7     skrll 	uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   3779        1.63  augustss 	usbd_status err;
   3780        1.16  augustss 
   3781        1.52  augustss 	/* Insert last in queue. */
   3782       1.248       mrg 	mutex_enter(&sc->sc_lock);
   3783        1.63  augustss 	err = usb_insert_transfer(xfer);
   3784       1.248       mrg 	mutex_exit(&sc->sc_lock);
   3785        1.63  augustss 	if (err)
   3786  1.264.4.13     skrll 		return err;
   3787        1.52  augustss 
   3788       1.186     skrll 	/*
   3789       1.186     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3790        1.67  augustss 	 * start first
   3791        1.67  augustss 	 */
   3792  1.264.4.13     skrll 	return uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3793        1.16  augustss }
   3794        1.16  augustss 
   3795         1.1  augustss /* Start a transfer on the root interrupt pipe */
   3796         1.1  augustss usbd_status
   3797       1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   3798         1.1  augustss {
   3799   1.264.4.7     skrll 	usbd_pipe_handle pipe = xfer->ux_pipe;
   3800   1.264.4.7     skrll 	uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   3801       1.174  drochner 	unsigned int ival;
   3802         1.1  augustss 
   3803  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3804  1.264.4.21     skrll 	DPRINTFN(1, "xfer=%p len=%d flags=%d", xfer, xfer->ux_length,
   3805  1.264.4.21     skrll 	    xfer->ux_flags, 0);
   3806        1.82  augustss 
   3807        1.82  augustss 	if (sc->sc_dying)
   3808  1.264.4.13     skrll 		return USBD_IOERROR;
   3809         1.1  augustss 
   3810       1.174  drochner 	/* XXX temporary variable needed to avoid gcc3 warning */
   3811   1.264.4.7     skrll 	ival = xfer->ux_pipe->up_endpoint->ue_edesc->bInterval;
   3812       1.174  drochner 	sc->sc_ival = mstohz(ival);
   3813       1.234    dyoung 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3814        1.96  augustss 	sc->sc_intr_xfer = xfer;
   3815  1.264.4.13     skrll 	return USBD_IN_PROGRESS;
   3816         1.1  augustss }
   3817         1.1  augustss 
   3818         1.1  augustss /* Close the root interrupt pipe. */
   3819         1.1  augustss void
   3820       1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   3821         1.1  augustss {
   3822   1.264.4.7     skrll 	uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   3823  1.264.4.21     skrll 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3824        1.30  augustss 
   3825       1.248       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3826       1.248       mrg 
   3827       1.234    dyoung 	callout_stop(&sc->sc_poll_handle);
   3828        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3829         1.1  augustss }
   3830