uhci.c revision 1.33 1 1.33 augustss /* $NetBSD: uhci.c,v 1.33 1999/08/02 19:30:34 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Universal Host Controller driver.
42 1.28 augustss * Handles e.g. PIIX3 and PIIX4.
43 1.1 augustss *
44 1.1 augustss * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
45 1.1 augustss * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
46 1.1 augustss * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf
47 1.28 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
48 1.1 augustss */
49 1.1 augustss
50 1.1 augustss #include <sys/param.h>
51 1.1 augustss #include <sys/systm.h>
52 1.1 augustss #include <sys/kernel.h>
53 1.1 augustss #include <sys/malloc.h>
54 1.13 augustss #if defined(__NetBSD__)
55 1.1 augustss #include <sys/device.h>
56 1.13 augustss #elif defined(__FreeBSD__)
57 1.13 augustss #include <sys/module.h>
58 1.13 augustss #include <sys/bus.h>
59 1.13 augustss #endif
60 1.1 augustss #include <sys/proc.h>
61 1.1 augustss #include <sys/queue.h>
62 1.1 augustss #include <sys/select.h>
63 1.1 augustss
64 1.7 augustss #include <machine/bus.h>
65 1.7 augustss
66 1.1 augustss #include <dev/usb/usb.h>
67 1.1 augustss #include <dev/usb/usbdi.h>
68 1.1 augustss #include <dev/usb/usbdivar.h>
69 1.7 augustss #include <dev/usb/usb_mem.h>
70 1.1 augustss #include <dev/usb/usb_quirks.h>
71 1.1 augustss
72 1.1 augustss #include <dev/usb/uhcireg.h>
73 1.1 augustss #include <dev/usb/uhcivar.h>
74 1.1 augustss
75 1.13 augustss #if defined(__FreeBSD__)
76 1.13 augustss #include <machine/clock.h>
77 1.13 augustss
78 1.13 augustss #define delay(d) DELAY(d)
79 1.13 augustss #endif
80 1.13 augustss
81 1.1 augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
82 1.1 augustss
83 1.1 augustss struct uhci_pipe {
84 1.1 augustss struct usbd_pipe pipe;
85 1.1 augustss uhci_intr_info_t *iinfo;
86 1.32 augustss int nexttoggle;
87 1.1 augustss /* Info needed for different pipe kinds. */
88 1.1 augustss union {
89 1.1 augustss /* Control pipe */
90 1.1 augustss struct {
91 1.1 augustss uhci_soft_qh_t *sqh;
92 1.7 augustss usb_dma_t reqdma;
93 1.7 augustss usb_dma_t datadma;
94 1.16 augustss uhci_soft_td_t *setup, *stat;
95 1.1 augustss u_int length;
96 1.1 augustss } ctl;
97 1.1 augustss /* Interrupt pipe */
98 1.1 augustss struct {
99 1.7 augustss usb_dma_t datadma;
100 1.1 augustss int npoll;
101 1.1 augustss uhci_soft_qh_t **qhs;
102 1.1 augustss } intr;
103 1.1 augustss /* Bulk pipe */
104 1.1 augustss struct {
105 1.1 augustss uhci_soft_qh_t *sqh;
106 1.7 augustss usb_dma_t datadma;
107 1.1 augustss u_int length;
108 1.1 augustss int isread;
109 1.1 augustss } bulk;
110 1.16 augustss /* Iso pipe */
111 1.16 augustss struct iso {
112 1.16 augustss u_int bufsize;
113 1.16 augustss u_int nbuf;
114 1.16 augustss usb_dma_t *bufs;
115 1.16 augustss uhci_soft_td_t **stds;
116 1.16 augustss } iso;
117 1.1 augustss } u;
118 1.1 augustss };
119 1.1 augustss
120 1.1 augustss /*
121 1.1 augustss * The uhci_intr_info free list can be global since they contain
122 1.1 augustss * no dma specific data. The other free lists do.
123 1.1 augustss */
124 1.1 augustss LIST_HEAD(, uhci_intr_info) uhci_ii_free;
125 1.1 augustss
126 1.1 augustss void uhci_busreset __P((uhci_softc_t *));
127 1.30 augustss void uhci_power __P((int, void *));
128 1.16 augustss usbd_status uhci_run __P((uhci_softc_t *, int run));
129 1.1 augustss uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *));
130 1.1 augustss void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *));
131 1.1 augustss uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *));
132 1.1 augustss void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *));
133 1.1 augustss uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *));
134 1.1 augustss void uhci_free_intr_info __P((uhci_intr_info_t *ii));
135 1.16 augustss #if 0
136 1.1 augustss void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *,
137 1.1 augustss uhci_intr_info_t *));
138 1.1 augustss void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *));
139 1.16 augustss #endif
140 1.1 augustss
141 1.1 augustss void uhci_free_std_chain __P((uhci_softc_t *,
142 1.1 augustss uhci_soft_td_t *, uhci_soft_td_t *));
143 1.1 augustss usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *,
144 1.18 augustss int, int, int, usb_dma_t *,
145 1.1 augustss uhci_soft_td_t **,
146 1.1 augustss uhci_soft_td_t **));
147 1.1 augustss void uhci_timo __P((void *));
148 1.1 augustss void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle));
149 1.1 augustss void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *));
150 1.33 augustss void uhci_ii_done __P((uhci_intr_info_t *));
151 1.33 augustss void uhci_ii_finish __P((uhci_intr_info_t *));
152 1.33 augustss void uhci_abort_req __P((usbd_request_handle, usbd_status status));
153 1.1 augustss void uhci_timeout __P((void *));
154 1.1 augustss void uhci_wakeup_ctrl __P((void *, int, int, void *, int));
155 1.1 augustss void uhci_lock_frames __P((uhci_softc_t *));
156 1.1 augustss void uhci_unlock_frames __P((uhci_softc_t *));
157 1.1 augustss void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
158 1.1 augustss void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
159 1.1 augustss void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
160 1.1 augustss void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
161 1.1 augustss int uhci_str __P((usb_string_descriptor_t *, int, char *));
162 1.1 augustss
163 1.1 augustss void uhci_wakeup_cb __P((usbd_request_handle reqh));
164 1.1 augustss
165 1.1 augustss usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle));
166 1.16 augustss usbd_status uhci_device_ctrl_start __P((usbd_request_handle));
167 1.1 augustss void uhci_device_ctrl_abort __P((usbd_request_handle));
168 1.1 augustss void uhci_device_ctrl_close __P((usbd_pipe_handle));
169 1.1 augustss usbd_status uhci_device_intr_transfer __P((usbd_request_handle));
170 1.16 augustss usbd_status uhci_device_intr_start __P((usbd_request_handle));
171 1.1 augustss void uhci_device_intr_abort __P((usbd_request_handle));
172 1.1 augustss void uhci_device_intr_close __P((usbd_pipe_handle));
173 1.1 augustss usbd_status uhci_device_bulk_transfer __P((usbd_request_handle));
174 1.16 augustss usbd_status uhci_device_bulk_start __P((usbd_request_handle));
175 1.1 augustss void uhci_device_bulk_abort __P((usbd_request_handle));
176 1.1 augustss void uhci_device_bulk_close __P((usbd_pipe_handle));
177 1.16 augustss usbd_status uhci_device_isoc_transfer __P((usbd_request_handle));
178 1.16 augustss usbd_status uhci_device_isoc_start __P((usbd_request_handle));
179 1.16 augustss void uhci_device_isoc_abort __P((usbd_request_handle));
180 1.16 augustss void uhci_device_isoc_close __P((usbd_pipe_handle));
181 1.16 augustss usbd_status uhci_device_isoc_setbuf __P((usbd_pipe_handle, u_int, u_int));
182 1.1 augustss
183 1.1 augustss usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle));
184 1.16 augustss usbd_status uhci_root_ctrl_start __P((usbd_request_handle));
185 1.1 augustss void uhci_root_ctrl_abort __P((usbd_request_handle));
186 1.1 augustss void uhci_root_ctrl_close __P((usbd_pipe_handle));
187 1.1 augustss usbd_status uhci_root_intr_transfer __P((usbd_request_handle));
188 1.16 augustss usbd_status uhci_root_intr_start __P((usbd_request_handle));
189 1.1 augustss void uhci_root_intr_abort __P((usbd_request_handle));
190 1.1 augustss void uhci_root_intr_close __P((usbd_pipe_handle));
191 1.1 augustss
192 1.1 augustss usbd_status uhci_open __P((usbd_pipe_handle));
193 1.8 augustss void uhci_poll __P((struct usbd_bus *));
194 1.1 augustss
195 1.1 augustss usbd_status uhci_device_request __P((usbd_request_handle reqh));
196 1.1 augustss void uhci_ctrl_done __P((uhci_intr_info_t *ii));
197 1.1 augustss void uhci_bulk_done __P((uhci_intr_info_t *ii));
198 1.1 augustss
199 1.1 augustss void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
200 1.1 augustss void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
201 1.1 augustss usbd_status uhci_device_setintr __P((uhci_softc_t *sc,
202 1.1 augustss struct uhci_pipe *pipe, int ival));
203 1.1 augustss void uhci_intr_done __P((uhci_intr_info_t *ii));
204 1.16 augustss void uhci_isoc_done __P((uhci_intr_info_t *ii));
205 1.1 augustss
206 1.1 augustss #ifdef USB_DEBUG
207 1.1 augustss static void uhci_dumpregs __P((uhci_softc_t *));
208 1.1 augustss void uhci_dump_tds __P((uhci_soft_td_t *));
209 1.1 augustss void uhci_dump_qh __P((uhci_soft_qh_t *));
210 1.1 augustss void uhci_dump __P((void));
211 1.1 augustss void uhci_dump_td __P((uhci_soft_td_t *));
212 1.1 augustss #endif
213 1.1 augustss
214 1.13 augustss #if defined(__NetBSD__)
215 1.1 augustss #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
216 1.1 augustss #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
217 1.1 augustss #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
218 1.1 augustss #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
219 1.13 augustss #elif defined(__FreeBSD__)
220 1.13 augustss #define UWRITE2(sc,r,x) outw((sc)->sc_iobase + (r), (x))
221 1.13 augustss #define UWRITE4(sc,r,x) outl((sc)->sc_iobase + (r), (x))
222 1.13 augustss #define UREAD2(sc,r) inw((sc)->sc_iobase + (r))
223 1.13 augustss #define UREAD4(sc,r) inl((sc)->sc_iobase + (r))
224 1.13 augustss #endif
225 1.1 augustss
226 1.1 augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
227 1.1 augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
228 1.1 augustss
229 1.1 augustss #define UHCI_RESET_TIMEOUT 100 /* reset timeout */
230 1.1 augustss
231 1.1 augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
232 1.1 augustss
233 1.1 augustss #define UHCI_INTR_ENDPT 1
234 1.1 augustss
235 1.1 augustss struct usbd_methods uhci_root_ctrl_methods = {
236 1.1 augustss uhci_root_ctrl_transfer,
237 1.16 augustss uhci_root_ctrl_start,
238 1.1 augustss uhci_root_ctrl_abort,
239 1.1 augustss uhci_root_ctrl_close,
240 1.10 augustss 0,
241 1.1 augustss };
242 1.1 augustss
243 1.1 augustss struct usbd_methods uhci_root_intr_methods = {
244 1.1 augustss uhci_root_intr_transfer,
245 1.16 augustss uhci_root_intr_start,
246 1.1 augustss uhci_root_intr_abort,
247 1.1 augustss uhci_root_intr_close,
248 1.10 augustss 0,
249 1.1 augustss };
250 1.1 augustss
251 1.1 augustss struct usbd_methods uhci_device_ctrl_methods = {
252 1.1 augustss uhci_device_ctrl_transfer,
253 1.16 augustss uhci_device_ctrl_start,
254 1.1 augustss uhci_device_ctrl_abort,
255 1.1 augustss uhci_device_ctrl_close,
256 1.10 augustss 0,
257 1.1 augustss };
258 1.1 augustss
259 1.1 augustss struct usbd_methods uhci_device_intr_methods = {
260 1.1 augustss uhci_device_intr_transfer,
261 1.16 augustss uhci_device_intr_start,
262 1.1 augustss uhci_device_intr_abort,
263 1.1 augustss uhci_device_intr_close,
264 1.10 augustss 0,
265 1.1 augustss };
266 1.1 augustss
267 1.1 augustss struct usbd_methods uhci_device_bulk_methods = {
268 1.1 augustss uhci_device_bulk_transfer,
269 1.16 augustss uhci_device_bulk_start,
270 1.1 augustss uhci_device_bulk_abort,
271 1.1 augustss uhci_device_bulk_close,
272 1.10 augustss 0,
273 1.1 augustss };
274 1.1 augustss
275 1.16 augustss struct usbd_methods uhci_device_isoc_methods = {
276 1.16 augustss uhci_device_isoc_transfer,
277 1.16 augustss uhci_device_isoc_start,
278 1.16 augustss uhci_device_isoc_abort,
279 1.16 augustss uhci_device_isoc_close,
280 1.16 augustss uhci_device_isoc_setbuf,
281 1.16 augustss };
282 1.16 augustss
283 1.1 augustss void
284 1.1 augustss uhci_busreset(sc)
285 1.1 augustss uhci_softc_t *sc;
286 1.1 augustss {
287 1.1 augustss UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
288 1.20 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
289 1.1 augustss UHCICMD(sc, 0); /* do nothing */
290 1.1 augustss }
291 1.1 augustss
292 1.1 augustss usbd_status
293 1.1 augustss uhci_init(sc)
294 1.1 augustss uhci_softc_t *sc;
295 1.1 augustss {
296 1.1 augustss usbd_status r;
297 1.1 augustss int i, j;
298 1.1 augustss uhci_soft_qh_t *csqh, *bsqh, *sqh;
299 1.1 augustss uhci_soft_td_t *std;
300 1.1 augustss
301 1.1 augustss DPRINTFN(1,("uhci_init: start\n"));
302 1.1 augustss
303 1.1 augustss #if defined(USB_DEBUG)
304 1.1 augustss if (uhcidebug > 2)
305 1.1 augustss uhci_dumpregs(sc);
306 1.1 augustss #endif
307 1.1 augustss
308 1.1 augustss uhci_run(sc, 0); /* stop the controller */
309 1.1 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
310 1.1 augustss
311 1.24 augustss uhci_busreset(sc);
312 1.24 augustss
313 1.1 augustss /* Allocate and initialize real frame array. */
314 1.7 augustss r = usb_allocmem(sc->sc_dmatag,
315 1.7 augustss UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
316 1.30 augustss UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
317 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
318 1.1 augustss return (r);
319 1.30 augustss sc->sc_pframes = KERNADDR(&sc->sc_dma);
320 1.1 augustss UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
321 1.30 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma)); /* set frame list */
322 1.1 augustss
323 1.1 augustss /* Allocate the dummy QH where bulk traffic will be queued. */
324 1.1 augustss bsqh = uhci_alloc_sqh(sc);
325 1.1 augustss if (!bsqh)
326 1.1 augustss return (USBD_NOMEM);
327 1.1 augustss bsqh->qh->qh_hlink = UHCI_PTR_T; /* end of QH chain */
328 1.1 augustss bsqh->qh->qh_elink = UHCI_PTR_T;
329 1.1 augustss sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
330 1.1 augustss
331 1.1 augustss /* Allocate the dummy QH where control traffic will be queued. */
332 1.1 augustss csqh = uhci_alloc_sqh(sc);
333 1.1 augustss if (!csqh)
334 1.1 augustss return (USBD_NOMEM);
335 1.1 augustss csqh->qh->hlink = bsqh;
336 1.1 augustss csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q;
337 1.1 augustss csqh->qh->qh_elink = UHCI_PTR_T;
338 1.1 augustss sc->sc_ctl_start = sc->sc_ctl_end = csqh;
339 1.1 augustss
340 1.1 augustss /*
341 1.1 augustss * Make all (virtual) frame list pointers point to the interrupt
342 1.1 augustss * queue heads and the interrupt queue heads at the control
343 1.1 augustss * queue head and point the physical frame list to the virtual.
344 1.1 augustss */
345 1.1 augustss for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
346 1.1 augustss std = uhci_alloc_std(sc);
347 1.1 augustss sqh = uhci_alloc_sqh(sc);
348 1.1 augustss if (!std || !sqh)
349 1.13 augustss return (USBD_NOMEM);
350 1.1 augustss std->td->link.sqh = sqh;
351 1.1 augustss std->td->td_link = sqh->physaddr | UHCI_PTR_Q;
352 1.1 augustss std->td->td_status = UHCI_TD_IOS; /* iso, inactive */
353 1.1 augustss std->td->td_token = 0;
354 1.1 augustss std->td->td_buffer = 0;
355 1.1 augustss sqh->qh->hlink = csqh;
356 1.1 augustss sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q;
357 1.1 augustss sqh->qh->elink = 0;
358 1.1 augustss sqh->qh->qh_elink = UHCI_PTR_T;
359 1.1 augustss sc->sc_vframes[i].htd = std;
360 1.1 augustss sc->sc_vframes[i].etd = std;
361 1.1 augustss sc->sc_vframes[i].hqh = sqh;
362 1.1 augustss sc->sc_vframes[i].eqh = sqh;
363 1.1 augustss for (j = i;
364 1.1 augustss j < UHCI_FRAMELIST_COUNT;
365 1.1 augustss j += UHCI_VFRAMELIST_COUNT)
366 1.1 augustss sc->sc_pframes[j] = std->physaddr;
367 1.1 augustss }
368 1.1 augustss
369 1.1 augustss LIST_INIT(&sc->sc_intrhead);
370 1.1 augustss
371 1.1 augustss /* Set up the bus struct. */
372 1.1 augustss sc->sc_bus.open_pipe = uhci_open;
373 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
374 1.8 augustss sc->sc_bus.do_poll = uhci_poll;
375 1.1 augustss
376 1.30 augustss sc->sc_suspend = PWR_RESUME;
377 1.30 augustss (void)powerhook_establish(uhci_power, sc);
378 1.30 augustss
379 1.1 augustss DPRINTFN(1,("uhci_init: enabling\n"));
380 1.1 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
381 1.1 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
382 1.1 augustss
383 1.16 augustss return (uhci_run(sc, 1)); /* and here we go... */
384 1.1 augustss }
385 1.1 augustss
386 1.30 augustss /*
387 1.30 augustss * Handle suspend/resume.
388 1.30 augustss *
389 1.30 augustss * Must use delay() here since we are called from an interrupt
390 1.30 augustss * context, but since we are close to being inactive anyway
391 1.30 augustss * it doesn't matter.
392 1.30 augustss */
393 1.30 augustss void
394 1.30 augustss uhci_power(why, v)
395 1.30 augustss int why;
396 1.30 augustss void *v;
397 1.30 augustss {
398 1.30 augustss uhci_softc_t *sc = v;
399 1.30 augustss int cmd;
400 1.30 augustss int s;
401 1.30 augustss
402 1.30 augustss s = splusb();
403 1.30 augustss cmd = UREAD2(sc, UHCI_CMD);
404 1.30 augustss
405 1.30 augustss DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
406 1.30 augustss sc, why, sc->sc_suspend, cmd));
407 1.30 augustss
408 1.30 augustss if (why != PWR_RESUME) {
409 1.30 augustss #if defined(USB_DEBUG)
410 1.30 augustss if (uhcidebug > 2)
411 1.30 augustss uhci_dumpregs(sc);
412 1.30 augustss #endif
413 1.30 augustss if (sc->sc_has_timo)
414 1.30 augustss usb_untimeout(uhci_timo, sc->sc_has_timo,
415 1.30 augustss sc->sc_has_timo->timo_handle);
416 1.30 augustss uhci_run(sc, 0); /* stop the controller */
417 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
418 1.30 augustss delay(USB_RESUME_WAIT * 1000);
419 1.30 augustss sc->sc_suspend = why;
420 1.30 augustss DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
421 1.30 augustss } else {
422 1.30 augustss /*
423 1.30 augustss * XXX We should really do much more here in case the
424 1.30 augustss * controller registers have been lost and BIOS has
425 1.30 augustss * not restored them.
426 1.30 augustss */
427 1.30 augustss sc->sc_suspend = why;
428 1.30 augustss if (cmd & UHCI_CMD_RS)
429 1.30 augustss uhci_run(sc, 0); /* in case BIOS has started it */
430 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
431 1.30 augustss delay(USB_RESUME_DELAY * 1000);
432 1.30 augustss UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
433 1.30 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
434 1.30 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
435 1.30 augustss uhci_run(sc, 1); /* and start traffic again */
436 1.30 augustss delay(USB_RESUME_RECOVERY * 1000);
437 1.30 augustss if (sc->sc_has_timo)
438 1.30 augustss usb_timeout(uhci_timo, sc->sc_has_timo,
439 1.30 augustss sc->sc_ival, sc->sc_has_timo->timo_handle);
440 1.30 augustss #if defined(USB_DEBUG)
441 1.30 augustss if (uhcidebug > 2)
442 1.30 augustss uhci_dumpregs(sc);
443 1.30 augustss #endif
444 1.30 augustss }
445 1.30 augustss splx(s);
446 1.30 augustss }
447 1.30 augustss
448 1.1 augustss #ifdef USB_DEBUG
449 1.1 augustss static void
450 1.1 augustss uhci_dumpregs(sc)
451 1.1 augustss uhci_softc_t *sc;
452 1.1 augustss {
453 1.26 augustss printf("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
454 1.13 augustss "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
455 1.13 augustss USBDEVNAME(sc->sc_bus.bdev),
456 1.1 augustss UREAD2(sc, UHCI_CMD),
457 1.1 augustss UREAD2(sc, UHCI_STS),
458 1.1 augustss UREAD2(sc, UHCI_INTR),
459 1.1 augustss UREAD2(sc, UHCI_FRNUM),
460 1.25 augustss UREAD4(sc, UHCI_FLBASEADDR),
461 1.1 augustss UREAD2(sc, UHCI_SOF),
462 1.1 augustss UREAD2(sc, UHCI_PORTSC1),
463 1.1 augustss UREAD2(sc, UHCI_PORTSC2));
464 1.1 augustss }
465 1.1 augustss
466 1.1 augustss int uhci_longtd = 1;
467 1.1 augustss
468 1.1 augustss void
469 1.1 augustss uhci_dump_td(p)
470 1.1 augustss uhci_soft_td_t *p;
471 1.1 augustss {
472 1.26 augustss printf("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
473 1.26 augustss "token=0x%08lx buffer=0x%08lx\n",
474 1.1 augustss p, (long)p->physaddr,
475 1.1 augustss (long)p->td->td_link,
476 1.1 augustss (long)p->td->td_status,
477 1.1 augustss (long)p->td->td_token,
478 1.1 augustss (long)p->td->td_buffer);
479 1.1 augustss if (uhci_longtd)
480 1.12 augustss printf(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
481 1.12 augustss "D=%d,maxlen=%d\n",
482 1.21 augustss (int)p->td->td_link,
483 1.1 augustss "\20\1T\2Q\3VF",
484 1.21 augustss (int)p->td->td_status,
485 1.12 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
486 1.12 augustss "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
487 1.1 augustss UHCI_TD_GET_ERRCNT(p->td->td_status),
488 1.1 augustss UHCI_TD_GET_ACTLEN(p->td->td_status),
489 1.1 augustss UHCI_TD_GET_PID(p->td->td_token),
490 1.1 augustss UHCI_TD_GET_DEVADDR(p->td->td_token),
491 1.1 augustss UHCI_TD_GET_ENDPT(p->td->td_token),
492 1.1 augustss UHCI_TD_GET_DT(p->td->td_token),
493 1.1 augustss UHCI_TD_GET_MAXLEN(p->td->td_token));
494 1.1 augustss }
495 1.1 augustss
496 1.1 augustss void
497 1.1 augustss uhci_dump_qh(p)
498 1.1 augustss uhci_soft_qh_t *p;
499 1.1 augustss {
500 1.1 augustss printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr,
501 1.1 augustss p->qh->qh_hlink, p->qh->qh_elink);
502 1.1 augustss }
503 1.1 augustss
504 1.13 augustss
505 1.1 augustss #if 0
506 1.1 augustss void
507 1.1 augustss uhci_dump()
508 1.1 augustss {
509 1.1 augustss uhci_softc_t *sc = uhci;
510 1.1 augustss
511 1.1 augustss uhci_dumpregs(sc);
512 1.1 augustss printf("intrs=%d\n", sc->sc_intrs);
513 1.1 augustss printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);
514 1.1 augustss uhci_dump_qh(sc->sc_ctl_start->qh->hlink);
515 1.1 augustss }
516 1.1 augustss #endif
517 1.1 augustss
518 1.1 augustss void
519 1.1 augustss uhci_dump_tds(std)
520 1.1 augustss uhci_soft_td_t *std;
521 1.1 augustss {
522 1.1 augustss uhci_soft_td_t *p;
523 1.1 augustss
524 1.1 augustss for(p = std; p; p = p->td->link.std)
525 1.1 augustss uhci_dump_td(p);
526 1.1 augustss }
527 1.1 augustss #endif
528 1.1 augustss
529 1.1 augustss /*
530 1.1 augustss * This routine is executed periodically and simulates interrupts
531 1.1 augustss * from the root controller interrupt pipe for port status change.
532 1.1 augustss */
533 1.1 augustss void
534 1.1 augustss uhci_timo(addr)
535 1.1 augustss void *addr;
536 1.1 augustss {
537 1.1 augustss usbd_request_handle reqh = addr;
538 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
539 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
540 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
541 1.1 augustss int s;
542 1.1 augustss u_char *p;
543 1.1 augustss
544 1.1 augustss DPRINTFN(15, ("uhci_timo\n"));
545 1.1 augustss
546 1.1 augustss p = KERNADDR(&upipe->u.intr.datadma);
547 1.1 augustss p[0] = 0;
548 1.1 augustss if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
549 1.1 augustss p[0] |= 1<<1;
550 1.1 augustss if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
551 1.1 augustss p[0] |= 1<<2;
552 1.16 augustss s = splusb();
553 1.1 augustss if (p[0] != 0) {
554 1.1 augustss reqh->actlen = 1;
555 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
556 1.1 augustss reqh->xfercb(reqh);
557 1.1 augustss }
558 1.31 augustss if (reqh->pipe->repeat) {
559 1.13 augustss usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
560 1.1 augustss } else {
561 1.7 augustss usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma);
562 1.16 augustss usb_start_next(reqh->pipe);
563 1.1 augustss }
564 1.16 augustss splx(s);
565 1.1 augustss }
566 1.1 augustss
567 1.1 augustss
568 1.1 augustss void
569 1.1 augustss uhci_lock_frames(sc)
570 1.1 augustss uhci_softc_t *sc;
571 1.1 augustss {
572 1.1 augustss int s = splusb();
573 1.1 augustss while (sc->sc_vflock) {
574 1.1 augustss sc->sc_vflock |= UHCI_WANT_LOCK;
575 1.1 augustss tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0);
576 1.1 augustss }
577 1.1 augustss sc->sc_vflock = UHCI_HAS_LOCK;
578 1.1 augustss splx(s);
579 1.1 augustss }
580 1.1 augustss
581 1.1 augustss void
582 1.1 augustss uhci_unlock_frames(sc)
583 1.1 augustss uhci_softc_t *sc;
584 1.1 augustss {
585 1.1 augustss int s = splusb();
586 1.1 augustss sc->sc_vflock &= ~UHCI_HAS_LOCK;
587 1.1 augustss if (sc->sc_vflock & UHCI_WANT_LOCK)
588 1.1 augustss wakeup(&sc->sc_vflock);
589 1.1 augustss splx(s);
590 1.1 augustss }
591 1.1 augustss
592 1.1 augustss /*
593 1.1 augustss * Allocate an interrupt information struct. A free list is kept
594 1.1 augustss * for fast allocation.
595 1.1 augustss */
596 1.1 augustss uhci_intr_info_t *
597 1.1 augustss uhci_alloc_intr_info(sc)
598 1.1 augustss uhci_softc_t *sc;
599 1.1 augustss {
600 1.1 augustss uhci_intr_info_t *ii;
601 1.1 augustss
602 1.1 augustss ii = LIST_FIRST(&uhci_ii_free);
603 1.1 augustss if (ii)
604 1.1 augustss LIST_REMOVE(ii, list);
605 1.1 augustss else {
606 1.31 augustss ii = malloc(sizeof(uhci_intr_info_t), M_USBHC, M_NOWAIT);
607 1.1 augustss }
608 1.1 augustss ii->sc = sc;
609 1.1 augustss return ii;
610 1.1 augustss }
611 1.1 augustss
612 1.1 augustss void
613 1.1 augustss uhci_free_intr_info(ii)
614 1.1 augustss uhci_intr_info_t *ii;
615 1.1 augustss {
616 1.1 augustss LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */
617 1.1 augustss }
618 1.1 augustss
619 1.1 augustss /* Add control QH, called at splusb(). */
620 1.1 augustss void
621 1.1 augustss uhci_add_ctrl(sc, sqh)
622 1.1 augustss uhci_softc_t *sc;
623 1.1 augustss uhci_soft_qh_t *sqh;
624 1.1 augustss {
625 1.1 augustss uhci_qh_t *eqh;
626 1.1 augustss
627 1.1 augustss DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
628 1.1 augustss eqh = sc->sc_ctl_end->qh;
629 1.1 augustss sqh->qh->hlink = eqh->hlink;
630 1.1 augustss sqh->qh->qh_hlink = eqh->qh_hlink;
631 1.1 augustss eqh->hlink = sqh;
632 1.1 augustss eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
633 1.1 augustss sc->sc_ctl_end = sqh;
634 1.1 augustss }
635 1.1 augustss
636 1.1 augustss /* Remove control QH, called at splusb(). */
637 1.1 augustss void
638 1.1 augustss uhci_remove_ctrl(sc, sqh)
639 1.1 augustss uhci_softc_t *sc;
640 1.1 augustss uhci_soft_qh_t *sqh;
641 1.1 augustss {
642 1.1 augustss uhci_soft_qh_t *pqh;
643 1.1 augustss
644 1.1 augustss DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh));
645 1.1 augustss for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink)
646 1.1 augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
647 1.1 augustss if (pqh->qh->qh_hlink & UHCI_PTR_T) {
648 1.1 augustss printf("uhci_remove_ctrl: QH not found\n");
649 1.1 augustss return;
650 1.1 augustss }
651 1.1 augustss #else
652 1.1 augustss ;
653 1.1 augustss #endif
654 1.1 augustss pqh->qh->hlink = sqh->qh->hlink;
655 1.1 augustss pqh->qh->qh_hlink = sqh->qh->qh_hlink;
656 1.1 augustss if (sc->sc_ctl_end == sqh)
657 1.1 augustss sc->sc_ctl_end = pqh;
658 1.1 augustss }
659 1.1 augustss
660 1.1 augustss /* Add bulk QH, called at splusb(). */
661 1.1 augustss void
662 1.1 augustss uhci_add_bulk(sc, sqh)
663 1.1 augustss uhci_softc_t *sc;
664 1.1 augustss uhci_soft_qh_t *sqh;
665 1.1 augustss {
666 1.1 augustss uhci_qh_t *eqh;
667 1.1 augustss
668 1.1 augustss DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
669 1.1 augustss eqh = sc->sc_bulk_end->qh;
670 1.1 augustss sqh->qh->hlink = eqh->hlink;
671 1.1 augustss sqh->qh->qh_hlink = eqh->qh_hlink;
672 1.1 augustss eqh->hlink = sqh;
673 1.1 augustss eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
674 1.1 augustss sc->sc_bulk_end = sqh;
675 1.1 augustss }
676 1.1 augustss
677 1.1 augustss /* Remove bulk QH, called at splusb(). */
678 1.1 augustss void
679 1.1 augustss uhci_remove_bulk(sc, sqh)
680 1.1 augustss uhci_softc_t *sc;
681 1.1 augustss uhci_soft_qh_t *sqh;
682 1.1 augustss {
683 1.1 augustss uhci_soft_qh_t *pqh;
684 1.1 augustss
685 1.1 augustss DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
686 1.12 augustss for (pqh = sc->sc_bulk_start;
687 1.12 augustss pqh->qh->hlink != sqh;
688 1.12 augustss pqh = pqh->qh->hlink)
689 1.1 augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
690 1.1 augustss if (pqh->qh->qh_hlink & UHCI_PTR_T) {
691 1.1 augustss printf("uhci_remove_bulk: QH not found\n");
692 1.1 augustss return;
693 1.1 augustss }
694 1.1 augustss #else
695 1.1 augustss ;
696 1.1 augustss #endif
697 1.1 augustss pqh->qh->hlink = sqh->qh->hlink;
698 1.1 augustss pqh->qh->qh_hlink = sqh->qh->qh_hlink;
699 1.1 augustss if (sc->sc_bulk_end == sqh)
700 1.1 augustss sc->sc_bulk_end = pqh;
701 1.1 augustss }
702 1.1 augustss
703 1.1 augustss int
704 1.1 augustss uhci_intr(p)
705 1.1 augustss void *p;
706 1.1 augustss {
707 1.1 augustss uhci_softc_t *sc = p;
708 1.1 augustss int status, ret;
709 1.1 augustss uhci_intr_info_t *ii;
710 1.1 augustss
711 1.1 augustss sc->sc_intrs++;
712 1.1 augustss #if defined(USB_DEBUG)
713 1.1 augustss if (uhcidebug > 9) {
714 1.13 augustss printf("uhci_intr %p\n", sc);
715 1.1 augustss uhci_dumpregs(sc);
716 1.1 augustss }
717 1.1 augustss #endif
718 1.1 augustss status = UREAD2(sc, UHCI_STS);
719 1.30 augustss #ifdef DIAGNOSTIC
720 1.30 augustss if (sc->sc_suspend != PWR_RESUME)
721 1.30 augustss printf("uhci_intr: suspended sts=0x%x\n", status);
722 1.30 augustss #endif
723 1.1 augustss ret = 0;
724 1.1 augustss if (status & UHCI_STS_USBINT) {
725 1.1 augustss UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */
726 1.1 augustss ret = 1;
727 1.1 augustss }
728 1.1 augustss if (status & UHCI_STS_USBEI) {
729 1.1 augustss UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */
730 1.1 augustss ret = 1;
731 1.1 augustss }
732 1.1 augustss if (status & UHCI_STS_RD) {
733 1.1 augustss UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */
734 1.13 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
735 1.1 augustss ret = 1;
736 1.1 augustss }
737 1.1 augustss if (status & UHCI_STS_HSE) {
738 1.1 augustss UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */
739 1.13 augustss printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev));
740 1.1 augustss ret = 1;
741 1.1 augustss }
742 1.1 augustss if (status & UHCI_STS_HCPE) {
743 1.1 augustss UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */
744 1.13 augustss printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev));
745 1.1 augustss ret = 1;
746 1.1 augustss }
747 1.13 augustss if (status & UHCI_STS_HCH)
748 1.13 augustss printf("%s: controller halted\n", USBDEVNAME(sc->sc_bus.bdev));
749 1.1 augustss if (!ret)
750 1.1 augustss return 0;
751 1.1 augustss
752 1.1 augustss /*
753 1.1 augustss * Interrupts on UHCI really suck. When the host controller
754 1.1 augustss * interrupts because a transfer is completed there is no
755 1.1 augustss * way of knowing which transfer it was. You can scan down
756 1.1 augustss * the TDs and QHs of the previous frame to limit the search,
757 1.1 augustss * but that assumes that the interrupt was not delayed by more
758 1.1 augustss * than 1 ms, which may not always be true (e.g. after debug
759 1.1 augustss * output on a slow console).
760 1.1 augustss * We scan all interrupt descriptors to see if any have
761 1.1 augustss * completed.
762 1.1 augustss */
763 1.1 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
764 1.1 augustss uhci_check_intr(sc, ii);
765 1.1 augustss
766 1.1 augustss DPRINTFN(10, ("uhci_intr: exit\n"));
767 1.1 augustss return 1;
768 1.1 augustss }
769 1.1 augustss
770 1.1 augustss /* Check for an interrupt. */
771 1.1 augustss void
772 1.1 augustss uhci_check_intr(sc, ii)
773 1.1 augustss uhci_softc_t *sc;
774 1.1 augustss uhci_intr_info_t *ii;
775 1.1 augustss {
776 1.1 augustss struct uhci_pipe *upipe;
777 1.1 augustss uhci_soft_td_t *std, *lstd;
778 1.18 augustss u_int32_t status;
779 1.1 augustss
780 1.1 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
781 1.1 augustss #ifdef DIAGNOSTIC
782 1.1 augustss if (!ii) {
783 1.1 augustss printf("uhci_check_intr: no ii? %p\n", ii);
784 1.1 augustss return;
785 1.1 augustss }
786 1.1 augustss #endif
787 1.1 augustss if (!ii->stdstart)
788 1.1 augustss return;
789 1.1 augustss lstd = ii->stdend;
790 1.1 augustss #ifdef DIAGNOSTIC
791 1.1 augustss if (!lstd) {
792 1.1 augustss printf("uhci_check_intr: std==0\n");
793 1.1 augustss return;
794 1.1 augustss }
795 1.1 augustss #endif
796 1.26 augustss /*
797 1.26 augustss * If the last TD is still active we need to check whether there
798 1.26 augustss * is a an error somewhere in the middle, or whether there was a
799 1.26 augustss * short packet (SPD and not ACTIVE).
800 1.26 augustss */
801 1.1 augustss if (lstd->td->td_status & UHCI_TD_ACTIVE) {
802 1.1 augustss DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii));
803 1.18 augustss for (std = ii->stdstart; std != lstd; std = std->td->link.std){
804 1.18 augustss status = std->td->td_status;
805 1.18 augustss if ((status & UHCI_TD_STALLED) ||
806 1.18 augustss (status & (UHCI_TD_SPD | UHCI_TD_ACTIVE)) ==
807 1.18 augustss UHCI_TD_SPD)
808 1.1 augustss goto done;
809 1.18 augustss }
810 1.18 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p std=%p still active\n",
811 1.18 augustss ii, ii->stdstart));
812 1.1 augustss return;
813 1.1 augustss }
814 1.1 augustss done:
815 1.26 augustss usb_untimeout(uhci_timeout, ii, ii->timeout_handle);
816 1.1 augustss upipe = (struct uhci_pipe *)ii->reqh->pipe;
817 1.32 augustss upipe->pipe.endpoint->toggle = upipe->nexttoggle;
818 1.33 augustss uhci_ii_done(ii);
819 1.1 augustss }
820 1.1 augustss
821 1.1 augustss void
822 1.33 augustss uhci_ii_done(ii)
823 1.1 augustss uhci_intr_info_t *ii;
824 1.1 augustss {
825 1.1 augustss usbd_request_handle reqh = ii->reqh;
826 1.1 augustss uhci_soft_td_t *std;
827 1.26 augustss u_int32_t status;
828 1.26 augustss int actlen;
829 1.1 augustss
830 1.33 augustss #ifdef USB_DEBUG
831 1.33 augustss DPRINTFN(10, ("uhci_ii_done: ii=%p ready\n", ii));
832 1.33 augustss if (uhcidebug > 10)
833 1.33 augustss uhci_dump_tds(ii->stdstart);
834 1.33 augustss #endif
835 1.33 augustss
836 1.33 augustss if (reqh->status == USBD_CANCELLED ||
837 1.33 augustss reqh->status == USBD_TIMEOUT) {
838 1.33 augustss DPRINTF(("uhci_ii_done: aborted reqh=%p\n", reqh));
839 1.33 augustss return;
840 1.33 augustss }
841 1.7 augustss
842 1.7 augustss #ifdef DIAGNOSTIC
843 1.7 augustss {
844 1.7 augustss int s = splhigh();
845 1.7 augustss if (ii->isdone) {
846 1.26 augustss splx(s);
847 1.33 augustss printf("uhci_ii_done: ii=%p is done!\n", ii);
848 1.7 augustss return;
849 1.7 augustss }
850 1.7 augustss ii->isdone = 1;
851 1.7 augustss splx(s);
852 1.7 augustss }
853 1.7 augustss #endif
854 1.1 augustss
855 1.26 augustss /* The transfer is done, compute actual length and status. */
856 1.18 augustss /* XXX Is this correct for control xfers? */
857 1.26 augustss actlen = 0;
858 1.26 augustss for (std = ii->stdstart; std; std = std->td->link.std) {
859 1.26 augustss status = std->td->td_status;
860 1.26 augustss if (status & UHCI_TD_ACTIVE)
861 1.26 augustss break;
862 1.1 augustss if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP)
863 1.26 augustss actlen += UHCI_TD_GET_ACTLEN(status);
864 1.1 augustss }
865 1.1 augustss status &= UHCI_TD_ERROR;
866 1.26 augustss DPRINTFN(10, ("uhci_check_intr: actlen=%d, status=0x%x\n",
867 1.26 augustss actlen, status));
868 1.26 augustss reqh->actlen = actlen;
869 1.1 augustss if (status != 0) {
870 1.31 augustss DPRINTFN(-1+((status&UHCI_TD_STALLED)!=0),
871 1.17 augustss ("uhci_ii_done: error, addr=%d, endpt=0x%02x, "
872 1.17 augustss "status 0x%b\n",
873 1.17 augustss reqh->pipe->device->address,
874 1.17 augustss reqh->pipe->endpoint->edesc->bEndpointAddress,
875 1.21 augustss (int)status,
876 1.12 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
877 1.12 augustss "STALLED\30ACTIVE"));
878 1.1 augustss if (status == UHCI_TD_STALLED)
879 1.1 augustss reqh->status = USBD_STALLED;
880 1.1 augustss else
881 1.1 augustss reqh->status = USBD_IOERROR; /* more info XXX */
882 1.1 augustss } else {
883 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
884 1.1 augustss }
885 1.33 augustss uhci_ii_finish(ii);
886 1.33 augustss }
887 1.33 augustss
888 1.33 augustss void
889 1.33 augustss uhci_ii_finish(ii)
890 1.33 augustss uhci_intr_info_t *ii;
891 1.33 augustss {
892 1.33 augustss usbd_request_handle reqh = ii->reqh;
893 1.33 augustss
894 1.33 augustss DPRINTFN(5, ("uhci_ii_finish: calling handler ii=%p\n", ii));
895 1.1 augustss
896 1.26 augustss switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
897 1.1 augustss case UE_CONTROL:
898 1.1 augustss uhci_ctrl_done(ii);
899 1.16 augustss usb_start_next(reqh->pipe);
900 1.1 augustss break;
901 1.1 augustss case UE_ISOCHRONOUS:
902 1.16 augustss uhci_isoc_done(ii);
903 1.16 augustss usb_start_next(reqh->pipe);
904 1.7 augustss break;
905 1.1 augustss case UE_BULK:
906 1.1 augustss uhci_bulk_done(ii);
907 1.16 augustss usb_start_next(reqh->pipe);
908 1.1 augustss break;
909 1.1 augustss case UE_INTERRUPT:
910 1.1 augustss uhci_intr_done(ii);
911 1.1 augustss break;
912 1.1 augustss }
913 1.1 augustss
914 1.1 augustss /* And finally execute callback. */
915 1.1 augustss reqh->xfercb(reqh);
916 1.1 augustss }
917 1.1 augustss
918 1.13 augustss /*
919 1.13 augustss * Called when a request does not complete.
920 1.13 augustss */
921 1.1 augustss void
922 1.1 augustss uhci_timeout(addr)
923 1.1 augustss void *addr;
924 1.1 augustss {
925 1.1 augustss uhci_intr_info_t *ii = addr;
926 1.1 augustss
927 1.1 augustss DPRINTF(("uhci_timeout: ii=%p\n", ii));
928 1.33 augustss uhci_abort_req(ii->reqh, USBD_TIMEOUT);
929 1.1 augustss }
930 1.1 augustss
931 1.1 augustss /*
932 1.1 augustss * Wait here until controller claims to have an interrupt.
933 1.1 augustss * Then call uhci_intr and return. Use timeout to avoid waiting
934 1.1 augustss * too long.
935 1.13 augustss * Only used during boot when interrupts are not enabled yet.
936 1.1 augustss */
937 1.1 augustss void
938 1.1 augustss uhci_waitintr(sc, reqh)
939 1.1 augustss uhci_softc_t *sc;
940 1.1 augustss usbd_request_handle reqh;
941 1.1 augustss {
942 1.1 augustss int timo = reqh->timeout;
943 1.13 augustss uhci_intr_info_t *ii;
944 1.13 augustss
945 1.26 augustss DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
946 1.1 augustss
947 1.1 augustss reqh->status = USBD_IN_PROGRESS;
948 1.26 augustss for (; timo >= 0; timo--) {
949 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
950 1.26 augustss DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
951 1.1 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
952 1.1 augustss uhci_intr(sc);
953 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
954 1.1 augustss return;
955 1.1 augustss }
956 1.1 augustss }
957 1.13 augustss
958 1.13 augustss /* Timeout */
959 1.13 augustss DPRINTF(("uhci_waitintr: timeout\n"));
960 1.13 augustss for (ii = LIST_FIRST(&sc->sc_intrhead);
961 1.13 augustss ii && ii->reqh != reqh;
962 1.13 augustss ii = LIST_NEXT(ii, list))
963 1.13 augustss ;
964 1.13 augustss if (ii)
965 1.33 augustss uhci_ii_done(ii);
966 1.13 augustss else
967 1.13 augustss panic("uhci_waitintr: lost intr_info\n");
968 1.1 augustss }
969 1.1 augustss
970 1.8 augustss void
971 1.8 augustss uhci_poll(bus)
972 1.8 augustss struct usbd_bus *bus;
973 1.8 augustss {
974 1.8 augustss uhci_softc_t *sc = (uhci_softc_t *)bus;
975 1.8 augustss
976 1.8 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
977 1.8 augustss uhci_intr(sc);
978 1.8 augustss }
979 1.8 augustss
980 1.1 augustss #if 0
981 1.1 augustss void
982 1.1 augustss uhci_reset(p)
983 1.1 augustss void *p;
984 1.1 augustss {
985 1.1 augustss uhci_softc_t *sc = p;
986 1.1 augustss int n;
987 1.1 augustss
988 1.1 augustss UHCICMD(sc, UHCI_CMD_HCRESET);
989 1.1 augustss /* The reset bit goes low when the controller is done. */
990 1.1 augustss for (n = 0; n < UHCI_RESET_TIMEOUT &&
991 1.1 augustss (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
992 1.1 augustss delay(100);
993 1.1 augustss if (n >= UHCI_RESET_TIMEOUT)
994 1.13 augustss printf("%s: controller did not reset\n",
995 1.13 augustss USBDEVNAME(sc->sc_bus.bdev));
996 1.1 augustss }
997 1.1 augustss #endif
998 1.1 augustss
999 1.16 augustss usbd_status
1000 1.1 augustss uhci_run(sc, run)
1001 1.1 augustss uhci_softc_t *sc;
1002 1.1 augustss int run;
1003 1.1 augustss {
1004 1.1 augustss int s, n, running;
1005 1.1 augustss
1006 1.1 augustss run = run != 0;
1007 1.16 augustss s = splusb();
1008 1.30 augustss DPRINTF(("uhci_run: setting run=%d\n", run));
1009 1.30 augustss UHCICMD(sc, run ? UHCI_CMD_RS : 0);
1010 1.13 augustss for(n = 0; n < 10; n++) {
1011 1.1 augustss running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1012 1.1 augustss /* return when we've entered the state we want */
1013 1.1 augustss if (run == running) {
1014 1.1 augustss splx(s);
1015 1.30 augustss DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1016 1.30 augustss UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1017 1.16 augustss return (USBD_NORMAL_COMPLETION);
1018 1.1 augustss }
1019 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1020 1.1 augustss }
1021 1.1 augustss splx(s);
1022 1.13 augustss printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1023 1.14 augustss run ? "start" : "stop");
1024 1.16 augustss return (USBD_IOERROR);
1025 1.1 augustss }
1026 1.1 augustss
1027 1.1 augustss /*
1028 1.1 augustss * Memory management routines.
1029 1.1 augustss * uhci_alloc_std allocates TDs
1030 1.1 augustss * uhci_alloc_sqh allocates QHs
1031 1.7 augustss * These two routines do their own free list management,
1032 1.1 augustss * partly for speed, partly because allocating DMAable memory
1033 1.1 augustss * has page size granularaity so much memory would be wasted if
1034 1.16 augustss * only one TD/QH (32 bytes) was placed in each allocated chunk.
1035 1.1 augustss */
1036 1.1 augustss
1037 1.1 augustss uhci_soft_td_t *
1038 1.1 augustss uhci_alloc_std(sc)
1039 1.1 augustss uhci_softc_t *sc;
1040 1.1 augustss {
1041 1.1 augustss uhci_soft_td_t *std;
1042 1.1 augustss usbd_status r;
1043 1.1 augustss int i;
1044 1.7 augustss usb_dma_t dma;
1045 1.1 augustss
1046 1.1 augustss if (!sc->sc_freetds) {
1047 1.1 augustss DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1048 1.1 augustss std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK,
1049 1.31 augustss M_USBHC, M_NOWAIT);
1050 1.1 augustss if (!std)
1051 1.16 augustss return (0);
1052 1.7 augustss r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK,
1053 1.7 augustss UHCI_TD_ALIGN, &dma);
1054 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
1055 1.31 augustss free(std, M_USBHC);
1056 1.16 augustss return (0);
1057 1.1 augustss }
1058 1.1 augustss for(i = 0; i < UHCI_TD_CHUNK; i++, std++) {
1059 1.16 augustss std->physaddr = DMAADDR(&dma) + i * UHCI_TD_SIZE;
1060 1.1 augustss std->td = (uhci_td_t *)
1061 1.1 augustss ((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE);
1062 1.2 drochner std->td->link.std = sc->sc_freetds;
1063 1.1 augustss sc->sc_freetds = std;
1064 1.1 augustss }
1065 1.1 augustss }
1066 1.1 augustss std = sc->sc_freetds;
1067 1.1 augustss sc->sc_freetds = std->td->link.std;
1068 1.1 augustss memset(std->td, 0, UHCI_TD_SIZE);
1069 1.1 augustss return std;
1070 1.1 augustss }
1071 1.1 augustss
1072 1.1 augustss void
1073 1.1 augustss uhci_free_std(sc, std)
1074 1.1 augustss uhci_softc_t *sc;
1075 1.1 augustss uhci_soft_td_t *std;
1076 1.1 augustss {
1077 1.7 augustss #ifdef DIAGNOSTIC
1078 1.7 augustss #define TD_IS_FREE 0x12345678
1079 1.7 augustss if (std->td->td_token == TD_IS_FREE) {
1080 1.7 augustss printf("uhci_free_std: freeing free TD %p\n", std);
1081 1.7 augustss return;
1082 1.7 augustss }
1083 1.7 augustss std->td->td_token = TD_IS_FREE;
1084 1.7 augustss #endif
1085 1.2 drochner std->td->link.std = sc->sc_freetds;
1086 1.1 augustss sc->sc_freetds = std;
1087 1.1 augustss }
1088 1.1 augustss
1089 1.1 augustss uhci_soft_qh_t *
1090 1.1 augustss uhci_alloc_sqh(sc)
1091 1.1 augustss uhci_softc_t *sc;
1092 1.1 augustss {
1093 1.1 augustss uhci_soft_qh_t *sqh;
1094 1.1 augustss usbd_status r;
1095 1.1 augustss int i, offs;
1096 1.7 augustss usb_dma_t dma;
1097 1.1 augustss
1098 1.1 augustss if (!sc->sc_freeqhs) {
1099 1.1 augustss DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1100 1.1 augustss sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK,
1101 1.31 augustss M_USBHC, M_NOWAIT);
1102 1.1 augustss if (!sqh)
1103 1.1 augustss return 0;
1104 1.7 augustss r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK,
1105 1.7 augustss UHCI_QH_ALIGN, &dma);
1106 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
1107 1.31 augustss free(sqh, M_USBHC);
1108 1.1 augustss return 0;
1109 1.1 augustss }
1110 1.1 augustss for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) {
1111 1.1 augustss offs = i * UHCI_QH_SIZE;
1112 1.1 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1113 1.1 augustss sqh->qh = (uhci_qh_t *)
1114 1.1 augustss ((char *)KERNADDR(&dma) + offs);
1115 1.1 augustss sqh->qh->hlink = sc->sc_freeqhs;
1116 1.1 augustss sc->sc_freeqhs = sqh;
1117 1.1 augustss }
1118 1.1 augustss }
1119 1.1 augustss sqh = sc->sc_freeqhs;
1120 1.1 augustss sc->sc_freeqhs = sqh->qh->hlink;
1121 1.1 augustss memset(sqh->qh, 0, UHCI_QH_SIZE);
1122 1.16 augustss return (sqh);
1123 1.1 augustss }
1124 1.1 augustss
1125 1.1 augustss void
1126 1.1 augustss uhci_free_sqh(sc, sqh)
1127 1.1 augustss uhci_softc_t *sc;
1128 1.1 augustss uhci_soft_qh_t *sqh;
1129 1.1 augustss {
1130 1.1 augustss sqh->qh->hlink = sc->sc_freeqhs;
1131 1.1 augustss sc->sc_freeqhs = sqh;
1132 1.1 augustss }
1133 1.1 augustss
1134 1.16 augustss #if 0
1135 1.1 augustss /*
1136 1.1 augustss * Enter a list of transfers onto a control queue.
1137 1.1 augustss * Called at splusb()
1138 1.1 augustss */
1139 1.1 augustss void
1140 1.1 augustss uhci_enter_ctl_q(sc, sqh, ii)
1141 1.1 augustss uhci_softc_t *sc;
1142 1.1 augustss uhci_soft_qh_t *sqh;
1143 1.1 augustss uhci_intr_info_t *ii;
1144 1.1 augustss {
1145 1.1 augustss DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh));
1146 1.1 augustss
1147 1.1 augustss }
1148 1.16 augustss #endif
1149 1.1 augustss
1150 1.1 augustss void
1151 1.1 augustss uhci_free_std_chain(sc, std, stdend)
1152 1.1 augustss uhci_softc_t *sc;
1153 1.1 augustss uhci_soft_td_t *std;
1154 1.1 augustss uhci_soft_td_t *stdend;
1155 1.1 augustss {
1156 1.1 augustss uhci_soft_td_t *p;
1157 1.1 augustss
1158 1.1 augustss for (; std != stdend; std = p) {
1159 1.1 augustss p = std->td->link.std;
1160 1.1 augustss uhci_free_std(sc, std);
1161 1.1 augustss }
1162 1.1 augustss }
1163 1.1 augustss
1164 1.1 augustss usbd_status
1165 1.33 augustss uhci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep)
1166 1.1 augustss struct uhci_pipe *upipe;
1167 1.1 augustss uhci_softc_t *sc;
1168 1.33 augustss int len, rd, shortok;
1169 1.7 augustss usb_dma_t *dma;
1170 1.1 augustss uhci_soft_td_t **sp, **ep;
1171 1.1 augustss {
1172 1.1 augustss uhci_soft_td_t *p, *lastp;
1173 1.1 augustss uhci_physaddr_t lastlink;
1174 1.1 augustss int i, ntd, l, tog, maxp;
1175 1.18 augustss u_int32_t status;
1176 1.1 augustss int addr = upipe->pipe.device->address;
1177 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1178 1.1 augustss
1179 1.33 augustss DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d "
1180 1.33 augustss "shortok=%d\n", addr, UE_GET_ADDR(endpt), len,
1181 1.33 augustss upipe->pipe.device->lowspeed, shortok));
1182 1.1 augustss if (len == 0) {
1183 1.1 augustss *sp = *ep = 0;
1184 1.12 augustss DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n"));
1185 1.1 augustss return (USBD_NORMAL_COMPLETION);
1186 1.1 augustss }
1187 1.4 augustss maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1188 1.1 augustss if (maxp == 0) {
1189 1.1 augustss printf("uhci_alloc_std_chain: maxp=0\n");
1190 1.1 augustss return (USBD_INVAL);
1191 1.1 augustss }
1192 1.1 augustss ntd = (len + maxp - 1) / maxp;
1193 1.1 augustss tog = upipe->pipe.endpoint->toggle;
1194 1.1 augustss if (ntd % 2 == 0)
1195 1.1 augustss tog ^= 1;
1196 1.32 augustss upipe->nexttoggle = tog ^ 1;
1197 1.1 augustss lastp = 0;
1198 1.1 augustss lastlink = UHCI_PTR_T;
1199 1.1 augustss ntd--;
1200 1.33 augustss status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1201 1.18 augustss if (upipe->pipe.device->lowspeed)
1202 1.18 augustss status |= UHCI_TD_LS;
1203 1.33 augustss if (shortok)
1204 1.18 augustss status |= UHCI_TD_SPD;
1205 1.1 augustss for (i = ntd; i >= 0; i--) {
1206 1.1 augustss p = uhci_alloc_std(sc);
1207 1.1 augustss if (!p) {
1208 1.1 augustss uhci_free_std_chain(sc, lastp, 0);
1209 1.1 augustss return (USBD_NOMEM);
1210 1.1 augustss }
1211 1.2 drochner p->td->link.std = lastp;
1212 1.1 augustss p->td->td_link = lastlink;
1213 1.1 augustss lastp = p;
1214 1.1 augustss lastlink = p->physaddr;
1215 1.18 augustss p->td->td_status = status;
1216 1.1 augustss if (i == ntd) {
1217 1.1 augustss /* last TD */
1218 1.1 augustss l = len % maxp;
1219 1.1 augustss if (l == 0) l = maxp;
1220 1.1 augustss *ep = p;
1221 1.1 augustss } else
1222 1.1 augustss l = maxp;
1223 1.1 augustss p->td->td_token =
1224 1.1 augustss rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1225 1.1 augustss UHCI_TD_OUT(l, endpt, addr, tog);
1226 1.1 augustss p->td->td_buffer = DMAADDR(dma) + i * maxp;
1227 1.1 augustss tog ^= 1;
1228 1.1 augustss }
1229 1.1 augustss *sp = lastp;
1230 1.1 augustss /*upipe->pipe.endpoint->toggle = tog;*/
1231 1.33 augustss DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d nexttog=%d\n",
1232 1.32 augustss upipe->pipe.endpoint->toggle, upipe->nexttoggle));
1233 1.1 augustss return (USBD_NORMAL_COMPLETION);
1234 1.1 augustss }
1235 1.1 augustss
1236 1.1 augustss usbd_status
1237 1.1 augustss uhci_device_bulk_transfer(reqh)
1238 1.1 augustss usbd_request_handle reqh;
1239 1.1 augustss {
1240 1.16 augustss int s;
1241 1.16 augustss usbd_status r;
1242 1.16 augustss
1243 1.16 augustss s = splusb();
1244 1.16 augustss r = usb_insert_transfer(reqh);
1245 1.16 augustss splx(s);
1246 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1247 1.16 augustss return (r);
1248 1.16 augustss else
1249 1.16 augustss return (uhci_device_bulk_start(reqh));
1250 1.16 augustss }
1251 1.16 augustss
1252 1.16 augustss usbd_status
1253 1.16 augustss uhci_device_bulk_start(reqh)
1254 1.16 augustss usbd_request_handle reqh;
1255 1.16 augustss {
1256 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1257 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1258 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1259 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1260 1.1 augustss uhci_soft_td_t *xfer, *xferend;
1261 1.1 augustss uhci_soft_qh_t *sqh;
1262 1.7 augustss usb_dma_t *dmap;
1263 1.1 augustss usbd_status r;
1264 1.1 augustss int len, isread;
1265 1.1 augustss int s;
1266 1.1 augustss
1267 1.12 augustss DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d "
1268 1.12 augustss "flags=%d\n",
1269 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags));
1270 1.1 augustss
1271 1.1 augustss if (reqh->isreq)
1272 1.1 augustss panic("uhci_device_bulk_transfer: a request\n");
1273 1.1 augustss
1274 1.1 augustss len = reqh->length;
1275 1.1 augustss dmap = &upipe->u.bulk.datadma;
1276 1.1 augustss isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
1277 1.1 augustss sqh = upipe->u.bulk.sqh;
1278 1.1 augustss
1279 1.1 augustss upipe->u.bulk.isread = isread;
1280 1.1 augustss upipe->u.bulk.length = len;
1281 1.1 augustss
1282 1.7 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1283 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1284 1.1 augustss goto ret1;
1285 1.1 augustss r = uhci_alloc_std_chain(upipe, sc, len, isread,
1286 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1287 1.1 augustss dmap, &xfer, &xferend);
1288 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1289 1.1 augustss goto ret2;
1290 1.1 augustss xferend->td->td_status |= UHCI_TD_IOC;
1291 1.1 augustss
1292 1.1 augustss if (!isread && len != 0)
1293 1.1 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1294 1.1 augustss
1295 1.1 augustss #ifdef USB_DEBUG
1296 1.33 augustss if (uhcidebug > 8) {
1297 1.1 augustss printf("uhci_device_bulk_transfer: xfer(1)\n");
1298 1.1 augustss uhci_dump_tds(xfer);
1299 1.1 augustss }
1300 1.1 augustss #endif
1301 1.1 augustss
1302 1.1 augustss /* Set up interrupt info. */
1303 1.1 augustss ii->reqh = reqh;
1304 1.1 augustss ii->stdstart = xfer;
1305 1.1 augustss ii->stdend = xferend;
1306 1.7 augustss #ifdef DIAGNOSTIC
1307 1.7 augustss ii->isdone = 0;
1308 1.7 augustss #endif
1309 1.1 augustss
1310 1.1 augustss sqh->qh->elink = xfer;
1311 1.1 augustss sqh->qh->qh_elink = xfer->physaddr;
1312 1.1 augustss sqh->intr_info = ii;
1313 1.1 augustss
1314 1.1 augustss s = splusb();
1315 1.1 augustss uhci_add_bulk(sc, sqh);
1316 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1317 1.1 augustss
1318 1.13 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1319 1.13 augustss usb_timeout(uhci_timeout, ii,
1320 1.13 augustss MS_TO_TICKS(reqh->timeout), ii->timeout_handle);
1321 1.13 augustss }
1322 1.1 augustss splx(s);
1323 1.1 augustss
1324 1.1 augustss #ifdef USB_DEBUG
1325 1.1 augustss if (uhcidebug > 10) {
1326 1.1 augustss printf("uhci_device_bulk_transfer: xfer(2)\n");
1327 1.1 augustss uhci_dump_tds(xfer);
1328 1.1 augustss }
1329 1.1 augustss #endif
1330 1.1 augustss
1331 1.26 augustss if (sc->sc_bus.use_polling)
1332 1.26 augustss uhci_waitintr(sc, reqh);
1333 1.26 augustss
1334 1.1 augustss return (USBD_IN_PROGRESS);
1335 1.1 augustss
1336 1.1 augustss ret2:
1337 1.1 augustss if (len != 0)
1338 1.7 augustss usb_freemem(sc->sc_dmatag, dmap);
1339 1.1 augustss ret1:
1340 1.1 augustss return (r);
1341 1.1 augustss }
1342 1.1 augustss
1343 1.1 augustss /* Abort a device bulk request. */
1344 1.1 augustss void
1345 1.1 augustss uhci_device_bulk_abort(reqh)
1346 1.1 augustss usbd_request_handle reqh;
1347 1.1 augustss {
1348 1.33 augustss DPRINTF(("uhci_device_bulk_abort:\n"));
1349 1.33 augustss uhci_abort_req(reqh, USBD_CANCELLED);
1350 1.33 augustss }
1351 1.33 augustss
1352 1.33 augustss void
1353 1.33 augustss uhci_abort_req(reqh, status)
1354 1.33 augustss usbd_request_handle reqh;
1355 1.33 augustss usbd_status status;
1356 1.33 augustss {
1357 1.33 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1358 1.33 augustss uhci_intr_info_t *ii = upipe->iinfo;
1359 1.33 augustss uhci_soft_td_t *std;
1360 1.33 augustss int s;
1361 1.33 augustss
1362 1.33 augustss /* Make interrupt routine ignore it, */
1363 1.33 augustss reqh->status = USBD_CANCELLED;
1364 1.33 augustss
1365 1.33 augustss /* make hardware ignore it, */
1366 1.33 augustss for (std = ii->stdstart; std != 0; std = std->td->link.std)
1367 1.33 augustss std->td->td_status &= ~UHCI_TD_ACTIVE;
1368 1.33 augustss /* make sure hardware has completed, */
1369 1.33 augustss usb_delay_ms(reqh->pipe->device->bus, 1);
1370 1.33 augustss
1371 1.33 augustss /* and call final part of interrupt handler. */
1372 1.33 augustss s = splusb();
1373 1.33 augustss uhci_ii_finish(ii);
1374 1.33 augustss splx(s);
1375 1.1 augustss }
1376 1.1 augustss
1377 1.1 augustss /* Close a device bulk pipe. */
1378 1.1 augustss void
1379 1.1 augustss uhci_device_bulk_close(pipe)
1380 1.1 augustss usbd_pipe_handle pipe;
1381 1.1 augustss {
1382 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1383 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1384 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1385 1.1 augustss
1386 1.1 augustss uhci_free_sqh(sc, upipe->u.bulk.sqh);
1387 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1388 1.1 augustss /* XXX free other resources */
1389 1.1 augustss }
1390 1.1 augustss
1391 1.1 augustss usbd_status
1392 1.1 augustss uhci_device_ctrl_transfer(reqh)
1393 1.1 augustss usbd_request_handle reqh;
1394 1.1 augustss {
1395 1.16 augustss int s;
1396 1.16 augustss usbd_status r;
1397 1.16 augustss
1398 1.16 augustss s = splusb();
1399 1.16 augustss r = usb_insert_transfer(reqh);
1400 1.16 augustss splx(s);
1401 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1402 1.16 augustss return (r);
1403 1.16 augustss else
1404 1.16 augustss return (uhci_device_ctrl_start(reqh));
1405 1.16 augustss }
1406 1.16 augustss
1407 1.16 augustss usbd_status
1408 1.16 augustss uhci_device_ctrl_start(reqh)
1409 1.16 augustss usbd_request_handle reqh;
1410 1.16 augustss {
1411 1.9 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1412 1.1 augustss usbd_status r;
1413 1.1 augustss
1414 1.1 augustss if (!reqh->isreq)
1415 1.1 augustss panic("uhci_device_ctrl_transfer: not a request\n");
1416 1.1 augustss
1417 1.1 augustss r = uhci_device_request(reqh);
1418 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1419 1.1 augustss return (r);
1420 1.1 augustss
1421 1.9 augustss if (sc->sc_bus.use_polling)
1422 1.9 augustss uhci_waitintr(sc, reqh);
1423 1.1 augustss return (USBD_IN_PROGRESS);
1424 1.1 augustss }
1425 1.1 augustss
1426 1.1 augustss usbd_status
1427 1.1 augustss uhci_device_intr_transfer(reqh)
1428 1.1 augustss usbd_request_handle reqh;
1429 1.1 augustss {
1430 1.16 augustss int s;
1431 1.16 augustss usbd_status r;
1432 1.16 augustss
1433 1.16 augustss s = splusb();
1434 1.16 augustss r = usb_insert_transfer(reqh);
1435 1.16 augustss splx(s);
1436 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1437 1.16 augustss return (r);
1438 1.16 augustss else
1439 1.16 augustss return (uhci_device_intr_start(reqh));
1440 1.16 augustss }
1441 1.16 augustss
1442 1.16 augustss usbd_status
1443 1.16 augustss uhci_device_intr_start(reqh)
1444 1.16 augustss usbd_request_handle reqh;
1445 1.16 augustss {
1446 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1447 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1448 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1449 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1450 1.1 augustss uhci_soft_td_t *xfer, *xferend;
1451 1.1 augustss uhci_soft_qh_t *sqh;
1452 1.7 augustss usb_dma_t *dmap;
1453 1.1 augustss usbd_status r;
1454 1.1 augustss int len, i;
1455 1.1 augustss int s;
1456 1.1 augustss
1457 1.12 augustss DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d "
1458 1.12 augustss "flags=%d\n",
1459 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags));
1460 1.1 augustss
1461 1.1 augustss if (reqh->isreq)
1462 1.1 augustss panic("uhci_device_intr_transfer: a request\n");
1463 1.1 augustss
1464 1.1 augustss len = reqh->length;
1465 1.1 augustss dmap = &upipe->u.intr.datadma;
1466 1.1 augustss if (len == 0)
1467 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
1468 1.1 augustss
1469 1.7 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1470 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1471 1.1 augustss goto ret1;
1472 1.18 augustss r = uhci_alloc_std_chain(upipe, sc, len, 1,
1473 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1474 1.18 augustss dmap, &xfer, &xferend);
1475 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1476 1.1 augustss goto ret2;
1477 1.1 augustss xferend->td->td_status |= UHCI_TD_IOC;
1478 1.1 augustss
1479 1.1 augustss #ifdef USB_DEBUG
1480 1.1 augustss if (uhcidebug > 10) {
1481 1.1 augustss printf("uhci_device_intr_transfer: xfer(1)\n");
1482 1.1 augustss uhci_dump_tds(xfer);
1483 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1484 1.1 augustss }
1485 1.1 augustss #endif
1486 1.1 augustss
1487 1.1 augustss s = splusb();
1488 1.1 augustss /* Set up interrupt info. */
1489 1.1 augustss ii->reqh = reqh;
1490 1.1 augustss ii->stdstart = xfer;
1491 1.1 augustss ii->stdend = xferend;
1492 1.7 augustss #ifdef DIAGNOSTIC
1493 1.7 augustss ii->isdone = 0;
1494 1.7 augustss #endif
1495 1.1 augustss
1496 1.12 augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
1497 1.12 augustss upipe->u.intr.qhs[0]));
1498 1.1 augustss for (i = 0; i < upipe->u.intr.npoll; i++) {
1499 1.1 augustss sqh = upipe->u.intr.qhs[i];
1500 1.1 augustss sqh->qh->elink = xfer;
1501 1.1 augustss sqh->qh->qh_elink = xfer->physaddr;
1502 1.1 augustss }
1503 1.1 augustss splx(s);
1504 1.1 augustss
1505 1.1 augustss #ifdef USB_DEBUG
1506 1.1 augustss if (uhcidebug > 10) {
1507 1.1 augustss printf("uhci_device_intr_transfer: xfer(2)\n");
1508 1.1 augustss uhci_dump_tds(xfer);
1509 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1510 1.1 augustss }
1511 1.1 augustss #endif
1512 1.1 augustss
1513 1.1 augustss return (USBD_IN_PROGRESS);
1514 1.1 augustss
1515 1.1 augustss ret2:
1516 1.1 augustss if (len != 0)
1517 1.7 augustss usb_freemem(sc->sc_dmatag, dmap);
1518 1.1 augustss ret1:
1519 1.1 augustss return (r);
1520 1.1 augustss }
1521 1.1 augustss
1522 1.1 augustss /* Abort a device control request. */
1523 1.1 augustss void
1524 1.1 augustss uhci_device_ctrl_abort(reqh)
1525 1.1 augustss usbd_request_handle reqh;
1526 1.1 augustss {
1527 1.33 augustss DPRINTF(("uhci_device_ctrl_abort:\n"));
1528 1.33 augustss uhci_abort_req(reqh, USBD_CANCELLED);
1529 1.1 augustss }
1530 1.1 augustss
1531 1.1 augustss /* Close a device control pipe. */
1532 1.1 augustss void
1533 1.1 augustss uhci_device_ctrl_close(pipe)
1534 1.1 augustss usbd_pipe_handle pipe;
1535 1.1 augustss {
1536 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1537 1.1 augustss
1538 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1539 1.1 augustss /* XXX free other resources */
1540 1.1 augustss }
1541 1.1 augustss
1542 1.1 augustss /* Abort a device interrupt request. */
1543 1.1 augustss void
1544 1.1 augustss uhci_device_intr_abort(reqh)
1545 1.1 augustss usbd_request_handle reqh;
1546 1.1 augustss {
1547 1.1 augustss struct uhci_pipe *upipe;
1548 1.1 augustss
1549 1.7 augustss DPRINTFN(1, ("uhci_device_intr_abort: reqh=%p\n", reqh));
1550 1.6 augustss /* XXX inactivate */
1551 1.20 augustss usb_delay_ms(reqh->pipe->device->bus, 2); /* make sure it is done */
1552 1.31 augustss if (reqh->pipe->repeat) {
1553 1.1 augustss DPRINTF(("uhci_device_intr_abort: remove\n"));
1554 1.31 augustss reqh->pipe->repeat = 0;
1555 1.1 augustss upipe = (struct uhci_pipe *)reqh->pipe;
1556 1.1 augustss uhci_intr_done(upipe->u.intr.qhs[0]->intr_info);
1557 1.1 augustss }
1558 1.1 augustss }
1559 1.1 augustss
1560 1.1 augustss /* Close a device interrupt pipe. */
1561 1.1 augustss void
1562 1.1 augustss uhci_device_intr_close(pipe)
1563 1.1 augustss usbd_pipe_handle pipe;
1564 1.1 augustss {
1565 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1566 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1567 1.1 augustss int i, s, npoll;
1568 1.1 augustss
1569 1.1 augustss upipe->iinfo->stdstart = 0; /* inactive */
1570 1.1 augustss
1571 1.1 augustss /* Unlink descriptors from controller data structures. */
1572 1.1 augustss npoll = upipe->u.intr.npoll;
1573 1.1 augustss uhci_lock_frames(sc);
1574 1.1 augustss for (i = 0; i < npoll; i++)
1575 1.1 augustss uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos,
1576 1.1 augustss upipe->u.intr.qhs[i]);
1577 1.1 augustss uhci_unlock_frames(sc);
1578 1.1 augustss
1579 1.1 augustss /*
1580 1.1 augustss * We now have to wait for any activity on the physical
1581 1.1 augustss * descriptors to stop.
1582 1.1 augustss */
1583 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
1584 1.1 augustss
1585 1.1 augustss for(i = 0; i < npoll; i++)
1586 1.1 augustss uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
1587 1.31 augustss free(upipe->u.intr.qhs, M_USBHC);
1588 1.1 augustss
1589 1.1 augustss s = splusb();
1590 1.1 augustss LIST_REMOVE(upipe->iinfo, list); /* remove from active list */
1591 1.1 augustss splx(s);
1592 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1593 1.1 augustss
1594 1.1 augustss /* XXX free other resources */
1595 1.1 augustss }
1596 1.1 augustss
1597 1.1 augustss usbd_status
1598 1.1 augustss uhci_device_request(reqh)
1599 1.1 augustss usbd_request_handle reqh;
1600 1.1 augustss {
1601 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1602 1.1 augustss usb_device_request_t *req = &reqh->request;
1603 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1604 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1605 1.1 augustss int addr = dev->address;
1606 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1607 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1608 1.1 augustss uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend;
1609 1.1 augustss uhci_soft_qh_t *sqh;
1610 1.7 augustss usb_dma_t *dmap;
1611 1.1 augustss int len;
1612 1.1 augustss u_int32_t ls;
1613 1.1 augustss usbd_status r;
1614 1.1 augustss int isread;
1615 1.1 augustss int s;
1616 1.1 augustss
1617 1.13 augustss DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
1618 1.12 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1619 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1620 1.1 augustss UGETW(req->wIndex), UGETW(req->wLength),
1621 1.1 augustss addr, endpt));
1622 1.1 augustss
1623 1.1 augustss ls = dev->lowspeed ? UHCI_TD_LS : 0;
1624 1.1 augustss isread = req->bmRequestType & UT_READ;
1625 1.1 augustss len = UGETW(req->wLength);
1626 1.1 augustss
1627 1.1 augustss setup = upipe->u.ctl.setup;
1628 1.1 augustss stat = upipe->u.ctl.stat;
1629 1.1 augustss sqh = upipe->u.ctl.sqh;
1630 1.1 augustss dmap = &upipe->u.ctl.datadma;
1631 1.1 augustss
1632 1.1 augustss /* Set up data transaction */
1633 1.1 augustss if (len != 0) {
1634 1.7 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1635 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1636 1.1 augustss goto ret1;
1637 1.1 augustss upipe->pipe.endpoint->toggle = 1;
1638 1.1 augustss r = uhci_alloc_std_chain(upipe, sc, len, isread,
1639 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1640 1.1 augustss dmap, &xfer, &xferend);
1641 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1642 1.1 augustss goto ret2;
1643 1.1 augustss next = xfer;
1644 1.2 drochner xferend->td->link.std = stat;
1645 1.1 augustss xferend->td->td_link = stat->physaddr;
1646 1.1 augustss } else {
1647 1.1 augustss next = stat;
1648 1.1 augustss }
1649 1.1 augustss upipe->u.ctl.length = len;
1650 1.1 augustss
1651 1.1 augustss memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
1652 1.1 augustss if (!isread && len != 0)
1653 1.1 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1654 1.1 augustss
1655 1.2 drochner setup->td->link.std = next;
1656 1.1 augustss setup->td->td_link = next->physaddr;
1657 1.1 augustss setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
1658 1.1 augustss setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr);
1659 1.1 augustss setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma);
1660 1.1 augustss
1661 1.2 drochner stat->td->link.std = 0;
1662 1.1 augustss stat->td->td_link = UHCI_PTR_T;
1663 1.1 augustss stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls |
1664 1.1 augustss UHCI_TD_ACTIVE | UHCI_TD_IOC;
1665 1.1 augustss stat->td->td_token =
1666 1.1 augustss isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
1667 1.1 augustss UHCI_TD_IN (0, endpt, addr, 1);
1668 1.1 augustss stat->td->td_buffer = 0;
1669 1.1 augustss
1670 1.1 augustss #ifdef USB_DEBUG
1671 1.1 augustss if (uhcidebug > 20) {
1672 1.1 augustss printf("uhci_device_request: setup\n");
1673 1.1 augustss uhci_dump_td(setup);
1674 1.1 augustss printf("uhci_device_request: stat\n");
1675 1.1 augustss uhci_dump_td(stat);
1676 1.1 augustss }
1677 1.1 augustss #endif
1678 1.1 augustss
1679 1.1 augustss /* Set up interrupt info. */
1680 1.1 augustss ii->reqh = reqh;
1681 1.1 augustss ii->stdstart = setup;
1682 1.1 augustss ii->stdend = stat;
1683 1.7 augustss #ifdef DIAGNOSTIC
1684 1.7 augustss ii->isdone = 0;
1685 1.7 augustss #endif
1686 1.1 augustss
1687 1.1 augustss sqh->qh->elink = setup;
1688 1.1 augustss sqh->qh->qh_elink = setup->physaddr;
1689 1.1 augustss sqh->intr_info = ii;
1690 1.1 augustss
1691 1.1 augustss s = splusb();
1692 1.1 augustss uhci_add_ctrl(sc, sqh);
1693 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1694 1.1 augustss #ifdef USB_DEBUG
1695 1.1 augustss if (uhcidebug > 12) {
1696 1.1 augustss uhci_soft_td_t *std;
1697 1.1 augustss uhci_soft_qh_t *xqh;
1698 1.13 augustss uhci_soft_qh_t *sxqh;
1699 1.13 augustss int maxqh = 0;
1700 1.1 augustss uhci_physaddr_t link;
1701 1.1 augustss printf("uhci_enter_ctl_q: follow from [0]\n");
1702 1.1 augustss for (std = sc->sc_vframes[0].htd, link = 0;
1703 1.1 augustss (link & UHCI_PTR_Q) == 0;
1704 1.1 augustss std = std->td->link.std) {
1705 1.1 augustss link = std->td->td_link;
1706 1.1 augustss uhci_dump_td(std);
1707 1.1 augustss }
1708 1.13 augustss for (sxqh = xqh = (uhci_soft_qh_t *)std;
1709 1.1 augustss xqh;
1710 1.13 augustss xqh = (maxqh++ == 5 || xqh->qh->hlink==sxqh ||
1711 1.13 augustss xqh->qh->hlink==xqh ? NULL : xqh->qh->hlink)) {
1712 1.1 augustss uhci_dump_qh(xqh);
1713 1.13 augustss uhci_dump_qh(sxqh);
1714 1.13 augustss }
1715 1.1 augustss printf("Enqueued QH:\n");
1716 1.1 augustss uhci_dump_qh(sqh);
1717 1.1 augustss uhci_dump_tds(sqh->qh->elink);
1718 1.1 augustss }
1719 1.1 augustss #endif
1720 1.13 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1721 1.13 augustss usb_timeout(uhci_timeout, ii,
1722 1.13 augustss MS_TO_TICKS(reqh->timeout), ii->timeout_handle);
1723 1.13 augustss }
1724 1.1 augustss splx(s);
1725 1.1 augustss
1726 1.1 augustss return (USBD_NORMAL_COMPLETION);
1727 1.1 augustss
1728 1.1 augustss ret2:
1729 1.1 augustss if (len != 0)
1730 1.7 augustss usb_freemem(sc->sc_dmatag, dmap);
1731 1.1 augustss ret1:
1732 1.1 augustss return (r);
1733 1.1 augustss }
1734 1.1 augustss
1735 1.16 augustss usbd_status
1736 1.16 augustss uhci_device_isoc_transfer(reqh)
1737 1.16 augustss usbd_request_handle reqh;
1738 1.16 augustss {
1739 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1740 1.19 augustss #ifdef USB_DEBUG
1741 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
1742 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1743 1.19 augustss #endif
1744 1.16 augustss
1745 1.16 augustss DPRINTFN(1,("uhci_device_isoc_transfer: sc=%p\n", sc));
1746 1.16 augustss if (upipe->u.iso.bufsize == 0)
1747 1.16 augustss return (USBD_INVAL);
1748 1.16 augustss
1749 1.16 augustss /* XXX copy data */
1750 1.16 augustss return (USBD_XXX);
1751 1.16 augustss }
1752 1.16 augustss
1753 1.16 augustss usbd_status
1754 1.16 augustss uhci_device_isoc_start(reqh)
1755 1.16 augustss usbd_request_handle reqh;
1756 1.16 augustss {
1757 1.16 augustss return (USBD_XXX);
1758 1.16 augustss }
1759 1.16 augustss
1760 1.16 augustss void
1761 1.16 augustss uhci_device_isoc_abort(reqh)
1762 1.16 augustss usbd_request_handle reqh;
1763 1.16 augustss {
1764 1.33 augustss /* XXX Can't abort this. */
1765 1.16 augustss }
1766 1.16 augustss
1767 1.16 augustss void
1768 1.16 augustss uhci_device_isoc_close(pipe)
1769 1.16 augustss usbd_pipe_handle pipe;
1770 1.16 augustss {
1771 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1772 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
1773 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1774 1.16 augustss struct iso *iso;
1775 1.16 augustss int i;
1776 1.16 augustss
1777 1.16 augustss /*
1778 1.16 augustss * Make sure all TDs are marked as inactive.
1779 1.16 augustss * Wait for completion.
1780 1.16 augustss * Unschedule.
1781 1.16 augustss * Deallocate.
1782 1.16 augustss */
1783 1.16 augustss iso = &upipe->u.iso;
1784 1.16 augustss
1785 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
1786 1.16 augustss iso->stds[i]->td->td_status &= ~UHCI_TD_ACTIVE;
1787 1.20 augustss usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
1788 1.16 augustss
1789 1.16 augustss uhci_lock_frames(sc);
1790 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
1791 1.16 augustss uhci_soft_td_t *std, *vstd;
1792 1.16 augustss
1793 1.16 augustss std = iso->stds[i];
1794 1.16 augustss for (vstd = sc->sc_vframes[i % UHCI_VFRAMELIST_COUNT].htd;
1795 1.16 augustss vstd && vstd->td->link.std != std;
1796 1.16 augustss vstd = vstd->td->link.std)
1797 1.16 augustss ;
1798 1.16 augustss if (!vstd) {
1799 1.16 augustss /*panic*/
1800 1.16 augustss printf("uhci_device_isoc_close: %p not found\n", std);
1801 1.16 augustss uhci_unlock_frames(sc);
1802 1.16 augustss return;
1803 1.16 augustss }
1804 1.16 augustss vstd->td->link = std->td->link;
1805 1.16 augustss vstd->td->td_link = std->td->td_link;
1806 1.16 augustss uhci_free_std(sc, std);
1807 1.16 augustss }
1808 1.16 augustss uhci_unlock_frames(sc);
1809 1.16 augustss
1810 1.16 augustss for (i = 0; i < iso->nbuf; i++)
1811 1.16 augustss usb_freemem(sc->sc_dmatag, &iso->bufs[i]);
1812 1.31 augustss free(iso->stds, M_USBHC);
1813 1.31 augustss free(iso->bufs, M_USBHC);
1814 1.16 augustss
1815 1.16 augustss /* XXX what else? */
1816 1.16 augustss }
1817 1.16 augustss
1818 1.16 augustss usbd_status
1819 1.16 augustss uhci_device_isoc_setbuf(pipe, bufsize, nbuf)
1820 1.16 augustss usbd_pipe_handle pipe;
1821 1.16 augustss u_int bufsize;
1822 1.16 augustss u_int nbuf;
1823 1.16 augustss {
1824 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1825 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
1826 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1827 1.16 augustss int addr = upipe->pipe.device->address;
1828 1.16 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1829 1.16 augustss int rd = upipe->pipe.endpoint->edesc->bEndpointAddress & UE_IN;
1830 1.16 augustss struct iso *iso;
1831 1.16 augustss int i;
1832 1.16 augustss usbd_status r;
1833 1.16 augustss
1834 1.16 augustss /*
1835 1.16 augustss * For simplicity the number of buffers must fit nicely in the frame
1836 1.16 augustss * list.
1837 1.16 augustss */
1838 1.16 augustss if (UHCI_VFRAMELIST_COUNT % nbuf != 0)
1839 1.16 augustss return (USBD_INVAL);
1840 1.16 augustss
1841 1.16 augustss iso = &upipe->u.iso;
1842 1.16 augustss iso->bufsize = bufsize;
1843 1.16 augustss iso->nbuf = nbuf;
1844 1.16 augustss
1845 1.16 augustss /* Allocate memory for buffers. */
1846 1.31 augustss iso->bufs = malloc(nbuf * sizeof(usb_dma_t), M_USBHC, M_WAITOK);
1847 1.16 augustss iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
1848 1.31 augustss M_USBHC, M_WAITOK);
1849 1.16 augustss
1850 1.16 augustss for (i = 0; i < nbuf; i++) {
1851 1.16 augustss r = usb_allocmem(sc->sc_dmatag, bufsize, 0, &iso->bufs[i]);
1852 1.16 augustss if (r != USBD_NORMAL_COMPLETION) {
1853 1.16 augustss nbuf = i;
1854 1.16 augustss goto bad1;
1855 1.16 augustss }
1856 1.16 augustss }
1857 1.16 augustss
1858 1.16 augustss /* Allocate the TDs. */
1859 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
1860 1.16 augustss iso->stds[i] = uhci_alloc_std(sc);
1861 1.16 augustss if (iso->stds[i] == 0)
1862 1.16 augustss goto bad2;
1863 1.16 augustss }
1864 1.16 augustss
1865 1.16 augustss /* XXX check schedule */
1866 1.16 augustss
1867 1.16 augustss /* XXX interrupts */
1868 1.16 augustss
1869 1.16 augustss /* Insert TDs into schedule, all marked inactive. */
1870 1.16 augustss uhci_lock_frames(sc);
1871 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
1872 1.16 augustss uhci_soft_td_t *std, *vstd;
1873 1.16 augustss
1874 1.16 augustss std = iso->stds[i];
1875 1.16 augustss std->td->td_status = UHCI_TD_IOS; /* iso, inactive */
1876 1.16 augustss std->td->td_token =
1877 1.16 augustss rd ? UHCI_TD_IN (0, endpt, addr, 0) :
1878 1.16 augustss UHCI_TD_OUT(0, endpt, addr, 0);
1879 1.16 augustss std->td->td_buffer = DMAADDR(&iso->bufs[i % nbuf]);
1880 1.16 augustss
1881 1.16 augustss vstd = sc->sc_vframes[i % UHCI_VFRAMELIST_COUNT].htd;
1882 1.16 augustss std->td->link = vstd->td->link;
1883 1.16 augustss std->td->td_link = vstd->td->td_link;
1884 1.16 augustss vstd->td->link.std = std;
1885 1.16 augustss vstd->td->td_link = std->physaddr;
1886 1.16 augustss }
1887 1.16 augustss uhci_unlock_frames(sc);
1888 1.16 augustss
1889 1.16 augustss return (USBD_NORMAL_COMPLETION);
1890 1.16 augustss
1891 1.16 augustss bad2:
1892 1.16 augustss while (--i >= 0)
1893 1.16 augustss uhci_free_std(sc, iso->stds[i]);
1894 1.16 augustss bad1:
1895 1.16 augustss for (i = 0; i < nbuf; i++)
1896 1.16 augustss usb_freemem(sc->sc_dmatag, &iso->bufs[i]);
1897 1.31 augustss free(iso->stds, M_USBHC);
1898 1.31 augustss free(iso->bufs, M_USBHC);
1899 1.16 augustss return (USBD_NOMEM);
1900 1.16 augustss }
1901 1.16 augustss
1902 1.16 augustss void
1903 1.16 augustss uhci_isoc_done(ii)
1904 1.16 augustss uhci_intr_info_t *ii;
1905 1.16 augustss {
1906 1.16 augustss }
1907 1.16 augustss
1908 1.1 augustss void
1909 1.1 augustss uhci_intr_done(ii)
1910 1.1 augustss uhci_intr_info_t *ii;
1911 1.1 augustss {
1912 1.1 augustss uhci_softc_t *sc = ii->sc;
1913 1.1 augustss usbd_request_handle reqh = ii->reqh;
1914 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1915 1.7 augustss usb_dma_t *dma;
1916 1.1 augustss uhci_soft_qh_t *sqh;
1917 1.1 augustss int i, npoll;
1918 1.1 augustss
1919 1.1 augustss DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen));
1920 1.1 augustss
1921 1.1 augustss dma = &upipe->u.intr.datadma;
1922 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
1923 1.1 augustss npoll = upipe->u.intr.npoll;
1924 1.1 augustss for(i = 0; i < npoll; i++) {
1925 1.1 augustss sqh = upipe->u.intr.qhs[i];
1926 1.1 augustss sqh->qh->elink = 0;
1927 1.1 augustss sqh->qh->qh_elink = UHCI_PTR_T;
1928 1.1 augustss }
1929 1.1 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
1930 1.1 augustss
1931 1.1 augustss /* XXX Wasteful. */
1932 1.31 augustss if (reqh->pipe->repeat) {
1933 1.1 augustss uhci_soft_td_t *xfer, *xferend;
1934 1.1 augustss
1935 1.1 augustss /* This alloc cannot fail since we freed the chain above. */
1936 1.18 augustss uhci_alloc_std_chain(upipe, sc, reqh->length, 1,
1937 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1938 1.18 augustss dma, &xfer, &xferend);
1939 1.1 augustss xferend->td->td_status |= UHCI_TD_IOC;
1940 1.1 augustss
1941 1.1 augustss #ifdef USB_DEBUG
1942 1.1 augustss if (uhcidebug > 10) {
1943 1.1 augustss printf("uhci_device_intr_done: xfer(1)\n");
1944 1.1 augustss uhci_dump_tds(xfer);
1945 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1946 1.1 augustss }
1947 1.1 augustss #endif
1948 1.1 augustss
1949 1.1 augustss ii->stdstart = xfer;
1950 1.1 augustss ii->stdend = xferend;
1951 1.7 augustss #ifdef DIAGNOSTIC
1952 1.7 augustss ii->isdone = 0;
1953 1.7 augustss #endif
1954 1.1 augustss for (i = 0; i < npoll; i++) {
1955 1.1 augustss sqh = upipe->u.intr.qhs[i];
1956 1.1 augustss sqh->qh->elink = xfer;
1957 1.1 augustss sqh->qh->qh_elink = xfer->physaddr;
1958 1.1 augustss }
1959 1.1 augustss } else {
1960 1.7 augustss usb_freemem(sc->sc_dmatag, dma);
1961 1.1 augustss ii->stdstart = 0; /* mark as inactive */
1962 1.16 augustss usb_start_next(reqh->pipe);
1963 1.1 augustss }
1964 1.1 augustss }
1965 1.1 augustss
1966 1.1 augustss /* Deallocate request data structures */
1967 1.1 augustss void
1968 1.1 augustss uhci_ctrl_done(ii)
1969 1.1 augustss uhci_intr_info_t *ii;
1970 1.1 augustss {
1971 1.1 augustss uhci_softc_t *sc = ii->sc;
1972 1.1 augustss usbd_request_handle reqh = ii->reqh;
1973 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1974 1.1 augustss u_int len = upipe->u.ctl.length;
1975 1.7 augustss usb_dma_t *dma;
1976 1.1 augustss uhci_td_t *htd = ii->stdstart->td;
1977 1.1 augustss
1978 1.7 augustss #ifdef DIAGNOSTIC
1979 1.1 augustss if (!reqh->isreq)
1980 1.1 augustss panic("uhci_ctrl_done: not a request\n");
1981 1.7 augustss #endif
1982 1.1 augustss
1983 1.1 augustss LIST_REMOVE(ii, list); /* remove from active list */
1984 1.1 augustss
1985 1.1 augustss uhci_remove_ctrl(sc, upipe->u.ctl.sqh);
1986 1.1 augustss
1987 1.1 augustss if (len != 0) {
1988 1.1 augustss dma = &upipe->u.ctl.datadma;
1989 1.1 augustss if (reqh->request.bmRequestType & UT_READ)
1990 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), len);
1991 1.1 augustss uhci_free_std_chain(sc, htd->link.std, ii->stdend);
1992 1.7 augustss usb_freemem(sc->sc_dmatag, dma);
1993 1.1 augustss }
1994 1.1 augustss DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen));
1995 1.1 augustss }
1996 1.1 augustss
1997 1.1 augustss /* Deallocate request data structures */
1998 1.1 augustss void
1999 1.1 augustss uhci_bulk_done(ii)
2000 1.1 augustss uhci_intr_info_t *ii;
2001 1.1 augustss {
2002 1.1 augustss uhci_softc_t *sc = ii->sc;
2003 1.1 augustss usbd_request_handle reqh = ii->reqh;
2004 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
2005 1.32 augustss uhci_soft_td_t *std;
2006 1.32 augustss u_int datalen = upipe->u.bulk.length;
2007 1.7 augustss usb_dma_t *dma;
2008 1.1 augustss
2009 1.1 augustss LIST_REMOVE(ii, list); /* remove from active list */
2010 1.1 augustss
2011 1.1 augustss uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2012 1.1 augustss
2013 1.32 augustss /* find the toggle for the last transfer and invert it */
2014 1.32 augustss for (std = ii->stdstart; std; std = std->td->link.std) {
2015 1.32 augustss if (std->td->td_status & UHCI_TD_ACTIVE)
2016 1.32 augustss break;
2017 1.32 augustss upipe->nexttoggle = UHCI_TD_GET_DT(std->td->td_token);
2018 1.1 augustss }
2019 1.32 augustss upipe->nexttoggle ^= 1;
2020 1.32 augustss
2021 1.32 augustss /* copy the data from dma memory to userland storage */
2022 1.32 augustss dma = &upipe->u.bulk.datadma;
2023 1.32 augustss if (upipe->u.bulk.isread)
2024 1.32 augustss memcpy(reqh->buffer, KERNADDR(dma), datalen);
2025 1.32 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
2026 1.32 augustss usb_freemem(sc->sc_dmatag, dma);
2027 1.32 augustss
2028 1.1 augustss DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen));
2029 1.1 augustss }
2030 1.1 augustss
2031 1.1 augustss /* Add interrupt QH, called with vflock. */
2032 1.1 augustss void
2033 1.1 augustss uhci_add_intr(sc, n, sqh)
2034 1.1 augustss uhci_softc_t *sc;
2035 1.1 augustss int n;
2036 1.1 augustss uhci_soft_qh_t *sqh;
2037 1.1 augustss {
2038 1.1 augustss struct uhci_vframe *vf = &sc->sc_vframes[n];
2039 1.1 augustss uhci_qh_t *eqh;
2040 1.1 augustss
2041 1.1 augustss DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh));
2042 1.1 augustss eqh = vf->eqh->qh;
2043 1.1 augustss sqh->qh->hlink = eqh->hlink;
2044 1.1 augustss sqh->qh->qh_hlink = eqh->qh_hlink;
2045 1.1 augustss eqh->hlink = sqh;
2046 1.1 augustss eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
2047 1.1 augustss vf->eqh = sqh;
2048 1.1 augustss vf->bandwidth++;
2049 1.1 augustss }
2050 1.1 augustss
2051 1.1 augustss /* Remove interrupt QH, called with vflock. */
2052 1.1 augustss void
2053 1.1 augustss uhci_remove_intr(sc, n, sqh)
2054 1.1 augustss uhci_softc_t *sc;
2055 1.1 augustss int n;
2056 1.1 augustss uhci_soft_qh_t *sqh;
2057 1.1 augustss {
2058 1.1 augustss struct uhci_vframe *vf = &sc->sc_vframes[n];
2059 1.1 augustss uhci_soft_qh_t *pqh;
2060 1.1 augustss
2061 1.1 augustss DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh));
2062 1.1 augustss
2063 1.1 augustss for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink)
2064 1.1 augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
2065 1.1 augustss if (pqh->qh->qh_hlink & UHCI_PTR_T) {
2066 1.1 augustss printf("uhci_remove_intr: QH not found\n");
2067 1.1 augustss return;
2068 1.1 augustss }
2069 1.1 augustss #else
2070 1.1 augustss ;
2071 1.1 augustss #endif
2072 1.1 augustss pqh->qh->hlink = sqh->qh->hlink;
2073 1.1 augustss pqh->qh->qh_hlink = sqh->qh->qh_hlink;
2074 1.1 augustss if (vf->eqh == sqh)
2075 1.1 augustss vf->eqh = pqh;
2076 1.1 augustss vf->bandwidth--;
2077 1.1 augustss }
2078 1.1 augustss
2079 1.1 augustss usbd_status
2080 1.1 augustss uhci_device_setintr(sc, upipe, ival)
2081 1.1 augustss uhci_softc_t *sc;
2082 1.1 augustss struct uhci_pipe *upipe;
2083 1.1 augustss int ival;
2084 1.1 augustss {
2085 1.1 augustss uhci_soft_qh_t *sqh;
2086 1.1 augustss int i, npoll, s;
2087 1.1 augustss u_int bestbw, bw, bestoffs, offs;
2088 1.1 augustss
2089 1.1 augustss DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
2090 1.1 augustss if (ival == 0) {
2091 1.1 augustss printf("uhci_setintr: 0 interval\n");
2092 1.1 augustss return (USBD_INVAL);
2093 1.1 augustss }
2094 1.1 augustss
2095 1.1 augustss if (ival > UHCI_VFRAMELIST_COUNT)
2096 1.1 augustss ival = UHCI_VFRAMELIST_COUNT;
2097 1.1 augustss npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2098 1.1 augustss DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
2099 1.1 augustss
2100 1.1 augustss upipe->u.intr.npoll = npoll;
2101 1.1 augustss upipe->u.intr.qhs =
2102 1.31 augustss malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2103 1.1 augustss
2104 1.1 augustss /*
2105 1.1 augustss * Figure out which offset in the schedule that has most
2106 1.1 augustss * bandwidth left over.
2107 1.1 augustss */
2108 1.1 augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2109 1.1 augustss for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2110 1.1 augustss for (bw = i = 0; i < npoll; i++)
2111 1.1 augustss bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2112 1.1 augustss if (bw < bestbw) {
2113 1.1 augustss bestbw = bw;
2114 1.1 augustss bestoffs = offs;
2115 1.1 augustss }
2116 1.1 augustss }
2117 1.1 augustss DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2118 1.1 augustss
2119 1.1 augustss upipe->iinfo->stdstart = 0;
2120 1.1 augustss for(i = 0; i < npoll; i++) {
2121 1.1 augustss upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2122 1.1 augustss sqh->qh->elink = 0;
2123 1.1 augustss sqh->qh->qh_elink = UHCI_PTR_T;
2124 1.1 augustss sqh->pos = MOD(i * ival + bestoffs);
2125 1.1 augustss sqh->intr_info = upipe->iinfo;
2126 1.1 augustss }
2127 1.1 augustss #undef MOD
2128 1.1 augustss
2129 1.1 augustss s = splusb();
2130 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list);
2131 1.1 augustss splx(s);
2132 1.1 augustss
2133 1.1 augustss uhci_lock_frames(sc);
2134 1.1 augustss /* Enter QHs into the controller data structures. */
2135 1.1 augustss for(i = 0; i < npoll; i++)
2136 1.1 augustss uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos,
2137 1.1 augustss upipe->u.intr.qhs[i]);
2138 1.1 augustss uhci_unlock_frames(sc);
2139 1.1 augustss
2140 1.1 augustss DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
2141 1.1 augustss return (USBD_NORMAL_COMPLETION);
2142 1.1 augustss }
2143 1.1 augustss
2144 1.1 augustss /* Open a new pipe. */
2145 1.1 augustss usbd_status
2146 1.1 augustss uhci_open(pipe)
2147 1.1 augustss usbd_pipe_handle pipe;
2148 1.1 augustss {
2149 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2150 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2151 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2152 1.1 augustss usbd_status r;
2153 1.1 augustss
2154 1.1 augustss DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2155 1.1 augustss pipe, pipe->device->address,
2156 1.1 augustss ed->bEndpointAddress, sc->sc_addr));
2157 1.1 augustss if (pipe->device->address == sc->sc_addr) {
2158 1.1 augustss switch (ed->bEndpointAddress) {
2159 1.1 augustss case USB_CONTROL_ENDPOINT:
2160 1.1 augustss pipe->methods = &uhci_root_ctrl_methods;
2161 1.1 augustss break;
2162 1.1 augustss case UE_IN | UHCI_INTR_ENDPT:
2163 1.1 augustss pipe->methods = &uhci_root_intr_methods;
2164 1.1 augustss break;
2165 1.1 augustss default:
2166 1.1 augustss return (USBD_INVAL);
2167 1.1 augustss }
2168 1.1 augustss } else {
2169 1.1 augustss upipe->iinfo = uhci_alloc_intr_info(sc);
2170 1.1 augustss if (upipe->iinfo == 0)
2171 1.1 augustss return (USBD_NOMEM);
2172 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
2173 1.1 augustss case UE_CONTROL:
2174 1.1 augustss pipe->methods = &uhci_device_ctrl_methods;
2175 1.1 augustss upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2176 1.1 augustss if (upipe->u.ctl.sqh == 0)
2177 1.5 augustss goto bad;
2178 1.1 augustss upipe->u.ctl.setup = uhci_alloc_std(sc);
2179 1.5 augustss if (upipe->u.ctl.setup == 0) {
2180 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2181 1.5 augustss goto bad;
2182 1.5 augustss }
2183 1.1 augustss upipe->u.ctl.stat = uhci_alloc_std(sc);
2184 1.5 augustss if (upipe->u.ctl.stat == 0) {
2185 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2186 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2187 1.5 augustss goto bad;
2188 1.5 augustss }
2189 1.7 augustss r = usb_allocmem(sc->sc_dmatag,
2190 1.7 augustss sizeof(usb_device_request_t),
2191 1.7 augustss 0, &upipe->u.ctl.reqdma);
2192 1.5 augustss if (r != USBD_NORMAL_COMPLETION) {
2193 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2194 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2195 1.5 augustss uhci_free_std(sc, upipe->u.ctl.stat);
2196 1.5 augustss goto bad;
2197 1.5 augustss }
2198 1.1 augustss break;
2199 1.1 augustss case UE_INTERRUPT:
2200 1.1 augustss pipe->methods = &uhci_device_intr_methods;
2201 1.1 augustss return (uhci_device_setintr(sc, upipe, ed->bInterval));
2202 1.1 augustss case UE_ISOCHRONOUS:
2203 1.16 augustss pipe->methods = &uhci_device_isoc_methods;
2204 1.16 augustss upipe->u.iso.nbuf = 0;
2205 1.16 augustss return (USBD_NORMAL_COMPLETION);
2206 1.1 augustss case UE_BULK:
2207 1.1 augustss pipe->methods = &uhci_device_bulk_methods;
2208 1.1 augustss upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2209 1.1 augustss if (upipe->u.bulk.sqh == 0)
2210 1.5 augustss goto bad;
2211 1.1 augustss break;
2212 1.1 augustss }
2213 1.1 augustss }
2214 1.1 augustss return (USBD_NORMAL_COMPLETION);
2215 1.5 augustss
2216 1.5 augustss bad:
2217 1.5 augustss uhci_free_intr_info(upipe->iinfo);
2218 1.5 augustss return (USBD_NOMEM);
2219 1.1 augustss }
2220 1.1 augustss
2221 1.1 augustss /*
2222 1.1 augustss * Data structures and routines to emulate the root hub.
2223 1.1 augustss */
2224 1.1 augustss usb_device_descriptor_t uhci_devd = {
2225 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2226 1.1 augustss UDESC_DEVICE, /* type */
2227 1.1 augustss {0x00, 0x01}, /* USB version */
2228 1.1 augustss UCLASS_HUB, /* class */
2229 1.1 augustss USUBCLASS_HUB, /* subclass */
2230 1.1 augustss 0, /* protocol */
2231 1.1 augustss 64, /* max packet */
2232 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2233 1.1 augustss 1,2,0, /* string indicies */
2234 1.1 augustss 1 /* # of configurations */
2235 1.1 augustss };
2236 1.1 augustss
2237 1.1 augustss usb_config_descriptor_t uhci_confd = {
2238 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2239 1.1 augustss UDESC_CONFIG,
2240 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2241 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2242 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2243 1.1 augustss 1,
2244 1.1 augustss 1,
2245 1.1 augustss 0,
2246 1.1 augustss UC_SELF_POWERED,
2247 1.1 augustss 0 /* max power */
2248 1.1 augustss };
2249 1.1 augustss
2250 1.1 augustss usb_interface_descriptor_t uhci_ifcd = {
2251 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2252 1.1 augustss UDESC_INTERFACE,
2253 1.1 augustss 0,
2254 1.1 augustss 0,
2255 1.1 augustss 1,
2256 1.1 augustss UCLASS_HUB,
2257 1.1 augustss USUBCLASS_HUB,
2258 1.1 augustss 0,
2259 1.1 augustss 0
2260 1.1 augustss };
2261 1.1 augustss
2262 1.1 augustss usb_endpoint_descriptor_t uhci_endpd = {
2263 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
2264 1.1 augustss UDESC_ENDPOINT,
2265 1.1 augustss UE_IN | UHCI_INTR_ENDPT,
2266 1.1 augustss UE_INTERRUPT,
2267 1.1 augustss {8},
2268 1.1 augustss 255
2269 1.1 augustss };
2270 1.1 augustss
2271 1.1 augustss usb_hub_descriptor_t uhci_hubd_piix = {
2272 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
2273 1.1 augustss UDESC_HUB,
2274 1.1 augustss 2,
2275 1.1 augustss { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2276 1.1 augustss 50, /* power on to power good */
2277 1.1 augustss 0,
2278 1.1 augustss { 0x00 }, /* both ports are removable */
2279 1.1 augustss };
2280 1.1 augustss
2281 1.1 augustss int
2282 1.1 augustss uhci_str(p, l, s)
2283 1.1 augustss usb_string_descriptor_t *p;
2284 1.1 augustss int l;
2285 1.1 augustss char *s;
2286 1.1 augustss {
2287 1.1 augustss int i;
2288 1.1 augustss
2289 1.1 augustss if (l == 0)
2290 1.1 augustss return (0);
2291 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2292 1.1 augustss if (l == 1)
2293 1.1 augustss return (1);
2294 1.1 augustss p->bDescriptorType = UDESC_STRING;
2295 1.1 augustss l -= 2;
2296 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2297 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2298 1.1 augustss return (2*i+2);
2299 1.1 augustss }
2300 1.1 augustss
2301 1.1 augustss /*
2302 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2303 1.1 augustss */
2304 1.1 augustss usbd_status
2305 1.1 augustss uhci_root_ctrl_transfer(reqh)
2306 1.1 augustss usbd_request_handle reqh;
2307 1.1 augustss {
2308 1.16 augustss int s;
2309 1.16 augustss usbd_status r;
2310 1.16 augustss
2311 1.16 augustss s = splusb();
2312 1.16 augustss r = usb_insert_transfer(reqh);
2313 1.16 augustss splx(s);
2314 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
2315 1.16 augustss return (r);
2316 1.16 augustss else
2317 1.16 augustss return (uhci_root_ctrl_start(reqh));
2318 1.16 augustss }
2319 1.16 augustss
2320 1.16 augustss usbd_status
2321 1.16 augustss uhci_root_ctrl_start(reqh)
2322 1.16 augustss usbd_request_handle reqh;
2323 1.16 augustss {
2324 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
2325 1.1 augustss usb_device_request_t *req;
2326 1.1 augustss void *buf;
2327 1.1 augustss int port, x;
2328 1.1 augustss int len, value, index, status, change, l, totlen = 0;
2329 1.1 augustss usb_port_status_t ps;
2330 1.1 augustss usbd_status r;
2331 1.1 augustss
2332 1.1 augustss if (!reqh->isreq)
2333 1.1 augustss panic("uhci_root_ctrl_transfer: not a request\n");
2334 1.1 augustss req = &reqh->request;
2335 1.1 augustss buf = reqh->buffer;
2336 1.1 augustss
2337 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
2338 1.1 augustss req->bmRequestType, req->bRequest));
2339 1.1 augustss
2340 1.1 augustss len = UGETW(req->wLength);
2341 1.1 augustss value = UGETW(req->wValue);
2342 1.1 augustss index = UGETW(req->wIndex);
2343 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2344 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2345 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2346 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2347 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2348 1.1 augustss /*
2349 1.13 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2350 1.1 augustss * for the integrated root hub.
2351 1.1 augustss */
2352 1.1 augustss break;
2353 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2354 1.1 augustss if (len > 0) {
2355 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2356 1.1 augustss totlen = 1;
2357 1.1 augustss }
2358 1.1 augustss break;
2359 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2360 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
2361 1.1 augustss switch(value >> 8) {
2362 1.1 augustss case UDESC_DEVICE:
2363 1.1 augustss if ((value & 0xff) != 0) {
2364 1.1 augustss r = USBD_IOERROR;
2365 1.1 augustss goto ret;
2366 1.1 augustss }
2367 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2368 1.27 augustss USETW(uhci_devd.idVendor, sc->sc_id_vendor);
2369 1.1 augustss memcpy(buf, &uhci_devd, l);
2370 1.1 augustss break;
2371 1.1 augustss case UDESC_CONFIG:
2372 1.1 augustss if ((value & 0xff) != 0) {
2373 1.1 augustss r = USBD_IOERROR;
2374 1.1 augustss goto ret;
2375 1.1 augustss }
2376 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2377 1.1 augustss memcpy(buf, &uhci_confd, l);
2378 1.1 augustss buf = (char *)buf + l;
2379 1.1 augustss len -= l;
2380 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2381 1.1 augustss totlen += l;
2382 1.1 augustss memcpy(buf, &uhci_ifcd, l);
2383 1.1 augustss buf = (char *)buf + l;
2384 1.1 augustss len -= l;
2385 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2386 1.1 augustss totlen += l;
2387 1.1 augustss memcpy(buf, &uhci_endpd, l);
2388 1.1 augustss break;
2389 1.1 augustss case UDESC_STRING:
2390 1.1 augustss if (len == 0)
2391 1.1 augustss break;
2392 1.1 augustss *(u_int8_t *)buf = 0;
2393 1.1 augustss totlen = 1;
2394 1.1 augustss switch (value & 0xff) {
2395 1.1 augustss case 1: /* Vendor */
2396 1.8 augustss totlen = uhci_str(buf, len, sc->sc_vendor);
2397 1.1 augustss break;
2398 1.1 augustss case 2: /* Product */
2399 1.8 augustss totlen = uhci_str(buf, len, "UHCI root hub");
2400 1.1 augustss break;
2401 1.1 augustss }
2402 1.1 augustss break;
2403 1.1 augustss default:
2404 1.1 augustss r = USBD_IOERROR;
2405 1.1 augustss goto ret;
2406 1.1 augustss }
2407 1.1 augustss break;
2408 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2409 1.1 augustss if (len > 0) {
2410 1.1 augustss *(u_int8_t *)buf = 0;
2411 1.1 augustss totlen = 1;
2412 1.1 augustss }
2413 1.1 augustss break;
2414 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2415 1.1 augustss if (len > 1) {
2416 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2417 1.1 augustss totlen = 2;
2418 1.1 augustss }
2419 1.1 augustss break;
2420 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2421 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2422 1.1 augustss if (len > 1) {
2423 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2424 1.1 augustss totlen = 2;
2425 1.1 augustss }
2426 1.1 augustss break;
2427 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2428 1.1 augustss if (value >= USB_MAX_DEVICES) {
2429 1.1 augustss r = USBD_IOERROR;
2430 1.1 augustss goto ret;
2431 1.1 augustss }
2432 1.1 augustss sc->sc_addr = value;
2433 1.1 augustss break;
2434 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2435 1.1 augustss if (value != 0 && value != 1) {
2436 1.1 augustss r = USBD_IOERROR;
2437 1.1 augustss goto ret;
2438 1.1 augustss }
2439 1.1 augustss sc->sc_conf = value;
2440 1.1 augustss break;
2441 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2442 1.1 augustss break;
2443 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2444 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2445 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2446 1.1 augustss r = USBD_IOERROR;
2447 1.1 augustss goto ret;
2448 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2449 1.1 augustss break;
2450 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2451 1.1 augustss break;
2452 1.1 augustss /* Hub requests */
2453 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2454 1.1 augustss break;
2455 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2456 1.12 augustss DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2457 1.12 augustss "port=%d feature=%d\n",
2458 1.1 augustss index, value));
2459 1.1 augustss if (index == 1)
2460 1.1 augustss port = UHCI_PORTSC1;
2461 1.1 augustss else if (index == 2)
2462 1.1 augustss port = UHCI_PORTSC2;
2463 1.1 augustss else {
2464 1.1 augustss r = USBD_IOERROR;
2465 1.1 augustss goto ret;
2466 1.1 augustss }
2467 1.1 augustss switch(value) {
2468 1.1 augustss case UHF_PORT_ENABLE:
2469 1.1 augustss x = UREAD2(sc, port);
2470 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
2471 1.1 augustss break;
2472 1.1 augustss case UHF_PORT_SUSPEND:
2473 1.1 augustss x = UREAD2(sc, port);
2474 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
2475 1.1 augustss break;
2476 1.1 augustss case UHF_PORT_RESET:
2477 1.1 augustss x = UREAD2(sc, port);
2478 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2479 1.1 augustss break;
2480 1.1 augustss case UHF_C_PORT_CONNECTION:
2481 1.1 augustss x = UREAD2(sc, port);
2482 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
2483 1.1 augustss break;
2484 1.1 augustss case UHF_C_PORT_ENABLE:
2485 1.1 augustss x = UREAD2(sc, port);
2486 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
2487 1.1 augustss break;
2488 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2489 1.1 augustss x = UREAD2(sc, port);
2490 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
2491 1.1 augustss break;
2492 1.1 augustss case UHF_C_PORT_RESET:
2493 1.1 augustss sc->sc_isreset = 0;
2494 1.1 augustss r = USBD_NORMAL_COMPLETION;
2495 1.1 augustss goto ret;
2496 1.1 augustss case UHF_PORT_CONNECTION:
2497 1.1 augustss case UHF_PORT_OVER_CURRENT:
2498 1.1 augustss case UHF_PORT_POWER:
2499 1.1 augustss case UHF_PORT_LOW_SPEED:
2500 1.1 augustss case UHF_C_PORT_SUSPEND:
2501 1.1 augustss default:
2502 1.1 augustss r = USBD_IOERROR;
2503 1.1 augustss goto ret;
2504 1.1 augustss }
2505 1.1 augustss break;
2506 1.1 augustss case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
2507 1.1 augustss if (index == 1)
2508 1.1 augustss port = UHCI_PORTSC1;
2509 1.1 augustss else if (index == 2)
2510 1.1 augustss port = UHCI_PORTSC2;
2511 1.1 augustss else {
2512 1.1 augustss r = USBD_IOERROR;
2513 1.1 augustss goto ret;
2514 1.1 augustss }
2515 1.1 augustss if (len > 0) {
2516 1.1 augustss *(u_int8_t *)buf =
2517 1.1 augustss (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
2518 1.1 augustss UHCI_PORTSC_LS_SHIFT;
2519 1.1 augustss totlen = 1;
2520 1.1 augustss }
2521 1.1 augustss break;
2522 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2523 1.1 augustss if (value != 0) {
2524 1.1 augustss r = USBD_IOERROR;
2525 1.1 augustss goto ret;
2526 1.1 augustss }
2527 1.1 augustss l = min(len, USB_HUB_DESCRIPTOR_SIZE);
2528 1.1 augustss totlen = l;
2529 1.1 augustss memcpy(buf, &uhci_hubd_piix, l);
2530 1.1 augustss break;
2531 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2532 1.1 augustss if (len != 4) {
2533 1.1 augustss r = USBD_IOERROR;
2534 1.1 augustss goto ret;
2535 1.1 augustss }
2536 1.1 augustss memset(buf, 0, len);
2537 1.1 augustss totlen = len;
2538 1.1 augustss break;
2539 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2540 1.1 augustss if (index == 1)
2541 1.1 augustss port = UHCI_PORTSC1;
2542 1.1 augustss else if (index == 2)
2543 1.1 augustss port = UHCI_PORTSC2;
2544 1.1 augustss else {
2545 1.1 augustss r = USBD_IOERROR;
2546 1.1 augustss goto ret;
2547 1.1 augustss }
2548 1.1 augustss if (len != 4) {
2549 1.1 augustss r = USBD_IOERROR;
2550 1.1 augustss goto ret;
2551 1.1 augustss }
2552 1.1 augustss x = UREAD2(sc, port);
2553 1.1 augustss status = change = 0;
2554 1.1 augustss if (x & UHCI_PORTSC_CCS )
2555 1.1 augustss status |= UPS_CURRENT_CONNECT_STATUS;
2556 1.1 augustss if (x & UHCI_PORTSC_CSC )
2557 1.1 augustss change |= UPS_C_CONNECT_STATUS;
2558 1.1 augustss if (x & UHCI_PORTSC_PE )
2559 1.1 augustss status |= UPS_PORT_ENABLED;
2560 1.1 augustss if (x & UHCI_PORTSC_POEDC)
2561 1.1 augustss change |= UPS_C_PORT_ENABLED;
2562 1.1 augustss if (x & UHCI_PORTSC_OCI )
2563 1.1 augustss status |= UPS_OVERCURRENT_INDICATOR;
2564 1.1 augustss if (x & UHCI_PORTSC_OCIC )
2565 1.1 augustss change |= UPS_C_OVERCURRENT_INDICATOR;
2566 1.1 augustss if (x & UHCI_PORTSC_SUSP )
2567 1.1 augustss status |= UPS_SUSPEND;
2568 1.1 augustss if (x & UHCI_PORTSC_LSDA )
2569 1.1 augustss status |= UPS_LOW_SPEED;
2570 1.1 augustss status |= UPS_PORT_POWER;
2571 1.1 augustss if (sc->sc_isreset)
2572 1.1 augustss change |= UPS_C_PORT_RESET;
2573 1.1 augustss USETW(ps.wPortStatus, status);
2574 1.1 augustss USETW(ps.wPortChange, change);
2575 1.1 augustss l = min(len, sizeof ps);
2576 1.1 augustss memcpy(buf, &ps, l);
2577 1.1 augustss totlen = l;
2578 1.1 augustss break;
2579 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2580 1.1 augustss r = USBD_IOERROR;
2581 1.1 augustss goto ret;
2582 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2583 1.1 augustss break;
2584 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2585 1.1 augustss if (index == 1)
2586 1.1 augustss port = UHCI_PORTSC1;
2587 1.1 augustss else if (index == 2)
2588 1.1 augustss port = UHCI_PORTSC2;
2589 1.1 augustss else {
2590 1.1 augustss r = USBD_IOERROR;
2591 1.1 augustss goto ret;
2592 1.1 augustss }
2593 1.1 augustss switch(value) {
2594 1.1 augustss case UHF_PORT_ENABLE:
2595 1.1 augustss x = UREAD2(sc, port);
2596 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2597 1.1 augustss break;
2598 1.1 augustss case UHF_PORT_SUSPEND:
2599 1.1 augustss x = UREAD2(sc, port);
2600 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
2601 1.1 augustss break;
2602 1.1 augustss case UHF_PORT_RESET:
2603 1.1 augustss x = UREAD2(sc, port);
2604 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2605 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
2606 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2607 1.1 augustss delay(100);
2608 1.1 augustss x = UREAD2(sc, port);
2609 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2610 1.1 augustss delay(100);
2611 1.1 augustss DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
2612 1.1 augustss index, UREAD2(sc, port)));
2613 1.1 augustss sc->sc_isreset = 1;
2614 1.1 augustss break;
2615 1.1 augustss case UHF_C_PORT_CONNECTION:
2616 1.1 augustss case UHF_C_PORT_ENABLE:
2617 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2618 1.1 augustss case UHF_PORT_CONNECTION:
2619 1.1 augustss case UHF_PORT_OVER_CURRENT:
2620 1.1 augustss case UHF_PORT_POWER:
2621 1.1 augustss case UHF_PORT_LOW_SPEED:
2622 1.1 augustss case UHF_C_PORT_SUSPEND:
2623 1.1 augustss case UHF_C_PORT_RESET:
2624 1.1 augustss default:
2625 1.1 augustss r = USBD_IOERROR;
2626 1.1 augustss goto ret;
2627 1.1 augustss }
2628 1.1 augustss break;
2629 1.1 augustss default:
2630 1.1 augustss r = USBD_IOERROR;
2631 1.1 augustss goto ret;
2632 1.1 augustss }
2633 1.1 augustss reqh->actlen = totlen;
2634 1.1 augustss r = USBD_NORMAL_COMPLETION;
2635 1.1 augustss ret:
2636 1.1 augustss reqh->status = r;
2637 1.1 augustss reqh->xfercb(reqh);
2638 1.16 augustss usb_start_next(reqh->pipe);
2639 1.1 augustss return (USBD_IN_PROGRESS);
2640 1.1 augustss }
2641 1.1 augustss
2642 1.1 augustss /* Abort a root control request. */
2643 1.1 augustss void
2644 1.1 augustss uhci_root_ctrl_abort(reqh)
2645 1.1 augustss usbd_request_handle reqh;
2646 1.1 augustss {
2647 1.6 augustss /* Nothing to do, all transfers are syncronous. */
2648 1.1 augustss }
2649 1.1 augustss
2650 1.1 augustss /* Close the root pipe. */
2651 1.1 augustss void
2652 1.1 augustss uhci_root_ctrl_close(pipe)
2653 1.1 augustss usbd_pipe_handle pipe;
2654 1.1 augustss {
2655 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2656 1.30 augustss
2657 1.13 augustss usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle);
2658 1.30 augustss sc->sc_has_timo = 0;
2659 1.1 augustss DPRINTF(("uhci_root_ctrl_close\n"));
2660 1.1 augustss }
2661 1.1 augustss
2662 1.1 augustss /* Abort a root interrupt request. */
2663 1.1 augustss void
2664 1.1 augustss uhci_root_intr_abort(reqh)
2665 1.1 augustss usbd_request_handle reqh;
2666 1.1 augustss {
2667 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
2668 1.30 augustss
2669 1.13 augustss usb_untimeout(uhci_timo, reqh, reqh->timo_handle);
2670 1.30 augustss sc->sc_has_timo = 0;
2671 1.1 augustss }
2672 1.1 augustss
2673 1.16 augustss usbd_status
2674 1.16 augustss uhci_root_intr_transfer(reqh)
2675 1.16 augustss usbd_request_handle reqh;
2676 1.16 augustss {
2677 1.16 augustss int s;
2678 1.16 augustss usbd_status r;
2679 1.16 augustss
2680 1.16 augustss s = splusb();
2681 1.16 augustss r = usb_insert_transfer(reqh);
2682 1.16 augustss splx(s);
2683 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
2684 1.16 augustss return (r);
2685 1.16 augustss else
2686 1.16 augustss return (uhci_root_intr_start(reqh));
2687 1.16 augustss }
2688 1.16 augustss
2689 1.1 augustss /* Start a transfer on the root interrupt pipe */
2690 1.1 augustss usbd_status
2691 1.16 augustss uhci_root_intr_start(reqh)
2692 1.1 augustss usbd_request_handle reqh;
2693 1.1 augustss {
2694 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
2695 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2696 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2697 1.7 augustss usb_dma_t *dmap;
2698 1.1 augustss usbd_status r;
2699 1.1 augustss int len;
2700 1.1 augustss
2701 1.12 augustss DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d "
2702 1.12 augustss "flags=%d\n",
2703 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags));
2704 1.1 augustss
2705 1.1 augustss len = reqh->length;
2706 1.1 augustss dmap = &upipe->u.intr.datadma;
2707 1.1 augustss if (len == 0)
2708 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
2709 1.1 augustss
2710 1.7 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2711 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
2712 1.1 augustss return (r);
2713 1.1 augustss
2714 1.1 augustss sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval);
2715 1.13 augustss usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
2716 1.30 augustss sc->sc_has_timo = reqh;
2717 1.1 augustss return (USBD_IN_PROGRESS);
2718 1.1 augustss }
2719 1.1 augustss
2720 1.1 augustss /* Close the root interrupt pipe. */
2721 1.1 augustss void
2722 1.1 augustss uhci_root_intr_close(pipe)
2723 1.1 augustss usbd_pipe_handle pipe;
2724 1.1 augustss {
2725 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2726 1.30 augustss
2727 1.13 augustss usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle);
2728 1.30 augustss sc->sc_has_timo = 0;
2729 1.1 augustss DPRINTF(("uhci_root_intr_close\n"));
2730 1.1 augustss }
2731 1.26 augustss
2732