uhci.c revision 1.56 1 1.56 augustss /* $NetBSD: uhci.c,v 1.56 1999/09/18 11:25:51 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Universal Host Controller driver.
42 1.28 augustss * Handles e.g. PIIX3 and PIIX4.
43 1.1 augustss *
44 1.1 augustss * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
45 1.1 augustss * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
46 1.1 augustss * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf
47 1.28 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
48 1.1 augustss */
49 1.1 augustss
50 1.1 augustss #include <sys/param.h>
51 1.1 augustss #include <sys/systm.h>
52 1.1 augustss #include <sys/kernel.h>
53 1.1 augustss #include <sys/malloc.h>
54 1.37 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
55 1.1 augustss #include <sys/device.h>
56 1.13 augustss #elif defined(__FreeBSD__)
57 1.13 augustss #include <sys/module.h>
58 1.13 augustss #include <sys/bus.h>
59 1.13 augustss #endif
60 1.1 augustss #include <sys/proc.h>
61 1.1 augustss #include <sys/queue.h>
62 1.1 augustss #include <sys/select.h>
63 1.1 augustss
64 1.35 augustss #if defined(__FreeBSD__)
65 1.35 augustss #include <machine/bus_pio.h>
66 1.35 augustss #endif
67 1.7 augustss #include <machine/bus.h>
68 1.39 augustss #include <machine/endian.h>
69 1.7 augustss
70 1.1 augustss #include <dev/usb/usb.h>
71 1.1 augustss #include <dev/usb/usbdi.h>
72 1.1 augustss #include <dev/usb/usbdivar.h>
73 1.7 augustss #include <dev/usb/usb_mem.h>
74 1.1 augustss #include <dev/usb/usb_quirks.h>
75 1.1 augustss
76 1.1 augustss #include <dev/usb/uhcireg.h>
77 1.1 augustss #include <dev/usb/uhcivar.h>
78 1.1 augustss
79 1.13 augustss #if defined(__FreeBSD__)
80 1.13 augustss #include <machine/clock.h>
81 1.13 augustss
82 1.13 augustss #define delay(d) DELAY(d)
83 1.13 augustss #endif
84 1.13 augustss
85 1.1 augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
86 1.1 augustss
87 1.37 augustss #if defined(__OpenBSD__)
88 1.37 augustss struct cfdriver uhci_cd = {
89 1.37 augustss NULL, "uhci", DV_DULL
90 1.37 augustss };
91 1.37 augustss #endif
92 1.37 augustss
93 1.39 augustss /*
94 1.39 augustss * The UHCI controller is little endian, so on big endian machines
95 1.39 augustss * the data strored in memory needs to be swapped.
96 1.39 augustss */
97 1.39 augustss #if BYTE_ORDER == BIG_ENDIAN
98 1.39 augustss #define LE(x) (bswap32(x))
99 1.39 augustss #else
100 1.39 augustss #define LE(x) (x)
101 1.39 augustss #endif
102 1.39 augustss
103 1.1 augustss struct uhci_pipe {
104 1.1 augustss struct usbd_pipe pipe;
105 1.1 augustss uhci_intr_info_t *iinfo;
106 1.32 augustss int nexttoggle;
107 1.1 augustss /* Info needed for different pipe kinds. */
108 1.1 augustss union {
109 1.1 augustss /* Control pipe */
110 1.1 augustss struct {
111 1.1 augustss uhci_soft_qh_t *sqh;
112 1.7 augustss usb_dma_t reqdma;
113 1.16 augustss uhci_soft_td_t *setup, *stat;
114 1.1 augustss u_int length;
115 1.1 augustss } ctl;
116 1.1 augustss /* Interrupt pipe */
117 1.1 augustss struct {
118 1.1 augustss int npoll;
119 1.1 augustss uhci_soft_qh_t **qhs;
120 1.1 augustss } intr;
121 1.1 augustss /* Bulk pipe */
122 1.1 augustss struct {
123 1.1 augustss uhci_soft_qh_t *sqh;
124 1.1 augustss u_int length;
125 1.1 augustss int isread;
126 1.1 augustss } bulk;
127 1.16 augustss /* Iso pipe */
128 1.16 augustss struct iso {
129 1.16 augustss uhci_soft_td_t **stds;
130 1.48 augustss int next, inuse;
131 1.16 augustss } iso;
132 1.1 augustss } u;
133 1.1 augustss };
134 1.1 augustss
135 1.1 augustss /*
136 1.1 augustss * The uhci_intr_info free list can be global since they contain
137 1.1 augustss * no dma specific data. The other free lists do.
138 1.1 augustss */
139 1.1 augustss LIST_HEAD(, uhci_intr_info) uhci_ii_free;
140 1.1 augustss
141 1.1 augustss void uhci_busreset __P((uhci_softc_t *));
142 1.30 augustss void uhci_power __P((int, void *));
143 1.16 augustss usbd_status uhci_run __P((uhci_softc_t *, int run));
144 1.1 augustss uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *));
145 1.1 augustss void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *));
146 1.1 augustss uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *));
147 1.1 augustss void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *));
148 1.1 augustss uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *));
149 1.1 augustss void uhci_free_intr_info __P((uhci_intr_info_t *ii));
150 1.16 augustss #if 0
151 1.1 augustss void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *,
152 1.1 augustss uhci_intr_info_t *));
153 1.1 augustss void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *));
154 1.16 augustss #endif
155 1.1 augustss
156 1.1 augustss void uhci_free_std_chain __P((uhci_softc_t *,
157 1.1 augustss uhci_soft_td_t *, uhci_soft_td_t *));
158 1.1 augustss usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *,
159 1.18 augustss int, int, int, usb_dma_t *,
160 1.1 augustss uhci_soft_td_t **,
161 1.1 augustss uhci_soft_td_t **));
162 1.1 augustss void uhci_timo __P((void *));
163 1.1 augustss void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle));
164 1.1 augustss void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *));
165 1.36 augustss void uhci_idone __P((uhci_intr_info_t *));
166 1.33 augustss void uhci_abort_req __P((usbd_request_handle, usbd_status status));
167 1.41 augustss void uhci_abort_req_end __P((void *v));
168 1.1 augustss void uhci_timeout __P((void *));
169 1.1 augustss void uhci_wakeup_ctrl __P((void *, int, int, void *, int));
170 1.1 augustss void uhci_lock_frames __P((uhci_softc_t *));
171 1.1 augustss void uhci_unlock_frames __P((uhci_softc_t *));
172 1.1 augustss void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
173 1.1 augustss void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
174 1.1 augustss void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
175 1.1 augustss void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
176 1.1 augustss int uhci_str __P((usb_string_descriptor_t *, int, char *));
177 1.48 augustss usbd_status uhci_setup_isoc __P((usbd_pipe_handle pipe));
178 1.48 augustss void uhci_device_isoc_enter __P((usbd_request_handle));
179 1.1 augustss
180 1.1 augustss void uhci_wakeup_cb __P((usbd_request_handle reqh));
181 1.1 augustss
182 1.48 augustss usbd_status uhci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t));
183 1.48 augustss void uhci_freem __P((struct usbd_bus *, usb_dma_t *));
184 1.48 augustss
185 1.1 augustss usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle));
186 1.16 augustss usbd_status uhci_device_ctrl_start __P((usbd_request_handle));
187 1.1 augustss void uhci_device_ctrl_abort __P((usbd_request_handle));
188 1.1 augustss void uhci_device_ctrl_close __P((usbd_pipe_handle));
189 1.41 augustss void uhci_device_ctrl_done __P((usbd_request_handle));
190 1.41 augustss
191 1.1 augustss usbd_status uhci_device_intr_transfer __P((usbd_request_handle));
192 1.16 augustss usbd_status uhci_device_intr_start __P((usbd_request_handle));
193 1.1 augustss void uhci_device_intr_abort __P((usbd_request_handle));
194 1.1 augustss void uhci_device_intr_close __P((usbd_pipe_handle));
195 1.41 augustss void uhci_device_intr_done __P((usbd_request_handle));
196 1.41 augustss
197 1.1 augustss usbd_status uhci_device_bulk_transfer __P((usbd_request_handle));
198 1.16 augustss usbd_status uhci_device_bulk_start __P((usbd_request_handle));
199 1.1 augustss void uhci_device_bulk_abort __P((usbd_request_handle));
200 1.1 augustss void uhci_device_bulk_close __P((usbd_pipe_handle));
201 1.41 augustss void uhci_device_bulk_done __P((usbd_request_handle));
202 1.41 augustss
203 1.16 augustss usbd_status uhci_device_isoc_transfer __P((usbd_request_handle));
204 1.16 augustss usbd_status uhci_device_isoc_start __P((usbd_request_handle));
205 1.16 augustss void uhci_device_isoc_abort __P((usbd_request_handle));
206 1.16 augustss void uhci_device_isoc_close __P((usbd_pipe_handle));
207 1.41 augustss void uhci_device_isoc_done __P((usbd_request_handle));
208 1.1 augustss
209 1.1 augustss usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle));
210 1.16 augustss usbd_status uhci_root_ctrl_start __P((usbd_request_handle));
211 1.1 augustss void uhci_root_ctrl_abort __P((usbd_request_handle));
212 1.1 augustss void uhci_root_ctrl_close __P((usbd_pipe_handle));
213 1.41 augustss
214 1.1 augustss usbd_status uhci_root_intr_transfer __P((usbd_request_handle));
215 1.16 augustss usbd_status uhci_root_intr_start __P((usbd_request_handle));
216 1.1 augustss void uhci_root_intr_abort __P((usbd_request_handle));
217 1.1 augustss void uhci_root_intr_close __P((usbd_pipe_handle));
218 1.41 augustss void uhci_root_intr_done __P((usbd_request_handle));
219 1.1 augustss
220 1.1 augustss usbd_status uhci_open __P((usbd_pipe_handle));
221 1.8 augustss void uhci_poll __P((struct usbd_bus *));
222 1.1 augustss
223 1.1 augustss usbd_status uhci_device_request __P((usbd_request_handle reqh));
224 1.1 augustss
225 1.1 augustss void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
226 1.1 augustss void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
227 1.1 augustss usbd_status uhci_device_setintr __P((uhci_softc_t *sc,
228 1.1 augustss struct uhci_pipe *pipe, int ival));
229 1.1 augustss
230 1.38 augustss void uhci_device_clear_toggle __P((usbd_pipe_handle pipe));
231 1.38 augustss void uhci_noop __P((usbd_pipe_handle pipe));
232 1.38 augustss
233 1.1 augustss #ifdef USB_DEBUG
234 1.1 augustss static void uhci_dumpregs __P((uhci_softc_t *));
235 1.1 augustss void uhci_dump_tds __P((uhci_soft_td_t *));
236 1.1 augustss void uhci_dump_qh __P((uhci_soft_qh_t *));
237 1.1 augustss void uhci_dump __P((void));
238 1.1 augustss void uhci_dump_td __P((uhci_soft_td_t *));
239 1.1 augustss #endif
240 1.1 augustss
241 1.1 augustss #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
242 1.1 augustss #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
243 1.35 augustss #define UREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r))
244 1.1 augustss #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
245 1.1 augustss #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
246 1.1 augustss
247 1.1 augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
248 1.1 augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
249 1.1 augustss
250 1.1 augustss #define UHCI_RESET_TIMEOUT 100 /* reset timeout */
251 1.1 augustss
252 1.1 augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
253 1.1 augustss
254 1.1 augustss #define UHCI_INTR_ENDPT 1
255 1.1 augustss
256 1.48 augustss struct usbd_bus_methods uhci_bus_methods = {
257 1.48 augustss uhci_open,
258 1.48 augustss uhci_poll,
259 1.48 augustss uhci_allocm,
260 1.48 augustss uhci_freem,
261 1.48 augustss };
262 1.48 augustss
263 1.48 augustss struct usbd_pipe_methods uhci_root_ctrl_methods = {
264 1.1 augustss uhci_root_ctrl_transfer,
265 1.16 augustss uhci_root_ctrl_start,
266 1.1 augustss uhci_root_ctrl_abort,
267 1.1 augustss uhci_root_ctrl_close,
268 1.38 augustss uhci_noop,
269 1.10 augustss 0,
270 1.1 augustss };
271 1.1 augustss
272 1.48 augustss struct usbd_pipe_methods uhci_root_intr_methods = {
273 1.1 augustss uhci_root_intr_transfer,
274 1.16 augustss uhci_root_intr_start,
275 1.1 augustss uhci_root_intr_abort,
276 1.1 augustss uhci_root_intr_close,
277 1.38 augustss uhci_noop,
278 1.41 augustss uhci_root_intr_done,
279 1.1 augustss };
280 1.1 augustss
281 1.48 augustss struct usbd_pipe_methods uhci_device_ctrl_methods = {
282 1.1 augustss uhci_device_ctrl_transfer,
283 1.16 augustss uhci_device_ctrl_start,
284 1.1 augustss uhci_device_ctrl_abort,
285 1.1 augustss uhci_device_ctrl_close,
286 1.38 augustss uhci_noop,
287 1.41 augustss uhci_device_ctrl_done,
288 1.1 augustss };
289 1.1 augustss
290 1.48 augustss struct usbd_pipe_methods uhci_device_intr_methods = {
291 1.1 augustss uhci_device_intr_transfer,
292 1.16 augustss uhci_device_intr_start,
293 1.1 augustss uhci_device_intr_abort,
294 1.1 augustss uhci_device_intr_close,
295 1.38 augustss uhci_device_clear_toggle,
296 1.41 augustss uhci_device_intr_done,
297 1.1 augustss };
298 1.1 augustss
299 1.48 augustss struct usbd_pipe_methods uhci_device_bulk_methods = {
300 1.1 augustss uhci_device_bulk_transfer,
301 1.16 augustss uhci_device_bulk_start,
302 1.1 augustss uhci_device_bulk_abort,
303 1.1 augustss uhci_device_bulk_close,
304 1.38 augustss uhci_device_clear_toggle,
305 1.41 augustss uhci_device_bulk_done,
306 1.1 augustss };
307 1.1 augustss
308 1.48 augustss struct usbd_pipe_methods uhci_device_isoc_methods = {
309 1.16 augustss uhci_device_isoc_transfer,
310 1.16 augustss uhci_device_isoc_start,
311 1.16 augustss uhci_device_isoc_abort,
312 1.16 augustss uhci_device_isoc_close,
313 1.38 augustss uhci_noop,
314 1.41 augustss uhci_device_isoc_done,
315 1.16 augustss };
316 1.16 augustss
317 1.1 augustss void
318 1.1 augustss uhci_busreset(sc)
319 1.1 augustss uhci_softc_t *sc;
320 1.1 augustss {
321 1.1 augustss UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
322 1.20 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
323 1.1 augustss UHCICMD(sc, 0); /* do nothing */
324 1.1 augustss }
325 1.1 augustss
326 1.1 augustss usbd_status
327 1.1 augustss uhci_init(sc)
328 1.1 augustss uhci_softc_t *sc;
329 1.1 augustss {
330 1.1 augustss usbd_status r;
331 1.1 augustss int i, j;
332 1.1 augustss uhci_soft_qh_t *csqh, *bsqh, *sqh;
333 1.1 augustss uhci_soft_td_t *std;
334 1.1 augustss
335 1.1 augustss DPRINTFN(1,("uhci_init: start\n"));
336 1.1 augustss
337 1.1 augustss #if defined(USB_DEBUG)
338 1.1 augustss if (uhcidebug > 2)
339 1.1 augustss uhci_dumpregs(sc);
340 1.1 augustss #endif
341 1.1 augustss
342 1.1 augustss uhci_run(sc, 0); /* stop the controller */
343 1.1 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
344 1.1 augustss
345 1.24 augustss uhci_busreset(sc);
346 1.24 augustss
347 1.1 augustss /* Allocate and initialize real frame array. */
348 1.50 augustss r = usb_allocmem(&sc->sc_bus,
349 1.7 augustss UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
350 1.30 augustss UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
351 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
352 1.1 augustss return (r);
353 1.30 augustss sc->sc_pframes = KERNADDR(&sc->sc_dma);
354 1.1 augustss UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
355 1.36 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma)); /* set frame list*/
356 1.1 augustss
357 1.1 augustss /* Allocate the dummy QH where bulk traffic will be queued. */
358 1.1 augustss bsqh = uhci_alloc_sqh(sc);
359 1.1 augustss if (!bsqh)
360 1.1 augustss return (USBD_NOMEM);
361 1.42 augustss bsqh->qh.qh_hlink = LE(UHCI_PTR_T); /* end of QH chain */
362 1.42 augustss bsqh->qh.qh_elink = LE(UHCI_PTR_T);
363 1.1 augustss sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
364 1.1 augustss
365 1.1 augustss /* Allocate the dummy QH where control traffic will be queued. */
366 1.1 augustss csqh = uhci_alloc_sqh(sc);
367 1.1 augustss if (!csqh)
368 1.1 augustss return (USBD_NOMEM);
369 1.42 augustss csqh->hlink = bsqh;
370 1.42 augustss csqh->qh.qh_hlink = LE(bsqh->physaddr | UHCI_PTR_Q);
371 1.42 augustss csqh->qh.qh_elink = LE(UHCI_PTR_T);
372 1.1 augustss sc->sc_ctl_start = sc->sc_ctl_end = csqh;
373 1.1 augustss
374 1.1 augustss /*
375 1.1 augustss * Make all (virtual) frame list pointers point to the interrupt
376 1.1 augustss * queue heads and the interrupt queue heads at the control
377 1.1 augustss * queue head and point the physical frame list to the virtual.
378 1.1 augustss */
379 1.1 augustss for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
380 1.1 augustss std = uhci_alloc_std(sc);
381 1.1 augustss sqh = uhci_alloc_sqh(sc);
382 1.1 augustss if (!std || !sqh)
383 1.13 augustss return (USBD_NOMEM);
384 1.42 augustss std->link.sqh = sqh;
385 1.42 augustss std->td.td_link = LE(sqh->physaddr | UHCI_PTR_Q);
386 1.42 augustss std->td.td_status = LE(UHCI_TD_IOS); /* iso, inactive */
387 1.42 augustss std->td.td_token = LE(0);
388 1.42 augustss std->td.td_buffer = LE(0);
389 1.42 augustss sqh->hlink = csqh;
390 1.42 augustss sqh->qh.qh_hlink = LE(csqh->physaddr | UHCI_PTR_Q);
391 1.42 augustss sqh->elink = 0;
392 1.42 augustss sqh->qh.qh_elink = LE(UHCI_PTR_T);
393 1.1 augustss sc->sc_vframes[i].htd = std;
394 1.1 augustss sc->sc_vframes[i].etd = std;
395 1.1 augustss sc->sc_vframes[i].hqh = sqh;
396 1.1 augustss sc->sc_vframes[i].eqh = sqh;
397 1.1 augustss for (j = i;
398 1.1 augustss j < UHCI_FRAMELIST_COUNT;
399 1.1 augustss j += UHCI_VFRAMELIST_COUNT)
400 1.39 augustss sc->sc_pframes[j] = LE(std->physaddr);
401 1.1 augustss }
402 1.1 augustss
403 1.1 augustss LIST_INIT(&sc->sc_intrhead);
404 1.1 augustss
405 1.1 augustss /* Set up the bus struct. */
406 1.48 augustss sc->sc_bus.methods = &uhci_bus_methods;
407 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
408 1.1 augustss
409 1.30 augustss sc->sc_suspend = PWR_RESUME;
410 1.53 augustss sc->sc_powerhook = powerhook_establish(uhci_power, sc);
411 1.30 augustss
412 1.1 augustss DPRINTFN(1,("uhci_init: enabling\n"));
413 1.1 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
414 1.1 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
415 1.1 augustss
416 1.16 augustss return (uhci_run(sc, 1)); /* and here we go... */
417 1.53 augustss }
418 1.53 augustss
419 1.53 augustss int
420 1.53 augustss uhci_activate(self, act)
421 1.53 augustss device_ptr_t self;
422 1.53 augustss enum devact act;
423 1.53 augustss {
424 1.56 augustss struct uhci_softc *sc = (struct uhci_softc *)self;
425 1.53 augustss int rv = 0;
426 1.53 augustss
427 1.53 augustss switch (act) {
428 1.53 augustss case DVACT_ACTIVATE:
429 1.53 augustss return (EOPNOTSUPP);
430 1.53 augustss break;
431 1.53 augustss
432 1.53 augustss case DVACT_DEACTIVATE:
433 1.56 augustss if (sc->sc_child != NULL)
434 1.56 augustss rv = config_deactivate(sc->sc_child);
435 1.53 augustss break;
436 1.53 augustss }
437 1.53 augustss return (rv);
438 1.53 augustss }
439 1.53 augustss
440 1.53 augustss int
441 1.53 augustss uhci_detach(self, flags)
442 1.53 augustss device_ptr_t self;
443 1.53 augustss int flags;
444 1.53 augustss {
445 1.53 augustss struct uhci_softc *sc = (struct uhci_softc *)self;
446 1.53 augustss int rv = 0;
447 1.53 augustss
448 1.53 augustss if (sc->sc_child != NULL)
449 1.53 augustss rv = config_detach(sc->sc_child, flags);
450 1.53 augustss
451 1.53 augustss if (rv != 0)
452 1.53 augustss return (rv);
453 1.53 augustss
454 1.53 augustss powerhook_disestablish(sc->sc_powerhook);
455 1.53 augustss /* free data structures XXX */
456 1.53 augustss
457 1.53 augustss return (rv);
458 1.1 augustss }
459 1.1 augustss
460 1.48 augustss usbd_status
461 1.48 augustss uhci_allocm(bus, dma, size)
462 1.48 augustss struct usbd_bus *bus;
463 1.48 augustss usb_dma_t *dma;
464 1.48 augustss u_int32_t size;
465 1.48 augustss {
466 1.48 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
467 1.48 augustss
468 1.50 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
469 1.48 augustss }
470 1.48 augustss
471 1.48 augustss void
472 1.48 augustss uhci_freem(bus, dma)
473 1.48 augustss struct usbd_bus *bus;
474 1.48 augustss usb_dma_t *dma;
475 1.48 augustss {
476 1.48 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
477 1.48 augustss
478 1.50 augustss usb_freemem(&sc->sc_bus, dma);
479 1.48 augustss }
480 1.48 augustss
481 1.37 augustss #if !defined(__OpenBSD__)
482 1.30 augustss /*
483 1.30 augustss * Handle suspend/resume.
484 1.30 augustss *
485 1.40 augustss * We need to switch to polling mode here, because this routine is
486 1.40 augustss * called from an intterupt context. This is all right since we
487 1.40 augustss * are almost suspended anyway.
488 1.30 augustss */
489 1.30 augustss void
490 1.30 augustss uhci_power(why, v)
491 1.30 augustss int why;
492 1.30 augustss void *v;
493 1.30 augustss {
494 1.30 augustss uhci_softc_t *sc = v;
495 1.30 augustss int cmd;
496 1.30 augustss int s;
497 1.30 augustss
498 1.30 augustss s = splusb();
499 1.30 augustss cmd = UREAD2(sc, UHCI_CMD);
500 1.30 augustss
501 1.30 augustss DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
502 1.30 augustss sc, why, sc->sc_suspend, cmd));
503 1.30 augustss
504 1.30 augustss if (why != PWR_RESUME) {
505 1.30 augustss #if defined(USB_DEBUG)
506 1.30 augustss if (uhcidebug > 2)
507 1.30 augustss uhci_dumpregs(sc);
508 1.30 augustss #endif
509 1.30 augustss if (sc->sc_has_timo)
510 1.30 augustss usb_untimeout(uhci_timo, sc->sc_has_timo,
511 1.30 augustss sc->sc_has_timo->timo_handle);
512 1.54 augustss sc->sc_bus.use_polling++;
513 1.30 augustss uhci_run(sc, 0); /* stop the controller */
514 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
515 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
516 1.30 augustss sc->sc_suspend = why;
517 1.30 augustss DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
518 1.30 augustss } else {
519 1.30 augustss /*
520 1.30 augustss * XXX We should really do much more here in case the
521 1.30 augustss * controller registers have been lost and BIOS has
522 1.30 augustss * not restored them.
523 1.30 augustss */
524 1.30 augustss sc->sc_suspend = why;
525 1.30 augustss if (cmd & UHCI_CMD_RS)
526 1.30 augustss uhci_run(sc, 0); /* in case BIOS has started it */
527 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
528 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
529 1.30 augustss UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
530 1.30 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
531 1.30 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
532 1.30 augustss uhci_run(sc, 1); /* and start traffic again */
533 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
534 1.54 augustss sc->sc_bus.use_polling--;
535 1.30 augustss if (sc->sc_has_timo)
536 1.30 augustss usb_timeout(uhci_timo, sc->sc_has_timo,
537 1.30 augustss sc->sc_ival, sc->sc_has_timo->timo_handle);
538 1.30 augustss #if defined(USB_DEBUG)
539 1.30 augustss if (uhcidebug > 2)
540 1.30 augustss uhci_dumpregs(sc);
541 1.30 augustss #endif
542 1.30 augustss }
543 1.30 augustss splx(s);
544 1.30 augustss }
545 1.37 augustss #endif /* !defined(__OpenBSD__) */
546 1.30 augustss
547 1.1 augustss #ifdef USB_DEBUG
548 1.1 augustss static void
549 1.1 augustss uhci_dumpregs(sc)
550 1.1 augustss uhci_softc_t *sc;
551 1.1 augustss {
552 1.48 augustss DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
553 1.48 augustss "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
554 1.48 augustss USBDEVNAME(sc->sc_bus.bdev),
555 1.48 augustss UREAD2(sc, UHCI_CMD),
556 1.48 augustss UREAD2(sc, UHCI_STS),
557 1.48 augustss UREAD2(sc, UHCI_INTR),
558 1.48 augustss UREAD2(sc, UHCI_FRNUM),
559 1.48 augustss UREAD4(sc, UHCI_FLBASEADDR),
560 1.48 augustss UREAD1(sc, UHCI_SOF),
561 1.48 augustss UREAD2(sc, UHCI_PORTSC1),
562 1.48 augustss UREAD2(sc, UHCI_PORTSC2)));
563 1.1 augustss }
564 1.1 augustss
565 1.1 augustss void
566 1.1 augustss uhci_dump_td(p)
567 1.1 augustss uhci_soft_td_t *p;
568 1.1 augustss {
569 1.48 augustss DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
570 1.48 augustss "token=0x%08lx buffer=0x%08lx\n",
571 1.48 augustss p, (long)p->physaddr,
572 1.48 augustss (long)LE(p->td.td_link),
573 1.48 augustss (long)LE(p->td.td_status),
574 1.48 augustss (long)LE(p->td.td_token),
575 1.48 augustss (long)LE(p->td.td_buffer)));
576 1.48 augustss DPRINTFN(-1,(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
577 1.48 augustss "D=%d,maxlen=%d\n",
578 1.48 augustss (int)LE(p->td.td_link),
579 1.48 augustss "\20\1T\2Q\3VF",
580 1.48 augustss (int)LE(p->td.td_status),
581 1.48 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
582 1.48 augustss "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
583 1.48 augustss UHCI_TD_GET_ERRCNT(LE(p->td.td_status)),
584 1.48 augustss UHCI_TD_GET_ACTLEN(LE(p->td.td_status)),
585 1.48 augustss UHCI_TD_GET_PID(LE(p->td.td_token)),
586 1.48 augustss UHCI_TD_GET_DEVADDR(LE(p->td.td_token)),
587 1.48 augustss UHCI_TD_GET_ENDPT(LE(p->td.td_token)),
588 1.48 augustss UHCI_TD_GET_DT(LE(p->td.td_token)),
589 1.48 augustss UHCI_TD_GET_MAXLEN(LE(p->td.td_token))));
590 1.1 augustss }
591 1.1 augustss
592 1.1 augustss void
593 1.1 augustss uhci_dump_qh(p)
594 1.1 augustss uhci_soft_qh_t *p;
595 1.1 augustss {
596 1.48 augustss DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", p,
597 1.48 augustss (int)p->physaddr, LE(p->qh.qh_hlink), LE(p->qh.qh_elink)));
598 1.1 augustss }
599 1.1 augustss
600 1.13 augustss
601 1.1 augustss #if 0
602 1.1 augustss void
603 1.1 augustss uhci_dump()
604 1.1 augustss {
605 1.1 augustss uhci_softc_t *sc = uhci;
606 1.1 augustss
607 1.1 augustss uhci_dumpregs(sc);
608 1.50 augustss printf("intrs=%d\n", sc->sc_bus.no_intrs);
609 1.1 augustss printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);
610 1.42 augustss uhci_dump_qh(sc->sc_ctl_start->qh.hlink);
611 1.1 augustss }
612 1.1 augustss #endif
613 1.1 augustss
614 1.1 augustss void
615 1.1 augustss uhci_dump_tds(std)
616 1.1 augustss uhci_soft_td_t *std;
617 1.1 augustss {
618 1.1 augustss uhci_soft_td_t *p;
619 1.1 augustss
620 1.42 augustss for(p = std; p; p = p->link.std)
621 1.1 augustss uhci_dump_td(p);
622 1.1 augustss }
623 1.1 augustss #endif
624 1.1 augustss
625 1.1 augustss /*
626 1.1 augustss * This routine is executed periodically and simulates interrupts
627 1.1 augustss * from the root controller interrupt pipe for port status change.
628 1.1 augustss */
629 1.1 augustss void
630 1.1 augustss uhci_timo(addr)
631 1.1 augustss void *addr;
632 1.1 augustss {
633 1.1 augustss usbd_request_handle reqh = addr;
634 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
635 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
636 1.1 augustss int s;
637 1.1 augustss u_char *p;
638 1.1 augustss
639 1.1 augustss DPRINTFN(15, ("uhci_timo\n"));
640 1.1 augustss
641 1.41 augustss usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
642 1.41 augustss
643 1.49 augustss p = KERNADDR(&reqh->dmabuf);
644 1.1 augustss p[0] = 0;
645 1.1 augustss if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
646 1.1 augustss p[0] |= 1<<1;
647 1.1 augustss if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
648 1.1 augustss p[0] |= 1<<2;
649 1.41 augustss if (p[0] == 0)
650 1.41 augustss /* No change, try again in a while */
651 1.41 augustss return;
652 1.41 augustss
653 1.41 augustss reqh->actlen = 1;
654 1.41 augustss reqh->status = USBD_NORMAL_COMPLETION;
655 1.16 augustss s = splusb();
656 1.41 augustss reqh->hcpriv = 0;
657 1.51 augustss reqh->device->bus->intr_context++;
658 1.41 augustss usb_transfer_complete(reqh);
659 1.51 augustss reqh->device->bus->intr_context--;
660 1.41 augustss splx(s);
661 1.41 augustss }
662 1.41 augustss
663 1.41 augustss void
664 1.41 augustss uhci_root_intr_done(reqh)
665 1.41 augustss usbd_request_handle reqh;
666 1.41 augustss {
667 1.1 augustss }
668 1.1 augustss
669 1.1 augustss
670 1.1 augustss void
671 1.1 augustss uhci_lock_frames(sc)
672 1.1 augustss uhci_softc_t *sc;
673 1.1 augustss {
674 1.1 augustss int s = splusb();
675 1.1 augustss while (sc->sc_vflock) {
676 1.1 augustss sc->sc_vflock |= UHCI_WANT_LOCK;
677 1.1 augustss tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0);
678 1.1 augustss }
679 1.1 augustss sc->sc_vflock = UHCI_HAS_LOCK;
680 1.1 augustss splx(s);
681 1.1 augustss }
682 1.1 augustss
683 1.1 augustss void
684 1.1 augustss uhci_unlock_frames(sc)
685 1.1 augustss uhci_softc_t *sc;
686 1.1 augustss {
687 1.1 augustss int s = splusb();
688 1.1 augustss sc->sc_vflock &= ~UHCI_HAS_LOCK;
689 1.1 augustss if (sc->sc_vflock & UHCI_WANT_LOCK)
690 1.1 augustss wakeup(&sc->sc_vflock);
691 1.1 augustss splx(s);
692 1.1 augustss }
693 1.1 augustss
694 1.1 augustss /*
695 1.1 augustss * Allocate an interrupt information struct. A free list is kept
696 1.1 augustss * for fast allocation.
697 1.1 augustss */
698 1.1 augustss uhci_intr_info_t *
699 1.1 augustss uhci_alloc_intr_info(sc)
700 1.1 augustss uhci_softc_t *sc;
701 1.1 augustss {
702 1.1 augustss uhci_intr_info_t *ii;
703 1.1 augustss
704 1.1 augustss ii = LIST_FIRST(&uhci_ii_free);
705 1.1 augustss if (ii)
706 1.1 augustss LIST_REMOVE(ii, list);
707 1.1 augustss else {
708 1.31 augustss ii = malloc(sizeof(uhci_intr_info_t), M_USBHC, M_NOWAIT);
709 1.1 augustss }
710 1.1 augustss ii->sc = sc;
711 1.1 augustss return ii;
712 1.1 augustss }
713 1.1 augustss
714 1.1 augustss void
715 1.1 augustss uhci_free_intr_info(ii)
716 1.1 augustss uhci_intr_info_t *ii;
717 1.1 augustss {
718 1.1 augustss LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */
719 1.1 augustss }
720 1.1 augustss
721 1.1 augustss /* Add control QH, called at splusb(). */
722 1.1 augustss void
723 1.1 augustss uhci_add_ctrl(sc, sqh)
724 1.1 augustss uhci_softc_t *sc;
725 1.1 augustss uhci_soft_qh_t *sqh;
726 1.1 augustss {
727 1.42 augustss uhci_soft_qh_t *eqh;
728 1.1 augustss
729 1.52 augustss SPLUSBCHECK;
730 1.52 augustss
731 1.1 augustss DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
732 1.42 augustss eqh = sc->sc_ctl_end;
733 1.42 augustss sqh->hlink = eqh->hlink;
734 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
735 1.42 augustss eqh->hlink = sqh;
736 1.42 augustss eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q);
737 1.1 augustss sc->sc_ctl_end = sqh;
738 1.1 augustss }
739 1.1 augustss
740 1.1 augustss /* Remove control QH, called at splusb(). */
741 1.1 augustss void
742 1.1 augustss uhci_remove_ctrl(sc, sqh)
743 1.1 augustss uhci_softc_t *sc;
744 1.1 augustss uhci_soft_qh_t *sqh;
745 1.1 augustss {
746 1.1 augustss uhci_soft_qh_t *pqh;
747 1.1 augustss
748 1.52 augustss SPLUSBCHECK;
749 1.52 augustss
750 1.1 augustss DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh));
751 1.42 augustss for (pqh = sc->sc_ctl_start; pqh->hlink != sqh; pqh=pqh->hlink)
752 1.1 augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
753 1.42 augustss if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) {
754 1.1 augustss printf("uhci_remove_ctrl: QH not found\n");
755 1.1 augustss return;
756 1.1 augustss }
757 1.1 augustss #else
758 1.1 augustss ;
759 1.1 augustss #endif
760 1.42 augustss pqh->hlink = sqh->hlink;
761 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
762 1.1 augustss if (sc->sc_ctl_end == sqh)
763 1.1 augustss sc->sc_ctl_end = pqh;
764 1.1 augustss }
765 1.1 augustss
766 1.1 augustss /* Add bulk QH, called at splusb(). */
767 1.1 augustss void
768 1.1 augustss uhci_add_bulk(sc, sqh)
769 1.1 augustss uhci_softc_t *sc;
770 1.1 augustss uhci_soft_qh_t *sqh;
771 1.1 augustss {
772 1.42 augustss uhci_soft_qh_t *eqh;
773 1.1 augustss
774 1.52 augustss SPLUSBCHECK;
775 1.52 augustss
776 1.1 augustss DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
777 1.42 augustss eqh = sc->sc_bulk_end;
778 1.42 augustss sqh->hlink = eqh->hlink;
779 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
780 1.42 augustss eqh->hlink = sqh;
781 1.42 augustss eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q);
782 1.1 augustss sc->sc_bulk_end = sqh;
783 1.1 augustss }
784 1.1 augustss
785 1.1 augustss /* Remove bulk QH, called at splusb(). */
786 1.1 augustss void
787 1.1 augustss uhci_remove_bulk(sc, sqh)
788 1.1 augustss uhci_softc_t *sc;
789 1.1 augustss uhci_soft_qh_t *sqh;
790 1.1 augustss {
791 1.1 augustss uhci_soft_qh_t *pqh;
792 1.1 augustss
793 1.52 augustss SPLUSBCHECK;
794 1.52 augustss
795 1.1 augustss DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
796 1.42 augustss for (pqh = sc->sc_bulk_start; pqh->hlink != sqh; pqh = pqh->hlink)
797 1.1 augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
798 1.42 augustss if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) {
799 1.1 augustss printf("uhci_remove_bulk: QH not found\n");
800 1.1 augustss return;
801 1.1 augustss }
802 1.1 augustss #else
803 1.1 augustss ;
804 1.1 augustss #endif
805 1.42 augustss pqh->hlink = sqh->hlink;
806 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
807 1.1 augustss if (sc->sc_bulk_end == sqh)
808 1.1 augustss sc->sc_bulk_end = pqh;
809 1.1 augustss }
810 1.1 augustss
811 1.1 augustss int
812 1.44 augustss uhci_intr(arg)
813 1.44 augustss void *arg;
814 1.1 augustss {
815 1.44 augustss uhci_softc_t *sc = arg;
816 1.44 augustss int status;
817 1.44 augustss int ack;
818 1.1 augustss uhci_intr_info_t *ii;
819 1.1 augustss
820 1.1 augustss #if defined(USB_DEBUG)
821 1.44 augustss if (uhcidebug > 15) {
822 1.44 augustss DPRINTF(("%s: uhci_intr\n", USBDEVNAME(sc->sc_bus.bdev)));
823 1.1 augustss uhci_dumpregs(sc);
824 1.1 augustss }
825 1.1 augustss #endif
826 1.44 augustss
827 1.44 augustss #if defined(DIAGNOSTIC) && defined(__NetBSD__)
828 1.30 augustss if (sc->sc_suspend != PWR_RESUME)
829 1.30 augustss printf("uhci_intr: suspended sts=0x%x\n", status);
830 1.30 augustss #endif
831 1.44 augustss
832 1.44 augustss status = UREAD2(sc, UHCI_STS);
833 1.44 augustss ack = 0;
834 1.44 augustss if (status & UHCI_STS_USBINT)
835 1.44 augustss ack |= UHCI_STS_USBINT;
836 1.44 augustss if (status & UHCI_STS_USBEI)
837 1.44 augustss ack |= UHCI_STS_USBEI;
838 1.1 augustss if (status & UHCI_STS_RD) {
839 1.44 augustss ack |= UHCI_STS_RD;
840 1.46 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
841 1.1 augustss }
842 1.1 augustss if (status & UHCI_STS_HSE) {
843 1.44 augustss ack |= UHCI_STS_HSE;
844 1.46 augustss printf("%s: host controller process error\n",
845 1.46 augustss USBDEVNAME(sc->sc_bus.bdev));
846 1.1 augustss }
847 1.1 augustss if (status & UHCI_STS_HCPE) {
848 1.44 augustss ack |= UHCI_STS_HCPE;
849 1.44 augustss printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
850 1.44 augustss }
851 1.44 augustss if (status & UHCI_STS_HCH) {
852 1.44 augustss /* no acknowledge needed */
853 1.46 augustss printf("%s: host controller halted\n",
854 1.46 augustss USBDEVNAME(sc->sc_bus.bdev));
855 1.1 augustss }
856 1.44 augustss
857 1.44 augustss if (ack) /* acknowledge the ints */
858 1.44 augustss UWRITE2(sc, UHCI_STS, ack);
859 1.44 augustss else /* nothing to acknowledge */
860 1.44 augustss return (0);
861 1.1 augustss
862 1.51 augustss sc->sc_bus.intr_context++;
863 1.50 augustss sc->sc_bus.no_intrs++;
864 1.50 augustss
865 1.1 augustss /*
866 1.1 augustss * Interrupts on UHCI really suck. When the host controller
867 1.1 augustss * interrupts because a transfer is completed there is no
868 1.1 augustss * way of knowing which transfer it was. You can scan down
869 1.1 augustss * the TDs and QHs of the previous frame to limit the search,
870 1.1 augustss * but that assumes that the interrupt was not delayed by more
871 1.1 augustss * than 1 ms, which may not always be true (e.g. after debug
872 1.1 augustss * output on a slow console).
873 1.1 augustss * We scan all interrupt descriptors to see if any have
874 1.1 augustss * completed.
875 1.1 augustss */
876 1.1 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
877 1.1 augustss uhci_check_intr(sc, ii);
878 1.1 augustss
879 1.1 augustss DPRINTFN(10, ("uhci_intr: exit\n"));
880 1.44 augustss
881 1.51 augustss sc->sc_bus.intr_context--;
882 1.50 augustss
883 1.44 augustss return (1);
884 1.1 augustss }
885 1.1 augustss
886 1.1 augustss /* Check for an interrupt. */
887 1.1 augustss void
888 1.1 augustss uhci_check_intr(sc, ii)
889 1.1 augustss uhci_softc_t *sc;
890 1.1 augustss uhci_intr_info_t *ii;
891 1.1 augustss {
892 1.1 augustss uhci_soft_td_t *std, *lstd;
893 1.18 augustss u_int32_t status;
894 1.1 augustss
895 1.1 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
896 1.1 augustss #ifdef DIAGNOSTIC
897 1.1 augustss if (!ii) {
898 1.1 augustss printf("uhci_check_intr: no ii? %p\n", ii);
899 1.1 augustss return;
900 1.1 augustss }
901 1.1 augustss #endif
902 1.1 augustss if (!ii->stdstart)
903 1.1 augustss return;
904 1.1 augustss lstd = ii->stdend;
905 1.1 augustss #ifdef DIAGNOSTIC
906 1.1 augustss if (!lstd) {
907 1.1 augustss printf("uhci_check_intr: std==0\n");
908 1.1 augustss return;
909 1.1 augustss }
910 1.1 augustss #endif
911 1.26 augustss /*
912 1.26 augustss * If the last TD is still active we need to check whether there
913 1.26 augustss * is a an error somewhere in the middle, or whether there was a
914 1.26 augustss * short packet (SPD and not ACTIVE).
915 1.26 augustss */
916 1.42 augustss if (LE(lstd->td.td_status) & UHCI_TD_ACTIVE) {
917 1.1 augustss DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii));
918 1.48 augustss for (std = ii->stdstart; std != lstd; std = std->link.std) {
919 1.42 augustss status = LE(std->td.td_status);
920 1.18 augustss if ((status & UHCI_TD_STALLED) ||
921 1.18 augustss (status & (UHCI_TD_SPD | UHCI_TD_ACTIVE)) ==
922 1.18 augustss UHCI_TD_SPD)
923 1.1 augustss goto done;
924 1.18 augustss }
925 1.18 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p std=%p still active\n",
926 1.18 augustss ii, ii->stdstart));
927 1.1 augustss return;
928 1.1 augustss }
929 1.1 augustss done:
930 1.26 augustss usb_untimeout(uhci_timeout, ii, ii->timeout_handle);
931 1.36 augustss uhci_idone(ii);
932 1.1 augustss }
933 1.1 augustss
934 1.52 augustss /* Called at splusb() */
935 1.1 augustss void
936 1.36 augustss uhci_idone(ii)
937 1.1 augustss uhci_intr_info_t *ii;
938 1.1 augustss {
939 1.1 augustss usbd_request_handle reqh = ii->reqh;
940 1.38 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
941 1.1 augustss uhci_soft_td_t *std;
942 1.26 augustss u_int32_t status;
943 1.26 augustss int actlen;
944 1.1 augustss
945 1.7 augustss #ifdef DIAGNOSTIC
946 1.7 augustss {
947 1.7 augustss int s = splhigh();
948 1.7 augustss if (ii->isdone) {
949 1.26 augustss splx(s);
950 1.36 augustss printf("uhci_idone: ii=%p is done!\n", ii);
951 1.7 augustss return;
952 1.7 augustss }
953 1.7 augustss ii->isdone = 1;
954 1.7 augustss splx(s);
955 1.7 augustss }
956 1.7 augustss #endif
957 1.1 augustss
958 1.48 augustss if (reqh->status == USBD_CANCELLED ||
959 1.48 augustss reqh->status == USBD_TIMEOUT) {
960 1.48 augustss DPRINTF(("uhci_idone: aborted reqh=%p\n", reqh));
961 1.48 augustss return;
962 1.48 augustss }
963 1.48 augustss
964 1.48 augustss if (reqh->nframes) {
965 1.48 augustss /* Isoc transfer, do things differently. */
966 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
967 1.48 augustss int i, n, nframes;
968 1.48 augustss
969 1.48 augustss DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
970 1.48 augustss
971 1.48 augustss nframes = reqh->nframes;
972 1.48 augustss actlen = 0;
973 1.48 augustss n = reqh->hcprivint;
974 1.48 augustss for (i = 0; i < nframes; i++) {
975 1.48 augustss std = stds[n];
976 1.48 augustss #ifdef USB_DEBUG
977 1.48 augustss if (uhcidebug > 5) {
978 1.48 augustss DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
979 1.48 augustss uhci_dump_td(std);
980 1.48 augustss }
981 1.48 augustss #endif
982 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
983 1.48 augustss n = 0;
984 1.48 augustss status = LE(std->td.td_status);
985 1.48 augustss actlen += UHCI_TD_GET_ACTLEN(status);
986 1.48 augustss }
987 1.48 augustss upipe->u.iso.inuse -= nframes;
988 1.48 augustss reqh->actlen = actlen;
989 1.48 augustss reqh->status = USBD_NORMAL_COMPLETION;
990 1.48 augustss reqh->hcpriv = ii;
991 1.48 augustss usb_transfer_complete(reqh);
992 1.48 augustss return;
993 1.48 augustss }
994 1.48 augustss
995 1.48 augustss #ifdef USB_DEBUG
996 1.48 augustss DPRINTFN(10, ("uhci_idone: ii=%p ready\n", ii));
997 1.48 augustss if (uhcidebug > 10)
998 1.48 augustss uhci_dump_tds(ii->stdstart);
999 1.48 augustss #endif
1000 1.48 augustss
1001 1.26 augustss /* The transfer is done, compute actual length and status. */
1002 1.18 augustss /* XXX Is this correct for control xfers? */
1003 1.26 augustss actlen = 0;
1004 1.42 augustss for (std = ii->stdstart; std; std = std->link.std) {
1005 1.42 augustss status = LE(std->td.td_status);
1006 1.26 augustss if (status & UHCI_TD_ACTIVE)
1007 1.26 augustss break;
1008 1.42 augustss if (UHCI_TD_GET_PID(LE(std->td.td_token)) !=
1009 1.39 augustss UHCI_TD_PID_SETUP)
1010 1.26 augustss actlen += UHCI_TD_GET_ACTLEN(status);
1011 1.1 augustss }
1012 1.38 augustss /* If there are left over TDs we need to update the toggle. */
1013 1.38 augustss if (std)
1014 1.42 augustss upipe->nexttoggle = UHCI_TD_GET_DT(LE(std->td.td_token));
1015 1.38 augustss
1016 1.1 augustss status &= UHCI_TD_ERROR;
1017 1.26 augustss DPRINTFN(10, ("uhci_check_intr: actlen=%d, status=0x%x\n",
1018 1.26 augustss actlen, status));
1019 1.26 augustss reqh->actlen = actlen;
1020 1.1 augustss if (status != 0) {
1021 1.31 augustss DPRINTFN(-1+((status&UHCI_TD_STALLED)!=0),
1022 1.36 augustss ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1023 1.17 augustss "status 0x%b\n",
1024 1.17 augustss reqh->pipe->device->address,
1025 1.17 augustss reqh->pipe->endpoint->edesc->bEndpointAddress,
1026 1.21 augustss (int)status,
1027 1.12 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
1028 1.12 augustss "STALLED\30ACTIVE"));
1029 1.1 augustss if (status == UHCI_TD_STALLED)
1030 1.1 augustss reqh->status = USBD_STALLED;
1031 1.1 augustss else
1032 1.1 augustss reqh->status = USBD_IOERROR; /* more info XXX */
1033 1.1 augustss } else {
1034 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
1035 1.1 augustss }
1036 1.41 augustss reqh->hcpriv = ii;
1037 1.41 augustss usb_transfer_complete(reqh);
1038 1.1 augustss }
1039 1.1 augustss
1040 1.13 augustss /*
1041 1.13 augustss * Called when a request does not complete.
1042 1.13 augustss */
1043 1.1 augustss void
1044 1.1 augustss uhci_timeout(addr)
1045 1.1 augustss void *addr;
1046 1.1 augustss {
1047 1.1 augustss uhci_intr_info_t *ii = addr;
1048 1.1 augustss
1049 1.1 augustss DPRINTF(("uhci_timeout: ii=%p\n", ii));
1050 1.51 augustss
1051 1.51 augustss ii->reqh->device->bus->intr_context++;
1052 1.33 augustss uhci_abort_req(ii->reqh, USBD_TIMEOUT);
1053 1.51 augustss ii->reqh->device->bus->intr_context--;
1054 1.1 augustss }
1055 1.1 augustss
1056 1.1 augustss /*
1057 1.1 augustss * Wait here until controller claims to have an interrupt.
1058 1.1 augustss * Then call uhci_intr and return. Use timeout to avoid waiting
1059 1.1 augustss * too long.
1060 1.13 augustss * Only used during boot when interrupts are not enabled yet.
1061 1.1 augustss */
1062 1.1 augustss void
1063 1.1 augustss uhci_waitintr(sc, reqh)
1064 1.1 augustss uhci_softc_t *sc;
1065 1.1 augustss usbd_request_handle reqh;
1066 1.1 augustss {
1067 1.1 augustss int timo = reqh->timeout;
1068 1.13 augustss uhci_intr_info_t *ii;
1069 1.13 augustss
1070 1.26 augustss DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1071 1.1 augustss
1072 1.1 augustss reqh->status = USBD_IN_PROGRESS;
1073 1.26 augustss for (; timo >= 0; timo--) {
1074 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1075 1.26 augustss DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1076 1.1 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
1077 1.1 augustss uhci_intr(sc);
1078 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
1079 1.1 augustss return;
1080 1.1 augustss }
1081 1.1 augustss }
1082 1.13 augustss
1083 1.13 augustss /* Timeout */
1084 1.13 augustss DPRINTF(("uhci_waitintr: timeout\n"));
1085 1.13 augustss for (ii = LIST_FIRST(&sc->sc_intrhead);
1086 1.13 augustss ii && ii->reqh != reqh;
1087 1.13 augustss ii = LIST_NEXT(ii, list))
1088 1.13 augustss ;
1089 1.41 augustss #ifdef DIAGNOSTIC
1090 1.41 augustss if (!ii)
1091 1.13 augustss panic("uhci_waitintr: lost intr_info\n");
1092 1.41 augustss #endif
1093 1.41 augustss uhci_idone(ii);
1094 1.1 augustss }
1095 1.1 augustss
1096 1.8 augustss void
1097 1.8 augustss uhci_poll(bus)
1098 1.8 augustss struct usbd_bus *bus;
1099 1.8 augustss {
1100 1.8 augustss uhci_softc_t *sc = (uhci_softc_t *)bus;
1101 1.8 augustss
1102 1.8 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
1103 1.8 augustss uhci_intr(sc);
1104 1.8 augustss }
1105 1.8 augustss
1106 1.1 augustss #if 0
1107 1.1 augustss void
1108 1.1 augustss uhci_reset(p)
1109 1.1 augustss void *p;
1110 1.1 augustss {
1111 1.1 augustss uhci_softc_t *sc = p;
1112 1.1 augustss int n;
1113 1.1 augustss
1114 1.1 augustss UHCICMD(sc, UHCI_CMD_HCRESET);
1115 1.1 augustss /* The reset bit goes low when the controller is done. */
1116 1.1 augustss for (n = 0; n < UHCI_RESET_TIMEOUT &&
1117 1.1 augustss (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1118 1.1 augustss delay(100);
1119 1.1 augustss if (n >= UHCI_RESET_TIMEOUT)
1120 1.13 augustss printf("%s: controller did not reset\n",
1121 1.13 augustss USBDEVNAME(sc->sc_bus.bdev));
1122 1.1 augustss }
1123 1.1 augustss #endif
1124 1.1 augustss
1125 1.16 augustss usbd_status
1126 1.1 augustss uhci_run(sc, run)
1127 1.1 augustss uhci_softc_t *sc;
1128 1.1 augustss int run;
1129 1.1 augustss {
1130 1.1 augustss int s, n, running;
1131 1.1 augustss
1132 1.1 augustss run = run != 0;
1133 1.16 augustss s = splusb();
1134 1.30 augustss DPRINTF(("uhci_run: setting run=%d\n", run));
1135 1.30 augustss UHCICMD(sc, run ? UHCI_CMD_RS : 0);
1136 1.13 augustss for(n = 0; n < 10; n++) {
1137 1.1 augustss running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1138 1.1 augustss /* return when we've entered the state we want */
1139 1.1 augustss if (run == running) {
1140 1.1 augustss splx(s);
1141 1.30 augustss DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1142 1.30 augustss UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1143 1.16 augustss return (USBD_NORMAL_COMPLETION);
1144 1.1 augustss }
1145 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1146 1.1 augustss }
1147 1.1 augustss splx(s);
1148 1.13 augustss printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1149 1.14 augustss run ? "start" : "stop");
1150 1.16 augustss return (USBD_IOERROR);
1151 1.1 augustss }
1152 1.1 augustss
1153 1.1 augustss /*
1154 1.1 augustss * Memory management routines.
1155 1.1 augustss * uhci_alloc_std allocates TDs
1156 1.1 augustss * uhci_alloc_sqh allocates QHs
1157 1.7 augustss * These two routines do their own free list management,
1158 1.1 augustss * partly for speed, partly because allocating DMAable memory
1159 1.1 augustss * has page size granularaity so much memory would be wasted if
1160 1.16 augustss * only one TD/QH (32 bytes) was placed in each allocated chunk.
1161 1.1 augustss */
1162 1.1 augustss
1163 1.1 augustss uhci_soft_td_t *
1164 1.1 augustss uhci_alloc_std(sc)
1165 1.1 augustss uhci_softc_t *sc;
1166 1.1 augustss {
1167 1.1 augustss uhci_soft_td_t *std;
1168 1.1 augustss usbd_status r;
1169 1.42 augustss int i, offs;
1170 1.7 augustss usb_dma_t dma;
1171 1.1 augustss
1172 1.1 augustss if (!sc->sc_freetds) {
1173 1.1 augustss DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1174 1.50 augustss r = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1175 1.7 augustss UHCI_TD_ALIGN, &dma);
1176 1.42 augustss if (r != USBD_NORMAL_COMPLETION)
1177 1.16 augustss return (0);
1178 1.43 augustss for(i = 0; i < UHCI_STD_CHUNK; i++) {
1179 1.42 augustss offs = i * UHCI_STD_SIZE;
1180 1.42 augustss std = (uhci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
1181 1.42 augustss std->physaddr = DMAADDR(&dma) + offs;
1182 1.42 augustss std->link.std = sc->sc_freetds;
1183 1.1 augustss sc->sc_freetds = std;
1184 1.1 augustss }
1185 1.1 augustss }
1186 1.1 augustss std = sc->sc_freetds;
1187 1.42 augustss sc->sc_freetds = std->link.std;
1188 1.42 augustss memset(&std->td, 0, sizeof(uhci_td_t));
1189 1.1 augustss return std;
1190 1.1 augustss }
1191 1.1 augustss
1192 1.1 augustss void
1193 1.1 augustss uhci_free_std(sc, std)
1194 1.1 augustss uhci_softc_t *sc;
1195 1.1 augustss uhci_soft_td_t *std;
1196 1.1 augustss {
1197 1.7 augustss #ifdef DIAGNOSTIC
1198 1.7 augustss #define TD_IS_FREE 0x12345678
1199 1.42 augustss if (LE(std->td.td_token) == TD_IS_FREE) {
1200 1.7 augustss printf("uhci_free_std: freeing free TD %p\n", std);
1201 1.7 augustss return;
1202 1.7 augustss }
1203 1.42 augustss std->td.td_token = LE(TD_IS_FREE);
1204 1.7 augustss #endif
1205 1.42 augustss std->link.std = sc->sc_freetds;
1206 1.1 augustss sc->sc_freetds = std;
1207 1.1 augustss }
1208 1.1 augustss
1209 1.1 augustss uhci_soft_qh_t *
1210 1.1 augustss uhci_alloc_sqh(sc)
1211 1.1 augustss uhci_softc_t *sc;
1212 1.1 augustss {
1213 1.1 augustss uhci_soft_qh_t *sqh;
1214 1.1 augustss usbd_status r;
1215 1.1 augustss int i, offs;
1216 1.7 augustss usb_dma_t dma;
1217 1.1 augustss
1218 1.1 augustss if (!sc->sc_freeqhs) {
1219 1.1 augustss DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1220 1.50 augustss r = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1221 1.7 augustss UHCI_QH_ALIGN, &dma);
1222 1.42 augustss if (r != USBD_NORMAL_COMPLETION)
1223 1.1 augustss return 0;
1224 1.43 augustss for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1225 1.42 augustss offs = i * UHCI_SQH_SIZE;
1226 1.42 augustss sqh = (uhci_soft_qh_t *)((char *)KERNADDR(&dma) +offs);
1227 1.1 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1228 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1229 1.1 augustss sc->sc_freeqhs = sqh;
1230 1.1 augustss }
1231 1.1 augustss }
1232 1.1 augustss sqh = sc->sc_freeqhs;
1233 1.42 augustss sc->sc_freeqhs = sqh->hlink;
1234 1.42 augustss memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1235 1.16 augustss return (sqh);
1236 1.1 augustss }
1237 1.1 augustss
1238 1.1 augustss void
1239 1.1 augustss uhci_free_sqh(sc, sqh)
1240 1.1 augustss uhci_softc_t *sc;
1241 1.1 augustss uhci_soft_qh_t *sqh;
1242 1.1 augustss {
1243 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1244 1.1 augustss sc->sc_freeqhs = sqh;
1245 1.1 augustss }
1246 1.1 augustss
1247 1.16 augustss #if 0
1248 1.1 augustss /*
1249 1.1 augustss * Enter a list of transfers onto a control queue.
1250 1.1 augustss * Called at splusb()
1251 1.1 augustss */
1252 1.1 augustss void
1253 1.1 augustss uhci_enter_ctl_q(sc, sqh, ii)
1254 1.1 augustss uhci_softc_t *sc;
1255 1.1 augustss uhci_soft_qh_t *sqh;
1256 1.1 augustss uhci_intr_info_t *ii;
1257 1.1 augustss {
1258 1.1 augustss DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh));
1259 1.1 augustss
1260 1.1 augustss }
1261 1.16 augustss #endif
1262 1.1 augustss
1263 1.1 augustss void
1264 1.1 augustss uhci_free_std_chain(sc, std, stdend)
1265 1.1 augustss uhci_softc_t *sc;
1266 1.1 augustss uhci_soft_td_t *std;
1267 1.1 augustss uhci_soft_td_t *stdend;
1268 1.1 augustss {
1269 1.1 augustss uhci_soft_td_t *p;
1270 1.1 augustss
1271 1.1 augustss for (; std != stdend; std = p) {
1272 1.42 augustss p = std->link.std;
1273 1.1 augustss uhci_free_std(sc, std);
1274 1.1 augustss }
1275 1.1 augustss }
1276 1.1 augustss
1277 1.1 augustss usbd_status
1278 1.33 augustss uhci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep)
1279 1.1 augustss struct uhci_pipe *upipe;
1280 1.1 augustss uhci_softc_t *sc;
1281 1.33 augustss int len, rd, shortok;
1282 1.7 augustss usb_dma_t *dma;
1283 1.1 augustss uhci_soft_td_t **sp, **ep;
1284 1.1 augustss {
1285 1.1 augustss uhci_soft_td_t *p, *lastp;
1286 1.1 augustss uhci_physaddr_t lastlink;
1287 1.1 augustss int i, ntd, l, tog, maxp;
1288 1.18 augustss u_int32_t status;
1289 1.1 augustss int addr = upipe->pipe.device->address;
1290 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1291 1.1 augustss
1292 1.33 augustss DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d "
1293 1.33 augustss "shortok=%d\n", addr, UE_GET_ADDR(endpt), len,
1294 1.33 augustss upipe->pipe.device->lowspeed, shortok));
1295 1.1 augustss if (len == 0) {
1296 1.1 augustss *sp = *ep = 0;
1297 1.12 augustss DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n"));
1298 1.1 augustss return (USBD_NORMAL_COMPLETION);
1299 1.1 augustss }
1300 1.4 augustss maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1301 1.1 augustss if (maxp == 0) {
1302 1.1 augustss printf("uhci_alloc_std_chain: maxp=0\n");
1303 1.1 augustss return (USBD_INVAL);
1304 1.1 augustss }
1305 1.1 augustss ntd = (len + maxp - 1) / maxp;
1306 1.39 augustss DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1307 1.38 augustss tog = upipe->nexttoggle;
1308 1.1 augustss if (ntd % 2 == 0)
1309 1.1 augustss tog ^= 1;
1310 1.32 augustss upipe->nexttoggle = tog ^ 1;
1311 1.1 augustss lastp = 0;
1312 1.1 augustss lastlink = UHCI_PTR_T;
1313 1.1 augustss ntd--;
1314 1.33 augustss status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1315 1.18 augustss if (upipe->pipe.device->lowspeed)
1316 1.18 augustss status |= UHCI_TD_LS;
1317 1.33 augustss if (shortok)
1318 1.18 augustss status |= UHCI_TD_SPD;
1319 1.1 augustss for (i = ntd; i >= 0; i--) {
1320 1.1 augustss p = uhci_alloc_std(sc);
1321 1.1 augustss if (!p) {
1322 1.1 augustss uhci_free_std_chain(sc, lastp, 0);
1323 1.1 augustss return (USBD_NOMEM);
1324 1.1 augustss }
1325 1.42 augustss p->link.std = lastp;
1326 1.42 augustss p->td.td_link = LE(lastlink);
1327 1.1 augustss lastp = p;
1328 1.1 augustss lastlink = p->physaddr;
1329 1.42 augustss p->td.td_status = LE(status);
1330 1.1 augustss if (i == ntd) {
1331 1.1 augustss /* last TD */
1332 1.1 augustss l = len % maxp;
1333 1.1 augustss if (l == 0) l = maxp;
1334 1.1 augustss *ep = p;
1335 1.1 augustss } else
1336 1.1 augustss l = maxp;
1337 1.42 augustss p->td.td_token =
1338 1.39 augustss LE(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1339 1.39 augustss UHCI_TD_OUT(l, endpt, addr, tog));
1340 1.42 augustss p->td.td_buffer = LE(DMAADDR(dma) + i * maxp);
1341 1.1 augustss tog ^= 1;
1342 1.1 augustss }
1343 1.1 augustss *sp = lastp;
1344 1.38 augustss DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1345 1.38 augustss upipe->nexttoggle));
1346 1.1 augustss return (USBD_NORMAL_COMPLETION);
1347 1.1 augustss }
1348 1.1 augustss
1349 1.38 augustss void
1350 1.38 augustss uhci_device_clear_toggle(pipe)
1351 1.38 augustss usbd_pipe_handle pipe;
1352 1.38 augustss {
1353 1.38 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1354 1.38 augustss upipe->nexttoggle = 0;
1355 1.38 augustss }
1356 1.38 augustss
1357 1.38 augustss void
1358 1.38 augustss uhci_noop(pipe)
1359 1.38 augustss usbd_pipe_handle pipe;
1360 1.38 augustss {
1361 1.38 augustss }
1362 1.38 augustss
1363 1.1 augustss usbd_status
1364 1.1 augustss uhci_device_bulk_transfer(reqh)
1365 1.1 augustss usbd_request_handle reqh;
1366 1.1 augustss {
1367 1.16 augustss usbd_status r;
1368 1.16 augustss
1369 1.52 augustss /* Insert last in queue. */
1370 1.16 augustss r = usb_insert_transfer(reqh);
1371 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1372 1.16 augustss return (r);
1373 1.52 augustss
1374 1.52 augustss /* Pipe isn't running, start first */
1375 1.52 augustss return (uhci_device_bulk_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1376 1.16 augustss }
1377 1.16 augustss
1378 1.16 augustss usbd_status
1379 1.16 augustss uhci_device_bulk_start(reqh)
1380 1.16 augustss usbd_request_handle reqh;
1381 1.16 augustss {
1382 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1383 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1384 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1385 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1386 1.55 augustss uhci_soft_td_t *data, *dataend;
1387 1.1 augustss uhci_soft_qh_t *sqh;
1388 1.1 augustss usbd_status r;
1389 1.45 augustss int len, isread, endpt;
1390 1.1 augustss int s;
1391 1.1 augustss
1392 1.49 augustss DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p len=%d flags=%d\n",
1393 1.49 augustss reqh, reqh->length, reqh->flags));
1394 1.1 augustss
1395 1.48 augustss #ifdef DIAGNOSTIC
1396 1.48 augustss if (reqh->rqflags & URQ_REQUEST)
1397 1.1 augustss panic("uhci_device_bulk_transfer: a request\n");
1398 1.48 augustss #endif
1399 1.1 augustss
1400 1.1 augustss len = reqh->length;
1401 1.45 augustss endpt = reqh->pipe->endpoint->edesc->bEndpointAddress;
1402 1.45 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1403 1.1 augustss sqh = upipe->u.bulk.sqh;
1404 1.1 augustss
1405 1.1 augustss upipe->u.bulk.isread = isread;
1406 1.1 augustss upipe->u.bulk.length = len;
1407 1.1 augustss
1408 1.1 augustss r = uhci_alloc_std_chain(upipe, sc, len, isread,
1409 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1410 1.55 augustss &reqh->dmabuf, &data, &dataend);
1411 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1412 1.49 augustss return (r);
1413 1.55 augustss dataend->td.td_status |= LE(UHCI_TD_IOC);
1414 1.1 augustss
1415 1.1 augustss #ifdef USB_DEBUG
1416 1.33 augustss if (uhcidebug > 8) {
1417 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1418 1.55 augustss uhci_dump_tds(data);
1419 1.1 augustss }
1420 1.1 augustss #endif
1421 1.1 augustss
1422 1.1 augustss /* Set up interrupt info. */
1423 1.1 augustss ii->reqh = reqh;
1424 1.55 augustss ii->stdstart = data;
1425 1.55 augustss ii->stdend = dataend;
1426 1.7 augustss #ifdef DIAGNOSTIC
1427 1.7 augustss ii->isdone = 0;
1428 1.7 augustss #endif
1429 1.1 augustss
1430 1.55 augustss sqh->elink = data;
1431 1.55 augustss sqh->qh.qh_elink = LE(data->physaddr);
1432 1.1 augustss sqh->intr_info = ii;
1433 1.1 augustss
1434 1.1 augustss s = splusb();
1435 1.1 augustss uhci_add_bulk(sc, sqh);
1436 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1437 1.1 augustss
1438 1.13 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1439 1.49 augustss usb_timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout),
1440 1.49 augustss ii->timeout_handle);
1441 1.13 augustss }
1442 1.1 augustss splx(s);
1443 1.1 augustss
1444 1.1 augustss #ifdef USB_DEBUG
1445 1.1 augustss if (uhcidebug > 10) {
1446 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1447 1.55 augustss uhci_dump_tds(data);
1448 1.1 augustss }
1449 1.1 augustss #endif
1450 1.1 augustss
1451 1.26 augustss if (sc->sc_bus.use_polling)
1452 1.26 augustss uhci_waitintr(sc, reqh);
1453 1.26 augustss
1454 1.1 augustss return (USBD_IN_PROGRESS);
1455 1.1 augustss }
1456 1.1 augustss
1457 1.1 augustss /* Abort a device bulk request. */
1458 1.1 augustss void
1459 1.1 augustss uhci_device_bulk_abort(reqh)
1460 1.1 augustss usbd_request_handle reqh;
1461 1.1 augustss {
1462 1.33 augustss DPRINTF(("uhci_device_bulk_abort:\n"));
1463 1.33 augustss uhci_abort_req(reqh, USBD_CANCELLED);
1464 1.33 augustss }
1465 1.33 augustss
1466 1.33 augustss void
1467 1.33 augustss uhci_abort_req(reqh, status)
1468 1.33 augustss usbd_request_handle reqh;
1469 1.33 augustss usbd_status status;
1470 1.33 augustss {
1471 1.33 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1472 1.33 augustss uhci_intr_info_t *ii = upipe->iinfo;
1473 1.33 augustss uhci_soft_td_t *std;
1474 1.33 augustss
1475 1.33 augustss /* Make interrupt routine ignore it, */
1476 1.41 augustss reqh->status = status;
1477 1.41 augustss
1478 1.41 augustss /* don't timeout, */
1479 1.41 augustss usb_untimeout(uhci_timeout, ii, ii->timeout_handle);
1480 1.33 augustss
1481 1.33 augustss /* make hardware ignore it, */
1482 1.42 augustss for (std = ii->stdstart; std != 0; std = std->link.std)
1483 1.48 augustss std->td.td_status &= LE(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1484 1.41 augustss
1485 1.41 augustss reqh->hcpriv = ii;
1486 1.41 augustss
1487 1.33 augustss /* make sure hardware has completed, */
1488 1.50 augustss if (reqh->device->bus->intr_context) {
1489 1.50 augustss /* We have no process context, so we can't use tsleep(). */
1490 1.50 augustss timeout(uhci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND);
1491 1.50 augustss } else {
1492 1.41 augustss usb_delay_ms(reqh->pipe->device->bus, 1);
1493 1.41 augustss /* and call final part of interrupt handler. */
1494 1.41 augustss uhci_abort_req_end(reqh);
1495 1.41 augustss }
1496 1.41 augustss }
1497 1.41 augustss
1498 1.41 augustss void
1499 1.41 augustss uhci_abort_req_end(v)
1500 1.41 augustss void *v;
1501 1.41 augustss {
1502 1.41 augustss usbd_request_handle reqh = v;
1503 1.41 augustss int s;
1504 1.33 augustss
1505 1.33 augustss s = splusb();
1506 1.41 augustss usb_transfer_complete(reqh);
1507 1.33 augustss splx(s);
1508 1.1 augustss }
1509 1.1 augustss
1510 1.1 augustss /* Close a device bulk pipe. */
1511 1.1 augustss void
1512 1.1 augustss uhci_device_bulk_close(pipe)
1513 1.1 augustss usbd_pipe_handle pipe;
1514 1.1 augustss {
1515 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1516 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1517 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1518 1.1 augustss
1519 1.1 augustss uhci_free_sqh(sc, upipe->u.bulk.sqh);
1520 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1521 1.1 augustss /* XXX free other resources */
1522 1.1 augustss }
1523 1.1 augustss
1524 1.1 augustss usbd_status
1525 1.1 augustss uhci_device_ctrl_transfer(reqh)
1526 1.1 augustss usbd_request_handle reqh;
1527 1.1 augustss {
1528 1.16 augustss usbd_status r;
1529 1.16 augustss
1530 1.52 augustss /* Insert last in queue. */
1531 1.16 augustss r = usb_insert_transfer(reqh);
1532 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1533 1.16 augustss return (r);
1534 1.52 augustss
1535 1.52 augustss /* Pipe isn't running, start first */
1536 1.52 augustss return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1537 1.16 augustss }
1538 1.16 augustss
1539 1.16 augustss usbd_status
1540 1.16 augustss uhci_device_ctrl_start(reqh)
1541 1.16 augustss usbd_request_handle reqh;
1542 1.16 augustss {
1543 1.9 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1544 1.1 augustss usbd_status r;
1545 1.1 augustss
1546 1.48 augustss #ifdef DIAGNOSTIC
1547 1.48 augustss if (!(reqh->rqflags & URQ_REQUEST))
1548 1.1 augustss panic("uhci_device_ctrl_transfer: not a request\n");
1549 1.48 augustss #endif
1550 1.1 augustss
1551 1.1 augustss r = uhci_device_request(reqh);
1552 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1553 1.1 augustss return (r);
1554 1.1 augustss
1555 1.9 augustss if (sc->sc_bus.use_polling)
1556 1.9 augustss uhci_waitintr(sc, reqh);
1557 1.1 augustss return (USBD_IN_PROGRESS);
1558 1.1 augustss }
1559 1.1 augustss
1560 1.1 augustss usbd_status
1561 1.1 augustss uhci_device_intr_transfer(reqh)
1562 1.1 augustss usbd_request_handle reqh;
1563 1.1 augustss {
1564 1.16 augustss usbd_status r;
1565 1.16 augustss
1566 1.52 augustss /* Insert last in queue. */
1567 1.16 augustss r = usb_insert_transfer(reqh);
1568 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1569 1.16 augustss return (r);
1570 1.52 augustss
1571 1.52 augustss /* Pipe isn't running, start first */
1572 1.52 augustss return (uhci_device_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1573 1.16 augustss }
1574 1.16 augustss
1575 1.16 augustss usbd_status
1576 1.16 augustss uhci_device_intr_start(reqh)
1577 1.16 augustss usbd_request_handle reqh;
1578 1.16 augustss {
1579 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1580 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1581 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1582 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1583 1.55 augustss uhci_soft_td_t *data, *dataend;
1584 1.1 augustss uhci_soft_qh_t *sqh;
1585 1.1 augustss usbd_status r;
1586 1.49 augustss int i, s;
1587 1.1 augustss
1588 1.49 augustss DPRINTFN(3,("uhci_device_intr_transfer: reqh=%p len=%d flags=%d\n",
1589 1.49 augustss reqh, reqh->length, reqh->flags));
1590 1.1 augustss
1591 1.48 augustss #ifdef DIAGNOSTIC
1592 1.48 augustss if (reqh->rqflags & URQ_REQUEST)
1593 1.1 augustss panic("uhci_device_intr_transfer: a request\n");
1594 1.48 augustss #endif
1595 1.1 augustss
1596 1.49 augustss r = uhci_alloc_std_chain(upipe, sc, reqh->length, 1,
1597 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1598 1.55 augustss &reqh->dmabuf, &data, &dataend);
1599 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1600 1.49 augustss return (r);
1601 1.55 augustss dataend->td.td_status |= LE(UHCI_TD_IOC);
1602 1.1 augustss
1603 1.1 augustss #ifdef USB_DEBUG
1604 1.1 augustss if (uhcidebug > 10) {
1605 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
1606 1.55 augustss uhci_dump_tds(data);
1607 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1608 1.1 augustss }
1609 1.1 augustss #endif
1610 1.1 augustss
1611 1.1 augustss s = splusb();
1612 1.1 augustss /* Set up interrupt info. */
1613 1.1 augustss ii->reqh = reqh;
1614 1.55 augustss ii->stdstart = data;
1615 1.55 augustss ii->stdend = dataend;
1616 1.7 augustss #ifdef DIAGNOSTIC
1617 1.7 augustss ii->isdone = 0;
1618 1.7 augustss #endif
1619 1.1 augustss
1620 1.12 augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
1621 1.12 augustss upipe->u.intr.qhs[0]));
1622 1.1 augustss for (i = 0; i < upipe->u.intr.npoll; i++) {
1623 1.1 augustss sqh = upipe->u.intr.qhs[i];
1624 1.55 augustss sqh->elink = data;
1625 1.55 augustss sqh->qh.qh_elink = LE(data->physaddr);
1626 1.1 augustss }
1627 1.1 augustss splx(s);
1628 1.1 augustss
1629 1.1 augustss #ifdef USB_DEBUG
1630 1.1 augustss if (uhcidebug > 10) {
1631 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
1632 1.55 augustss uhci_dump_tds(data);
1633 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1634 1.1 augustss }
1635 1.1 augustss #endif
1636 1.1 augustss
1637 1.1 augustss return (USBD_IN_PROGRESS);
1638 1.1 augustss }
1639 1.1 augustss
1640 1.1 augustss /* Abort a device control request. */
1641 1.1 augustss void
1642 1.1 augustss uhci_device_ctrl_abort(reqh)
1643 1.1 augustss usbd_request_handle reqh;
1644 1.1 augustss {
1645 1.33 augustss DPRINTF(("uhci_device_ctrl_abort:\n"));
1646 1.33 augustss uhci_abort_req(reqh, USBD_CANCELLED);
1647 1.1 augustss }
1648 1.1 augustss
1649 1.1 augustss /* Close a device control pipe. */
1650 1.1 augustss void
1651 1.1 augustss uhci_device_ctrl_close(pipe)
1652 1.1 augustss usbd_pipe_handle pipe;
1653 1.1 augustss {
1654 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1655 1.1 augustss
1656 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1657 1.1 augustss /* XXX free other resources */
1658 1.1 augustss }
1659 1.1 augustss
1660 1.1 augustss /* Abort a device interrupt request. */
1661 1.1 augustss void
1662 1.1 augustss uhci_device_intr_abort(reqh)
1663 1.1 augustss usbd_request_handle reqh;
1664 1.1 augustss {
1665 1.36 augustss DPRINTFN(1,("uhci_device_intr_abort: reqh=%p\n", reqh));
1666 1.36 augustss if (reqh->pipe->intrreqh == reqh) {
1667 1.36 augustss DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
1668 1.36 augustss reqh->pipe->intrreqh = 0;
1669 1.1 augustss }
1670 1.36 augustss uhci_abort_req(reqh, USBD_CANCELLED);
1671 1.1 augustss }
1672 1.1 augustss
1673 1.1 augustss /* Close a device interrupt pipe. */
1674 1.1 augustss void
1675 1.1 augustss uhci_device_intr_close(pipe)
1676 1.1 augustss usbd_pipe_handle pipe;
1677 1.1 augustss {
1678 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1679 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1680 1.1 augustss int i, s, npoll;
1681 1.1 augustss
1682 1.1 augustss upipe->iinfo->stdstart = 0; /* inactive */
1683 1.1 augustss
1684 1.1 augustss /* Unlink descriptors from controller data structures. */
1685 1.1 augustss npoll = upipe->u.intr.npoll;
1686 1.1 augustss uhci_lock_frames(sc);
1687 1.1 augustss for (i = 0; i < npoll; i++)
1688 1.1 augustss uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos,
1689 1.1 augustss upipe->u.intr.qhs[i]);
1690 1.1 augustss uhci_unlock_frames(sc);
1691 1.1 augustss
1692 1.1 augustss /*
1693 1.1 augustss * We now have to wait for any activity on the physical
1694 1.1 augustss * descriptors to stop.
1695 1.1 augustss */
1696 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
1697 1.1 augustss
1698 1.1 augustss for(i = 0; i < npoll; i++)
1699 1.1 augustss uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
1700 1.31 augustss free(upipe->u.intr.qhs, M_USBHC);
1701 1.1 augustss
1702 1.1 augustss s = splusb();
1703 1.1 augustss LIST_REMOVE(upipe->iinfo, list); /* remove from active list */
1704 1.1 augustss splx(s);
1705 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1706 1.1 augustss
1707 1.1 augustss /* XXX free other resources */
1708 1.1 augustss }
1709 1.1 augustss
1710 1.1 augustss usbd_status
1711 1.1 augustss uhci_device_request(reqh)
1712 1.1 augustss usbd_request_handle reqh;
1713 1.1 augustss {
1714 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1715 1.1 augustss usb_device_request_t *req = &reqh->request;
1716 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1717 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1718 1.1 augustss int addr = dev->address;
1719 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1720 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1721 1.55 augustss uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
1722 1.1 augustss uhci_soft_qh_t *sqh;
1723 1.1 augustss int len;
1724 1.1 augustss u_int32_t ls;
1725 1.1 augustss usbd_status r;
1726 1.1 augustss int isread;
1727 1.1 augustss int s;
1728 1.1 augustss
1729 1.13 augustss DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
1730 1.12 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1731 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1732 1.1 augustss UGETW(req->wIndex), UGETW(req->wLength),
1733 1.1 augustss addr, endpt));
1734 1.1 augustss
1735 1.1 augustss ls = dev->lowspeed ? UHCI_TD_LS : 0;
1736 1.1 augustss isread = req->bmRequestType & UT_READ;
1737 1.1 augustss len = UGETW(req->wLength);
1738 1.1 augustss
1739 1.1 augustss setup = upipe->u.ctl.setup;
1740 1.1 augustss stat = upipe->u.ctl.stat;
1741 1.1 augustss sqh = upipe->u.ctl.sqh;
1742 1.1 augustss
1743 1.1 augustss /* Set up data transaction */
1744 1.1 augustss if (len != 0) {
1745 1.38 augustss upipe->nexttoggle = 1;
1746 1.1 augustss r = uhci_alloc_std_chain(upipe, sc, len, isread,
1747 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1748 1.55 augustss &reqh->dmabuf, &data, &dataend);
1749 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1750 1.49 augustss return (r);
1751 1.55 augustss next = data;
1752 1.55 augustss dataend->link.std = stat;
1753 1.55 augustss dataend->td.td_link = LE(stat->physaddr);
1754 1.1 augustss } else {
1755 1.1 augustss next = stat;
1756 1.1 augustss }
1757 1.1 augustss upipe->u.ctl.length = len;
1758 1.1 augustss
1759 1.1 augustss memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
1760 1.1 augustss
1761 1.42 augustss setup->link.std = next;
1762 1.42 augustss setup->td.td_link = LE(next->physaddr);
1763 1.42 augustss setup->td.td_status = LE(UHCI_TD_SET_ERRCNT(3) | ls | UHCI_TD_ACTIVE);
1764 1.42 augustss setup->td.td_token = LE(UHCI_TD_SETUP(sizeof *req, endpt, addr));
1765 1.42 augustss setup->td.td_buffer = LE(DMAADDR(&upipe->u.ctl.reqdma));
1766 1.42 augustss
1767 1.42 augustss stat->link.std = 0;
1768 1.42 augustss stat->td.td_link = LE(UHCI_PTR_T);
1769 1.42 augustss stat->td.td_status = LE(UHCI_TD_SET_ERRCNT(3) | ls |
1770 1.39 augustss UHCI_TD_ACTIVE | UHCI_TD_IOC);
1771 1.42 augustss stat->td.td_token =
1772 1.39 augustss LE(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
1773 1.39 augustss UHCI_TD_IN (0, endpt, addr, 1));
1774 1.42 augustss stat->td.td_buffer = LE(0);
1775 1.1 augustss
1776 1.1 augustss #ifdef USB_DEBUG
1777 1.1 augustss if (uhcidebug > 20) {
1778 1.47 augustss DPRINTF(("uhci_device_request: before transfer\n"));
1779 1.41 augustss uhci_dump_tds(setup);
1780 1.1 augustss }
1781 1.1 augustss #endif
1782 1.1 augustss
1783 1.1 augustss /* Set up interrupt info. */
1784 1.1 augustss ii->reqh = reqh;
1785 1.1 augustss ii->stdstart = setup;
1786 1.1 augustss ii->stdend = stat;
1787 1.7 augustss #ifdef DIAGNOSTIC
1788 1.7 augustss ii->isdone = 0;
1789 1.7 augustss #endif
1790 1.1 augustss
1791 1.42 augustss sqh->elink = setup;
1792 1.42 augustss sqh->qh.qh_elink = LE(setup->physaddr);
1793 1.1 augustss sqh->intr_info = ii;
1794 1.1 augustss
1795 1.1 augustss s = splusb();
1796 1.1 augustss uhci_add_ctrl(sc, sqh);
1797 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1798 1.1 augustss #ifdef USB_DEBUG
1799 1.1 augustss if (uhcidebug > 12) {
1800 1.1 augustss uhci_soft_td_t *std;
1801 1.1 augustss uhci_soft_qh_t *xqh;
1802 1.13 augustss uhci_soft_qh_t *sxqh;
1803 1.13 augustss int maxqh = 0;
1804 1.1 augustss uhci_physaddr_t link;
1805 1.47 augustss DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
1806 1.1 augustss for (std = sc->sc_vframes[0].htd, link = 0;
1807 1.1 augustss (link & UHCI_PTR_Q) == 0;
1808 1.42 augustss std = std->link.std) {
1809 1.42 augustss link = LE(std->td.td_link);
1810 1.1 augustss uhci_dump_td(std);
1811 1.1 augustss }
1812 1.13 augustss for (sxqh = xqh = (uhci_soft_qh_t *)std;
1813 1.1 augustss xqh;
1814 1.42 augustss xqh = (maxqh++ == 5 || xqh->hlink==sxqh ||
1815 1.42 augustss xqh->hlink==xqh ? NULL : xqh->hlink)) {
1816 1.1 augustss uhci_dump_qh(xqh);
1817 1.13 augustss uhci_dump_qh(sxqh);
1818 1.13 augustss }
1819 1.47 augustss DPRINTF(("Enqueued QH:\n"));
1820 1.1 augustss uhci_dump_qh(sqh);
1821 1.42 augustss uhci_dump_tds(sqh->elink);
1822 1.1 augustss }
1823 1.1 augustss #endif
1824 1.13 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1825 1.13 augustss usb_timeout(uhci_timeout, ii,
1826 1.13 augustss MS_TO_TICKS(reqh->timeout), ii->timeout_handle);
1827 1.13 augustss }
1828 1.1 augustss splx(s);
1829 1.1 augustss
1830 1.1 augustss return (USBD_NORMAL_COMPLETION);
1831 1.1 augustss }
1832 1.1 augustss
1833 1.16 augustss usbd_status
1834 1.16 augustss uhci_device_isoc_transfer(reqh)
1835 1.16 augustss usbd_request_handle reqh;
1836 1.16 augustss {
1837 1.48 augustss usbd_status r;
1838 1.48 augustss
1839 1.48 augustss DPRINTFN(5,("uhci_device_isoc_transfer: reqh=%p\n", reqh));
1840 1.48 augustss
1841 1.48 augustss /* Put it on our queue, */
1842 1.48 augustss r = usb_insert_transfer(reqh);
1843 1.48 augustss
1844 1.48 augustss /* bail out on error, */
1845 1.48 augustss if (r != USBD_NORMAL_COMPLETION && r != USBD_IN_PROGRESS)
1846 1.48 augustss return (r);
1847 1.48 augustss
1848 1.48 augustss /* XXX should check inuse here */
1849 1.48 augustss
1850 1.48 augustss /* insert into schedule, */
1851 1.48 augustss uhci_device_isoc_enter(reqh);
1852 1.48 augustss
1853 1.48 augustss /* and put on interrupt list if the pipe wasn't running */
1854 1.48 augustss if (r == USBD_NORMAL_COMPLETION)
1855 1.52 augustss uhci_device_isoc_start(SIMPLEQ_FIRST(&reqh->pipe->queue));
1856 1.48 augustss
1857 1.48 augustss return (r);
1858 1.48 augustss }
1859 1.48 augustss
1860 1.48 augustss void
1861 1.48 augustss uhci_device_isoc_enter(reqh)
1862 1.48 augustss usbd_request_handle reqh;
1863 1.48 augustss {
1864 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1865 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
1866 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1867 1.48 augustss struct iso *iso = &upipe->u.iso;
1868 1.48 augustss uhci_soft_td_t *std;
1869 1.48 augustss u_int32_t buf, len, status;
1870 1.48 augustss int s, i, next, nframes;
1871 1.48 augustss
1872 1.48 augustss DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d reqh=%p "
1873 1.48 augustss "nframes=%d\n",
1874 1.48 augustss iso->inuse, iso->next, reqh, reqh->nframes));
1875 1.48 augustss
1876 1.48 augustss if (reqh->status == USBD_IN_PROGRESS) {
1877 1.48 augustss /* This request has already been entered into the frame list */
1878 1.48 augustss }
1879 1.48 augustss
1880 1.48 augustss #ifdef DIAGNOSTIC
1881 1.48 augustss if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
1882 1.48 augustss printf("uhci_device_isoc_enter: overflow!\n");
1883 1.19 augustss #endif
1884 1.16 augustss
1885 1.48 augustss next = iso->next;
1886 1.48 augustss if (next == -1) {
1887 1.48 augustss /* Not in use yet, schedule it a few frames ahead. */
1888 1.48 augustss next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
1889 1.48 augustss DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
1890 1.48 augustss }
1891 1.48 augustss
1892 1.48 augustss reqh->status = USBD_IN_PROGRESS;
1893 1.48 augustss reqh->hcprivint = next;
1894 1.48 augustss
1895 1.48 augustss buf = DMAADDR(&reqh->dmabuf);
1896 1.48 augustss status = LE(UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
1897 1.48 augustss UHCI_TD_ACTIVE |
1898 1.48 augustss UHCI_TD_IOS));
1899 1.48 augustss nframes = reqh->nframes;
1900 1.48 augustss s = splusb();
1901 1.48 augustss for (i = 0; i < nframes; i++) {
1902 1.48 augustss std = iso->stds[next];
1903 1.48 augustss if (++next >= UHCI_VFRAMELIST_COUNT)
1904 1.48 augustss next = 0;
1905 1.48 augustss len = reqh->frlengths[i];
1906 1.48 augustss std->td.td_buffer = LE(buf);
1907 1.48 augustss if (i == nframes - 1)
1908 1.48 augustss status |= LE(UHCI_TD_IOC);
1909 1.48 augustss std->td.td_status = status;
1910 1.48 augustss std->td.td_token &= LE(~UHCI_TD_MAXLEN_MASK);
1911 1.48 augustss std->td.td_token |= LE(UHCI_TD_SET_MAXLEN(len));
1912 1.48 augustss #ifdef USB_DEBUG
1913 1.48 augustss if (uhcidebug > 5) {
1914 1.48 augustss DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
1915 1.48 augustss uhci_dump_td(std);
1916 1.48 augustss }
1917 1.48 augustss #endif
1918 1.48 augustss buf += len;
1919 1.48 augustss }
1920 1.48 augustss iso->next = next;
1921 1.48 augustss iso->inuse += reqh->nframes;
1922 1.16 augustss
1923 1.48 augustss splx(s);
1924 1.16 augustss }
1925 1.16 augustss
1926 1.16 augustss usbd_status
1927 1.16 augustss uhci_device_isoc_start(reqh)
1928 1.16 augustss usbd_request_handle reqh;
1929 1.16 augustss {
1930 1.48 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1931 1.48 augustss uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1932 1.48 augustss uhci_intr_info_t *ii = upipe->iinfo;
1933 1.48 augustss uhci_soft_td_t *end;
1934 1.48 augustss int s, i;
1935 1.48 augustss
1936 1.48 augustss #ifdef DIAGNOSTIC
1937 1.48 augustss if (reqh->status != USBD_IN_PROGRESS)
1938 1.48 augustss printf("uhci_device_isoc_start: not in progress %p\n", reqh);
1939 1.48 augustss #endif
1940 1.48 augustss
1941 1.48 augustss /* Find the last TD */
1942 1.48 augustss i = reqh->hcprivint + reqh->nframes;
1943 1.48 augustss if (i >= UHCI_VFRAMELIST_COUNT)
1944 1.48 augustss i -= UHCI_VFRAMELIST_COUNT;
1945 1.48 augustss end = upipe->u.iso.stds[i];
1946 1.48 augustss
1947 1.48 augustss s = splusb();
1948 1.48 augustss
1949 1.48 augustss /* Set up interrupt info. */
1950 1.48 augustss ii->reqh = reqh;
1951 1.48 augustss ii->stdstart = end;
1952 1.48 augustss ii->stdend = end;
1953 1.48 augustss #ifdef DIAGNOSTIC
1954 1.48 augustss ii->isdone = 0;
1955 1.48 augustss #endif
1956 1.48 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1957 1.48 augustss
1958 1.48 augustss splx(s);
1959 1.48 augustss
1960 1.48 augustss return (USBD_IN_PROGRESS);
1961 1.16 augustss }
1962 1.16 augustss
1963 1.16 augustss void
1964 1.16 augustss uhci_device_isoc_abort(reqh)
1965 1.16 augustss usbd_request_handle reqh;
1966 1.16 augustss {
1967 1.48 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1968 1.48 augustss uhci_intr_info_t *ii = upipe->iinfo;
1969 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
1970 1.48 augustss uhci_soft_td_t *std;
1971 1.48 augustss int i, n, nframes;
1972 1.48 augustss
1973 1.48 augustss /* Make interrupt routine ignore it, */
1974 1.48 augustss reqh->status = USBD_CANCELLED;
1975 1.48 augustss
1976 1.48 augustss /* make hardware ignore it, */
1977 1.48 augustss nframes = reqh->nframes;
1978 1.48 augustss n = reqh->hcprivint;
1979 1.48 augustss for (i = 0; i < nframes; i++) {
1980 1.48 augustss std = stds[n];
1981 1.48 augustss std->td.td_status &= LE(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1982 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
1983 1.48 augustss n = 0;
1984 1.48 augustss }
1985 1.48 augustss
1986 1.48 augustss reqh->hcpriv = ii;
1987 1.48 augustss
1988 1.48 augustss /* make sure hardware has completed, */
1989 1.50 augustss if (reqh->device->bus->intr_context) {
1990 1.50 augustss /* We have no process context, so we can't use tsleep(). */
1991 1.50 augustss timeout(uhci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND);
1992 1.50 augustss } else {
1993 1.48 augustss usb_delay_ms(reqh->pipe->device->bus, 1);
1994 1.48 augustss /* and call final part of interrupt handler. */
1995 1.48 augustss uhci_abort_req_end(reqh);
1996 1.48 augustss }
1997 1.16 augustss }
1998 1.16 augustss
1999 1.16 augustss void
2000 1.16 augustss uhci_device_isoc_close(pipe)
2001 1.16 augustss usbd_pipe_handle pipe;
2002 1.16 augustss {
2003 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2004 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2005 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2006 1.48 augustss uhci_soft_td_t *std, *vstd;
2007 1.16 augustss struct iso *iso;
2008 1.16 augustss int i;
2009 1.16 augustss
2010 1.16 augustss /*
2011 1.16 augustss * Make sure all TDs are marked as inactive.
2012 1.16 augustss * Wait for completion.
2013 1.16 augustss * Unschedule.
2014 1.16 augustss * Deallocate.
2015 1.16 augustss */
2016 1.16 augustss iso = &upipe->u.iso;
2017 1.16 augustss
2018 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2019 1.42 augustss iso->stds[i]->td.td_status &= LE(~UHCI_TD_ACTIVE);
2020 1.20 augustss usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2021 1.16 augustss
2022 1.16 augustss uhci_lock_frames(sc);
2023 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2024 1.16 augustss std = iso->stds[i];
2025 1.48 augustss for (vstd = sc->sc_vframes[i].htd;
2026 1.42 augustss vstd && vstd->link.std != std;
2027 1.42 augustss vstd = vstd->link.std)
2028 1.16 augustss ;
2029 1.16 augustss if (!vstd) {
2030 1.16 augustss /*panic*/
2031 1.16 augustss printf("uhci_device_isoc_close: %p not found\n", std);
2032 1.16 augustss uhci_unlock_frames(sc);
2033 1.16 augustss return;
2034 1.16 augustss }
2035 1.42 augustss vstd->link = std->link;
2036 1.42 augustss vstd->td.td_link = std->td.td_link;
2037 1.16 augustss uhci_free_std(sc, std);
2038 1.16 augustss }
2039 1.16 augustss uhci_unlock_frames(sc);
2040 1.16 augustss
2041 1.31 augustss free(iso->stds, M_USBHC);
2042 1.16 augustss }
2043 1.16 augustss
2044 1.16 augustss usbd_status
2045 1.48 augustss uhci_setup_isoc(pipe)
2046 1.16 augustss usbd_pipe_handle pipe;
2047 1.16 augustss {
2048 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2049 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2050 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2051 1.16 augustss int addr = upipe->pipe.device->address;
2052 1.16 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2053 1.45 augustss int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2054 1.48 augustss uhci_soft_td_t *std, *vstd;
2055 1.48 augustss u_int32_t token;
2056 1.16 augustss struct iso *iso;
2057 1.16 augustss int i;
2058 1.16 augustss
2059 1.16 augustss iso = &upipe->u.iso;
2060 1.16 augustss iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2061 1.31 augustss M_USBHC, M_WAITOK);
2062 1.16 augustss
2063 1.48 augustss token = LE(rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2064 1.48 augustss UHCI_TD_OUT(0, endpt, addr, 0));
2065 1.16 augustss
2066 1.48 augustss /* Allocate the TDs and mark as inactive; */
2067 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2068 1.48 augustss std = uhci_alloc_std(sc);
2069 1.48 augustss if (std == 0)
2070 1.48 augustss goto bad;
2071 1.48 augustss std->td.td_status = LE(UHCI_TD_IOS); /* iso, inactive */
2072 1.48 augustss std->td.td_token = token;
2073 1.48 augustss iso->stds[i] = std;
2074 1.16 augustss }
2075 1.16 augustss
2076 1.48 augustss /* Insert TDs into schedule. */
2077 1.16 augustss uhci_lock_frames(sc);
2078 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2079 1.16 augustss std = iso->stds[i];
2080 1.48 augustss vstd = sc->sc_vframes[i].htd;
2081 1.42 augustss std->link = vstd->link;
2082 1.42 augustss std->td.td_link = vstd->td.td_link;
2083 1.42 augustss vstd->link.std = std;
2084 1.42 augustss vstd->td.td_link = LE(std->physaddr);
2085 1.16 augustss }
2086 1.16 augustss uhci_unlock_frames(sc);
2087 1.16 augustss
2088 1.48 augustss iso->next = -1;
2089 1.48 augustss iso->inuse = 0;
2090 1.48 augustss
2091 1.16 augustss return (USBD_NORMAL_COMPLETION);
2092 1.16 augustss
2093 1.48 augustss bad:
2094 1.16 augustss while (--i >= 0)
2095 1.16 augustss uhci_free_std(sc, iso->stds[i]);
2096 1.31 augustss free(iso->stds, M_USBHC);
2097 1.16 augustss return (USBD_NOMEM);
2098 1.16 augustss }
2099 1.16 augustss
2100 1.16 augustss void
2101 1.41 augustss uhci_device_isoc_done(reqh)
2102 1.41 augustss usbd_request_handle reqh;
2103 1.16 augustss {
2104 1.48 augustss uhci_intr_info_t *ii = reqh->hcpriv;
2105 1.48 augustss
2106 1.48 augustss DPRINTFN(4, ("uhci_isoc_done: length=%d\n", reqh->actlen));
2107 1.48 augustss
2108 1.48 augustss /* Turn off the interrupt since it is active even if the TD is not. */
2109 1.48 augustss ii->stdend->td.td_status &= LE(~UHCI_TD_IOC);
2110 1.48 augustss
2111 1.48 augustss LIST_REMOVE(ii, list); /* remove from active list */
2112 1.16 augustss }
2113 1.16 augustss
2114 1.1 augustss void
2115 1.41 augustss uhci_device_intr_done(reqh)
2116 1.41 augustss usbd_request_handle reqh;
2117 1.1 augustss {
2118 1.41 augustss uhci_intr_info_t *ii = reqh->hcpriv;
2119 1.1 augustss uhci_softc_t *sc = ii->sc;
2120 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
2121 1.1 augustss uhci_soft_qh_t *sqh;
2122 1.1 augustss int i, npoll;
2123 1.1 augustss
2124 1.1 augustss DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen));
2125 1.1 augustss
2126 1.1 augustss npoll = upipe->u.intr.npoll;
2127 1.1 augustss for(i = 0; i < npoll; i++) {
2128 1.1 augustss sqh = upipe->u.intr.qhs[i];
2129 1.42 augustss sqh->elink = 0;
2130 1.42 augustss sqh->qh.qh_elink = LE(UHCI_PTR_T);
2131 1.1 augustss }
2132 1.1 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
2133 1.1 augustss
2134 1.1 augustss /* XXX Wasteful. */
2135 1.31 augustss if (reqh->pipe->repeat) {
2136 1.55 augustss uhci_soft_td_t *data, *dataend;
2137 1.1 augustss
2138 1.1 augustss /* This alloc cannot fail since we freed the chain above. */
2139 1.18 augustss uhci_alloc_std_chain(upipe, sc, reqh->length, 1,
2140 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
2141 1.55 augustss &reqh->dmabuf, &data, &dataend);
2142 1.55 augustss dataend->td.td_status |= LE(UHCI_TD_IOC);
2143 1.1 augustss
2144 1.1 augustss #ifdef USB_DEBUG
2145 1.1 augustss if (uhcidebug > 10) {
2146 1.55 augustss DPRINTF(("uhci_device_intr_done: data(1)\n"));
2147 1.55 augustss uhci_dump_tds(data);
2148 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2149 1.1 augustss }
2150 1.1 augustss #endif
2151 1.1 augustss
2152 1.55 augustss ii->stdstart = data;
2153 1.55 augustss ii->stdend = dataend;
2154 1.7 augustss #ifdef DIAGNOSTIC
2155 1.7 augustss ii->isdone = 0;
2156 1.7 augustss #endif
2157 1.1 augustss for (i = 0; i < npoll; i++) {
2158 1.1 augustss sqh = upipe->u.intr.qhs[i];
2159 1.55 augustss sqh->elink = data;
2160 1.55 augustss sqh->qh.qh_elink = LE(data->physaddr);
2161 1.1 augustss }
2162 1.1 augustss } else {
2163 1.1 augustss ii->stdstart = 0; /* mark as inactive */
2164 1.1 augustss }
2165 1.1 augustss }
2166 1.1 augustss
2167 1.1 augustss /* Deallocate request data structures */
2168 1.1 augustss void
2169 1.41 augustss uhci_device_ctrl_done(reqh)
2170 1.41 augustss usbd_request_handle reqh;
2171 1.1 augustss {
2172 1.41 augustss uhci_intr_info_t *ii = reqh->hcpriv;
2173 1.1 augustss uhci_softc_t *sc = ii->sc;
2174 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
2175 1.1 augustss
2176 1.7 augustss #ifdef DIAGNOSTIC
2177 1.48 augustss if (!(reqh->rqflags & URQ_REQUEST))
2178 1.1 augustss panic("uhci_ctrl_done: not a request\n");
2179 1.7 augustss #endif
2180 1.1 augustss
2181 1.1 augustss LIST_REMOVE(ii, list); /* remove from active list */
2182 1.1 augustss
2183 1.1 augustss uhci_remove_ctrl(sc, upipe->u.ctl.sqh);
2184 1.1 augustss
2185 1.49 augustss if (upipe->u.ctl.length != 0)
2186 1.42 augustss uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2187 1.49 augustss
2188 1.1 augustss DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen));
2189 1.1 augustss }
2190 1.1 augustss
2191 1.1 augustss /* Deallocate request data structures */
2192 1.1 augustss void
2193 1.41 augustss uhci_device_bulk_done(reqh)
2194 1.41 augustss usbd_request_handle reqh;
2195 1.1 augustss {
2196 1.41 augustss uhci_intr_info_t *ii = reqh->hcpriv;
2197 1.1 augustss uhci_softc_t *sc = ii->sc;
2198 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
2199 1.1 augustss
2200 1.1 augustss LIST_REMOVE(ii, list); /* remove from active list */
2201 1.1 augustss
2202 1.1 augustss uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2203 1.32 augustss
2204 1.32 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
2205 1.32 augustss
2206 1.49 augustss DPRINTFN(5, ("uhci_bulk_done: length=%d\n", reqh->actlen));
2207 1.1 augustss }
2208 1.1 augustss
2209 1.1 augustss /* Add interrupt QH, called with vflock. */
2210 1.1 augustss void
2211 1.1 augustss uhci_add_intr(sc, n, sqh)
2212 1.1 augustss uhci_softc_t *sc;
2213 1.1 augustss int n;
2214 1.1 augustss uhci_soft_qh_t *sqh;
2215 1.1 augustss {
2216 1.1 augustss struct uhci_vframe *vf = &sc->sc_vframes[n];
2217 1.42 augustss uhci_soft_qh_t *eqh;
2218 1.1 augustss
2219 1.1 augustss DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh));
2220 1.42 augustss eqh = vf->eqh;
2221 1.42 augustss sqh->hlink = eqh->hlink;
2222 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2223 1.42 augustss eqh->hlink = sqh;
2224 1.42 augustss eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q);
2225 1.1 augustss vf->eqh = sqh;
2226 1.1 augustss vf->bandwidth++;
2227 1.1 augustss }
2228 1.1 augustss
2229 1.1 augustss /* Remove interrupt QH, called with vflock. */
2230 1.1 augustss void
2231 1.1 augustss uhci_remove_intr(sc, n, sqh)
2232 1.1 augustss uhci_softc_t *sc;
2233 1.1 augustss int n;
2234 1.1 augustss uhci_soft_qh_t *sqh;
2235 1.1 augustss {
2236 1.1 augustss struct uhci_vframe *vf = &sc->sc_vframes[n];
2237 1.1 augustss uhci_soft_qh_t *pqh;
2238 1.1 augustss
2239 1.1 augustss DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh));
2240 1.1 augustss
2241 1.42 augustss for (pqh = vf->hqh; pqh->hlink != sqh; pqh = pqh->hlink)
2242 1.1 augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
2243 1.42 augustss if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) {
2244 1.47 augustss DPRINTF(("uhci_remove_intr: QH not found\n"));
2245 1.1 augustss return;
2246 1.1 augustss }
2247 1.1 augustss #else
2248 1.1 augustss ;
2249 1.1 augustss #endif
2250 1.42 augustss pqh->hlink = sqh->hlink;
2251 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2252 1.1 augustss if (vf->eqh == sqh)
2253 1.1 augustss vf->eqh = pqh;
2254 1.1 augustss vf->bandwidth--;
2255 1.1 augustss }
2256 1.1 augustss
2257 1.1 augustss usbd_status
2258 1.1 augustss uhci_device_setintr(sc, upipe, ival)
2259 1.1 augustss uhci_softc_t *sc;
2260 1.1 augustss struct uhci_pipe *upipe;
2261 1.1 augustss int ival;
2262 1.1 augustss {
2263 1.1 augustss uhci_soft_qh_t *sqh;
2264 1.1 augustss int i, npoll, s;
2265 1.1 augustss u_int bestbw, bw, bestoffs, offs;
2266 1.1 augustss
2267 1.1 augustss DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
2268 1.1 augustss if (ival == 0) {
2269 1.1 augustss printf("uhci_setintr: 0 interval\n");
2270 1.1 augustss return (USBD_INVAL);
2271 1.1 augustss }
2272 1.1 augustss
2273 1.1 augustss if (ival > UHCI_VFRAMELIST_COUNT)
2274 1.1 augustss ival = UHCI_VFRAMELIST_COUNT;
2275 1.1 augustss npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2276 1.1 augustss DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
2277 1.1 augustss
2278 1.1 augustss upipe->u.intr.npoll = npoll;
2279 1.1 augustss upipe->u.intr.qhs =
2280 1.31 augustss malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2281 1.1 augustss
2282 1.1 augustss /*
2283 1.1 augustss * Figure out which offset in the schedule that has most
2284 1.1 augustss * bandwidth left over.
2285 1.1 augustss */
2286 1.1 augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2287 1.1 augustss for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2288 1.1 augustss for (bw = i = 0; i < npoll; i++)
2289 1.1 augustss bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2290 1.1 augustss if (bw < bestbw) {
2291 1.1 augustss bestbw = bw;
2292 1.1 augustss bestoffs = offs;
2293 1.1 augustss }
2294 1.1 augustss }
2295 1.1 augustss DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2296 1.1 augustss
2297 1.1 augustss upipe->iinfo->stdstart = 0;
2298 1.1 augustss for(i = 0; i < npoll; i++) {
2299 1.1 augustss upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2300 1.42 augustss sqh->elink = 0;
2301 1.42 augustss sqh->qh.qh_elink = LE(UHCI_PTR_T);
2302 1.1 augustss sqh->pos = MOD(i * ival + bestoffs);
2303 1.1 augustss sqh->intr_info = upipe->iinfo;
2304 1.1 augustss }
2305 1.1 augustss #undef MOD
2306 1.1 augustss
2307 1.1 augustss s = splusb();
2308 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list);
2309 1.1 augustss splx(s);
2310 1.1 augustss
2311 1.1 augustss uhci_lock_frames(sc);
2312 1.1 augustss /* Enter QHs into the controller data structures. */
2313 1.1 augustss for(i = 0; i < npoll; i++)
2314 1.1 augustss uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos,
2315 1.1 augustss upipe->u.intr.qhs[i]);
2316 1.1 augustss uhci_unlock_frames(sc);
2317 1.1 augustss
2318 1.1 augustss DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
2319 1.1 augustss return (USBD_NORMAL_COMPLETION);
2320 1.1 augustss }
2321 1.1 augustss
2322 1.1 augustss /* Open a new pipe. */
2323 1.1 augustss usbd_status
2324 1.1 augustss uhci_open(pipe)
2325 1.1 augustss usbd_pipe_handle pipe;
2326 1.1 augustss {
2327 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2328 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2329 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2330 1.1 augustss usbd_status r;
2331 1.1 augustss
2332 1.1 augustss DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2333 1.1 augustss pipe, pipe->device->address,
2334 1.1 augustss ed->bEndpointAddress, sc->sc_addr));
2335 1.1 augustss if (pipe->device->address == sc->sc_addr) {
2336 1.1 augustss switch (ed->bEndpointAddress) {
2337 1.1 augustss case USB_CONTROL_ENDPOINT:
2338 1.1 augustss pipe->methods = &uhci_root_ctrl_methods;
2339 1.1 augustss break;
2340 1.45 augustss case UE_DIR_IN | UHCI_INTR_ENDPT:
2341 1.1 augustss pipe->methods = &uhci_root_intr_methods;
2342 1.1 augustss break;
2343 1.1 augustss default:
2344 1.1 augustss return (USBD_INVAL);
2345 1.1 augustss }
2346 1.1 augustss } else {
2347 1.1 augustss upipe->iinfo = uhci_alloc_intr_info(sc);
2348 1.1 augustss if (upipe->iinfo == 0)
2349 1.1 augustss return (USBD_NOMEM);
2350 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
2351 1.1 augustss case UE_CONTROL:
2352 1.1 augustss pipe->methods = &uhci_device_ctrl_methods;
2353 1.1 augustss upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2354 1.1 augustss if (upipe->u.ctl.sqh == 0)
2355 1.5 augustss goto bad;
2356 1.1 augustss upipe->u.ctl.setup = uhci_alloc_std(sc);
2357 1.5 augustss if (upipe->u.ctl.setup == 0) {
2358 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2359 1.5 augustss goto bad;
2360 1.5 augustss }
2361 1.1 augustss upipe->u.ctl.stat = uhci_alloc_std(sc);
2362 1.5 augustss if (upipe->u.ctl.stat == 0) {
2363 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2364 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2365 1.5 augustss goto bad;
2366 1.5 augustss }
2367 1.50 augustss r = usb_allocmem(&sc->sc_bus,
2368 1.7 augustss sizeof(usb_device_request_t),
2369 1.7 augustss 0, &upipe->u.ctl.reqdma);
2370 1.5 augustss if (r != USBD_NORMAL_COMPLETION) {
2371 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2372 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2373 1.5 augustss uhci_free_std(sc, upipe->u.ctl.stat);
2374 1.5 augustss goto bad;
2375 1.5 augustss }
2376 1.1 augustss break;
2377 1.1 augustss case UE_INTERRUPT:
2378 1.1 augustss pipe->methods = &uhci_device_intr_methods;
2379 1.1 augustss return (uhci_device_setintr(sc, upipe, ed->bInterval));
2380 1.1 augustss case UE_ISOCHRONOUS:
2381 1.16 augustss pipe->methods = &uhci_device_isoc_methods;
2382 1.48 augustss return (uhci_setup_isoc(pipe));
2383 1.1 augustss case UE_BULK:
2384 1.1 augustss pipe->methods = &uhci_device_bulk_methods;
2385 1.1 augustss upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2386 1.1 augustss if (upipe->u.bulk.sqh == 0)
2387 1.5 augustss goto bad;
2388 1.1 augustss break;
2389 1.1 augustss }
2390 1.1 augustss }
2391 1.1 augustss return (USBD_NORMAL_COMPLETION);
2392 1.5 augustss
2393 1.5 augustss bad:
2394 1.5 augustss uhci_free_intr_info(upipe->iinfo);
2395 1.5 augustss return (USBD_NOMEM);
2396 1.1 augustss }
2397 1.1 augustss
2398 1.1 augustss /*
2399 1.1 augustss * Data structures and routines to emulate the root hub.
2400 1.1 augustss */
2401 1.1 augustss usb_device_descriptor_t uhci_devd = {
2402 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2403 1.1 augustss UDESC_DEVICE, /* type */
2404 1.1 augustss {0x00, 0x01}, /* USB version */
2405 1.1 augustss UCLASS_HUB, /* class */
2406 1.1 augustss USUBCLASS_HUB, /* subclass */
2407 1.1 augustss 0, /* protocol */
2408 1.1 augustss 64, /* max packet */
2409 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2410 1.1 augustss 1,2,0, /* string indicies */
2411 1.1 augustss 1 /* # of configurations */
2412 1.1 augustss };
2413 1.1 augustss
2414 1.1 augustss usb_config_descriptor_t uhci_confd = {
2415 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2416 1.1 augustss UDESC_CONFIG,
2417 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2418 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2419 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2420 1.1 augustss 1,
2421 1.1 augustss 1,
2422 1.1 augustss 0,
2423 1.1 augustss UC_SELF_POWERED,
2424 1.1 augustss 0 /* max power */
2425 1.1 augustss };
2426 1.1 augustss
2427 1.1 augustss usb_interface_descriptor_t uhci_ifcd = {
2428 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2429 1.1 augustss UDESC_INTERFACE,
2430 1.1 augustss 0,
2431 1.1 augustss 0,
2432 1.1 augustss 1,
2433 1.1 augustss UCLASS_HUB,
2434 1.1 augustss USUBCLASS_HUB,
2435 1.1 augustss 0,
2436 1.1 augustss 0
2437 1.1 augustss };
2438 1.1 augustss
2439 1.1 augustss usb_endpoint_descriptor_t uhci_endpd = {
2440 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
2441 1.1 augustss UDESC_ENDPOINT,
2442 1.45 augustss UE_DIR_IN | UHCI_INTR_ENDPT,
2443 1.1 augustss UE_INTERRUPT,
2444 1.1 augustss {8},
2445 1.1 augustss 255
2446 1.1 augustss };
2447 1.1 augustss
2448 1.1 augustss usb_hub_descriptor_t uhci_hubd_piix = {
2449 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
2450 1.1 augustss UDESC_HUB,
2451 1.1 augustss 2,
2452 1.1 augustss { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2453 1.1 augustss 50, /* power on to power good */
2454 1.1 augustss 0,
2455 1.1 augustss { 0x00 }, /* both ports are removable */
2456 1.1 augustss };
2457 1.1 augustss
2458 1.1 augustss int
2459 1.1 augustss uhci_str(p, l, s)
2460 1.1 augustss usb_string_descriptor_t *p;
2461 1.1 augustss int l;
2462 1.1 augustss char *s;
2463 1.1 augustss {
2464 1.1 augustss int i;
2465 1.1 augustss
2466 1.1 augustss if (l == 0)
2467 1.1 augustss return (0);
2468 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2469 1.1 augustss if (l == 1)
2470 1.1 augustss return (1);
2471 1.1 augustss p->bDescriptorType = UDESC_STRING;
2472 1.1 augustss l -= 2;
2473 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2474 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2475 1.1 augustss return (2*i+2);
2476 1.1 augustss }
2477 1.1 augustss
2478 1.1 augustss /*
2479 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2480 1.1 augustss */
2481 1.1 augustss usbd_status
2482 1.1 augustss uhci_root_ctrl_transfer(reqh)
2483 1.1 augustss usbd_request_handle reqh;
2484 1.1 augustss {
2485 1.16 augustss usbd_status r;
2486 1.16 augustss
2487 1.52 augustss /* Insert last in queue. */
2488 1.16 augustss r = usb_insert_transfer(reqh);
2489 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
2490 1.16 augustss return (r);
2491 1.52 augustss
2492 1.52 augustss /* Pipe isn't running, start first */
2493 1.52 augustss return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2494 1.16 augustss }
2495 1.16 augustss
2496 1.16 augustss usbd_status
2497 1.16 augustss uhci_root_ctrl_start(reqh)
2498 1.16 augustss usbd_request_handle reqh;
2499 1.16 augustss {
2500 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
2501 1.1 augustss usb_device_request_t *req;
2502 1.1 augustss void *buf;
2503 1.1 augustss int port, x;
2504 1.52 augustss int s, len, value, index, status, change, l, totlen = 0;
2505 1.1 augustss usb_port_status_t ps;
2506 1.1 augustss usbd_status r;
2507 1.1 augustss
2508 1.48 augustss #ifdef DIAGNOSTIC
2509 1.48 augustss if (!(reqh->rqflags & URQ_REQUEST))
2510 1.1 augustss panic("uhci_root_ctrl_transfer: not a request\n");
2511 1.48 augustss #endif
2512 1.1 augustss req = &reqh->request;
2513 1.1 augustss
2514 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
2515 1.1 augustss req->bmRequestType, req->bRequest));
2516 1.1 augustss
2517 1.1 augustss len = UGETW(req->wLength);
2518 1.1 augustss value = UGETW(req->wValue);
2519 1.1 augustss index = UGETW(req->wIndex);
2520 1.49 augustss
2521 1.49 augustss if (len != 0)
2522 1.49 augustss buf = KERNADDR(&reqh->dmabuf);
2523 1.49 augustss #ifdef DIAGNOSTIC
2524 1.49 augustss else
2525 1.49 augustss buf = 0;
2526 1.49 augustss #endif
2527 1.49 augustss
2528 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2529 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2530 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2531 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2532 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2533 1.1 augustss /*
2534 1.13 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2535 1.1 augustss * for the integrated root hub.
2536 1.1 augustss */
2537 1.1 augustss break;
2538 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2539 1.1 augustss if (len > 0) {
2540 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2541 1.1 augustss totlen = 1;
2542 1.1 augustss }
2543 1.1 augustss break;
2544 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2545 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
2546 1.1 augustss switch(value >> 8) {
2547 1.1 augustss case UDESC_DEVICE:
2548 1.1 augustss if ((value & 0xff) != 0) {
2549 1.1 augustss r = USBD_IOERROR;
2550 1.1 augustss goto ret;
2551 1.1 augustss }
2552 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2553 1.27 augustss USETW(uhci_devd.idVendor, sc->sc_id_vendor);
2554 1.1 augustss memcpy(buf, &uhci_devd, l);
2555 1.1 augustss break;
2556 1.1 augustss case UDESC_CONFIG:
2557 1.1 augustss if ((value & 0xff) != 0) {
2558 1.1 augustss r = USBD_IOERROR;
2559 1.1 augustss goto ret;
2560 1.1 augustss }
2561 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2562 1.1 augustss memcpy(buf, &uhci_confd, l);
2563 1.1 augustss buf = (char *)buf + l;
2564 1.1 augustss len -= l;
2565 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2566 1.1 augustss totlen += l;
2567 1.1 augustss memcpy(buf, &uhci_ifcd, l);
2568 1.1 augustss buf = (char *)buf + l;
2569 1.1 augustss len -= l;
2570 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2571 1.1 augustss totlen += l;
2572 1.1 augustss memcpy(buf, &uhci_endpd, l);
2573 1.1 augustss break;
2574 1.1 augustss case UDESC_STRING:
2575 1.1 augustss if (len == 0)
2576 1.1 augustss break;
2577 1.1 augustss *(u_int8_t *)buf = 0;
2578 1.1 augustss totlen = 1;
2579 1.1 augustss switch (value & 0xff) {
2580 1.1 augustss case 1: /* Vendor */
2581 1.8 augustss totlen = uhci_str(buf, len, sc->sc_vendor);
2582 1.1 augustss break;
2583 1.1 augustss case 2: /* Product */
2584 1.8 augustss totlen = uhci_str(buf, len, "UHCI root hub");
2585 1.1 augustss break;
2586 1.1 augustss }
2587 1.1 augustss break;
2588 1.1 augustss default:
2589 1.1 augustss r = USBD_IOERROR;
2590 1.1 augustss goto ret;
2591 1.1 augustss }
2592 1.1 augustss break;
2593 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2594 1.1 augustss if (len > 0) {
2595 1.1 augustss *(u_int8_t *)buf = 0;
2596 1.1 augustss totlen = 1;
2597 1.1 augustss }
2598 1.1 augustss break;
2599 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2600 1.1 augustss if (len > 1) {
2601 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2602 1.1 augustss totlen = 2;
2603 1.1 augustss }
2604 1.1 augustss break;
2605 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2606 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2607 1.1 augustss if (len > 1) {
2608 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2609 1.1 augustss totlen = 2;
2610 1.1 augustss }
2611 1.1 augustss break;
2612 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2613 1.1 augustss if (value >= USB_MAX_DEVICES) {
2614 1.1 augustss r = USBD_IOERROR;
2615 1.1 augustss goto ret;
2616 1.1 augustss }
2617 1.1 augustss sc->sc_addr = value;
2618 1.1 augustss break;
2619 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2620 1.1 augustss if (value != 0 && value != 1) {
2621 1.1 augustss r = USBD_IOERROR;
2622 1.1 augustss goto ret;
2623 1.1 augustss }
2624 1.1 augustss sc->sc_conf = value;
2625 1.1 augustss break;
2626 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2627 1.1 augustss break;
2628 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2629 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2630 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2631 1.1 augustss r = USBD_IOERROR;
2632 1.1 augustss goto ret;
2633 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2634 1.1 augustss break;
2635 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2636 1.1 augustss break;
2637 1.1 augustss /* Hub requests */
2638 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2639 1.1 augustss break;
2640 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2641 1.12 augustss DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2642 1.12 augustss "port=%d feature=%d\n",
2643 1.1 augustss index, value));
2644 1.1 augustss if (index == 1)
2645 1.1 augustss port = UHCI_PORTSC1;
2646 1.1 augustss else if (index == 2)
2647 1.1 augustss port = UHCI_PORTSC2;
2648 1.1 augustss else {
2649 1.1 augustss r = USBD_IOERROR;
2650 1.1 augustss goto ret;
2651 1.1 augustss }
2652 1.1 augustss switch(value) {
2653 1.1 augustss case UHF_PORT_ENABLE:
2654 1.1 augustss x = UREAD2(sc, port);
2655 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
2656 1.1 augustss break;
2657 1.1 augustss case UHF_PORT_SUSPEND:
2658 1.1 augustss x = UREAD2(sc, port);
2659 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
2660 1.1 augustss break;
2661 1.1 augustss case UHF_PORT_RESET:
2662 1.1 augustss x = UREAD2(sc, port);
2663 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2664 1.1 augustss break;
2665 1.1 augustss case UHF_C_PORT_CONNECTION:
2666 1.1 augustss x = UREAD2(sc, port);
2667 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
2668 1.1 augustss break;
2669 1.1 augustss case UHF_C_PORT_ENABLE:
2670 1.1 augustss x = UREAD2(sc, port);
2671 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
2672 1.1 augustss break;
2673 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2674 1.1 augustss x = UREAD2(sc, port);
2675 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
2676 1.1 augustss break;
2677 1.1 augustss case UHF_C_PORT_RESET:
2678 1.1 augustss sc->sc_isreset = 0;
2679 1.1 augustss r = USBD_NORMAL_COMPLETION;
2680 1.1 augustss goto ret;
2681 1.1 augustss case UHF_PORT_CONNECTION:
2682 1.1 augustss case UHF_PORT_OVER_CURRENT:
2683 1.1 augustss case UHF_PORT_POWER:
2684 1.1 augustss case UHF_PORT_LOW_SPEED:
2685 1.1 augustss case UHF_C_PORT_SUSPEND:
2686 1.1 augustss default:
2687 1.1 augustss r = USBD_IOERROR;
2688 1.1 augustss goto ret;
2689 1.1 augustss }
2690 1.1 augustss break;
2691 1.1 augustss case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
2692 1.1 augustss if (index == 1)
2693 1.1 augustss port = UHCI_PORTSC1;
2694 1.1 augustss else if (index == 2)
2695 1.1 augustss port = UHCI_PORTSC2;
2696 1.1 augustss else {
2697 1.1 augustss r = USBD_IOERROR;
2698 1.1 augustss goto ret;
2699 1.1 augustss }
2700 1.1 augustss if (len > 0) {
2701 1.1 augustss *(u_int8_t *)buf =
2702 1.1 augustss (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
2703 1.1 augustss UHCI_PORTSC_LS_SHIFT;
2704 1.1 augustss totlen = 1;
2705 1.1 augustss }
2706 1.1 augustss break;
2707 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2708 1.1 augustss if (value != 0) {
2709 1.1 augustss r = USBD_IOERROR;
2710 1.1 augustss goto ret;
2711 1.1 augustss }
2712 1.1 augustss l = min(len, USB_HUB_DESCRIPTOR_SIZE);
2713 1.1 augustss totlen = l;
2714 1.1 augustss memcpy(buf, &uhci_hubd_piix, l);
2715 1.1 augustss break;
2716 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2717 1.1 augustss if (len != 4) {
2718 1.1 augustss r = USBD_IOERROR;
2719 1.1 augustss goto ret;
2720 1.1 augustss }
2721 1.1 augustss memset(buf, 0, len);
2722 1.1 augustss totlen = len;
2723 1.1 augustss break;
2724 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2725 1.1 augustss if (index == 1)
2726 1.1 augustss port = UHCI_PORTSC1;
2727 1.1 augustss else if (index == 2)
2728 1.1 augustss port = UHCI_PORTSC2;
2729 1.1 augustss else {
2730 1.1 augustss r = USBD_IOERROR;
2731 1.1 augustss goto ret;
2732 1.1 augustss }
2733 1.1 augustss if (len != 4) {
2734 1.1 augustss r = USBD_IOERROR;
2735 1.1 augustss goto ret;
2736 1.1 augustss }
2737 1.1 augustss x = UREAD2(sc, port);
2738 1.1 augustss status = change = 0;
2739 1.1 augustss if (x & UHCI_PORTSC_CCS )
2740 1.1 augustss status |= UPS_CURRENT_CONNECT_STATUS;
2741 1.1 augustss if (x & UHCI_PORTSC_CSC )
2742 1.1 augustss change |= UPS_C_CONNECT_STATUS;
2743 1.1 augustss if (x & UHCI_PORTSC_PE )
2744 1.1 augustss status |= UPS_PORT_ENABLED;
2745 1.1 augustss if (x & UHCI_PORTSC_POEDC)
2746 1.1 augustss change |= UPS_C_PORT_ENABLED;
2747 1.1 augustss if (x & UHCI_PORTSC_OCI )
2748 1.1 augustss status |= UPS_OVERCURRENT_INDICATOR;
2749 1.1 augustss if (x & UHCI_PORTSC_OCIC )
2750 1.1 augustss change |= UPS_C_OVERCURRENT_INDICATOR;
2751 1.1 augustss if (x & UHCI_PORTSC_SUSP )
2752 1.1 augustss status |= UPS_SUSPEND;
2753 1.1 augustss if (x & UHCI_PORTSC_LSDA )
2754 1.1 augustss status |= UPS_LOW_SPEED;
2755 1.1 augustss status |= UPS_PORT_POWER;
2756 1.1 augustss if (sc->sc_isreset)
2757 1.1 augustss change |= UPS_C_PORT_RESET;
2758 1.1 augustss USETW(ps.wPortStatus, status);
2759 1.1 augustss USETW(ps.wPortChange, change);
2760 1.1 augustss l = min(len, sizeof ps);
2761 1.1 augustss memcpy(buf, &ps, l);
2762 1.1 augustss totlen = l;
2763 1.1 augustss break;
2764 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2765 1.1 augustss r = USBD_IOERROR;
2766 1.1 augustss goto ret;
2767 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2768 1.1 augustss break;
2769 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2770 1.1 augustss if (index == 1)
2771 1.1 augustss port = UHCI_PORTSC1;
2772 1.1 augustss else if (index == 2)
2773 1.1 augustss port = UHCI_PORTSC2;
2774 1.1 augustss else {
2775 1.1 augustss r = USBD_IOERROR;
2776 1.1 augustss goto ret;
2777 1.1 augustss }
2778 1.1 augustss switch(value) {
2779 1.1 augustss case UHF_PORT_ENABLE:
2780 1.1 augustss x = UREAD2(sc, port);
2781 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2782 1.1 augustss break;
2783 1.1 augustss case UHF_PORT_SUSPEND:
2784 1.1 augustss x = UREAD2(sc, port);
2785 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
2786 1.1 augustss break;
2787 1.1 augustss case UHF_PORT_RESET:
2788 1.1 augustss x = UREAD2(sc, port);
2789 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2790 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
2791 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2792 1.1 augustss delay(100);
2793 1.1 augustss x = UREAD2(sc, port);
2794 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2795 1.1 augustss delay(100);
2796 1.1 augustss DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
2797 1.1 augustss index, UREAD2(sc, port)));
2798 1.1 augustss sc->sc_isreset = 1;
2799 1.1 augustss break;
2800 1.1 augustss case UHF_C_PORT_CONNECTION:
2801 1.1 augustss case UHF_C_PORT_ENABLE:
2802 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2803 1.1 augustss case UHF_PORT_CONNECTION:
2804 1.1 augustss case UHF_PORT_OVER_CURRENT:
2805 1.1 augustss case UHF_PORT_POWER:
2806 1.1 augustss case UHF_PORT_LOW_SPEED:
2807 1.1 augustss case UHF_C_PORT_SUSPEND:
2808 1.1 augustss case UHF_C_PORT_RESET:
2809 1.1 augustss default:
2810 1.1 augustss r = USBD_IOERROR;
2811 1.1 augustss goto ret;
2812 1.1 augustss }
2813 1.1 augustss break;
2814 1.1 augustss default:
2815 1.1 augustss r = USBD_IOERROR;
2816 1.1 augustss goto ret;
2817 1.1 augustss }
2818 1.1 augustss reqh->actlen = totlen;
2819 1.1 augustss r = USBD_NORMAL_COMPLETION;
2820 1.1 augustss ret:
2821 1.1 augustss reqh->status = r;
2822 1.41 augustss reqh->hcpriv = 0;
2823 1.52 augustss s = splusb();
2824 1.41 augustss usb_transfer_complete(reqh);
2825 1.52 augustss splx(s);
2826 1.1 augustss return (USBD_IN_PROGRESS);
2827 1.1 augustss }
2828 1.1 augustss
2829 1.1 augustss /* Abort a root control request. */
2830 1.1 augustss void
2831 1.1 augustss uhci_root_ctrl_abort(reqh)
2832 1.1 augustss usbd_request_handle reqh;
2833 1.1 augustss {
2834 1.6 augustss /* Nothing to do, all transfers are syncronous. */
2835 1.1 augustss }
2836 1.1 augustss
2837 1.1 augustss /* Close the root pipe. */
2838 1.1 augustss void
2839 1.1 augustss uhci_root_ctrl_close(pipe)
2840 1.1 augustss usbd_pipe_handle pipe;
2841 1.1 augustss {
2842 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2843 1.30 augustss
2844 1.30 augustss sc->sc_has_timo = 0;
2845 1.1 augustss DPRINTF(("uhci_root_ctrl_close\n"));
2846 1.1 augustss }
2847 1.1 augustss
2848 1.1 augustss /* Abort a root interrupt request. */
2849 1.1 augustss void
2850 1.1 augustss uhci_root_intr_abort(reqh)
2851 1.1 augustss usbd_request_handle reqh;
2852 1.1 augustss {
2853 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
2854 1.30 augustss
2855 1.13 augustss usb_untimeout(uhci_timo, reqh, reqh->timo_handle);
2856 1.30 augustss sc->sc_has_timo = 0;
2857 1.1 augustss }
2858 1.1 augustss
2859 1.16 augustss usbd_status
2860 1.16 augustss uhci_root_intr_transfer(reqh)
2861 1.16 augustss usbd_request_handle reqh;
2862 1.16 augustss {
2863 1.16 augustss usbd_status r;
2864 1.16 augustss
2865 1.52 augustss /* Insert last in queue. */
2866 1.16 augustss r = usb_insert_transfer(reqh);
2867 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
2868 1.16 augustss return (r);
2869 1.52 augustss
2870 1.52 augustss /* Pipe isn't running, start first */
2871 1.52 augustss return (uhci_root_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2872 1.16 augustss }
2873 1.16 augustss
2874 1.1 augustss /* Start a transfer on the root interrupt pipe */
2875 1.1 augustss usbd_status
2876 1.16 augustss uhci_root_intr_start(reqh)
2877 1.1 augustss usbd_request_handle reqh;
2878 1.1 augustss {
2879 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
2880 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2881 1.1 augustss
2882 1.49 augustss DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p len=%d flags=%d\n",
2883 1.49 augustss reqh, reqh->length, reqh->flags));
2884 1.1 augustss
2885 1.1 augustss sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval);
2886 1.13 augustss usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
2887 1.30 augustss sc->sc_has_timo = reqh;
2888 1.1 augustss return (USBD_IN_PROGRESS);
2889 1.1 augustss }
2890 1.1 augustss
2891 1.1 augustss /* Close the root interrupt pipe. */
2892 1.1 augustss void
2893 1.1 augustss uhci_root_intr_close(pipe)
2894 1.1 augustss usbd_pipe_handle pipe;
2895 1.1 augustss {
2896 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2897 1.30 augustss
2898 1.13 augustss usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle);
2899 1.30 augustss sc->sc_has_timo = 0;
2900 1.1 augustss DPRINTF(("uhci_root_intr_close\n"));
2901 1.1 augustss }
2902 1.26 augustss
2903