uhci.c revision 1.56.2.1 1 1.56.2.1 wrstuden /* $NetBSD: uhci.c,v 1.56.2.1 1999/12/27 18:35:42 wrstuden Exp $ */
2 1.56.2.1 wrstuden /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss * 3. All advertising materials mentioning features or use of this software
21 1.1 augustss * must display the following acknowledgement:
22 1.1 augustss * This product includes software developed by the NetBSD
23 1.1 augustss * Foundation, Inc. and its contributors.
24 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 augustss * contributors may be used to endorse or promote products derived
26 1.1 augustss * from this software without specific prior written permission.
27 1.1 augustss *
28 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
39 1.1 augustss */
40 1.1 augustss
41 1.1 augustss /*
42 1.1 augustss * USB Universal Host Controller driver.
43 1.28 augustss * Handles e.g. PIIX3 and PIIX4.
44 1.1 augustss *
45 1.1 augustss * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
46 1.1 augustss * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
47 1.1 augustss * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf
48 1.28 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
49 1.1 augustss */
50 1.1 augustss
51 1.1 augustss #include <sys/param.h>
52 1.1 augustss #include <sys/systm.h>
53 1.1 augustss #include <sys/kernel.h>
54 1.1 augustss #include <sys/malloc.h>
55 1.37 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
56 1.1 augustss #include <sys/device.h>
57 1.56.2.1 wrstuden #include <sys/select.h>
58 1.13 augustss #elif defined(__FreeBSD__)
59 1.13 augustss #include <sys/module.h>
60 1.13 augustss #include <sys/bus.h>
61 1.56.2.1 wrstuden #include <machine/bus_pio.h>
62 1.56.2.1 wrstuden #if defined(DIAGNOSTIC) && defined(__i386__)
63 1.56.2.1 wrstuden #include <machine/cpu.h>
64 1.56.2.1 wrstuden #endif
65 1.13 augustss #endif
66 1.1 augustss #include <sys/proc.h>
67 1.1 augustss #include <sys/queue.h>
68 1.1 augustss
69 1.7 augustss #include <machine/bus.h>
70 1.39 augustss #include <machine/endian.h>
71 1.7 augustss
72 1.1 augustss #include <dev/usb/usb.h>
73 1.1 augustss #include <dev/usb/usbdi.h>
74 1.1 augustss #include <dev/usb/usbdivar.h>
75 1.7 augustss #include <dev/usb/usb_mem.h>
76 1.1 augustss #include <dev/usb/usb_quirks.h>
77 1.1 augustss
78 1.1 augustss #include <dev/usb/uhcireg.h>
79 1.1 augustss #include <dev/usb/uhcivar.h>
80 1.1 augustss
81 1.13 augustss #if defined(__FreeBSD__)
82 1.13 augustss #include <machine/clock.h>
83 1.13 augustss
84 1.13 augustss #define delay(d) DELAY(d)
85 1.13 augustss #endif
86 1.13 augustss
87 1.1 augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
88 1.1 augustss
89 1.37 augustss #if defined(__OpenBSD__)
90 1.37 augustss struct cfdriver uhci_cd = {
91 1.37 augustss NULL, "uhci", DV_DULL
92 1.37 augustss };
93 1.37 augustss #endif
94 1.37 augustss
95 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
96 1.56.2.1 wrstuden #define DPRINTF(x) if (uhcidebug) printf x
97 1.56.2.1 wrstuden #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
98 1.56.2.1 wrstuden int uhcidebug = 0;
99 1.56.2.1 wrstuden #else
100 1.56.2.1 wrstuden #define DPRINTF(x)
101 1.56.2.1 wrstuden #define DPRINTFN(n,x)
102 1.56.2.1 wrstuden #endif
103 1.56.2.1 wrstuden
104 1.39 augustss /*
105 1.39 augustss * The UHCI controller is little endian, so on big endian machines
106 1.39 augustss * the data strored in memory needs to be swapped.
107 1.39 augustss */
108 1.39 augustss #if BYTE_ORDER == BIG_ENDIAN
109 1.39 augustss #define LE(x) (bswap32(x))
110 1.39 augustss #else
111 1.39 augustss #define LE(x) (x)
112 1.39 augustss #endif
113 1.39 augustss
114 1.1 augustss struct uhci_pipe {
115 1.1 augustss struct usbd_pipe pipe;
116 1.1 augustss uhci_intr_info_t *iinfo;
117 1.32 augustss int nexttoggle;
118 1.1 augustss /* Info needed for different pipe kinds. */
119 1.1 augustss union {
120 1.1 augustss /* Control pipe */
121 1.1 augustss struct {
122 1.1 augustss uhci_soft_qh_t *sqh;
123 1.7 augustss usb_dma_t reqdma;
124 1.16 augustss uhci_soft_td_t *setup, *stat;
125 1.1 augustss u_int length;
126 1.1 augustss } ctl;
127 1.1 augustss /* Interrupt pipe */
128 1.1 augustss struct {
129 1.1 augustss int npoll;
130 1.1 augustss uhci_soft_qh_t **qhs;
131 1.1 augustss } intr;
132 1.1 augustss /* Bulk pipe */
133 1.1 augustss struct {
134 1.1 augustss uhci_soft_qh_t *sqh;
135 1.1 augustss u_int length;
136 1.1 augustss int isread;
137 1.1 augustss } bulk;
138 1.16 augustss /* Iso pipe */
139 1.16 augustss struct iso {
140 1.16 augustss uhci_soft_td_t **stds;
141 1.48 augustss int next, inuse;
142 1.16 augustss } iso;
143 1.1 augustss } u;
144 1.1 augustss };
145 1.1 augustss
146 1.1 augustss /*
147 1.1 augustss * The uhci_intr_info free list can be global since they contain
148 1.1 augustss * no dma specific data. The other free lists do.
149 1.1 augustss */
150 1.1 augustss LIST_HEAD(, uhci_intr_info) uhci_ii_free;
151 1.1 augustss
152 1.56.2.1 wrstuden static void uhci_busreset __P((uhci_softc_t *));
153 1.56.2.1 wrstuden #if defined(__NetBSD__) || defined(__OpenBSD__)
154 1.56.2.1 wrstuden static void uhci_power __P((int, void *));
155 1.56.2.1 wrstuden #endif
156 1.56.2.1 wrstuden static usbd_status uhci_run __P((uhci_softc_t *, int run));
157 1.56.2.1 wrstuden static uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *));
158 1.56.2.1 wrstuden static void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *));
159 1.56.2.1 wrstuden static uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *));
160 1.56.2.1 wrstuden static void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *));
161 1.56.2.1 wrstuden static uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *));
162 1.56.2.1 wrstuden static void uhci_free_intr_info __P((uhci_intr_info_t *ii));
163 1.16 augustss #if 0
164 1.56.2.1 wrstuden static void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *,
165 1.1 augustss uhci_intr_info_t *));
166 1.56.2.1 wrstuden static void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *));
167 1.16 augustss #endif
168 1.1 augustss
169 1.56.2.1 wrstuden static void uhci_free_std_chain __P((uhci_softc_t *,
170 1.1 augustss uhci_soft_td_t *, uhci_soft_td_t *));
171 1.56.2.1 wrstuden static usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *,
172 1.56.2.1 wrstuden uhci_softc_t *, int, int, int, usb_dma_t *,
173 1.56.2.1 wrstuden uhci_soft_td_t **, uhci_soft_td_t **));
174 1.56.2.1 wrstuden static void uhci_timo __P((void *));
175 1.56.2.1 wrstuden static void uhci_waitintr __P((uhci_softc_t *,
176 1.56.2.1 wrstuden usbd_xfer_handle));
177 1.56.2.1 wrstuden static void uhci_check_intr __P((uhci_softc_t *,
178 1.56.2.1 wrstuden uhci_intr_info_t *));
179 1.56.2.1 wrstuden static void uhci_idone __P((uhci_intr_info_t *));
180 1.56.2.1 wrstuden static void uhci_abort_xfer __P((usbd_xfer_handle,
181 1.56.2.1 wrstuden usbd_status status));
182 1.56.2.1 wrstuden static void uhci_abort_xfer_end __P((void *v));
183 1.56.2.1 wrstuden static void uhci_timeout __P((void *));
184 1.56.2.1 wrstuden static void uhci_lock_frames __P((uhci_softc_t *));
185 1.56.2.1 wrstuden static void uhci_unlock_frames __P((uhci_softc_t *));
186 1.56.2.1 wrstuden static void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
187 1.56.2.1 wrstuden static void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
188 1.56.2.1 wrstuden static void uhci_remove_ctrl __P((uhci_softc_t *,uhci_soft_qh_t *));
189 1.56.2.1 wrstuden static void uhci_remove_bulk __P((uhci_softc_t *,uhci_soft_qh_t *));
190 1.56.2.1 wrstuden static int uhci_str __P((usb_string_descriptor_t *, int, char *));
191 1.56.2.1 wrstuden
192 1.56.2.1 wrstuden static usbd_status uhci_setup_isoc __P((usbd_pipe_handle pipe));
193 1.56.2.1 wrstuden static void uhci_device_isoc_enter __P((usbd_xfer_handle));
194 1.56.2.1 wrstuden
195 1.56.2.1 wrstuden static usbd_status uhci_allocm __P((struct usbd_bus *, usb_dma_t *,
196 1.56.2.1 wrstuden u_int32_t));
197 1.56.2.1 wrstuden static void uhci_freem __P((struct usbd_bus *, usb_dma_t *));
198 1.56.2.1 wrstuden
199 1.56.2.1 wrstuden static usbd_status uhci_device_ctrl_transfer __P((usbd_xfer_handle));
200 1.56.2.1 wrstuden static usbd_status uhci_device_ctrl_start __P((usbd_xfer_handle));
201 1.56.2.1 wrstuden static void uhci_device_ctrl_abort __P((usbd_xfer_handle));
202 1.56.2.1 wrstuden static void uhci_device_ctrl_close __P((usbd_pipe_handle));
203 1.56.2.1 wrstuden static void uhci_device_ctrl_done __P((usbd_xfer_handle));
204 1.56.2.1 wrstuden
205 1.56.2.1 wrstuden static usbd_status uhci_device_intr_transfer __P((usbd_xfer_handle));
206 1.56.2.1 wrstuden static usbd_status uhci_device_intr_start __P((usbd_xfer_handle));
207 1.56.2.1 wrstuden static void uhci_device_intr_abort __P((usbd_xfer_handle));
208 1.56.2.1 wrstuden static void uhci_device_intr_close __P((usbd_pipe_handle));
209 1.56.2.1 wrstuden static void uhci_device_intr_done __P((usbd_xfer_handle));
210 1.56.2.1 wrstuden
211 1.56.2.1 wrstuden static usbd_status uhci_device_bulk_transfer __P((usbd_xfer_handle));
212 1.56.2.1 wrstuden static usbd_status uhci_device_bulk_start __P((usbd_xfer_handle));
213 1.56.2.1 wrstuden static void uhci_device_bulk_abort __P((usbd_xfer_handle));
214 1.56.2.1 wrstuden static void uhci_device_bulk_close __P((usbd_pipe_handle));
215 1.56.2.1 wrstuden static void uhci_device_bulk_done __P((usbd_xfer_handle));
216 1.56.2.1 wrstuden
217 1.56.2.1 wrstuden static usbd_status uhci_device_isoc_transfer __P((usbd_xfer_handle));
218 1.56.2.1 wrstuden static usbd_status uhci_device_isoc_start __P((usbd_xfer_handle));
219 1.56.2.1 wrstuden static void uhci_device_isoc_abort __P((usbd_xfer_handle));
220 1.56.2.1 wrstuden static void uhci_device_isoc_close __P((usbd_pipe_handle));
221 1.56.2.1 wrstuden static void uhci_device_isoc_done __P((usbd_xfer_handle));
222 1.56.2.1 wrstuden
223 1.56.2.1 wrstuden static usbd_status uhci_root_ctrl_transfer __P((usbd_xfer_handle));
224 1.56.2.1 wrstuden static usbd_status uhci_root_ctrl_start __P((usbd_xfer_handle));
225 1.56.2.1 wrstuden static void uhci_root_ctrl_abort __P((usbd_xfer_handle));
226 1.56.2.1 wrstuden static void uhci_root_ctrl_close __P((usbd_pipe_handle));
227 1.56.2.1 wrstuden
228 1.56.2.1 wrstuden static usbd_status uhci_root_intr_transfer __P((usbd_xfer_handle));
229 1.56.2.1 wrstuden static usbd_status uhci_root_intr_start __P((usbd_xfer_handle));
230 1.56.2.1 wrstuden static void uhci_root_intr_abort __P((usbd_xfer_handle));
231 1.56.2.1 wrstuden static void uhci_root_intr_close __P((usbd_pipe_handle));
232 1.56.2.1 wrstuden static void uhci_root_intr_done __P((usbd_xfer_handle));
233 1.56.2.1 wrstuden
234 1.56.2.1 wrstuden static usbd_status uhci_open __P((usbd_pipe_handle));
235 1.56.2.1 wrstuden static void uhci_poll __P((struct usbd_bus *));
236 1.56.2.1 wrstuden
237 1.56.2.1 wrstuden static usbd_status uhci_device_request __P((usbd_xfer_handle xfer));
238 1.56.2.1 wrstuden
239 1.56.2.1 wrstuden static void uhci_add_intr __P((uhci_softc_t *, int,
240 1.56.2.1 wrstuden uhci_soft_qh_t *));
241 1.56.2.1 wrstuden static void uhci_remove_intr __P((uhci_softc_t *, int,
242 1.56.2.1 wrstuden uhci_soft_qh_t *));
243 1.56.2.1 wrstuden static usbd_status uhci_device_setintr __P((uhci_softc_t *sc,
244 1.56.2.1 wrstuden struct uhci_pipe *pipe, int ival));
245 1.56.2.1 wrstuden
246 1.56.2.1 wrstuden static void uhci_device_clear_toggle __P((usbd_pipe_handle pipe));
247 1.56.2.1 wrstuden static void uhci_noop __P((usbd_pipe_handle pipe));
248 1.56.2.1 wrstuden
249 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
250 1.56.2.1 wrstuden static void uhci_dumpregs __P((uhci_softc_t *));
251 1.56.2.1 wrstuden static void uhci_dump_qhs __P((uhci_soft_qh_t *));
252 1.56.2.1 wrstuden static void uhci_dump_qh __P((uhci_soft_qh_t *));
253 1.56.2.1 wrstuden static void uhci_dump_tds __P((uhci_soft_td_t *));
254 1.56.2.1 wrstuden static void uhci_dump_td __P((uhci_soft_td_t *));
255 1.1 augustss #endif
256 1.1 augustss
257 1.1 augustss #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
258 1.1 augustss #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
259 1.35 augustss #define UREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r))
260 1.1 augustss #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
261 1.1 augustss #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
262 1.1 augustss
263 1.1 augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
264 1.1 augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
265 1.1 augustss
266 1.1 augustss #define UHCI_RESET_TIMEOUT 100 /* reset timeout */
267 1.1 augustss
268 1.1 augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
269 1.1 augustss
270 1.1 augustss #define UHCI_INTR_ENDPT 1
271 1.1 augustss
272 1.48 augustss struct usbd_bus_methods uhci_bus_methods = {
273 1.48 augustss uhci_open,
274 1.48 augustss uhci_poll,
275 1.48 augustss uhci_allocm,
276 1.48 augustss uhci_freem,
277 1.48 augustss };
278 1.48 augustss
279 1.48 augustss struct usbd_pipe_methods uhci_root_ctrl_methods = {
280 1.1 augustss uhci_root_ctrl_transfer,
281 1.16 augustss uhci_root_ctrl_start,
282 1.1 augustss uhci_root_ctrl_abort,
283 1.1 augustss uhci_root_ctrl_close,
284 1.38 augustss uhci_noop,
285 1.10 augustss 0,
286 1.1 augustss };
287 1.1 augustss
288 1.48 augustss struct usbd_pipe_methods uhci_root_intr_methods = {
289 1.1 augustss uhci_root_intr_transfer,
290 1.16 augustss uhci_root_intr_start,
291 1.1 augustss uhci_root_intr_abort,
292 1.1 augustss uhci_root_intr_close,
293 1.38 augustss uhci_noop,
294 1.41 augustss uhci_root_intr_done,
295 1.1 augustss };
296 1.1 augustss
297 1.48 augustss struct usbd_pipe_methods uhci_device_ctrl_methods = {
298 1.1 augustss uhci_device_ctrl_transfer,
299 1.16 augustss uhci_device_ctrl_start,
300 1.1 augustss uhci_device_ctrl_abort,
301 1.1 augustss uhci_device_ctrl_close,
302 1.38 augustss uhci_noop,
303 1.41 augustss uhci_device_ctrl_done,
304 1.1 augustss };
305 1.1 augustss
306 1.48 augustss struct usbd_pipe_methods uhci_device_intr_methods = {
307 1.1 augustss uhci_device_intr_transfer,
308 1.16 augustss uhci_device_intr_start,
309 1.1 augustss uhci_device_intr_abort,
310 1.1 augustss uhci_device_intr_close,
311 1.38 augustss uhci_device_clear_toggle,
312 1.41 augustss uhci_device_intr_done,
313 1.1 augustss };
314 1.1 augustss
315 1.48 augustss struct usbd_pipe_methods uhci_device_bulk_methods = {
316 1.1 augustss uhci_device_bulk_transfer,
317 1.16 augustss uhci_device_bulk_start,
318 1.1 augustss uhci_device_bulk_abort,
319 1.1 augustss uhci_device_bulk_close,
320 1.38 augustss uhci_device_clear_toggle,
321 1.41 augustss uhci_device_bulk_done,
322 1.1 augustss };
323 1.1 augustss
324 1.48 augustss struct usbd_pipe_methods uhci_device_isoc_methods = {
325 1.16 augustss uhci_device_isoc_transfer,
326 1.16 augustss uhci_device_isoc_start,
327 1.16 augustss uhci_device_isoc_abort,
328 1.16 augustss uhci_device_isoc_close,
329 1.38 augustss uhci_noop,
330 1.41 augustss uhci_device_isoc_done,
331 1.16 augustss };
332 1.16 augustss
333 1.1 augustss void
334 1.1 augustss uhci_busreset(sc)
335 1.1 augustss uhci_softc_t *sc;
336 1.1 augustss {
337 1.1 augustss UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
338 1.20 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
339 1.1 augustss UHCICMD(sc, 0); /* do nothing */
340 1.1 augustss }
341 1.1 augustss
342 1.1 augustss usbd_status
343 1.1 augustss uhci_init(sc)
344 1.1 augustss uhci_softc_t *sc;
345 1.1 augustss {
346 1.56.2.1 wrstuden usbd_status err;
347 1.1 augustss int i, j;
348 1.1 augustss uhci_soft_qh_t *csqh, *bsqh, *sqh;
349 1.1 augustss uhci_soft_td_t *std;
350 1.1 augustss
351 1.1 augustss DPRINTFN(1,("uhci_init: start\n"));
352 1.1 augustss
353 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
354 1.1 augustss if (uhcidebug > 2)
355 1.1 augustss uhci_dumpregs(sc);
356 1.1 augustss #endif
357 1.1 augustss
358 1.1 augustss uhci_run(sc, 0); /* stop the controller */
359 1.1 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
360 1.1 augustss
361 1.24 augustss uhci_busreset(sc);
362 1.24 augustss
363 1.1 augustss /* Allocate and initialize real frame array. */
364 1.56.2.1 wrstuden err = usb_allocmem(&sc->sc_bus,
365 1.56.2.1 wrstuden UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
366 1.56.2.1 wrstuden UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
367 1.56.2.1 wrstuden if (err)
368 1.56.2.1 wrstuden return (err);
369 1.30 augustss sc->sc_pframes = KERNADDR(&sc->sc_dma);
370 1.1 augustss UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
371 1.36 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma)); /* set frame list*/
372 1.1 augustss
373 1.1 augustss /* Allocate the dummy QH where bulk traffic will be queued. */
374 1.1 augustss bsqh = uhci_alloc_sqh(sc);
375 1.56.2.1 wrstuden if (bsqh == NULL)
376 1.1 augustss return (USBD_NOMEM);
377 1.42 augustss bsqh->qh.qh_hlink = LE(UHCI_PTR_T); /* end of QH chain */
378 1.42 augustss bsqh->qh.qh_elink = LE(UHCI_PTR_T);
379 1.1 augustss sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
380 1.1 augustss
381 1.1 augustss /* Allocate the dummy QH where control traffic will be queued. */
382 1.1 augustss csqh = uhci_alloc_sqh(sc);
383 1.56.2.1 wrstuden if (csqh == NULL)
384 1.1 augustss return (USBD_NOMEM);
385 1.42 augustss csqh->hlink = bsqh;
386 1.42 augustss csqh->qh.qh_hlink = LE(bsqh->physaddr | UHCI_PTR_Q);
387 1.42 augustss csqh->qh.qh_elink = LE(UHCI_PTR_T);
388 1.1 augustss sc->sc_ctl_start = sc->sc_ctl_end = csqh;
389 1.1 augustss
390 1.1 augustss /*
391 1.1 augustss * Make all (virtual) frame list pointers point to the interrupt
392 1.1 augustss * queue heads and the interrupt queue heads at the control
393 1.1 augustss * queue head and point the physical frame list to the virtual.
394 1.1 augustss */
395 1.1 augustss for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
396 1.1 augustss std = uhci_alloc_std(sc);
397 1.1 augustss sqh = uhci_alloc_sqh(sc);
398 1.56.2.1 wrstuden if (std == NULL || sqh == NULL)
399 1.13 augustss return (USBD_NOMEM);
400 1.42 augustss std->link.sqh = sqh;
401 1.42 augustss std->td.td_link = LE(sqh->physaddr | UHCI_PTR_Q);
402 1.42 augustss std->td.td_status = LE(UHCI_TD_IOS); /* iso, inactive */
403 1.42 augustss std->td.td_token = LE(0);
404 1.42 augustss std->td.td_buffer = LE(0);
405 1.42 augustss sqh->hlink = csqh;
406 1.42 augustss sqh->qh.qh_hlink = LE(csqh->physaddr | UHCI_PTR_Q);
407 1.42 augustss sqh->elink = 0;
408 1.42 augustss sqh->qh.qh_elink = LE(UHCI_PTR_T);
409 1.1 augustss sc->sc_vframes[i].htd = std;
410 1.1 augustss sc->sc_vframes[i].etd = std;
411 1.1 augustss sc->sc_vframes[i].hqh = sqh;
412 1.1 augustss sc->sc_vframes[i].eqh = sqh;
413 1.1 augustss for (j = i;
414 1.1 augustss j < UHCI_FRAMELIST_COUNT;
415 1.1 augustss j += UHCI_VFRAMELIST_COUNT)
416 1.39 augustss sc->sc_pframes[j] = LE(std->physaddr);
417 1.1 augustss }
418 1.1 augustss
419 1.1 augustss LIST_INIT(&sc->sc_intrhead);
420 1.1 augustss
421 1.1 augustss /* Set up the bus struct. */
422 1.48 augustss sc->sc_bus.methods = &uhci_bus_methods;
423 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
424 1.1 augustss
425 1.30 augustss sc->sc_suspend = PWR_RESUME;
426 1.53 augustss sc->sc_powerhook = powerhook_establish(uhci_power, sc);
427 1.30 augustss
428 1.1 augustss DPRINTFN(1,("uhci_init: enabling\n"));
429 1.1 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
430 1.1 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
431 1.1 augustss
432 1.16 augustss return (uhci_run(sc, 1)); /* and here we go... */
433 1.53 augustss }
434 1.53 augustss
435 1.56.2.1 wrstuden #if defined(__NetBSD__) || defined(__OpenBSD__)
436 1.53 augustss int
437 1.53 augustss uhci_activate(self, act)
438 1.53 augustss device_ptr_t self;
439 1.53 augustss enum devact act;
440 1.53 augustss {
441 1.56 augustss struct uhci_softc *sc = (struct uhci_softc *)self;
442 1.53 augustss int rv = 0;
443 1.53 augustss
444 1.53 augustss switch (act) {
445 1.53 augustss case DVACT_ACTIVATE:
446 1.53 augustss return (EOPNOTSUPP);
447 1.53 augustss break;
448 1.53 augustss
449 1.53 augustss case DVACT_DEACTIVATE:
450 1.56 augustss if (sc->sc_child != NULL)
451 1.56 augustss rv = config_deactivate(sc->sc_child);
452 1.53 augustss break;
453 1.53 augustss }
454 1.53 augustss return (rv);
455 1.53 augustss }
456 1.53 augustss
457 1.53 augustss int
458 1.56.2.1 wrstuden uhci_detach(sc, flags)
459 1.56.2.1 wrstuden struct uhci_softc *sc;
460 1.53 augustss int flags;
461 1.53 augustss {
462 1.53 augustss int rv = 0;
463 1.53 augustss
464 1.53 augustss if (sc->sc_child != NULL)
465 1.53 augustss rv = config_detach(sc->sc_child, flags);
466 1.53 augustss
467 1.53 augustss if (rv != 0)
468 1.53 augustss return (rv);
469 1.53 augustss
470 1.53 augustss powerhook_disestablish(sc->sc_powerhook);
471 1.53 augustss /* free data structures XXX */
472 1.53 augustss
473 1.53 augustss return (rv);
474 1.1 augustss }
475 1.56.2.1 wrstuden #endif
476 1.1 augustss
477 1.48 augustss usbd_status
478 1.48 augustss uhci_allocm(bus, dma, size)
479 1.48 augustss struct usbd_bus *bus;
480 1.48 augustss usb_dma_t *dma;
481 1.48 augustss u_int32_t size;
482 1.48 augustss {
483 1.56.2.1 wrstuden return (usb_allocmem(&((struct uhci_softc *)bus)->sc_bus, size, 0,
484 1.56.2.1 wrstuden dma));
485 1.48 augustss }
486 1.48 augustss
487 1.48 augustss void
488 1.48 augustss uhci_freem(bus, dma)
489 1.48 augustss struct usbd_bus *bus;
490 1.48 augustss usb_dma_t *dma;
491 1.48 augustss {
492 1.56.2.1 wrstuden usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
493 1.48 augustss }
494 1.48 augustss
495 1.56.2.1 wrstuden #if defined(__NetBSD__)
496 1.30 augustss /*
497 1.30 augustss * Handle suspend/resume.
498 1.30 augustss *
499 1.40 augustss * We need to switch to polling mode here, because this routine is
500 1.40 augustss * called from an intterupt context. This is all right since we
501 1.40 augustss * are almost suspended anyway.
502 1.30 augustss */
503 1.30 augustss void
504 1.30 augustss uhci_power(why, v)
505 1.30 augustss int why;
506 1.30 augustss void *v;
507 1.30 augustss {
508 1.30 augustss uhci_softc_t *sc = v;
509 1.30 augustss int cmd;
510 1.30 augustss int s;
511 1.30 augustss
512 1.30 augustss s = splusb();
513 1.30 augustss cmd = UREAD2(sc, UHCI_CMD);
514 1.30 augustss
515 1.30 augustss DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
516 1.30 augustss sc, why, sc->sc_suspend, cmd));
517 1.30 augustss
518 1.30 augustss if (why != PWR_RESUME) {
519 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
520 1.30 augustss if (uhcidebug > 2)
521 1.30 augustss uhci_dumpregs(sc);
522 1.30 augustss #endif
523 1.56.2.1 wrstuden if (sc->sc_has_timo != NULL)
524 1.30 augustss usb_untimeout(uhci_timo, sc->sc_has_timo,
525 1.30 augustss sc->sc_has_timo->timo_handle);
526 1.54 augustss sc->sc_bus.use_polling++;
527 1.30 augustss uhci_run(sc, 0); /* stop the controller */
528 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
529 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
530 1.30 augustss sc->sc_suspend = why;
531 1.56.2.1 wrstuden sc->sc_bus.use_polling--;
532 1.30 augustss DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
533 1.30 augustss } else {
534 1.30 augustss /*
535 1.30 augustss * XXX We should really do much more here in case the
536 1.30 augustss * controller registers have been lost and BIOS has
537 1.30 augustss * not restored them.
538 1.30 augustss */
539 1.56.2.1 wrstuden #ifdef DIAGNOSTIC
540 1.56.2.1 wrstuden if (sc->sc_suspend == PWR_RESUME)
541 1.56.2.1 wrstuden printf("uhci_power: weird, resume without suspend.\n");
542 1.56.2.1 wrstuden #endif
543 1.56.2.1 wrstuden sc->sc_bus.use_polling++;
544 1.30 augustss sc->sc_suspend = why;
545 1.30 augustss if (cmd & UHCI_CMD_RS)
546 1.30 augustss uhci_run(sc, 0); /* in case BIOS has started it */
547 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
548 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
549 1.30 augustss UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
550 1.30 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
551 1.30 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
552 1.30 augustss uhci_run(sc, 1); /* and start traffic again */
553 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
554 1.54 augustss sc->sc_bus.use_polling--;
555 1.56.2.1 wrstuden if (sc->sc_has_timo != NULL)
556 1.30 augustss usb_timeout(uhci_timo, sc->sc_has_timo,
557 1.30 augustss sc->sc_ival, sc->sc_has_timo->timo_handle);
558 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
559 1.30 augustss if (uhcidebug > 2)
560 1.30 augustss uhci_dumpregs(sc);
561 1.30 augustss #endif
562 1.30 augustss }
563 1.30 augustss splx(s);
564 1.30 augustss }
565 1.56.2.1 wrstuden #endif /* defined(__NetBSD__) */
566 1.30 augustss
567 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
568 1.1 augustss static void
569 1.1 augustss uhci_dumpregs(sc)
570 1.1 augustss uhci_softc_t *sc;
571 1.1 augustss {
572 1.48 augustss DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
573 1.48 augustss "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
574 1.48 augustss USBDEVNAME(sc->sc_bus.bdev),
575 1.48 augustss UREAD2(sc, UHCI_CMD),
576 1.48 augustss UREAD2(sc, UHCI_STS),
577 1.48 augustss UREAD2(sc, UHCI_INTR),
578 1.48 augustss UREAD2(sc, UHCI_FRNUM),
579 1.48 augustss UREAD4(sc, UHCI_FLBASEADDR),
580 1.48 augustss UREAD1(sc, UHCI_SOF),
581 1.48 augustss UREAD2(sc, UHCI_PORTSC1),
582 1.48 augustss UREAD2(sc, UHCI_PORTSC2)));
583 1.1 augustss }
584 1.1 augustss
585 1.1 augustss void
586 1.1 augustss uhci_dump_td(p)
587 1.1 augustss uhci_soft_td_t *p;
588 1.1 augustss {
589 1.48 augustss DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
590 1.48 augustss "token=0x%08lx buffer=0x%08lx\n",
591 1.48 augustss p, (long)p->physaddr,
592 1.48 augustss (long)LE(p->td.td_link),
593 1.48 augustss (long)LE(p->td.td_status),
594 1.48 augustss (long)LE(p->td.td_token),
595 1.48 augustss (long)LE(p->td.td_buffer)));
596 1.48 augustss DPRINTFN(-1,(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
597 1.48 augustss "D=%d,maxlen=%d\n",
598 1.48 augustss (int)LE(p->td.td_link),
599 1.48 augustss "\20\1T\2Q\3VF",
600 1.48 augustss (int)LE(p->td.td_status),
601 1.48 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
602 1.48 augustss "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
603 1.48 augustss UHCI_TD_GET_ERRCNT(LE(p->td.td_status)),
604 1.48 augustss UHCI_TD_GET_ACTLEN(LE(p->td.td_status)),
605 1.48 augustss UHCI_TD_GET_PID(LE(p->td.td_token)),
606 1.48 augustss UHCI_TD_GET_DEVADDR(LE(p->td.td_token)),
607 1.48 augustss UHCI_TD_GET_ENDPT(LE(p->td.td_token)),
608 1.48 augustss UHCI_TD_GET_DT(LE(p->td.td_token)),
609 1.48 augustss UHCI_TD_GET_MAXLEN(LE(p->td.td_token))));
610 1.1 augustss }
611 1.1 augustss
612 1.1 augustss void
613 1.56.2.1 wrstuden uhci_dump_qh(sqh)
614 1.56.2.1 wrstuden uhci_soft_qh_t *sqh;
615 1.1 augustss {
616 1.56.2.1 wrstuden DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
617 1.56.2.1 wrstuden (int)sqh->physaddr, LE(sqh->qh.qh_hlink), LE(sqh->qh.qh_elink)));
618 1.1 augustss }
619 1.1 augustss
620 1.13 augustss
621 1.1 augustss #if 0
622 1.1 augustss void
623 1.1 augustss uhci_dump()
624 1.1 augustss {
625 1.1 augustss uhci_softc_t *sc = uhci;
626 1.1 augustss
627 1.1 augustss uhci_dumpregs(sc);
628 1.50 augustss printf("intrs=%d\n", sc->sc_bus.no_intrs);
629 1.1 augustss printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);
630 1.42 augustss uhci_dump_qh(sc->sc_ctl_start->qh.hlink);
631 1.1 augustss }
632 1.1 augustss #endif
633 1.1 augustss
634 1.56.2.1 wrstuden
635 1.56.2.1 wrstuden void
636 1.56.2.1 wrstuden uhci_dump_qhs(sqh)
637 1.56.2.1 wrstuden uhci_soft_qh_t *sqh;
638 1.56.2.1 wrstuden {
639 1.56.2.1 wrstuden uhci_dump_qh(sqh);
640 1.56.2.1 wrstuden
641 1.56.2.1 wrstuden /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
642 1.56.2.1 wrstuden * Traverses sideways first, then down.
643 1.56.2.1 wrstuden *
644 1.56.2.1 wrstuden * QH1
645 1.56.2.1 wrstuden * QH2
646 1.56.2.1 wrstuden * No QH
647 1.56.2.1 wrstuden * TD2.1
648 1.56.2.1 wrstuden * TD2.2
649 1.56.2.1 wrstuden * TD1.1
650 1.56.2.1 wrstuden * etc.
651 1.56.2.1 wrstuden *
652 1.56.2.1 wrstuden * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
653 1.56.2.1 wrstuden */
654 1.56.2.1 wrstuden
655 1.56.2.1 wrstuden
656 1.56.2.1 wrstuden if (sqh->hlink != NULL && !(sqh->qh.qh_hlink & UHCI_PTR_T))
657 1.56.2.1 wrstuden uhci_dump_qhs(sqh->hlink);
658 1.56.2.1 wrstuden else
659 1.56.2.1 wrstuden DPRINTF(("No QH\n"));
660 1.56.2.1 wrstuden
661 1.56.2.1 wrstuden if (sqh->elink != NULL && !(sqh->qh.qh_elink & UHCI_PTR_T))
662 1.56.2.1 wrstuden uhci_dump_tds(sqh->elink);
663 1.56.2.1 wrstuden else
664 1.56.2.1 wrstuden DPRINTF(("No TD\n"));
665 1.56.2.1 wrstuden }
666 1.56.2.1 wrstuden
667 1.1 augustss void
668 1.1 augustss uhci_dump_tds(std)
669 1.1 augustss uhci_soft_td_t *std;
670 1.1 augustss {
671 1.56.2.1 wrstuden uhci_soft_td_t *td;
672 1.1 augustss
673 1.56.2.1 wrstuden for(td = std; td != NULL; td = td->link.std) {
674 1.56.2.1 wrstuden uhci_dump_td(td);
675 1.56.2.1 wrstuden
676 1.56.2.1 wrstuden /* Check whether the link pointer in this TD marks
677 1.56.2.1 wrstuden * the link pointer as end of queue. This avoids
678 1.56.2.1 wrstuden * printing the free list in case the queue/TD has
679 1.56.2.1 wrstuden * already been moved there (seatbelt).
680 1.56.2.1 wrstuden */
681 1.56.2.1 wrstuden if (td->td.td_link & UHCI_PTR_T ||
682 1.56.2.1 wrstuden td->td.td_link == 0)
683 1.56.2.1 wrstuden break;
684 1.56.2.1 wrstuden }
685 1.1 augustss }
686 1.1 augustss #endif
687 1.1 augustss
688 1.1 augustss /*
689 1.1 augustss * This routine is executed periodically and simulates interrupts
690 1.1 augustss * from the root controller interrupt pipe for port status change.
691 1.1 augustss */
692 1.1 augustss void
693 1.1 augustss uhci_timo(addr)
694 1.1 augustss void *addr;
695 1.1 augustss {
696 1.56.2.1 wrstuden usbd_xfer_handle xfer = addr;
697 1.56.2.1 wrstuden usbd_pipe_handle pipe = xfer->pipe;
698 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
699 1.1 augustss int s;
700 1.1 augustss u_char *p;
701 1.1 augustss
702 1.56.2.1 wrstuden DPRINTFN(20, ("uhci_timo\n"));
703 1.1 augustss
704 1.56.2.1 wrstuden usb_timeout(uhci_timo, xfer, sc->sc_ival, xfer->timo_handle);
705 1.41 augustss
706 1.56.2.1 wrstuden p = KERNADDR(&xfer->dmabuf);
707 1.1 augustss p[0] = 0;
708 1.1 augustss if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
709 1.1 augustss p[0] |= 1<<1;
710 1.1 augustss if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
711 1.1 augustss p[0] |= 1<<2;
712 1.41 augustss if (p[0] == 0)
713 1.41 augustss /* No change, try again in a while */
714 1.41 augustss return;
715 1.41 augustss
716 1.56.2.1 wrstuden xfer->actlen = 1;
717 1.56.2.1 wrstuden xfer->status = USBD_NORMAL_COMPLETION;
718 1.16 augustss s = splusb();
719 1.56.2.1 wrstuden xfer->hcpriv = 0;
720 1.56.2.1 wrstuden xfer->device->bus->intr_context++;
721 1.56.2.1 wrstuden usb_transfer_complete(xfer);
722 1.56.2.1 wrstuden xfer->device->bus->intr_context--;
723 1.41 augustss splx(s);
724 1.41 augustss }
725 1.41 augustss
726 1.41 augustss void
727 1.56.2.1 wrstuden uhci_root_intr_done(xfer)
728 1.56.2.1 wrstuden usbd_xfer_handle xfer;
729 1.41 augustss {
730 1.1 augustss }
731 1.1 augustss
732 1.1 augustss
733 1.1 augustss void
734 1.1 augustss uhci_lock_frames(sc)
735 1.1 augustss uhci_softc_t *sc;
736 1.1 augustss {
737 1.1 augustss int s = splusb();
738 1.56.2.1 wrstuden
739 1.1 augustss while (sc->sc_vflock) {
740 1.1 augustss sc->sc_vflock |= UHCI_WANT_LOCK;
741 1.1 augustss tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0);
742 1.1 augustss }
743 1.1 augustss sc->sc_vflock = UHCI_HAS_LOCK;
744 1.1 augustss splx(s);
745 1.1 augustss }
746 1.1 augustss
747 1.1 augustss void
748 1.1 augustss uhci_unlock_frames(sc)
749 1.1 augustss uhci_softc_t *sc;
750 1.1 augustss {
751 1.1 augustss int s = splusb();
752 1.56.2.1 wrstuden
753 1.1 augustss sc->sc_vflock &= ~UHCI_HAS_LOCK;
754 1.1 augustss if (sc->sc_vflock & UHCI_WANT_LOCK)
755 1.1 augustss wakeup(&sc->sc_vflock);
756 1.1 augustss splx(s);
757 1.1 augustss }
758 1.1 augustss
759 1.1 augustss /*
760 1.1 augustss * Allocate an interrupt information struct. A free list is kept
761 1.1 augustss * for fast allocation.
762 1.1 augustss */
763 1.1 augustss uhci_intr_info_t *
764 1.1 augustss uhci_alloc_intr_info(sc)
765 1.1 augustss uhci_softc_t *sc;
766 1.1 augustss {
767 1.1 augustss uhci_intr_info_t *ii;
768 1.1 augustss
769 1.1 augustss ii = LIST_FIRST(&uhci_ii_free);
770 1.1 augustss if (ii)
771 1.1 augustss LIST_REMOVE(ii, list);
772 1.1 augustss else {
773 1.31 augustss ii = malloc(sizeof(uhci_intr_info_t), M_USBHC, M_NOWAIT);
774 1.1 augustss }
775 1.1 augustss ii->sc = sc;
776 1.56.2.1 wrstuden #if defined(__FreeBSD__)
777 1.56.2.1 wrstuden callout_handle_init(&ii->timeout_handle);
778 1.56.2.1 wrstuden #endif
779 1.56.2.1 wrstuden
780 1.1 augustss return ii;
781 1.1 augustss }
782 1.1 augustss
783 1.1 augustss void
784 1.1 augustss uhci_free_intr_info(ii)
785 1.1 augustss uhci_intr_info_t *ii;
786 1.1 augustss {
787 1.1 augustss LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */
788 1.1 augustss }
789 1.1 augustss
790 1.1 augustss /* Add control QH, called at splusb(). */
791 1.1 augustss void
792 1.1 augustss uhci_add_ctrl(sc, sqh)
793 1.1 augustss uhci_softc_t *sc;
794 1.1 augustss uhci_soft_qh_t *sqh;
795 1.1 augustss {
796 1.42 augustss uhci_soft_qh_t *eqh;
797 1.1 augustss
798 1.52 augustss SPLUSBCHECK;
799 1.52 augustss
800 1.1 augustss DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
801 1.42 augustss eqh = sc->sc_ctl_end;
802 1.42 augustss sqh->hlink = eqh->hlink;
803 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
804 1.42 augustss eqh->hlink = sqh;
805 1.42 augustss eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q);
806 1.1 augustss sc->sc_ctl_end = sqh;
807 1.1 augustss }
808 1.1 augustss
809 1.1 augustss /* Remove control QH, called at splusb(). */
810 1.1 augustss void
811 1.1 augustss uhci_remove_ctrl(sc, sqh)
812 1.1 augustss uhci_softc_t *sc;
813 1.1 augustss uhci_soft_qh_t *sqh;
814 1.1 augustss {
815 1.1 augustss uhci_soft_qh_t *pqh;
816 1.1 augustss
817 1.52 augustss SPLUSBCHECK;
818 1.52 augustss
819 1.1 augustss DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh));
820 1.42 augustss for (pqh = sc->sc_ctl_start; pqh->hlink != sqh; pqh=pqh->hlink)
821 1.56.2.1 wrstuden #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
822 1.42 augustss if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) {
823 1.1 augustss printf("uhci_remove_ctrl: QH not found\n");
824 1.1 augustss return;
825 1.1 augustss }
826 1.1 augustss #else
827 1.1 augustss ;
828 1.1 augustss #endif
829 1.42 augustss pqh->hlink = sqh->hlink;
830 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
831 1.1 augustss if (sc->sc_ctl_end == sqh)
832 1.1 augustss sc->sc_ctl_end = pqh;
833 1.1 augustss }
834 1.1 augustss
835 1.1 augustss /* Add bulk QH, called at splusb(). */
836 1.1 augustss void
837 1.1 augustss uhci_add_bulk(sc, sqh)
838 1.1 augustss uhci_softc_t *sc;
839 1.1 augustss uhci_soft_qh_t *sqh;
840 1.1 augustss {
841 1.42 augustss uhci_soft_qh_t *eqh;
842 1.1 augustss
843 1.52 augustss SPLUSBCHECK;
844 1.52 augustss
845 1.1 augustss DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
846 1.42 augustss eqh = sc->sc_bulk_end;
847 1.42 augustss sqh->hlink = eqh->hlink;
848 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
849 1.42 augustss eqh->hlink = sqh;
850 1.42 augustss eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q);
851 1.1 augustss sc->sc_bulk_end = sqh;
852 1.1 augustss }
853 1.1 augustss
854 1.1 augustss /* Remove bulk QH, called at splusb(). */
855 1.1 augustss void
856 1.1 augustss uhci_remove_bulk(sc, sqh)
857 1.1 augustss uhci_softc_t *sc;
858 1.1 augustss uhci_soft_qh_t *sqh;
859 1.1 augustss {
860 1.1 augustss uhci_soft_qh_t *pqh;
861 1.1 augustss
862 1.52 augustss SPLUSBCHECK;
863 1.52 augustss
864 1.1 augustss DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
865 1.42 augustss for (pqh = sc->sc_bulk_start; pqh->hlink != sqh; pqh = pqh->hlink)
866 1.56.2.1 wrstuden #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
867 1.42 augustss if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) {
868 1.1 augustss printf("uhci_remove_bulk: QH not found\n");
869 1.1 augustss return;
870 1.1 augustss }
871 1.1 augustss #else
872 1.1 augustss ;
873 1.1 augustss #endif
874 1.42 augustss pqh->hlink = sqh->hlink;
875 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
876 1.1 augustss if (sc->sc_bulk_end == sqh)
877 1.1 augustss sc->sc_bulk_end = pqh;
878 1.1 augustss }
879 1.1 augustss
880 1.1 augustss int
881 1.44 augustss uhci_intr(arg)
882 1.44 augustss void *arg;
883 1.1 augustss {
884 1.44 augustss uhci_softc_t *sc = arg;
885 1.44 augustss int status;
886 1.44 augustss int ack;
887 1.1 augustss uhci_intr_info_t *ii;
888 1.1 augustss
889 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
890 1.44 augustss if (uhcidebug > 15) {
891 1.44 augustss DPRINTF(("%s: uhci_intr\n", USBDEVNAME(sc->sc_bus.bdev)));
892 1.1 augustss uhci_dumpregs(sc);
893 1.1 augustss }
894 1.1 augustss #endif
895 1.44 augustss
896 1.56.2.1 wrstuden status = UREAD2(sc, UHCI_STS);
897 1.56.2.1 wrstuden if (status == 0) /* The interrupt was not for us. */
898 1.56.2.1 wrstuden return (0);
899 1.56.2.1 wrstuden
900 1.44 augustss #if defined(DIAGNOSTIC) && defined(__NetBSD__)
901 1.30 augustss if (sc->sc_suspend != PWR_RESUME)
902 1.30 augustss printf("uhci_intr: suspended sts=0x%x\n", status);
903 1.30 augustss #endif
904 1.44 augustss
905 1.44 augustss ack = 0;
906 1.44 augustss if (status & UHCI_STS_USBINT)
907 1.44 augustss ack |= UHCI_STS_USBINT;
908 1.44 augustss if (status & UHCI_STS_USBEI)
909 1.44 augustss ack |= UHCI_STS_USBEI;
910 1.1 augustss if (status & UHCI_STS_RD) {
911 1.44 augustss ack |= UHCI_STS_RD;
912 1.46 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
913 1.1 augustss }
914 1.1 augustss if (status & UHCI_STS_HSE) {
915 1.44 augustss ack |= UHCI_STS_HSE;
916 1.46 augustss printf("%s: host controller process error\n",
917 1.46 augustss USBDEVNAME(sc->sc_bus.bdev));
918 1.1 augustss }
919 1.1 augustss if (status & UHCI_STS_HCPE) {
920 1.44 augustss ack |= UHCI_STS_HCPE;
921 1.44 augustss printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
922 1.44 augustss }
923 1.44 augustss if (status & UHCI_STS_HCH) {
924 1.44 augustss /* no acknowledge needed */
925 1.46 augustss printf("%s: host controller halted\n",
926 1.46 augustss USBDEVNAME(sc->sc_bus.bdev));
927 1.1 augustss }
928 1.44 augustss
929 1.44 augustss if (ack) /* acknowledge the ints */
930 1.44 augustss UWRITE2(sc, UHCI_STS, ack);
931 1.44 augustss else /* nothing to acknowledge */
932 1.44 augustss return (0);
933 1.1 augustss
934 1.51 augustss sc->sc_bus.intr_context++;
935 1.50 augustss sc->sc_bus.no_intrs++;
936 1.50 augustss
937 1.1 augustss /*
938 1.1 augustss * Interrupts on UHCI really suck. When the host controller
939 1.1 augustss * interrupts because a transfer is completed there is no
940 1.1 augustss * way of knowing which transfer it was. You can scan down
941 1.1 augustss * the TDs and QHs of the previous frame to limit the search,
942 1.1 augustss * but that assumes that the interrupt was not delayed by more
943 1.1 augustss * than 1 ms, which may not always be true (e.g. after debug
944 1.1 augustss * output on a slow console).
945 1.1 augustss * We scan all interrupt descriptors to see if any have
946 1.1 augustss * completed.
947 1.1 augustss */
948 1.1 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
949 1.1 augustss uhci_check_intr(sc, ii);
950 1.1 augustss
951 1.56.2.1 wrstuden DPRINTFN(10, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
952 1.44 augustss
953 1.51 augustss sc->sc_bus.intr_context--;
954 1.50 augustss
955 1.44 augustss return (1);
956 1.1 augustss }
957 1.1 augustss
958 1.1 augustss /* Check for an interrupt. */
959 1.1 augustss void
960 1.1 augustss uhci_check_intr(sc, ii)
961 1.1 augustss uhci_softc_t *sc;
962 1.1 augustss uhci_intr_info_t *ii;
963 1.1 augustss {
964 1.1 augustss uhci_soft_td_t *std, *lstd;
965 1.18 augustss u_int32_t status;
966 1.1 augustss
967 1.1 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
968 1.1 augustss #ifdef DIAGNOSTIC
969 1.56.2.1 wrstuden if (ii == NULL) {
970 1.1 augustss printf("uhci_check_intr: no ii? %p\n", ii);
971 1.1 augustss return;
972 1.1 augustss }
973 1.1 augustss #endif
974 1.56.2.1 wrstuden if (ii->stdstart == NULL)
975 1.1 augustss return;
976 1.1 augustss lstd = ii->stdend;
977 1.1 augustss #ifdef DIAGNOSTIC
978 1.56.2.1 wrstuden if (lstd == NULL) {
979 1.1 augustss printf("uhci_check_intr: std==0\n");
980 1.1 augustss return;
981 1.1 augustss }
982 1.1 augustss #endif
983 1.26 augustss /*
984 1.26 augustss * If the last TD is still active we need to check whether there
985 1.26 augustss * is a an error somewhere in the middle, or whether there was a
986 1.26 augustss * short packet (SPD and not ACTIVE).
987 1.26 augustss */
988 1.42 augustss if (LE(lstd->td.td_status) & UHCI_TD_ACTIVE) {
989 1.1 augustss DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii));
990 1.48 augustss for (std = ii->stdstart; std != lstd; std = std->link.std) {
991 1.42 augustss status = LE(std->td.td_status);
992 1.18 augustss if ((status & UHCI_TD_STALLED) ||
993 1.18 augustss (status & (UHCI_TD_SPD | UHCI_TD_ACTIVE)) ==
994 1.18 augustss UHCI_TD_SPD)
995 1.1 augustss goto done;
996 1.18 augustss }
997 1.18 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p std=%p still active\n",
998 1.18 augustss ii, ii->stdstart));
999 1.1 augustss return;
1000 1.1 augustss }
1001 1.1 augustss done:
1002 1.26 augustss usb_untimeout(uhci_timeout, ii, ii->timeout_handle);
1003 1.36 augustss uhci_idone(ii);
1004 1.1 augustss }
1005 1.1 augustss
1006 1.52 augustss /* Called at splusb() */
1007 1.1 augustss void
1008 1.36 augustss uhci_idone(ii)
1009 1.1 augustss uhci_intr_info_t *ii;
1010 1.1 augustss {
1011 1.56.2.1 wrstuden usbd_xfer_handle xfer = ii->xfer;
1012 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1013 1.1 augustss uhci_soft_td_t *std;
1014 1.56.2.1 wrstuden u_int32_t status = 0, nstatus;
1015 1.26 augustss int actlen;
1016 1.1 augustss
1017 1.7 augustss #ifdef DIAGNOSTIC
1018 1.7 augustss {
1019 1.7 augustss int s = splhigh();
1020 1.7 augustss if (ii->isdone) {
1021 1.26 augustss splx(s);
1022 1.36 augustss printf("uhci_idone: ii=%p is done!\n", ii);
1023 1.7 augustss return;
1024 1.7 augustss }
1025 1.7 augustss ii->isdone = 1;
1026 1.7 augustss splx(s);
1027 1.7 augustss }
1028 1.7 augustss #endif
1029 1.1 augustss
1030 1.56.2.1 wrstuden if (xfer->status == USBD_CANCELLED ||
1031 1.56.2.1 wrstuden xfer->status == USBD_TIMEOUT) {
1032 1.56.2.1 wrstuden DPRINTF(("uhci_idone: aborted xfer=%p\n", xfer));
1033 1.48 augustss return;
1034 1.48 augustss }
1035 1.48 augustss
1036 1.56.2.1 wrstuden if (xfer->nframes != 0) {
1037 1.48 augustss /* Isoc transfer, do things differently. */
1038 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
1039 1.48 augustss int i, n, nframes;
1040 1.48 augustss
1041 1.48 augustss DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1042 1.48 augustss
1043 1.56.2.1 wrstuden nframes = xfer->nframes;
1044 1.48 augustss actlen = 0;
1045 1.56.2.1 wrstuden n = xfer->hcprivint;
1046 1.48 augustss for (i = 0; i < nframes; i++) {
1047 1.48 augustss std = stds[n];
1048 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
1049 1.48 augustss if (uhcidebug > 5) {
1050 1.48 augustss DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1051 1.48 augustss uhci_dump_td(std);
1052 1.48 augustss }
1053 1.48 augustss #endif
1054 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
1055 1.48 augustss n = 0;
1056 1.48 augustss status = LE(std->td.td_status);
1057 1.48 augustss actlen += UHCI_TD_GET_ACTLEN(status);
1058 1.48 augustss }
1059 1.48 augustss upipe->u.iso.inuse -= nframes;
1060 1.56.2.1 wrstuden xfer->actlen = actlen;
1061 1.56.2.1 wrstuden xfer->status = USBD_NORMAL_COMPLETION;
1062 1.56.2.1 wrstuden xfer->hcpriv = ii;
1063 1.56.2.1 wrstuden usb_transfer_complete(xfer);
1064 1.48 augustss return;
1065 1.48 augustss }
1066 1.48 augustss
1067 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
1068 1.56.2.1 wrstuden DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1069 1.56.2.1 wrstuden ii, xfer, upipe));
1070 1.48 augustss if (uhcidebug > 10)
1071 1.48 augustss uhci_dump_tds(ii->stdstart);
1072 1.48 augustss #endif
1073 1.48 augustss
1074 1.26 augustss /* The transfer is done, compute actual length and status. */
1075 1.26 augustss actlen = 0;
1076 1.56.2.1 wrstuden for (std = ii->stdstart; std != NULL; std = std->link.std) {
1077 1.56.2.1 wrstuden nstatus = LE(std->td.td_status);
1078 1.56.2.1 wrstuden if (nstatus & UHCI_TD_ACTIVE)
1079 1.26 augustss break;
1080 1.56.2.1 wrstuden
1081 1.56.2.1 wrstuden status = nstatus;
1082 1.56.2.1 wrstuden if (UHCI_TD_GET_PID(LE(std->td.td_token)) != UHCI_TD_PID_SETUP)
1083 1.26 augustss actlen += UHCI_TD_GET_ACTLEN(status);
1084 1.1 augustss }
1085 1.38 augustss /* If there are left over TDs we need to update the toggle. */
1086 1.56.2.1 wrstuden if (std != NULL)
1087 1.42 augustss upipe->nexttoggle = UHCI_TD_GET_DT(LE(std->td.td_token));
1088 1.38 augustss
1089 1.1 augustss status &= UHCI_TD_ERROR;
1090 1.26 augustss DPRINTFN(10, ("uhci_check_intr: actlen=%d, status=0x%x\n",
1091 1.26 augustss actlen, status));
1092 1.56.2.1 wrstuden xfer->actlen = actlen;
1093 1.1 augustss if (status != 0) {
1094 1.56.2.1 wrstuden DPRINTFN((status&UHCI_TD_STALLED)*10,
1095 1.36 augustss ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1096 1.17 augustss "status 0x%b\n",
1097 1.56.2.1 wrstuden xfer->pipe->device->address,
1098 1.56.2.1 wrstuden xfer->pipe->endpoint->edesc->bEndpointAddress,
1099 1.21 augustss (int)status,
1100 1.12 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
1101 1.12 augustss "STALLED\30ACTIVE"));
1102 1.1 augustss if (status == UHCI_TD_STALLED)
1103 1.56.2.1 wrstuden xfer->status = USBD_STALLED;
1104 1.1 augustss else
1105 1.56.2.1 wrstuden xfer->status = USBD_IOERROR; /* more info XXX */
1106 1.1 augustss } else {
1107 1.56.2.1 wrstuden xfer->status = USBD_NORMAL_COMPLETION;
1108 1.1 augustss }
1109 1.56.2.1 wrstuden xfer->hcpriv = ii;
1110 1.56.2.1 wrstuden usb_transfer_complete(xfer);
1111 1.1 augustss }
1112 1.1 augustss
1113 1.13 augustss /*
1114 1.13 augustss * Called when a request does not complete.
1115 1.13 augustss */
1116 1.1 augustss void
1117 1.1 augustss uhci_timeout(addr)
1118 1.1 augustss void *addr;
1119 1.1 augustss {
1120 1.1 augustss uhci_intr_info_t *ii = addr;
1121 1.1 augustss
1122 1.1 augustss DPRINTF(("uhci_timeout: ii=%p\n", ii));
1123 1.51 augustss
1124 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
1125 1.56.2.1 wrstuden if (uhcidebug > 10)
1126 1.56.2.1 wrstuden uhci_dump_tds(ii->stdstart);
1127 1.56.2.1 wrstuden #endif
1128 1.56.2.1 wrstuden
1129 1.56.2.1 wrstuden ii->xfer->device->bus->intr_context++;
1130 1.56.2.1 wrstuden uhci_abort_xfer(ii->xfer, USBD_TIMEOUT);
1131 1.56.2.1 wrstuden ii->xfer->device->bus->intr_context--;
1132 1.1 augustss }
1133 1.1 augustss
1134 1.1 augustss /*
1135 1.1 augustss * Wait here until controller claims to have an interrupt.
1136 1.1 augustss * Then call uhci_intr and return. Use timeout to avoid waiting
1137 1.1 augustss * too long.
1138 1.13 augustss * Only used during boot when interrupts are not enabled yet.
1139 1.1 augustss */
1140 1.1 augustss void
1141 1.56.2.1 wrstuden uhci_waitintr(sc, xfer)
1142 1.1 augustss uhci_softc_t *sc;
1143 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1144 1.1 augustss {
1145 1.56.2.1 wrstuden int timo = xfer->timeout;
1146 1.13 augustss uhci_intr_info_t *ii;
1147 1.13 augustss
1148 1.26 augustss DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1149 1.1 augustss
1150 1.56.2.1 wrstuden xfer->status = USBD_IN_PROGRESS;
1151 1.26 augustss for (; timo >= 0; timo--) {
1152 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1153 1.26 augustss DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1154 1.1 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
1155 1.1 augustss uhci_intr(sc);
1156 1.56.2.1 wrstuden if (xfer->status != USBD_IN_PROGRESS)
1157 1.1 augustss return;
1158 1.1 augustss }
1159 1.1 augustss }
1160 1.13 augustss
1161 1.13 augustss /* Timeout */
1162 1.13 augustss DPRINTF(("uhci_waitintr: timeout\n"));
1163 1.13 augustss for (ii = LIST_FIRST(&sc->sc_intrhead);
1164 1.56.2.1 wrstuden ii != NULL && ii->xfer != xfer;
1165 1.13 augustss ii = LIST_NEXT(ii, list))
1166 1.13 augustss ;
1167 1.41 augustss #ifdef DIAGNOSTIC
1168 1.56.2.1 wrstuden if (ii == NULL)
1169 1.13 augustss panic("uhci_waitintr: lost intr_info\n");
1170 1.41 augustss #endif
1171 1.41 augustss uhci_idone(ii);
1172 1.1 augustss }
1173 1.1 augustss
1174 1.8 augustss void
1175 1.8 augustss uhci_poll(bus)
1176 1.8 augustss struct usbd_bus *bus;
1177 1.8 augustss {
1178 1.8 augustss uhci_softc_t *sc = (uhci_softc_t *)bus;
1179 1.8 augustss
1180 1.8 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
1181 1.8 augustss uhci_intr(sc);
1182 1.8 augustss }
1183 1.8 augustss
1184 1.1 augustss #if 0
1185 1.1 augustss void
1186 1.1 augustss uhci_reset(p)
1187 1.1 augustss void *p;
1188 1.1 augustss {
1189 1.1 augustss uhci_softc_t *sc = p;
1190 1.1 augustss int n;
1191 1.1 augustss
1192 1.1 augustss UHCICMD(sc, UHCI_CMD_HCRESET);
1193 1.1 augustss /* The reset bit goes low when the controller is done. */
1194 1.1 augustss for (n = 0; n < UHCI_RESET_TIMEOUT &&
1195 1.1 augustss (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1196 1.1 augustss delay(100);
1197 1.1 augustss if (n >= UHCI_RESET_TIMEOUT)
1198 1.13 augustss printf("%s: controller did not reset\n",
1199 1.13 augustss USBDEVNAME(sc->sc_bus.bdev));
1200 1.1 augustss }
1201 1.1 augustss #endif
1202 1.1 augustss
1203 1.16 augustss usbd_status
1204 1.1 augustss uhci_run(sc, run)
1205 1.1 augustss uhci_softc_t *sc;
1206 1.1 augustss int run;
1207 1.1 augustss {
1208 1.1 augustss int s, n, running;
1209 1.1 augustss
1210 1.1 augustss run = run != 0;
1211 1.16 augustss s = splusb();
1212 1.30 augustss DPRINTF(("uhci_run: setting run=%d\n", run));
1213 1.30 augustss UHCICMD(sc, run ? UHCI_CMD_RS : 0);
1214 1.13 augustss for(n = 0; n < 10; n++) {
1215 1.1 augustss running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1216 1.1 augustss /* return when we've entered the state we want */
1217 1.1 augustss if (run == running) {
1218 1.1 augustss splx(s);
1219 1.30 augustss DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1220 1.30 augustss UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1221 1.16 augustss return (USBD_NORMAL_COMPLETION);
1222 1.1 augustss }
1223 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1224 1.1 augustss }
1225 1.1 augustss splx(s);
1226 1.13 augustss printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1227 1.14 augustss run ? "start" : "stop");
1228 1.16 augustss return (USBD_IOERROR);
1229 1.1 augustss }
1230 1.1 augustss
1231 1.1 augustss /*
1232 1.1 augustss * Memory management routines.
1233 1.1 augustss * uhci_alloc_std allocates TDs
1234 1.1 augustss * uhci_alloc_sqh allocates QHs
1235 1.7 augustss * These two routines do their own free list management,
1236 1.1 augustss * partly for speed, partly because allocating DMAable memory
1237 1.1 augustss * has page size granularaity so much memory would be wasted if
1238 1.16 augustss * only one TD/QH (32 bytes) was placed in each allocated chunk.
1239 1.1 augustss */
1240 1.1 augustss
1241 1.1 augustss uhci_soft_td_t *
1242 1.1 augustss uhci_alloc_std(sc)
1243 1.1 augustss uhci_softc_t *sc;
1244 1.1 augustss {
1245 1.1 augustss uhci_soft_td_t *std;
1246 1.56.2.1 wrstuden usbd_status err;
1247 1.42 augustss int i, offs;
1248 1.7 augustss usb_dma_t dma;
1249 1.1 augustss
1250 1.56.2.1 wrstuden if (sc->sc_freetds == NULL) {
1251 1.1 augustss DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1252 1.56.2.1 wrstuden err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1253 1.56.2.1 wrstuden UHCI_TD_ALIGN, &dma);
1254 1.56.2.1 wrstuden if (err)
1255 1.16 augustss return (0);
1256 1.43 augustss for(i = 0; i < UHCI_STD_CHUNK; i++) {
1257 1.42 augustss offs = i * UHCI_STD_SIZE;
1258 1.42 augustss std = (uhci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
1259 1.42 augustss std->physaddr = DMAADDR(&dma) + offs;
1260 1.42 augustss std->link.std = sc->sc_freetds;
1261 1.1 augustss sc->sc_freetds = std;
1262 1.1 augustss }
1263 1.1 augustss }
1264 1.1 augustss std = sc->sc_freetds;
1265 1.42 augustss sc->sc_freetds = std->link.std;
1266 1.42 augustss memset(&std->td, 0, sizeof(uhci_td_t));
1267 1.1 augustss return std;
1268 1.1 augustss }
1269 1.1 augustss
1270 1.1 augustss void
1271 1.1 augustss uhci_free_std(sc, std)
1272 1.1 augustss uhci_softc_t *sc;
1273 1.1 augustss uhci_soft_td_t *std;
1274 1.1 augustss {
1275 1.7 augustss #ifdef DIAGNOSTIC
1276 1.7 augustss #define TD_IS_FREE 0x12345678
1277 1.56.2.1 wrstuden if (std->td.td_token == LE(TD_IS_FREE)) {
1278 1.7 augustss printf("uhci_free_std: freeing free TD %p\n", std);
1279 1.7 augustss return;
1280 1.7 augustss }
1281 1.42 augustss std->td.td_token = LE(TD_IS_FREE);
1282 1.7 augustss #endif
1283 1.42 augustss std->link.std = sc->sc_freetds;
1284 1.1 augustss sc->sc_freetds = std;
1285 1.1 augustss }
1286 1.1 augustss
1287 1.1 augustss uhci_soft_qh_t *
1288 1.1 augustss uhci_alloc_sqh(sc)
1289 1.1 augustss uhci_softc_t *sc;
1290 1.1 augustss {
1291 1.1 augustss uhci_soft_qh_t *sqh;
1292 1.56.2.1 wrstuden usbd_status err;
1293 1.1 augustss int i, offs;
1294 1.7 augustss usb_dma_t dma;
1295 1.1 augustss
1296 1.56.2.1 wrstuden if (sc->sc_freeqhs == NULL) {
1297 1.1 augustss DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1298 1.56.2.1 wrstuden err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1299 1.56.2.1 wrstuden UHCI_QH_ALIGN, &dma);
1300 1.56.2.1 wrstuden if (err)
1301 1.56.2.1 wrstuden return (0);
1302 1.43 augustss for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1303 1.42 augustss offs = i * UHCI_SQH_SIZE;
1304 1.42 augustss sqh = (uhci_soft_qh_t *)((char *)KERNADDR(&dma) +offs);
1305 1.1 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1306 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1307 1.1 augustss sc->sc_freeqhs = sqh;
1308 1.1 augustss }
1309 1.1 augustss }
1310 1.1 augustss sqh = sc->sc_freeqhs;
1311 1.42 augustss sc->sc_freeqhs = sqh->hlink;
1312 1.42 augustss memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1313 1.16 augustss return (sqh);
1314 1.1 augustss }
1315 1.1 augustss
1316 1.1 augustss void
1317 1.1 augustss uhci_free_sqh(sc, sqh)
1318 1.1 augustss uhci_softc_t *sc;
1319 1.1 augustss uhci_soft_qh_t *sqh;
1320 1.1 augustss {
1321 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1322 1.1 augustss sc->sc_freeqhs = sqh;
1323 1.1 augustss }
1324 1.1 augustss
1325 1.16 augustss #if 0
1326 1.1 augustss /*
1327 1.1 augustss * Enter a list of transfers onto a control queue.
1328 1.1 augustss * Called at splusb()
1329 1.1 augustss */
1330 1.1 augustss void
1331 1.1 augustss uhci_enter_ctl_q(sc, sqh, ii)
1332 1.1 augustss uhci_softc_t *sc;
1333 1.1 augustss uhci_soft_qh_t *sqh;
1334 1.1 augustss uhci_intr_info_t *ii;
1335 1.1 augustss {
1336 1.1 augustss DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh));
1337 1.1 augustss
1338 1.1 augustss }
1339 1.16 augustss #endif
1340 1.1 augustss
1341 1.1 augustss void
1342 1.1 augustss uhci_free_std_chain(sc, std, stdend)
1343 1.1 augustss uhci_softc_t *sc;
1344 1.1 augustss uhci_soft_td_t *std;
1345 1.1 augustss uhci_soft_td_t *stdend;
1346 1.1 augustss {
1347 1.1 augustss uhci_soft_td_t *p;
1348 1.1 augustss
1349 1.1 augustss for (; std != stdend; std = p) {
1350 1.42 augustss p = std->link.std;
1351 1.1 augustss uhci_free_std(sc, std);
1352 1.1 augustss }
1353 1.1 augustss }
1354 1.1 augustss
1355 1.1 augustss usbd_status
1356 1.33 augustss uhci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep)
1357 1.1 augustss struct uhci_pipe *upipe;
1358 1.1 augustss uhci_softc_t *sc;
1359 1.33 augustss int len, rd, shortok;
1360 1.7 augustss usb_dma_t *dma;
1361 1.1 augustss uhci_soft_td_t **sp, **ep;
1362 1.1 augustss {
1363 1.1 augustss uhci_soft_td_t *p, *lastp;
1364 1.1 augustss uhci_physaddr_t lastlink;
1365 1.1 augustss int i, ntd, l, tog, maxp;
1366 1.18 augustss u_int32_t status;
1367 1.1 augustss int addr = upipe->pipe.device->address;
1368 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1369 1.1 augustss
1370 1.33 augustss DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d "
1371 1.33 augustss "shortok=%d\n", addr, UE_GET_ADDR(endpt), len,
1372 1.33 augustss upipe->pipe.device->lowspeed, shortok));
1373 1.1 augustss if (len == 0) {
1374 1.1 augustss *sp = *ep = 0;
1375 1.12 augustss DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n"));
1376 1.1 augustss return (USBD_NORMAL_COMPLETION);
1377 1.1 augustss }
1378 1.4 augustss maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1379 1.1 augustss if (maxp == 0) {
1380 1.1 augustss printf("uhci_alloc_std_chain: maxp=0\n");
1381 1.1 augustss return (USBD_INVAL);
1382 1.1 augustss }
1383 1.1 augustss ntd = (len + maxp - 1) / maxp;
1384 1.39 augustss DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1385 1.38 augustss tog = upipe->nexttoggle;
1386 1.1 augustss if (ntd % 2 == 0)
1387 1.1 augustss tog ^= 1;
1388 1.32 augustss upipe->nexttoggle = tog ^ 1;
1389 1.1 augustss lastp = 0;
1390 1.1 augustss lastlink = UHCI_PTR_T;
1391 1.1 augustss ntd--;
1392 1.33 augustss status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1393 1.18 augustss if (upipe->pipe.device->lowspeed)
1394 1.18 augustss status |= UHCI_TD_LS;
1395 1.33 augustss if (shortok)
1396 1.18 augustss status |= UHCI_TD_SPD;
1397 1.1 augustss for (i = ntd; i >= 0; i--) {
1398 1.1 augustss p = uhci_alloc_std(sc);
1399 1.56.2.1 wrstuden if (p == NULL) {
1400 1.1 augustss uhci_free_std_chain(sc, lastp, 0);
1401 1.1 augustss return (USBD_NOMEM);
1402 1.1 augustss }
1403 1.42 augustss p->link.std = lastp;
1404 1.56.2.1 wrstuden if (lastlink == UHCI_PTR_T)
1405 1.56.2.1 wrstuden p->td.td_link = LE(lastlink);
1406 1.56.2.1 wrstuden else
1407 1.56.2.1 wrstuden p->td.td_link = LE(lastlink|UHCI_PTR_VF);
1408 1.1 augustss lastp = p;
1409 1.1 augustss lastlink = p->physaddr;
1410 1.42 augustss p->td.td_status = LE(status);
1411 1.1 augustss if (i == ntd) {
1412 1.1 augustss /* last TD */
1413 1.1 augustss l = len % maxp;
1414 1.1 augustss if (l == 0) l = maxp;
1415 1.1 augustss *ep = p;
1416 1.1 augustss } else
1417 1.1 augustss l = maxp;
1418 1.42 augustss p->td.td_token =
1419 1.39 augustss LE(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1420 1.39 augustss UHCI_TD_OUT(l, endpt, addr, tog));
1421 1.42 augustss p->td.td_buffer = LE(DMAADDR(dma) + i * maxp);
1422 1.1 augustss tog ^= 1;
1423 1.1 augustss }
1424 1.1 augustss *sp = lastp;
1425 1.38 augustss DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1426 1.38 augustss upipe->nexttoggle));
1427 1.1 augustss return (USBD_NORMAL_COMPLETION);
1428 1.1 augustss }
1429 1.1 augustss
1430 1.38 augustss void
1431 1.38 augustss uhci_device_clear_toggle(pipe)
1432 1.38 augustss usbd_pipe_handle pipe;
1433 1.38 augustss {
1434 1.38 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1435 1.38 augustss upipe->nexttoggle = 0;
1436 1.38 augustss }
1437 1.38 augustss
1438 1.38 augustss void
1439 1.38 augustss uhci_noop(pipe)
1440 1.38 augustss usbd_pipe_handle pipe;
1441 1.38 augustss {
1442 1.38 augustss }
1443 1.38 augustss
1444 1.1 augustss usbd_status
1445 1.56.2.1 wrstuden uhci_device_bulk_transfer(xfer)
1446 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1447 1.1 augustss {
1448 1.56.2.1 wrstuden usbd_status err;
1449 1.16 augustss
1450 1.52 augustss /* Insert last in queue. */
1451 1.56.2.1 wrstuden err = usb_insert_transfer(xfer);
1452 1.56.2.1 wrstuden if (err)
1453 1.56.2.1 wrstuden return (err);
1454 1.52 augustss
1455 1.56.2.1 wrstuden /* Pipe isn't running (otherwise err would be USBD_INPROG),
1456 1.56.2.1 wrstuden * start first
1457 1.56.2.1 wrstuden */
1458 1.56.2.1 wrstuden return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1459 1.16 augustss }
1460 1.16 augustss
1461 1.16 augustss usbd_status
1462 1.56.2.1 wrstuden uhci_device_bulk_start(xfer)
1463 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1464 1.16 augustss {
1465 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1466 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1467 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1468 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1469 1.55 augustss uhci_soft_td_t *data, *dataend;
1470 1.1 augustss uhci_soft_qh_t *sqh;
1471 1.56.2.1 wrstuden usbd_status err;
1472 1.45 augustss int len, isread, endpt;
1473 1.1 augustss int s;
1474 1.1 augustss
1475 1.56.2.1 wrstuden DPRINTFN(3, ("uhci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
1476 1.56.2.1 wrstuden xfer, xfer->length, xfer->flags));
1477 1.1 augustss
1478 1.48 augustss #ifdef DIAGNOSTIC
1479 1.56.2.1 wrstuden if (xfer->rqflags & URQ_REQUEST)
1480 1.1 augustss panic("uhci_device_bulk_transfer: a request\n");
1481 1.48 augustss #endif
1482 1.1 augustss
1483 1.56.2.1 wrstuden len = xfer->length;
1484 1.56.2.1 wrstuden endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
1485 1.45 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1486 1.1 augustss sqh = upipe->u.bulk.sqh;
1487 1.1 augustss
1488 1.1 augustss upipe->u.bulk.isread = isread;
1489 1.1 augustss upipe->u.bulk.length = len;
1490 1.1 augustss
1491 1.56.2.1 wrstuden err = uhci_alloc_std_chain(upipe, sc, len, isread,
1492 1.56.2.1 wrstuden xfer->flags & USBD_SHORT_XFER_OK,
1493 1.56.2.1 wrstuden &xfer->dmabuf, &data, &dataend);
1494 1.56.2.1 wrstuden if (err)
1495 1.56.2.1 wrstuden return (err);
1496 1.55 augustss dataend->td.td_status |= LE(UHCI_TD_IOC);
1497 1.1 augustss
1498 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
1499 1.33 augustss if (uhcidebug > 8) {
1500 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1501 1.55 augustss uhci_dump_tds(data);
1502 1.1 augustss }
1503 1.1 augustss #endif
1504 1.1 augustss
1505 1.1 augustss /* Set up interrupt info. */
1506 1.56.2.1 wrstuden ii->xfer = xfer;
1507 1.55 augustss ii->stdstart = data;
1508 1.55 augustss ii->stdend = dataend;
1509 1.56.2.1 wrstuden #if defined(__FreeBSD__)
1510 1.56.2.1 wrstuden callout_handle_init(&ii->timeout_handle);
1511 1.56.2.1 wrstuden #endif
1512 1.7 augustss #ifdef DIAGNOSTIC
1513 1.56.2.1 wrstuden if (!ii->isdone) {
1514 1.56.2.1 wrstuden printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
1515 1.56.2.1 wrstuden }
1516 1.7 augustss ii->isdone = 0;
1517 1.7 augustss #endif
1518 1.1 augustss
1519 1.55 augustss sqh->elink = data;
1520 1.55 augustss sqh->qh.qh_elink = LE(data->physaddr);
1521 1.1 augustss sqh->intr_info = ii;
1522 1.1 augustss
1523 1.1 augustss s = splusb();
1524 1.1 augustss uhci_add_bulk(sc, sqh);
1525 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1526 1.1 augustss
1527 1.56.2.1 wrstuden if (xfer->timeout && !sc->sc_bus.use_polling) {
1528 1.56.2.1 wrstuden usb_timeout(uhci_timeout, ii, MS_TO_TICKS(xfer->timeout),
1529 1.49 augustss ii->timeout_handle);
1530 1.13 augustss }
1531 1.1 augustss splx(s);
1532 1.1 augustss
1533 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
1534 1.1 augustss if (uhcidebug > 10) {
1535 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1536 1.55 augustss uhci_dump_tds(data);
1537 1.1 augustss }
1538 1.1 augustss #endif
1539 1.1 augustss
1540 1.26 augustss if (sc->sc_bus.use_polling)
1541 1.56.2.1 wrstuden uhci_waitintr(sc, xfer);
1542 1.26 augustss
1543 1.1 augustss return (USBD_IN_PROGRESS);
1544 1.1 augustss }
1545 1.1 augustss
1546 1.1 augustss /* Abort a device bulk request. */
1547 1.1 augustss void
1548 1.56.2.1 wrstuden uhci_device_bulk_abort(xfer)
1549 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1550 1.1 augustss {
1551 1.33 augustss DPRINTF(("uhci_device_bulk_abort:\n"));
1552 1.56.2.1 wrstuden uhci_abort_xfer(xfer, USBD_CANCELLED);
1553 1.33 augustss }
1554 1.33 augustss
1555 1.33 augustss void
1556 1.56.2.1 wrstuden uhci_abort_xfer(xfer, status)
1557 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1558 1.33 augustss usbd_status status;
1559 1.33 augustss {
1560 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1561 1.33 augustss uhci_intr_info_t *ii = upipe->iinfo;
1562 1.33 augustss uhci_soft_td_t *std;
1563 1.33 augustss
1564 1.56.2.1 wrstuden DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1565 1.56.2.1 wrstuden
1566 1.33 augustss /* Make interrupt routine ignore it, */
1567 1.56.2.1 wrstuden xfer->status = status;
1568 1.41 augustss
1569 1.41 augustss /* don't timeout, */
1570 1.41 augustss usb_untimeout(uhci_timeout, ii, ii->timeout_handle);
1571 1.33 augustss
1572 1.33 augustss /* make hardware ignore it, */
1573 1.42 augustss for (std = ii->stdstart; std != 0; std = std->link.std)
1574 1.48 augustss std->td.td_status &= LE(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1575 1.41 augustss
1576 1.56.2.1 wrstuden xfer->hcpriv = ii;
1577 1.41 augustss
1578 1.33 augustss /* make sure hardware has completed, */
1579 1.56.2.1 wrstuden if (xfer->device->bus->intr_context) {
1580 1.50 augustss /* We have no process context, so we can't use tsleep(). */
1581 1.56.2.1 wrstuden timeout(uhci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND);
1582 1.50 augustss } else {
1583 1.56.2.1 wrstuden #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
1584 1.56.2.1 wrstuden KASSERT(intr_nesting_level == 0,
1585 1.56.2.1 wrstuden ("ohci_abort_req in interrupt context"));
1586 1.56.2.1 wrstuden #endif
1587 1.56.2.1 wrstuden usb_delay_ms(xfer->pipe->device->bus, 1);
1588 1.41 augustss /* and call final part of interrupt handler. */
1589 1.56.2.1 wrstuden uhci_abort_xfer_end(xfer);
1590 1.41 augustss }
1591 1.41 augustss }
1592 1.41 augustss
1593 1.41 augustss void
1594 1.56.2.1 wrstuden uhci_abort_xfer_end(v)
1595 1.41 augustss void *v;
1596 1.41 augustss {
1597 1.56.2.1 wrstuden usbd_xfer_handle xfer = v;
1598 1.41 augustss int s;
1599 1.33 augustss
1600 1.33 augustss s = splusb();
1601 1.56.2.1 wrstuden usb_transfer_complete(xfer);
1602 1.33 augustss splx(s);
1603 1.1 augustss }
1604 1.1 augustss
1605 1.1 augustss /* Close a device bulk pipe. */
1606 1.1 augustss void
1607 1.1 augustss uhci_device_bulk_close(pipe)
1608 1.1 augustss usbd_pipe_handle pipe;
1609 1.1 augustss {
1610 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1611 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1612 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1613 1.1 augustss
1614 1.1 augustss uhci_free_sqh(sc, upipe->u.bulk.sqh);
1615 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1616 1.1 augustss /* XXX free other resources */
1617 1.1 augustss }
1618 1.1 augustss
1619 1.1 augustss usbd_status
1620 1.56.2.1 wrstuden uhci_device_ctrl_transfer(xfer)
1621 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1622 1.1 augustss {
1623 1.56.2.1 wrstuden usbd_status err;
1624 1.16 augustss
1625 1.52 augustss /* Insert last in queue. */
1626 1.56.2.1 wrstuden err = usb_insert_transfer(xfer);
1627 1.56.2.1 wrstuden if (err)
1628 1.56.2.1 wrstuden return (err);
1629 1.52 augustss
1630 1.56.2.1 wrstuden /* Pipe isn't running (otherwise err would be USBD_INPROG),
1631 1.56.2.1 wrstuden * start first
1632 1.56.2.1 wrstuden */
1633 1.56.2.1 wrstuden return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1634 1.16 augustss }
1635 1.16 augustss
1636 1.16 augustss usbd_status
1637 1.56.2.1 wrstuden uhci_device_ctrl_start(xfer)
1638 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1639 1.16 augustss {
1640 1.56.2.1 wrstuden uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
1641 1.56.2.1 wrstuden usbd_status err;
1642 1.1 augustss
1643 1.48 augustss #ifdef DIAGNOSTIC
1644 1.56.2.1 wrstuden if (!(xfer->rqflags & URQ_REQUEST))
1645 1.1 augustss panic("uhci_device_ctrl_transfer: not a request\n");
1646 1.48 augustss #endif
1647 1.1 augustss
1648 1.56.2.1 wrstuden err = uhci_device_request(xfer);
1649 1.56.2.1 wrstuden if (err)
1650 1.56.2.1 wrstuden return (err);
1651 1.1 augustss
1652 1.9 augustss if (sc->sc_bus.use_polling)
1653 1.56.2.1 wrstuden uhci_waitintr(sc, xfer);
1654 1.1 augustss return (USBD_IN_PROGRESS);
1655 1.1 augustss }
1656 1.1 augustss
1657 1.1 augustss usbd_status
1658 1.56.2.1 wrstuden uhci_device_intr_transfer(xfer)
1659 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1660 1.1 augustss {
1661 1.56.2.1 wrstuden usbd_status err;
1662 1.16 augustss
1663 1.52 augustss /* Insert last in queue. */
1664 1.56.2.1 wrstuden err = usb_insert_transfer(xfer);
1665 1.56.2.1 wrstuden if (err)
1666 1.56.2.1 wrstuden return (err);
1667 1.52 augustss
1668 1.56.2.1 wrstuden /* Pipe isn't running (otherwise err would be USBD_INPROG),
1669 1.56.2.1 wrstuden * start first
1670 1.56.2.1 wrstuden */
1671 1.56.2.1 wrstuden return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1672 1.16 augustss }
1673 1.16 augustss
1674 1.16 augustss usbd_status
1675 1.56.2.1 wrstuden uhci_device_intr_start(xfer)
1676 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1677 1.16 augustss {
1678 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1679 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1680 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1681 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1682 1.55 augustss uhci_soft_td_t *data, *dataend;
1683 1.1 augustss uhci_soft_qh_t *sqh;
1684 1.56.2.1 wrstuden usbd_status err;
1685 1.49 augustss int i, s;
1686 1.1 augustss
1687 1.56.2.1 wrstuden DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
1688 1.56.2.1 wrstuden xfer, xfer->length, xfer->flags));
1689 1.1 augustss
1690 1.48 augustss #ifdef DIAGNOSTIC
1691 1.56.2.1 wrstuden if (xfer->rqflags & URQ_REQUEST)
1692 1.1 augustss panic("uhci_device_intr_transfer: a request\n");
1693 1.48 augustss #endif
1694 1.1 augustss
1695 1.56.2.1 wrstuden err = uhci_alloc_std_chain(upipe, sc, xfer->length, 1,
1696 1.56.2.1 wrstuden xfer->flags & USBD_SHORT_XFER_OK,
1697 1.56.2.1 wrstuden &xfer->dmabuf, &data, &dataend);
1698 1.56.2.1 wrstuden if (err)
1699 1.56.2.1 wrstuden return (err);
1700 1.55 augustss dataend->td.td_status |= LE(UHCI_TD_IOC);
1701 1.1 augustss
1702 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
1703 1.1 augustss if (uhcidebug > 10) {
1704 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
1705 1.55 augustss uhci_dump_tds(data);
1706 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1707 1.1 augustss }
1708 1.1 augustss #endif
1709 1.1 augustss
1710 1.1 augustss s = splusb();
1711 1.1 augustss /* Set up interrupt info. */
1712 1.56.2.1 wrstuden ii->xfer = xfer;
1713 1.55 augustss ii->stdstart = data;
1714 1.55 augustss ii->stdend = dataend;
1715 1.56.2.1 wrstuden #if defined(__FreeBSD__)
1716 1.56.2.1 wrstuden callout_handle_init(&ii->timeout_handle);
1717 1.56.2.1 wrstuden #endif
1718 1.7 augustss #ifdef DIAGNOSTIC
1719 1.56.2.1 wrstuden if (!ii->isdone) {
1720 1.56.2.1 wrstuden printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
1721 1.56.2.1 wrstuden }
1722 1.7 augustss ii->isdone = 0;
1723 1.7 augustss #endif
1724 1.1 augustss
1725 1.12 augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
1726 1.12 augustss upipe->u.intr.qhs[0]));
1727 1.1 augustss for (i = 0; i < upipe->u.intr.npoll; i++) {
1728 1.1 augustss sqh = upipe->u.intr.qhs[i];
1729 1.55 augustss sqh->elink = data;
1730 1.55 augustss sqh->qh.qh_elink = LE(data->physaddr);
1731 1.1 augustss }
1732 1.1 augustss splx(s);
1733 1.1 augustss
1734 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
1735 1.1 augustss if (uhcidebug > 10) {
1736 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
1737 1.55 augustss uhci_dump_tds(data);
1738 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1739 1.1 augustss }
1740 1.1 augustss #endif
1741 1.1 augustss
1742 1.1 augustss return (USBD_IN_PROGRESS);
1743 1.1 augustss }
1744 1.1 augustss
1745 1.1 augustss /* Abort a device control request. */
1746 1.1 augustss void
1747 1.56.2.1 wrstuden uhci_device_ctrl_abort(xfer)
1748 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1749 1.1 augustss {
1750 1.33 augustss DPRINTF(("uhci_device_ctrl_abort:\n"));
1751 1.56.2.1 wrstuden uhci_abort_xfer(xfer, USBD_CANCELLED);
1752 1.1 augustss }
1753 1.1 augustss
1754 1.1 augustss /* Close a device control pipe. */
1755 1.1 augustss void
1756 1.1 augustss uhci_device_ctrl_close(pipe)
1757 1.1 augustss usbd_pipe_handle pipe;
1758 1.1 augustss {
1759 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1760 1.1 augustss
1761 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1762 1.56.2.1 wrstuden /* XXX free other resources? */
1763 1.1 augustss }
1764 1.1 augustss
1765 1.1 augustss /* Abort a device interrupt request. */
1766 1.1 augustss void
1767 1.56.2.1 wrstuden uhci_device_intr_abort(xfer)
1768 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1769 1.1 augustss {
1770 1.56.2.1 wrstuden DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
1771 1.56.2.1 wrstuden if (xfer->pipe->intrxfer == xfer) {
1772 1.36 augustss DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
1773 1.56.2.1 wrstuden xfer->pipe->intrxfer = 0;
1774 1.1 augustss }
1775 1.56.2.1 wrstuden uhci_abort_xfer(xfer, USBD_CANCELLED);
1776 1.1 augustss }
1777 1.1 augustss
1778 1.1 augustss /* Close a device interrupt pipe. */
1779 1.1 augustss void
1780 1.1 augustss uhci_device_intr_close(pipe)
1781 1.1 augustss usbd_pipe_handle pipe;
1782 1.1 augustss {
1783 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1784 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1785 1.1 augustss int i, s, npoll;
1786 1.1 augustss
1787 1.1 augustss upipe->iinfo->stdstart = 0; /* inactive */
1788 1.1 augustss
1789 1.1 augustss /* Unlink descriptors from controller data structures. */
1790 1.1 augustss npoll = upipe->u.intr.npoll;
1791 1.1 augustss uhci_lock_frames(sc);
1792 1.1 augustss for (i = 0; i < npoll; i++)
1793 1.1 augustss uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos,
1794 1.1 augustss upipe->u.intr.qhs[i]);
1795 1.1 augustss uhci_unlock_frames(sc);
1796 1.1 augustss
1797 1.1 augustss /*
1798 1.1 augustss * We now have to wait for any activity on the physical
1799 1.1 augustss * descriptors to stop.
1800 1.1 augustss */
1801 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
1802 1.1 augustss
1803 1.1 augustss for(i = 0; i < npoll; i++)
1804 1.1 augustss uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
1805 1.31 augustss free(upipe->u.intr.qhs, M_USBHC);
1806 1.1 augustss
1807 1.1 augustss s = splusb();
1808 1.1 augustss LIST_REMOVE(upipe->iinfo, list); /* remove from active list */
1809 1.1 augustss splx(s);
1810 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1811 1.1 augustss
1812 1.1 augustss /* XXX free other resources */
1813 1.1 augustss }
1814 1.1 augustss
1815 1.1 augustss usbd_status
1816 1.56.2.1 wrstuden uhci_device_request(xfer)
1817 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1818 1.1 augustss {
1819 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1820 1.56.2.1 wrstuden usb_device_request_t *req = &xfer->request;
1821 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1822 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1823 1.1 augustss int addr = dev->address;
1824 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1825 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1826 1.55 augustss uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
1827 1.1 augustss uhci_soft_qh_t *sqh;
1828 1.1 augustss int len;
1829 1.1 augustss u_int32_t ls;
1830 1.56.2.1 wrstuden usbd_status err;
1831 1.1 augustss int isread;
1832 1.1 augustss int s;
1833 1.1 augustss
1834 1.13 augustss DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
1835 1.12 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1836 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1837 1.1 augustss UGETW(req->wIndex), UGETW(req->wLength),
1838 1.1 augustss addr, endpt));
1839 1.1 augustss
1840 1.1 augustss ls = dev->lowspeed ? UHCI_TD_LS : 0;
1841 1.1 augustss isread = req->bmRequestType & UT_READ;
1842 1.1 augustss len = UGETW(req->wLength);
1843 1.1 augustss
1844 1.1 augustss setup = upipe->u.ctl.setup;
1845 1.1 augustss stat = upipe->u.ctl.stat;
1846 1.1 augustss sqh = upipe->u.ctl.sqh;
1847 1.1 augustss
1848 1.1 augustss /* Set up data transaction */
1849 1.1 augustss if (len != 0) {
1850 1.38 augustss upipe->nexttoggle = 1;
1851 1.56.2.1 wrstuden err = uhci_alloc_std_chain(upipe, sc, len, isread,
1852 1.56.2.1 wrstuden xfer->flags & USBD_SHORT_XFER_OK,
1853 1.56.2.1 wrstuden &xfer->dmabuf, &data, &dataend);
1854 1.56.2.1 wrstuden if (err)
1855 1.56.2.1 wrstuden return (err);
1856 1.55 augustss next = data;
1857 1.55 augustss dataend->link.std = stat;
1858 1.56.2.1 wrstuden dataend->td.td_link = LE(stat->physaddr | UHCI_PTR_VF);
1859 1.1 augustss } else {
1860 1.1 augustss next = stat;
1861 1.1 augustss }
1862 1.1 augustss upipe->u.ctl.length = len;
1863 1.1 augustss
1864 1.1 augustss memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
1865 1.1 augustss
1866 1.42 augustss setup->link.std = next;
1867 1.56.2.1 wrstuden setup->td.td_link = LE(next->physaddr | UHCI_PTR_VF);
1868 1.42 augustss setup->td.td_status = LE(UHCI_TD_SET_ERRCNT(3) | ls | UHCI_TD_ACTIVE);
1869 1.42 augustss setup->td.td_token = LE(UHCI_TD_SETUP(sizeof *req, endpt, addr));
1870 1.42 augustss setup->td.td_buffer = LE(DMAADDR(&upipe->u.ctl.reqdma));
1871 1.42 augustss
1872 1.42 augustss stat->link.std = 0;
1873 1.42 augustss stat->td.td_link = LE(UHCI_PTR_T);
1874 1.42 augustss stat->td.td_status = LE(UHCI_TD_SET_ERRCNT(3) | ls |
1875 1.39 augustss UHCI_TD_ACTIVE | UHCI_TD_IOC);
1876 1.42 augustss stat->td.td_token =
1877 1.39 augustss LE(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
1878 1.39 augustss UHCI_TD_IN (0, endpt, addr, 1));
1879 1.42 augustss stat->td.td_buffer = LE(0);
1880 1.1 augustss
1881 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
1882 1.56.2.1 wrstuden if (uhcidebug > 10) {
1883 1.47 augustss DPRINTF(("uhci_device_request: before transfer\n"));
1884 1.41 augustss uhci_dump_tds(setup);
1885 1.1 augustss }
1886 1.1 augustss #endif
1887 1.1 augustss
1888 1.1 augustss /* Set up interrupt info. */
1889 1.56.2.1 wrstuden ii->xfer = xfer;
1890 1.1 augustss ii->stdstart = setup;
1891 1.1 augustss ii->stdend = stat;
1892 1.56.2.1 wrstuden #if defined(__FreeBSD__)
1893 1.56.2.1 wrstuden callout_handle_init(&ii->timeout_handle);
1894 1.56.2.1 wrstuden #endif
1895 1.7 augustss #ifdef DIAGNOSTIC
1896 1.56.2.1 wrstuden if (!ii->isdone) {
1897 1.56.2.1 wrstuden printf("uhci_device_request: not done, ii=%p\n", ii);
1898 1.56.2.1 wrstuden }
1899 1.7 augustss ii->isdone = 0;
1900 1.7 augustss #endif
1901 1.1 augustss
1902 1.42 augustss sqh->elink = setup;
1903 1.42 augustss sqh->qh.qh_elink = LE(setup->physaddr);
1904 1.1 augustss sqh->intr_info = ii;
1905 1.1 augustss
1906 1.1 augustss s = splusb();
1907 1.1 augustss uhci_add_ctrl(sc, sqh);
1908 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1909 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
1910 1.1 augustss if (uhcidebug > 12) {
1911 1.1 augustss uhci_soft_td_t *std;
1912 1.1 augustss uhci_soft_qh_t *xqh;
1913 1.13 augustss uhci_soft_qh_t *sxqh;
1914 1.13 augustss int maxqh = 0;
1915 1.1 augustss uhci_physaddr_t link;
1916 1.47 augustss DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
1917 1.1 augustss for (std = sc->sc_vframes[0].htd, link = 0;
1918 1.1 augustss (link & UHCI_PTR_Q) == 0;
1919 1.42 augustss std = std->link.std) {
1920 1.42 augustss link = LE(std->td.td_link);
1921 1.1 augustss uhci_dump_td(std);
1922 1.1 augustss }
1923 1.56.2.1 wrstuden sxqh = (uhci_soft_qh_t *)std;
1924 1.56.2.1 wrstuden uhci_dump_qh(sxqh);
1925 1.56.2.1 wrstuden for (xqh = sxqh;
1926 1.56.2.1 wrstuden xqh != NULL;
1927 1.42 augustss xqh = (maxqh++ == 5 || xqh->hlink==sxqh ||
1928 1.42 augustss xqh->hlink==xqh ? NULL : xqh->hlink)) {
1929 1.1 augustss uhci_dump_qh(xqh);
1930 1.13 augustss }
1931 1.47 augustss DPRINTF(("Enqueued QH:\n"));
1932 1.1 augustss uhci_dump_qh(sqh);
1933 1.42 augustss uhci_dump_tds(sqh->elink);
1934 1.1 augustss }
1935 1.1 augustss #endif
1936 1.56.2.1 wrstuden if (xfer->timeout && !sc->sc_bus.use_polling) {
1937 1.13 augustss usb_timeout(uhci_timeout, ii,
1938 1.56.2.1 wrstuden MS_TO_TICKS(xfer->timeout), ii->timeout_handle);
1939 1.13 augustss }
1940 1.1 augustss splx(s);
1941 1.1 augustss
1942 1.1 augustss return (USBD_NORMAL_COMPLETION);
1943 1.1 augustss }
1944 1.1 augustss
1945 1.16 augustss usbd_status
1946 1.56.2.1 wrstuden uhci_device_isoc_transfer(xfer)
1947 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1948 1.16 augustss {
1949 1.56.2.1 wrstuden usbd_status err;
1950 1.48 augustss
1951 1.56.2.1 wrstuden DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
1952 1.48 augustss
1953 1.48 augustss /* Put it on our queue, */
1954 1.56.2.1 wrstuden err = usb_insert_transfer(xfer);
1955 1.48 augustss
1956 1.48 augustss /* bail out on error, */
1957 1.56.2.1 wrstuden if (err && err != USBD_IN_PROGRESS)
1958 1.56.2.1 wrstuden return (err);
1959 1.48 augustss
1960 1.48 augustss /* XXX should check inuse here */
1961 1.48 augustss
1962 1.48 augustss /* insert into schedule, */
1963 1.56.2.1 wrstuden uhci_device_isoc_enter(xfer);
1964 1.48 augustss
1965 1.48 augustss /* and put on interrupt list if the pipe wasn't running */
1966 1.56.2.1 wrstuden if (!err)
1967 1.56.2.1 wrstuden uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
1968 1.48 augustss
1969 1.56.2.1 wrstuden return (err);
1970 1.48 augustss }
1971 1.48 augustss
1972 1.48 augustss void
1973 1.56.2.1 wrstuden uhci_device_isoc_enter(xfer)
1974 1.56.2.1 wrstuden usbd_xfer_handle xfer;
1975 1.48 augustss {
1976 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1977 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
1978 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1979 1.48 augustss struct iso *iso = &upipe->u.iso;
1980 1.48 augustss uhci_soft_td_t *std;
1981 1.48 augustss u_int32_t buf, len, status;
1982 1.48 augustss int s, i, next, nframes;
1983 1.48 augustss
1984 1.56.2.1 wrstuden DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
1985 1.48 augustss "nframes=%d\n",
1986 1.56.2.1 wrstuden iso->inuse, iso->next, xfer, xfer->nframes));
1987 1.48 augustss
1988 1.56.2.1 wrstuden if (xfer->status == USBD_IN_PROGRESS) {
1989 1.48 augustss /* This request has already been entered into the frame list */
1990 1.56.2.1 wrstuden /* XXX */
1991 1.48 augustss }
1992 1.48 augustss
1993 1.48 augustss #ifdef DIAGNOSTIC
1994 1.48 augustss if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
1995 1.48 augustss printf("uhci_device_isoc_enter: overflow!\n");
1996 1.19 augustss #endif
1997 1.16 augustss
1998 1.48 augustss next = iso->next;
1999 1.48 augustss if (next == -1) {
2000 1.48 augustss /* Not in use yet, schedule it a few frames ahead. */
2001 1.48 augustss next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2002 1.48 augustss DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2003 1.48 augustss }
2004 1.48 augustss
2005 1.56.2.1 wrstuden xfer->status = USBD_IN_PROGRESS;
2006 1.56.2.1 wrstuden xfer->hcprivint = next;
2007 1.48 augustss
2008 1.56.2.1 wrstuden buf = DMAADDR(&xfer->dmabuf);
2009 1.48 augustss status = LE(UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2010 1.48 augustss UHCI_TD_ACTIVE |
2011 1.48 augustss UHCI_TD_IOS));
2012 1.56.2.1 wrstuden nframes = xfer->nframes;
2013 1.48 augustss s = splusb();
2014 1.48 augustss for (i = 0; i < nframes; i++) {
2015 1.48 augustss std = iso->stds[next];
2016 1.48 augustss if (++next >= UHCI_VFRAMELIST_COUNT)
2017 1.48 augustss next = 0;
2018 1.56.2.1 wrstuden len = xfer->frlengths[i];
2019 1.48 augustss std->td.td_buffer = LE(buf);
2020 1.48 augustss if (i == nframes - 1)
2021 1.48 augustss status |= LE(UHCI_TD_IOC);
2022 1.48 augustss std->td.td_status = status;
2023 1.48 augustss std->td.td_token &= LE(~UHCI_TD_MAXLEN_MASK);
2024 1.48 augustss std->td.td_token |= LE(UHCI_TD_SET_MAXLEN(len));
2025 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
2026 1.48 augustss if (uhcidebug > 5) {
2027 1.48 augustss DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2028 1.48 augustss uhci_dump_td(std);
2029 1.48 augustss }
2030 1.48 augustss #endif
2031 1.48 augustss buf += len;
2032 1.48 augustss }
2033 1.48 augustss iso->next = next;
2034 1.56.2.1 wrstuden iso->inuse += xfer->nframes;
2035 1.16 augustss
2036 1.48 augustss splx(s);
2037 1.16 augustss }
2038 1.16 augustss
2039 1.16 augustss usbd_status
2040 1.56.2.1 wrstuden uhci_device_isoc_start(xfer)
2041 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2042 1.16 augustss {
2043 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2044 1.48 augustss uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2045 1.48 augustss uhci_intr_info_t *ii = upipe->iinfo;
2046 1.48 augustss uhci_soft_td_t *end;
2047 1.48 augustss int s, i;
2048 1.48 augustss
2049 1.48 augustss #ifdef DIAGNOSTIC
2050 1.56.2.1 wrstuden if (xfer->status != USBD_IN_PROGRESS)
2051 1.56.2.1 wrstuden printf("uhci_device_isoc_start: not in progress %p\n", xfer);
2052 1.48 augustss #endif
2053 1.48 augustss
2054 1.48 augustss /* Find the last TD */
2055 1.56.2.1 wrstuden i = xfer->hcprivint + xfer->nframes;
2056 1.48 augustss if (i >= UHCI_VFRAMELIST_COUNT)
2057 1.48 augustss i -= UHCI_VFRAMELIST_COUNT;
2058 1.48 augustss end = upipe->u.iso.stds[i];
2059 1.48 augustss
2060 1.48 augustss s = splusb();
2061 1.48 augustss
2062 1.48 augustss /* Set up interrupt info. */
2063 1.56.2.1 wrstuden ii->xfer = xfer;
2064 1.48 augustss ii->stdstart = end;
2065 1.48 augustss ii->stdend = end;
2066 1.56.2.1 wrstuden #if defined(__FreeBSD__)
2067 1.56.2.1 wrstuden callout_handle_init(&ii->timeout_handle);
2068 1.56.2.1 wrstuden #endif
2069 1.48 augustss #ifdef DIAGNOSTIC
2070 1.56.2.1 wrstuden if (!ii->isdone) {
2071 1.56.2.1 wrstuden printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2072 1.56.2.1 wrstuden }
2073 1.48 augustss ii->isdone = 0;
2074 1.48 augustss #endif
2075 1.48 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
2076 1.48 augustss
2077 1.48 augustss splx(s);
2078 1.48 augustss
2079 1.48 augustss return (USBD_IN_PROGRESS);
2080 1.16 augustss }
2081 1.16 augustss
2082 1.16 augustss void
2083 1.56.2.1 wrstuden uhci_device_isoc_abort(xfer)
2084 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2085 1.16 augustss {
2086 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2087 1.48 augustss uhci_intr_info_t *ii = upipe->iinfo;
2088 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
2089 1.48 augustss uhci_soft_td_t *std;
2090 1.48 augustss int i, n, nframes;
2091 1.48 augustss
2092 1.48 augustss /* Make interrupt routine ignore it, */
2093 1.56.2.1 wrstuden xfer->status = USBD_CANCELLED;
2094 1.48 augustss
2095 1.48 augustss /* make hardware ignore it, */
2096 1.56.2.1 wrstuden nframes = xfer->nframes;
2097 1.56.2.1 wrstuden n = xfer->hcprivint;
2098 1.48 augustss for (i = 0; i < nframes; i++) {
2099 1.48 augustss std = stds[n];
2100 1.48 augustss std->td.td_status &= LE(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2101 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
2102 1.48 augustss n = 0;
2103 1.48 augustss }
2104 1.48 augustss
2105 1.56.2.1 wrstuden xfer->hcpriv = ii;
2106 1.48 augustss
2107 1.48 augustss /* make sure hardware has completed, */
2108 1.56.2.1 wrstuden if (xfer->device->bus->intr_context) {
2109 1.50 augustss /* We have no process context, so we can't use tsleep(). */
2110 1.56.2.1 wrstuden timeout(uhci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND);
2111 1.50 augustss } else {
2112 1.56.2.1 wrstuden usb_delay_ms(xfer->pipe->device->bus, 1);
2113 1.48 augustss /* and call final part of interrupt handler. */
2114 1.56.2.1 wrstuden uhci_abort_xfer_end(xfer);
2115 1.48 augustss }
2116 1.16 augustss }
2117 1.16 augustss
2118 1.16 augustss void
2119 1.16 augustss uhci_device_isoc_close(pipe)
2120 1.16 augustss usbd_pipe_handle pipe;
2121 1.16 augustss {
2122 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2123 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2124 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2125 1.48 augustss uhci_soft_td_t *std, *vstd;
2126 1.16 augustss struct iso *iso;
2127 1.16 augustss int i;
2128 1.16 augustss
2129 1.16 augustss /*
2130 1.16 augustss * Make sure all TDs are marked as inactive.
2131 1.16 augustss * Wait for completion.
2132 1.16 augustss * Unschedule.
2133 1.16 augustss * Deallocate.
2134 1.16 augustss */
2135 1.16 augustss iso = &upipe->u.iso;
2136 1.16 augustss
2137 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2138 1.42 augustss iso->stds[i]->td.td_status &= LE(~UHCI_TD_ACTIVE);
2139 1.20 augustss usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2140 1.16 augustss
2141 1.16 augustss uhci_lock_frames(sc);
2142 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2143 1.16 augustss std = iso->stds[i];
2144 1.48 augustss for (vstd = sc->sc_vframes[i].htd;
2145 1.56.2.1 wrstuden vstd != NULL && vstd->link.std != std;
2146 1.42 augustss vstd = vstd->link.std)
2147 1.16 augustss ;
2148 1.56.2.1 wrstuden if (vstd == NULL) {
2149 1.16 augustss /*panic*/
2150 1.16 augustss printf("uhci_device_isoc_close: %p not found\n", std);
2151 1.16 augustss uhci_unlock_frames(sc);
2152 1.16 augustss return;
2153 1.16 augustss }
2154 1.42 augustss vstd->link = std->link;
2155 1.42 augustss vstd->td.td_link = std->td.td_link;
2156 1.16 augustss uhci_free_std(sc, std);
2157 1.16 augustss }
2158 1.16 augustss uhci_unlock_frames(sc);
2159 1.16 augustss
2160 1.31 augustss free(iso->stds, M_USBHC);
2161 1.16 augustss }
2162 1.16 augustss
2163 1.16 augustss usbd_status
2164 1.48 augustss uhci_setup_isoc(pipe)
2165 1.16 augustss usbd_pipe_handle pipe;
2166 1.16 augustss {
2167 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2168 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2169 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2170 1.16 augustss int addr = upipe->pipe.device->address;
2171 1.16 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2172 1.45 augustss int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2173 1.48 augustss uhci_soft_td_t *std, *vstd;
2174 1.48 augustss u_int32_t token;
2175 1.16 augustss struct iso *iso;
2176 1.16 augustss int i;
2177 1.16 augustss
2178 1.16 augustss iso = &upipe->u.iso;
2179 1.16 augustss iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2180 1.31 augustss M_USBHC, M_WAITOK);
2181 1.16 augustss
2182 1.48 augustss token = LE(rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2183 1.48 augustss UHCI_TD_OUT(0, endpt, addr, 0));
2184 1.16 augustss
2185 1.48 augustss /* Allocate the TDs and mark as inactive; */
2186 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2187 1.48 augustss std = uhci_alloc_std(sc);
2188 1.48 augustss if (std == 0)
2189 1.48 augustss goto bad;
2190 1.48 augustss std->td.td_status = LE(UHCI_TD_IOS); /* iso, inactive */
2191 1.48 augustss std->td.td_token = token;
2192 1.48 augustss iso->stds[i] = std;
2193 1.16 augustss }
2194 1.16 augustss
2195 1.48 augustss /* Insert TDs into schedule. */
2196 1.16 augustss uhci_lock_frames(sc);
2197 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2198 1.16 augustss std = iso->stds[i];
2199 1.48 augustss vstd = sc->sc_vframes[i].htd;
2200 1.42 augustss std->link = vstd->link;
2201 1.42 augustss std->td.td_link = vstd->td.td_link;
2202 1.42 augustss vstd->link.std = std;
2203 1.42 augustss vstd->td.td_link = LE(std->physaddr);
2204 1.16 augustss }
2205 1.16 augustss uhci_unlock_frames(sc);
2206 1.16 augustss
2207 1.48 augustss iso->next = -1;
2208 1.48 augustss iso->inuse = 0;
2209 1.48 augustss
2210 1.16 augustss return (USBD_NORMAL_COMPLETION);
2211 1.16 augustss
2212 1.48 augustss bad:
2213 1.16 augustss while (--i >= 0)
2214 1.16 augustss uhci_free_std(sc, iso->stds[i]);
2215 1.31 augustss free(iso->stds, M_USBHC);
2216 1.16 augustss return (USBD_NOMEM);
2217 1.16 augustss }
2218 1.16 augustss
2219 1.16 augustss void
2220 1.56.2.1 wrstuden uhci_device_isoc_done(xfer)
2221 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2222 1.16 augustss {
2223 1.56.2.1 wrstuden uhci_intr_info_t *ii = xfer->hcpriv;
2224 1.48 augustss
2225 1.56.2.1 wrstuden DPRINTFN(4, ("uhci_isoc_done: length=%d\n", xfer->actlen));
2226 1.48 augustss
2227 1.48 augustss /* Turn off the interrupt since it is active even if the TD is not. */
2228 1.48 augustss ii->stdend->td.td_status &= LE(~UHCI_TD_IOC);
2229 1.48 augustss
2230 1.48 augustss LIST_REMOVE(ii, list); /* remove from active list */
2231 1.16 augustss }
2232 1.16 augustss
2233 1.1 augustss void
2234 1.56.2.1 wrstuden uhci_device_intr_done(xfer)
2235 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2236 1.1 augustss {
2237 1.56.2.1 wrstuden uhci_intr_info_t *ii = xfer->hcpriv;
2238 1.1 augustss uhci_softc_t *sc = ii->sc;
2239 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2240 1.1 augustss uhci_soft_qh_t *sqh;
2241 1.1 augustss int i, npoll;
2242 1.1 augustss
2243 1.56.2.1 wrstuden DPRINTFN(5, ("uhci_intr_done: length=%d\n", xfer->actlen));
2244 1.1 augustss
2245 1.1 augustss npoll = upipe->u.intr.npoll;
2246 1.1 augustss for(i = 0; i < npoll; i++) {
2247 1.1 augustss sqh = upipe->u.intr.qhs[i];
2248 1.42 augustss sqh->elink = 0;
2249 1.42 augustss sqh->qh.qh_elink = LE(UHCI_PTR_T);
2250 1.1 augustss }
2251 1.1 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
2252 1.1 augustss
2253 1.1 augustss /* XXX Wasteful. */
2254 1.56.2.1 wrstuden if (xfer->pipe->repeat) {
2255 1.55 augustss uhci_soft_td_t *data, *dataend;
2256 1.1 augustss
2257 1.1 augustss /* This alloc cannot fail since we freed the chain above. */
2258 1.56.2.1 wrstuden uhci_alloc_std_chain(upipe, sc, xfer->length, 1,
2259 1.56.2.1 wrstuden xfer->flags & USBD_SHORT_XFER_OK,
2260 1.56.2.1 wrstuden &xfer->dmabuf, &data, &dataend);
2261 1.55 augustss dataend->td.td_status |= LE(UHCI_TD_IOC);
2262 1.1 augustss
2263 1.56.2.1 wrstuden #ifdef UHCI_DEBUG
2264 1.1 augustss if (uhcidebug > 10) {
2265 1.55 augustss DPRINTF(("uhci_device_intr_done: data(1)\n"));
2266 1.55 augustss uhci_dump_tds(data);
2267 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2268 1.1 augustss }
2269 1.1 augustss #endif
2270 1.1 augustss
2271 1.55 augustss ii->stdstart = data;
2272 1.55 augustss ii->stdend = dataend;
2273 1.56.2.1 wrstuden #if defined(__FreeBSD__)
2274 1.56.2.1 wrstuden callout_handle_init(&ii->timeout_handle);
2275 1.56.2.1 wrstuden #endif
2276 1.7 augustss #ifdef DIAGNOSTIC
2277 1.56.2.1 wrstuden if (!ii->isdone) {
2278 1.56.2.1 wrstuden printf("uhci_device_intr_done: not done, ii=%p\n", ii);
2279 1.56.2.1 wrstuden }
2280 1.7 augustss ii->isdone = 0;
2281 1.7 augustss #endif
2282 1.1 augustss for (i = 0; i < npoll; i++) {
2283 1.1 augustss sqh = upipe->u.intr.qhs[i];
2284 1.55 augustss sqh->elink = data;
2285 1.55 augustss sqh->qh.qh_elink = LE(data->physaddr);
2286 1.1 augustss }
2287 1.1 augustss } else {
2288 1.1 augustss ii->stdstart = 0; /* mark as inactive */
2289 1.1 augustss }
2290 1.1 augustss }
2291 1.1 augustss
2292 1.1 augustss /* Deallocate request data structures */
2293 1.1 augustss void
2294 1.56.2.1 wrstuden uhci_device_ctrl_done(xfer)
2295 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2296 1.1 augustss {
2297 1.56.2.1 wrstuden uhci_intr_info_t *ii = xfer->hcpriv;
2298 1.1 augustss uhci_softc_t *sc = ii->sc;
2299 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2300 1.1 augustss
2301 1.7 augustss #ifdef DIAGNOSTIC
2302 1.56.2.1 wrstuden if (!(xfer->rqflags & URQ_REQUEST))
2303 1.1 augustss panic("uhci_ctrl_done: not a request\n");
2304 1.7 augustss #endif
2305 1.1 augustss
2306 1.1 augustss LIST_REMOVE(ii, list); /* remove from active list */
2307 1.1 augustss
2308 1.1 augustss uhci_remove_ctrl(sc, upipe->u.ctl.sqh);
2309 1.1 augustss
2310 1.49 augustss if (upipe->u.ctl.length != 0)
2311 1.42 augustss uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2312 1.49 augustss
2313 1.56.2.1 wrstuden DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", xfer->actlen));
2314 1.1 augustss }
2315 1.1 augustss
2316 1.1 augustss /* Deallocate request data structures */
2317 1.1 augustss void
2318 1.56.2.1 wrstuden uhci_device_bulk_done(xfer)
2319 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2320 1.1 augustss {
2321 1.56.2.1 wrstuden uhci_intr_info_t *ii = xfer->hcpriv;
2322 1.1 augustss uhci_softc_t *sc = ii->sc;
2323 1.56.2.1 wrstuden struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2324 1.1 augustss
2325 1.1 augustss LIST_REMOVE(ii, list); /* remove from active list */
2326 1.1 augustss
2327 1.1 augustss uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2328 1.32 augustss
2329 1.32 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
2330 1.32 augustss
2331 1.56.2.1 wrstuden DPRINTFN(5, ("uhci_bulk_done: length=%d\n", xfer->actlen));
2332 1.1 augustss }
2333 1.1 augustss
2334 1.1 augustss /* Add interrupt QH, called with vflock. */
2335 1.1 augustss void
2336 1.1 augustss uhci_add_intr(sc, n, sqh)
2337 1.1 augustss uhci_softc_t *sc;
2338 1.1 augustss int n;
2339 1.1 augustss uhci_soft_qh_t *sqh;
2340 1.1 augustss {
2341 1.1 augustss struct uhci_vframe *vf = &sc->sc_vframes[n];
2342 1.42 augustss uhci_soft_qh_t *eqh;
2343 1.1 augustss
2344 1.1 augustss DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh));
2345 1.42 augustss eqh = vf->eqh;
2346 1.42 augustss sqh->hlink = eqh->hlink;
2347 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2348 1.42 augustss eqh->hlink = sqh;
2349 1.42 augustss eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q);
2350 1.1 augustss vf->eqh = sqh;
2351 1.1 augustss vf->bandwidth++;
2352 1.1 augustss }
2353 1.1 augustss
2354 1.1 augustss /* Remove interrupt QH, called with vflock. */
2355 1.1 augustss void
2356 1.1 augustss uhci_remove_intr(sc, n, sqh)
2357 1.1 augustss uhci_softc_t *sc;
2358 1.1 augustss int n;
2359 1.1 augustss uhci_soft_qh_t *sqh;
2360 1.1 augustss {
2361 1.1 augustss struct uhci_vframe *vf = &sc->sc_vframes[n];
2362 1.1 augustss uhci_soft_qh_t *pqh;
2363 1.1 augustss
2364 1.1 augustss DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh));
2365 1.1 augustss
2366 1.42 augustss for (pqh = vf->hqh; pqh->hlink != sqh; pqh = pqh->hlink)
2367 1.56.2.1 wrstuden #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
2368 1.42 augustss if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) {
2369 1.47 augustss DPRINTF(("uhci_remove_intr: QH not found\n"));
2370 1.1 augustss return;
2371 1.1 augustss }
2372 1.1 augustss #else
2373 1.1 augustss ;
2374 1.1 augustss #endif
2375 1.42 augustss pqh->hlink = sqh->hlink;
2376 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2377 1.1 augustss if (vf->eqh == sqh)
2378 1.1 augustss vf->eqh = pqh;
2379 1.1 augustss vf->bandwidth--;
2380 1.1 augustss }
2381 1.1 augustss
2382 1.1 augustss usbd_status
2383 1.1 augustss uhci_device_setintr(sc, upipe, ival)
2384 1.1 augustss uhci_softc_t *sc;
2385 1.1 augustss struct uhci_pipe *upipe;
2386 1.1 augustss int ival;
2387 1.1 augustss {
2388 1.1 augustss uhci_soft_qh_t *sqh;
2389 1.1 augustss int i, npoll, s;
2390 1.1 augustss u_int bestbw, bw, bestoffs, offs;
2391 1.1 augustss
2392 1.1 augustss DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
2393 1.1 augustss if (ival == 0) {
2394 1.1 augustss printf("uhci_setintr: 0 interval\n");
2395 1.1 augustss return (USBD_INVAL);
2396 1.1 augustss }
2397 1.1 augustss
2398 1.1 augustss if (ival > UHCI_VFRAMELIST_COUNT)
2399 1.1 augustss ival = UHCI_VFRAMELIST_COUNT;
2400 1.1 augustss npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2401 1.1 augustss DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
2402 1.1 augustss
2403 1.1 augustss upipe->u.intr.npoll = npoll;
2404 1.1 augustss upipe->u.intr.qhs =
2405 1.31 augustss malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2406 1.1 augustss
2407 1.1 augustss /*
2408 1.1 augustss * Figure out which offset in the schedule that has most
2409 1.1 augustss * bandwidth left over.
2410 1.1 augustss */
2411 1.1 augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2412 1.1 augustss for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2413 1.1 augustss for (bw = i = 0; i < npoll; i++)
2414 1.1 augustss bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2415 1.1 augustss if (bw < bestbw) {
2416 1.1 augustss bestbw = bw;
2417 1.1 augustss bestoffs = offs;
2418 1.1 augustss }
2419 1.1 augustss }
2420 1.1 augustss DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2421 1.1 augustss
2422 1.1 augustss upipe->iinfo->stdstart = 0;
2423 1.1 augustss for(i = 0; i < npoll; i++) {
2424 1.1 augustss upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2425 1.42 augustss sqh->elink = 0;
2426 1.42 augustss sqh->qh.qh_elink = LE(UHCI_PTR_T);
2427 1.1 augustss sqh->pos = MOD(i * ival + bestoffs);
2428 1.1 augustss sqh->intr_info = upipe->iinfo;
2429 1.1 augustss }
2430 1.1 augustss #undef MOD
2431 1.1 augustss
2432 1.1 augustss s = splusb();
2433 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list);
2434 1.1 augustss splx(s);
2435 1.1 augustss
2436 1.1 augustss uhci_lock_frames(sc);
2437 1.1 augustss /* Enter QHs into the controller data structures. */
2438 1.1 augustss for(i = 0; i < npoll; i++)
2439 1.1 augustss uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos,
2440 1.1 augustss upipe->u.intr.qhs[i]);
2441 1.1 augustss uhci_unlock_frames(sc);
2442 1.1 augustss
2443 1.1 augustss DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
2444 1.1 augustss return (USBD_NORMAL_COMPLETION);
2445 1.1 augustss }
2446 1.1 augustss
2447 1.1 augustss /* Open a new pipe. */
2448 1.1 augustss usbd_status
2449 1.1 augustss uhci_open(pipe)
2450 1.1 augustss usbd_pipe_handle pipe;
2451 1.1 augustss {
2452 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2453 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2454 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2455 1.56.2.1 wrstuden usbd_status err;
2456 1.1 augustss
2457 1.1 augustss DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2458 1.1 augustss pipe, pipe->device->address,
2459 1.1 augustss ed->bEndpointAddress, sc->sc_addr));
2460 1.1 augustss if (pipe->device->address == sc->sc_addr) {
2461 1.1 augustss switch (ed->bEndpointAddress) {
2462 1.1 augustss case USB_CONTROL_ENDPOINT:
2463 1.1 augustss pipe->methods = &uhci_root_ctrl_methods;
2464 1.1 augustss break;
2465 1.45 augustss case UE_DIR_IN | UHCI_INTR_ENDPT:
2466 1.1 augustss pipe->methods = &uhci_root_intr_methods;
2467 1.1 augustss break;
2468 1.1 augustss default:
2469 1.1 augustss return (USBD_INVAL);
2470 1.1 augustss }
2471 1.1 augustss } else {
2472 1.1 augustss upipe->iinfo = uhci_alloc_intr_info(sc);
2473 1.1 augustss if (upipe->iinfo == 0)
2474 1.1 augustss return (USBD_NOMEM);
2475 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
2476 1.1 augustss case UE_CONTROL:
2477 1.1 augustss pipe->methods = &uhci_device_ctrl_methods;
2478 1.1 augustss upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2479 1.56.2.1 wrstuden if (upipe->u.ctl.sqh == NULL)
2480 1.5 augustss goto bad;
2481 1.1 augustss upipe->u.ctl.setup = uhci_alloc_std(sc);
2482 1.56.2.1 wrstuden if (upipe->u.ctl.setup == NULL) {
2483 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2484 1.5 augustss goto bad;
2485 1.5 augustss }
2486 1.1 augustss upipe->u.ctl.stat = uhci_alloc_std(sc);
2487 1.56.2.1 wrstuden if (upipe->u.ctl.stat == NULL) {
2488 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2489 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2490 1.5 augustss goto bad;
2491 1.5 augustss }
2492 1.56.2.1 wrstuden err = usb_allocmem(&sc->sc_bus,
2493 1.56.2.1 wrstuden sizeof(usb_device_request_t),
2494 1.56.2.1 wrstuden 0, &upipe->u.ctl.reqdma);
2495 1.56.2.1 wrstuden if (err) {
2496 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2497 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2498 1.5 augustss uhci_free_std(sc, upipe->u.ctl.stat);
2499 1.5 augustss goto bad;
2500 1.5 augustss }
2501 1.1 augustss break;
2502 1.1 augustss case UE_INTERRUPT:
2503 1.1 augustss pipe->methods = &uhci_device_intr_methods;
2504 1.1 augustss return (uhci_device_setintr(sc, upipe, ed->bInterval));
2505 1.1 augustss case UE_ISOCHRONOUS:
2506 1.16 augustss pipe->methods = &uhci_device_isoc_methods;
2507 1.48 augustss return (uhci_setup_isoc(pipe));
2508 1.1 augustss case UE_BULK:
2509 1.1 augustss pipe->methods = &uhci_device_bulk_methods;
2510 1.1 augustss upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2511 1.56.2.1 wrstuden if (upipe->u.bulk.sqh == NULL)
2512 1.5 augustss goto bad;
2513 1.1 augustss break;
2514 1.1 augustss }
2515 1.1 augustss }
2516 1.1 augustss return (USBD_NORMAL_COMPLETION);
2517 1.5 augustss
2518 1.5 augustss bad:
2519 1.5 augustss uhci_free_intr_info(upipe->iinfo);
2520 1.5 augustss return (USBD_NOMEM);
2521 1.1 augustss }
2522 1.1 augustss
2523 1.1 augustss /*
2524 1.1 augustss * Data structures and routines to emulate the root hub.
2525 1.1 augustss */
2526 1.1 augustss usb_device_descriptor_t uhci_devd = {
2527 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2528 1.1 augustss UDESC_DEVICE, /* type */
2529 1.1 augustss {0x00, 0x01}, /* USB version */
2530 1.1 augustss UCLASS_HUB, /* class */
2531 1.1 augustss USUBCLASS_HUB, /* subclass */
2532 1.1 augustss 0, /* protocol */
2533 1.1 augustss 64, /* max packet */
2534 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2535 1.1 augustss 1,2,0, /* string indicies */
2536 1.1 augustss 1 /* # of configurations */
2537 1.1 augustss };
2538 1.1 augustss
2539 1.1 augustss usb_config_descriptor_t uhci_confd = {
2540 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2541 1.1 augustss UDESC_CONFIG,
2542 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2543 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2544 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2545 1.1 augustss 1,
2546 1.1 augustss 1,
2547 1.1 augustss 0,
2548 1.1 augustss UC_SELF_POWERED,
2549 1.1 augustss 0 /* max power */
2550 1.1 augustss };
2551 1.1 augustss
2552 1.1 augustss usb_interface_descriptor_t uhci_ifcd = {
2553 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2554 1.1 augustss UDESC_INTERFACE,
2555 1.1 augustss 0,
2556 1.1 augustss 0,
2557 1.1 augustss 1,
2558 1.1 augustss UCLASS_HUB,
2559 1.1 augustss USUBCLASS_HUB,
2560 1.1 augustss 0,
2561 1.1 augustss 0
2562 1.1 augustss };
2563 1.1 augustss
2564 1.1 augustss usb_endpoint_descriptor_t uhci_endpd = {
2565 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
2566 1.1 augustss UDESC_ENDPOINT,
2567 1.45 augustss UE_DIR_IN | UHCI_INTR_ENDPT,
2568 1.1 augustss UE_INTERRUPT,
2569 1.1 augustss {8},
2570 1.1 augustss 255
2571 1.1 augustss };
2572 1.1 augustss
2573 1.1 augustss usb_hub_descriptor_t uhci_hubd_piix = {
2574 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
2575 1.1 augustss UDESC_HUB,
2576 1.1 augustss 2,
2577 1.1 augustss { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2578 1.1 augustss 50, /* power on to power good */
2579 1.1 augustss 0,
2580 1.1 augustss { 0x00 }, /* both ports are removable */
2581 1.1 augustss };
2582 1.1 augustss
2583 1.1 augustss int
2584 1.1 augustss uhci_str(p, l, s)
2585 1.1 augustss usb_string_descriptor_t *p;
2586 1.1 augustss int l;
2587 1.1 augustss char *s;
2588 1.1 augustss {
2589 1.1 augustss int i;
2590 1.1 augustss
2591 1.1 augustss if (l == 0)
2592 1.1 augustss return (0);
2593 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2594 1.1 augustss if (l == 1)
2595 1.1 augustss return (1);
2596 1.1 augustss p->bDescriptorType = UDESC_STRING;
2597 1.1 augustss l -= 2;
2598 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2599 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2600 1.1 augustss return (2*i+2);
2601 1.1 augustss }
2602 1.1 augustss
2603 1.1 augustss /*
2604 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2605 1.1 augustss */
2606 1.1 augustss usbd_status
2607 1.56.2.1 wrstuden uhci_root_ctrl_transfer(xfer)
2608 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2609 1.1 augustss {
2610 1.56.2.1 wrstuden usbd_status err;
2611 1.16 augustss
2612 1.52 augustss /* Insert last in queue. */
2613 1.56.2.1 wrstuden err = usb_insert_transfer(xfer);
2614 1.56.2.1 wrstuden if (err)
2615 1.56.2.1 wrstuden return (err);
2616 1.52 augustss
2617 1.56.2.1 wrstuden /* Pipe isn't running (otherwise err would be USBD_INPROG),
2618 1.56.2.1 wrstuden * start first
2619 1.56.2.1 wrstuden */
2620 1.56.2.1 wrstuden return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2621 1.16 augustss }
2622 1.16 augustss
2623 1.16 augustss usbd_status
2624 1.56.2.1 wrstuden uhci_root_ctrl_start(xfer)
2625 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2626 1.16 augustss {
2627 1.56.2.1 wrstuden uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2628 1.1 augustss usb_device_request_t *req;
2629 1.56.2.1 wrstuden void *buf = NULL;
2630 1.1 augustss int port, x;
2631 1.52 augustss int s, len, value, index, status, change, l, totlen = 0;
2632 1.1 augustss usb_port_status_t ps;
2633 1.56.2.1 wrstuden usbd_status err;
2634 1.1 augustss
2635 1.48 augustss #ifdef DIAGNOSTIC
2636 1.56.2.1 wrstuden if (!(xfer->rqflags & URQ_REQUEST))
2637 1.1 augustss panic("uhci_root_ctrl_transfer: not a request\n");
2638 1.48 augustss #endif
2639 1.56.2.1 wrstuden req = &xfer->request;
2640 1.1 augustss
2641 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
2642 1.1 augustss req->bmRequestType, req->bRequest));
2643 1.1 augustss
2644 1.1 augustss len = UGETW(req->wLength);
2645 1.1 augustss value = UGETW(req->wValue);
2646 1.1 augustss index = UGETW(req->wIndex);
2647 1.49 augustss
2648 1.49 augustss if (len != 0)
2649 1.56.2.1 wrstuden buf = KERNADDR(&xfer->dmabuf);
2650 1.49 augustss
2651 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2652 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2653 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2654 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2655 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2656 1.1 augustss /*
2657 1.13 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2658 1.1 augustss * for the integrated root hub.
2659 1.1 augustss */
2660 1.1 augustss break;
2661 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2662 1.1 augustss if (len > 0) {
2663 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2664 1.1 augustss totlen = 1;
2665 1.1 augustss }
2666 1.1 augustss break;
2667 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2668 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
2669 1.1 augustss switch(value >> 8) {
2670 1.1 augustss case UDESC_DEVICE:
2671 1.1 augustss if ((value & 0xff) != 0) {
2672 1.56.2.1 wrstuden err = USBD_IOERROR;
2673 1.1 augustss goto ret;
2674 1.1 augustss }
2675 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2676 1.27 augustss USETW(uhci_devd.idVendor, sc->sc_id_vendor);
2677 1.1 augustss memcpy(buf, &uhci_devd, l);
2678 1.1 augustss break;
2679 1.1 augustss case UDESC_CONFIG:
2680 1.1 augustss if ((value & 0xff) != 0) {
2681 1.56.2.1 wrstuden err = USBD_IOERROR;
2682 1.1 augustss goto ret;
2683 1.1 augustss }
2684 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2685 1.1 augustss memcpy(buf, &uhci_confd, l);
2686 1.1 augustss buf = (char *)buf + l;
2687 1.1 augustss len -= l;
2688 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2689 1.1 augustss totlen += l;
2690 1.1 augustss memcpy(buf, &uhci_ifcd, l);
2691 1.1 augustss buf = (char *)buf + l;
2692 1.1 augustss len -= l;
2693 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2694 1.1 augustss totlen += l;
2695 1.1 augustss memcpy(buf, &uhci_endpd, l);
2696 1.1 augustss break;
2697 1.1 augustss case UDESC_STRING:
2698 1.1 augustss if (len == 0)
2699 1.1 augustss break;
2700 1.1 augustss *(u_int8_t *)buf = 0;
2701 1.1 augustss totlen = 1;
2702 1.1 augustss switch (value & 0xff) {
2703 1.1 augustss case 1: /* Vendor */
2704 1.8 augustss totlen = uhci_str(buf, len, sc->sc_vendor);
2705 1.1 augustss break;
2706 1.1 augustss case 2: /* Product */
2707 1.8 augustss totlen = uhci_str(buf, len, "UHCI root hub");
2708 1.1 augustss break;
2709 1.1 augustss }
2710 1.1 augustss break;
2711 1.1 augustss default:
2712 1.56.2.1 wrstuden err = USBD_IOERROR;
2713 1.1 augustss goto ret;
2714 1.1 augustss }
2715 1.1 augustss break;
2716 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2717 1.1 augustss if (len > 0) {
2718 1.1 augustss *(u_int8_t *)buf = 0;
2719 1.1 augustss totlen = 1;
2720 1.1 augustss }
2721 1.1 augustss break;
2722 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2723 1.1 augustss if (len > 1) {
2724 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2725 1.1 augustss totlen = 2;
2726 1.1 augustss }
2727 1.1 augustss break;
2728 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2729 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2730 1.1 augustss if (len > 1) {
2731 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2732 1.1 augustss totlen = 2;
2733 1.1 augustss }
2734 1.1 augustss break;
2735 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2736 1.1 augustss if (value >= USB_MAX_DEVICES) {
2737 1.56.2.1 wrstuden err = USBD_IOERROR;
2738 1.1 augustss goto ret;
2739 1.1 augustss }
2740 1.1 augustss sc->sc_addr = value;
2741 1.1 augustss break;
2742 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2743 1.1 augustss if (value != 0 && value != 1) {
2744 1.56.2.1 wrstuden err = USBD_IOERROR;
2745 1.1 augustss goto ret;
2746 1.1 augustss }
2747 1.1 augustss sc->sc_conf = value;
2748 1.1 augustss break;
2749 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2750 1.1 augustss break;
2751 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2752 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2753 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2754 1.56.2.1 wrstuden err = USBD_IOERROR;
2755 1.1 augustss goto ret;
2756 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2757 1.1 augustss break;
2758 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2759 1.1 augustss break;
2760 1.1 augustss /* Hub requests */
2761 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2762 1.1 augustss break;
2763 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2764 1.12 augustss DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2765 1.12 augustss "port=%d feature=%d\n",
2766 1.1 augustss index, value));
2767 1.1 augustss if (index == 1)
2768 1.1 augustss port = UHCI_PORTSC1;
2769 1.1 augustss else if (index == 2)
2770 1.1 augustss port = UHCI_PORTSC2;
2771 1.1 augustss else {
2772 1.56.2.1 wrstuden err = USBD_IOERROR;
2773 1.1 augustss goto ret;
2774 1.1 augustss }
2775 1.1 augustss switch(value) {
2776 1.1 augustss case UHF_PORT_ENABLE:
2777 1.1 augustss x = UREAD2(sc, port);
2778 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
2779 1.1 augustss break;
2780 1.1 augustss case UHF_PORT_SUSPEND:
2781 1.1 augustss x = UREAD2(sc, port);
2782 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
2783 1.1 augustss break;
2784 1.1 augustss case UHF_PORT_RESET:
2785 1.1 augustss x = UREAD2(sc, port);
2786 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2787 1.1 augustss break;
2788 1.1 augustss case UHF_C_PORT_CONNECTION:
2789 1.1 augustss x = UREAD2(sc, port);
2790 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
2791 1.1 augustss break;
2792 1.1 augustss case UHF_C_PORT_ENABLE:
2793 1.1 augustss x = UREAD2(sc, port);
2794 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
2795 1.1 augustss break;
2796 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2797 1.1 augustss x = UREAD2(sc, port);
2798 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
2799 1.1 augustss break;
2800 1.1 augustss case UHF_C_PORT_RESET:
2801 1.1 augustss sc->sc_isreset = 0;
2802 1.56.2.1 wrstuden err = USBD_NORMAL_COMPLETION;
2803 1.1 augustss goto ret;
2804 1.1 augustss case UHF_PORT_CONNECTION:
2805 1.1 augustss case UHF_PORT_OVER_CURRENT:
2806 1.1 augustss case UHF_PORT_POWER:
2807 1.1 augustss case UHF_PORT_LOW_SPEED:
2808 1.1 augustss case UHF_C_PORT_SUSPEND:
2809 1.1 augustss default:
2810 1.56.2.1 wrstuden err = USBD_IOERROR;
2811 1.1 augustss goto ret;
2812 1.1 augustss }
2813 1.1 augustss break;
2814 1.1 augustss case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
2815 1.1 augustss if (index == 1)
2816 1.1 augustss port = UHCI_PORTSC1;
2817 1.1 augustss else if (index == 2)
2818 1.1 augustss port = UHCI_PORTSC2;
2819 1.1 augustss else {
2820 1.56.2.1 wrstuden err = USBD_IOERROR;
2821 1.1 augustss goto ret;
2822 1.1 augustss }
2823 1.1 augustss if (len > 0) {
2824 1.1 augustss *(u_int8_t *)buf =
2825 1.1 augustss (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
2826 1.1 augustss UHCI_PORTSC_LS_SHIFT;
2827 1.1 augustss totlen = 1;
2828 1.1 augustss }
2829 1.1 augustss break;
2830 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2831 1.1 augustss if (value != 0) {
2832 1.56.2.1 wrstuden err = USBD_IOERROR;
2833 1.1 augustss goto ret;
2834 1.1 augustss }
2835 1.1 augustss l = min(len, USB_HUB_DESCRIPTOR_SIZE);
2836 1.1 augustss totlen = l;
2837 1.1 augustss memcpy(buf, &uhci_hubd_piix, l);
2838 1.1 augustss break;
2839 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2840 1.1 augustss if (len != 4) {
2841 1.56.2.1 wrstuden err = USBD_IOERROR;
2842 1.1 augustss goto ret;
2843 1.1 augustss }
2844 1.1 augustss memset(buf, 0, len);
2845 1.1 augustss totlen = len;
2846 1.1 augustss break;
2847 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2848 1.1 augustss if (index == 1)
2849 1.1 augustss port = UHCI_PORTSC1;
2850 1.1 augustss else if (index == 2)
2851 1.1 augustss port = UHCI_PORTSC2;
2852 1.1 augustss else {
2853 1.56.2.1 wrstuden err = USBD_IOERROR;
2854 1.1 augustss goto ret;
2855 1.1 augustss }
2856 1.1 augustss if (len != 4) {
2857 1.56.2.1 wrstuden err = USBD_IOERROR;
2858 1.1 augustss goto ret;
2859 1.1 augustss }
2860 1.1 augustss x = UREAD2(sc, port);
2861 1.1 augustss status = change = 0;
2862 1.1 augustss if (x & UHCI_PORTSC_CCS )
2863 1.1 augustss status |= UPS_CURRENT_CONNECT_STATUS;
2864 1.1 augustss if (x & UHCI_PORTSC_CSC )
2865 1.1 augustss change |= UPS_C_CONNECT_STATUS;
2866 1.1 augustss if (x & UHCI_PORTSC_PE )
2867 1.1 augustss status |= UPS_PORT_ENABLED;
2868 1.1 augustss if (x & UHCI_PORTSC_POEDC)
2869 1.1 augustss change |= UPS_C_PORT_ENABLED;
2870 1.1 augustss if (x & UHCI_PORTSC_OCI )
2871 1.1 augustss status |= UPS_OVERCURRENT_INDICATOR;
2872 1.1 augustss if (x & UHCI_PORTSC_OCIC )
2873 1.1 augustss change |= UPS_C_OVERCURRENT_INDICATOR;
2874 1.1 augustss if (x & UHCI_PORTSC_SUSP )
2875 1.1 augustss status |= UPS_SUSPEND;
2876 1.1 augustss if (x & UHCI_PORTSC_LSDA )
2877 1.1 augustss status |= UPS_LOW_SPEED;
2878 1.1 augustss status |= UPS_PORT_POWER;
2879 1.1 augustss if (sc->sc_isreset)
2880 1.1 augustss change |= UPS_C_PORT_RESET;
2881 1.1 augustss USETW(ps.wPortStatus, status);
2882 1.1 augustss USETW(ps.wPortChange, change);
2883 1.1 augustss l = min(len, sizeof ps);
2884 1.1 augustss memcpy(buf, &ps, l);
2885 1.1 augustss totlen = l;
2886 1.1 augustss break;
2887 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2888 1.56.2.1 wrstuden err = USBD_IOERROR;
2889 1.1 augustss goto ret;
2890 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2891 1.1 augustss break;
2892 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2893 1.1 augustss if (index == 1)
2894 1.1 augustss port = UHCI_PORTSC1;
2895 1.1 augustss else if (index == 2)
2896 1.1 augustss port = UHCI_PORTSC2;
2897 1.1 augustss else {
2898 1.56.2.1 wrstuden err = USBD_IOERROR;
2899 1.1 augustss goto ret;
2900 1.1 augustss }
2901 1.1 augustss switch(value) {
2902 1.1 augustss case UHF_PORT_ENABLE:
2903 1.1 augustss x = UREAD2(sc, port);
2904 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2905 1.1 augustss break;
2906 1.1 augustss case UHF_PORT_SUSPEND:
2907 1.1 augustss x = UREAD2(sc, port);
2908 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
2909 1.1 augustss break;
2910 1.1 augustss case UHF_PORT_RESET:
2911 1.1 augustss x = UREAD2(sc, port);
2912 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2913 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
2914 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2915 1.1 augustss delay(100);
2916 1.1 augustss x = UREAD2(sc, port);
2917 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2918 1.1 augustss delay(100);
2919 1.1 augustss DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
2920 1.1 augustss index, UREAD2(sc, port)));
2921 1.1 augustss sc->sc_isreset = 1;
2922 1.1 augustss break;
2923 1.1 augustss case UHF_C_PORT_CONNECTION:
2924 1.1 augustss case UHF_C_PORT_ENABLE:
2925 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2926 1.1 augustss case UHF_PORT_CONNECTION:
2927 1.1 augustss case UHF_PORT_OVER_CURRENT:
2928 1.1 augustss case UHF_PORT_POWER:
2929 1.1 augustss case UHF_PORT_LOW_SPEED:
2930 1.1 augustss case UHF_C_PORT_SUSPEND:
2931 1.1 augustss case UHF_C_PORT_RESET:
2932 1.1 augustss default:
2933 1.56.2.1 wrstuden err = USBD_IOERROR;
2934 1.1 augustss goto ret;
2935 1.1 augustss }
2936 1.1 augustss break;
2937 1.1 augustss default:
2938 1.56.2.1 wrstuden err = USBD_IOERROR;
2939 1.1 augustss goto ret;
2940 1.1 augustss }
2941 1.56.2.1 wrstuden xfer->actlen = totlen;
2942 1.56.2.1 wrstuden err = USBD_NORMAL_COMPLETION;
2943 1.1 augustss ret:
2944 1.56.2.1 wrstuden xfer->status = err;
2945 1.56.2.1 wrstuden xfer->hcpriv = 0;
2946 1.52 augustss s = splusb();
2947 1.56.2.1 wrstuden usb_transfer_complete(xfer);
2948 1.52 augustss splx(s);
2949 1.1 augustss return (USBD_IN_PROGRESS);
2950 1.1 augustss }
2951 1.1 augustss
2952 1.1 augustss /* Abort a root control request. */
2953 1.1 augustss void
2954 1.56.2.1 wrstuden uhci_root_ctrl_abort(xfer)
2955 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2956 1.1 augustss {
2957 1.56.2.1 wrstuden /* Nothing to do, all transfers are synchronous. */
2958 1.1 augustss }
2959 1.1 augustss
2960 1.1 augustss /* Close the root pipe. */
2961 1.1 augustss void
2962 1.1 augustss uhci_root_ctrl_close(pipe)
2963 1.1 augustss usbd_pipe_handle pipe;
2964 1.1 augustss {
2965 1.1 augustss DPRINTF(("uhci_root_ctrl_close\n"));
2966 1.1 augustss }
2967 1.1 augustss
2968 1.1 augustss /* Abort a root interrupt request. */
2969 1.1 augustss void
2970 1.56.2.1 wrstuden uhci_root_intr_abort(xfer)
2971 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2972 1.1 augustss {
2973 1.56.2.1 wrstuden uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2974 1.56.2.1 wrstuden
2975 1.56.2.1 wrstuden usb_untimeout(uhci_timo, xfer, xfer->timo_handle);
2976 1.56.2.1 wrstuden sc->sc_has_timo = NULL;
2977 1.30 augustss
2978 1.56.2.1 wrstuden if (xfer->pipe->intrxfer == xfer) {
2979 1.56.2.1 wrstuden DPRINTF(("uhci_root_intr_abort: remove\n"));
2980 1.56.2.1 wrstuden xfer->pipe->intrxfer = 0;
2981 1.56.2.1 wrstuden }
2982 1.56.2.1 wrstuden xfer->status = USBD_CANCELLED;
2983 1.56.2.1 wrstuden usb_transfer_complete(xfer);
2984 1.1 augustss }
2985 1.1 augustss
2986 1.16 augustss usbd_status
2987 1.56.2.1 wrstuden uhci_root_intr_transfer(xfer)
2988 1.56.2.1 wrstuden usbd_xfer_handle xfer;
2989 1.16 augustss {
2990 1.56.2.1 wrstuden usbd_status err;
2991 1.16 augustss
2992 1.52 augustss /* Insert last in queue. */
2993 1.56.2.1 wrstuden err = usb_insert_transfer(xfer);
2994 1.56.2.1 wrstuden if (err)
2995 1.56.2.1 wrstuden return (err);
2996 1.52 augustss
2997 1.56.2.1 wrstuden /* Pipe isn't running (otherwise err would be USBD_INPROG),
2998 1.56.2.1 wrstuden * start first
2999 1.56.2.1 wrstuden */
3000 1.56.2.1 wrstuden return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3001 1.16 augustss }
3002 1.16 augustss
3003 1.1 augustss /* Start a transfer on the root interrupt pipe */
3004 1.1 augustss usbd_status
3005 1.56.2.1 wrstuden uhci_root_intr_start(xfer)
3006 1.56.2.1 wrstuden usbd_xfer_handle xfer;
3007 1.1 augustss {
3008 1.56.2.1 wrstuden usbd_pipe_handle pipe = xfer->pipe;
3009 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3010 1.1 augustss
3011 1.56.2.1 wrstuden DPRINTFN(3, ("uhci_root_intr_transfer: xfer=%p len=%d flags=%d\n",
3012 1.56.2.1 wrstuden xfer, xfer->length, xfer->flags));
3013 1.1 augustss
3014 1.56.2.1 wrstuden sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval);
3015 1.56.2.1 wrstuden usb_timeout(uhci_timo, xfer, sc->sc_ival, xfer->timo_handle);
3016 1.56.2.1 wrstuden sc->sc_has_timo = xfer;
3017 1.1 augustss return (USBD_IN_PROGRESS);
3018 1.1 augustss }
3019 1.1 augustss
3020 1.1 augustss /* Close the root interrupt pipe. */
3021 1.1 augustss void
3022 1.1 augustss uhci_root_intr_close(pipe)
3023 1.1 augustss usbd_pipe_handle pipe;
3024 1.1 augustss {
3025 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3026 1.30 augustss
3027 1.56.2.1 wrstuden usb_untimeout(uhci_timo, pipe->intrxfer, pipe->intrxfer->timo_handle);
3028 1.56.2.1 wrstuden sc->sc_has_timo = NULL;
3029 1.1 augustss DPRINTF(("uhci_root_intr_close\n"));
3030 1.1 augustss }
3031