uhci.c revision 1.59 1 1.59 augustss /* $NetBSD: uhci.c,v 1.59 1999/10/13 08:10:56 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Universal Host Controller driver.
42 1.28 augustss * Handles e.g. PIIX3 and PIIX4.
43 1.1 augustss *
44 1.1 augustss * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
45 1.1 augustss * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
46 1.1 augustss * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf
47 1.28 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
48 1.1 augustss */
49 1.1 augustss
50 1.1 augustss #include <sys/param.h>
51 1.1 augustss #include <sys/systm.h>
52 1.1 augustss #include <sys/kernel.h>
53 1.1 augustss #include <sys/malloc.h>
54 1.37 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
55 1.1 augustss #include <sys/device.h>
56 1.13 augustss #elif defined(__FreeBSD__)
57 1.13 augustss #include <sys/module.h>
58 1.13 augustss #include <sys/bus.h>
59 1.13 augustss #endif
60 1.1 augustss #include <sys/proc.h>
61 1.1 augustss #include <sys/queue.h>
62 1.1 augustss #include <sys/select.h>
63 1.1 augustss
64 1.35 augustss #if defined(__FreeBSD__)
65 1.35 augustss #include <machine/bus_pio.h>
66 1.35 augustss #endif
67 1.7 augustss #include <machine/bus.h>
68 1.39 augustss #include <machine/endian.h>
69 1.7 augustss
70 1.1 augustss #include <dev/usb/usb.h>
71 1.1 augustss #include <dev/usb/usbdi.h>
72 1.1 augustss #include <dev/usb/usbdivar.h>
73 1.7 augustss #include <dev/usb/usb_mem.h>
74 1.1 augustss #include <dev/usb/usb_quirks.h>
75 1.1 augustss
76 1.1 augustss #include <dev/usb/uhcireg.h>
77 1.1 augustss #include <dev/usb/uhcivar.h>
78 1.1 augustss
79 1.13 augustss #if defined(__FreeBSD__)
80 1.13 augustss #include <machine/clock.h>
81 1.13 augustss
82 1.13 augustss #define delay(d) DELAY(d)
83 1.13 augustss #endif
84 1.13 augustss
85 1.1 augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
86 1.1 augustss
87 1.37 augustss #if defined(__OpenBSD__)
88 1.37 augustss struct cfdriver uhci_cd = {
89 1.37 augustss NULL, "uhci", DV_DULL
90 1.37 augustss };
91 1.37 augustss #endif
92 1.37 augustss
93 1.59 augustss #ifdef USB_DEBUG
94 1.59 augustss #define DPRINTF(x) if (uhcidebug) printf x
95 1.59 augustss #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
96 1.59 augustss extern int uhcidebug;
97 1.59 augustss #else
98 1.59 augustss #define DPRINTF(x)
99 1.59 augustss #define DPRINTFN(n,x)
100 1.59 augustss #endif
101 1.59 augustss
102 1.39 augustss /*
103 1.39 augustss * The UHCI controller is little endian, so on big endian machines
104 1.39 augustss * the data strored in memory needs to be swapped.
105 1.39 augustss */
106 1.39 augustss #if BYTE_ORDER == BIG_ENDIAN
107 1.39 augustss #define LE(x) (bswap32(x))
108 1.39 augustss #else
109 1.39 augustss #define LE(x) (x)
110 1.39 augustss #endif
111 1.39 augustss
112 1.1 augustss struct uhci_pipe {
113 1.1 augustss struct usbd_pipe pipe;
114 1.1 augustss uhci_intr_info_t *iinfo;
115 1.32 augustss int nexttoggle;
116 1.1 augustss /* Info needed for different pipe kinds. */
117 1.1 augustss union {
118 1.1 augustss /* Control pipe */
119 1.1 augustss struct {
120 1.1 augustss uhci_soft_qh_t *sqh;
121 1.7 augustss usb_dma_t reqdma;
122 1.16 augustss uhci_soft_td_t *setup, *stat;
123 1.1 augustss u_int length;
124 1.1 augustss } ctl;
125 1.1 augustss /* Interrupt pipe */
126 1.1 augustss struct {
127 1.1 augustss int npoll;
128 1.1 augustss uhci_soft_qh_t **qhs;
129 1.1 augustss } intr;
130 1.1 augustss /* Bulk pipe */
131 1.1 augustss struct {
132 1.1 augustss uhci_soft_qh_t *sqh;
133 1.1 augustss u_int length;
134 1.1 augustss int isread;
135 1.1 augustss } bulk;
136 1.16 augustss /* Iso pipe */
137 1.16 augustss struct iso {
138 1.16 augustss uhci_soft_td_t **stds;
139 1.48 augustss int next, inuse;
140 1.16 augustss } iso;
141 1.1 augustss } u;
142 1.1 augustss };
143 1.1 augustss
144 1.1 augustss /*
145 1.1 augustss * The uhci_intr_info free list can be global since they contain
146 1.1 augustss * no dma specific data. The other free lists do.
147 1.1 augustss */
148 1.1 augustss LIST_HEAD(, uhci_intr_info) uhci_ii_free;
149 1.1 augustss
150 1.1 augustss void uhci_busreset __P((uhci_softc_t *));
151 1.30 augustss void uhci_power __P((int, void *));
152 1.16 augustss usbd_status uhci_run __P((uhci_softc_t *, int run));
153 1.1 augustss uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *));
154 1.1 augustss void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *));
155 1.1 augustss uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *));
156 1.1 augustss void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *));
157 1.1 augustss uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *));
158 1.1 augustss void uhci_free_intr_info __P((uhci_intr_info_t *ii));
159 1.16 augustss #if 0
160 1.1 augustss void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *,
161 1.1 augustss uhci_intr_info_t *));
162 1.1 augustss void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *));
163 1.16 augustss #endif
164 1.1 augustss
165 1.1 augustss void uhci_free_std_chain __P((uhci_softc_t *,
166 1.1 augustss uhci_soft_td_t *, uhci_soft_td_t *));
167 1.1 augustss usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *,
168 1.18 augustss int, int, int, usb_dma_t *,
169 1.1 augustss uhci_soft_td_t **,
170 1.1 augustss uhci_soft_td_t **));
171 1.1 augustss void uhci_timo __P((void *));
172 1.1 augustss void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle));
173 1.1 augustss void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *));
174 1.36 augustss void uhci_idone __P((uhci_intr_info_t *));
175 1.33 augustss void uhci_abort_req __P((usbd_request_handle, usbd_status status));
176 1.41 augustss void uhci_abort_req_end __P((void *v));
177 1.1 augustss void uhci_timeout __P((void *));
178 1.1 augustss void uhci_wakeup_ctrl __P((void *, int, int, void *, int));
179 1.1 augustss void uhci_lock_frames __P((uhci_softc_t *));
180 1.1 augustss void uhci_unlock_frames __P((uhci_softc_t *));
181 1.1 augustss void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
182 1.1 augustss void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
183 1.1 augustss void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
184 1.1 augustss void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
185 1.1 augustss int uhci_str __P((usb_string_descriptor_t *, int, char *));
186 1.48 augustss usbd_status uhci_setup_isoc __P((usbd_pipe_handle pipe));
187 1.48 augustss void uhci_device_isoc_enter __P((usbd_request_handle));
188 1.1 augustss
189 1.1 augustss void uhci_wakeup_cb __P((usbd_request_handle reqh));
190 1.1 augustss
191 1.48 augustss usbd_status uhci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t));
192 1.48 augustss void uhci_freem __P((struct usbd_bus *, usb_dma_t *));
193 1.48 augustss
194 1.1 augustss usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle));
195 1.16 augustss usbd_status uhci_device_ctrl_start __P((usbd_request_handle));
196 1.1 augustss void uhci_device_ctrl_abort __P((usbd_request_handle));
197 1.1 augustss void uhci_device_ctrl_close __P((usbd_pipe_handle));
198 1.41 augustss void uhci_device_ctrl_done __P((usbd_request_handle));
199 1.41 augustss
200 1.1 augustss usbd_status uhci_device_intr_transfer __P((usbd_request_handle));
201 1.16 augustss usbd_status uhci_device_intr_start __P((usbd_request_handle));
202 1.1 augustss void uhci_device_intr_abort __P((usbd_request_handle));
203 1.1 augustss void uhci_device_intr_close __P((usbd_pipe_handle));
204 1.41 augustss void uhci_device_intr_done __P((usbd_request_handle));
205 1.41 augustss
206 1.1 augustss usbd_status uhci_device_bulk_transfer __P((usbd_request_handle));
207 1.16 augustss usbd_status uhci_device_bulk_start __P((usbd_request_handle));
208 1.1 augustss void uhci_device_bulk_abort __P((usbd_request_handle));
209 1.1 augustss void uhci_device_bulk_close __P((usbd_pipe_handle));
210 1.41 augustss void uhci_device_bulk_done __P((usbd_request_handle));
211 1.41 augustss
212 1.16 augustss usbd_status uhci_device_isoc_transfer __P((usbd_request_handle));
213 1.16 augustss usbd_status uhci_device_isoc_start __P((usbd_request_handle));
214 1.16 augustss void uhci_device_isoc_abort __P((usbd_request_handle));
215 1.16 augustss void uhci_device_isoc_close __P((usbd_pipe_handle));
216 1.41 augustss void uhci_device_isoc_done __P((usbd_request_handle));
217 1.1 augustss
218 1.1 augustss usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle));
219 1.16 augustss usbd_status uhci_root_ctrl_start __P((usbd_request_handle));
220 1.1 augustss void uhci_root_ctrl_abort __P((usbd_request_handle));
221 1.1 augustss void uhci_root_ctrl_close __P((usbd_pipe_handle));
222 1.41 augustss
223 1.1 augustss usbd_status uhci_root_intr_transfer __P((usbd_request_handle));
224 1.16 augustss usbd_status uhci_root_intr_start __P((usbd_request_handle));
225 1.1 augustss void uhci_root_intr_abort __P((usbd_request_handle));
226 1.1 augustss void uhci_root_intr_close __P((usbd_pipe_handle));
227 1.41 augustss void uhci_root_intr_done __P((usbd_request_handle));
228 1.1 augustss
229 1.1 augustss usbd_status uhci_open __P((usbd_pipe_handle));
230 1.8 augustss void uhci_poll __P((struct usbd_bus *));
231 1.1 augustss
232 1.1 augustss usbd_status uhci_device_request __P((usbd_request_handle reqh));
233 1.1 augustss
234 1.1 augustss void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
235 1.1 augustss void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
236 1.1 augustss usbd_status uhci_device_setintr __P((uhci_softc_t *sc,
237 1.1 augustss struct uhci_pipe *pipe, int ival));
238 1.1 augustss
239 1.38 augustss void uhci_device_clear_toggle __P((usbd_pipe_handle pipe));
240 1.38 augustss void uhci_noop __P((usbd_pipe_handle pipe));
241 1.38 augustss
242 1.59 augustss #ifdef UHCI_DEBUG
243 1.1 augustss static void uhci_dumpregs __P((uhci_softc_t *));
244 1.1 augustss void uhci_dump_tds __P((uhci_soft_td_t *));
245 1.1 augustss void uhci_dump_qh __P((uhci_soft_qh_t *));
246 1.1 augustss void uhci_dump __P((void));
247 1.1 augustss void uhci_dump_td __P((uhci_soft_td_t *));
248 1.1 augustss #endif
249 1.1 augustss
250 1.1 augustss #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
251 1.1 augustss #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
252 1.35 augustss #define UREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r))
253 1.1 augustss #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
254 1.1 augustss #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
255 1.1 augustss
256 1.1 augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
257 1.1 augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
258 1.1 augustss
259 1.1 augustss #define UHCI_RESET_TIMEOUT 100 /* reset timeout */
260 1.1 augustss
261 1.1 augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
262 1.1 augustss
263 1.1 augustss #define UHCI_INTR_ENDPT 1
264 1.1 augustss
265 1.48 augustss struct usbd_bus_methods uhci_bus_methods = {
266 1.48 augustss uhci_open,
267 1.48 augustss uhci_poll,
268 1.48 augustss uhci_allocm,
269 1.48 augustss uhci_freem,
270 1.48 augustss };
271 1.48 augustss
272 1.48 augustss struct usbd_pipe_methods uhci_root_ctrl_methods = {
273 1.1 augustss uhci_root_ctrl_transfer,
274 1.16 augustss uhci_root_ctrl_start,
275 1.1 augustss uhci_root_ctrl_abort,
276 1.1 augustss uhci_root_ctrl_close,
277 1.38 augustss uhci_noop,
278 1.10 augustss 0,
279 1.1 augustss };
280 1.1 augustss
281 1.48 augustss struct usbd_pipe_methods uhci_root_intr_methods = {
282 1.1 augustss uhci_root_intr_transfer,
283 1.16 augustss uhci_root_intr_start,
284 1.1 augustss uhci_root_intr_abort,
285 1.1 augustss uhci_root_intr_close,
286 1.38 augustss uhci_noop,
287 1.41 augustss uhci_root_intr_done,
288 1.1 augustss };
289 1.1 augustss
290 1.48 augustss struct usbd_pipe_methods uhci_device_ctrl_methods = {
291 1.1 augustss uhci_device_ctrl_transfer,
292 1.16 augustss uhci_device_ctrl_start,
293 1.1 augustss uhci_device_ctrl_abort,
294 1.1 augustss uhci_device_ctrl_close,
295 1.38 augustss uhci_noop,
296 1.41 augustss uhci_device_ctrl_done,
297 1.1 augustss };
298 1.1 augustss
299 1.48 augustss struct usbd_pipe_methods uhci_device_intr_methods = {
300 1.1 augustss uhci_device_intr_transfer,
301 1.16 augustss uhci_device_intr_start,
302 1.1 augustss uhci_device_intr_abort,
303 1.1 augustss uhci_device_intr_close,
304 1.38 augustss uhci_device_clear_toggle,
305 1.41 augustss uhci_device_intr_done,
306 1.1 augustss };
307 1.1 augustss
308 1.48 augustss struct usbd_pipe_methods uhci_device_bulk_methods = {
309 1.1 augustss uhci_device_bulk_transfer,
310 1.16 augustss uhci_device_bulk_start,
311 1.1 augustss uhci_device_bulk_abort,
312 1.1 augustss uhci_device_bulk_close,
313 1.38 augustss uhci_device_clear_toggle,
314 1.41 augustss uhci_device_bulk_done,
315 1.1 augustss };
316 1.1 augustss
317 1.48 augustss struct usbd_pipe_methods uhci_device_isoc_methods = {
318 1.16 augustss uhci_device_isoc_transfer,
319 1.16 augustss uhci_device_isoc_start,
320 1.16 augustss uhci_device_isoc_abort,
321 1.16 augustss uhci_device_isoc_close,
322 1.38 augustss uhci_noop,
323 1.41 augustss uhci_device_isoc_done,
324 1.16 augustss };
325 1.16 augustss
326 1.1 augustss void
327 1.1 augustss uhci_busreset(sc)
328 1.1 augustss uhci_softc_t *sc;
329 1.1 augustss {
330 1.1 augustss UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
331 1.20 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
332 1.1 augustss UHCICMD(sc, 0); /* do nothing */
333 1.1 augustss }
334 1.1 augustss
335 1.1 augustss usbd_status
336 1.1 augustss uhci_init(sc)
337 1.1 augustss uhci_softc_t *sc;
338 1.1 augustss {
339 1.1 augustss usbd_status r;
340 1.1 augustss int i, j;
341 1.1 augustss uhci_soft_qh_t *csqh, *bsqh, *sqh;
342 1.1 augustss uhci_soft_td_t *std;
343 1.1 augustss
344 1.1 augustss DPRINTFN(1,("uhci_init: start\n"));
345 1.1 augustss
346 1.59 augustss #if defined(UHCI_DEBUG)
347 1.1 augustss if (uhcidebug > 2)
348 1.1 augustss uhci_dumpregs(sc);
349 1.1 augustss #endif
350 1.1 augustss
351 1.1 augustss uhci_run(sc, 0); /* stop the controller */
352 1.1 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
353 1.1 augustss
354 1.24 augustss uhci_busreset(sc);
355 1.24 augustss
356 1.1 augustss /* Allocate and initialize real frame array. */
357 1.50 augustss r = usb_allocmem(&sc->sc_bus,
358 1.7 augustss UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
359 1.30 augustss UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
360 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
361 1.1 augustss return (r);
362 1.30 augustss sc->sc_pframes = KERNADDR(&sc->sc_dma);
363 1.1 augustss UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
364 1.36 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma)); /* set frame list*/
365 1.1 augustss
366 1.1 augustss /* Allocate the dummy QH where bulk traffic will be queued. */
367 1.1 augustss bsqh = uhci_alloc_sqh(sc);
368 1.1 augustss if (!bsqh)
369 1.1 augustss return (USBD_NOMEM);
370 1.42 augustss bsqh->qh.qh_hlink = LE(UHCI_PTR_T); /* end of QH chain */
371 1.42 augustss bsqh->qh.qh_elink = LE(UHCI_PTR_T);
372 1.1 augustss sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
373 1.1 augustss
374 1.1 augustss /* Allocate the dummy QH where control traffic will be queued. */
375 1.1 augustss csqh = uhci_alloc_sqh(sc);
376 1.1 augustss if (!csqh)
377 1.1 augustss return (USBD_NOMEM);
378 1.42 augustss csqh->hlink = bsqh;
379 1.42 augustss csqh->qh.qh_hlink = LE(bsqh->physaddr | UHCI_PTR_Q);
380 1.42 augustss csqh->qh.qh_elink = LE(UHCI_PTR_T);
381 1.1 augustss sc->sc_ctl_start = sc->sc_ctl_end = csqh;
382 1.1 augustss
383 1.1 augustss /*
384 1.1 augustss * Make all (virtual) frame list pointers point to the interrupt
385 1.1 augustss * queue heads and the interrupt queue heads at the control
386 1.1 augustss * queue head and point the physical frame list to the virtual.
387 1.1 augustss */
388 1.1 augustss for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
389 1.1 augustss std = uhci_alloc_std(sc);
390 1.1 augustss sqh = uhci_alloc_sqh(sc);
391 1.1 augustss if (!std || !sqh)
392 1.13 augustss return (USBD_NOMEM);
393 1.42 augustss std->link.sqh = sqh;
394 1.42 augustss std->td.td_link = LE(sqh->physaddr | UHCI_PTR_Q);
395 1.42 augustss std->td.td_status = LE(UHCI_TD_IOS); /* iso, inactive */
396 1.42 augustss std->td.td_token = LE(0);
397 1.42 augustss std->td.td_buffer = LE(0);
398 1.42 augustss sqh->hlink = csqh;
399 1.42 augustss sqh->qh.qh_hlink = LE(csqh->physaddr | UHCI_PTR_Q);
400 1.42 augustss sqh->elink = 0;
401 1.42 augustss sqh->qh.qh_elink = LE(UHCI_PTR_T);
402 1.1 augustss sc->sc_vframes[i].htd = std;
403 1.1 augustss sc->sc_vframes[i].etd = std;
404 1.1 augustss sc->sc_vframes[i].hqh = sqh;
405 1.1 augustss sc->sc_vframes[i].eqh = sqh;
406 1.1 augustss for (j = i;
407 1.1 augustss j < UHCI_FRAMELIST_COUNT;
408 1.1 augustss j += UHCI_VFRAMELIST_COUNT)
409 1.39 augustss sc->sc_pframes[j] = LE(std->physaddr);
410 1.1 augustss }
411 1.1 augustss
412 1.1 augustss LIST_INIT(&sc->sc_intrhead);
413 1.1 augustss
414 1.1 augustss /* Set up the bus struct. */
415 1.48 augustss sc->sc_bus.methods = &uhci_bus_methods;
416 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
417 1.1 augustss
418 1.30 augustss sc->sc_suspend = PWR_RESUME;
419 1.53 augustss sc->sc_powerhook = powerhook_establish(uhci_power, sc);
420 1.30 augustss
421 1.1 augustss DPRINTFN(1,("uhci_init: enabling\n"));
422 1.1 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
423 1.1 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
424 1.1 augustss
425 1.16 augustss return (uhci_run(sc, 1)); /* and here we go... */
426 1.53 augustss }
427 1.53 augustss
428 1.53 augustss int
429 1.53 augustss uhci_activate(self, act)
430 1.53 augustss device_ptr_t self;
431 1.53 augustss enum devact act;
432 1.53 augustss {
433 1.56 augustss struct uhci_softc *sc = (struct uhci_softc *)self;
434 1.53 augustss int rv = 0;
435 1.53 augustss
436 1.53 augustss switch (act) {
437 1.53 augustss case DVACT_ACTIVATE:
438 1.53 augustss return (EOPNOTSUPP);
439 1.53 augustss break;
440 1.53 augustss
441 1.53 augustss case DVACT_DEACTIVATE:
442 1.56 augustss if (sc->sc_child != NULL)
443 1.56 augustss rv = config_deactivate(sc->sc_child);
444 1.53 augustss break;
445 1.53 augustss }
446 1.53 augustss return (rv);
447 1.53 augustss }
448 1.53 augustss
449 1.53 augustss int
450 1.57 augustss uhci_detach(sc, flags)
451 1.57 augustss struct uhci_softc *sc;
452 1.53 augustss int flags;
453 1.53 augustss {
454 1.53 augustss int rv = 0;
455 1.53 augustss
456 1.53 augustss if (sc->sc_child != NULL)
457 1.53 augustss rv = config_detach(sc->sc_child, flags);
458 1.53 augustss
459 1.53 augustss if (rv != 0)
460 1.53 augustss return (rv);
461 1.53 augustss
462 1.53 augustss powerhook_disestablish(sc->sc_powerhook);
463 1.53 augustss /* free data structures XXX */
464 1.53 augustss
465 1.53 augustss return (rv);
466 1.1 augustss }
467 1.1 augustss
468 1.48 augustss usbd_status
469 1.48 augustss uhci_allocm(bus, dma, size)
470 1.48 augustss struct usbd_bus *bus;
471 1.48 augustss usb_dma_t *dma;
472 1.48 augustss u_int32_t size;
473 1.48 augustss {
474 1.59 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
475 1.48 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
476 1.59 augustss #endif
477 1.48 augustss
478 1.50 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
479 1.48 augustss }
480 1.48 augustss
481 1.48 augustss void
482 1.48 augustss uhci_freem(bus, dma)
483 1.48 augustss struct usbd_bus *bus;
484 1.48 augustss usb_dma_t *dma;
485 1.48 augustss {
486 1.59 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
487 1.48 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
488 1.59 augustss #endif
489 1.48 augustss
490 1.50 augustss usb_freemem(&sc->sc_bus, dma);
491 1.48 augustss }
492 1.48 augustss
493 1.59 augustss #if defined(__NetBSD__)
494 1.30 augustss /*
495 1.30 augustss * Handle suspend/resume.
496 1.30 augustss *
497 1.40 augustss * We need to switch to polling mode here, because this routine is
498 1.40 augustss * called from an intterupt context. This is all right since we
499 1.40 augustss * are almost suspended anyway.
500 1.30 augustss */
501 1.30 augustss void
502 1.30 augustss uhci_power(why, v)
503 1.30 augustss int why;
504 1.30 augustss void *v;
505 1.30 augustss {
506 1.30 augustss uhci_softc_t *sc = v;
507 1.30 augustss int cmd;
508 1.30 augustss int s;
509 1.30 augustss
510 1.30 augustss s = splusb();
511 1.30 augustss cmd = UREAD2(sc, UHCI_CMD);
512 1.30 augustss
513 1.30 augustss DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
514 1.30 augustss sc, why, sc->sc_suspend, cmd));
515 1.30 augustss
516 1.30 augustss if (why != PWR_RESUME) {
517 1.59 augustss #if defined(UHCI_DEBUG)
518 1.30 augustss if (uhcidebug > 2)
519 1.30 augustss uhci_dumpregs(sc);
520 1.30 augustss #endif
521 1.30 augustss if (sc->sc_has_timo)
522 1.30 augustss usb_untimeout(uhci_timo, sc->sc_has_timo,
523 1.30 augustss sc->sc_has_timo->timo_handle);
524 1.54 augustss sc->sc_bus.use_polling++;
525 1.30 augustss uhci_run(sc, 0); /* stop the controller */
526 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
527 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
528 1.30 augustss sc->sc_suspend = why;
529 1.30 augustss DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
530 1.30 augustss } else {
531 1.30 augustss /*
532 1.30 augustss * XXX We should really do much more here in case the
533 1.30 augustss * controller registers have been lost and BIOS has
534 1.30 augustss * not restored them.
535 1.30 augustss */
536 1.30 augustss sc->sc_suspend = why;
537 1.30 augustss if (cmd & UHCI_CMD_RS)
538 1.30 augustss uhci_run(sc, 0); /* in case BIOS has started it */
539 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
540 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
541 1.30 augustss UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
542 1.30 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
543 1.30 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
544 1.30 augustss uhci_run(sc, 1); /* and start traffic again */
545 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
546 1.54 augustss sc->sc_bus.use_polling--;
547 1.30 augustss if (sc->sc_has_timo)
548 1.30 augustss usb_timeout(uhci_timo, sc->sc_has_timo,
549 1.30 augustss sc->sc_ival, sc->sc_has_timo->timo_handle);
550 1.59 augustss #if defined(UHCI_DEBUG)
551 1.30 augustss if (uhcidebug > 2)
552 1.30 augustss uhci_dumpregs(sc);
553 1.30 augustss #endif
554 1.30 augustss }
555 1.30 augustss splx(s);
556 1.30 augustss }
557 1.59 augustss #endif /* defined(__NetBSD__) */
558 1.30 augustss
559 1.59 augustss #ifdef UHCI_DEBUG
560 1.1 augustss static void
561 1.1 augustss uhci_dumpregs(sc)
562 1.1 augustss uhci_softc_t *sc;
563 1.1 augustss {
564 1.48 augustss DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
565 1.48 augustss "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
566 1.48 augustss USBDEVNAME(sc->sc_bus.bdev),
567 1.48 augustss UREAD2(sc, UHCI_CMD),
568 1.48 augustss UREAD2(sc, UHCI_STS),
569 1.48 augustss UREAD2(sc, UHCI_INTR),
570 1.48 augustss UREAD2(sc, UHCI_FRNUM),
571 1.48 augustss UREAD4(sc, UHCI_FLBASEADDR),
572 1.48 augustss UREAD1(sc, UHCI_SOF),
573 1.48 augustss UREAD2(sc, UHCI_PORTSC1),
574 1.48 augustss UREAD2(sc, UHCI_PORTSC2)));
575 1.1 augustss }
576 1.1 augustss
577 1.1 augustss void
578 1.1 augustss uhci_dump_td(p)
579 1.1 augustss uhci_soft_td_t *p;
580 1.1 augustss {
581 1.48 augustss DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
582 1.48 augustss "token=0x%08lx buffer=0x%08lx\n",
583 1.48 augustss p, (long)p->physaddr,
584 1.48 augustss (long)LE(p->td.td_link),
585 1.48 augustss (long)LE(p->td.td_status),
586 1.48 augustss (long)LE(p->td.td_token),
587 1.48 augustss (long)LE(p->td.td_buffer)));
588 1.48 augustss DPRINTFN(-1,(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
589 1.48 augustss "D=%d,maxlen=%d\n",
590 1.48 augustss (int)LE(p->td.td_link),
591 1.48 augustss "\20\1T\2Q\3VF",
592 1.48 augustss (int)LE(p->td.td_status),
593 1.48 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
594 1.48 augustss "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
595 1.48 augustss UHCI_TD_GET_ERRCNT(LE(p->td.td_status)),
596 1.48 augustss UHCI_TD_GET_ACTLEN(LE(p->td.td_status)),
597 1.48 augustss UHCI_TD_GET_PID(LE(p->td.td_token)),
598 1.48 augustss UHCI_TD_GET_DEVADDR(LE(p->td.td_token)),
599 1.48 augustss UHCI_TD_GET_ENDPT(LE(p->td.td_token)),
600 1.48 augustss UHCI_TD_GET_DT(LE(p->td.td_token)),
601 1.48 augustss UHCI_TD_GET_MAXLEN(LE(p->td.td_token))));
602 1.1 augustss }
603 1.1 augustss
604 1.1 augustss void
605 1.1 augustss uhci_dump_qh(p)
606 1.1 augustss uhci_soft_qh_t *p;
607 1.1 augustss {
608 1.48 augustss DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", p,
609 1.48 augustss (int)p->physaddr, LE(p->qh.qh_hlink), LE(p->qh.qh_elink)));
610 1.1 augustss }
611 1.1 augustss
612 1.13 augustss
613 1.1 augustss #if 0
614 1.1 augustss void
615 1.1 augustss uhci_dump()
616 1.1 augustss {
617 1.1 augustss uhci_softc_t *sc = uhci;
618 1.1 augustss
619 1.1 augustss uhci_dumpregs(sc);
620 1.50 augustss printf("intrs=%d\n", sc->sc_bus.no_intrs);
621 1.1 augustss printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);
622 1.42 augustss uhci_dump_qh(sc->sc_ctl_start->qh.hlink);
623 1.1 augustss }
624 1.1 augustss #endif
625 1.1 augustss
626 1.1 augustss void
627 1.1 augustss uhci_dump_tds(std)
628 1.1 augustss uhci_soft_td_t *std;
629 1.1 augustss {
630 1.1 augustss uhci_soft_td_t *p;
631 1.1 augustss
632 1.42 augustss for(p = std; p; p = p->link.std)
633 1.1 augustss uhci_dump_td(p);
634 1.1 augustss }
635 1.1 augustss #endif
636 1.1 augustss
637 1.1 augustss /*
638 1.1 augustss * This routine is executed periodically and simulates interrupts
639 1.1 augustss * from the root controller interrupt pipe for port status change.
640 1.1 augustss */
641 1.1 augustss void
642 1.1 augustss uhci_timo(addr)
643 1.1 augustss void *addr;
644 1.1 augustss {
645 1.1 augustss usbd_request_handle reqh = addr;
646 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
647 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
648 1.1 augustss int s;
649 1.1 augustss u_char *p;
650 1.1 augustss
651 1.1 augustss DPRINTFN(15, ("uhci_timo\n"));
652 1.1 augustss
653 1.41 augustss usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
654 1.41 augustss
655 1.49 augustss p = KERNADDR(&reqh->dmabuf);
656 1.1 augustss p[0] = 0;
657 1.1 augustss if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
658 1.1 augustss p[0] |= 1<<1;
659 1.1 augustss if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
660 1.1 augustss p[0] |= 1<<2;
661 1.41 augustss if (p[0] == 0)
662 1.41 augustss /* No change, try again in a while */
663 1.41 augustss return;
664 1.41 augustss
665 1.41 augustss reqh->actlen = 1;
666 1.41 augustss reqh->status = USBD_NORMAL_COMPLETION;
667 1.16 augustss s = splusb();
668 1.41 augustss reqh->hcpriv = 0;
669 1.51 augustss reqh->device->bus->intr_context++;
670 1.41 augustss usb_transfer_complete(reqh);
671 1.51 augustss reqh->device->bus->intr_context--;
672 1.41 augustss splx(s);
673 1.41 augustss }
674 1.41 augustss
675 1.41 augustss void
676 1.41 augustss uhci_root_intr_done(reqh)
677 1.41 augustss usbd_request_handle reqh;
678 1.41 augustss {
679 1.1 augustss }
680 1.1 augustss
681 1.1 augustss
682 1.1 augustss void
683 1.1 augustss uhci_lock_frames(sc)
684 1.1 augustss uhci_softc_t *sc;
685 1.1 augustss {
686 1.1 augustss int s = splusb();
687 1.1 augustss while (sc->sc_vflock) {
688 1.1 augustss sc->sc_vflock |= UHCI_WANT_LOCK;
689 1.1 augustss tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0);
690 1.1 augustss }
691 1.1 augustss sc->sc_vflock = UHCI_HAS_LOCK;
692 1.1 augustss splx(s);
693 1.1 augustss }
694 1.1 augustss
695 1.1 augustss void
696 1.1 augustss uhci_unlock_frames(sc)
697 1.1 augustss uhci_softc_t *sc;
698 1.1 augustss {
699 1.1 augustss int s = splusb();
700 1.1 augustss sc->sc_vflock &= ~UHCI_HAS_LOCK;
701 1.1 augustss if (sc->sc_vflock & UHCI_WANT_LOCK)
702 1.1 augustss wakeup(&sc->sc_vflock);
703 1.1 augustss splx(s);
704 1.1 augustss }
705 1.1 augustss
706 1.1 augustss /*
707 1.1 augustss * Allocate an interrupt information struct. A free list is kept
708 1.1 augustss * for fast allocation.
709 1.1 augustss */
710 1.1 augustss uhci_intr_info_t *
711 1.1 augustss uhci_alloc_intr_info(sc)
712 1.1 augustss uhci_softc_t *sc;
713 1.1 augustss {
714 1.1 augustss uhci_intr_info_t *ii;
715 1.1 augustss
716 1.1 augustss ii = LIST_FIRST(&uhci_ii_free);
717 1.1 augustss if (ii)
718 1.1 augustss LIST_REMOVE(ii, list);
719 1.1 augustss else {
720 1.31 augustss ii = malloc(sizeof(uhci_intr_info_t), M_USBHC, M_NOWAIT);
721 1.1 augustss }
722 1.1 augustss ii->sc = sc;
723 1.59 augustss #if defined(__FreeBSD__)
724 1.59 augustss callout_handle_init(&ii->timeout_handle);
725 1.59 augustss #endif
726 1.59 augustss
727 1.1 augustss return ii;
728 1.1 augustss }
729 1.1 augustss
730 1.1 augustss void
731 1.1 augustss uhci_free_intr_info(ii)
732 1.1 augustss uhci_intr_info_t *ii;
733 1.1 augustss {
734 1.1 augustss LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */
735 1.1 augustss }
736 1.1 augustss
737 1.1 augustss /* Add control QH, called at splusb(). */
738 1.1 augustss void
739 1.1 augustss uhci_add_ctrl(sc, sqh)
740 1.1 augustss uhci_softc_t *sc;
741 1.1 augustss uhci_soft_qh_t *sqh;
742 1.1 augustss {
743 1.42 augustss uhci_soft_qh_t *eqh;
744 1.1 augustss
745 1.52 augustss SPLUSBCHECK;
746 1.52 augustss
747 1.1 augustss DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
748 1.42 augustss eqh = sc->sc_ctl_end;
749 1.42 augustss sqh->hlink = eqh->hlink;
750 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
751 1.42 augustss eqh->hlink = sqh;
752 1.42 augustss eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q);
753 1.1 augustss sc->sc_ctl_end = sqh;
754 1.1 augustss }
755 1.1 augustss
756 1.1 augustss /* Remove control QH, called at splusb(). */
757 1.1 augustss void
758 1.1 augustss uhci_remove_ctrl(sc, sqh)
759 1.1 augustss uhci_softc_t *sc;
760 1.1 augustss uhci_soft_qh_t *sqh;
761 1.1 augustss {
762 1.1 augustss uhci_soft_qh_t *pqh;
763 1.1 augustss
764 1.52 augustss SPLUSBCHECK;
765 1.52 augustss
766 1.1 augustss DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh));
767 1.42 augustss for (pqh = sc->sc_ctl_start; pqh->hlink != sqh; pqh=pqh->hlink)
768 1.59 augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
769 1.42 augustss if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) {
770 1.1 augustss printf("uhci_remove_ctrl: QH not found\n");
771 1.1 augustss return;
772 1.1 augustss }
773 1.1 augustss #else
774 1.1 augustss ;
775 1.1 augustss #endif
776 1.42 augustss pqh->hlink = sqh->hlink;
777 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
778 1.1 augustss if (sc->sc_ctl_end == sqh)
779 1.1 augustss sc->sc_ctl_end = pqh;
780 1.1 augustss }
781 1.1 augustss
782 1.1 augustss /* Add bulk QH, called at splusb(). */
783 1.1 augustss void
784 1.1 augustss uhci_add_bulk(sc, sqh)
785 1.1 augustss uhci_softc_t *sc;
786 1.1 augustss uhci_soft_qh_t *sqh;
787 1.1 augustss {
788 1.42 augustss uhci_soft_qh_t *eqh;
789 1.1 augustss
790 1.52 augustss SPLUSBCHECK;
791 1.52 augustss
792 1.1 augustss DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
793 1.42 augustss eqh = sc->sc_bulk_end;
794 1.42 augustss sqh->hlink = eqh->hlink;
795 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
796 1.42 augustss eqh->hlink = sqh;
797 1.42 augustss eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q);
798 1.1 augustss sc->sc_bulk_end = sqh;
799 1.1 augustss }
800 1.1 augustss
801 1.1 augustss /* Remove bulk QH, called at splusb(). */
802 1.1 augustss void
803 1.1 augustss uhci_remove_bulk(sc, sqh)
804 1.1 augustss uhci_softc_t *sc;
805 1.1 augustss uhci_soft_qh_t *sqh;
806 1.1 augustss {
807 1.1 augustss uhci_soft_qh_t *pqh;
808 1.1 augustss
809 1.52 augustss SPLUSBCHECK;
810 1.52 augustss
811 1.1 augustss DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
812 1.42 augustss for (pqh = sc->sc_bulk_start; pqh->hlink != sqh; pqh = pqh->hlink)
813 1.59 augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
814 1.42 augustss if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) {
815 1.1 augustss printf("uhci_remove_bulk: QH not found\n");
816 1.1 augustss return;
817 1.1 augustss }
818 1.1 augustss #else
819 1.1 augustss ;
820 1.1 augustss #endif
821 1.42 augustss pqh->hlink = sqh->hlink;
822 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
823 1.1 augustss if (sc->sc_bulk_end == sqh)
824 1.1 augustss sc->sc_bulk_end = pqh;
825 1.1 augustss }
826 1.1 augustss
827 1.1 augustss int
828 1.44 augustss uhci_intr(arg)
829 1.44 augustss void *arg;
830 1.1 augustss {
831 1.44 augustss uhci_softc_t *sc = arg;
832 1.44 augustss int status;
833 1.44 augustss int ack;
834 1.1 augustss uhci_intr_info_t *ii;
835 1.1 augustss
836 1.59 augustss #if defined(UHCI_DEBUG)
837 1.44 augustss if (uhcidebug > 15) {
838 1.44 augustss DPRINTF(("%s: uhci_intr\n", USBDEVNAME(sc->sc_bus.bdev)));
839 1.1 augustss uhci_dumpregs(sc);
840 1.1 augustss }
841 1.1 augustss #endif
842 1.44 augustss
843 1.44 augustss #if defined(DIAGNOSTIC) && defined(__NetBSD__)
844 1.30 augustss if (sc->sc_suspend != PWR_RESUME)
845 1.30 augustss printf("uhci_intr: suspended sts=0x%x\n", status);
846 1.30 augustss #endif
847 1.44 augustss
848 1.44 augustss status = UREAD2(sc, UHCI_STS);
849 1.44 augustss ack = 0;
850 1.44 augustss if (status & UHCI_STS_USBINT)
851 1.44 augustss ack |= UHCI_STS_USBINT;
852 1.44 augustss if (status & UHCI_STS_USBEI)
853 1.44 augustss ack |= UHCI_STS_USBEI;
854 1.1 augustss if (status & UHCI_STS_RD) {
855 1.44 augustss ack |= UHCI_STS_RD;
856 1.46 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
857 1.1 augustss }
858 1.1 augustss if (status & UHCI_STS_HSE) {
859 1.44 augustss ack |= UHCI_STS_HSE;
860 1.46 augustss printf("%s: host controller process error\n",
861 1.46 augustss USBDEVNAME(sc->sc_bus.bdev));
862 1.1 augustss }
863 1.1 augustss if (status & UHCI_STS_HCPE) {
864 1.44 augustss ack |= UHCI_STS_HCPE;
865 1.44 augustss printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
866 1.44 augustss }
867 1.44 augustss if (status & UHCI_STS_HCH) {
868 1.44 augustss /* no acknowledge needed */
869 1.46 augustss printf("%s: host controller halted\n",
870 1.46 augustss USBDEVNAME(sc->sc_bus.bdev));
871 1.1 augustss }
872 1.44 augustss
873 1.44 augustss if (ack) /* acknowledge the ints */
874 1.44 augustss UWRITE2(sc, UHCI_STS, ack);
875 1.44 augustss else /* nothing to acknowledge */
876 1.44 augustss return (0);
877 1.1 augustss
878 1.51 augustss sc->sc_bus.intr_context++;
879 1.50 augustss sc->sc_bus.no_intrs++;
880 1.50 augustss
881 1.1 augustss /*
882 1.1 augustss * Interrupts on UHCI really suck. When the host controller
883 1.1 augustss * interrupts because a transfer is completed there is no
884 1.1 augustss * way of knowing which transfer it was. You can scan down
885 1.1 augustss * the TDs and QHs of the previous frame to limit the search,
886 1.1 augustss * but that assumes that the interrupt was not delayed by more
887 1.1 augustss * than 1 ms, which may not always be true (e.g. after debug
888 1.1 augustss * output on a slow console).
889 1.1 augustss * We scan all interrupt descriptors to see if any have
890 1.1 augustss * completed.
891 1.1 augustss */
892 1.1 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
893 1.1 augustss uhci_check_intr(sc, ii);
894 1.1 augustss
895 1.1 augustss DPRINTFN(10, ("uhci_intr: exit\n"));
896 1.44 augustss
897 1.51 augustss sc->sc_bus.intr_context--;
898 1.50 augustss
899 1.44 augustss return (1);
900 1.1 augustss }
901 1.1 augustss
902 1.1 augustss /* Check for an interrupt. */
903 1.1 augustss void
904 1.1 augustss uhci_check_intr(sc, ii)
905 1.1 augustss uhci_softc_t *sc;
906 1.1 augustss uhci_intr_info_t *ii;
907 1.1 augustss {
908 1.1 augustss uhci_soft_td_t *std, *lstd;
909 1.18 augustss u_int32_t status;
910 1.1 augustss
911 1.1 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
912 1.1 augustss #ifdef DIAGNOSTIC
913 1.1 augustss if (!ii) {
914 1.1 augustss printf("uhci_check_intr: no ii? %p\n", ii);
915 1.1 augustss return;
916 1.1 augustss }
917 1.1 augustss #endif
918 1.1 augustss if (!ii->stdstart)
919 1.1 augustss return;
920 1.1 augustss lstd = ii->stdend;
921 1.1 augustss #ifdef DIAGNOSTIC
922 1.1 augustss if (!lstd) {
923 1.1 augustss printf("uhci_check_intr: std==0\n");
924 1.1 augustss return;
925 1.1 augustss }
926 1.1 augustss #endif
927 1.26 augustss /*
928 1.26 augustss * If the last TD is still active we need to check whether there
929 1.26 augustss * is a an error somewhere in the middle, or whether there was a
930 1.26 augustss * short packet (SPD and not ACTIVE).
931 1.26 augustss */
932 1.42 augustss if (LE(lstd->td.td_status) & UHCI_TD_ACTIVE) {
933 1.1 augustss DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii));
934 1.48 augustss for (std = ii->stdstart; std != lstd; std = std->link.std) {
935 1.42 augustss status = LE(std->td.td_status);
936 1.18 augustss if ((status & UHCI_TD_STALLED) ||
937 1.18 augustss (status & (UHCI_TD_SPD | UHCI_TD_ACTIVE)) ==
938 1.18 augustss UHCI_TD_SPD)
939 1.1 augustss goto done;
940 1.18 augustss }
941 1.18 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p std=%p still active\n",
942 1.18 augustss ii, ii->stdstart));
943 1.1 augustss return;
944 1.1 augustss }
945 1.1 augustss done:
946 1.26 augustss usb_untimeout(uhci_timeout, ii, ii->timeout_handle);
947 1.36 augustss uhci_idone(ii);
948 1.1 augustss }
949 1.1 augustss
950 1.52 augustss /* Called at splusb() */
951 1.1 augustss void
952 1.36 augustss uhci_idone(ii)
953 1.1 augustss uhci_intr_info_t *ii;
954 1.1 augustss {
955 1.1 augustss usbd_request_handle reqh = ii->reqh;
956 1.38 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
957 1.1 augustss uhci_soft_td_t *std;
958 1.26 augustss u_int32_t status;
959 1.26 augustss int actlen;
960 1.1 augustss
961 1.7 augustss #ifdef DIAGNOSTIC
962 1.7 augustss {
963 1.7 augustss int s = splhigh();
964 1.7 augustss if (ii->isdone) {
965 1.26 augustss splx(s);
966 1.36 augustss printf("uhci_idone: ii=%p is done!\n", ii);
967 1.7 augustss return;
968 1.7 augustss }
969 1.7 augustss ii->isdone = 1;
970 1.7 augustss splx(s);
971 1.7 augustss }
972 1.7 augustss #endif
973 1.1 augustss
974 1.48 augustss if (reqh->status == USBD_CANCELLED ||
975 1.48 augustss reqh->status == USBD_TIMEOUT) {
976 1.48 augustss DPRINTF(("uhci_idone: aborted reqh=%p\n", reqh));
977 1.48 augustss return;
978 1.48 augustss }
979 1.48 augustss
980 1.48 augustss if (reqh->nframes) {
981 1.48 augustss /* Isoc transfer, do things differently. */
982 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
983 1.48 augustss int i, n, nframes;
984 1.48 augustss
985 1.48 augustss DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
986 1.48 augustss
987 1.48 augustss nframes = reqh->nframes;
988 1.48 augustss actlen = 0;
989 1.48 augustss n = reqh->hcprivint;
990 1.48 augustss for (i = 0; i < nframes; i++) {
991 1.48 augustss std = stds[n];
992 1.59 augustss #ifdef UHCI_DEBUG
993 1.48 augustss if (uhcidebug > 5) {
994 1.48 augustss DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
995 1.48 augustss uhci_dump_td(std);
996 1.48 augustss }
997 1.48 augustss #endif
998 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
999 1.48 augustss n = 0;
1000 1.48 augustss status = LE(std->td.td_status);
1001 1.48 augustss actlen += UHCI_TD_GET_ACTLEN(status);
1002 1.48 augustss }
1003 1.48 augustss upipe->u.iso.inuse -= nframes;
1004 1.48 augustss reqh->actlen = actlen;
1005 1.48 augustss reqh->status = USBD_NORMAL_COMPLETION;
1006 1.48 augustss reqh->hcpriv = ii;
1007 1.48 augustss usb_transfer_complete(reqh);
1008 1.48 augustss return;
1009 1.48 augustss }
1010 1.48 augustss
1011 1.59 augustss #ifdef UHCI_DEBUG
1012 1.48 augustss DPRINTFN(10, ("uhci_idone: ii=%p ready\n", ii));
1013 1.48 augustss if (uhcidebug > 10)
1014 1.48 augustss uhci_dump_tds(ii->stdstart);
1015 1.48 augustss #endif
1016 1.48 augustss
1017 1.26 augustss /* The transfer is done, compute actual length and status. */
1018 1.18 augustss /* XXX Is this correct for control xfers? */
1019 1.26 augustss actlen = 0;
1020 1.42 augustss for (std = ii->stdstart; std; std = std->link.std) {
1021 1.42 augustss status = LE(std->td.td_status);
1022 1.26 augustss if (status & UHCI_TD_ACTIVE)
1023 1.26 augustss break;
1024 1.42 augustss if (UHCI_TD_GET_PID(LE(std->td.td_token)) !=
1025 1.39 augustss UHCI_TD_PID_SETUP)
1026 1.26 augustss actlen += UHCI_TD_GET_ACTLEN(status);
1027 1.1 augustss }
1028 1.38 augustss /* If there are left over TDs we need to update the toggle. */
1029 1.38 augustss if (std)
1030 1.42 augustss upipe->nexttoggle = UHCI_TD_GET_DT(LE(std->td.td_token));
1031 1.38 augustss
1032 1.1 augustss status &= UHCI_TD_ERROR;
1033 1.26 augustss DPRINTFN(10, ("uhci_check_intr: actlen=%d, status=0x%x\n",
1034 1.26 augustss actlen, status));
1035 1.26 augustss reqh->actlen = actlen;
1036 1.1 augustss if (status != 0) {
1037 1.31 augustss DPRINTFN(-1+((status&UHCI_TD_STALLED)!=0),
1038 1.36 augustss ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1039 1.17 augustss "status 0x%b\n",
1040 1.17 augustss reqh->pipe->device->address,
1041 1.17 augustss reqh->pipe->endpoint->edesc->bEndpointAddress,
1042 1.21 augustss (int)status,
1043 1.12 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
1044 1.12 augustss "STALLED\30ACTIVE"));
1045 1.1 augustss if (status == UHCI_TD_STALLED)
1046 1.1 augustss reqh->status = USBD_STALLED;
1047 1.1 augustss else
1048 1.1 augustss reqh->status = USBD_IOERROR; /* more info XXX */
1049 1.1 augustss } else {
1050 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
1051 1.1 augustss }
1052 1.41 augustss reqh->hcpriv = ii;
1053 1.41 augustss usb_transfer_complete(reqh);
1054 1.1 augustss }
1055 1.1 augustss
1056 1.13 augustss /*
1057 1.13 augustss * Called when a request does not complete.
1058 1.13 augustss */
1059 1.1 augustss void
1060 1.1 augustss uhci_timeout(addr)
1061 1.1 augustss void *addr;
1062 1.1 augustss {
1063 1.1 augustss uhci_intr_info_t *ii = addr;
1064 1.1 augustss
1065 1.1 augustss DPRINTF(("uhci_timeout: ii=%p\n", ii));
1066 1.51 augustss
1067 1.51 augustss ii->reqh->device->bus->intr_context++;
1068 1.33 augustss uhci_abort_req(ii->reqh, USBD_TIMEOUT);
1069 1.51 augustss ii->reqh->device->bus->intr_context--;
1070 1.1 augustss }
1071 1.1 augustss
1072 1.1 augustss /*
1073 1.1 augustss * Wait here until controller claims to have an interrupt.
1074 1.1 augustss * Then call uhci_intr and return. Use timeout to avoid waiting
1075 1.1 augustss * too long.
1076 1.13 augustss * Only used during boot when interrupts are not enabled yet.
1077 1.1 augustss */
1078 1.1 augustss void
1079 1.1 augustss uhci_waitintr(sc, reqh)
1080 1.1 augustss uhci_softc_t *sc;
1081 1.1 augustss usbd_request_handle reqh;
1082 1.1 augustss {
1083 1.1 augustss int timo = reqh->timeout;
1084 1.13 augustss uhci_intr_info_t *ii;
1085 1.13 augustss
1086 1.26 augustss DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1087 1.1 augustss
1088 1.1 augustss reqh->status = USBD_IN_PROGRESS;
1089 1.26 augustss for (; timo >= 0; timo--) {
1090 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1091 1.26 augustss DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1092 1.1 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
1093 1.1 augustss uhci_intr(sc);
1094 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
1095 1.1 augustss return;
1096 1.1 augustss }
1097 1.1 augustss }
1098 1.13 augustss
1099 1.13 augustss /* Timeout */
1100 1.13 augustss DPRINTF(("uhci_waitintr: timeout\n"));
1101 1.13 augustss for (ii = LIST_FIRST(&sc->sc_intrhead);
1102 1.13 augustss ii && ii->reqh != reqh;
1103 1.13 augustss ii = LIST_NEXT(ii, list))
1104 1.13 augustss ;
1105 1.41 augustss #ifdef DIAGNOSTIC
1106 1.41 augustss if (!ii)
1107 1.13 augustss panic("uhci_waitintr: lost intr_info\n");
1108 1.41 augustss #endif
1109 1.41 augustss uhci_idone(ii);
1110 1.1 augustss }
1111 1.1 augustss
1112 1.8 augustss void
1113 1.8 augustss uhci_poll(bus)
1114 1.8 augustss struct usbd_bus *bus;
1115 1.8 augustss {
1116 1.8 augustss uhci_softc_t *sc = (uhci_softc_t *)bus;
1117 1.8 augustss
1118 1.8 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
1119 1.8 augustss uhci_intr(sc);
1120 1.8 augustss }
1121 1.8 augustss
1122 1.1 augustss #if 0
1123 1.1 augustss void
1124 1.1 augustss uhci_reset(p)
1125 1.1 augustss void *p;
1126 1.1 augustss {
1127 1.1 augustss uhci_softc_t *sc = p;
1128 1.1 augustss int n;
1129 1.1 augustss
1130 1.1 augustss UHCICMD(sc, UHCI_CMD_HCRESET);
1131 1.1 augustss /* The reset bit goes low when the controller is done. */
1132 1.1 augustss for (n = 0; n < UHCI_RESET_TIMEOUT &&
1133 1.1 augustss (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1134 1.1 augustss delay(100);
1135 1.1 augustss if (n >= UHCI_RESET_TIMEOUT)
1136 1.13 augustss printf("%s: controller did not reset\n",
1137 1.13 augustss USBDEVNAME(sc->sc_bus.bdev));
1138 1.1 augustss }
1139 1.1 augustss #endif
1140 1.1 augustss
1141 1.16 augustss usbd_status
1142 1.1 augustss uhci_run(sc, run)
1143 1.1 augustss uhci_softc_t *sc;
1144 1.1 augustss int run;
1145 1.1 augustss {
1146 1.1 augustss int s, n, running;
1147 1.1 augustss
1148 1.1 augustss run = run != 0;
1149 1.16 augustss s = splusb();
1150 1.30 augustss DPRINTF(("uhci_run: setting run=%d\n", run));
1151 1.30 augustss UHCICMD(sc, run ? UHCI_CMD_RS : 0);
1152 1.13 augustss for(n = 0; n < 10; n++) {
1153 1.1 augustss running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1154 1.1 augustss /* return when we've entered the state we want */
1155 1.1 augustss if (run == running) {
1156 1.1 augustss splx(s);
1157 1.30 augustss DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1158 1.30 augustss UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1159 1.16 augustss return (USBD_NORMAL_COMPLETION);
1160 1.1 augustss }
1161 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1162 1.1 augustss }
1163 1.1 augustss splx(s);
1164 1.13 augustss printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1165 1.14 augustss run ? "start" : "stop");
1166 1.16 augustss return (USBD_IOERROR);
1167 1.1 augustss }
1168 1.1 augustss
1169 1.1 augustss /*
1170 1.1 augustss * Memory management routines.
1171 1.1 augustss * uhci_alloc_std allocates TDs
1172 1.1 augustss * uhci_alloc_sqh allocates QHs
1173 1.7 augustss * These two routines do their own free list management,
1174 1.1 augustss * partly for speed, partly because allocating DMAable memory
1175 1.1 augustss * has page size granularaity so much memory would be wasted if
1176 1.16 augustss * only one TD/QH (32 bytes) was placed in each allocated chunk.
1177 1.1 augustss */
1178 1.1 augustss
1179 1.1 augustss uhci_soft_td_t *
1180 1.1 augustss uhci_alloc_std(sc)
1181 1.1 augustss uhci_softc_t *sc;
1182 1.1 augustss {
1183 1.1 augustss uhci_soft_td_t *std;
1184 1.1 augustss usbd_status r;
1185 1.42 augustss int i, offs;
1186 1.7 augustss usb_dma_t dma;
1187 1.1 augustss
1188 1.1 augustss if (!sc->sc_freetds) {
1189 1.1 augustss DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1190 1.50 augustss r = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1191 1.7 augustss UHCI_TD_ALIGN, &dma);
1192 1.42 augustss if (r != USBD_NORMAL_COMPLETION)
1193 1.16 augustss return (0);
1194 1.43 augustss for(i = 0; i < UHCI_STD_CHUNK; i++) {
1195 1.42 augustss offs = i * UHCI_STD_SIZE;
1196 1.42 augustss std = (uhci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
1197 1.42 augustss std->physaddr = DMAADDR(&dma) + offs;
1198 1.42 augustss std->link.std = sc->sc_freetds;
1199 1.1 augustss sc->sc_freetds = std;
1200 1.1 augustss }
1201 1.1 augustss }
1202 1.1 augustss std = sc->sc_freetds;
1203 1.42 augustss sc->sc_freetds = std->link.std;
1204 1.42 augustss memset(&std->td, 0, sizeof(uhci_td_t));
1205 1.1 augustss return std;
1206 1.1 augustss }
1207 1.1 augustss
1208 1.1 augustss void
1209 1.1 augustss uhci_free_std(sc, std)
1210 1.1 augustss uhci_softc_t *sc;
1211 1.1 augustss uhci_soft_td_t *std;
1212 1.1 augustss {
1213 1.7 augustss #ifdef DIAGNOSTIC
1214 1.7 augustss #define TD_IS_FREE 0x12345678
1215 1.42 augustss if (LE(std->td.td_token) == TD_IS_FREE) {
1216 1.7 augustss printf("uhci_free_std: freeing free TD %p\n", std);
1217 1.7 augustss return;
1218 1.7 augustss }
1219 1.42 augustss std->td.td_token = LE(TD_IS_FREE);
1220 1.7 augustss #endif
1221 1.42 augustss std->link.std = sc->sc_freetds;
1222 1.1 augustss sc->sc_freetds = std;
1223 1.1 augustss }
1224 1.1 augustss
1225 1.1 augustss uhci_soft_qh_t *
1226 1.1 augustss uhci_alloc_sqh(sc)
1227 1.1 augustss uhci_softc_t *sc;
1228 1.1 augustss {
1229 1.1 augustss uhci_soft_qh_t *sqh;
1230 1.1 augustss usbd_status r;
1231 1.1 augustss int i, offs;
1232 1.7 augustss usb_dma_t dma;
1233 1.1 augustss
1234 1.1 augustss if (!sc->sc_freeqhs) {
1235 1.1 augustss DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1236 1.50 augustss r = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1237 1.7 augustss UHCI_QH_ALIGN, &dma);
1238 1.42 augustss if (r != USBD_NORMAL_COMPLETION)
1239 1.1 augustss return 0;
1240 1.43 augustss for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1241 1.42 augustss offs = i * UHCI_SQH_SIZE;
1242 1.42 augustss sqh = (uhci_soft_qh_t *)((char *)KERNADDR(&dma) +offs);
1243 1.1 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1244 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1245 1.1 augustss sc->sc_freeqhs = sqh;
1246 1.1 augustss }
1247 1.1 augustss }
1248 1.1 augustss sqh = sc->sc_freeqhs;
1249 1.42 augustss sc->sc_freeqhs = sqh->hlink;
1250 1.42 augustss memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1251 1.16 augustss return (sqh);
1252 1.1 augustss }
1253 1.1 augustss
1254 1.1 augustss void
1255 1.1 augustss uhci_free_sqh(sc, sqh)
1256 1.1 augustss uhci_softc_t *sc;
1257 1.1 augustss uhci_soft_qh_t *sqh;
1258 1.1 augustss {
1259 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1260 1.1 augustss sc->sc_freeqhs = sqh;
1261 1.1 augustss }
1262 1.1 augustss
1263 1.16 augustss #if 0
1264 1.1 augustss /*
1265 1.1 augustss * Enter a list of transfers onto a control queue.
1266 1.1 augustss * Called at splusb()
1267 1.1 augustss */
1268 1.1 augustss void
1269 1.1 augustss uhci_enter_ctl_q(sc, sqh, ii)
1270 1.1 augustss uhci_softc_t *sc;
1271 1.1 augustss uhci_soft_qh_t *sqh;
1272 1.1 augustss uhci_intr_info_t *ii;
1273 1.1 augustss {
1274 1.1 augustss DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh));
1275 1.1 augustss
1276 1.1 augustss }
1277 1.16 augustss #endif
1278 1.1 augustss
1279 1.1 augustss void
1280 1.1 augustss uhci_free_std_chain(sc, std, stdend)
1281 1.1 augustss uhci_softc_t *sc;
1282 1.1 augustss uhci_soft_td_t *std;
1283 1.1 augustss uhci_soft_td_t *stdend;
1284 1.1 augustss {
1285 1.1 augustss uhci_soft_td_t *p;
1286 1.1 augustss
1287 1.1 augustss for (; std != stdend; std = p) {
1288 1.42 augustss p = std->link.std;
1289 1.1 augustss uhci_free_std(sc, std);
1290 1.1 augustss }
1291 1.1 augustss }
1292 1.1 augustss
1293 1.1 augustss usbd_status
1294 1.33 augustss uhci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep)
1295 1.1 augustss struct uhci_pipe *upipe;
1296 1.1 augustss uhci_softc_t *sc;
1297 1.33 augustss int len, rd, shortok;
1298 1.7 augustss usb_dma_t *dma;
1299 1.1 augustss uhci_soft_td_t **sp, **ep;
1300 1.1 augustss {
1301 1.1 augustss uhci_soft_td_t *p, *lastp;
1302 1.1 augustss uhci_physaddr_t lastlink;
1303 1.1 augustss int i, ntd, l, tog, maxp;
1304 1.18 augustss u_int32_t status;
1305 1.1 augustss int addr = upipe->pipe.device->address;
1306 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1307 1.1 augustss
1308 1.33 augustss DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d "
1309 1.33 augustss "shortok=%d\n", addr, UE_GET_ADDR(endpt), len,
1310 1.33 augustss upipe->pipe.device->lowspeed, shortok));
1311 1.1 augustss if (len == 0) {
1312 1.1 augustss *sp = *ep = 0;
1313 1.12 augustss DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n"));
1314 1.1 augustss return (USBD_NORMAL_COMPLETION);
1315 1.1 augustss }
1316 1.4 augustss maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1317 1.1 augustss if (maxp == 0) {
1318 1.1 augustss printf("uhci_alloc_std_chain: maxp=0\n");
1319 1.1 augustss return (USBD_INVAL);
1320 1.1 augustss }
1321 1.1 augustss ntd = (len + maxp - 1) / maxp;
1322 1.39 augustss DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1323 1.38 augustss tog = upipe->nexttoggle;
1324 1.1 augustss if (ntd % 2 == 0)
1325 1.1 augustss tog ^= 1;
1326 1.32 augustss upipe->nexttoggle = tog ^ 1;
1327 1.1 augustss lastp = 0;
1328 1.1 augustss lastlink = UHCI_PTR_T;
1329 1.1 augustss ntd--;
1330 1.33 augustss status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1331 1.18 augustss if (upipe->pipe.device->lowspeed)
1332 1.18 augustss status |= UHCI_TD_LS;
1333 1.33 augustss if (shortok)
1334 1.18 augustss status |= UHCI_TD_SPD;
1335 1.1 augustss for (i = ntd; i >= 0; i--) {
1336 1.1 augustss p = uhci_alloc_std(sc);
1337 1.1 augustss if (!p) {
1338 1.1 augustss uhci_free_std_chain(sc, lastp, 0);
1339 1.1 augustss return (USBD_NOMEM);
1340 1.1 augustss }
1341 1.42 augustss p->link.std = lastp;
1342 1.42 augustss p->td.td_link = LE(lastlink);
1343 1.1 augustss lastp = p;
1344 1.1 augustss lastlink = p->physaddr;
1345 1.42 augustss p->td.td_status = LE(status);
1346 1.1 augustss if (i == ntd) {
1347 1.1 augustss /* last TD */
1348 1.1 augustss l = len % maxp;
1349 1.1 augustss if (l == 0) l = maxp;
1350 1.1 augustss *ep = p;
1351 1.1 augustss } else
1352 1.1 augustss l = maxp;
1353 1.42 augustss p->td.td_token =
1354 1.39 augustss LE(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1355 1.39 augustss UHCI_TD_OUT(l, endpt, addr, tog));
1356 1.42 augustss p->td.td_buffer = LE(DMAADDR(dma) + i * maxp);
1357 1.1 augustss tog ^= 1;
1358 1.1 augustss }
1359 1.1 augustss *sp = lastp;
1360 1.38 augustss DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1361 1.38 augustss upipe->nexttoggle));
1362 1.1 augustss return (USBD_NORMAL_COMPLETION);
1363 1.1 augustss }
1364 1.1 augustss
1365 1.38 augustss void
1366 1.38 augustss uhci_device_clear_toggle(pipe)
1367 1.38 augustss usbd_pipe_handle pipe;
1368 1.38 augustss {
1369 1.38 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1370 1.38 augustss upipe->nexttoggle = 0;
1371 1.38 augustss }
1372 1.38 augustss
1373 1.38 augustss void
1374 1.38 augustss uhci_noop(pipe)
1375 1.38 augustss usbd_pipe_handle pipe;
1376 1.38 augustss {
1377 1.38 augustss }
1378 1.38 augustss
1379 1.1 augustss usbd_status
1380 1.1 augustss uhci_device_bulk_transfer(reqh)
1381 1.1 augustss usbd_request_handle reqh;
1382 1.1 augustss {
1383 1.16 augustss usbd_status r;
1384 1.16 augustss
1385 1.52 augustss /* Insert last in queue. */
1386 1.16 augustss r = usb_insert_transfer(reqh);
1387 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1388 1.16 augustss return (r);
1389 1.52 augustss
1390 1.52 augustss /* Pipe isn't running, start first */
1391 1.52 augustss return (uhci_device_bulk_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1392 1.16 augustss }
1393 1.16 augustss
1394 1.16 augustss usbd_status
1395 1.16 augustss uhci_device_bulk_start(reqh)
1396 1.16 augustss usbd_request_handle reqh;
1397 1.16 augustss {
1398 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1399 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1400 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1401 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1402 1.55 augustss uhci_soft_td_t *data, *dataend;
1403 1.1 augustss uhci_soft_qh_t *sqh;
1404 1.1 augustss usbd_status r;
1405 1.45 augustss int len, isread, endpt;
1406 1.1 augustss int s;
1407 1.1 augustss
1408 1.49 augustss DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p len=%d flags=%d\n",
1409 1.49 augustss reqh, reqh->length, reqh->flags));
1410 1.1 augustss
1411 1.48 augustss #ifdef DIAGNOSTIC
1412 1.48 augustss if (reqh->rqflags & URQ_REQUEST)
1413 1.1 augustss panic("uhci_device_bulk_transfer: a request\n");
1414 1.48 augustss #endif
1415 1.1 augustss
1416 1.1 augustss len = reqh->length;
1417 1.45 augustss endpt = reqh->pipe->endpoint->edesc->bEndpointAddress;
1418 1.45 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1419 1.1 augustss sqh = upipe->u.bulk.sqh;
1420 1.1 augustss
1421 1.1 augustss upipe->u.bulk.isread = isread;
1422 1.1 augustss upipe->u.bulk.length = len;
1423 1.1 augustss
1424 1.1 augustss r = uhci_alloc_std_chain(upipe, sc, len, isread,
1425 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1426 1.55 augustss &reqh->dmabuf, &data, &dataend);
1427 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1428 1.49 augustss return (r);
1429 1.55 augustss dataend->td.td_status |= LE(UHCI_TD_IOC);
1430 1.1 augustss
1431 1.59 augustss #ifdef UHCI_DEBUG
1432 1.33 augustss if (uhcidebug > 8) {
1433 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1434 1.55 augustss uhci_dump_tds(data);
1435 1.1 augustss }
1436 1.1 augustss #endif
1437 1.1 augustss
1438 1.1 augustss /* Set up interrupt info. */
1439 1.1 augustss ii->reqh = reqh;
1440 1.55 augustss ii->stdstart = data;
1441 1.55 augustss ii->stdend = dataend;
1442 1.59 augustss #if defined(__FreeBSD__)
1443 1.59 augustss callout_handle_init(&ii->timeout_handle);
1444 1.59 augustss #endif
1445 1.7 augustss #ifdef DIAGNOSTIC
1446 1.7 augustss ii->isdone = 0;
1447 1.7 augustss #endif
1448 1.1 augustss
1449 1.55 augustss sqh->elink = data;
1450 1.55 augustss sqh->qh.qh_elink = LE(data->physaddr);
1451 1.1 augustss sqh->intr_info = ii;
1452 1.1 augustss
1453 1.1 augustss s = splusb();
1454 1.1 augustss uhci_add_bulk(sc, sqh);
1455 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1456 1.1 augustss
1457 1.13 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1458 1.49 augustss usb_timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout),
1459 1.49 augustss ii->timeout_handle);
1460 1.13 augustss }
1461 1.1 augustss splx(s);
1462 1.1 augustss
1463 1.59 augustss #ifdef UHCI_DEBUG
1464 1.1 augustss if (uhcidebug > 10) {
1465 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1466 1.55 augustss uhci_dump_tds(data);
1467 1.1 augustss }
1468 1.1 augustss #endif
1469 1.1 augustss
1470 1.26 augustss if (sc->sc_bus.use_polling)
1471 1.26 augustss uhci_waitintr(sc, reqh);
1472 1.26 augustss
1473 1.1 augustss return (USBD_IN_PROGRESS);
1474 1.1 augustss }
1475 1.1 augustss
1476 1.1 augustss /* Abort a device bulk request. */
1477 1.1 augustss void
1478 1.1 augustss uhci_device_bulk_abort(reqh)
1479 1.1 augustss usbd_request_handle reqh;
1480 1.1 augustss {
1481 1.33 augustss DPRINTF(("uhci_device_bulk_abort:\n"));
1482 1.33 augustss uhci_abort_req(reqh, USBD_CANCELLED);
1483 1.33 augustss }
1484 1.33 augustss
1485 1.33 augustss void
1486 1.33 augustss uhci_abort_req(reqh, status)
1487 1.33 augustss usbd_request_handle reqh;
1488 1.33 augustss usbd_status status;
1489 1.33 augustss {
1490 1.33 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1491 1.33 augustss uhci_intr_info_t *ii = upipe->iinfo;
1492 1.33 augustss uhci_soft_td_t *std;
1493 1.33 augustss
1494 1.33 augustss /* Make interrupt routine ignore it, */
1495 1.41 augustss reqh->status = status;
1496 1.41 augustss
1497 1.41 augustss /* don't timeout, */
1498 1.41 augustss usb_untimeout(uhci_timeout, ii, ii->timeout_handle);
1499 1.33 augustss
1500 1.33 augustss /* make hardware ignore it, */
1501 1.42 augustss for (std = ii->stdstart; std != 0; std = std->link.std)
1502 1.48 augustss std->td.td_status &= LE(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1503 1.41 augustss
1504 1.41 augustss reqh->hcpriv = ii;
1505 1.41 augustss
1506 1.33 augustss /* make sure hardware has completed, */
1507 1.50 augustss if (reqh->device->bus->intr_context) {
1508 1.50 augustss /* We have no process context, so we can't use tsleep(). */
1509 1.50 augustss timeout(uhci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND);
1510 1.50 augustss } else {
1511 1.41 augustss usb_delay_ms(reqh->pipe->device->bus, 1);
1512 1.41 augustss /* and call final part of interrupt handler. */
1513 1.41 augustss uhci_abort_req_end(reqh);
1514 1.41 augustss }
1515 1.41 augustss }
1516 1.41 augustss
1517 1.41 augustss void
1518 1.41 augustss uhci_abort_req_end(v)
1519 1.41 augustss void *v;
1520 1.41 augustss {
1521 1.41 augustss usbd_request_handle reqh = v;
1522 1.41 augustss int s;
1523 1.33 augustss
1524 1.33 augustss s = splusb();
1525 1.41 augustss usb_transfer_complete(reqh);
1526 1.33 augustss splx(s);
1527 1.1 augustss }
1528 1.1 augustss
1529 1.1 augustss /* Close a device bulk pipe. */
1530 1.1 augustss void
1531 1.1 augustss uhci_device_bulk_close(pipe)
1532 1.1 augustss usbd_pipe_handle pipe;
1533 1.1 augustss {
1534 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1535 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1536 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1537 1.1 augustss
1538 1.1 augustss uhci_free_sqh(sc, upipe->u.bulk.sqh);
1539 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1540 1.1 augustss /* XXX free other resources */
1541 1.1 augustss }
1542 1.1 augustss
1543 1.1 augustss usbd_status
1544 1.1 augustss uhci_device_ctrl_transfer(reqh)
1545 1.1 augustss usbd_request_handle reqh;
1546 1.1 augustss {
1547 1.16 augustss usbd_status r;
1548 1.16 augustss
1549 1.52 augustss /* Insert last in queue. */
1550 1.16 augustss r = usb_insert_transfer(reqh);
1551 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1552 1.16 augustss return (r);
1553 1.52 augustss
1554 1.52 augustss /* Pipe isn't running, start first */
1555 1.52 augustss return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1556 1.16 augustss }
1557 1.16 augustss
1558 1.16 augustss usbd_status
1559 1.16 augustss uhci_device_ctrl_start(reqh)
1560 1.16 augustss usbd_request_handle reqh;
1561 1.16 augustss {
1562 1.9 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1563 1.1 augustss usbd_status r;
1564 1.1 augustss
1565 1.48 augustss #ifdef DIAGNOSTIC
1566 1.48 augustss if (!(reqh->rqflags & URQ_REQUEST))
1567 1.1 augustss panic("uhci_device_ctrl_transfer: not a request\n");
1568 1.48 augustss #endif
1569 1.1 augustss
1570 1.1 augustss r = uhci_device_request(reqh);
1571 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1572 1.1 augustss return (r);
1573 1.1 augustss
1574 1.9 augustss if (sc->sc_bus.use_polling)
1575 1.9 augustss uhci_waitintr(sc, reqh);
1576 1.1 augustss return (USBD_IN_PROGRESS);
1577 1.1 augustss }
1578 1.1 augustss
1579 1.1 augustss usbd_status
1580 1.1 augustss uhci_device_intr_transfer(reqh)
1581 1.1 augustss usbd_request_handle reqh;
1582 1.1 augustss {
1583 1.16 augustss usbd_status r;
1584 1.16 augustss
1585 1.52 augustss /* Insert last in queue. */
1586 1.16 augustss r = usb_insert_transfer(reqh);
1587 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
1588 1.16 augustss return (r);
1589 1.52 augustss
1590 1.52 augustss /* Pipe isn't running, start first */
1591 1.52 augustss return (uhci_device_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1592 1.16 augustss }
1593 1.16 augustss
1594 1.16 augustss usbd_status
1595 1.16 augustss uhci_device_intr_start(reqh)
1596 1.16 augustss usbd_request_handle reqh;
1597 1.16 augustss {
1598 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1599 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1600 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1601 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1602 1.55 augustss uhci_soft_td_t *data, *dataend;
1603 1.1 augustss uhci_soft_qh_t *sqh;
1604 1.1 augustss usbd_status r;
1605 1.49 augustss int i, s;
1606 1.1 augustss
1607 1.49 augustss DPRINTFN(3,("uhci_device_intr_transfer: reqh=%p len=%d flags=%d\n",
1608 1.49 augustss reqh, reqh->length, reqh->flags));
1609 1.1 augustss
1610 1.48 augustss #ifdef DIAGNOSTIC
1611 1.48 augustss if (reqh->rqflags & URQ_REQUEST)
1612 1.1 augustss panic("uhci_device_intr_transfer: a request\n");
1613 1.48 augustss #endif
1614 1.1 augustss
1615 1.49 augustss r = uhci_alloc_std_chain(upipe, sc, reqh->length, 1,
1616 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1617 1.55 augustss &reqh->dmabuf, &data, &dataend);
1618 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1619 1.49 augustss return (r);
1620 1.55 augustss dataend->td.td_status |= LE(UHCI_TD_IOC);
1621 1.1 augustss
1622 1.59 augustss #ifdef UHCI_DEBUG
1623 1.1 augustss if (uhcidebug > 10) {
1624 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
1625 1.55 augustss uhci_dump_tds(data);
1626 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1627 1.1 augustss }
1628 1.1 augustss #endif
1629 1.1 augustss
1630 1.1 augustss s = splusb();
1631 1.1 augustss /* Set up interrupt info. */
1632 1.1 augustss ii->reqh = reqh;
1633 1.55 augustss ii->stdstart = data;
1634 1.55 augustss ii->stdend = dataend;
1635 1.59 augustss #if defined(__FreeBSD__)
1636 1.59 augustss callout_handle_init(&ii->timeout_handle);
1637 1.59 augustss #endif
1638 1.7 augustss #ifdef DIAGNOSTIC
1639 1.7 augustss ii->isdone = 0;
1640 1.7 augustss #endif
1641 1.1 augustss
1642 1.12 augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
1643 1.12 augustss upipe->u.intr.qhs[0]));
1644 1.1 augustss for (i = 0; i < upipe->u.intr.npoll; i++) {
1645 1.1 augustss sqh = upipe->u.intr.qhs[i];
1646 1.55 augustss sqh->elink = data;
1647 1.55 augustss sqh->qh.qh_elink = LE(data->physaddr);
1648 1.1 augustss }
1649 1.1 augustss splx(s);
1650 1.1 augustss
1651 1.59 augustss #ifdef UHCI_DEBUG
1652 1.1 augustss if (uhcidebug > 10) {
1653 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
1654 1.55 augustss uhci_dump_tds(data);
1655 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
1656 1.1 augustss }
1657 1.1 augustss #endif
1658 1.1 augustss
1659 1.1 augustss return (USBD_IN_PROGRESS);
1660 1.1 augustss }
1661 1.1 augustss
1662 1.1 augustss /* Abort a device control request. */
1663 1.1 augustss void
1664 1.1 augustss uhci_device_ctrl_abort(reqh)
1665 1.1 augustss usbd_request_handle reqh;
1666 1.1 augustss {
1667 1.33 augustss DPRINTF(("uhci_device_ctrl_abort:\n"));
1668 1.33 augustss uhci_abort_req(reqh, USBD_CANCELLED);
1669 1.1 augustss }
1670 1.1 augustss
1671 1.1 augustss /* Close a device control pipe. */
1672 1.1 augustss void
1673 1.1 augustss uhci_device_ctrl_close(pipe)
1674 1.1 augustss usbd_pipe_handle pipe;
1675 1.1 augustss {
1676 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1677 1.1 augustss
1678 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1679 1.1 augustss /* XXX free other resources */
1680 1.1 augustss }
1681 1.1 augustss
1682 1.1 augustss /* Abort a device interrupt request. */
1683 1.1 augustss void
1684 1.1 augustss uhci_device_intr_abort(reqh)
1685 1.1 augustss usbd_request_handle reqh;
1686 1.1 augustss {
1687 1.36 augustss DPRINTFN(1,("uhci_device_intr_abort: reqh=%p\n", reqh));
1688 1.36 augustss if (reqh->pipe->intrreqh == reqh) {
1689 1.36 augustss DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
1690 1.36 augustss reqh->pipe->intrreqh = 0;
1691 1.1 augustss }
1692 1.36 augustss uhci_abort_req(reqh, USBD_CANCELLED);
1693 1.1 augustss }
1694 1.1 augustss
1695 1.1 augustss /* Close a device interrupt pipe. */
1696 1.1 augustss void
1697 1.1 augustss uhci_device_intr_close(pipe)
1698 1.1 augustss usbd_pipe_handle pipe;
1699 1.1 augustss {
1700 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1701 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1702 1.1 augustss int i, s, npoll;
1703 1.1 augustss
1704 1.1 augustss upipe->iinfo->stdstart = 0; /* inactive */
1705 1.1 augustss
1706 1.1 augustss /* Unlink descriptors from controller data structures. */
1707 1.1 augustss npoll = upipe->u.intr.npoll;
1708 1.1 augustss uhci_lock_frames(sc);
1709 1.1 augustss for (i = 0; i < npoll; i++)
1710 1.1 augustss uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos,
1711 1.1 augustss upipe->u.intr.qhs[i]);
1712 1.1 augustss uhci_unlock_frames(sc);
1713 1.1 augustss
1714 1.1 augustss /*
1715 1.1 augustss * We now have to wait for any activity on the physical
1716 1.1 augustss * descriptors to stop.
1717 1.1 augustss */
1718 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
1719 1.1 augustss
1720 1.1 augustss for(i = 0; i < npoll; i++)
1721 1.1 augustss uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
1722 1.31 augustss free(upipe->u.intr.qhs, M_USBHC);
1723 1.1 augustss
1724 1.1 augustss s = splusb();
1725 1.1 augustss LIST_REMOVE(upipe->iinfo, list); /* remove from active list */
1726 1.1 augustss splx(s);
1727 1.1 augustss uhci_free_intr_info(upipe->iinfo);
1728 1.1 augustss
1729 1.1 augustss /* XXX free other resources */
1730 1.1 augustss }
1731 1.1 augustss
1732 1.1 augustss usbd_status
1733 1.1 augustss uhci_device_request(reqh)
1734 1.1 augustss usbd_request_handle reqh;
1735 1.1 augustss {
1736 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1737 1.1 augustss usb_device_request_t *req = &reqh->request;
1738 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1739 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1740 1.1 augustss int addr = dev->address;
1741 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1742 1.1 augustss uhci_intr_info_t *ii = upipe->iinfo;
1743 1.55 augustss uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
1744 1.1 augustss uhci_soft_qh_t *sqh;
1745 1.1 augustss int len;
1746 1.1 augustss u_int32_t ls;
1747 1.1 augustss usbd_status r;
1748 1.1 augustss int isread;
1749 1.1 augustss int s;
1750 1.1 augustss
1751 1.13 augustss DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
1752 1.12 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1753 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1754 1.1 augustss UGETW(req->wIndex), UGETW(req->wLength),
1755 1.1 augustss addr, endpt));
1756 1.1 augustss
1757 1.1 augustss ls = dev->lowspeed ? UHCI_TD_LS : 0;
1758 1.1 augustss isread = req->bmRequestType & UT_READ;
1759 1.1 augustss len = UGETW(req->wLength);
1760 1.1 augustss
1761 1.1 augustss setup = upipe->u.ctl.setup;
1762 1.1 augustss stat = upipe->u.ctl.stat;
1763 1.1 augustss sqh = upipe->u.ctl.sqh;
1764 1.1 augustss
1765 1.1 augustss /* Set up data transaction */
1766 1.1 augustss if (len != 0) {
1767 1.38 augustss upipe->nexttoggle = 1;
1768 1.1 augustss r = uhci_alloc_std_chain(upipe, sc, len, isread,
1769 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
1770 1.55 augustss &reqh->dmabuf, &data, &dataend);
1771 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1772 1.49 augustss return (r);
1773 1.55 augustss next = data;
1774 1.55 augustss dataend->link.std = stat;
1775 1.55 augustss dataend->td.td_link = LE(stat->physaddr);
1776 1.1 augustss } else {
1777 1.1 augustss next = stat;
1778 1.1 augustss }
1779 1.1 augustss upipe->u.ctl.length = len;
1780 1.1 augustss
1781 1.1 augustss memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
1782 1.1 augustss
1783 1.42 augustss setup->link.std = next;
1784 1.42 augustss setup->td.td_link = LE(next->physaddr);
1785 1.42 augustss setup->td.td_status = LE(UHCI_TD_SET_ERRCNT(3) | ls | UHCI_TD_ACTIVE);
1786 1.42 augustss setup->td.td_token = LE(UHCI_TD_SETUP(sizeof *req, endpt, addr));
1787 1.42 augustss setup->td.td_buffer = LE(DMAADDR(&upipe->u.ctl.reqdma));
1788 1.42 augustss
1789 1.42 augustss stat->link.std = 0;
1790 1.42 augustss stat->td.td_link = LE(UHCI_PTR_T);
1791 1.42 augustss stat->td.td_status = LE(UHCI_TD_SET_ERRCNT(3) | ls |
1792 1.39 augustss UHCI_TD_ACTIVE | UHCI_TD_IOC);
1793 1.42 augustss stat->td.td_token =
1794 1.39 augustss LE(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
1795 1.39 augustss UHCI_TD_IN (0, endpt, addr, 1));
1796 1.42 augustss stat->td.td_buffer = LE(0);
1797 1.1 augustss
1798 1.59 augustss #ifdef UHCI_DEBUG
1799 1.1 augustss if (uhcidebug > 20) {
1800 1.47 augustss DPRINTF(("uhci_device_request: before transfer\n"));
1801 1.41 augustss uhci_dump_tds(setup);
1802 1.1 augustss }
1803 1.1 augustss #endif
1804 1.1 augustss
1805 1.1 augustss /* Set up interrupt info. */
1806 1.1 augustss ii->reqh = reqh;
1807 1.1 augustss ii->stdstart = setup;
1808 1.1 augustss ii->stdend = stat;
1809 1.59 augustss #if defined(__FreeBSD__)
1810 1.59 augustss callout_handle_init(&ii->timeout_handle);
1811 1.59 augustss #endif
1812 1.7 augustss #ifdef DIAGNOSTIC
1813 1.7 augustss ii->isdone = 0;
1814 1.7 augustss #endif
1815 1.1 augustss
1816 1.42 augustss sqh->elink = setup;
1817 1.42 augustss sqh->qh.qh_elink = LE(setup->physaddr);
1818 1.1 augustss sqh->intr_info = ii;
1819 1.1 augustss
1820 1.1 augustss s = splusb();
1821 1.1 augustss uhci_add_ctrl(sc, sqh);
1822 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1823 1.59 augustss #ifdef UHCI_DEBUG
1824 1.1 augustss if (uhcidebug > 12) {
1825 1.1 augustss uhci_soft_td_t *std;
1826 1.1 augustss uhci_soft_qh_t *xqh;
1827 1.13 augustss uhci_soft_qh_t *sxqh;
1828 1.13 augustss int maxqh = 0;
1829 1.1 augustss uhci_physaddr_t link;
1830 1.47 augustss DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
1831 1.1 augustss for (std = sc->sc_vframes[0].htd, link = 0;
1832 1.1 augustss (link & UHCI_PTR_Q) == 0;
1833 1.42 augustss std = std->link.std) {
1834 1.42 augustss link = LE(std->td.td_link);
1835 1.1 augustss uhci_dump_td(std);
1836 1.1 augustss }
1837 1.13 augustss for (sxqh = xqh = (uhci_soft_qh_t *)std;
1838 1.1 augustss xqh;
1839 1.42 augustss xqh = (maxqh++ == 5 || xqh->hlink==sxqh ||
1840 1.42 augustss xqh->hlink==xqh ? NULL : xqh->hlink)) {
1841 1.1 augustss uhci_dump_qh(xqh);
1842 1.13 augustss uhci_dump_qh(sxqh);
1843 1.13 augustss }
1844 1.47 augustss DPRINTF(("Enqueued QH:\n"));
1845 1.1 augustss uhci_dump_qh(sqh);
1846 1.42 augustss uhci_dump_tds(sqh->elink);
1847 1.1 augustss }
1848 1.1 augustss #endif
1849 1.13 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1850 1.13 augustss usb_timeout(uhci_timeout, ii,
1851 1.13 augustss MS_TO_TICKS(reqh->timeout), ii->timeout_handle);
1852 1.13 augustss }
1853 1.1 augustss splx(s);
1854 1.1 augustss
1855 1.1 augustss return (USBD_NORMAL_COMPLETION);
1856 1.1 augustss }
1857 1.1 augustss
1858 1.16 augustss usbd_status
1859 1.16 augustss uhci_device_isoc_transfer(reqh)
1860 1.16 augustss usbd_request_handle reqh;
1861 1.16 augustss {
1862 1.48 augustss usbd_status r;
1863 1.48 augustss
1864 1.48 augustss DPRINTFN(5,("uhci_device_isoc_transfer: reqh=%p\n", reqh));
1865 1.48 augustss
1866 1.48 augustss /* Put it on our queue, */
1867 1.48 augustss r = usb_insert_transfer(reqh);
1868 1.48 augustss
1869 1.48 augustss /* bail out on error, */
1870 1.48 augustss if (r != USBD_NORMAL_COMPLETION && r != USBD_IN_PROGRESS)
1871 1.48 augustss return (r);
1872 1.48 augustss
1873 1.48 augustss /* XXX should check inuse here */
1874 1.48 augustss
1875 1.48 augustss /* insert into schedule, */
1876 1.48 augustss uhci_device_isoc_enter(reqh);
1877 1.48 augustss
1878 1.48 augustss /* and put on interrupt list if the pipe wasn't running */
1879 1.48 augustss if (r == USBD_NORMAL_COMPLETION)
1880 1.52 augustss uhci_device_isoc_start(SIMPLEQ_FIRST(&reqh->pipe->queue));
1881 1.48 augustss
1882 1.48 augustss return (r);
1883 1.48 augustss }
1884 1.48 augustss
1885 1.48 augustss void
1886 1.48 augustss uhci_device_isoc_enter(reqh)
1887 1.48 augustss usbd_request_handle reqh;
1888 1.48 augustss {
1889 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1890 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
1891 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1892 1.48 augustss struct iso *iso = &upipe->u.iso;
1893 1.48 augustss uhci_soft_td_t *std;
1894 1.48 augustss u_int32_t buf, len, status;
1895 1.48 augustss int s, i, next, nframes;
1896 1.48 augustss
1897 1.48 augustss DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d reqh=%p "
1898 1.48 augustss "nframes=%d\n",
1899 1.48 augustss iso->inuse, iso->next, reqh, reqh->nframes));
1900 1.48 augustss
1901 1.48 augustss if (reqh->status == USBD_IN_PROGRESS) {
1902 1.48 augustss /* This request has already been entered into the frame list */
1903 1.48 augustss }
1904 1.48 augustss
1905 1.48 augustss #ifdef DIAGNOSTIC
1906 1.48 augustss if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
1907 1.48 augustss printf("uhci_device_isoc_enter: overflow!\n");
1908 1.19 augustss #endif
1909 1.16 augustss
1910 1.48 augustss next = iso->next;
1911 1.48 augustss if (next == -1) {
1912 1.48 augustss /* Not in use yet, schedule it a few frames ahead. */
1913 1.48 augustss next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
1914 1.48 augustss DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
1915 1.48 augustss }
1916 1.48 augustss
1917 1.48 augustss reqh->status = USBD_IN_PROGRESS;
1918 1.48 augustss reqh->hcprivint = next;
1919 1.48 augustss
1920 1.48 augustss buf = DMAADDR(&reqh->dmabuf);
1921 1.48 augustss status = LE(UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
1922 1.48 augustss UHCI_TD_ACTIVE |
1923 1.48 augustss UHCI_TD_IOS));
1924 1.48 augustss nframes = reqh->nframes;
1925 1.48 augustss s = splusb();
1926 1.48 augustss for (i = 0; i < nframes; i++) {
1927 1.48 augustss std = iso->stds[next];
1928 1.48 augustss if (++next >= UHCI_VFRAMELIST_COUNT)
1929 1.48 augustss next = 0;
1930 1.48 augustss len = reqh->frlengths[i];
1931 1.48 augustss std->td.td_buffer = LE(buf);
1932 1.48 augustss if (i == nframes - 1)
1933 1.48 augustss status |= LE(UHCI_TD_IOC);
1934 1.48 augustss std->td.td_status = status;
1935 1.48 augustss std->td.td_token &= LE(~UHCI_TD_MAXLEN_MASK);
1936 1.48 augustss std->td.td_token |= LE(UHCI_TD_SET_MAXLEN(len));
1937 1.59 augustss #ifdef UHCI_DEBUG
1938 1.48 augustss if (uhcidebug > 5) {
1939 1.48 augustss DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
1940 1.48 augustss uhci_dump_td(std);
1941 1.48 augustss }
1942 1.48 augustss #endif
1943 1.48 augustss buf += len;
1944 1.48 augustss }
1945 1.48 augustss iso->next = next;
1946 1.48 augustss iso->inuse += reqh->nframes;
1947 1.16 augustss
1948 1.48 augustss splx(s);
1949 1.16 augustss }
1950 1.16 augustss
1951 1.16 augustss usbd_status
1952 1.16 augustss uhci_device_isoc_start(reqh)
1953 1.16 augustss usbd_request_handle reqh;
1954 1.16 augustss {
1955 1.48 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1956 1.48 augustss uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1957 1.48 augustss uhci_intr_info_t *ii = upipe->iinfo;
1958 1.48 augustss uhci_soft_td_t *end;
1959 1.48 augustss int s, i;
1960 1.48 augustss
1961 1.48 augustss #ifdef DIAGNOSTIC
1962 1.48 augustss if (reqh->status != USBD_IN_PROGRESS)
1963 1.48 augustss printf("uhci_device_isoc_start: not in progress %p\n", reqh);
1964 1.48 augustss #endif
1965 1.48 augustss
1966 1.48 augustss /* Find the last TD */
1967 1.48 augustss i = reqh->hcprivint + reqh->nframes;
1968 1.48 augustss if (i >= UHCI_VFRAMELIST_COUNT)
1969 1.48 augustss i -= UHCI_VFRAMELIST_COUNT;
1970 1.48 augustss end = upipe->u.iso.stds[i];
1971 1.48 augustss
1972 1.48 augustss s = splusb();
1973 1.48 augustss
1974 1.48 augustss /* Set up interrupt info. */
1975 1.48 augustss ii->reqh = reqh;
1976 1.48 augustss ii->stdstart = end;
1977 1.48 augustss ii->stdend = end;
1978 1.59 augustss #if defined(__FreeBSD__)
1979 1.59 augustss callout_handle_init(&ii->timeout_handle);
1980 1.59 augustss #endif
1981 1.48 augustss #ifdef DIAGNOSTIC
1982 1.48 augustss ii->isdone = 0;
1983 1.48 augustss #endif
1984 1.48 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1985 1.48 augustss
1986 1.48 augustss splx(s);
1987 1.48 augustss
1988 1.48 augustss return (USBD_IN_PROGRESS);
1989 1.16 augustss }
1990 1.16 augustss
1991 1.16 augustss void
1992 1.16 augustss uhci_device_isoc_abort(reqh)
1993 1.16 augustss usbd_request_handle reqh;
1994 1.16 augustss {
1995 1.48 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1996 1.48 augustss uhci_intr_info_t *ii = upipe->iinfo;
1997 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
1998 1.48 augustss uhci_soft_td_t *std;
1999 1.48 augustss int i, n, nframes;
2000 1.48 augustss
2001 1.48 augustss /* Make interrupt routine ignore it, */
2002 1.48 augustss reqh->status = USBD_CANCELLED;
2003 1.48 augustss
2004 1.48 augustss /* make hardware ignore it, */
2005 1.48 augustss nframes = reqh->nframes;
2006 1.48 augustss n = reqh->hcprivint;
2007 1.48 augustss for (i = 0; i < nframes; i++) {
2008 1.48 augustss std = stds[n];
2009 1.48 augustss std->td.td_status &= LE(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2010 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
2011 1.48 augustss n = 0;
2012 1.48 augustss }
2013 1.48 augustss
2014 1.48 augustss reqh->hcpriv = ii;
2015 1.48 augustss
2016 1.48 augustss /* make sure hardware has completed, */
2017 1.50 augustss if (reqh->device->bus->intr_context) {
2018 1.50 augustss /* We have no process context, so we can't use tsleep(). */
2019 1.50 augustss timeout(uhci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND);
2020 1.50 augustss } else {
2021 1.48 augustss usb_delay_ms(reqh->pipe->device->bus, 1);
2022 1.48 augustss /* and call final part of interrupt handler. */
2023 1.48 augustss uhci_abort_req_end(reqh);
2024 1.48 augustss }
2025 1.16 augustss }
2026 1.16 augustss
2027 1.16 augustss void
2028 1.16 augustss uhci_device_isoc_close(pipe)
2029 1.16 augustss usbd_pipe_handle pipe;
2030 1.16 augustss {
2031 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2032 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2033 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2034 1.48 augustss uhci_soft_td_t *std, *vstd;
2035 1.16 augustss struct iso *iso;
2036 1.16 augustss int i;
2037 1.16 augustss
2038 1.16 augustss /*
2039 1.16 augustss * Make sure all TDs are marked as inactive.
2040 1.16 augustss * Wait for completion.
2041 1.16 augustss * Unschedule.
2042 1.16 augustss * Deallocate.
2043 1.16 augustss */
2044 1.16 augustss iso = &upipe->u.iso;
2045 1.16 augustss
2046 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2047 1.42 augustss iso->stds[i]->td.td_status &= LE(~UHCI_TD_ACTIVE);
2048 1.20 augustss usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2049 1.16 augustss
2050 1.16 augustss uhci_lock_frames(sc);
2051 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2052 1.16 augustss std = iso->stds[i];
2053 1.48 augustss for (vstd = sc->sc_vframes[i].htd;
2054 1.42 augustss vstd && vstd->link.std != std;
2055 1.42 augustss vstd = vstd->link.std)
2056 1.16 augustss ;
2057 1.16 augustss if (!vstd) {
2058 1.16 augustss /*panic*/
2059 1.16 augustss printf("uhci_device_isoc_close: %p not found\n", std);
2060 1.16 augustss uhci_unlock_frames(sc);
2061 1.16 augustss return;
2062 1.16 augustss }
2063 1.42 augustss vstd->link = std->link;
2064 1.42 augustss vstd->td.td_link = std->td.td_link;
2065 1.16 augustss uhci_free_std(sc, std);
2066 1.16 augustss }
2067 1.16 augustss uhci_unlock_frames(sc);
2068 1.16 augustss
2069 1.31 augustss free(iso->stds, M_USBHC);
2070 1.16 augustss }
2071 1.16 augustss
2072 1.16 augustss usbd_status
2073 1.48 augustss uhci_setup_isoc(pipe)
2074 1.16 augustss usbd_pipe_handle pipe;
2075 1.16 augustss {
2076 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2077 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2078 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2079 1.16 augustss int addr = upipe->pipe.device->address;
2080 1.16 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2081 1.45 augustss int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2082 1.48 augustss uhci_soft_td_t *std, *vstd;
2083 1.48 augustss u_int32_t token;
2084 1.16 augustss struct iso *iso;
2085 1.16 augustss int i;
2086 1.16 augustss
2087 1.16 augustss iso = &upipe->u.iso;
2088 1.16 augustss iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2089 1.31 augustss M_USBHC, M_WAITOK);
2090 1.16 augustss
2091 1.48 augustss token = LE(rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2092 1.48 augustss UHCI_TD_OUT(0, endpt, addr, 0));
2093 1.16 augustss
2094 1.48 augustss /* Allocate the TDs and mark as inactive; */
2095 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2096 1.48 augustss std = uhci_alloc_std(sc);
2097 1.48 augustss if (std == 0)
2098 1.48 augustss goto bad;
2099 1.48 augustss std->td.td_status = LE(UHCI_TD_IOS); /* iso, inactive */
2100 1.48 augustss std->td.td_token = token;
2101 1.48 augustss iso->stds[i] = std;
2102 1.16 augustss }
2103 1.16 augustss
2104 1.48 augustss /* Insert TDs into schedule. */
2105 1.16 augustss uhci_lock_frames(sc);
2106 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2107 1.16 augustss std = iso->stds[i];
2108 1.48 augustss vstd = sc->sc_vframes[i].htd;
2109 1.42 augustss std->link = vstd->link;
2110 1.42 augustss std->td.td_link = vstd->td.td_link;
2111 1.42 augustss vstd->link.std = std;
2112 1.42 augustss vstd->td.td_link = LE(std->physaddr);
2113 1.16 augustss }
2114 1.16 augustss uhci_unlock_frames(sc);
2115 1.16 augustss
2116 1.48 augustss iso->next = -1;
2117 1.48 augustss iso->inuse = 0;
2118 1.48 augustss
2119 1.16 augustss return (USBD_NORMAL_COMPLETION);
2120 1.16 augustss
2121 1.48 augustss bad:
2122 1.16 augustss while (--i >= 0)
2123 1.16 augustss uhci_free_std(sc, iso->stds[i]);
2124 1.31 augustss free(iso->stds, M_USBHC);
2125 1.16 augustss return (USBD_NOMEM);
2126 1.16 augustss }
2127 1.16 augustss
2128 1.16 augustss void
2129 1.41 augustss uhci_device_isoc_done(reqh)
2130 1.41 augustss usbd_request_handle reqh;
2131 1.16 augustss {
2132 1.48 augustss uhci_intr_info_t *ii = reqh->hcpriv;
2133 1.48 augustss
2134 1.48 augustss DPRINTFN(4, ("uhci_isoc_done: length=%d\n", reqh->actlen));
2135 1.48 augustss
2136 1.48 augustss /* Turn off the interrupt since it is active even if the TD is not. */
2137 1.48 augustss ii->stdend->td.td_status &= LE(~UHCI_TD_IOC);
2138 1.48 augustss
2139 1.48 augustss LIST_REMOVE(ii, list); /* remove from active list */
2140 1.16 augustss }
2141 1.16 augustss
2142 1.1 augustss void
2143 1.41 augustss uhci_device_intr_done(reqh)
2144 1.41 augustss usbd_request_handle reqh;
2145 1.1 augustss {
2146 1.41 augustss uhci_intr_info_t *ii = reqh->hcpriv;
2147 1.1 augustss uhci_softc_t *sc = ii->sc;
2148 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
2149 1.1 augustss uhci_soft_qh_t *sqh;
2150 1.1 augustss int i, npoll;
2151 1.1 augustss
2152 1.1 augustss DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen));
2153 1.1 augustss
2154 1.1 augustss npoll = upipe->u.intr.npoll;
2155 1.1 augustss for(i = 0; i < npoll; i++) {
2156 1.1 augustss sqh = upipe->u.intr.qhs[i];
2157 1.42 augustss sqh->elink = 0;
2158 1.42 augustss sqh->qh.qh_elink = LE(UHCI_PTR_T);
2159 1.1 augustss }
2160 1.1 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
2161 1.1 augustss
2162 1.1 augustss /* XXX Wasteful. */
2163 1.31 augustss if (reqh->pipe->repeat) {
2164 1.55 augustss uhci_soft_td_t *data, *dataend;
2165 1.1 augustss
2166 1.1 augustss /* This alloc cannot fail since we freed the chain above. */
2167 1.18 augustss uhci_alloc_std_chain(upipe, sc, reqh->length, 1,
2168 1.18 augustss reqh->flags & USBD_SHORT_XFER_OK,
2169 1.55 augustss &reqh->dmabuf, &data, &dataend);
2170 1.55 augustss dataend->td.td_status |= LE(UHCI_TD_IOC);
2171 1.1 augustss
2172 1.59 augustss #ifdef UHCI_DEBUG
2173 1.1 augustss if (uhcidebug > 10) {
2174 1.55 augustss DPRINTF(("uhci_device_intr_done: data(1)\n"));
2175 1.55 augustss uhci_dump_tds(data);
2176 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2177 1.1 augustss }
2178 1.1 augustss #endif
2179 1.1 augustss
2180 1.55 augustss ii->stdstart = data;
2181 1.55 augustss ii->stdend = dataend;
2182 1.59 augustss #if defined(__FreeBSD__)
2183 1.59 augustss callout_handle_init(&ii->timeout_handle);
2184 1.59 augustss #endif
2185 1.7 augustss #ifdef DIAGNOSTIC
2186 1.7 augustss ii->isdone = 0;
2187 1.7 augustss #endif
2188 1.1 augustss for (i = 0; i < npoll; i++) {
2189 1.1 augustss sqh = upipe->u.intr.qhs[i];
2190 1.55 augustss sqh->elink = data;
2191 1.55 augustss sqh->qh.qh_elink = LE(data->physaddr);
2192 1.1 augustss }
2193 1.1 augustss } else {
2194 1.1 augustss ii->stdstart = 0; /* mark as inactive */
2195 1.1 augustss }
2196 1.1 augustss }
2197 1.1 augustss
2198 1.1 augustss /* Deallocate request data structures */
2199 1.1 augustss void
2200 1.41 augustss uhci_device_ctrl_done(reqh)
2201 1.41 augustss usbd_request_handle reqh;
2202 1.1 augustss {
2203 1.41 augustss uhci_intr_info_t *ii = reqh->hcpriv;
2204 1.1 augustss uhci_softc_t *sc = ii->sc;
2205 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
2206 1.1 augustss
2207 1.7 augustss #ifdef DIAGNOSTIC
2208 1.48 augustss if (!(reqh->rqflags & URQ_REQUEST))
2209 1.1 augustss panic("uhci_ctrl_done: not a request\n");
2210 1.7 augustss #endif
2211 1.1 augustss
2212 1.1 augustss LIST_REMOVE(ii, list); /* remove from active list */
2213 1.1 augustss
2214 1.1 augustss uhci_remove_ctrl(sc, upipe->u.ctl.sqh);
2215 1.1 augustss
2216 1.49 augustss if (upipe->u.ctl.length != 0)
2217 1.42 augustss uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2218 1.49 augustss
2219 1.1 augustss DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen));
2220 1.1 augustss }
2221 1.1 augustss
2222 1.1 augustss /* Deallocate request data structures */
2223 1.1 augustss void
2224 1.41 augustss uhci_device_bulk_done(reqh)
2225 1.41 augustss usbd_request_handle reqh;
2226 1.1 augustss {
2227 1.41 augustss uhci_intr_info_t *ii = reqh->hcpriv;
2228 1.1 augustss uhci_softc_t *sc = ii->sc;
2229 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
2230 1.1 augustss
2231 1.1 augustss LIST_REMOVE(ii, list); /* remove from active list */
2232 1.1 augustss
2233 1.1 augustss uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2234 1.32 augustss
2235 1.32 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
2236 1.32 augustss
2237 1.49 augustss DPRINTFN(5, ("uhci_bulk_done: length=%d\n", reqh->actlen));
2238 1.1 augustss }
2239 1.1 augustss
2240 1.1 augustss /* Add interrupt QH, called with vflock. */
2241 1.1 augustss void
2242 1.1 augustss uhci_add_intr(sc, n, sqh)
2243 1.1 augustss uhci_softc_t *sc;
2244 1.1 augustss int n;
2245 1.1 augustss uhci_soft_qh_t *sqh;
2246 1.1 augustss {
2247 1.1 augustss struct uhci_vframe *vf = &sc->sc_vframes[n];
2248 1.42 augustss uhci_soft_qh_t *eqh;
2249 1.1 augustss
2250 1.1 augustss DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh));
2251 1.42 augustss eqh = vf->eqh;
2252 1.42 augustss sqh->hlink = eqh->hlink;
2253 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2254 1.42 augustss eqh->hlink = sqh;
2255 1.42 augustss eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q);
2256 1.1 augustss vf->eqh = sqh;
2257 1.1 augustss vf->bandwidth++;
2258 1.1 augustss }
2259 1.1 augustss
2260 1.1 augustss /* Remove interrupt QH, called with vflock. */
2261 1.1 augustss void
2262 1.1 augustss uhci_remove_intr(sc, n, sqh)
2263 1.1 augustss uhci_softc_t *sc;
2264 1.1 augustss int n;
2265 1.1 augustss uhci_soft_qh_t *sqh;
2266 1.1 augustss {
2267 1.1 augustss struct uhci_vframe *vf = &sc->sc_vframes[n];
2268 1.1 augustss uhci_soft_qh_t *pqh;
2269 1.1 augustss
2270 1.1 augustss DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh));
2271 1.1 augustss
2272 1.42 augustss for (pqh = vf->hqh; pqh->hlink != sqh; pqh = pqh->hlink)
2273 1.59 augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
2274 1.42 augustss if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) {
2275 1.47 augustss DPRINTF(("uhci_remove_intr: QH not found\n"));
2276 1.1 augustss return;
2277 1.1 augustss }
2278 1.1 augustss #else
2279 1.1 augustss ;
2280 1.1 augustss #endif
2281 1.42 augustss pqh->hlink = sqh->hlink;
2282 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2283 1.1 augustss if (vf->eqh == sqh)
2284 1.1 augustss vf->eqh = pqh;
2285 1.1 augustss vf->bandwidth--;
2286 1.1 augustss }
2287 1.1 augustss
2288 1.1 augustss usbd_status
2289 1.1 augustss uhci_device_setintr(sc, upipe, ival)
2290 1.1 augustss uhci_softc_t *sc;
2291 1.1 augustss struct uhci_pipe *upipe;
2292 1.1 augustss int ival;
2293 1.1 augustss {
2294 1.1 augustss uhci_soft_qh_t *sqh;
2295 1.1 augustss int i, npoll, s;
2296 1.1 augustss u_int bestbw, bw, bestoffs, offs;
2297 1.1 augustss
2298 1.1 augustss DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
2299 1.1 augustss if (ival == 0) {
2300 1.1 augustss printf("uhci_setintr: 0 interval\n");
2301 1.1 augustss return (USBD_INVAL);
2302 1.1 augustss }
2303 1.1 augustss
2304 1.1 augustss if (ival > UHCI_VFRAMELIST_COUNT)
2305 1.1 augustss ival = UHCI_VFRAMELIST_COUNT;
2306 1.1 augustss npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2307 1.1 augustss DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
2308 1.1 augustss
2309 1.1 augustss upipe->u.intr.npoll = npoll;
2310 1.1 augustss upipe->u.intr.qhs =
2311 1.31 augustss malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2312 1.1 augustss
2313 1.1 augustss /*
2314 1.1 augustss * Figure out which offset in the schedule that has most
2315 1.1 augustss * bandwidth left over.
2316 1.1 augustss */
2317 1.1 augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2318 1.1 augustss for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2319 1.1 augustss for (bw = i = 0; i < npoll; i++)
2320 1.1 augustss bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2321 1.1 augustss if (bw < bestbw) {
2322 1.1 augustss bestbw = bw;
2323 1.1 augustss bestoffs = offs;
2324 1.1 augustss }
2325 1.1 augustss }
2326 1.1 augustss DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2327 1.1 augustss
2328 1.1 augustss upipe->iinfo->stdstart = 0;
2329 1.1 augustss for(i = 0; i < npoll; i++) {
2330 1.1 augustss upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2331 1.42 augustss sqh->elink = 0;
2332 1.42 augustss sqh->qh.qh_elink = LE(UHCI_PTR_T);
2333 1.1 augustss sqh->pos = MOD(i * ival + bestoffs);
2334 1.1 augustss sqh->intr_info = upipe->iinfo;
2335 1.1 augustss }
2336 1.1 augustss #undef MOD
2337 1.1 augustss
2338 1.1 augustss s = splusb();
2339 1.1 augustss LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list);
2340 1.1 augustss splx(s);
2341 1.1 augustss
2342 1.1 augustss uhci_lock_frames(sc);
2343 1.1 augustss /* Enter QHs into the controller data structures. */
2344 1.1 augustss for(i = 0; i < npoll; i++)
2345 1.1 augustss uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos,
2346 1.1 augustss upipe->u.intr.qhs[i]);
2347 1.1 augustss uhci_unlock_frames(sc);
2348 1.1 augustss
2349 1.1 augustss DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
2350 1.1 augustss return (USBD_NORMAL_COMPLETION);
2351 1.1 augustss }
2352 1.1 augustss
2353 1.1 augustss /* Open a new pipe. */
2354 1.1 augustss usbd_status
2355 1.1 augustss uhci_open(pipe)
2356 1.1 augustss usbd_pipe_handle pipe;
2357 1.1 augustss {
2358 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2359 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2360 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2361 1.1 augustss usbd_status r;
2362 1.1 augustss
2363 1.1 augustss DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2364 1.1 augustss pipe, pipe->device->address,
2365 1.1 augustss ed->bEndpointAddress, sc->sc_addr));
2366 1.1 augustss if (pipe->device->address == sc->sc_addr) {
2367 1.1 augustss switch (ed->bEndpointAddress) {
2368 1.1 augustss case USB_CONTROL_ENDPOINT:
2369 1.1 augustss pipe->methods = &uhci_root_ctrl_methods;
2370 1.1 augustss break;
2371 1.45 augustss case UE_DIR_IN | UHCI_INTR_ENDPT:
2372 1.1 augustss pipe->methods = &uhci_root_intr_methods;
2373 1.1 augustss break;
2374 1.1 augustss default:
2375 1.1 augustss return (USBD_INVAL);
2376 1.1 augustss }
2377 1.1 augustss } else {
2378 1.1 augustss upipe->iinfo = uhci_alloc_intr_info(sc);
2379 1.1 augustss if (upipe->iinfo == 0)
2380 1.1 augustss return (USBD_NOMEM);
2381 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
2382 1.1 augustss case UE_CONTROL:
2383 1.1 augustss pipe->methods = &uhci_device_ctrl_methods;
2384 1.1 augustss upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2385 1.1 augustss if (upipe->u.ctl.sqh == 0)
2386 1.5 augustss goto bad;
2387 1.1 augustss upipe->u.ctl.setup = uhci_alloc_std(sc);
2388 1.5 augustss if (upipe->u.ctl.setup == 0) {
2389 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2390 1.5 augustss goto bad;
2391 1.5 augustss }
2392 1.1 augustss upipe->u.ctl.stat = uhci_alloc_std(sc);
2393 1.5 augustss if (upipe->u.ctl.stat == 0) {
2394 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2395 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2396 1.5 augustss goto bad;
2397 1.5 augustss }
2398 1.50 augustss r = usb_allocmem(&sc->sc_bus,
2399 1.7 augustss sizeof(usb_device_request_t),
2400 1.7 augustss 0, &upipe->u.ctl.reqdma);
2401 1.5 augustss if (r != USBD_NORMAL_COMPLETION) {
2402 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2403 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2404 1.5 augustss uhci_free_std(sc, upipe->u.ctl.stat);
2405 1.5 augustss goto bad;
2406 1.5 augustss }
2407 1.1 augustss break;
2408 1.1 augustss case UE_INTERRUPT:
2409 1.1 augustss pipe->methods = &uhci_device_intr_methods;
2410 1.1 augustss return (uhci_device_setintr(sc, upipe, ed->bInterval));
2411 1.1 augustss case UE_ISOCHRONOUS:
2412 1.16 augustss pipe->methods = &uhci_device_isoc_methods;
2413 1.48 augustss return (uhci_setup_isoc(pipe));
2414 1.1 augustss case UE_BULK:
2415 1.1 augustss pipe->methods = &uhci_device_bulk_methods;
2416 1.1 augustss upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2417 1.1 augustss if (upipe->u.bulk.sqh == 0)
2418 1.5 augustss goto bad;
2419 1.1 augustss break;
2420 1.1 augustss }
2421 1.1 augustss }
2422 1.1 augustss return (USBD_NORMAL_COMPLETION);
2423 1.5 augustss
2424 1.5 augustss bad:
2425 1.5 augustss uhci_free_intr_info(upipe->iinfo);
2426 1.5 augustss return (USBD_NOMEM);
2427 1.1 augustss }
2428 1.1 augustss
2429 1.1 augustss /*
2430 1.1 augustss * Data structures and routines to emulate the root hub.
2431 1.1 augustss */
2432 1.1 augustss usb_device_descriptor_t uhci_devd = {
2433 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2434 1.1 augustss UDESC_DEVICE, /* type */
2435 1.1 augustss {0x00, 0x01}, /* USB version */
2436 1.1 augustss UCLASS_HUB, /* class */
2437 1.1 augustss USUBCLASS_HUB, /* subclass */
2438 1.1 augustss 0, /* protocol */
2439 1.1 augustss 64, /* max packet */
2440 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2441 1.1 augustss 1,2,0, /* string indicies */
2442 1.1 augustss 1 /* # of configurations */
2443 1.1 augustss };
2444 1.1 augustss
2445 1.1 augustss usb_config_descriptor_t uhci_confd = {
2446 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2447 1.1 augustss UDESC_CONFIG,
2448 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2449 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2450 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2451 1.1 augustss 1,
2452 1.1 augustss 1,
2453 1.1 augustss 0,
2454 1.1 augustss UC_SELF_POWERED,
2455 1.1 augustss 0 /* max power */
2456 1.1 augustss };
2457 1.1 augustss
2458 1.1 augustss usb_interface_descriptor_t uhci_ifcd = {
2459 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2460 1.1 augustss UDESC_INTERFACE,
2461 1.1 augustss 0,
2462 1.1 augustss 0,
2463 1.1 augustss 1,
2464 1.1 augustss UCLASS_HUB,
2465 1.1 augustss USUBCLASS_HUB,
2466 1.1 augustss 0,
2467 1.1 augustss 0
2468 1.1 augustss };
2469 1.1 augustss
2470 1.1 augustss usb_endpoint_descriptor_t uhci_endpd = {
2471 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
2472 1.1 augustss UDESC_ENDPOINT,
2473 1.45 augustss UE_DIR_IN | UHCI_INTR_ENDPT,
2474 1.1 augustss UE_INTERRUPT,
2475 1.1 augustss {8},
2476 1.1 augustss 255
2477 1.1 augustss };
2478 1.1 augustss
2479 1.1 augustss usb_hub_descriptor_t uhci_hubd_piix = {
2480 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
2481 1.1 augustss UDESC_HUB,
2482 1.1 augustss 2,
2483 1.1 augustss { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2484 1.1 augustss 50, /* power on to power good */
2485 1.1 augustss 0,
2486 1.1 augustss { 0x00 }, /* both ports are removable */
2487 1.1 augustss };
2488 1.1 augustss
2489 1.1 augustss int
2490 1.1 augustss uhci_str(p, l, s)
2491 1.1 augustss usb_string_descriptor_t *p;
2492 1.1 augustss int l;
2493 1.1 augustss char *s;
2494 1.1 augustss {
2495 1.1 augustss int i;
2496 1.1 augustss
2497 1.1 augustss if (l == 0)
2498 1.1 augustss return (0);
2499 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2500 1.1 augustss if (l == 1)
2501 1.1 augustss return (1);
2502 1.1 augustss p->bDescriptorType = UDESC_STRING;
2503 1.1 augustss l -= 2;
2504 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2505 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2506 1.1 augustss return (2*i+2);
2507 1.1 augustss }
2508 1.1 augustss
2509 1.1 augustss /*
2510 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2511 1.1 augustss */
2512 1.1 augustss usbd_status
2513 1.1 augustss uhci_root_ctrl_transfer(reqh)
2514 1.1 augustss usbd_request_handle reqh;
2515 1.1 augustss {
2516 1.16 augustss usbd_status r;
2517 1.16 augustss
2518 1.52 augustss /* Insert last in queue. */
2519 1.16 augustss r = usb_insert_transfer(reqh);
2520 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
2521 1.16 augustss return (r);
2522 1.52 augustss
2523 1.52 augustss /* Pipe isn't running, start first */
2524 1.52 augustss return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2525 1.16 augustss }
2526 1.16 augustss
2527 1.16 augustss usbd_status
2528 1.16 augustss uhci_root_ctrl_start(reqh)
2529 1.16 augustss usbd_request_handle reqh;
2530 1.16 augustss {
2531 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
2532 1.1 augustss usb_device_request_t *req;
2533 1.59 augustss void *buf = NULL;
2534 1.1 augustss int port, x;
2535 1.52 augustss int s, len, value, index, status, change, l, totlen = 0;
2536 1.1 augustss usb_port_status_t ps;
2537 1.1 augustss usbd_status r;
2538 1.1 augustss
2539 1.48 augustss #ifdef DIAGNOSTIC
2540 1.48 augustss if (!(reqh->rqflags & URQ_REQUEST))
2541 1.1 augustss panic("uhci_root_ctrl_transfer: not a request\n");
2542 1.48 augustss #endif
2543 1.1 augustss req = &reqh->request;
2544 1.1 augustss
2545 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
2546 1.1 augustss req->bmRequestType, req->bRequest));
2547 1.1 augustss
2548 1.1 augustss len = UGETW(req->wLength);
2549 1.1 augustss value = UGETW(req->wValue);
2550 1.1 augustss index = UGETW(req->wIndex);
2551 1.49 augustss
2552 1.49 augustss if (len != 0)
2553 1.49 augustss buf = KERNADDR(&reqh->dmabuf);
2554 1.49 augustss
2555 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2556 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2557 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2558 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2559 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2560 1.1 augustss /*
2561 1.13 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2562 1.1 augustss * for the integrated root hub.
2563 1.1 augustss */
2564 1.1 augustss break;
2565 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2566 1.1 augustss if (len > 0) {
2567 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2568 1.1 augustss totlen = 1;
2569 1.1 augustss }
2570 1.1 augustss break;
2571 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2572 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
2573 1.1 augustss switch(value >> 8) {
2574 1.1 augustss case UDESC_DEVICE:
2575 1.1 augustss if ((value & 0xff) != 0) {
2576 1.1 augustss r = USBD_IOERROR;
2577 1.1 augustss goto ret;
2578 1.1 augustss }
2579 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2580 1.27 augustss USETW(uhci_devd.idVendor, sc->sc_id_vendor);
2581 1.1 augustss memcpy(buf, &uhci_devd, l);
2582 1.1 augustss break;
2583 1.1 augustss case UDESC_CONFIG:
2584 1.1 augustss if ((value & 0xff) != 0) {
2585 1.1 augustss r = USBD_IOERROR;
2586 1.1 augustss goto ret;
2587 1.1 augustss }
2588 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2589 1.1 augustss memcpy(buf, &uhci_confd, l);
2590 1.1 augustss buf = (char *)buf + l;
2591 1.1 augustss len -= l;
2592 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2593 1.1 augustss totlen += l;
2594 1.1 augustss memcpy(buf, &uhci_ifcd, l);
2595 1.1 augustss buf = (char *)buf + l;
2596 1.1 augustss len -= l;
2597 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2598 1.1 augustss totlen += l;
2599 1.1 augustss memcpy(buf, &uhci_endpd, l);
2600 1.1 augustss break;
2601 1.1 augustss case UDESC_STRING:
2602 1.1 augustss if (len == 0)
2603 1.1 augustss break;
2604 1.1 augustss *(u_int8_t *)buf = 0;
2605 1.1 augustss totlen = 1;
2606 1.1 augustss switch (value & 0xff) {
2607 1.1 augustss case 1: /* Vendor */
2608 1.8 augustss totlen = uhci_str(buf, len, sc->sc_vendor);
2609 1.1 augustss break;
2610 1.1 augustss case 2: /* Product */
2611 1.8 augustss totlen = uhci_str(buf, len, "UHCI root hub");
2612 1.1 augustss break;
2613 1.1 augustss }
2614 1.1 augustss break;
2615 1.1 augustss default:
2616 1.1 augustss r = USBD_IOERROR;
2617 1.1 augustss goto ret;
2618 1.1 augustss }
2619 1.1 augustss break;
2620 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2621 1.1 augustss if (len > 0) {
2622 1.1 augustss *(u_int8_t *)buf = 0;
2623 1.1 augustss totlen = 1;
2624 1.1 augustss }
2625 1.1 augustss break;
2626 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2627 1.1 augustss if (len > 1) {
2628 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2629 1.1 augustss totlen = 2;
2630 1.1 augustss }
2631 1.1 augustss break;
2632 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2633 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2634 1.1 augustss if (len > 1) {
2635 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2636 1.1 augustss totlen = 2;
2637 1.1 augustss }
2638 1.1 augustss break;
2639 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2640 1.1 augustss if (value >= USB_MAX_DEVICES) {
2641 1.1 augustss r = USBD_IOERROR;
2642 1.1 augustss goto ret;
2643 1.1 augustss }
2644 1.1 augustss sc->sc_addr = value;
2645 1.1 augustss break;
2646 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2647 1.1 augustss if (value != 0 && value != 1) {
2648 1.1 augustss r = USBD_IOERROR;
2649 1.1 augustss goto ret;
2650 1.1 augustss }
2651 1.1 augustss sc->sc_conf = value;
2652 1.1 augustss break;
2653 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2654 1.1 augustss break;
2655 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2656 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2657 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2658 1.1 augustss r = USBD_IOERROR;
2659 1.1 augustss goto ret;
2660 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2661 1.1 augustss break;
2662 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2663 1.1 augustss break;
2664 1.1 augustss /* Hub requests */
2665 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2666 1.1 augustss break;
2667 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2668 1.12 augustss DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2669 1.12 augustss "port=%d feature=%d\n",
2670 1.1 augustss index, value));
2671 1.1 augustss if (index == 1)
2672 1.1 augustss port = UHCI_PORTSC1;
2673 1.1 augustss else if (index == 2)
2674 1.1 augustss port = UHCI_PORTSC2;
2675 1.1 augustss else {
2676 1.1 augustss r = USBD_IOERROR;
2677 1.1 augustss goto ret;
2678 1.1 augustss }
2679 1.1 augustss switch(value) {
2680 1.1 augustss case UHF_PORT_ENABLE:
2681 1.1 augustss x = UREAD2(sc, port);
2682 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
2683 1.1 augustss break;
2684 1.1 augustss case UHF_PORT_SUSPEND:
2685 1.1 augustss x = UREAD2(sc, port);
2686 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
2687 1.1 augustss break;
2688 1.1 augustss case UHF_PORT_RESET:
2689 1.1 augustss x = UREAD2(sc, port);
2690 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2691 1.1 augustss break;
2692 1.1 augustss case UHF_C_PORT_CONNECTION:
2693 1.1 augustss x = UREAD2(sc, port);
2694 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
2695 1.1 augustss break;
2696 1.1 augustss case UHF_C_PORT_ENABLE:
2697 1.1 augustss x = UREAD2(sc, port);
2698 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
2699 1.1 augustss break;
2700 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2701 1.1 augustss x = UREAD2(sc, port);
2702 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
2703 1.1 augustss break;
2704 1.1 augustss case UHF_C_PORT_RESET:
2705 1.1 augustss sc->sc_isreset = 0;
2706 1.1 augustss r = USBD_NORMAL_COMPLETION;
2707 1.1 augustss goto ret;
2708 1.1 augustss case UHF_PORT_CONNECTION:
2709 1.1 augustss case UHF_PORT_OVER_CURRENT:
2710 1.1 augustss case UHF_PORT_POWER:
2711 1.1 augustss case UHF_PORT_LOW_SPEED:
2712 1.1 augustss case UHF_C_PORT_SUSPEND:
2713 1.1 augustss default:
2714 1.1 augustss r = USBD_IOERROR;
2715 1.1 augustss goto ret;
2716 1.1 augustss }
2717 1.1 augustss break;
2718 1.1 augustss case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
2719 1.1 augustss if (index == 1)
2720 1.1 augustss port = UHCI_PORTSC1;
2721 1.1 augustss else if (index == 2)
2722 1.1 augustss port = UHCI_PORTSC2;
2723 1.1 augustss else {
2724 1.1 augustss r = USBD_IOERROR;
2725 1.1 augustss goto ret;
2726 1.1 augustss }
2727 1.1 augustss if (len > 0) {
2728 1.1 augustss *(u_int8_t *)buf =
2729 1.1 augustss (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
2730 1.1 augustss UHCI_PORTSC_LS_SHIFT;
2731 1.1 augustss totlen = 1;
2732 1.1 augustss }
2733 1.1 augustss break;
2734 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2735 1.1 augustss if (value != 0) {
2736 1.1 augustss r = USBD_IOERROR;
2737 1.1 augustss goto ret;
2738 1.1 augustss }
2739 1.1 augustss l = min(len, USB_HUB_DESCRIPTOR_SIZE);
2740 1.1 augustss totlen = l;
2741 1.1 augustss memcpy(buf, &uhci_hubd_piix, l);
2742 1.1 augustss break;
2743 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2744 1.1 augustss if (len != 4) {
2745 1.1 augustss r = USBD_IOERROR;
2746 1.1 augustss goto ret;
2747 1.1 augustss }
2748 1.1 augustss memset(buf, 0, len);
2749 1.1 augustss totlen = len;
2750 1.1 augustss break;
2751 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2752 1.1 augustss if (index == 1)
2753 1.1 augustss port = UHCI_PORTSC1;
2754 1.1 augustss else if (index == 2)
2755 1.1 augustss port = UHCI_PORTSC2;
2756 1.1 augustss else {
2757 1.1 augustss r = USBD_IOERROR;
2758 1.1 augustss goto ret;
2759 1.1 augustss }
2760 1.1 augustss if (len != 4) {
2761 1.1 augustss r = USBD_IOERROR;
2762 1.1 augustss goto ret;
2763 1.1 augustss }
2764 1.1 augustss x = UREAD2(sc, port);
2765 1.1 augustss status = change = 0;
2766 1.1 augustss if (x & UHCI_PORTSC_CCS )
2767 1.1 augustss status |= UPS_CURRENT_CONNECT_STATUS;
2768 1.1 augustss if (x & UHCI_PORTSC_CSC )
2769 1.1 augustss change |= UPS_C_CONNECT_STATUS;
2770 1.1 augustss if (x & UHCI_PORTSC_PE )
2771 1.1 augustss status |= UPS_PORT_ENABLED;
2772 1.1 augustss if (x & UHCI_PORTSC_POEDC)
2773 1.1 augustss change |= UPS_C_PORT_ENABLED;
2774 1.1 augustss if (x & UHCI_PORTSC_OCI )
2775 1.1 augustss status |= UPS_OVERCURRENT_INDICATOR;
2776 1.1 augustss if (x & UHCI_PORTSC_OCIC )
2777 1.1 augustss change |= UPS_C_OVERCURRENT_INDICATOR;
2778 1.1 augustss if (x & UHCI_PORTSC_SUSP )
2779 1.1 augustss status |= UPS_SUSPEND;
2780 1.1 augustss if (x & UHCI_PORTSC_LSDA )
2781 1.1 augustss status |= UPS_LOW_SPEED;
2782 1.1 augustss status |= UPS_PORT_POWER;
2783 1.1 augustss if (sc->sc_isreset)
2784 1.1 augustss change |= UPS_C_PORT_RESET;
2785 1.1 augustss USETW(ps.wPortStatus, status);
2786 1.1 augustss USETW(ps.wPortChange, change);
2787 1.1 augustss l = min(len, sizeof ps);
2788 1.1 augustss memcpy(buf, &ps, l);
2789 1.1 augustss totlen = l;
2790 1.1 augustss break;
2791 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2792 1.1 augustss r = USBD_IOERROR;
2793 1.1 augustss goto ret;
2794 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2795 1.1 augustss break;
2796 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2797 1.1 augustss if (index == 1)
2798 1.1 augustss port = UHCI_PORTSC1;
2799 1.1 augustss else if (index == 2)
2800 1.1 augustss port = UHCI_PORTSC2;
2801 1.1 augustss else {
2802 1.1 augustss r = USBD_IOERROR;
2803 1.1 augustss goto ret;
2804 1.1 augustss }
2805 1.1 augustss switch(value) {
2806 1.1 augustss case UHF_PORT_ENABLE:
2807 1.1 augustss x = UREAD2(sc, port);
2808 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2809 1.1 augustss break;
2810 1.1 augustss case UHF_PORT_SUSPEND:
2811 1.1 augustss x = UREAD2(sc, port);
2812 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
2813 1.1 augustss break;
2814 1.1 augustss case UHF_PORT_RESET:
2815 1.1 augustss x = UREAD2(sc, port);
2816 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2817 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
2818 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2819 1.1 augustss delay(100);
2820 1.1 augustss x = UREAD2(sc, port);
2821 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2822 1.1 augustss delay(100);
2823 1.1 augustss DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
2824 1.1 augustss index, UREAD2(sc, port)));
2825 1.1 augustss sc->sc_isreset = 1;
2826 1.1 augustss break;
2827 1.1 augustss case UHF_C_PORT_CONNECTION:
2828 1.1 augustss case UHF_C_PORT_ENABLE:
2829 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2830 1.1 augustss case UHF_PORT_CONNECTION:
2831 1.1 augustss case UHF_PORT_OVER_CURRENT:
2832 1.1 augustss case UHF_PORT_POWER:
2833 1.1 augustss case UHF_PORT_LOW_SPEED:
2834 1.1 augustss case UHF_C_PORT_SUSPEND:
2835 1.1 augustss case UHF_C_PORT_RESET:
2836 1.1 augustss default:
2837 1.1 augustss r = USBD_IOERROR;
2838 1.1 augustss goto ret;
2839 1.1 augustss }
2840 1.1 augustss break;
2841 1.1 augustss default:
2842 1.1 augustss r = USBD_IOERROR;
2843 1.1 augustss goto ret;
2844 1.1 augustss }
2845 1.1 augustss reqh->actlen = totlen;
2846 1.1 augustss r = USBD_NORMAL_COMPLETION;
2847 1.1 augustss ret:
2848 1.1 augustss reqh->status = r;
2849 1.41 augustss reqh->hcpriv = 0;
2850 1.52 augustss s = splusb();
2851 1.41 augustss usb_transfer_complete(reqh);
2852 1.52 augustss splx(s);
2853 1.1 augustss return (USBD_IN_PROGRESS);
2854 1.1 augustss }
2855 1.1 augustss
2856 1.1 augustss /* Abort a root control request. */
2857 1.1 augustss void
2858 1.1 augustss uhci_root_ctrl_abort(reqh)
2859 1.1 augustss usbd_request_handle reqh;
2860 1.1 augustss {
2861 1.6 augustss /* Nothing to do, all transfers are syncronous. */
2862 1.1 augustss }
2863 1.1 augustss
2864 1.1 augustss /* Close the root pipe. */
2865 1.1 augustss void
2866 1.1 augustss uhci_root_ctrl_close(pipe)
2867 1.1 augustss usbd_pipe_handle pipe;
2868 1.1 augustss {
2869 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2870 1.30 augustss
2871 1.30 augustss sc->sc_has_timo = 0;
2872 1.1 augustss DPRINTF(("uhci_root_ctrl_close\n"));
2873 1.1 augustss }
2874 1.1 augustss
2875 1.1 augustss /* Abort a root interrupt request. */
2876 1.1 augustss void
2877 1.1 augustss uhci_root_intr_abort(reqh)
2878 1.1 augustss usbd_request_handle reqh;
2879 1.1 augustss {
2880 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
2881 1.30 augustss
2882 1.13 augustss usb_untimeout(uhci_timo, reqh, reqh->timo_handle);
2883 1.30 augustss sc->sc_has_timo = 0;
2884 1.58 augustss
2885 1.58 augustss if (reqh->pipe->intrreqh == reqh) {
2886 1.58 augustss DPRINTF(("uhci_root_intr_abort: remove\n"));
2887 1.58 augustss reqh->pipe->intrreqh = 0;
2888 1.58 augustss }
2889 1.58 augustss reqh->status = USBD_CANCELLED;
2890 1.58 augustss usb_transfer_complete(reqh);
2891 1.1 augustss }
2892 1.1 augustss
2893 1.16 augustss usbd_status
2894 1.16 augustss uhci_root_intr_transfer(reqh)
2895 1.16 augustss usbd_request_handle reqh;
2896 1.16 augustss {
2897 1.16 augustss usbd_status r;
2898 1.16 augustss
2899 1.52 augustss /* Insert last in queue. */
2900 1.16 augustss r = usb_insert_transfer(reqh);
2901 1.16 augustss if (r != USBD_NORMAL_COMPLETION)
2902 1.16 augustss return (r);
2903 1.52 augustss
2904 1.52 augustss /* Pipe isn't running, start first */
2905 1.52 augustss return (uhci_root_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2906 1.16 augustss }
2907 1.16 augustss
2908 1.1 augustss /* Start a transfer on the root interrupt pipe */
2909 1.1 augustss usbd_status
2910 1.16 augustss uhci_root_intr_start(reqh)
2911 1.1 augustss usbd_request_handle reqh;
2912 1.1 augustss {
2913 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
2914 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2915 1.1 augustss
2916 1.49 augustss DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p len=%d flags=%d\n",
2917 1.49 augustss reqh, reqh->length, reqh->flags));
2918 1.1 augustss
2919 1.1 augustss sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval);
2920 1.13 augustss usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
2921 1.30 augustss sc->sc_has_timo = reqh;
2922 1.1 augustss return (USBD_IN_PROGRESS);
2923 1.1 augustss }
2924 1.1 augustss
2925 1.1 augustss /* Close the root interrupt pipe. */
2926 1.1 augustss void
2927 1.1 augustss uhci_root_intr_close(pipe)
2928 1.1 augustss usbd_pipe_handle pipe;
2929 1.1 augustss {
2930 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2931 1.30 augustss
2932 1.13 augustss usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle);
2933 1.30 augustss sc->sc_has_timo = 0;
2934 1.1 augustss DPRINTF(("uhci_root_intr_close\n"));
2935 1.1 augustss }
2936 1.26 augustss
2937