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uhci.c revision 1.7
      1  1.7  augustss /*	$NetBSD: uhci.c,v 1.7 1998/07/24 21:09:07 augustss Exp $	*/
      2  1.1  augustss 
      3  1.1  augustss /*
      4  1.1  augustss  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  1.1  augustss  * All rights reserved.
      6  1.1  augustss  *
      7  1.1  augustss  * Author: Lennart Augustsson <augustss (at) carlstedt.se>
      8  1.1  augustss  *         Carlstedt Research & Technology
      9  1.1  augustss  *
     10  1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11  1.1  augustss  * modification, are permitted provided that the following conditions
     12  1.1  augustss  * are met:
     13  1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14  1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15  1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18  1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     19  1.1  augustss  *    must display the following acknowledgement:
     20  1.1  augustss  *        This product includes software developed by the NetBSD
     21  1.1  augustss  *        Foundation, Inc. and its contributors.
     22  1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1  augustss  *    contributors may be used to endorse or promote products derived
     24  1.1  augustss  *    from this software without specific prior written permission.
     25  1.1  augustss  *
     26  1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1  augustss  */
     38  1.1  augustss 
     39  1.1  augustss /*
     40  1.1  augustss  * USB Universal Host Controller driver.
     41  1.1  augustss  * Handles PIIX3 and PIIX4.
     42  1.1  augustss  *
     43  1.1  augustss  * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     44  1.1  augustss  *              ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     45  1.1  augustss  * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf
     46  1.1  augustss  * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
     47  1.1  augustss  */
     48  1.1  augustss 
     49  1.1  augustss #include <sys/param.h>
     50  1.1  augustss #include <sys/systm.h>
     51  1.1  augustss #include <sys/kernel.h>
     52  1.1  augustss #include <sys/malloc.h>
     53  1.1  augustss #include <sys/device.h>
     54  1.1  augustss #include <sys/proc.h>
     55  1.1  augustss #include <sys/queue.h>
     56  1.1  augustss #include <sys/select.h>
     57  1.1  augustss 
     58  1.7  augustss #include <machine/bus.h>
     59  1.7  augustss 
     60  1.1  augustss #include <dev/usb/usb.h>
     61  1.1  augustss #include <dev/usb/usbdi.h>
     62  1.1  augustss #include <dev/usb/usbdivar.h>
     63  1.7  augustss #include <dev/usb/usb_mem.h>
     64  1.1  augustss #include <dev/usb/usb_quirks.h>
     65  1.1  augustss 
     66  1.1  augustss #include <dev/usb/uhcireg.h>
     67  1.1  augustss #include <dev/usb/uhcivar.h>
     68  1.1  augustss 
     69  1.1  augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
     70  1.1  augustss 
     71  1.1  augustss struct uhci_pipe {
     72  1.1  augustss 	struct usbd_pipe pipe;
     73  1.1  augustss 	uhci_intr_info_t *iinfo;
     74  1.1  augustss 	int newtoggle;
     75  1.1  augustss 	/* Info needed for different pipe kinds. */
     76  1.1  augustss 	union {
     77  1.1  augustss 		/* Control pipe */
     78  1.1  augustss 		struct {
     79  1.1  augustss 			uhci_soft_qh_t *sqh;
     80  1.7  augustss 			usb_dma_t reqdma;
     81  1.7  augustss 			usb_dma_t datadma;
     82  1.1  augustss 			uhci_soft_td_t *setup, *stat, *xferend;
     83  1.1  augustss 			u_int length;
     84  1.1  augustss 		} ctl;
     85  1.1  augustss 		/* Interrupt pipe */
     86  1.1  augustss 		struct {
     87  1.7  augustss 			usb_dma_t datadma;
     88  1.1  augustss 			int npoll;
     89  1.1  augustss 			uhci_soft_qh_t **qhs;
     90  1.1  augustss 		} intr;
     91  1.1  augustss 		/* Bulk pipe */
     92  1.1  augustss 		struct {
     93  1.1  augustss 			uhci_soft_qh_t *sqh;
     94  1.7  augustss 			usb_dma_t datadma;
     95  1.1  augustss 			u_int length;
     96  1.1  augustss 			int isread;
     97  1.1  augustss 		} bulk;
     98  1.1  augustss 	} u;
     99  1.1  augustss };
    100  1.1  augustss 
    101  1.1  augustss /*
    102  1.1  augustss  * The uhci_intr_info free list can be global since they contain
    103  1.1  augustss  * no dma specific data.  The other free lists do.
    104  1.1  augustss  */
    105  1.1  augustss int uhci_global_init_done = 0;
    106  1.1  augustss LIST_HEAD(, uhci_intr_info) uhci_ii_free;
    107  1.1  augustss 
    108  1.1  augustss void		uhci_busreset __P((uhci_softc_t *));
    109  1.1  augustss void		uhci_run __P((uhci_softc_t *, int run));
    110  1.1  augustss uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *));
    111  1.1  augustss void		uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *));
    112  1.1  augustss uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *));
    113  1.1  augustss void		uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *));
    114  1.1  augustss uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *));
    115  1.1  augustss void		uhci_free_intr_info __P((uhci_intr_info_t *ii));
    116  1.1  augustss void		uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *,
    117  1.1  augustss 				      uhci_intr_info_t *));
    118  1.1  augustss void		uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *));
    119  1.1  augustss 
    120  1.1  augustss void		uhci_free_std_chain __P((uhci_softc_t *,
    121  1.1  augustss 					 uhci_soft_td_t *, uhci_soft_td_t *));
    122  1.1  augustss usbd_status	uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *,
    123  1.7  augustss 					  int, int, usb_dma_t *,
    124  1.1  augustss 					  uhci_soft_td_t **,
    125  1.1  augustss 					  uhci_soft_td_t **));
    126  1.1  augustss void		uhci_timo __P((void *));
    127  1.1  augustss void		uhci_waitintr __P((uhci_softc_t *, usbd_request_handle));
    128  1.1  augustss void		uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *));
    129  1.1  augustss void		uhci_ii_done __P((uhci_intr_info_t *, int));
    130  1.1  augustss void		uhci_timeout __P((void *));
    131  1.1  augustss void		uhci_wakeup_ctrl __P((void *, int, int, void *, int));
    132  1.1  augustss void		uhci_lock_frames __P((uhci_softc_t *));
    133  1.1  augustss void		uhci_unlock_frames __P((uhci_softc_t *));
    134  1.1  augustss void		uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
    135  1.1  augustss void		uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
    136  1.1  augustss void		uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
    137  1.1  augustss void		uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
    138  1.1  augustss int		uhci_str __P((usb_string_descriptor_t *, int, char *));
    139  1.1  augustss 
    140  1.1  augustss void		uhci_device_close __P((struct uhci_pipe *));
    141  1.1  augustss 
    142  1.1  augustss void		uhci_wakeup_cb __P((usbd_request_handle reqh));
    143  1.1  augustss 
    144  1.1  augustss usbd_status	uhci_device_ctrl_transfer __P((usbd_request_handle));
    145  1.1  augustss void		uhci_device_ctrl_abort __P((usbd_request_handle));
    146  1.1  augustss void		uhci_device_ctrl_close __P((usbd_pipe_handle));
    147  1.1  augustss usbd_status	uhci_device_intr_transfer __P((usbd_request_handle));
    148  1.1  augustss void		uhci_device_intr_abort __P((usbd_request_handle));
    149  1.1  augustss void		uhci_device_intr_close __P((usbd_pipe_handle));
    150  1.1  augustss usbd_status	uhci_device_bulk_transfer __P((usbd_request_handle));
    151  1.1  augustss void		uhci_device_bulk_abort __P((usbd_request_handle));
    152  1.1  augustss void		uhci_device_bulk_close __P((usbd_pipe_handle));
    153  1.1  augustss 
    154  1.1  augustss usbd_status	uhci_root_ctrl_transfer __P((usbd_request_handle));
    155  1.1  augustss void		uhci_root_ctrl_abort __P((usbd_request_handle));
    156  1.1  augustss void		uhci_root_ctrl_close __P((usbd_pipe_handle));
    157  1.1  augustss usbd_status	uhci_root_intr_transfer __P((usbd_request_handle));
    158  1.1  augustss void		uhci_root_intr_abort __P((usbd_request_handle));
    159  1.1  augustss void		uhci_root_intr_close __P((usbd_pipe_handle));
    160  1.1  augustss 
    161  1.1  augustss usbd_status	uhci_open __P((usbd_pipe_handle));
    162  1.1  augustss 
    163  1.1  augustss usbd_status	uhci_device_request __P((usbd_request_handle reqh));
    164  1.1  augustss void		uhci_ctrl_done __P((uhci_intr_info_t *ii));
    165  1.1  augustss void		uhci_bulk_done __P((uhci_intr_info_t *ii));
    166  1.1  augustss 
    167  1.1  augustss void		uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
    168  1.1  augustss void		uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
    169  1.1  augustss usbd_status	uhci_device_setintr __P((uhci_softc_t *sc,
    170  1.1  augustss 					 struct uhci_pipe *pipe, int ival));
    171  1.1  augustss void		uhci_intr_done __P((uhci_intr_info_t *ii));
    172  1.1  augustss 
    173  1.1  augustss #ifdef USB_DEBUG
    174  1.1  augustss static void	uhci_dumpregs __P((uhci_softc_t *));
    175  1.1  augustss void		uhci_dump_tds __P((uhci_soft_td_t *));
    176  1.1  augustss void		uhci_dump_qh __P((uhci_soft_qh_t *));
    177  1.1  augustss void		uhci_dump __P((void));
    178  1.1  augustss void		uhci_dump_td __P((uhci_soft_td_t *));
    179  1.1  augustss #endif
    180  1.1  augustss 
    181  1.1  augustss #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
    182  1.1  augustss #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
    183  1.1  augustss #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
    184  1.1  augustss #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
    185  1.1  augustss 
    186  1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    187  1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    188  1.1  augustss 
    189  1.1  augustss #define UHCI_RESET_TIMEOUT 100	/* reset timeout */
    190  1.1  augustss #define UHCI_CTRL_TIMEOUT 500	/* control transaction timeout */
    191  1.1  augustss #define UHCI_ISO_DELAY 50	/* delay of start of iso */
    192  1.1  augustss 
    193  1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    194  1.1  augustss 
    195  1.1  augustss #define UHCI_INTR_ENDPT 1
    196  1.1  augustss 
    197  1.1  augustss struct usbd_methods uhci_root_ctrl_methods = {
    198  1.1  augustss 	uhci_root_ctrl_transfer,
    199  1.1  augustss 	uhci_root_ctrl_abort,
    200  1.1  augustss 	uhci_root_ctrl_close,
    201  1.1  augustss };
    202  1.1  augustss 
    203  1.1  augustss struct usbd_methods uhci_root_intr_methods = {
    204  1.1  augustss 	uhci_root_intr_transfer,
    205  1.1  augustss 	uhci_root_intr_abort,
    206  1.1  augustss 	uhci_root_intr_close,
    207  1.1  augustss };
    208  1.1  augustss 
    209  1.1  augustss struct usbd_methods uhci_device_ctrl_methods = {
    210  1.1  augustss 	uhci_device_ctrl_transfer,
    211  1.1  augustss 	uhci_device_ctrl_abort,
    212  1.1  augustss 	uhci_device_ctrl_close,
    213  1.1  augustss };
    214  1.1  augustss 
    215  1.1  augustss struct usbd_methods uhci_device_intr_methods = {
    216  1.1  augustss 	uhci_device_intr_transfer,
    217  1.1  augustss 	uhci_device_intr_abort,
    218  1.1  augustss 	uhci_device_intr_close,
    219  1.1  augustss };
    220  1.1  augustss 
    221  1.1  augustss struct usbd_methods uhci_device_bulk_methods = {
    222  1.1  augustss 	uhci_device_bulk_transfer,
    223  1.1  augustss 	uhci_device_bulk_abort,
    224  1.1  augustss 	uhci_device_bulk_close,
    225  1.1  augustss };
    226  1.1  augustss 
    227  1.1  augustss void
    228  1.1  augustss uhci_busreset(sc)
    229  1.1  augustss 	uhci_softc_t *sc;
    230  1.1  augustss {
    231  1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    232  1.1  augustss 	usbd_delay_ms(USB_RESET_DELAY);	/* wait at least 10ms */
    233  1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    234  1.1  augustss }
    235  1.1  augustss 
    236  1.1  augustss usbd_status
    237  1.1  augustss uhci_init(sc)
    238  1.1  augustss 	uhci_softc_t *sc;
    239  1.1  augustss {
    240  1.1  augustss 	usbd_status r;
    241  1.1  augustss 	int i, j;
    242  1.1  augustss 	uhci_soft_qh_t *csqh, *bsqh, *sqh;
    243  1.1  augustss 	uhci_soft_td_t *std;
    244  1.7  augustss 	usb_dma_t dma;
    245  1.1  augustss 
    246  1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    247  1.1  augustss 
    248  1.1  augustss 	if (!uhci_global_init_done) {
    249  1.1  augustss 		uhci_global_init_done = 1;
    250  1.1  augustss 		LIST_INIT(&uhci_ii_free);
    251  1.1  augustss 	}
    252  1.1  augustss 
    253  1.1  augustss #if defined(USB_DEBUG)
    254  1.1  augustss 	if (uhcidebug > 2)
    255  1.1  augustss 		uhci_dumpregs(sc);
    256  1.1  augustss #endif
    257  1.1  augustss 
    258  1.1  augustss 	uhci_run(sc, 0);			/* stop the controller */
    259  1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    260  1.1  augustss 
    261  1.1  augustss 	/* Allocate and initialize real frame array. */
    262  1.7  augustss 	r = usb_allocmem(sc->sc_dmatag,
    263  1.7  augustss 			 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    264  1.7  augustss 			 UHCI_FRAMELIST_ALIGN, &dma);
    265  1.1  augustss 	if (r != USBD_NORMAL_COMPLETION)
    266  1.1  augustss 		return (r);
    267  1.1  augustss 	sc->sc_pframes = KERNADDR(&dma);
    268  1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    269  1.1  augustss 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&dma)); /* set frame list */
    270  1.1  augustss 
    271  1.1  augustss 	uhci_busreset(sc);
    272  1.1  augustss 
    273  1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    274  1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    275  1.1  augustss 	if (!bsqh)
    276  1.1  augustss 		return (USBD_NOMEM);
    277  1.1  augustss 	bsqh->qh->qh_hlink = UHCI_PTR_T;	/* end of QH chain */
    278  1.1  augustss 	bsqh->qh->qh_elink = UHCI_PTR_T;
    279  1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    280  1.1  augustss 
    281  1.1  augustss 	/* Allocate the dummy QH where control traffic will be queued. */
    282  1.1  augustss 	csqh = uhci_alloc_sqh(sc);
    283  1.1  augustss 	if (!csqh)
    284  1.1  augustss 		return (USBD_NOMEM);
    285  1.1  augustss 	csqh->qh->hlink = bsqh;
    286  1.1  augustss 	csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q;
    287  1.1  augustss 	csqh->qh->qh_elink = UHCI_PTR_T;
    288  1.1  augustss 	sc->sc_ctl_start = sc->sc_ctl_end = csqh;
    289  1.1  augustss 
    290  1.1  augustss 	/*
    291  1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    292  1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    293  1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    294  1.1  augustss 	 */
    295  1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    296  1.1  augustss 		std = uhci_alloc_std(sc);
    297  1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    298  1.1  augustss 		if (!std || !sqh)
    299  1.1  augustss 			return (ENOMEM);
    300  1.1  augustss 		std->td->link.sqh = sqh;
    301  1.1  augustss 		std->td->td_link = sqh->physaddr | UHCI_PTR_Q;
    302  1.1  augustss 		std->td->td_status = UHCI_TD_IOS;	/* iso, inactive */
    303  1.1  augustss 		std->td->td_token = 0;
    304  1.1  augustss 		std->td->td_buffer = 0;
    305  1.1  augustss 		sqh->qh->hlink = csqh;
    306  1.1  augustss 		sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q;
    307  1.1  augustss 		sqh->qh->elink = 0;
    308  1.1  augustss 		sqh->qh->qh_elink = UHCI_PTR_T;
    309  1.1  augustss 		sc->sc_vframes[i].htd = std;
    310  1.1  augustss 		sc->sc_vframes[i].etd = std;
    311  1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    312  1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    313  1.1  augustss 		for (j = i;
    314  1.1  augustss 		     j < UHCI_FRAMELIST_COUNT;
    315  1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    316  1.1  augustss 			sc->sc_pframes[j] = std->physaddr;
    317  1.1  augustss 	}
    318  1.1  augustss 
    319  1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    320  1.1  augustss 
    321  1.1  augustss 	/* Set up the bus struct. */
    322  1.1  augustss 	sc->sc_bus.open_pipe = uhci_open;
    323  1.1  augustss 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    324  1.1  augustss 
    325  1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    326  1.1  augustss 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    327  1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    328  1.1  augustss 
    329  1.1  augustss 	uhci_run(sc, 1);			/* and here we go... */
    330  1.1  augustss 	return (USBD_NORMAL_COMPLETION);
    331  1.1  augustss }
    332  1.1  augustss 
    333  1.1  augustss #ifdef USB_DEBUG
    334  1.1  augustss static void
    335  1.1  augustss uhci_dumpregs(sc)
    336  1.1  augustss 	uhci_softc_t *sc;
    337  1.1  augustss {
    338  1.1  augustss 	printf("%s: regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    339  1.1  augustss 	       sc->sc_bus.bdev.dv_xname,
    340  1.1  augustss 	       UREAD2(sc, UHCI_CMD),
    341  1.1  augustss 	       UREAD2(sc, UHCI_STS),
    342  1.1  augustss 	       UREAD2(sc, UHCI_INTR),
    343  1.1  augustss 	       UREAD2(sc, UHCI_FRNUM),
    344  1.1  augustss 	       UREAD2(sc, UHCI_FLBASEADDR),
    345  1.1  augustss 	       UREAD2(sc, UHCI_SOF),
    346  1.1  augustss 	       UREAD2(sc, UHCI_PORTSC1),
    347  1.1  augustss 	       UREAD2(sc, UHCI_PORTSC2));
    348  1.1  augustss }
    349  1.1  augustss 
    350  1.1  augustss int uhci_longtd = 1;
    351  1.1  augustss 
    352  1.1  augustss void
    353  1.1  augustss uhci_dump_td(p)
    354  1.1  augustss 	uhci_soft_td_t *p;
    355  1.1  augustss {
    356  1.1  augustss 	printf("TD(%p) at %08lx = 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n",
    357  1.1  augustss 	       p, (long)p->physaddr,
    358  1.1  augustss 	       (long)p->td->td_link,
    359  1.1  augustss 	       (long)p->td->td_status,
    360  1.1  augustss 	       (long)p->td->td_token,
    361  1.1  augustss 	       (long)p->td->td_buffer);
    362  1.1  augustss 	if (uhci_longtd)
    363  1.1  augustss 		printf("  %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,D=%d,maxlen=%d\n",
    364  1.1  augustss 		       (long)p->td->td_link,
    365  1.1  augustss 		       "\20\1T\2Q\3VF",
    366  1.1  augustss 		       (long)p->td->td_status,
    367  1.1  augustss 		       "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    368  1.1  augustss 		       UHCI_TD_GET_ERRCNT(p->td->td_status),
    369  1.1  augustss 		       UHCI_TD_GET_ACTLEN(p->td->td_status),
    370  1.1  augustss 		       UHCI_TD_GET_PID(p->td->td_token),
    371  1.1  augustss 		       UHCI_TD_GET_DEVADDR(p->td->td_token),
    372  1.1  augustss 		       UHCI_TD_GET_ENDPT(p->td->td_token),
    373  1.1  augustss 		       UHCI_TD_GET_DT(p->td->td_token),
    374  1.1  augustss 		       UHCI_TD_GET_MAXLEN(p->td->td_token));
    375  1.1  augustss 
    376  1.1  augustss }
    377  1.1  augustss 
    378  1.1  augustss void
    379  1.1  augustss uhci_dump_qh(p)
    380  1.1  augustss 	uhci_soft_qh_t *p;
    381  1.1  augustss {
    382  1.1  augustss 	printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr,
    383  1.1  augustss 	       p->qh->qh_hlink, p->qh->qh_elink);
    384  1.1  augustss }
    385  1.1  augustss 
    386  1.1  augustss #if 0
    387  1.1  augustss void
    388  1.1  augustss uhci_dump()
    389  1.1  augustss {
    390  1.1  augustss 	uhci_softc_t *sc = uhci;
    391  1.1  augustss 
    392  1.1  augustss 	uhci_dumpregs(sc);
    393  1.1  augustss 	printf("intrs=%d\n", sc->sc_intrs);
    394  1.1  augustss 	printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);
    395  1.1  augustss 	uhci_dump_qh(sc->sc_ctl_start->qh->hlink);
    396  1.1  augustss }
    397  1.1  augustss #endif
    398  1.1  augustss 
    399  1.1  augustss void
    400  1.1  augustss uhci_dump_tds(std)
    401  1.1  augustss 	uhci_soft_td_t *std;
    402  1.1  augustss {
    403  1.1  augustss 	uhci_soft_td_t *p;
    404  1.1  augustss 
    405  1.1  augustss 	for(p = std; p; p = p->td->link.std)
    406  1.1  augustss 		uhci_dump_td(p);
    407  1.1  augustss }
    408  1.1  augustss #endif
    409  1.1  augustss 
    410  1.1  augustss /*
    411  1.1  augustss  * This routine is executed periodically and simulates interrupts
    412  1.1  augustss  * from the root controller interrupt pipe for port status change.
    413  1.1  augustss  */
    414  1.1  augustss void
    415  1.1  augustss uhci_timo(addr)
    416  1.1  augustss 	void *addr;
    417  1.1  augustss {
    418  1.1  augustss 	usbd_request_handle reqh = addr;
    419  1.1  augustss 	usbd_pipe_handle pipe = reqh->pipe;
    420  1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
    421  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
    422  1.1  augustss 	int s;
    423  1.1  augustss 	u_char *p;
    424  1.1  augustss 
    425  1.1  augustss 	DPRINTFN(15, ("uhci_timo\n"));
    426  1.1  augustss 
    427  1.1  augustss 	p = KERNADDR(&upipe->u.intr.datadma);
    428  1.1  augustss 	p[0] = 0;
    429  1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
    430  1.1  augustss 		p[0] |= 1<<1;
    431  1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
    432  1.1  augustss 		p[0] |= 1<<2;
    433  1.1  augustss 	if (p[0] != 0) {
    434  1.1  augustss 		reqh->actlen = 1;
    435  1.1  augustss 		reqh->status = USBD_NORMAL_COMPLETION;
    436  1.1  augustss 		s = splusb();
    437  1.1  augustss 		reqh->xfercb(reqh);
    438  1.1  augustss 		splx(s);
    439  1.1  augustss 	}
    440  1.1  augustss 	if (reqh->pipe->intrreqh == reqh) {
    441  1.1  augustss 		timeout(uhci_timo, addr, sc->sc_ival);
    442  1.1  augustss 	} else {
    443  1.7  augustss 		usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma);
    444  1.1  augustss 	}
    445  1.1  augustss }
    446  1.1  augustss 
    447  1.1  augustss 
    448  1.1  augustss void
    449  1.1  augustss uhci_lock_frames(sc)
    450  1.1  augustss 	uhci_softc_t *sc;
    451  1.1  augustss {
    452  1.1  augustss 	int s = splusb();
    453  1.1  augustss 	while (sc->sc_vflock) {
    454  1.1  augustss 		sc->sc_vflock |= UHCI_WANT_LOCK;
    455  1.1  augustss 		tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0);
    456  1.1  augustss 	}
    457  1.1  augustss 	sc->sc_vflock = UHCI_HAS_LOCK;
    458  1.1  augustss 	splx(s);
    459  1.1  augustss }
    460  1.1  augustss 
    461  1.1  augustss void
    462  1.1  augustss uhci_unlock_frames(sc)
    463  1.1  augustss 	uhci_softc_t *sc;
    464  1.1  augustss {
    465  1.1  augustss 	int s = splusb();
    466  1.1  augustss 	sc->sc_vflock &= ~UHCI_HAS_LOCK;
    467  1.1  augustss 	if (sc->sc_vflock & UHCI_WANT_LOCK)
    468  1.1  augustss 		wakeup(&sc->sc_vflock);
    469  1.1  augustss 	splx(s);
    470  1.1  augustss }
    471  1.1  augustss 
    472  1.1  augustss /*
    473  1.1  augustss  * Allocate an interrupt information struct.  A free list is kept
    474  1.1  augustss  * for fast allocation.
    475  1.1  augustss  */
    476  1.1  augustss uhci_intr_info_t *
    477  1.1  augustss uhci_alloc_intr_info(sc)
    478  1.1  augustss 	uhci_softc_t *sc;
    479  1.1  augustss {
    480  1.1  augustss 	uhci_intr_info_t *ii;
    481  1.1  augustss 
    482  1.1  augustss 	ii = LIST_FIRST(&uhci_ii_free);
    483  1.1  augustss 	if (ii)
    484  1.1  augustss 		LIST_REMOVE(ii, list);
    485  1.1  augustss 	else {
    486  1.1  augustss 		ii = malloc(sizeof(uhci_intr_info_t), M_USBDEV, M_NOWAIT);
    487  1.1  augustss 	}
    488  1.1  augustss 	ii->sc = sc;
    489  1.1  augustss 	return ii;
    490  1.1  augustss }
    491  1.1  augustss 
    492  1.1  augustss void
    493  1.1  augustss uhci_free_intr_info(ii)
    494  1.1  augustss 	uhci_intr_info_t *ii;
    495  1.1  augustss {
    496  1.1  augustss 	LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */
    497  1.1  augustss }
    498  1.1  augustss 
    499  1.1  augustss /* Add control QH, called at splusb(). */
    500  1.1  augustss void
    501  1.1  augustss uhci_add_ctrl(sc, sqh)
    502  1.1  augustss 	uhci_softc_t *sc;
    503  1.1  augustss 	uhci_soft_qh_t *sqh;
    504  1.1  augustss {
    505  1.1  augustss 	uhci_qh_t *eqh;
    506  1.1  augustss 
    507  1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
    508  1.1  augustss 	eqh = sc->sc_ctl_end->qh;
    509  1.1  augustss 	sqh->qh->hlink     = eqh->hlink;
    510  1.1  augustss 	sqh->qh->qh_hlink  = eqh->qh_hlink;
    511  1.1  augustss 	eqh->hlink         = sqh;
    512  1.1  augustss 	eqh->qh_hlink      = sqh->physaddr | UHCI_PTR_Q;
    513  1.1  augustss 	sc->sc_ctl_end = sqh;
    514  1.1  augustss }
    515  1.1  augustss 
    516  1.1  augustss /* Remove control QH, called at splusb(). */
    517  1.1  augustss void
    518  1.1  augustss uhci_remove_ctrl(sc, sqh)
    519  1.1  augustss 	uhci_softc_t *sc;
    520  1.1  augustss 	uhci_soft_qh_t *sqh;
    521  1.1  augustss {
    522  1.1  augustss 	uhci_soft_qh_t *pqh;
    523  1.1  augustss 
    524  1.1  augustss 	DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh));
    525  1.1  augustss 	for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink)
    526  1.1  augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
    527  1.1  augustss 		if (pqh->qh->qh_hlink & UHCI_PTR_T) {
    528  1.1  augustss 			printf("uhci_remove_ctrl: QH not found\n");
    529  1.1  augustss 			return;
    530  1.1  augustss 		}
    531  1.1  augustss #else
    532  1.1  augustss 		;
    533  1.1  augustss #endif
    534  1.1  augustss 	pqh->qh->hlink    = sqh->qh->hlink;
    535  1.1  augustss 	pqh->qh->qh_hlink = sqh->qh->qh_hlink;
    536  1.1  augustss 	if (sc->sc_ctl_end == sqh)
    537  1.1  augustss 		sc->sc_ctl_end = pqh;
    538  1.1  augustss }
    539  1.1  augustss 
    540  1.1  augustss /* Add bulk QH, called at splusb(). */
    541  1.1  augustss void
    542  1.1  augustss uhci_add_bulk(sc, sqh)
    543  1.1  augustss 	uhci_softc_t *sc;
    544  1.1  augustss 	uhci_soft_qh_t *sqh;
    545  1.1  augustss {
    546  1.1  augustss 	uhci_qh_t *eqh;
    547  1.1  augustss 
    548  1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
    549  1.1  augustss 	eqh = sc->sc_bulk_end->qh;
    550  1.1  augustss 	sqh->qh->hlink     = eqh->hlink;
    551  1.1  augustss 	sqh->qh->qh_hlink  = eqh->qh_hlink;
    552  1.1  augustss 	eqh->hlink         = sqh;
    553  1.1  augustss 	eqh->qh_hlink      = sqh->physaddr | UHCI_PTR_Q;
    554  1.1  augustss 	sc->sc_bulk_end = sqh;
    555  1.1  augustss }
    556  1.1  augustss 
    557  1.1  augustss /* Remove bulk QH, called at splusb(). */
    558  1.1  augustss void
    559  1.1  augustss uhci_remove_bulk(sc, sqh)
    560  1.1  augustss 	uhci_softc_t *sc;
    561  1.1  augustss 	uhci_soft_qh_t *sqh;
    562  1.1  augustss {
    563  1.1  augustss 	uhci_soft_qh_t *pqh;
    564  1.1  augustss 
    565  1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
    566  1.1  augustss 	for (pqh = sc->sc_bulk_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink)
    567  1.1  augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
    568  1.1  augustss 		if (pqh->qh->qh_hlink & UHCI_PTR_T) {
    569  1.1  augustss 			printf("uhci_remove_bulk: QH not found\n");
    570  1.1  augustss 			return;
    571  1.1  augustss 		}
    572  1.1  augustss #else
    573  1.1  augustss 		;
    574  1.1  augustss #endif
    575  1.1  augustss 	pqh->qh->hlink    = sqh->qh->hlink;
    576  1.1  augustss 	pqh->qh->qh_hlink = sqh->qh->qh_hlink;
    577  1.1  augustss 	if (sc->sc_bulk_end == sqh)
    578  1.1  augustss 		sc->sc_bulk_end = pqh;
    579  1.1  augustss }
    580  1.1  augustss 
    581  1.1  augustss int
    582  1.1  augustss uhci_intr(p)
    583  1.1  augustss 	void *p;
    584  1.1  augustss {
    585  1.1  augustss 	uhci_softc_t *sc = p;
    586  1.1  augustss 	int status, ret;
    587  1.1  augustss 	uhci_intr_info_t *ii;
    588  1.1  augustss 
    589  1.1  augustss 	sc->sc_intrs++;
    590  1.1  augustss #if defined(USB_DEBUG)
    591  1.1  augustss 	if (uhcidebug > 9) {
    592  1.1  augustss 		DPRINTF(("uhci_intr %s, %p\n", sc->sc_bus.bdev.dv_xname, sc));
    593  1.1  augustss 		uhci_dumpregs(sc);
    594  1.1  augustss 	}
    595  1.1  augustss #endif
    596  1.1  augustss 	status = UREAD2(sc, UHCI_STS);
    597  1.1  augustss 	ret = 0;
    598  1.1  augustss 	if (status & UHCI_STS_USBINT) {
    599  1.1  augustss 		UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */
    600  1.1  augustss 		ret = 1;
    601  1.1  augustss 	}
    602  1.1  augustss 	if (status & UHCI_STS_USBEI) {
    603  1.1  augustss 		UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */
    604  1.1  augustss 		ret = 1;
    605  1.1  augustss 	}
    606  1.1  augustss 	if (status & UHCI_STS_RD) {
    607  1.1  augustss 		UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */
    608  1.1  augustss 		printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname);
    609  1.1  augustss 		ret = 1;
    610  1.1  augustss 	}
    611  1.1  augustss 	if (status & UHCI_STS_HSE) {
    612  1.1  augustss 		UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */
    613  1.1  augustss 		printf("%s: Host System Error\n", sc->sc_bus.bdev.dv_xname);
    614  1.1  augustss 		ret = 1;
    615  1.1  augustss 	}
    616  1.1  augustss 	if (status & UHCI_STS_HCPE) {
    617  1.1  augustss 		UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */
    618  1.1  augustss 		printf("%s: Host System Error\n", sc->sc_bus.bdev.dv_xname);
    619  1.1  augustss 		ret = 1;
    620  1.1  augustss 	}
    621  1.1  augustss 	if (status & UHCI_STS_HCH) {
    622  1.1  augustss 		printf("%s: controller halted\n", sc->sc_bus.bdev.dv_xname);
    623  1.1  augustss 	}
    624  1.1  augustss 	if (!ret)
    625  1.1  augustss 		return 0;
    626  1.1  augustss 
    627  1.1  augustss 	/*
    628  1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
    629  1.1  augustss 	 * interrupts because a transfer is completed there is no
    630  1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
    631  1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
    632  1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
    633  1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
    634  1.1  augustss 	 * output on a slow console).
    635  1.1  augustss 	 * We scan all interrupt descriptors to see if any have
    636  1.1  augustss 	 * completed.
    637  1.1  augustss 	 */
    638  1.1  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
    639  1.1  augustss 		uhci_check_intr(sc, ii);
    640  1.1  augustss 
    641  1.1  augustss 	DPRINTFN(10, ("uhci_intr: exit\n"));
    642  1.1  augustss 	return 1;
    643  1.1  augustss }
    644  1.1  augustss 
    645  1.1  augustss /* Check for an interrupt. */
    646  1.1  augustss void
    647  1.1  augustss uhci_check_intr(sc, ii)
    648  1.1  augustss 	uhci_softc_t *sc;
    649  1.1  augustss 	uhci_intr_info_t *ii;
    650  1.1  augustss {
    651  1.1  augustss 	struct uhci_pipe *upipe;
    652  1.1  augustss 	uhci_soft_td_t *std, *lstd;
    653  1.1  augustss 
    654  1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
    655  1.1  augustss #ifdef DIAGNOSTIC
    656  1.1  augustss 	if (!ii) {
    657  1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
    658  1.1  augustss 		return;
    659  1.1  augustss 	}
    660  1.1  augustss #endif
    661  1.1  augustss 	if (!ii->stdstart)
    662  1.1  augustss 		return;
    663  1.1  augustss 	lstd = ii->stdend;
    664  1.1  augustss #ifdef DIAGNOSTIC
    665  1.1  augustss 	if (!lstd) {
    666  1.1  augustss 		printf("uhci_check_intr: std==0\n");
    667  1.1  augustss 		return;
    668  1.1  augustss 	}
    669  1.1  augustss #endif
    670  1.1  augustss 	/* If the last TD is still active the whole transfer probably is. */
    671  1.1  augustss 	if (lstd->td->td_status & UHCI_TD_ACTIVE) {
    672  1.1  augustss 		DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii));
    673  1.1  augustss 		for (std = ii->stdstart; std != lstd; std = std->td->link.std)
    674  1.1  augustss 			if (std->td->td_status & UHCI_TD_STALLED)
    675  1.1  augustss 				goto done;
    676  1.1  augustss 		DPRINTFN(15, ("uhci_check_intr: ii=%p still active\n", ii));
    677  1.1  augustss 		return;
    678  1.1  augustss 	}
    679  1.1  augustss  done:
    680  1.1  augustss 	upipe = (struct uhci_pipe *)ii->reqh->pipe;
    681  1.1  augustss 	upipe->pipe.endpoint->toggle = upipe->newtoggle;
    682  1.1  augustss 	uhci_ii_done(ii, 0);
    683  1.1  augustss 	untimeout(uhci_timeout, ii);
    684  1.1  augustss }
    685  1.1  augustss 
    686  1.1  augustss void
    687  1.1  augustss uhci_ii_done(ii, timo)
    688  1.1  augustss 	uhci_intr_info_t *ii;
    689  1.1  augustss 	int timo;
    690  1.1  augustss {
    691  1.1  augustss 	usbd_request_handle reqh = ii->reqh;
    692  1.1  augustss 	uhci_soft_td_t *std;
    693  1.1  augustss 	u_int32_t tst;
    694  1.1  augustss 	int len, status;
    695  1.1  augustss 
    696  1.7  augustss 	DPRINTFN(10, ("uhci_ii_done: ii=%p ready %d\n", ii, timo));
    697  1.7  augustss 
    698  1.7  augustss #ifdef DIAGNOSTIC
    699  1.7  augustss 	{
    700  1.7  augustss 		int s = splhigh();
    701  1.7  augustss 		if (ii->isdone) {
    702  1.7  augustss 			printf("uhci_ii_done: is done!\n");
    703  1.7  augustss 			splx(s);
    704  1.7  augustss 			return;
    705  1.7  augustss 		}
    706  1.7  augustss 		ii->isdone = 1;
    707  1.7  augustss 		splx(s);
    708  1.7  augustss 	}
    709  1.7  augustss #endif
    710  1.1  augustss 
    711  1.1  augustss 	/* The transfer is done, compute length and status. */
    712  1.1  augustss 	for (len = status = 0, std = ii->stdstart;
    713  1.1  augustss 	     std != 0;
    714  1.1  augustss 	     std = std->td->link.std) {
    715  1.7  augustss 		tst = std->td->td_status;
    716  1.1  augustss 		status |= tst;
    717  1.1  augustss #ifdef USB_DEBUG
    718  1.1  augustss 		if ((tst & UHCI_TD_ERROR) && uhcidebug) {
    719  1.1  augustss 			printf("uhci_intr: intr error TD:\n");
    720  1.1  augustss 			uhci_dump_td(std);
    721  1.1  augustss 		}
    722  1.1  augustss #endif
    723  1.1  augustss 		if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP)
    724  1.1  augustss 			len += UHCI_TD_GET_ACTLEN(tst);
    725  1.1  augustss 	}
    726  1.1  augustss 	status &= UHCI_TD_ERROR;
    727  1.1  augustss 	DPRINTFN(10, ("uhci_check_intr: len=%d, status=0x%x\n", len, status));
    728  1.1  augustss 	if (status != 0) {
    729  1.1  augustss 		DPRINTFN(-1+(status==UHCI_TD_STALLED),
    730  1.1  augustss 			 ("uhci_intr: error, status 0x%b\n", (long)status,
    731  1.1  augustss 			  "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27STALLED\30ACTIVE"));
    732  1.1  augustss 		if (status == UHCI_TD_STALLED)
    733  1.1  augustss 			reqh->status = USBD_STALLED;
    734  1.1  augustss 		else
    735  1.1  augustss 			reqh->status = USBD_IOERROR; /* more info XXX */
    736  1.1  augustss 		reqh->actlen = 0;
    737  1.1  augustss 	} else {
    738  1.1  augustss 		reqh->status = USBD_NORMAL_COMPLETION;
    739  1.1  augustss 		reqh->actlen = len;
    740  1.1  augustss 	}
    741  1.1  augustss 	if (timo) {
    742  1.1  augustss 		/* We got a timeout.  Make sure transaction is not active. */
    743  1.1  augustss 		reqh->status = USBD_TIMEOUT;
    744  1.1  augustss 		for (std = ii->stdstart; std != 0; std = std->td->link.std)
    745  1.1  augustss 			std->td->td_status &= ~UHCI_TD_ACTIVE;
    746  1.1  augustss 		/* XXX should we wait 1 ms */
    747  1.1  augustss 	}
    748  1.1  augustss 	DPRINTFN(5, ("uhci_intr: calling handler ii=%p\n", ii));
    749  1.1  augustss 
    750  1.1  augustss 	switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
    751  1.1  augustss 	case UE_CONTROL:
    752  1.1  augustss 		uhci_ctrl_done(ii);
    753  1.1  augustss 		break;
    754  1.1  augustss 	case UE_ISOCHRONOUS:
    755  1.1  augustss 		printf("uhci_ii_done: ISO??\n");
    756  1.7  augustss 		break;
    757  1.1  augustss 	case UE_BULK:
    758  1.1  augustss 		uhci_bulk_done(ii);
    759  1.1  augustss 		break;
    760  1.1  augustss 	case UE_INTERRUPT:
    761  1.1  augustss 		uhci_intr_done(ii);
    762  1.1  augustss 		break;
    763  1.1  augustss 	}
    764  1.1  augustss 
    765  1.1  augustss 	/* And finally execute callback. */
    766  1.1  augustss 	reqh->xfercb(reqh);
    767  1.1  augustss }
    768  1.1  augustss 
    769  1.1  augustss void
    770  1.1  augustss uhci_timeout(addr)
    771  1.1  augustss 	void *addr;
    772  1.1  augustss {
    773  1.1  augustss 	uhci_intr_info_t *ii = addr;
    774  1.1  augustss 	int s;
    775  1.1  augustss 
    776  1.1  augustss 	DPRINTF(("uhci_timeout: ii=%p\n", ii));
    777  1.1  augustss 	s = splusb();
    778  1.1  augustss 	uhci_ii_done(ii, 1);
    779  1.1  augustss 	splx(s);
    780  1.1  augustss }
    781  1.1  augustss 
    782  1.1  augustss /*
    783  1.1  augustss  * Wait here until controller claims to have an interrupt.
    784  1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
    785  1.1  augustss  * too long.
    786  1.1  augustss  */
    787  1.1  augustss void
    788  1.1  augustss uhci_waitintr(sc, reqh)
    789  1.1  augustss 	uhci_softc_t *sc;
    790  1.1  augustss 	usbd_request_handle reqh;
    791  1.1  augustss {
    792  1.1  augustss 	int timo = reqh->timeout;
    793  1.1  augustss 	int usecs;
    794  1.1  augustss 
    795  1.1  augustss 	reqh->status = USBD_IN_PROGRESS;
    796  1.1  augustss 	for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
    797  1.1  augustss 		delay(1000);
    798  1.1  augustss 		DPRINTFN(10,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
    799  1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
    800  1.1  augustss 			uhci_intr(sc);
    801  1.1  augustss 			if (reqh->status != USBD_IN_PROGRESS)
    802  1.1  augustss 				return;
    803  1.1  augustss 		}
    804  1.1  augustss 	}
    805  1.1  augustss 	reqh->status = USBD_TIMEOUT;
    806  1.1  augustss 	reqh->xfercb(reqh);
    807  1.1  augustss }
    808  1.1  augustss 
    809  1.1  augustss #if 0
    810  1.1  augustss void
    811  1.1  augustss uhci_reset(p)
    812  1.1  augustss 	void *p;
    813  1.1  augustss {
    814  1.1  augustss 	uhci_softc_t *sc = p;
    815  1.1  augustss 	int n;
    816  1.1  augustss 
    817  1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
    818  1.1  augustss 	/* The reset bit goes low when the controller is done. */
    819  1.1  augustss 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
    820  1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
    821  1.1  augustss 		delay(100);
    822  1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
    823  1.1  augustss 		printf("%s: controller did not reset\n", sc->sc_bus.bdev.dv_xname);
    824  1.1  augustss }
    825  1.1  augustss #endif
    826  1.1  augustss 
    827  1.1  augustss void
    828  1.1  augustss uhci_run(sc, run)
    829  1.1  augustss 	uhci_softc_t *sc;
    830  1.1  augustss 	int run;
    831  1.1  augustss {
    832  1.1  augustss 	int s, n, running;
    833  1.1  augustss 
    834  1.1  augustss 	run = run != 0;
    835  1.1  augustss 	s = splusb();		/* XXX really? */
    836  1.1  augustss 	running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
    837  1.1  augustss 	if (run == running) {
    838  1.1  augustss 		splx(s);
    839  1.1  augustss 		return;
    840  1.1  augustss 	}
    841  1.1  augustss 	UWRITE2(sc, UHCI_CMD, run ? UHCI_CMD_RS : 0);
    842  1.1  augustss 	for(n = 0; n < 100; n++) {
    843  1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
    844  1.1  augustss 		/* return when we've entered the state we want */
    845  1.1  augustss 		if (run == running) {
    846  1.1  augustss 			splx(s);
    847  1.1  augustss 			return;
    848  1.1  augustss 		}
    849  1.1  augustss 	}
    850  1.1  augustss 	splx(s);
    851  1.1  augustss 	printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname, run ? "start" : "stop");
    852  1.1  augustss }
    853  1.1  augustss 
    854  1.1  augustss /*
    855  1.1  augustss  * Memory management routines.
    856  1.1  augustss  *  uhci_alloc_std allocates TDs
    857  1.1  augustss  *  uhci_alloc_sqh allocates QHs
    858  1.7  augustss  * These two routines do their own free list management,
    859  1.1  augustss  * partly for speed, partly because allocating DMAable memory
    860  1.1  augustss  * has page size granularaity so much memory would be wasted if
    861  1.1  augustss  * only one TD/QH (32 bytes) was placed in each alloacted chunk.
    862  1.1  augustss  */
    863  1.1  augustss 
    864  1.1  augustss uhci_soft_td_t *
    865  1.1  augustss uhci_alloc_std(sc)
    866  1.1  augustss 	uhci_softc_t *sc;
    867  1.1  augustss {
    868  1.1  augustss 	uhci_soft_td_t *std;
    869  1.1  augustss 	usbd_status r;
    870  1.1  augustss 	int i;
    871  1.7  augustss 	usb_dma_t dma;
    872  1.1  augustss 
    873  1.1  augustss 	if (!sc->sc_freetds) {
    874  1.1  augustss 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
    875  1.1  augustss 		std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK,
    876  1.1  augustss 			     M_USBDEV, M_NOWAIT);
    877  1.1  augustss 		if (!std)
    878  1.1  augustss 			return 0;
    879  1.7  augustss 		r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK,
    880  1.7  augustss 				 UHCI_TD_ALIGN, &dma);
    881  1.1  augustss 		if (r != USBD_NORMAL_COMPLETION) {
    882  1.1  augustss 			free(std, M_USBDEV);
    883  1.1  augustss 			return 0;
    884  1.1  augustss 		}
    885  1.1  augustss 		for(i = 0; i < UHCI_TD_CHUNK; i++, std++) {
    886  1.1  augustss 			std->physaddr = DMAADDR(&dma) +
    887  1.1  augustss 				i * UHCI_TD_SIZE;
    888  1.1  augustss 			std->td = (uhci_td_t *)
    889  1.1  augustss 				((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE);
    890  1.2  drochner 			std->td->link.std = sc->sc_freetds;
    891  1.1  augustss 			sc->sc_freetds = std;
    892  1.1  augustss 		}
    893  1.1  augustss 	}
    894  1.1  augustss 	std = sc->sc_freetds;
    895  1.1  augustss 	sc->sc_freetds = std->td->link.std;
    896  1.1  augustss 	memset(std->td, 0, UHCI_TD_SIZE);
    897  1.1  augustss 	return std;
    898  1.1  augustss }
    899  1.1  augustss 
    900  1.1  augustss void
    901  1.1  augustss uhci_free_std(sc, std)
    902  1.1  augustss 	uhci_softc_t *sc;
    903  1.1  augustss 	uhci_soft_td_t *std;
    904  1.1  augustss {
    905  1.7  augustss #ifdef DIAGNOSTIC
    906  1.7  augustss #define TD_IS_FREE 0x12345678
    907  1.7  augustss 	if (std->td->td_token == TD_IS_FREE) {
    908  1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
    909  1.7  augustss 		return;
    910  1.7  augustss 	}
    911  1.7  augustss 	std->td->td_token = TD_IS_FREE;
    912  1.7  augustss #endif
    913  1.2  drochner 	std->td->link.std = sc->sc_freetds;
    914  1.1  augustss 	sc->sc_freetds = std;
    915  1.1  augustss }
    916  1.1  augustss 
    917  1.1  augustss uhci_soft_qh_t *
    918  1.1  augustss uhci_alloc_sqh(sc)
    919  1.1  augustss 	uhci_softc_t *sc;
    920  1.1  augustss {
    921  1.1  augustss 	uhci_soft_qh_t *sqh;
    922  1.1  augustss 	usbd_status r;
    923  1.1  augustss 	int i, offs;
    924  1.7  augustss 	usb_dma_t dma;
    925  1.1  augustss 
    926  1.1  augustss 	if (!sc->sc_freeqhs) {
    927  1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
    928  1.1  augustss 		sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK,
    929  1.1  augustss 			     M_USBDEV, M_NOWAIT);
    930  1.1  augustss 		if (!sqh)
    931  1.1  augustss 			return 0;
    932  1.7  augustss 		r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK,
    933  1.7  augustss 				 UHCI_QH_ALIGN, &dma);
    934  1.1  augustss 		if (r != USBD_NORMAL_COMPLETION) {
    935  1.1  augustss 			free(sqh, M_USBDEV);
    936  1.1  augustss 			return 0;
    937  1.1  augustss 		}
    938  1.1  augustss 		for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) {
    939  1.1  augustss 			offs = i * UHCI_QH_SIZE;
    940  1.1  augustss 			sqh->physaddr = DMAADDR(&dma) + offs;
    941  1.1  augustss 			sqh->qh = (uhci_qh_t *)
    942  1.1  augustss 					((char *)KERNADDR(&dma) + offs);
    943  1.1  augustss 			sqh->qh->hlink = sc->sc_freeqhs;
    944  1.1  augustss 			sc->sc_freeqhs = sqh;
    945  1.1  augustss 		}
    946  1.1  augustss 	}
    947  1.1  augustss 	sqh = sc->sc_freeqhs;
    948  1.1  augustss 	sc->sc_freeqhs = sqh->qh->hlink;
    949  1.1  augustss 	memset(sqh->qh, 0, UHCI_QH_SIZE);
    950  1.1  augustss 	return sqh;
    951  1.1  augustss }
    952  1.1  augustss 
    953  1.1  augustss void
    954  1.1  augustss uhci_free_sqh(sc, sqh)
    955  1.1  augustss 	uhci_softc_t *sc;
    956  1.1  augustss 	uhci_soft_qh_t *sqh;
    957  1.1  augustss {
    958  1.1  augustss 	sqh->qh->hlink = sc->sc_freeqhs;
    959  1.1  augustss 	sc->sc_freeqhs = sqh;
    960  1.1  augustss }
    961  1.1  augustss 
    962  1.1  augustss /*
    963  1.1  augustss  * Enter a list of transfers onto a control queue.
    964  1.1  augustss  * Called at splusb()
    965  1.1  augustss  */
    966  1.1  augustss void
    967  1.1  augustss uhci_enter_ctl_q(sc, sqh, ii)
    968  1.1  augustss 	uhci_softc_t *sc;
    969  1.1  augustss 	uhci_soft_qh_t *sqh;
    970  1.1  augustss 	uhci_intr_info_t *ii;
    971  1.1  augustss {
    972  1.1  augustss 	DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh));
    973  1.1  augustss 
    974  1.1  augustss }
    975  1.1  augustss 
    976  1.1  augustss void
    977  1.1  augustss uhci_free_std_chain(sc, std, stdend)
    978  1.1  augustss 	uhci_softc_t *sc;
    979  1.1  augustss 	uhci_soft_td_t *std;
    980  1.1  augustss 	uhci_soft_td_t *stdend;
    981  1.1  augustss {
    982  1.1  augustss 	uhci_soft_td_t *p;
    983  1.1  augustss 
    984  1.1  augustss 	for (; std != stdend; std = p) {
    985  1.1  augustss 		p = std->td->link.std;
    986  1.1  augustss 		uhci_free_std(sc, std);
    987  1.1  augustss 	}
    988  1.1  augustss }
    989  1.1  augustss 
    990  1.1  augustss usbd_status
    991  1.1  augustss uhci_alloc_std_chain(upipe, sc, len, rd, dma, sp, ep)
    992  1.1  augustss 	struct uhci_pipe *upipe;
    993  1.1  augustss 	uhci_softc_t *sc;
    994  1.1  augustss 	int len, rd;
    995  1.7  augustss 	usb_dma_t *dma;
    996  1.1  augustss 	uhci_soft_td_t **sp, **ep;
    997  1.1  augustss {
    998  1.1  augustss 	uhci_soft_td_t *p, *lastp;
    999  1.1  augustss 	uhci_physaddr_t lastlink;
   1000  1.1  augustss 	u_int32_t ls;
   1001  1.1  augustss 	int i, ntd, l, tog, maxp;
   1002  1.1  augustss 	int addr = upipe->pipe.device->address;
   1003  1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1004  1.1  augustss 
   1005  1.1  augustss 	DPRINTFN(15, ("uhci_alloc_std_chain: len=%d\n", len));
   1006  1.1  augustss 	if (len == 0) {
   1007  1.1  augustss 		*sp = *ep = 0;
   1008  1.1  augustss printf("uhci_alloc_std_chain: len=0\n");
   1009  1.1  augustss 		return (USBD_NORMAL_COMPLETION);
   1010  1.1  augustss 	}
   1011  1.1  augustss 	ls = upipe->pipe.device->lowspeed ? UHCI_TD_LS : 0;
   1012  1.4  augustss 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1013  1.1  augustss 	if (maxp == 0) {
   1014  1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1015  1.1  augustss 		return (USBD_INVAL);
   1016  1.1  augustss 	}
   1017  1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1018  1.1  augustss 	tog = upipe->pipe.endpoint->toggle;
   1019  1.1  augustss 	if (ntd % 2 == 0)
   1020  1.1  augustss 		tog ^= 1;
   1021  1.4  augustss 	upipe->newtoggle = tog ^ 1;
   1022  1.1  augustss 	lastp = 0;
   1023  1.1  augustss 	lastlink = UHCI_PTR_T;
   1024  1.1  augustss 	ntd--;
   1025  1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1026  1.1  augustss 		p = uhci_alloc_std(sc);
   1027  1.1  augustss 		if (!p) {
   1028  1.1  augustss 			uhci_free_std_chain(sc, lastp, 0);
   1029  1.1  augustss 			return (USBD_NOMEM);
   1030  1.1  augustss 		}
   1031  1.2  drochner 		p->td->link.std = lastp;
   1032  1.1  augustss 		p->td->td_link = lastlink;
   1033  1.1  augustss 		lastp = p;
   1034  1.1  augustss 		lastlink = p->physaddr;
   1035  1.1  augustss 		p->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
   1036  1.1  augustss 		if (i == ntd) {
   1037  1.1  augustss 			/* last TD */
   1038  1.1  augustss 			l = len % maxp;
   1039  1.1  augustss 			if (l == 0) l = maxp;
   1040  1.1  augustss 			*ep = p;
   1041  1.1  augustss 		} else
   1042  1.1  augustss 			l = maxp;
   1043  1.1  augustss 		p->td->td_token =
   1044  1.1  augustss 		    rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1045  1.1  augustss 			 UHCI_TD_OUT(l, endpt, addr, tog);
   1046  1.1  augustss 		p->td->td_buffer = DMAADDR(dma) + i * maxp;
   1047  1.1  augustss 		tog ^= 1;
   1048  1.1  augustss 	}
   1049  1.1  augustss 	*sp = lastp;
   1050  1.1  augustss 	/*upipe->pipe.endpoint->toggle = tog;*/
   1051  1.4  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d newtog=%d\n",
   1052  1.4  augustss 		      upipe->pipe.endpoint->toggle, upipe->newtoggle));
   1053  1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1054  1.1  augustss }
   1055  1.1  augustss 
   1056  1.1  augustss usbd_status
   1057  1.1  augustss uhci_device_bulk_transfer(reqh)
   1058  1.1  augustss 	usbd_request_handle reqh;
   1059  1.1  augustss {
   1060  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
   1061  1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   1062  1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   1063  1.1  augustss 	uhci_intr_info_t *ii = upipe->iinfo;
   1064  1.1  augustss 	uhci_soft_td_t *xfer, *xferend;
   1065  1.1  augustss 	uhci_soft_qh_t *sqh;
   1066  1.7  augustss 	usb_dma_t *dmap;
   1067  1.1  augustss 	usbd_status r;
   1068  1.1  augustss 	int len, isread;
   1069  1.1  augustss 	int s;
   1070  1.1  augustss 
   1071  1.1  augustss 	DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d flags=%d\n",
   1072  1.1  augustss 		     reqh, reqh->buffer, reqh->length, reqh->flags));
   1073  1.1  augustss 
   1074  1.1  augustss 	if (reqh->isreq)
   1075  1.1  augustss 		panic("uhci_device_bulk_transfer: a request\n");
   1076  1.1  augustss 
   1077  1.1  augustss 	len = reqh->length;
   1078  1.1  augustss 	dmap = &upipe->u.bulk.datadma;
   1079  1.1  augustss 	isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
   1080  1.1  augustss 	sqh = upipe->u.bulk.sqh;
   1081  1.1  augustss 
   1082  1.1  augustss 	upipe->u.bulk.isread = isread;
   1083  1.1  augustss 	upipe->u.bulk.length = len;
   1084  1.1  augustss 
   1085  1.7  augustss 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1086  1.1  augustss 	if (r != USBD_NORMAL_COMPLETION)
   1087  1.1  augustss 		goto ret1;
   1088  1.1  augustss 	r = uhci_alloc_std_chain(upipe, sc, len, isread,
   1089  1.1  augustss 				 dmap, &xfer, &xferend);
   1090  1.1  augustss 	if (r != USBD_NORMAL_COMPLETION)
   1091  1.1  augustss 		goto ret2;
   1092  1.1  augustss 	xferend->td->td_status |= UHCI_TD_IOC;
   1093  1.1  augustss 
   1094  1.1  augustss 	if (!isread && len != 0)
   1095  1.1  augustss 		memcpy(KERNADDR(dmap), reqh->buffer, len);
   1096  1.1  augustss 
   1097  1.1  augustss #ifdef USB_DEBUG
   1098  1.1  augustss 	if (uhcidebug > 10) {
   1099  1.1  augustss 		printf("uhci_device_bulk_transfer: xfer(1)\n");
   1100  1.1  augustss 		uhci_dump_tds(xfer);
   1101  1.1  augustss 	}
   1102  1.1  augustss #endif
   1103  1.1  augustss 
   1104  1.1  augustss 	/* Set up interrupt info. */
   1105  1.1  augustss 	ii->reqh = reqh;
   1106  1.1  augustss 	ii->stdstart = xfer;
   1107  1.1  augustss 	ii->stdend = xferend;
   1108  1.7  augustss #ifdef DIAGNOSTIC
   1109  1.7  augustss 	ii->isdone = 0;
   1110  1.7  augustss #endif
   1111  1.1  augustss 
   1112  1.1  augustss 	sqh->qh->elink = xfer;
   1113  1.1  augustss 	sqh->qh->qh_elink = xfer->physaddr;
   1114  1.1  augustss 	sqh->intr_info = ii;
   1115  1.1  augustss 
   1116  1.1  augustss 	s = splusb();
   1117  1.1  augustss 	uhci_add_bulk(sc, sqh);
   1118  1.1  augustss 	LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
   1119  1.1  augustss 
   1120  1.1  augustss 	if (reqh->timeout && !usbd_use_polling)
   1121  1.1  augustss 		timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout));
   1122  1.1  augustss 	splx(s);
   1123  1.1  augustss 
   1124  1.1  augustss #ifdef USB_DEBUG
   1125  1.1  augustss 	if (uhcidebug > 10) {
   1126  1.1  augustss 		printf("uhci_device_bulk_transfer: xfer(2)\n");
   1127  1.1  augustss 		uhci_dump_tds(xfer);
   1128  1.1  augustss 	}
   1129  1.1  augustss #endif
   1130  1.1  augustss 
   1131  1.1  augustss 	return (USBD_IN_PROGRESS);
   1132  1.1  augustss 
   1133  1.1  augustss  ret2:
   1134  1.1  augustss 	if (len != 0)
   1135  1.7  augustss 		usb_freemem(sc->sc_dmatag, dmap);
   1136  1.1  augustss  ret1:
   1137  1.1  augustss 	return (r);
   1138  1.1  augustss }
   1139  1.1  augustss 
   1140  1.1  augustss /* Abort a device bulk request. */
   1141  1.1  augustss void
   1142  1.1  augustss uhci_device_bulk_abort(reqh)
   1143  1.1  augustss 	usbd_request_handle reqh;
   1144  1.1  augustss {
   1145  1.6  augustss 	/* XXX inactivate */
   1146  1.6  augustss 	usbd_delay_ms(1);	/* make sure it is finished */
   1147  1.6  augustss 	/* XXX call done */
   1148  1.1  augustss }
   1149  1.1  augustss 
   1150  1.1  augustss /* Close a device bulk pipe. */
   1151  1.1  augustss void
   1152  1.1  augustss uhci_device_bulk_close(pipe)
   1153  1.1  augustss 	usbd_pipe_handle pipe;
   1154  1.1  augustss {
   1155  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1156  1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   1157  1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   1158  1.1  augustss 
   1159  1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   1160  1.1  augustss 	uhci_free_intr_info(upipe->iinfo);
   1161  1.1  augustss 	/* XXX free other resources */
   1162  1.1  augustss }
   1163  1.1  augustss 
   1164  1.1  augustss usbd_status
   1165  1.1  augustss uhci_device_ctrl_transfer(reqh)
   1166  1.1  augustss 	usbd_request_handle reqh;
   1167  1.1  augustss {
   1168  1.1  augustss 	usbd_status r;
   1169  1.1  augustss 
   1170  1.1  augustss 	if (!reqh->isreq)
   1171  1.1  augustss 		panic("uhci_device_ctrl_transfer: not a request\n");
   1172  1.1  augustss 
   1173  1.1  augustss 	r = uhci_device_request(reqh);
   1174  1.1  augustss 	if (r != USBD_NORMAL_COMPLETION)
   1175  1.1  augustss 		return (r);
   1176  1.1  augustss 
   1177  1.1  augustss 	if (usbd_use_polling)
   1178  1.1  augustss 		uhci_waitintr((uhci_softc_t *)reqh->pipe->device->bus, reqh);
   1179  1.1  augustss 	return (USBD_IN_PROGRESS);
   1180  1.1  augustss }
   1181  1.1  augustss 
   1182  1.1  augustss usbd_status
   1183  1.1  augustss uhci_device_intr_transfer(reqh)
   1184  1.1  augustss 	usbd_request_handle reqh;
   1185  1.1  augustss {
   1186  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
   1187  1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   1188  1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   1189  1.1  augustss 	uhci_intr_info_t *ii = upipe->iinfo;
   1190  1.1  augustss 	uhci_soft_td_t *xfer, *xferend;
   1191  1.1  augustss 	uhci_soft_qh_t *sqh;
   1192  1.7  augustss 	usb_dma_t *dmap;
   1193  1.1  augustss 	usbd_status r;
   1194  1.1  augustss 	int len, i;
   1195  1.1  augustss 	int s;
   1196  1.1  augustss 
   1197  1.1  augustss 	DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d flags=%d\n",
   1198  1.1  augustss 		     reqh, reqh->buffer, reqh->length, reqh->flags));
   1199  1.1  augustss 
   1200  1.1  augustss 	if (reqh->isreq)
   1201  1.1  augustss 		panic("uhci_device_intr_transfer: a request\n");
   1202  1.1  augustss 
   1203  1.1  augustss 	len = reqh->length;
   1204  1.1  augustss 	dmap = &upipe->u.intr.datadma;
   1205  1.1  augustss 	if (len == 0)
   1206  1.1  augustss 		return (USBD_INVAL); /* XXX should it be? */
   1207  1.1  augustss 
   1208  1.7  augustss 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1209  1.1  augustss 	if (r != USBD_NORMAL_COMPLETION)
   1210  1.1  augustss 		goto ret1;
   1211  1.1  augustss 	r = uhci_alloc_std_chain(upipe, sc, len, 1, dmap, &xfer, &xferend);
   1212  1.1  augustss 	if (r != USBD_NORMAL_COMPLETION)
   1213  1.1  augustss 		goto ret2;
   1214  1.1  augustss 	xferend->td->td_status |= UHCI_TD_IOC;
   1215  1.1  augustss 
   1216  1.1  augustss #ifdef USB_DEBUG
   1217  1.1  augustss 	if (uhcidebug > 10) {
   1218  1.1  augustss 		printf("uhci_device_intr_transfer: xfer(1)\n");
   1219  1.1  augustss 		uhci_dump_tds(xfer);
   1220  1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   1221  1.1  augustss 	}
   1222  1.1  augustss #endif
   1223  1.1  augustss 
   1224  1.1  augustss 	s = splusb();
   1225  1.1  augustss 	/* Set up interrupt info. */
   1226  1.1  augustss 	ii->reqh = reqh;
   1227  1.1  augustss 	ii->stdstart = xfer;
   1228  1.1  augustss 	ii->stdend = xferend;
   1229  1.7  augustss #ifdef DIAGNOSTIC
   1230  1.7  augustss 	ii->isdone = 0;
   1231  1.7  augustss #endif
   1232  1.1  augustss 
   1233  1.1  augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", upipe->u.intr.qhs[0]));
   1234  1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   1235  1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   1236  1.1  augustss 		sqh->qh->elink = xfer;
   1237  1.1  augustss 		sqh->qh->qh_elink = xfer->physaddr;
   1238  1.1  augustss 	}
   1239  1.1  augustss 	splx(s);
   1240  1.1  augustss 
   1241  1.1  augustss #ifdef USB_DEBUG
   1242  1.1  augustss 	if (uhcidebug > 10) {
   1243  1.1  augustss 		printf("uhci_device_intr_transfer: xfer(2)\n");
   1244  1.1  augustss 		uhci_dump_tds(xfer);
   1245  1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   1246  1.1  augustss 	}
   1247  1.1  augustss #endif
   1248  1.1  augustss 
   1249  1.1  augustss 	return (USBD_IN_PROGRESS);
   1250  1.1  augustss 
   1251  1.1  augustss  ret2:
   1252  1.1  augustss 	if (len != 0)
   1253  1.7  augustss 		usb_freemem(sc->sc_dmatag, dmap);
   1254  1.1  augustss  ret1:
   1255  1.1  augustss 	return (r);
   1256  1.1  augustss }
   1257  1.1  augustss 
   1258  1.1  augustss /* Abort a device control request. */
   1259  1.1  augustss void
   1260  1.1  augustss uhci_device_ctrl_abort(reqh)
   1261  1.1  augustss 	usbd_request_handle reqh;
   1262  1.1  augustss {
   1263  1.6  augustss 	/* XXX inactivate */
   1264  1.6  augustss 	usbd_delay_ms(1);	/* make sure it is finished */
   1265  1.6  augustss 	/* XXX call done */
   1266  1.1  augustss }
   1267  1.1  augustss 
   1268  1.1  augustss /* Close a device control pipe. */
   1269  1.1  augustss void
   1270  1.1  augustss uhci_device_ctrl_close(pipe)
   1271  1.1  augustss 	usbd_pipe_handle pipe;
   1272  1.1  augustss {
   1273  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1274  1.1  augustss 
   1275  1.1  augustss 	uhci_free_intr_info(upipe->iinfo);
   1276  1.1  augustss 	/* XXX free other resources */
   1277  1.1  augustss }
   1278  1.1  augustss 
   1279  1.1  augustss /* Abort a device interrupt request. */
   1280  1.1  augustss void
   1281  1.1  augustss uhci_device_intr_abort(reqh)
   1282  1.1  augustss 	usbd_request_handle reqh;
   1283  1.1  augustss {
   1284  1.1  augustss 	struct uhci_pipe *upipe;
   1285  1.1  augustss 
   1286  1.7  augustss 	DPRINTFN(1, ("uhci_device_intr_abort: reqh=%p\n", reqh));
   1287  1.6  augustss 	/* XXX inactivate */
   1288  1.1  augustss 	usbd_delay_ms(2);	/* make sure it is finished */
   1289  1.1  augustss 	if (reqh->pipe->intrreqh == reqh) {
   1290  1.1  augustss 		DPRINTF(("uhci_device_intr_abort: remove\n"));
   1291  1.1  augustss 		reqh->pipe->intrreqh = 0;
   1292  1.1  augustss 		upipe = (struct uhci_pipe *)reqh->pipe;
   1293  1.1  augustss 		uhci_intr_done(upipe->u.intr.qhs[0]->intr_info);
   1294  1.1  augustss 	}
   1295  1.1  augustss }
   1296  1.1  augustss 
   1297  1.1  augustss /* Close a device interrupt pipe. */
   1298  1.1  augustss void
   1299  1.1  augustss uhci_device_intr_close(pipe)
   1300  1.1  augustss 	usbd_pipe_handle pipe;
   1301  1.1  augustss {
   1302  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1303  1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   1304  1.1  augustss 	int i, s, npoll;
   1305  1.1  augustss 
   1306  1.1  augustss 	upipe->iinfo->stdstart = 0;		/* inactive */
   1307  1.1  augustss 
   1308  1.1  augustss 	/* Unlink descriptors from controller data structures. */
   1309  1.1  augustss 	npoll = upipe->u.intr.npoll;
   1310  1.1  augustss 	uhci_lock_frames(sc);
   1311  1.1  augustss 	for (i = 0; i < npoll; i++)
   1312  1.1  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos,
   1313  1.1  augustss 				 upipe->u.intr.qhs[i]);
   1314  1.1  augustss 	uhci_unlock_frames(sc);
   1315  1.1  augustss 
   1316  1.1  augustss 	/*
   1317  1.1  augustss 	 * We now have to wait for any activity on the physical
   1318  1.1  augustss 	 * descriptors to stop.
   1319  1.1  augustss 	 */
   1320  1.1  augustss 	usbd_delay_ms(2);
   1321  1.1  augustss 
   1322  1.1  augustss 	for(i = 0; i < npoll; i++)
   1323  1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   1324  1.1  augustss 	free(upipe->u.intr.qhs, M_USB);
   1325  1.1  augustss 
   1326  1.1  augustss 	s = splusb();
   1327  1.1  augustss 	LIST_REMOVE(upipe->iinfo, list);	/* remove from active list */
   1328  1.1  augustss 	splx(s);
   1329  1.1  augustss 	uhci_free_intr_info(upipe->iinfo);
   1330  1.1  augustss 
   1331  1.1  augustss 	/* XXX free other resources */
   1332  1.1  augustss }
   1333  1.1  augustss 
   1334  1.1  augustss usbd_status
   1335  1.1  augustss uhci_device_request(reqh)
   1336  1.1  augustss 	usbd_request_handle reqh;
   1337  1.1  augustss {
   1338  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
   1339  1.1  augustss 	usb_device_request_t *req = &reqh->request;
   1340  1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   1341  1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   1342  1.1  augustss 	int addr = dev->address;
   1343  1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1344  1.1  augustss 	uhci_intr_info_t *ii = upipe->iinfo;
   1345  1.1  augustss 	uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend;
   1346  1.1  augustss 	uhci_soft_qh_t *sqh;
   1347  1.7  augustss 	usb_dma_t *dmap;
   1348  1.1  augustss 	int len;
   1349  1.1  augustss 	u_int32_t ls;
   1350  1.1  augustss 	usbd_status r;
   1351  1.1  augustss 	int isread;
   1352  1.1  augustss 	int s;
   1353  1.1  augustss 
   1354  1.1  augustss 	DPRINTFN(1,("uhci_device_control type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   1355  1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   1356  1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   1357  1.1  augustss 		    addr, endpt));
   1358  1.1  augustss 
   1359  1.1  augustss 	ls = dev->lowspeed ? UHCI_TD_LS : 0;
   1360  1.1  augustss 	isread = req->bmRequestType & UT_READ;
   1361  1.1  augustss 	len = UGETW(req->wLength);
   1362  1.1  augustss 
   1363  1.1  augustss 	setup = upipe->u.ctl.setup;
   1364  1.1  augustss 	stat = upipe->u.ctl.stat;
   1365  1.1  augustss 	sqh = upipe->u.ctl.sqh;
   1366  1.1  augustss 	dmap = &upipe->u.ctl.datadma;
   1367  1.1  augustss 
   1368  1.1  augustss 	/* Set up data transaction */
   1369  1.1  augustss 	if (len != 0) {
   1370  1.7  augustss 		r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   1371  1.1  augustss 		if (r != USBD_NORMAL_COMPLETION)
   1372  1.1  augustss 			goto ret1;
   1373  1.1  augustss 		upipe->pipe.endpoint->toggle = 1;
   1374  1.1  augustss 		r = uhci_alloc_std_chain(upipe, sc, len, isread,
   1375  1.1  augustss 					 dmap, &xfer, &xferend);
   1376  1.1  augustss 		if (r != USBD_NORMAL_COMPLETION)
   1377  1.1  augustss 			goto ret2;
   1378  1.1  augustss 		next = xfer;
   1379  1.2  drochner 		xferend->td->link.std = stat;
   1380  1.1  augustss 		xferend->td->td_link = stat->physaddr;
   1381  1.1  augustss 	} else {
   1382  1.1  augustss 		xfer = 0;
   1383  1.1  augustss 		next = stat;
   1384  1.1  augustss 	}
   1385  1.1  augustss 	upipe->u.ctl.length = len;
   1386  1.1  augustss 	upipe->u.ctl.xferend = xferend;
   1387  1.1  augustss 
   1388  1.1  augustss 	memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
   1389  1.1  augustss 	if (!isread && len != 0)
   1390  1.1  augustss 		memcpy(KERNADDR(dmap), reqh->buffer, len);
   1391  1.1  augustss 
   1392  1.2  drochner 	setup->td->link.std = next;
   1393  1.1  augustss 	setup->td->td_link = next->physaddr;
   1394  1.1  augustss 	setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
   1395  1.1  augustss 	setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr);
   1396  1.1  augustss 	setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma);
   1397  1.1  augustss 
   1398  1.2  drochner 	stat->td->link.std = 0;
   1399  1.1  augustss 	stat->td->td_link = UHCI_PTR_T;
   1400  1.1  augustss 	stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls |
   1401  1.1  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC;
   1402  1.1  augustss 	stat->td->td_token =
   1403  1.1  augustss 		isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   1404  1.1  augustss 		         UHCI_TD_IN (0, endpt, addr, 1);
   1405  1.1  augustss 	stat->td->td_buffer = 0;
   1406  1.1  augustss 
   1407  1.1  augustss #ifdef USB_DEBUG
   1408  1.1  augustss 	if (uhcidebug > 20) {
   1409  1.1  augustss 		printf("uhci_device_request: setup\n");
   1410  1.1  augustss 		uhci_dump_td(setup);
   1411  1.1  augustss 		printf("uhci_device_request: stat\n");
   1412  1.1  augustss 		uhci_dump_td(stat);
   1413  1.1  augustss 	}
   1414  1.1  augustss #endif
   1415  1.1  augustss 
   1416  1.1  augustss 	/* Set up interrupt info. */
   1417  1.1  augustss 	ii->reqh = reqh;
   1418  1.1  augustss 	ii->stdstart = setup;
   1419  1.1  augustss 	ii->stdend = stat;
   1420  1.7  augustss #ifdef DIAGNOSTIC
   1421  1.7  augustss 	ii->isdone = 0;
   1422  1.7  augustss #endif
   1423  1.1  augustss 
   1424  1.1  augustss 	sqh->qh->elink = setup;
   1425  1.1  augustss 	sqh->qh->qh_elink = setup->physaddr;
   1426  1.1  augustss 	sqh->intr_info = ii;
   1427  1.1  augustss 
   1428  1.1  augustss 	s = splusb();
   1429  1.1  augustss 	uhci_add_ctrl(sc, sqh);
   1430  1.1  augustss 	LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
   1431  1.1  augustss #ifdef USB_DEBUG
   1432  1.1  augustss 	if (uhcidebug > 12) {
   1433  1.1  augustss 		uhci_soft_td_t *std;
   1434  1.1  augustss 		uhci_soft_qh_t *xqh;
   1435  1.1  augustss 		uhci_physaddr_t link;
   1436  1.1  augustss 		printf("uhci_enter_ctl_q: follow from [0]\n");
   1437  1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   1438  1.1  augustss 		     (link & UHCI_PTR_Q) == 0;
   1439  1.1  augustss 		     std = std->td->link.std) {
   1440  1.1  augustss 			link = std->td->td_link;
   1441  1.1  augustss 			uhci_dump_td(std);
   1442  1.1  augustss 		}
   1443  1.1  augustss 		for (xqh = (uhci_soft_qh_t *)std;
   1444  1.1  augustss 		     xqh;
   1445  1.1  augustss 		     xqh = xqh->qh->hlink)
   1446  1.1  augustss 			uhci_dump_qh(xqh);
   1447  1.1  augustss 		printf("Enqueued QH:\n");
   1448  1.1  augustss 		uhci_dump_qh(sqh);
   1449  1.1  augustss 		uhci_dump_tds(sqh->qh->elink);
   1450  1.1  augustss 	}
   1451  1.1  augustss #endif
   1452  1.1  augustss 	if (reqh->timeout && !usbd_use_polling)
   1453  1.1  augustss 		timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout));
   1454  1.1  augustss 	splx(s);
   1455  1.1  augustss 
   1456  1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1457  1.1  augustss 
   1458  1.1  augustss  ret2:
   1459  1.1  augustss 	if (len != 0)
   1460  1.7  augustss 		usb_freemem(sc->sc_dmatag, dmap);
   1461  1.1  augustss  ret1:
   1462  1.1  augustss 	return (r);
   1463  1.1  augustss }
   1464  1.1  augustss 
   1465  1.1  augustss void
   1466  1.1  augustss uhci_intr_done(ii)
   1467  1.1  augustss 	uhci_intr_info_t *ii;
   1468  1.1  augustss {
   1469  1.1  augustss 	uhci_softc_t *sc = ii->sc;
   1470  1.1  augustss 	usbd_request_handle reqh = ii->reqh;
   1471  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
   1472  1.7  augustss 	usb_dma_t *dma;
   1473  1.1  augustss 	uhci_soft_qh_t *sqh;
   1474  1.1  augustss 	int i, npoll;
   1475  1.1  augustss 
   1476  1.1  augustss 	DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen));
   1477  1.1  augustss 
   1478  1.1  augustss 	dma = &upipe->u.intr.datadma;
   1479  1.1  augustss 	memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
   1480  1.1  augustss 	npoll = upipe->u.intr.npoll;
   1481  1.1  augustss 	for(i = 0; i < npoll; i++) {
   1482  1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   1483  1.1  augustss 		sqh->qh->elink = 0;
   1484  1.1  augustss 		sqh->qh->qh_elink = UHCI_PTR_T;
   1485  1.1  augustss 	}
   1486  1.1  augustss 	uhci_free_std_chain(sc, ii->stdstart, 0);
   1487  1.1  augustss 
   1488  1.1  augustss 	/* XXX Wasteful. */
   1489  1.1  augustss 	if (reqh->pipe->intrreqh == reqh) {
   1490  1.1  augustss 		uhci_soft_td_t *xfer, *xferend;
   1491  1.1  augustss 
   1492  1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   1493  1.1  augustss 		uhci_alloc_std_chain(upipe, sc, reqh->length, 1, dma,
   1494  1.1  augustss 				     &xfer, &xferend);
   1495  1.1  augustss 		xferend->td->td_status |= UHCI_TD_IOC;
   1496  1.1  augustss 
   1497  1.1  augustss #ifdef USB_DEBUG
   1498  1.1  augustss 		if (uhcidebug > 10) {
   1499  1.1  augustss 			printf("uhci_device_intr_done: xfer(1)\n");
   1500  1.1  augustss 			uhci_dump_tds(xfer);
   1501  1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   1502  1.1  augustss 		}
   1503  1.1  augustss #endif
   1504  1.1  augustss 
   1505  1.1  augustss 		ii->stdstart = xfer;
   1506  1.1  augustss 		ii->stdend = xferend;
   1507  1.7  augustss #ifdef DIAGNOSTIC
   1508  1.7  augustss 		ii->isdone = 0;
   1509  1.7  augustss #endif
   1510  1.1  augustss 		for (i = 0; i < npoll; i++) {
   1511  1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   1512  1.1  augustss 			sqh->qh->elink = xfer;
   1513  1.1  augustss 			sqh->qh->qh_elink = xfer->physaddr;
   1514  1.1  augustss 		}
   1515  1.1  augustss 	} else {
   1516  1.7  augustss 		usb_freemem(sc->sc_dmatag, dma);
   1517  1.1  augustss 		ii->stdstart = 0;	/* mark as inactive */
   1518  1.1  augustss 	}
   1519  1.1  augustss }
   1520  1.1  augustss 
   1521  1.1  augustss /* Deallocate request data structures */
   1522  1.1  augustss void
   1523  1.1  augustss uhci_ctrl_done(ii)
   1524  1.1  augustss 	uhci_intr_info_t *ii;
   1525  1.1  augustss {
   1526  1.1  augustss 	uhci_softc_t *sc = ii->sc;
   1527  1.1  augustss 	usbd_request_handle reqh = ii->reqh;
   1528  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
   1529  1.1  augustss 	u_int len = upipe->u.ctl.length;
   1530  1.7  augustss 	usb_dma_t *dma;
   1531  1.1  augustss 	uhci_td_t *htd = ii->stdstart->td;
   1532  1.1  augustss 
   1533  1.7  augustss #ifdef DIAGNOSTIC
   1534  1.1  augustss 	if (!reqh->isreq)
   1535  1.1  augustss 		panic("uhci_ctrl_done: not a request\n");
   1536  1.7  augustss #endif
   1537  1.1  augustss 
   1538  1.1  augustss 	LIST_REMOVE(ii, list);	/* remove from active list */
   1539  1.1  augustss 
   1540  1.1  augustss 	uhci_remove_ctrl(sc, upipe->u.ctl.sqh);
   1541  1.1  augustss 
   1542  1.1  augustss 	if (len != 0) {
   1543  1.1  augustss 		dma = &upipe->u.ctl.datadma;
   1544  1.1  augustss 		if (reqh->request.bmRequestType & UT_READ)
   1545  1.1  augustss 			memcpy(reqh->buffer, KERNADDR(dma), len);
   1546  1.1  augustss 		uhci_free_std_chain(sc, htd->link.std, ii->stdend);
   1547  1.7  augustss 		usb_freemem(sc->sc_dmatag, dma);
   1548  1.1  augustss 	}
   1549  1.1  augustss 	DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen));
   1550  1.1  augustss }
   1551  1.1  augustss 
   1552  1.1  augustss /* Deallocate request data structures */
   1553  1.1  augustss void
   1554  1.1  augustss uhci_bulk_done(ii)
   1555  1.1  augustss 	uhci_intr_info_t *ii;
   1556  1.1  augustss {
   1557  1.1  augustss 	uhci_softc_t *sc = ii->sc;
   1558  1.1  augustss 	usbd_request_handle reqh = ii->reqh;
   1559  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
   1560  1.1  augustss 	u_int len = upipe->u.bulk.length;
   1561  1.7  augustss 	usb_dma_t *dma;
   1562  1.1  augustss 	uhci_td_t *htd = ii->stdstart->td;
   1563  1.1  augustss 
   1564  1.1  augustss 	LIST_REMOVE(ii, list);	/* remove from active list */
   1565  1.1  augustss 
   1566  1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   1567  1.1  augustss 
   1568  1.1  augustss 	if (len != 0) {
   1569  1.1  augustss 		dma = &upipe->u.bulk.datadma;
   1570  1.1  augustss 		if (upipe->u.bulk.isread && len != 0)
   1571  1.1  augustss 			memcpy(reqh->buffer, KERNADDR(dma), len);
   1572  1.3  augustss 		uhci_free_std_chain(sc, htd->link.std, 0);
   1573  1.7  augustss 		usb_freemem(sc->sc_dmatag, dma);
   1574  1.1  augustss 	}
   1575  1.1  augustss 	DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen));
   1576  1.4  augustss 	/* XXX compute new toggle */
   1577  1.1  augustss }
   1578  1.1  augustss 
   1579  1.1  augustss /* Add interrupt QH, called with vflock. */
   1580  1.1  augustss void
   1581  1.1  augustss uhci_add_intr(sc, n, sqh)
   1582  1.1  augustss 	uhci_softc_t *sc;
   1583  1.1  augustss 	int n;
   1584  1.1  augustss 	uhci_soft_qh_t *sqh;
   1585  1.1  augustss {
   1586  1.1  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[n];
   1587  1.1  augustss 	uhci_qh_t *eqh;
   1588  1.1  augustss 
   1589  1.1  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh));
   1590  1.1  augustss 	eqh = vf->eqh->qh;
   1591  1.1  augustss 	sqh->qh->hlink     = eqh->hlink;
   1592  1.1  augustss 	sqh->qh->qh_hlink  = eqh->qh_hlink;
   1593  1.1  augustss 	eqh->hlink         = sqh;
   1594  1.1  augustss 	eqh->qh_hlink      = sqh->physaddr | UHCI_PTR_Q;
   1595  1.1  augustss 	vf->eqh = sqh;
   1596  1.1  augustss 	vf->bandwidth++;
   1597  1.1  augustss }
   1598  1.1  augustss 
   1599  1.1  augustss /* Remove interrupt QH, called with vflock. */
   1600  1.1  augustss void
   1601  1.1  augustss uhci_remove_intr(sc, n, sqh)
   1602  1.1  augustss 	uhci_softc_t *sc;
   1603  1.1  augustss 	int n;
   1604  1.1  augustss 	uhci_soft_qh_t *sqh;
   1605  1.1  augustss {
   1606  1.1  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[n];
   1607  1.1  augustss 	uhci_soft_qh_t *pqh;
   1608  1.1  augustss 
   1609  1.1  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh));
   1610  1.1  augustss 
   1611  1.1  augustss 	for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink)
   1612  1.1  augustss #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
   1613  1.1  augustss 		if (pqh->qh->qh_hlink & UHCI_PTR_T) {
   1614  1.1  augustss 			printf("uhci_remove_intr: QH not found\n");
   1615  1.1  augustss 			return;
   1616  1.1  augustss 		}
   1617  1.1  augustss #else
   1618  1.1  augustss 		;
   1619  1.1  augustss #endif
   1620  1.1  augustss 	pqh->qh->hlink    = sqh->qh->hlink;
   1621  1.1  augustss 	pqh->qh->qh_hlink = sqh->qh->qh_hlink;
   1622  1.1  augustss 	if (vf->eqh == sqh)
   1623  1.1  augustss 		vf->eqh = pqh;
   1624  1.1  augustss 	vf->bandwidth--;
   1625  1.1  augustss }
   1626  1.1  augustss 
   1627  1.1  augustss usbd_status
   1628  1.1  augustss uhci_device_setintr(sc, upipe, ival)
   1629  1.1  augustss 	uhci_softc_t *sc;
   1630  1.1  augustss 	struct uhci_pipe *upipe;
   1631  1.1  augustss 	int ival;
   1632  1.1  augustss {
   1633  1.1  augustss 	uhci_soft_qh_t *sqh;
   1634  1.1  augustss 	int i, npoll, s;
   1635  1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   1636  1.1  augustss 
   1637  1.1  augustss 	DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
   1638  1.1  augustss 	if (ival == 0) {
   1639  1.1  augustss 		printf("uhci_setintr: 0 interval\n");
   1640  1.1  augustss 		return (USBD_INVAL);
   1641  1.1  augustss 	}
   1642  1.1  augustss 
   1643  1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   1644  1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   1645  1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   1646  1.1  augustss 	DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
   1647  1.1  augustss 
   1648  1.1  augustss 	upipe->u.intr.npoll = npoll;
   1649  1.1  augustss 	upipe->u.intr.qhs =
   1650  1.1  augustss 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USB, M_WAITOK);
   1651  1.1  augustss 
   1652  1.1  augustss 	/*
   1653  1.1  augustss 	 * Figure out which offset in the schedule that has most
   1654  1.1  augustss 	 * bandwidth left over.
   1655  1.1  augustss 	 */
   1656  1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   1657  1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   1658  1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   1659  1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   1660  1.1  augustss 		if (bw < bestbw) {
   1661  1.1  augustss 			bestbw = bw;
   1662  1.1  augustss 			bestoffs = offs;
   1663  1.1  augustss 		}
   1664  1.1  augustss 	}
   1665  1.1  augustss 	DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   1666  1.1  augustss 
   1667  1.1  augustss 	upipe->iinfo->stdstart = 0;
   1668  1.1  augustss 	for(i = 0; i < npoll; i++) {
   1669  1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   1670  1.1  augustss 		sqh->qh->elink = 0;
   1671  1.1  augustss 		sqh->qh->qh_elink = UHCI_PTR_T;
   1672  1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   1673  1.1  augustss 		sqh->intr_info = upipe->iinfo;
   1674  1.1  augustss 	}
   1675  1.1  augustss #undef MOD
   1676  1.1  augustss 
   1677  1.1  augustss 	s = splusb();
   1678  1.1  augustss 	LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list);
   1679  1.1  augustss 	splx(s);
   1680  1.1  augustss 
   1681  1.1  augustss 	uhci_lock_frames(sc);
   1682  1.1  augustss 	/* Enter QHs into the controller data structures. */
   1683  1.1  augustss 	for(i = 0; i < npoll; i++)
   1684  1.1  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos,
   1685  1.1  augustss 			      upipe->u.intr.qhs[i]);
   1686  1.1  augustss 	uhci_unlock_frames(sc);
   1687  1.1  augustss 
   1688  1.1  augustss 	DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
   1689  1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1690  1.1  augustss }
   1691  1.1  augustss 
   1692  1.1  augustss /* Open a new pipe. */
   1693  1.1  augustss usbd_status
   1694  1.1  augustss uhci_open(pipe)
   1695  1.1  augustss 	usbd_pipe_handle pipe;
   1696  1.1  augustss {
   1697  1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   1698  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1699  1.1  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   1700  1.1  augustss 	usbd_status r;
   1701  1.1  augustss 
   1702  1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   1703  1.1  augustss 		     pipe, pipe->device->address,
   1704  1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   1705  1.1  augustss 	if (pipe->device->address == sc->sc_addr) {
   1706  1.1  augustss 		switch (ed->bEndpointAddress) {
   1707  1.1  augustss 		case USB_CONTROL_ENDPOINT:
   1708  1.1  augustss 			pipe->methods = &uhci_root_ctrl_methods;
   1709  1.1  augustss 			break;
   1710  1.1  augustss 		case UE_IN | UHCI_INTR_ENDPT:
   1711  1.1  augustss 			pipe->methods = &uhci_root_intr_methods;
   1712  1.1  augustss 			break;
   1713  1.1  augustss 		default:
   1714  1.1  augustss 			return (USBD_INVAL);
   1715  1.1  augustss 		}
   1716  1.1  augustss 	} else {
   1717  1.1  augustss 		upipe->iinfo = uhci_alloc_intr_info(sc);
   1718  1.1  augustss 		if (upipe->iinfo == 0)
   1719  1.1  augustss 			return (USBD_NOMEM);
   1720  1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   1721  1.1  augustss 		case UE_CONTROL:
   1722  1.1  augustss 			pipe->methods = &uhci_device_ctrl_methods;
   1723  1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   1724  1.1  augustss 			if (upipe->u.ctl.sqh == 0)
   1725  1.5  augustss 				goto bad;
   1726  1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   1727  1.5  augustss 			if (upipe->u.ctl.setup == 0) {
   1728  1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   1729  1.5  augustss 				goto bad;
   1730  1.5  augustss 			}
   1731  1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   1732  1.5  augustss 			if (upipe->u.ctl.stat == 0) {
   1733  1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   1734  1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   1735  1.5  augustss 				goto bad;
   1736  1.5  augustss 			}
   1737  1.7  augustss 			r = usb_allocmem(sc->sc_dmatag,
   1738  1.7  augustss 					 sizeof(usb_device_request_t),
   1739  1.7  augustss 					 0, &upipe->u.ctl.reqdma);
   1740  1.5  augustss 			if (r != USBD_NORMAL_COMPLETION) {
   1741  1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   1742  1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   1743  1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   1744  1.5  augustss 				goto bad;
   1745  1.5  augustss 			}
   1746  1.1  augustss 			break;
   1747  1.1  augustss 		case UE_INTERRUPT:
   1748  1.1  augustss 			pipe->methods = &uhci_device_intr_methods;
   1749  1.1  augustss 			return (uhci_device_setintr(sc, upipe, ed->bInterval));
   1750  1.1  augustss 		case UE_ISOCHRONOUS:
   1751  1.1  augustss 			printf("uhci_open: iso not implemented\n");
   1752  1.1  augustss 			return (USBD_XXX);
   1753  1.1  augustss 		case UE_BULK:
   1754  1.1  augustss 			pipe->methods = &uhci_device_bulk_methods;
   1755  1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   1756  1.1  augustss 			if (upipe->u.bulk.sqh == 0)
   1757  1.5  augustss 				goto bad;
   1758  1.1  augustss 			break;
   1759  1.1  augustss 		}
   1760  1.1  augustss 	}
   1761  1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1762  1.5  augustss 
   1763  1.5  augustss  bad:
   1764  1.5  augustss 	uhci_free_intr_info(upipe->iinfo);
   1765  1.5  augustss 	return (USBD_NOMEM);
   1766  1.1  augustss }
   1767  1.1  augustss 
   1768  1.1  augustss /*
   1769  1.1  augustss  * Data structures and routines to emulate the root hub.
   1770  1.1  augustss  */
   1771  1.1  augustss usb_device_descriptor_t uhci_devd = {
   1772  1.1  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1773  1.1  augustss 	UDESC_DEVICE,		/* type */
   1774  1.1  augustss 	{0x00, 0x01},		/* USB version */
   1775  1.1  augustss 	UCLASS_HUB,		/* class */
   1776  1.1  augustss 	USUBCLASS_HUB,		/* subclass */
   1777  1.1  augustss 	0,			/* protocol */
   1778  1.1  augustss 	64,			/* max packet */
   1779  1.1  augustss 	{0},{0},{0x00,0x01},	/* device id */
   1780  1.1  augustss 	1,2,0,			/* string indicies */
   1781  1.1  augustss 	1			/* # of configurations */
   1782  1.1  augustss };
   1783  1.1  augustss 
   1784  1.1  augustss usb_config_descriptor_t uhci_confd = {
   1785  1.1  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   1786  1.1  augustss 	UDESC_CONFIG,
   1787  1.1  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   1788  1.1  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   1789  1.1  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   1790  1.1  augustss 	1,
   1791  1.1  augustss 	1,
   1792  1.1  augustss 	0,
   1793  1.1  augustss 	UC_SELF_POWERED,
   1794  1.1  augustss 	0			/* max power */
   1795  1.1  augustss };
   1796  1.1  augustss 
   1797  1.1  augustss usb_interface_descriptor_t uhci_ifcd = {
   1798  1.1  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   1799  1.1  augustss 	UDESC_INTERFACE,
   1800  1.1  augustss 	0,
   1801  1.1  augustss 	0,
   1802  1.1  augustss 	1,
   1803  1.1  augustss 	UCLASS_HUB,
   1804  1.1  augustss 	USUBCLASS_HUB,
   1805  1.1  augustss 	0,
   1806  1.1  augustss 	0
   1807  1.1  augustss };
   1808  1.1  augustss 
   1809  1.1  augustss usb_endpoint_descriptor_t uhci_endpd = {
   1810  1.1  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   1811  1.1  augustss 	UDESC_ENDPOINT,
   1812  1.1  augustss 	UE_IN | UHCI_INTR_ENDPT,
   1813  1.1  augustss 	UE_INTERRUPT,
   1814  1.1  augustss 	{8},
   1815  1.1  augustss 	255
   1816  1.1  augustss };
   1817  1.1  augustss 
   1818  1.1  augustss usb_hub_descriptor_t uhci_hubd_piix = {
   1819  1.1  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   1820  1.1  augustss 	UDESC_HUB,
   1821  1.1  augustss 	2,
   1822  1.1  augustss 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   1823  1.1  augustss 	50,			/* power on to power good */
   1824  1.1  augustss 	0,
   1825  1.1  augustss 	{ 0x00 },		/* both ports are removable */
   1826  1.1  augustss 	{ 0x00 },		/* no ports can power down individually */
   1827  1.1  augustss };
   1828  1.1  augustss 
   1829  1.1  augustss int
   1830  1.1  augustss uhci_str(p, l, s)
   1831  1.1  augustss 	usb_string_descriptor_t *p;
   1832  1.1  augustss 	int l;
   1833  1.1  augustss 	char *s;
   1834  1.1  augustss {
   1835  1.1  augustss 	int i;
   1836  1.1  augustss 
   1837  1.1  augustss 	if (l == 0)
   1838  1.1  augustss 		return (0);
   1839  1.1  augustss 	p->bLength = 2 * strlen(s) + 2;
   1840  1.1  augustss 	if (l == 1)
   1841  1.1  augustss 		return (1);
   1842  1.1  augustss 	p->bDescriptorType = UDESC_STRING;
   1843  1.1  augustss 	l -= 2;
   1844  1.1  augustss 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   1845  1.1  augustss 		USETW2(p->bString[i], 0, s[i]);
   1846  1.1  augustss 	return (2*i+2);
   1847  1.1  augustss }
   1848  1.1  augustss 
   1849  1.1  augustss /*
   1850  1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   1851  1.1  augustss  */
   1852  1.1  augustss usbd_status
   1853  1.1  augustss uhci_root_ctrl_transfer(reqh)
   1854  1.1  augustss 	usbd_request_handle reqh;
   1855  1.1  augustss {
   1856  1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
   1857  1.1  augustss 	usb_device_request_t *req;
   1858  1.1  augustss 	void *buf;
   1859  1.1  augustss 	int port, x;
   1860  1.1  augustss 	int len, value, index, status, change, l, totlen = 0;
   1861  1.1  augustss 	usb_port_status_t ps;
   1862  1.1  augustss 	usbd_status r;
   1863  1.1  augustss 
   1864  1.1  augustss 	if (!reqh->isreq)
   1865  1.1  augustss 		panic("uhci_root_ctrl_transfer: not a request\n");
   1866  1.1  augustss 	req = &reqh->request;
   1867  1.1  augustss 	buf = reqh->buffer;
   1868  1.1  augustss 
   1869  1.1  augustss 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   1870  1.1  augustss 		    req->bmRequestType, req->bRequest));
   1871  1.1  augustss 
   1872  1.1  augustss 	len = UGETW(req->wLength);
   1873  1.1  augustss 	value = UGETW(req->wValue);
   1874  1.1  augustss 	index = UGETW(req->wIndex);
   1875  1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   1876  1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   1877  1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   1878  1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   1879  1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   1880  1.1  augustss 		/*
   1881  1.1  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_STALL are no-ops
   1882  1.1  augustss 		 * for the integrated root hub.
   1883  1.1  augustss 		 */
   1884  1.1  augustss 		break;
   1885  1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   1886  1.1  augustss 		if (len > 0) {
   1887  1.1  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   1888  1.1  augustss 			totlen = 1;
   1889  1.1  augustss 		}
   1890  1.1  augustss 		break;
   1891  1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   1892  1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   1893  1.1  augustss 		switch(value >> 8) {
   1894  1.1  augustss 		case UDESC_DEVICE:
   1895  1.1  augustss 			if ((value & 0xff) != 0) {
   1896  1.1  augustss 				r = USBD_IOERROR;
   1897  1.1  augustss 				goto ret;
   1898  1.1  augustss 			}
   1899  1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1900  1.1  augustss 			memcpy(buf, &uhci_devd, l);
   1901  1.1  augustss 			break;
   1902  1.1  augustss 		case UDESC_CONFIG:
   1903  1.1  augustss 			if ((value & 0xff) != 0) {
   1904  1.1  augustss 				r = USBD_IOERROR;
   1905  1.1  augustss 				goto ret;
   1906  1.1  augustss 			}
   1907  1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   1908  1.1  augustss 			memcpy(buf, &uhci_confd, l);
   1909  1.1  augustss 			buf = (char *)buf + l;
   1910  1.1  augustss 			len -= l;
   1911  1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   1912  1.1  augustss 			totlen += l;
   1913  1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   1914  1.1  augustss 			buf = (char *)buf + l;
   1915  1.1  augustss 			len -= l;
   1916  1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   1917  1.1  augustss 			totlen += l;
   1918  1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   1919  1.1  augustss 			break;
   1920  1.1  augustss 		case UDESC_STRING:
   1921  1.1  augustss 			if (len == 0)
   1922  1.1  augustss 				break;
   1923  1.1  augustss 			*(u_int8_t *)buf = 0;
   1924  1.1  augustss 			totlen = 1;
   1925  1.1  augustss 			switch (value & 0xff) {
   1926  1.1  augustss 			case 1: /* Vendor */
   1927  1.1  augustss 				if (sc->sc_model == UHCI_PIIX3 ||
   1928  1.1  augustss 				    sc->sc_model == UHCI_PIIX4)
   1929  1.1  augustss 					totlen = uhci_str(buf, len, "Intel");
   1930  1.1  augustss 				break;
   1931  1.1  augustss 			case 2: /* Product */
   1932  1.1  augustss 				if (sc->sc_model == UHCI_PIIX3)
   1933  1.1  augustss 					totlen = uhci_str(buf, len,
   1934  1.1  augustss 							  "PIIX3 root hub");
   1935  1.1  augustss 				if (sc->sc_model == UHCI_PIIX4)
   1936  1.1  augustss 					totlen = uhci_str(buf, len,
   1937  1.1  augustss 							  "PIIX4 root hub");
   1938  1.1  augustss 				break;
   1939  1.1  augustss 			}
   1940  1.1  augustss 			break;
   1941  1.1  augustss 		default:
   1942  1.1  augustss 			r = USBD_IOERROR;
   1943  1.1  augustss 			goto ret;
   1944  1.1  augustss 		}
   1945  1.1  augustss 		break;
   1946  1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   1947  1.1  augustss 		if (len > 0) {
   1948  1.1  augustss 			*(u_int8_t *)buf = 0;
   1949  1.1  augustss 			totlen = 1;
   1950  1.1  augustss 		}
   1951  1.1  augustss 		break;
   1952  1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   1953  1.1  augustss 		if (len > 1) {
   1954  1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   1955  1.1  augustss 			totlen = 2;
   1956  1.1  augustss 		}
   1957  1.1  augustss 		break;
   1958  1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   1959  1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   1960  1.1  augustss 		if (len > 1) {
   1961  1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   1962  1.1  augustss 			totlen = 2;
   1963  1.1  augustss 		}
   1964  1.1  augustss 		break;
   1965  1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   1966  1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   1967  1.1  augustss 			r = USBD_IOERROR;
   1968  1.1  augustss 			goto ret;
   1969  1.1  augustss 		}
   1970  1.1  augustss 		sc->sc_addr = value;
   1971  1.1  augustss 		break;
   1972  1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   1973  1.1  augustss 		if (value != 0 && value != 1) {
   1974  1.1  augustss 			r = USBD_IOERROR;
   1975  1.1  augustss 			goto ret;
   1976  1.1  augustss 		}
   1977  1.1  augustss 		sc->sc_conf = value;
   1978  1.1  augustss 		break;
   1979  1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   1980  1.1  augustss 		break;
   1981  1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   1982  1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   1983  1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   1984  1.1  augustss 		r = USBD_IOERROR;
   1985  1.1  augustss 		goto ret;
   1986  1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   1987  1.1  augustss 		break;
   1988  1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   1989  1.1  augustss 		break;
   1990  1.1  augustss 	/* Hub requests */
   1991  1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   1992  1.1  augustss 		break;
   1993  1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   1994  1.1  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE port=%d feature=%d\n",
   1995  1.1  augustss 			     index, value));
   1996  1.1  augustss 		if (index == 1)
   1997  1.1  augustss 			port = UHCI_PORTSC1;
   1998  1.1  augustss 		else if (index == 2)
   1999  1.1  augustss 			port = UHCI_PORTSC2;
   2000  1.1  augustss 		else {
   2001  1.1  augustss 			r = USBD_IOERROR;
   2002  1.1  augustss 			goto ret;
   2003  1.1  augustss 		}
   2004  1.1  augustss 		switch(value) {
   2005  1.1  augustss 		case UHF_PORT_ENABLE:
   2006  1.1  augustss 			x = UREAD2(sc, port);
   2007  1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   2008  1.1  augustss 			break;
   2009  1.1  augustss 		case UHF_PORT_SUSPEND:
   2010  1.1  augustss 			x = UREAD2(sc, port);
   2011  1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   2012  1.1  augustss 			break;
   2013  1.1  augustss 		case UHF_PORT_RESET:
   2014  1.1  augustss 			x = UREAD2(sc, port);
   2015  1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   2016  1.1  augustss 			break;
   2017  1.1  augustss 		case UHF_C_PORT_CONNECTION:
   2018  1.1  augustss 			x = UREAD2(sc, port);
   2019  1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   2020  1.1  augustss 			break;
   2021  1.1  augustss 		case UHF_C_PORT_ENABLE:
   2022  1.1  augustss 			x = UREAD2(sc, port);
   2023  1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   2024  1.1  augustss 			break;
   2025  1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2026  1.1  augustss 			x = UREAD2(sc, port);
   2027  1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   2028  1.1  augustss 			break;
   2029  1.1  augustss 		case UHF_C_PORT_RESET:
   2030  1.1  augustss 			sc->sc_isreset = 0;
   2031  1.1  augustss 			r = USBD_NORMAL_COMPLETION;
   2032  1.1  augustss 			goto ret;
   2033  1.1  augustss 		case UHF_PORT_CONNECTION:
   2034  1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   2035  1.1  augustss 		case UHF_PORT_POWER:
   2036  1.1  augustss 		case UHF_PORT_LOW_SPEED:
   2037  1.1  augustss 		case UHF_C_PORT_SUSPEND:
   2038  1.1  augustss 		default:
   2039  1.1  augustss 			r = USBD_IOERROR;
   2040  1.1  augustss 			goto ret;
   2041  1.1  augustss 		}
   2042  1.1  augustss 		break;
   2043  1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   2044  1.1  augustss 		if (index == 1)
   2045  1.1  augustss 			port = UHCI_PORTSC1;
   2046  1.1  augustss 		else if (index == 2)
   2047  1.1  augustss 			port = UHCI_PORTSC2;
   2048  1.1  augustss 		else {
   2049  1.1  augustss 			r = USBD_IOERROR;
   2050  1.1  augustss 			goto ret;
   2051  1.1  augustss 		}
   2052  1.1  augustss 		if (len > 0) {
   2053  1.1  augustss 			*(u_int8_t *)buf =
   2054  1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   2055  1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   2056  1.1  augustss 			totlen = 1;
   2057  1.1  augustss 		}
   2058  1.1  augustss 		break;
   2059  1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   2060  1.1  augustss 		if (value != 0) {
   2061  1.1  augustss 			r = USBD_IOERROR;
   2062  1.1  augustss 			goto ret;
   2063  1.1  augustss 		}
   2064  1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   2065  1.1  augustss 		totlen = l;
   2066  1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   2067  1.1  augustss 		break;
   2068  1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   2069  1.1  augustss 		if (len != 4) {
   2070  1.1  augustss 			r = USBD_IOERROR;
   2071  1.1  augustss 			goto ret;
   2072  1.1  augustss 		}
   2073  1.1  augustss 		memset(buf, 0, len);
   2074  1.1  augustss 		totlen = len;
   2075  1.1  augustss 		break;
   2076  1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   2077  1.1  augustss 		if (index == 1)
   2078  1.1  augustss 			port = UHCI_PORTSC1;
   2079  1.1  augustss 		else if (index == 2)
   2080  1.1  augustss 			port = UHCI_PORTSC2;
   2081  1.1  augustss 		else {
   2082  1.1  augustss 			r = USBD_IOERROR;
   2083  1.1  augustss 			goto ret;
   2084  1.1  augustss 		}
   2085  1.1  augustss 		if (len != 4) {
   2086  1.1  augustss 			r = USBD_IOERROR;
   2087  1.1  augustss 			goto ret;
   2088  1.1  augustss 		}
   2089  1.1  augustss 		x = UREAD2(sc, port);
   2090  1.1  augustss 		status = change = 0;
   2091  1.1  augustss 		if (x & UHCI_PORTSC_CCS  )
   2092  1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   2093  1.1  augustss 		if (x & UHCI_PORTSC_CSC  )
   2094  1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   2095  1.1  augustss 		if (x & UHCI_PORTSC_PE   )
   2096  1.1  augustss 			status |= UPS_PORT_ENABLED;
   2097  1.1  augustss 		if (x & UHCI_PORTSC_POEDC)
   2098  1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   2099  1.1  augustss 		if (x & UHCI_PORTSC_OCI  )
   2100  1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   2101  1.1  augustss 		if (x & UHCI_PORTSC_OCIC )
   2102  1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   2103  1.1  augustss 		if (x & UHCI_PORTSC_SUSP )
   2104  1.1  augustss 			status |= UPS_SUSPEND;
   2105  1.1  augustss 		if (x & UHCI_PORTSC_LSDA )
   2106  1.1  augustss 			status |= UPS_LOW_SPEED;
   2107  1.1  augustss 		status |= UPS_PORT_POWER;
   2108  1.1  augustss 		if (sc->sc_isreset)
   2109  1.1  augustss 			change |= UPS_C_PORT_RESET;
   2110  1.1  augustss 		USETW(ps.wPortStatus, status);
   2111  1.1  augustss 		USETW(ps.wPortChange, change);
   2112  1.1  augustss 		l = min(len, sizeof ps);
   2113  1.1  augustss 		memcpy(buf, &ps, l);
   2114  1.1  augustss 		totlen = l;
   2115  1.1  augustss 		break;
   2116  1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   2117  1.1  augustss 		r = USBD_IOERROR;
   2118  1.1  augustss 		goto ret;
   2119  1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   2120  1.1  augustss 		break;
   2121  1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   2122  1.1  augustss 		if (index == 1)
   2123  1.1  augustss 			port = UHCI_PORTSC1;
   2124  1.1  augustss 		else if (index == 2)
   2125  1.1  augustss 			port = UHCI_PORTSC2;
   2126  1.1  augustss 		else {
   2127  1.1  augustss 			r = USBD_IOERROR;
   2128  1.1  augustss 			goto ret;
   2129  1.1  augustss 		}
   2130  1.1  augustss 		switch(value) {
   2131  1.1  augustss 		case UHF_PORT_ENABLE:
   2132  1.1  augustss 			x = UREAD2(sc, port);
   2133  1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   2134  1.1  augustss 			break;
   2135  1.1  augustss 		case UHF_PORT_SUSPEND:
   2136  1.1  augustss 			x = UREAD2(sc, port);
   2137  1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   2138  1.1  augustss 			break;
   2139  1.1  augustss 		case UHF_PORT_RESET:
   2140  1.1  augustss 			x = UREAD2(sc, port);
   2141  1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   2142  1.1  augustss 			usbd_delay_ms(10);
   2143  1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   2144  1.1  augustss 			delay(100);
   2145  1.1  augustss 			x = UREAD2(sc, port);
   2146  1.1  augustss 			UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   2147  1.1  augustss 			delay(100);
   2148  1.1  augustss 			DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
   2149  1.1  augustss 				    index, UREAD2(sc, port)));
   2150  1.1  augustss 			sc->sc_isreset = 1;
   2151  1.1  augustss 			break;
   2152  1.1  augustss 		case UHF_C_PORT_CONNECTION:
   2153  1.1  augustss 		case UHF_C_PORT_ENABLE:
   2154  1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2155  1.1  augustss 		case UHF_PORT_CONNECTION:
   2156  1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   2157  1.1  augustss 		case UHF_PORT_POWER:
   2158  1.1  augustss 		case UHF_PORT_LOW_SPEED:
   2159  1.1  augustss 		case UHF_C_PORT_SUSPEND:
   2160  1.1  augustss 		case UHF_C_PORT_RESET:
   2161  1.1  augustss 		default:
   2162  1.1  augustss 			r = USBD_IOERROR;
   2163  1.1  augustss 			goto ret;
   2164  1.1  augustss 		}
   2165  1.1  augustss 		break;
   2166  1.1  augustss 	default:
   2167  1.1  augustss 		r = USBD_IOERROR;
   2168  1.1  augustss 		goto ret;
   2169  1.1  augustss 	}
   2170  1.1  augustss 	reqh->actlen = totlen;
   2171  1.1  augustss 	r = USBD_NORMAL_COMPLETION;
   2172  1.1  augustss  ret:
   2173  1.1  augustss 	reqh->status = r;
   2174  1.1  augustss 	reqh->xfercb(reqh);
   2175  1.1  augustss 	return (USBD_IN_PROGRESS);
   2176  1.1  augustss }
   2177  1.1  augustss 
   2178  1.1  augustss /* Abort a root control request. */
   2179  1.1  augustss void
   2180  1.1  augustss uhci_root_ctrl_abort(reqh)
   2181  1.1  augustss 	usbd_request_handle reqh;
   2182  1.1  augustss {
   2183  1.6  augustss 	/* Nothing to do, all transfers are syncronous. */
   2184  1.1  augustss }
   2185  1.1  augustss 
   2186  1.1  augustss /* Close the root pipe. */
   2187  1.1  augustss void
   2188  1.1  augustss uhci_root_ctrl_close(pipe)
   2189  1.1  augustss 	usbd_pipe_handle pipe;
   2190  1.1  augustss {
   2191  1.1  augustss 	untimeout(uhci_timo, pipe->intrreqh);
   2192  1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   2193  1.1  augustss }
   2194  1.1  augustss 
   2195  1.1  augustss /* Abort a root interrupt request. */
   2196  1.1  augustss void
   2197  1.1  augustss uhci_root_intr_abort(reqh)
   2198  1.1  augustss 	usbd_request_handle reqh;
   2199  1.1  augustss {
   2200  1.1  augustss 	untimeout(uhci_timo, reqh);
   2201  1.1  augustss }
   2202  1.1  augustss 
   2203  1.1  augustss /* Start a transfer on the root interrupt pipe */
   2204  1.1  augustss usbd_status
   2205  1.1  augustss uhci_root_intr_transfer(reqh)
   2206  1.1  augustss 	usbd_request_handle reqh;
   2207  1.1  augustss {
   2208  1.1  augustss 	usbd_pipe_handle pipe = reqh->pipe;
   2209  1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   2210  1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2211  1.7  augustss 	usb_dma_t *dmap;
   2212  1.1  augustss 	usbd_status r;
   2213  1.1  augustss 	int len;
   2214  1.1  augustss 
   2215  1.1  augustss 	DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d flags=%d\n",
   2216  1.1  augustss 		     reqh, reqh->buffer, reqh->length, reqh->flags));
   2217  1.1  augustss 
   2218  1.1  augustss 	len = reqh->length;
   2219  1.1  augustss 	dmap = &upipe->u.intr.datadma;
   2220  1.1  augustss 	if (len == 0)
   2221  1.1  augustss 		return (USBD_INVAL); /* XXX should it be? */
   2222  1.1  augustss 
   2223  1.7  augustss 	r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
   2224  1.1  augustss 	if (r != USBD_NORMAL_COMPLETION)
   2225  1.1  augustss 		return (r);
   2226  1.1  augustss 
   2227  1.1  augustss 	sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval);
   2228  1.1  augustss 	timeout(uhci_timo, reqh, sc->sc_ival);
   2229  1.1  augustss 	return (USBD_IN_PROGRESS);
   2230  1.1  augustss }
   2231  1.1  augustss 
   2232  1.1  augustss /* Close the root interrupt pipe. */
   2233  1.1  augustss void
   2234  1.1  augustss uhci_root_intr_close(pipe)
   2235  1.1  augustss 	usbd_pipe_handle pipe;
   2236  1.1  augustss {
   2237  1.1  augustss 	untimeout(uhci_timo, pipe->intrreqh);
   2238  1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   2239  1.1  augustss }
   2240