uhci.c revision 1.10 1 /* $NetBSD: uhci.c,v 1.10 1998/08/02 22:30:52 augustss Exp $ */
2
3 /*
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * Author: Lennart Augustsson <augustss (at) carlstedt.se>
8 * Carlstedt Research & Technology
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * USB Universal Host Controller driver.
41 * Handles PIIX3 and PIIX4.
42 *
43 * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
44 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
45 * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf
46 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
47 */
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/kernel.h>
52 #include <sys/malloc.h>
53 #include <sys/device.h>
54 #include <sys/proc.h>
55 #include <sys/queue.h>
56 #include <sys/select.h>
57
58 #include <machine/bus.h>
59
60 #include <dev/usb/usb.h>
61 #include <dev/usb/usbdi.h>
62 #include <dev/usb/usbdivar.h>
63 #include <dev/usb/usb_mem.h>
64 #include <dev/usb/usb_quirks.h>
65
66 #include <dev/usb/uhcireg.h>
67 #include <dev/usb/uhcivar.h>
68
69 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
70
71 struct uhci_pipe {
72 struct usbd_pipe pipe;
73 uhci_intr_info_t *iinfo;
74 int newtoggle;
75 /* Info needed for different pipe kinds. */
76 union {
77 /* Control pipe */
78 struct {
79 uhci_soft_qh_t *sqh;
80 usb_dma_t reqdma;
81 usb_dma_t datadma;
82 uhci_soft_td_t *setup, *stat, *xferend;
83 u_int length;
84 } ctl;
85 /* Interrupt pipe */
86 struct {
87 usb_dma_t datadma;
88 int npoll;
89 uhci_soft_qh_t **qhs;
90 } intr;
91 /* Bulk pipe */
92 struct {
93 uhci_soft_qh_t *sqh;
94 usb_dma_t datadma;
95 u_int length;
96 int isread;
97 } bulk;
98 } u;
99 };
100
101 /*
102 * The uhci_intr_info free list can be global since they contain
103 * no dma specific data. The other free lists do.
104 */
105 int uhci_global_init_done = 0;
106 LIST_HEAD(, uhci_intr_info) uhci_ii_free;
107
108 void uhci_busreset __P((uhci_softc_t *));
109 void uhci_run __P((uhci_softc_t *, int run));
110 uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *));
111 void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *));
112 uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *));
113 void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *));
114 uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *));
115 void uhci_free_intr_info __P((uhci_intr_info_t *ii));
116 void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *,
117 uhci_intr_info_t *));
118 void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *));
119
120 void uhci_free_std_chain __P((uhci_softc_t *,
121 uhci_soft_td_t *, uhci_soft_td_t *));
122 usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *,
123 int, int, usb_dma_t *,
124 uhci_soft_td_t **,
125 uhci_soft_td_t **));
126 void uhci_timo __P((void *));
127 void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle));
128 void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *));
129 void uhci_ii_done __P((uhci_intr_info_t *, int));
130 void uhci_timeout __P((void *));
131 void uhci_wakeup_ctrl __P((void *, int, int, void *, int));
132 void uhci_lock_frames __P((uhci_softc_t *));
133 void uhci_unlock_frames __P((uhci_softc_t *));
134 void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
135 void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
136 void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
137 void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
138 int uhci_str __P((usb_string_descriptor_t *, int, char *));
139
140 void uhci_device_close __P((struct uhci_pipe *));
141
142 void uhci_wakeup_cb __P((usbd_request_handle reqh));
143
144 usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle));
145 void uhci_device_ctrl_abort __P((usbd_request_handle));
146 void uhci_device_ctrl_close __P((usbd_pipe_handle));
147 usbd_status uhci_device_intr_transfer __P((usbd_request_handle));
148 void uhci_device_intr_abort __P((usbd_request_handle));
149 void uhci_device_intr_close __P((usbd_pipe_handle));
150 usbd_status uhci_device_bulk_transfer __P((usbd_request_handle));
151 void uhci_device_bulk_abort __P((usbd_request_handle));
152 void uhci_device_bulk_close __P((usbd_pipe_handle));
153
154 usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle));
155 void uhci_root_ctrl_abort __P((usbd_request_handle));
156 void uhci_root_ctrl_close __P((usbd_pipe_handle));
157 usbd_status uhci_root_intr_transfer __P((usbd_request_handle));
158 void uhci_root_intr_abort __P((usbd_request_handle));
159 void uhci_root_intr_close __P((usbd_pipe_handle));
160
161 usbd_status uhci_open __P((usbd_pipe_handle));
162 void uhci_poll __P((struct usbd_bus *));
163
164 usbd_status uhci_device_request __P((usbd_request_handle reqh));
165 void uhci_ctrl_done __P((uhci_intr_info_t *ii));
166 void uhci_bulk_done __P((uhci_intr_info_t *ii));
167
168 void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
169 void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
170 usbd_status uhci_device_setintr __P((uhci_softc_t *sc,
171 struct uhci_pipe *pipe, int ival));
172 void uhci_intr_done __P((uhci_intr_info_t *ii));
173
174 #ifdef USB_DEBUG
175 static void uhci_dumpregs __P((uhci_softc_t *));
176 void uhci_dump_tds __P((uhci_soft_td_t *));
177 void uhci_dump_qh __P((uhci_soft_qh_t *));
178 void uhci_dump __P((void));
179 void uhci_dump_td __P((uhci_soft_td_t *));
180 #endif
181
182 #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
183 #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
184 #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
185 #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
186
187 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
188 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
189
190 #define UHCI_RESET_TIMEOUT 100 /* reset timeout */
191 #define UHCI_CTRL_TIMEOUT 500 /* control transaction timeout */
192 #define UHCI_ISO_DELAY 50 /* delay of start of iso */
193
194 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
195
196 #define UHCI_INTR_ENDPT 1
197
198 struct usbd_methods uhci_root_ctrl_methods = {
199 uhci_root_ctrl_transfer,
200 uhci_root_ctrl_abort,
201 uhci_root_ctrl_close,
202 0,
203 };
204
205 struct usbd_methods uhci_root_intr_methods = {
206 uhci_root_intr_transfer,
207 uhci_root_intr_abort,
208 uhci_root_intr_close,
209 0,
210 };
211
212 struct usbd_methods uhci_device_ctrl_methods = {
213 uhci_device_ctrl_transfer,
214 uhci_device_ctrl_abort,
215 uhci_device_ctrl_close,
216 0,
217 };
218
219 struct usbd_methods uhci_device_intr_methods = {
220 uhci_device_intr_transfer,
221 uhci_device_intr_abort,
222 uhci_device_intr_close,
223 0,
224 };
225
226 struct usbd_methods uhci_device_bulk_methods = {
227 uhci_device_bulk_transfer,
228 uhci_device_bulk_abort,
229 uhci_device_bulk_close,
230 0,
231 };
232
233 void
234 uhci_busreset(sc)
235 uhci_softc_t *sc;
236 {
237 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
238 usbd_delay_ms(&sc->sc_bus, USB_RESET_DELAY); /* wait at least 10ms */
239 UHCICMD(sc, 0); /* do nothing */
240 }
241
242 usbd_status
243 uhci_init(sc)
244 uhci_softc_t *sc;
245 {
246 usbd_status r;
247 int i, j;
248 uhci_soft_qh_t *csqh, *bsqh, *sqh;
249 uhci_soft_td_t *std;
250 usb_dma_t dma;
251
252 DPRINTFN(1,("uhci_init: start\n"));
253
254 if (!uhci_global_init_done) {
255 uhci_global_init_done = 1;
256 LIST_INIT(&uhci_ii_free);
257 }
258
259 #if defined(USB_DEBUG)
260 if (uhcidebug > 2)
261 uhci_dumpregs(sc);
262 #endif
263
264 uhci_run(sc, 0); /* stop the controller */
265 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
266
267 /* Allocate and initialize real frame array. */
268 r = usb_allocmem(sc->sc_dmatag,
269 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
270 UHCI_FRAMELIST_ALIGN, &dma);
271 if (r != USBD_NORMAL_COMPLETION)
272 return (r);
273 sc->sc_pframes = KERNADDR(&dma);
274 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
275 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&dma)); /* set frame list */
276
277 uhci_busreset(sc);
278
279 /* Allocate the dummy QH where bulk traffic will be queued. */
280 bsqh = uhci_alloc_sqh(sc);
281 if (!bsqh)
282 return (USBD_NOMEM);
283 bsqh->qh->qh_hlink = UHCI_PTR_T; /* end of QH chain */
284 bsqh->qh->qh_elink = UHCI_PTR_T;
285 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
286
287 /* Allocate the dummy QH where control traffic will be queued. */
288 csqh = uhci_alloc_sqh(sc);
289 if (!csqh)
290 return (USBD_NOMEM);
291 csqh->qh->hlink = bsqh;
292 csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q;
293 csqh->qh->qh_elink = UHCI_PTR_T;
294 sc->sc_ctl_start = sc->sc_ctl_end = csqh;
295
296 /*
297 * Make all (virtual) frame list pointers point to the interrupt
298 * queue heads and the interrupt queue heads at the control
299 * queue head and point the physical frame list to the virtual.
300 */
301 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
302 std = uhci_alloc_std(sc);
303 sqh = uhci_alloc_sqh(sc);
304 if (!std || !sqh)
305 return (ENOMEM);
306 std->td->link.sqh = sqh;
307 std->td->td_link = sqh->physaddr | UHCI_PTR_Q;
308 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */
309 std->td->td_token = 0;
310 std->td->td_buffer = 0;
311 sqh->qh->hlink = csqh;
312 sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q;
313 sqh->qh->elink = 0;
314 sqh->qh->qh_elink = UHCI_PTR_T;
315 sc->sc_vframes[i].htd = std;
316 sc->sc_vframes[i].etd = std;
317 sc->sc_vframes[i].hqh = sqh;
318 sc->sc_vframes[i].eqh = sqh;
319 for (j = i;
320 j < UHCI_FRAMELIST_COUNT;
321 j += UHCI_VFRAMELIST_COUNT)
322 sc->sc_pframes[j] = std->physaddr;
323 }
324
325 LIST_INIT(&sc->sc_intrhead);
326
327 /* Set up the bus struct. */
328 sc->sc_bus.open_pipe = uhci_open;
329 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
330 sc->sc_bus.do_poll = uhci_poll;
331
332 DPRINTFN(1,("uhci_init: enabling\n"));
333 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
334 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
335
336 uhci_run(sc, 1); /* and here we go... */
337 return (USBD_NORMAL_COMPLETION);
338 }
339
340 #ifdef USB_DEBUG
341 static void
342 uhci_dumpregs(sc)
343 uhci_softc_t *sc;
344 {
345 printf("%s: regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
346 sc->sc_bus.bdev.dv_xname,
347 UREAD2(sc, UHCI_CMD),
348 UREAD2(sc, UHCI_STS),
349 UREAD2(sc, UHCI_INTR),
350 UREAD2(sc, UHCI_FRNUM),
351 UREAD2(sc, UHCI_FLBASEADDR),
352 UREAD2(sc, UHCI_SOF),
353 UREAD2(sc, UHCI_PORTSC1),
354 UREAD2(sc, UHCI_PORTSC2));
355 }
356
357 int uhci_longtd = 1;
358
359 void
360 uhci_dump_td(p)
361 uhci_soft_td_t *p;
362 {
363 printf("TD(%p) at %08lx = 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n",
364 p, (long)p->physaddr,
365 (long)p->td->td_link,
366 (long)p->td->td_status,
367 (long)p->td->td_token,
368 (long)p->td->td_buffer);
369 if (uhci_longtd)
370 printf(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,D=%d,maxlen=%d\n",
371 (long)p->td->td_link,
372 "\20\1T\2Q\3VF",
373 (long)p->td->td_status,
374 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
375 UHCI_TD_GET_ERRCNT(p->td->td_status),
376 UHCI_TD_GET_ACTLEN(p->td->td_status),
377 UHCI_TD_GET_PID(p->td->td_token),
378 UHCI_TD_GET_DEVADDR(p->td->td_token),
379 UHCI_TD_GET_ENDPT(p->td->td_token),
380 UHCI_TD_GET_DT(p->td->td_token),
381 UHCI_TD_GET_MAXLEN(p->td->td_token));
382
383 }
384
385 void
386 uhci_dump_qh(p)
387 uhci_soft_qh_t *p;
388 {
389 printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr,
390 p->qh->qh_hlink, p->qh->qh_elink);
391 }
392
393 #if 0
394 void
395 uhci_dump()
396 {
397 uhci_softc_t *sc = uhci;
398
399 uhci_dumpregs(sc);
400 printf("intrs=%d\n", sc->sc_intrs);
401 printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);
402 uhci_dump_qh(sc->sc_ctl_start->qh->hlink);
403 }
404 #endif
405
406 void
407 uhci_dump_tds(std)
408 uhci_soft_td_t *std;
409 {
410 uhci_soft_td_t *p;
411
412 for(p = std; p; p = p->td->link.std)
413 uhci_dump_td(p);
414 }
415 #endif
416
417 /*
418 * This routine is executed periodically and simulates interrupts
419 * from the root controller interrupt pipe for port status change.
420 */
421 void
422 uhci_timo(addr)
423 void *addr;
424 {
425 usbd_request_handle reqh = addr;
426 usbd_pipe_handle pipe = reqh->pipe;
427 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
428 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
429 int s;
430 u_char *p;
431
432 DPRINTFN(15, ("uhci_timo\n"));
433
434 p = KERNADDR(&upipe->u.intr.datadma);
435 p[0] = 0;
436 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
437 p[0] |= 1<<1;
438 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
439 p[0] |= 1<<2;
440 if (p[0] != 0) {
441 reqh->actlen = 1;
442 reqh->status = USBD_NORMAL_COMPLETION;
443 s = splusb();
444 reqh->xfercb(reqh);
445 splx(s);
446 }
447 if (reqh->pipe->intrreqh == reqh) {
448 timeout(uhci_timo, addr, sc->sc_ival);
449 } else {
450 usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma);
451 }
452 }
453
454
455 void
456 uhci_lock_frames(sc)
457 uhci_softc_t *sc;
458 {
459 int s = splusb();
460 while (sc->sc_vflock) {
461 sc->sc_vflock |= UHCI_WANT_LOCK;
462 tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0);
463 }
464 sc->sc_vflock = UHCI_HAS_LOCK;
465 splx(s);
466 }
467
468 void
469 uhci_unlock_frames(sc)
470 uhci_softc_t *sc;
471 {
472 int s = splusb();
473 sc->sc_vflock &= ~UHCI_HAS_LOCK;
474 if (sc->sc_vflock & UHCI_WANT_LOCK)
475 wakeup(&sc->sc_vflock);
476 splx(s);
477 }
478
479 /*
480 * Allocate an interrupt information struct. A free list is kept
481 * for fast allocation.
482 */
483 uhci_intr_info_t *
484 uhci_alloc_intr_info(sc)
485 uhci_softc_t *sc;
486 {
487 uhci_intr_info_t *ii;
488
489 ii = LIST_FIRST(&uhci_ii_free);
490 if (ii)
491 LIST_REMOVE(ii, list);
492 else {
493 ii = malloc(sizeof(uhci_intr_info_t), M_USBDEV, M_NOWAIT);
494 }
495 ii->sc = sc;
496 return ii;
497 }
498
499 void
500 uhci_free_intr_info(ii)
501 uhci_intr_info_t *ii;
502 {
503 LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */
504 }
505
506 /* Add control QH, called at splusb(). */
507 void
508 uhci_add_ctrl(sc, sqh)
509 uhci_softc_t *sc;
510 uhci_soft_qh_t *sqh;
511 {
512 uhci_qh_t *eqh;
513
514 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
515 eqh = sc->sc_ctl_end->qh;
516 sqh->qh->hlink = eqh->hlink;
517 sqh->qh->qh_hlink = eqh->qh_hlink;
518 eqh->hlink = sqh;
519 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
520 sc->sc_ctl_end = sqh;
521 }
522
523 /* Remove control QH, called at splusb(). */
524 void
525 uhci_remove_ctrl(sc, sqh)
526 uhci_softc_t *sc;
527 uhci_soft_qh_t *sqh;
528 {
529 uhci_soft_qh_t *pqh;
530
531 DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh));
532 for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink)
533 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
534 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
535 printf("uhci_remove_ctrl: QH not found\n");
536 return;
537 }
538 #else
539 ;
540 #endif
541 pqh->qh->hlink = sqh->qh->hlink;
542 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
543 if (sc->sc_ctl_end == sqh)
544 sc->sc_ctl_end = pqh;
545 }
546
547 /* Add bulk QH, called at splusb(). */
548 void
549 uhci_add_bulk(sc, sqh)
550 uhci_softc_t *sc;
551 uhci_soft_qh_t *sqh;
552 {
553 uhci_qh_t *eqh;
554
555 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
556 eqh = sc->sc_bulk_end->qh;
557 sqh->qh->hlink = eqh->hlink;
558 sqh->qh->qh_hlink = eqh->qh_hlink;
559 eqh->hlink = sqh;
560 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
561 sc->sc_bulk_end = sqh;
562 }
563
564 /* Remove bulk QH, called at splusb(). */
565 void
566 uhci_remove_bulk(sc, sqh)
567 uhci_softc_t *sc;
568 uhci_soft_qh_t *sqh;
569 {
570 uhci_soft_qh_t *pqh;
571
572 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
573 for (pqh = sc->sc_bulk_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink)
574 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
575 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
576 printf("uhci_remove_bulk: QH not found\n");
577 return;
578 }
579 #else
580 ;
581 #endif
582 pqh->qh->hlink = sqh->qh->hlink;
583 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
584 if (sc->sc_bulk_end == sqh)
585 sc->sc_bulk_end = pqh;
586 }
587
588 int
589 uhci_intr(p)
590 void *p;
591 {
592 uhci_softc_t *sc = p;
593 int status, ret;
594 uhci_intr_info_t *ii;
595
596 sc->sc_intrs++;
597 #if defined(USB_DEBUG)
598 if (uhcidebug > 9) {
599 DPRINTF(("uhci_intr %s, %p\n", sc->sc_bus.bdev.dv_xname, sc));
600 uhci_dumpregs(sc);
601 }
602 #endif
603 status = UREAD2(sc, UHCI_STS);
604 ret = 0;
605 if (status & UHCI_STS_USBINT) {
606 UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */
607 ret = 1;
608 }
609 if (status & UHCI_STS_USBEI) {
610 UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */
611 ret = 1;
612 }
613 if (status & UHCI_STS_RD) {
614 UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */
615 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname);
616 ret = 1;
617 }
618 if (status & UHCI_STS_HSE) {
619 UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */
620 printf("%s: Host System Error\n", sc->sc_bus.bdev.dv_xname);
621 ret = 1;
622 }
623 if (status & UHCI_STS_HCPE) {
624 UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */
625 printf("%s: Host System Error\n", sc->sc_bus.bdev.dv_xname);
626 ret = 1;
627 }
628 if (status & UHCI_STS_HCH) {
629 printf("%s: controller halted\n", sc->sc_bus.bdev.dv_xname);
630 }
631 if (!ret)
632 return 0;
633
634 /*
635 * Interrupts on UHCI really suck. When the host controller
636 * interrupts because a transfer is completed there is no
637 * way of knowing which transfer it was. You can scan down
638 * the TDs and QHs of the previous frame to limit the search,
639 * but that assumes that the interrupt was not delayed by more
640 * than 1 ms, which may not always be true (e.g. after debug
641 * output on a slow console).
642 * We scan all interrupt descriptors to see if any have
643 * completed.
644 */
645 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
646 uhci_check_intr(sc, ii);
647
648 DPRINTFN(10, ("uhci_intr: exit\n"));
649 return 1;
650 }
651
652 /* Check for an interrupt. */
653 void
654 uhci_check_intr(sc, ii)
655 uhci_softc_t *sc;
656 uhci_intr_info_t *ii;
657 {
658 struct uhci_pipe *upipe;
659 uhci_soft_td_t *std, *lstd;
660
661 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
662 #ifdef DIAGNOSTIC
663 if (!ii) {
664 printf("uhci_check_intr: no ii? %p\n", ii);
665 return;
666 }
667 #endif
668 if (!ii->stdstart)
669 return;
670 lstd = ii->stdend;
671 #ifdef DIAGNOSTIC
672 if (!lstd) {
673 printf("uhci_check_intr: std==0\n");
674 return;
675 }
676 #endif
677 /* If the last TD is still active the whole transfer probably is. */
678 if (lstd->td->td_status & UHCI_TD_ACTIVE) {
679 DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii));
680 for (std = ii->stdstart; std != lstd; std = std->td->link.std)
681 if (std->td->td_status & UHCI_TD_STALLED)
682 goto done;
683 DPRINTFN(15, ("uhci_check_intr: ii=%p still active\n", ii));
684 return;
685 }
686 done:
687 upipe = (struct uhci_pipe *)ii->reqh->pipe;
688 upipe->pipe.endpoint->toggle = upipe->newtoggle;
689 uhci_ii_done(ii, 0);
690 untimeout(uhci_timeout, ii);
691 }
692
693 void
694 uhci_ii_done(ii, timo)
695 uhci_intr_info_t *ii;
696 int timo;
697 {
698 usbd_request_handle reqh = ii->reqh;
699 uhci_soft_td_t *std;
700 u_int32_t tst;
701 int len, status;
702
703 DPRINTFN(10, ("uhci_ii_done: ii=%p ready %d\n", ii, timo));
704
705 #ifdef DIAGNOSTIC
706 {
707 int s = splhigh();
708 if (ii->isdone) {
709 printf("uhci_ii_done: is done!\n");
710 splx(s);
711 return;
712 }
713 ii->isdone = 1;
714 splx(s);
715 }
716 #endif
717
718 /* The transfer is done, compute length and status. */
719 for (len = status = 0, std = ii->stdstart;
720 std != 0;
721 std = std->td->link.std) {
722 tst = std->td->td_status;
723 status |= tst;
724 #ifdef USB_DEBUG
725 if ((tst & UHCI_TD_ERROR) && uhcidebug) {
726 printf("uhci_intr: intr error TD:\n");
727 uhci_dump_td(std);
728 }
729 #endif
730 if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP)
731 len += UHCI_TD_GET_ACTLEN(tst);
732 }
733 status &= UHCI_TD_ERROR;
734 DPRINTFN(10, ("uhci_check_intr: len=%d, status=0x%x\n", len, status));
735 if (status != 0) {
736 DPRINTFN(-1+(status==UHCI_TD_STALLED),
737 ("uhci_intr: error, status 0x%b\n", (long)status,
738 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27STALLED\30ACTIVE"));
739 if (status == UHCI_TD_STALLED)
740 reqh->status = USBD_STALLED;
741 else
742 reqh->status = USBD_IOERROR; /* more info XXX */
743 reqh->actlen = 0;
744 } else {
745 reqh->status = USBD_NORMAL_COMPLETION;
746 reqh->actlen = len;
747 }
748 if (timo) {
749 /* We got a timeout. Make sure transaction is not active. */
750 reqh->status = USBD_TIMEOUT;
751 for (std = ii->stdstart; std != 0; std = std->td->link.std)
752 std->td->td_status &= ~UHCI_TD_ACTIVE;
753 /* XXX should we wait 1 ms */
754 }
755 DPRINTFN(5, ("uhci_intr: calling handler ii=%p\n", ii));
756
757 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
758 case UE_CONTROL:
759 uhci_ctrl_done(ii);
760 break;
761 case UE_ISOCHRONOUS:
762 printf("uhci_ii_done: ISO??\n");
763 break;
764 case UE_BULK:
765 uhci_bulk_done(ii);
766 break;
767 case UE_INTERRUPT:
768 uhci_intr_done(ii);
769 break;
770 }
771
772 /* And finally execute callback. */
773 reqh->xfercb(reqh);
774 }
775
776 void
777 uhci_timeout(addr)
778 void *addr;
779 {
780 uhci_intr_info_t *ii = addr;
781 int s;
782
783 DPRINTF(("uhci_timeout: ii=%p\n", ii));
784 s = splusb();
785 uhci_ii_done(ii, 1);
786 splx(s);
787 }
788
789 /*
790 * Wait here until controller claims to have an interrupt.
791 * Then call uhci_intr and return. Use timeout to avoid waiting
792 * too long.
793 */
794 void
795 uhci_waitintr(sc, reqh)
796 uhci_softc_t *sc;
797 usbd_request_handle reqh;
798 {
799 int timo = reqh->timeout;
800 int usecs;
801
802 reqh->status = USBD_IN_PROGRESS;
803 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
804 delay(1000);
805 DPRINTFN(10,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
806 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
807 uhci_intr(sc);
808 if (reqh->status != USBD_IN_PROGRESS)
809 return;
810 }
811 }
812 reqh->status = USBD_TIMEOUT;
813 reqh->xfercb(reqh);
814 }
815
816 void
817 uhci_poll(bus)
818 struct usbd_bus *bus;
819 {
820 uhci_softc_t *sc = (uhci_softc_t *)bus;
821
822 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
823 uhci_intr(sc);
824 }
825
826 #if 0
827 void
828 uhci_reset(p)
829 void *p;
830 {
831 uhci_softc_t *sc = p;
832 int n;
833
834 UHCICMD(sc, UHCI_CMD_HCRESET);
835 /* The reset bit goes low when the controller is done. */
836 for (n = 0; n < UHCI_RESET_TIMEOUT &&
837 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
838 delay(100);
839 if (n >= UHCI_RESET_TIMEOUT)
840 printf("%s: controller did not reset\n", sc->sc_bus.bdev.dv_xname);
841 }
842 #endif
843
844 void
845 uhci_run(sc, run)
846 uhci_softc_t *sc;
847 int run;
848 {
849 int s, n, running;
850
851 run = run != 0;
852 s = splusb(); /* XXX really? */
853 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
854 if (run == running) {
855 splx(s);
856 return;
857 }
858 UWRITE2(sc, UHCI_CMD, run ? UHCI_CMD_RS : 0);
859 for(n = 0; n < 100; n++) {
860 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
861 /* return when we've entered the state we want */
862 if (run == running) {
863 splx(s);
864 return;
865 }
866 }
867 splx(s);
868 printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname, run ? "start" : "stop");
869 }
870
871 /*
872 * Memory management routines.
873 * uhci_alloc_std allocates TDs
874 * uhci_alloc_sqh allocates QHs
875 * These two routines do their own free list management,
876 * partly for speed, partly because allocating DMAable memory
877 * has page size granularaity so much memory would be wasted if
878 * only one TD/QH (32 bytes) was placed in each alloacted chunk.
879 */
880
881 uhci_soft_td_t *
882 uhci_alloc_std(sc)
883 uhci_softc_t *sc;
884 {
885 uhci_soft_td_t *std;
886 usbd_status r;
887 int i;
888 usb_dma_t dma;
889
890 if (!sc->sc_freetds) {
891 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
892 std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK,
893 M_USBDEV, M_NOWAIT);
894 if (!std)
895 return 0;
896 r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK,
897 UHCI_TD_ALIGN, &dma);
898 if (r != USBD_NORMAL_COMPLETION) {
899 free(std, M_USBDEV);
900 return 0;
901 }
902 for(i = 0; i < UHCI_TD_CHUNK; i++, std++) {
903 std->physaddr = DMAADDR(&dma) +
904 i * UHCI_TD_SIZE;
905 std->td = (uhci_td_t *)
906 ((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE);
907 std->td->link.std = sc->sc_freetds;
908 sc->sc_freetds = std;
909 }
910 }
911 std = sc->sc_freetds;
912 sc->sc_freetds = std->td->link.std;
913 memset(std->td, 0, UHCI_TD_SIZE);
914 return std;
915 }
916
917 void
918 uhci_free_std(sc, std)
919 uhci_softc_t *sc;
920 uhci_soft_td_t *std;
921 {
922 #ifdef DIAGNOSTIC
923 #define TD_IS_FREE 0x12345678
924 if (std->td->td_token == TD_IS_FREE) {
925 printf("uhci_free_std: freeing free TD %p\n", std);
926 return;
927 }
928 std->td->td_token = TD_IS_FREE;
929 #endif
930 std->td->link.std = sc->sc_freetds;
931 sc->sc_freetds = std;
932 }
933
934 uhci_soft_qh_t *
935 uhci_alloc_sqh(sc)
936 uhci_softc_t *sc;
937 {
938 uhci_soft_qh_t *sqh;
939 usbd_status r;
940 int i, offs;
941 usb_dma_t dma;
942
943 if (!sc->sc_freeqhs) {
944 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
945 sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK,
946 M_USBDEV, M_NOWAIT);
947 if (!sqh)
948 return 0;
949 r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK,
950 UHCI_QH_ALIGN, &dma);
951 if (r != USBD_NORMAL_COMPLETION) {
952 free(sqh, M_USBDEV);
953 return 0;
954 }
955 for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) {
956 offs = i * UHCI_QH_SIZE;
957 sqh->physaddr = DMAADDR(&dma) + offs;
958 sqh->qh = (uhci_qh_t *)
959 ((char *)KERNADDR(&dma) + offs);
960 sqh->qh->hlink = sc->sc_freeqhs;
961 sc->sc_freeqhs = sqh;
962 }
963 }
964 sqh = sc->sc_freeqhs;
965 sc->sc_freeqhs = sqh->qh->hlink;
966 memset(sqh->qh, 0, UHCI_QH_SIZE);
967 return sqh;
968 }
969
970 void
971 uhci_free_sqh(sc, sqh)
972 uhci_softc_t *sc;
973 uhci_soft_qh_t *sqh;
974 {
975 sqh->qh->hlink = sc->sc_freeqhs;
976 sc->sc_freeqhs = sqh;
977 }
978
979 /*
980 * Enter a list of transfers onto a control queue.
981 * Called at splusb()
982 */
983 void
984 uhci_enter_ctl_q(sc, sqh, ii)
985 uhci_softc_t *sc;
986 uhci_soft_qh_t *sqh;
987 uhci_intr_info_t *ii;
988 {
989 DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh));
990
991 }
992
993 void
994 uhci_free_std_chain(sc, std, stdend)
995 uhci_softc_t *sc;
996 uhci_soft_td_t *std;
997 uhci_soft_td_t *stdend;
998 {
999 uhci_soft_td_t *p;
1000
1001 for (; std != stdend; std = p) {
1002 p = std->td->link.std;
1003 uhci_free_std(sc, std);
1004 }
1005 }
1006
1007 usbd_status
1008 uhci_alloc_std_chain(upipe, sc, len, rd, dma, sp, ep)
1009 struct uhci_pipe *upipe;
1010 uhci_softc_t *sc;
1011 int len, rd;
1012 usb_dma_t *dma;
1013 uhci_soft_td_t **sp, **ep;
1014 {
1015 uhci_soft_td_t *p, *lastp;
1016 uhci_physaddr_t lastlink;
1017 u_int32_t ls;
1018 int i, ntd, l, tog, maxp;
1019 int addr = upipe->pipe.device->address;
1020 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1021
1022 DPRINTFN(15, ("uhci_alloc_std_chain: len=%d\n", len));
1023 if (len == 0) {
1024 *sp = *ep = 0;
1025 printf("uhci_alloc_std_chain: len=0\n");
1026 return (USBD_NORMAL_COMPLETION);
1027 }
1028 ls = upipe->pipe.device->lowspeed ? UHCI_TD_LS : 0;
1029 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1030 if (maxp == 0) {
1031 printf("uhci_alloc_std_chain: maxp=0\n");
1032 return (USBD_INVAL);
1033 }
1034 ntd = (len + maxp - 1) / maxp;
1035 tog = upipe->pipe.endpoint->toggle;
1036 if (ntd % 2 == 0)
1037 tog ^= 1;
1038 upipe->newtoggle = tog ^ 1;
1039 lastp = 0;
1040 lastlink = UHCI_PTR_T;
1041 ntd--;
1042 for (i = ntd; i >= 0; i--) {
1043 p = uhci_alloc_std(sc);
1044 if (!p) {
1045 uhci_free_std_chain(sc, lastp, 0);
1046 return (USBD_NOMEM);
1047 }
1048 p->td->link.std = lastp;
1049 p->td->td_link = lastlink;
1050 lastp = p;
1051 lastlink = p->physaddr;
1052 p->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
1053 if (i == ntd) {
1054 /* last TD */
1055 l = len % maxp;
1056 if (l == 0) l = maxp;
1057 *ep = p;
1058 } else
1059 l = maxp;
1060 p->td->td_token =
1061 rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1062 UHCI_TD_OUT(l, endpt, addr, tog);
1063 p->td->td_buffer = DMAADDR(dma) + i * maxp;
1064 tog ^= 1;
1065 }
1066 *sp = lastp;
1067 /*upipe->pipe.endpoint->toggle = tog;*/
1068 DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d newtog=%d\n",
1069 upipe->pipe.endpoint->toggle, upipe->newtoggle));
1070 return (USBD_NORMAL_COMPLETION);
1071 }
1072
1073 usbd_status
1074 uhci_device_bulk_transfer(reqh)
1075 usbd_request_handle reqh;
1076 {
1077 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1078 usbd_device_handle dev = upipe->pipe.device;
1079 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1080 uhci_intr_info_t *ii = upipe->iinfo;
1081 uhci_soft_td_t *xfer, *xferend;
1082 uhci_soft_qh_t *sqh;
1083 usb_dma_t *dmap;
1084 usbd_status r;
1085 int len, isread;
1086 int s;
1087
1088 DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d flags=%d\n",
1089 reqh, reqh->buffer, reqh->length, reqh->flags));
1090
1091 if (reqh->isreq)
1092 panic("uhci_device_bulk_transfer: a request\n");
1093
1094 len = reqh->length;
1095 dmap = &upipe->u.bulk.datadma;
1096 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
1097 sqh = upipe->u.bulk.sqh;
1098
1099 upipe->u.bulk.isread = isread;
1100 upipe->u.bulk.length = len;
1101
1102 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1103 if (r != USBD_NORMAL_COMPLETION)
1104 goto ret1;
1105 r = uhci_alloc_std_chain(upipe, sc, len, isread,
1106 dmap, &xfer, &xferend);
1107 if (r != USBD_NORMAL_COMPLETION)
1108 goto ret2;
1109 xferend->td->td_status |= UHCI_TD_IOC;
1110
1111 if (!isread && len != 0)
1112 memcpy(KERNADDR(dmap), reqh->buffer, len);
1113
1114 #ifdef USB_DEBUG
1115 if (uhcidebug > 10) {
1116 printf("uhci_device_bulk_transfer: xfer(1)\n");
1117 uhci_dump_tds(xfer);
1118 }
1119 #endif
1120
1121 /* Set up interrupt info. */
1122 ii->reqh = reqh;
1123 ii->stdstart = xfer;
1124 ii->stdend = xferend;
1125 #ifdef DIAGNOSTIC
1126 ii->isdone = 0;
1127 #endif
1128
1129 sqh->qh->elink = xfer;
1130 sqh->qh->qh_elink = xfer->physaddr;
1131 sqh->intr_info = ii;
1132
1133 s = splusb();
1134 uhci_add_bulk(sc, sqh);
1135 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1136
1137 if (reqh->timeout && !sc->sc_bus.use_polling)
1138 timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout));
1139 splx(s);
1140
1141 #ifdef USB_DEBUG
1142 if (uhcidebug > 10) {
1143 printf("uhci_device_bulk_transfer: xfer(2)\n");
1144 uhci_dump_tds(xfer);
1145 }
1146 #endif
1147
1148 return (USBD_IN_PROGRESS);
1149
1150 ret2:
1151 if (len != 0)
1152 usb_freemem(sc->sc_dmatag, dmap);
1153 ret1:
1154 return (r);
1155 }
1156
1157 /* Abort a device bulk request. */
1158 void
1159 uhci_device_bulk_abort(reqh)
1160 usbd_request_handle reqh;
1161 {
1162 /* XXX inactivate */
1163 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is finished */
1164 /* XXX call done */
1165 }
1166
1167 /* Close a device bulk pipe. */
1168 void
1169 uhci_device_bulk_close(pipe)
1170 usbd_pipe_handle pipe;
1171 {
1172 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1173 usbd_device_handle dev = upipe->pipe.device;
1174 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1175
1176 uhci_free_sqh(sc, upipe->u.bulk.sqh);
1177 uhci_free_intr_info(upipe->iinfo);
1178 /* XXX free other resources */
1179 }
1180
1181 usbd_status
1182 uhci_device_ctrl_transfer(reqh)
1183 usbd_request_handle reqh;
1184 {
1185 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1186 usbd_status r;
1187
1188 if (!reqh->isreq)
1189 panic("uhci_device_ctrl_transfer: not a request\n");
1190
1191 r = uhci_device_request(reqh);
1192 if (r != USBD_NORMAL_COMPLETION)
1193 return (r);
1194
1195 if (sc->sc_bus.use_polling)
1196 uhci_waitintr(sc, reqh);
1197 return (USBD_IN_PROGRESS);
1198 }
1199
1200 usbd_status
1201 uhci_device_intr_transfer(reqh)
1202 usbd_request_handle reqh;
1203 {
1204 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1205 usbd_device_handle dev = upipe->pipe.device;
1206 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1207 uhci_intr_info_t *ii = upipe->iinfo;
1208 uhci_soft_td_t *xfer, *xferend;
1209 uhci_soft_qh_t *sqh;
1210 usb_dma_t *dmap;
1211 usbd_status r;
1212 int len, i;
1213 int s;
1214
1215 DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d flags=%d\n",
1216 reqh, reqh->buffer, reqh->length, reqh->flags));
1217
1218 if (reqh->isreq)
1219 panic("uhci_device_intr_transfer: a request\n");
1220
1221 len = reqh->length;
1222 dmap = &upipe->u.intr.datadma;
1223 if (len == 0)
1224 return (USBD_INVAL); /* XXX should it be? */
1225
1226 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1227 if (r != USBD_NORMAL_COMPLETION)
1228 goto ret1;
1229 r = uhci_alloc_std_chain(upipe, sc, len, 1, dmap, &xfer, &xferend);
1230 if (r != USBD_NORMAL_COMPLETION)
1231 goto ret2;
1232 xferend->td->td_status |= UHCI_TD_IOC;
1233
1234 #ifdef USB_DEBUG
1235 if (uhcidebug > 10) {
1236 printf("uhci_device_intr_transfer: xfer(1)\n");
1237 uhci_dump_tds(xfer);
1238 uhci_dump_qh(upipe->u.intr.qhs[0]);
1239 }
1240 #endif
1241
1242 s = splusb();
1243 /* Set up interrupt info. */
1244 ii->reqh = reqh;
1245 ii->stdstart = xfer;
1246 ii->stdend = xferend;
1247 #ifdef DIAGNOSTIC
1248 ii->isdone = 0;
1249 #endif
1250
1251 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", upipe->u.intr.qhs[0]));
1252 for (i = 0; i < upipe->u.intr.npoll; i++) {
1253 sqh = upipe->u.intr.qhs[i];
1254 sqh->qh->elink = xfer;
1255 sqh->qh->qh_elink = xfer->physaddr;
1256 }
1257 splx(s);
1258
1259 #ifdef USB_DEBUG
1260 if (uhcidebug > 10) {
1261 printf("uhci_device_intr_transfer: xfer(2)\n");
1262 uhci_dump_tds(xfer);
1263 uhci_dump_qh(upipe->u.intr.qhs[0]);
1264 }
1265 #endif
1266
1267 return (USBD_IN_PROGRESS);
1268
1269 ret2:
1270 if (len != 0)
1271 usb_freemem(sc->sc_dmatag, dmap);
1272 ret1:
1273 return (r);
1274 }
1275
1276 /* Abort a device control request. */
1277 void
1278 uhci_device_ctrl_abort(reqh)
1279 usbd_request_handle reqh;
1280 {
1281 /* XXX inactivate */
1282 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is finished */
1283 /* XXX call done */
1284 }
1285
1286 /* Close a device control pipe. */
1287 void
1288 uhci_device_ctrl_close(pipe)
1289 usbd_pipe_handle pipe;
1290 {
1291 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1292
1293 uhci_free_intr_info(upipe->iinfo);
1294 /* XXX free other resources */
1295 }
1296
1297 /* Abort a device interrupt request. */
1298 void
1299 uhci_device_intr_abort(reqh)
1300 usbd_request_handle reqh;
1301 {
1302 struct uhci_pipe *upipe;
1303
1304 DPRINTFN(1, ("uhci_device_intr_abort: reqh=%p\n", reqh));
1305 /* XXX inactivate */
1306 usbd_delay_ms(reqh->pipe->device->bus, 2); /* make sure it is finished */
1307 if (reqh->pipe->intrreqh == reqh) {
1308 DPRINTF(("uhci_device_intr_abort: remove\n"));
1309 reqh->pipe->intrreqh = 0;
1310 upipe = (struct uhci_pipe *)reqh->pipe;
1311 uhci_intr_done(upipe->u.intr.qhs[0]->intr_info);
1312 }
1313 }
1314
1315 /* Close a device interrupt pipe. */
1316 void
1317 uhci_device_intr_close(pipe)
1318 usbd_pipe_handle pipe;
1319 {
1320 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1321 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1322 int i, s, npoll;
1323
1324 upipe->iinfo->stdstart = 0; /* inactive */
1325
1326 /* Unlink descriptors from controller data structures. */
1327 npoll = upipe->u.intr.npoll;
1328 uhci_lock_frames(sc);
1329 for (i = 0; i < npoll; i++)
1330 uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos,
1331 upipe->u.intr.qhs[i]);
1332 uhci_unlock_frames(sc);
1333
1334 /*
1335 * We now have to wait for any activity on the physical
1336 * descriptors to stop.
1337 */
1338 usbd_delay_ms(&sc->sc_bus, 2);
1339
1340 for(i = 0; i < npoll; i++)
1341 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
1342 free(upipe->u.intr.qhs, M_USB);
1343
1344 s = splusb();
1345 LIST_REMOVE(upipe->iinfo, list); /* remove from active list */
1346 splx(s);
1347 uhci_free_intr_info(upipe->iinfo);
1348
1349 /* XXX free other resources */
1350 }
1351
1352 usbd_status
1353 uhci_device_request(reqh)
1354 usbd_request_handle reqh;
1355 {
1356 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1357 usb_device_request_t *req = &reqh->request;
1358 usbd_device_handle dev = upipe->pipe.device;
1359 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1360 int addr = dev->address;
1361 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1362 uhci_intr_info_t *ii = upipe->iinfo;
1363 uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend;
1364 uhci_soft_qh_t *sqh;
1365 usb_dma_t *dmap;
1366 int len;
1367 u_int32_t ls;
1368 usbd_status r;
1369 int isread;
1370 int s;
1371
1372 DPRINTFN(1,("uhci_device_control type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1373 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1374 UGETW(req->wIndex), UGETW(req->wLength),
1375 addr, endpt));
1376
1377 ls = dev->lowspeed ? UHCI_TD_LS : 0;
1378 isread = req->bmRequestType & UT_READ;
1379 len = UGETW(req->wLength);
1380
1381 setup = upipe->u.ctl.setup;
1382 stat = upipe->u.ctl.stat;
1383 sqh = upipe->u.ctl.sqh;
1384 dmap = &upipe->u.ctl.datadma;
1385
1386 /* Set up data transaction */
1387 if (len != 0) {
1388 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1389 if (r != USBD_NORMAL_COMPLETION)
1390 goto ret1;
1391 upipe->pipe.endpoint->toggle = 1;
1392 r = uhci_alloc_std_chain(upipe, sc, len, isread,
1393 dmap, &xfer, &xferend);
1394 if (r != USBD_NORMAL_COMPLETION)
1395 goto ret2;
1396 next = xfer;
1397 xferend->td->link.std = stat;
1398 xferend->td->td_link = stat->physaddr;
1399 } else {
1400 xfer = 0;
1401 next = stat;
1402 }
1403 upipe->u.ctl.length = len;
1404 upipe->u.ctl.xferend = xferend;
1405
1406 memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
1407 if (!isread && len != 0)
1408 memcpy(KERNADDR(dmap), reqh->buffer, len);
1409
1410 setup->td->link.std = next;
1411 setup->td->td_link = next->physaddr;
1412 setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
1413 setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr);
1414 setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma);
1415
1416 stat->td->link.std = 0;
1417 stat->td->td_link = UHCI_PTR_T;
1418 stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls |
1419 UHCI_TD_ACTIVE | UHCI_TD_IOC;
1420 stat->td->td_token =
1421 isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
1422 UHCI_TD_IN (0, endpt, addr, 1);
1423 stat->td->td_buffer = 0;
1424
1425 #ifdef USB_DEBUG
1426 if (uhcidebug > 20) {
1427 printf("uhci_device_request: setup\n");
1428 uhci_dump_td(setup);
1429 printf("uhci_device_request: stat\n");
1430 uhci_dump_td(stat);
1431 }
1432 #endif
1433
1434 /* Set up interrupt info. */
1435 ii->reqh = reqh;
1436 ii->stdstart = setup;
1437 ii->stdend = stat;
1438 #ifdef DIAGNOSTIC
1439 ii->isdone = 0;
1440 #endif
1441
1442 sqh->qh->elink = setup;
1443 sqh->qh->qh_elink = setup->physaddr;
1444 sqh->intr_info = ii;
1445
1446 s = splusb();
1447 uhci_add_ctrl(sc, sqh);
1448 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1449 #ifdef USB_DEBUG
1450 if (uhcidebug > 12) {
1451 uhci_soft_td_t *std;
1452 uhci_soft_qh_t *xqh;
1453 uhci_physaddr_t link;
1454 printf("uhci_enter_ctl_q: follow from [0]\n");
1455 for (std = sc->sc_vframes[0].htd, link = 0;
1456 (link & UHCI_PTR_Q) == 0;
1457 std = std->td->link.std) {
1458 link = std->td->td_link;
1459 uhci_dump_td(std);
1460 }
1461 for (xqh = (uhci_soft_qh_t *)std;
1462 xqh;
1463 xqh = xqh->qh->hlink)
1464 uhci_dump_qh(xqh);
1465 printf("Enqueued QH:\n");
1466 uhci_dump_qh(sqh);
1467 uhci_dump_tds(sqh->qh->elink);
1468 }
1469 #endif
1470 if (reqh->timeout && !sc->sc_bus.use_polling)
1471 timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout));
1472 splx(s);
1473
1474 return (USBD_NORMAL_COMPLETION);
1475
1476 ret2:
1477 if (len != 0)
1478 usb_freemem(sc->sc_dmatag, dmap);
1479 ret1:
1480 return (r);
1481 }
1482
1483 void
1484 uhci_intr_done(ii)
1485 uhci_intr_info_t *ii;
1486 {
1487 uhci_softc_t *sc = ii->sc;
1488 usbd_request_handle reqh = ii->reqh;
1489 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1490 usb_dma_t *dma;
1491 uhci_soft_qh_t *sqh;
1492 int i, npoll;
1493
1494 DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen));
1495
1496 dma = &upipe->u.intr.datadma;
1497 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
1498 npoll = upipe->u.intr.npoll;
1499 for(i = 0; i < npoll; i++) {
1500 sqh = upipe->u.intr.qhs[i];
1501 sqh->qh->elink = 0;
1502 sqh->qh->qh_elink = UHCI_PTR_T;
1503 }
1504 uhci_free_std_chain(sc, ii->stdstart, 0);
1505
1506 /* XXX Wasteful. */
1507 if (reqh->pipe->intrreqh == reqh) {
1508 uhci_soft_td_t *xfer, *xferend;
1509
1510 /* This alloc cannot fail since we freed the chain above. */
1511 uhci_alloc_std_chain(upipe, sc, reqh->length, 1, dma,
1512 &xfer, &xferend);
1513 xferend->td->td_status |= UHCI_TD_IOC;
1514
1515 #ifdef USB_DEBUG
1516 if (uhcidebug > 10) {
1517 printf("uhci_device_intr_done: xfer(1)\n");
1518 uhci_dump_tds(xfer);
1519 uhci_dump_qh(upipe->u.intr.qhs[0]);
1520 }
1521 #endif
1522
1523 ii->stdstart = xfer;
1524 ii->stdend = xferend;
1525 #ifdef DIAGNOSTIC
1526 ii->isdone = 0;
1527 #endif
1528 for (i = 0; i < npoll; i++) {
1529 sqh = upipe->u.intr.qhs[i];
1530 sqh->qh->elink = xfer;
1531 sqh->qh->qh_elink = xfer->physaddr;
1532 }
1533 } else {
1534 usb_freemem(sc->sc_dmatag, dma);
1535 ii->stdstart = 0; /* mark as inactive */
1536 }
1537 }
1538
1539 /* Deallocate request data structures */
1540 void
1541 uhci_ctrl_done(ii)
1542 uhci_intr_info_t *ii;
1543 {
1544 uhci_softc_t *sc = ii->sc;
1545 usbd_request_handle reqh = ii->reqh;
1546 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1547 u_int len = upipe->u.ctl.length;
1548 usb_dma_t *dma;
1549 uhci_td_t *htd = ii->stdstart->td;
1550
1551 #ifdef DIAGNOSTIC
1552 if (!reqh->isreq)
1553 panic("uhci_ctrl_done: not a request\n");
1554 #endif
1555
1556 LIST_REMOVE(ii, list); /* remove from active list */
1557
1558 uhci_remove_ctrl(sc, upipe->u.ctl.sqh);
1559
1560 if (len != 0) {
1561 dma = &upipe->u.ctl.datadma;
1562 if (reqh->request.bmRequestType & UT_READ)
1563 memcpy(reqh->buffer, KERNADDR(dma), len);
1564 uhci_free_std_chain(sc, htd->link.std, ii->stdend);
1565 usb_freemem(sc->sc_dmatag, dma);
1566 }
1567 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen));
1568 }
1569
1570 /* Deallocate request data structures */
1571 void
1572 uhci_bulk_done(ii)
1573 uhci_intr_info_t *ii;
1574 {
1575 uhci_softc_t *sc = ii->sc;
1576 usbd_request_handle reqh = ii->reqh;
1577 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1578 u_int len = upipe->u.bulk.length;
1579 usb_dma_t *dma;
1580 uhci_td_t *htd = ii->stdstart->td;
1581
1582 LIST_REMOVE(ii, list); /* remove from active list */
1583
1584 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
1585
1586 if (len != 0) {
1587 dma = &upipe->u.bulk.datadma;
1588 if (upipe->u.bulk.isread && len != 0)
1589 memcpy(reqh->buffer, KERNADDR(dma), len);
1590 uhci_free_std_chain(sc, htd->link.std, 0);
1591 usb_freemem(sc->sc_dmatag, dma);
1592 }
1593 DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen));
1594 /* XXX compute new toggle */
1595 }
1596
1597 /* Add interrupt QH, called with vflock. */
1598 void
1599 uhci_add_intr(sc, n, sqh)
1600 uhci_softc_t *sc;
1601 int n;
1602 uhci_soft_qh_t *sqh;
1603 {
1604 struct uhci_vframe *vf = &sc->sc_vframes[n];
1605 uhci_qh_t *eqh;
1606
1607 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh));
1608 eqh = vf->eqh->qh;
1609 sqh->qh->hlink = eqh->hlink;
1610 sqh->qh->qh_hlink = eqh->qh_hlink;
1611 eqh->hlink = sqh;
1612 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
1613 vf->eqh = sqh;
1614 vf->bandwidth++;
1615 }
1616
1617 /* Remove interrupt QH, called with vflock. */
1618 void
1619 uhci_remove_intr(sc, n, sqh)
1620 uhci_softc_t *sc;
1621 int n;
1622 uhci_soft_qh_t *sqh;
1623 {
1624 struct uhci_vframe *vf = &sc->sc_vframes[n];
1625 uhci_soft_qh_t *pqh;
1626
1627 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh));
1628
1629 for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink)
1630 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
1631 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
1632 printf("uhci_remove_intr: QH not found\n");
1633 return;
1634 }
1635 #else
1636 ;
1637 #endif
1638 pqh->qh->hlink = sqh->qh->hlink;
1639 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
1640 if (vf->eqh == sqh)
1641 vf->eqh = pqh;
1642 vf->bandwidth--;
1643 }
1644
1645 usbd_status
1646 uhci_device_setintr(sc, upipe, ival)
1647 uhci_softc_t *sc;
1648 struct uhci_pipe *upipe;
1649 int ival;
1650 {
1651 uhci_soft_qh_t *sqh;
1652 int i, npoll, s;
1653 u_int bestbw, bw, bestoffs, offs;
1654
1655 DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
1656 if (ival == 0) {
1657 printf("uhci_setintr: 0 interval\n");
1658 return (USBD_INVAL);
1659 }
1660
1661 if (ival > UHCI_VFRAMELIST_COUNT)
1662 ival = UHCI_VFRAMELIST_COUNT;
1663 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
1664 DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
1665
1666 upipe->u.intr.npoll = npoll;
1667 upipe->u.intr.qhs =
1668 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USB, M_WAITOK);
1669
1670 /*
1671 * Figure out which offset in the schedule that has most
1672 * bandwidth left over.
1673 */
1674 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
1675 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
1676 for (bw = i = 0; i < npoll; i++)
1677 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
1678 if (bw < bestbw) {
1679 bestbw = bw;
1680 bestoffs = offs;
1681 }
1682 }
1683 DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
1684
1685 upipe->iinfo->stdstart = 0;
1686 for(i = 0; i < npoll; i++) {
1687 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
1688 sqh->qh->elink = 0;
1689 sqh->qh->qh_elink = UHCI_PTR_T;
1690 sqh->pos = MOD(i * ival + bestoffs);
1691 sqh->intr_info = upipe->iinfo;
1692 }
1693 #undef MOD
1694
1695 s = splusb();
1696 LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list);
1697 splx(s);
1698
1699 uhci_lock_frames(sc);
1700 /* Enter QHs into the controller data structures. */
1701 for(i = 0; i < npoll; i++)
1702 uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos,
1703 upipe->u.intr.qhs[i]);
1704 uhci_unlock_frames(sc);
1705
1706 DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
1707 return (USBD_NORMAL_COMPLETION);
1708 }
1709
1710 /* Open a new pipe. */
1711 usbd_status
1712 uhci_open(pipe)
1713 usbd_pipe_handle pipe;
1714 {
1715 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1716 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1717 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1718 usbd_status r;
1719
1720 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1721 pipe, pipe->device->address,
1722 ed->bEndpointAddress, sc->sc_addr));
1723 if (pipe->device->address == sc->sc_addr) {
1724 switch (ed->bEndpointAddress) {
1725 case USB_CONTROL_ENDPOINT:
1726 pipe->methods = &uhci_root_ctrl_methods;
1727 break;
1728 case UE_IN | UHCI_INTR_ENDPT:
1729 pipe->methods = &uhci_root_intr_methods;
1730 break;
1731 default:
1732 return (USBD_INVAL);
1733 }
1734 } else {
1735 upipe->iinfo = uhci_alloc_intr_info(sc);
1736 if (upipe->iinfo == 0)
1737 return (USBD_NOMEM);
1738 switch (ed->bmAttributes & UE_XFERTYPE) {
1739 case UE_CONTROL:
1740 pipe->methods = &uhci_device_ctrl_methods;
1741 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
1742 if (upipe->u.ctl.sqh == 0)
1743 goto bad;
1744 upipe->u.ctl.setup = uhci_alloc_std(sc);
1745 if (upipe->u.ctl.setup == 0) {
1746 uhci_free_sqh(sc, upipe->u.ctl.sqh);
1747 goto bad;
1748 }
1749 upipe->u.ctl.stat = uhci_alloc_std(sc);
1750 if (upipe->u.ctl.stat == 0) {
1751 uhci_free_sqh(sc, upipe->u.ctl.sqh);
1752 uhci_free_std(sc, upipe->u.ctl.setup);
1753 goto bad;
1754 }
1755 r = usb_allocmem(sc->sc_dmatag,
1756 sizeof(usb_device_request_t),
1757 0, &upipe->u.ctl.reqdma);
1758 if (r != USBD_NORMAL_COMPLETION) {
1759 uhci_free_sqh(sc, upipe->u.ctl.sqh);
1760 uhci_free_std(sc, upipe->u.ctl.setup);
1761 uhci_free_std(sc, upipe->u.ctl.stat);
1762 goto bad;
1763 }
1764 break;
1765 case UE_INTERRUPT:
1766 pipe->methods = &uhci_device_intr_methods;
1767 return (uhci_device_setintr(sc, upipe, ed->bInterval));
1768 case UE_ISOCHRONOUS:
1769 printf("uhci_open: iso not implemented\n");
1770 return (USBD_XXX);
1771 case UE_BULK:
1772 pipe->methods = &uhci_device_bulk_methods;
1773 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
1774 if (upipe->u.bulk.sqh == 0)
1775 goto bad;
1776 break;
1777 }
1778 }
1779 return (USBD_NORMAL_COMPLETION);
1780
1781 bad:
1782 uhci_free_intr_info(upipe->iinfo);
1783 return (USBD_NOMEM);
1784 }
1785
1786 /*
1787 * Data structures and routines to emulate the root hub.
1788 */
1789 usb_device_descriptor_t uhci_devd = {
1790 USB_DEVICE_DESCRIPTOR_SIZE,
1791 UDESC_DEVICE, /* type */
1792 {0x00, 0x01}, /* USB version */
1793 UCLASS_HUB, /* class */
1794 USUBCLASS_HUB, /* subclass */
1795 0, /* protocol */
1796 64, /* max packet */
1797 {0},{0},{0x00,0x01}, /* device id */
1798 1,2,0, /* string indicies */
1799 1 /* # of configurations */
1800 };
1801
1802 usb_config_descriptor_t uhci_confd = {
1803 USB_CONFIG_DESCRIPTOR_SIZE,
1804 UDESC_CONFIG,
1805 {USB_CONFIG_DESCRIPTOR_SIZE +
1806 USB_INTERFACE_DESCRIPTOR_SIZE +
1807 USB_ENDPOINT_DESCRIPTOR_SIZE},
1808 1,
1809 1,
1810 0,
1811 UC_SELF_POWERED,
1812 0 /* max power */
1813 };
1814
1815 usb_interface_descriptor_t uhci_ifcd = {
1816 USB_INTERFACE_DESCRIPTOR_SIZE,
1817 UDESC_INTERFACE,
1818 0,
1819 0,
1820 1,
1821 UCLASS_HUB,
1822 USUBCLASS_HUB,
1823 0,
1824 0
1825 };
1826
1827 usb_endpoint_descriptor_t uhci_endpd = {
1828 USB_ENDPOINT_DESCRIPTOR_SIZE,
1829 UDESC_ENDPOINT,
1830 UE_IN | UHCI_INTR_ENDPT,
1831 UE_INTERRUPT,
1832 {8},
1833 255
1834 };
1835
1836 usb_hub_descriptor_t uhci_hubd_piix = {
1837 USB_HUB_DESCRIPTOR_SIZE,
1838 UDESC_HUB,
1839 2,
1840 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
1841 50, /* power on to power good */
1842 0,
1843 { 0x00 }, /* both ports are removable */
1844 { 0x00 }, /* no ports can power down individually */
1845 };
1846
1847 int
1848 uhci_str(p, l, s)
1849 usb_string_descriptor_t *p;
1850 int l;
1851 char *s;
1852 {
1853 int i;
1854
1855 if (l == 0)
1856 return (0);
1857 p->bLength = 2 * strlen(s) + 2;
1858 if (l == 1)
1859 return (1);
1860 p->bDescriptorType = UDESC_STRING;
1861 l -= 2;
1862 for (i = 0; s[i] && l > 1; i++, l -= 2)
1863 USETW2(p->bString[i], 0, s[i]);
1864 return (2*i+2);
1865 }
1866
1867 /*
1868 * Simulate a hardware hub by handling all the necessary requests.
1869 */
1870 usbd_status
1871 uhci_root_ctrl_transfer(reqh)
1872 usbd_request_handle reqh;
1873 {
1874 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1875 usb_device_request_t *req;
1876 void *buf;
1877 int port, x;
1878 int len, value, index, status, change, l, totlen = 0;
1879 usb_port_status_t ps;
1880 usbd_status r;
1881
1882 if (!reqh->isreq)
1883 panic("uhci_root_ctrl_transfer: not a request\n");
1884 req = &reqh->request;
1885 buf = reqh->buffer;
1886
1887 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
1888 req->bmRequestType, req->bRequest));
1889
1890 len = UGETW(req->wLength);
1891 value = UGETW(req->wValue);
1892 index = UGETW(req->wIndex);
1893 #define C(x,y) ((x) | ((y) << 8))
1894 switch(C(req->bRequest, req->bmRequestType)) {
1895 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1896 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1897 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1898 /*
1899 * DEVICE_REMOTE_WAKEUP and ENDPOINT_STALL are no-ops
1900 * for the integrated root hub.
1901 */
1902 break;
1903 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1904 if (len > 0) {
1905 *(u_int8_t *)buf = sc->sc_conf;
1906 totlen = 1;
1907 }
1908 break;
1909 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1910 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
1911 switch(value >> 8) {
1912 case UDESC_DEVICE:
1913 if ((value & 0xff) != 0) {
1914 r = USBD_IOERROR;
1915 goto ret;
1916 }
1917 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1918 memcpy(buf, &uhci_devd, l);
1919 break;
1920 case UDESC_CONFIG:
1921 if ((value & 0xff) != 0) {
1922 r = USBD_IOERROR;
1923 goto ret;
1924 }
1925 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1926 memcpy(buf, &uhci_confd, l);
1927 buf = (char *)buf + l;
1928 len -= l;
1929 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1930 totlen += l;
1931 memcpy(buf, &uhci_ifcd, l);
1932 buf = (char *)buf + l;
1933 len -= l;
1934 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1935 totlen += l;
1936 memcpy(buf, &uhci_endpd, l);
1937 break;
1938 case UDESC_STRING:
1939 if (len == 0)
1940 break;
1941 *(u_int8_t *)buf = 0;
1942 totlen = 1;
1943 switch (value & 0xff) {
1944 case 1: /* Vendor */
1945 totlen = uhci_str(buf, len, sc->sc_vendor);
1946 break;
1947 case 2: /* Product */
1948 totlen = uhci_str(buf, len, "UHCI root hub");
1949 break;
1950 }
1951 break;
1952 default:
1953 r = USBD_IOERROR;
1954 goto ret;
1955 }
1956 break;
1957 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1958 if (len > 0) {
1959 *(u_int8_t *)buf = 0;
1960 totlen = 1;
1961 }
1962 break;
1963 case C(UR_GET_STATUS, UT_READ_DEVICE):
1964 if (len > 1) {
1965 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1966 totlen = 2;
1967 }
1968 break;
1969 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1970 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1971 if (len > 1) {
1972 USETW(((usb_status_t *)buf)->wStatus, 0);
1973 totlen = 2;
1974 }
1975 break;
1976 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1977 if (value >= USB_MAX_DEVICES) {
1978 r = USBD_IOERROR;
1979 goto ret;
1980 }
1981 sc->sc_addr = value;
1982 break;
1983 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1984 if (value != 0 && value != 1) {
1985 r = USBD_IOERROR;
1986 goto ret;
1987 }
1988 sc->sc_conf = value;
1989 break;
1990 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1991 break;
1992 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1993 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1994 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1995 r = USBD_IOERROR;
1996 goto ret;
1997 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1998 break;
1999 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2000 break;
2001 /* Hub requests */
2002 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2003 break;
2004 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2005 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE port=%d feature=%d\n",
2006 index, value));
2007 if (index == 1)
2008 port = UHCI_PORTSC1;
2009 else if (index == 2)
2010 port = UHCI_PORTSC2;
2011 else {
2012 r = USBD_IOERROR;
2013 goto ret;
2014 }
2015 switch(value) {
2016 case UHF_PORT_ENABLE:
2017 x = UREAD2(sc, port);
2018 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
2019 break;
2020 case UHF_PORT_SUSPEND:
2021 x = UREAD2(sc, port);
2022 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
2023 break;
2024 case UHF_PORT_RESET:
2025 x = UREAD2(sc, port);
2026 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2027 break;
2028 case UHF_C_PORT_CONNECTION:
2029 x = UREAD2(sc, port);
2030 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
2031 break;
2032 case UHF_C_PORT_ENABLE:
2033 x = UREAD2(sc, port);
2034 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
2035 break;
2036 case UHF_C_PORT_OVER_CURRENT:
2037 x = UREAD2(sc, port);
2038 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
2039 break;
2040 case UHF_C_PORT_RESET:
2041 sc->sc_isreset = 0;
2042 r = USBD_NORMAL_COMPLETION;
2043 goto ret;
2044 case UHF_PORT_CONNECTION:
2045 case UHF_PORT_OVER_CURRENT:
2046 case UHF_PORT_POWER:
2047 case UHF_PORT_LOW_SPEED:
2048 case UHF_C_PORT_SUSPEND:
2049 default:
2050 r = USBD_IOERROR;
2051 goto ret;
2052 }
2053 break;
2054 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
2055 if (index == 1)
2056 port = UHCI_PORTSC1;
2057 else if (index == 2)
2058 port = UHCI_PORTSC2;
2059 else {
2060 r = USBD_IOERROR;
2061 goto ret;
2062 }
2063 if (len > 0) {
2064 *(u_int8_t *)buf =
2065 (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
2066 UHCI_PORTSC_LS_SHIFT;
2067 totlen = 1;
2068 }
2069 break;
2070 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2071 if (value != 0) {
2072 r = USBD_IOERROR;
2073 goto ret;
2074 }
2075 l = min(len, USB_HUB_DESCRIPTOR_SIZE);
2076 totlen = l;
2077 memcpy(buf, &uhci_hubd_piix, l);
2078 break;
2079 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2080 if (len != 4) {
2081 r = USBD_IOERROR;
2082 goto ret;
2083 }
2084 memset(buf, 0, len);
2085 totlen = len;
2086 break;
2087 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2088 if (index == 1)
2089 port = UHCI_PORTSC1;
2090 else if (index == 2)
2091 port = UHCI_PORTSC2;
2092 else {
2093 r = USBD_IOERROR;
2094 goto ret;
2095 }
2096 if (len != 4) {
2097 r = USBD_IOERROR;
2098 goto ret;
2099 }
2100 x = UREAD2(sc, port);
2101 status = change = 0;
2102 if (x & UHCI_PORTSC_CCS )
2103 status |= UPS_CURRENT_CONNECT_STATUS;
2104 if (x & UHCI_PORTSC_CSC )
2105 change |= UPS_C_CONNECT_STATUS;
2106 if (x & UHCI_PORTSC_PE )
2107 status |= UPS_PORT_ENABLED;
2108 if (x & UHCI_PORTSC_POEDC)
2109 change |= UPS_C_PORT_ENABLED;
2110 if (x & UHCI_PORTSC_OCI )
2111 status |= UPS_OVERCURRENT_INDICATOR;
2112 if (x & UHCI_PORTSC_OCIC )
2113 change |= UPS_C_OVERCURRENT_INDICATOR;
2114 if (x & UHCI_PORTSC_SUSP )
2115 status |= UPS_SUSPEND;
2116 if (x & UHCI_PORTSC_LSDA )
2117 status |= UPS_LOW_SPEED;
2118 status |= UPS_PORT_POWER;
2119 if (sc->sc_isreset)
2120 change |= UPS_C_PORT_RESET;
2121 USETW(ps.wPortStatus, status);
2122 USETW(ps.wPortChange, change);
2123 l = min(len, sizeof ps);
2124 memcpy(buf, &ps, l);
2125 totlen = l;
2126 break;
2127 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2128 r = USBD_IOERROR;
2129 goto ret;
2130 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2131 break;
2132 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2133 if (index == 1)
2134 port = UHCI_PORTSC1;
2135 else if (index == 2)
2136 port = UHCI_PORTSC2;
2137 else {
2138 r = USBD_IOERROR;
2139 goto ret;
2140 }
2141 switch(value) {
2142 case UHF_PORT_ENABLE:
2143 x = UREAD2(sc, port);
2144 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2145 break;
2146 case UHF_PORT_SUSPEND:
2147 x = UREAD2(sc, port);
2148 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
2149 break;
2150 case UHF_PORT_RESET:
2151 x = UREAD2(sc, port);
2152 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2153 usbd_delay_ms(&sc->sc_bus, 10);
2154 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2155 delay(100);
2156 x = UREAD2(sc, port);
2157 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2158 delay(100);
2159 DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
2160 index, UREAD2(sc, port)));
2161 sc->sc_isreset = 1;
2162 break;
2163 case UHF_C_PORT_CONNECTION:
2164 case UHF_C_PORT_ENABLE:
2165 case UHF_C_PORT_OVER_CURRENT:
2166 case UHF_PORT_CONNECTION:
2167 case UHF_PORT_OVER_CURRENT:
2168 case UHF_PORT_POWER:
2169 case UHF_PORT_LOW_SPEED:
2170 case UHF_C_PORT_SUSPEND:
2171 case UHF_C_PORT_RESET:
2172 default:
2173 r = USBD_IOERROR;
2174 goto ret;
2175 }
2176 break;
2177 default:
2178 r = USBD_IOERROR;
2179 goto ret;
2180 }
2181 reqh->actlen = totlen;
2182 r = USBD_NORMAL_COMPLETION;
2183 ret:
2184 reqh->status = r;
2185 reqh->xfercb(reqh);
2186 return (USBD_IN_PROGRESS);
2187 }
2188
2189 /* Abort a root control request. */
2190 void
2191 uhci_root_ctrl_abort(reqh)
2192 usbd_request_handle reqh;
2193 {
2194 /* Nothing to do, all transfers are syncronous. */
2195 }
2196
2197 /* Close the root pipe. */
2198 void
2199 uhci_root_ctrl_close(pipe)
2200 usbd_pipe_handle pipe;
2201 {
2202 untimeout(uhci_timo, pipe->intrreqh);
2203 DPRINTF(("uhci_root_ctrl_close\n"));
2204 }
2205
2206 /* Abort a root interrupt request. */
2207 void
2208 uhci_root_intr_abort(reqh)
2209 usbd_request_handle reqh;
2210 {
2211 untimeout(uhci_timo, reqh);
2212 }
2213
2214 /* Start a transfer on the root interrupt pipe */
2215 usbd_status
2216 uhci_root_intr_transfer(reqh)
2217 usbd_request_handle reqh;
2218 {
2219 usbd_pipe_handle pipe = reqh->pipe;
2220 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2221 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2222 usb_dma_t *dmap;
2223 usbd_status r;
2224 int len;
2225
2226 DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d flags=%d\n",
2227 reqh, reqh->buffer, reqh->length, reqh->flags));
2228
2229 len = reqh->length;
2230 dmap = &upipe->u.intr.datadma;
2231 if (len == 0)
2232 return (USBD_INVAL); /* XXX should it be? */
2233
2234 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2235 if (r != USBD_NORMAL_COMPLETION)
2236 return (r);
2237
2238 sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval);
2239 timeout(uhci_timo, reqh, sc->sc_ival);
2240 return (USBD_IN_PROGRESS);
2241 }
2242
2243 /* Close the root interrupt pipe. */
2244 void
2245 uhci_root_intr_close(pipe)
2246 usbd_pipe_handle pipe;
2247 {
2248 untimeout(uhci_timo, pipe->intrreqh);
2249 DPRINTF(("uhci_root_intr_close\n"));
2250 }
2251