uhci.c revision 1.11
1 /* $NetBSD: uhci.c,v 1.11 1998/11/25 22:32:04 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Universal Host Controller driver. 42 * Handles PIIX3 and PIIX4. 43 * 44 * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 45 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 46 * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf 47 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #include <sys/device.h> 55 #include <sys/proc.h> 56 #include <sys/queue.h> 57 #include <sys/select.h> 58 59 #include <machine/bus.h> 60 61 #include <dev/usb/usb.h> 62 #include <dev/usb/usbdi.h> 63 #include <dev/usb/usbdivar.h> 64 #include <dev/usb/usb_mem.h> 65 #include <dev/usb/usb_quirks.h> 66 67 #include <dev/usb/uhcireg.h> 68 #include <dev/usb/uhcivar.h> 69 70 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 71 72 struct uhci_pipe { 73 struct usbd_pipe pipe; 74 uhci_intr_info_t *iinfo; 75 int newtoggle; 76 /* Info needed for different pipe kinds. */ 77 union { 78 /* Control pipe */ 79 struct { 80 uhci_soft_qh_t *sqh; 81 usb_dma_t reqdma; 82 usb_dma_t datadma; 83 uhci_soft_td_t *setup, *stat, *xferend; 84 u_int length; 85 } ctl; 86 /* Interrupt pipe */ 87 struct { 88 usb_dma_t datadma; 89 int npoll; 90 uhci_soft_qh_t **qhs; 91 } intr; 92 /* Bulk pipe */ 93 struct { 94 uhci_soft_qh_t *sqh; 95 usb_dma_t datadma; 96 u_int length; 97 int isread; 98 } bulk; 99 } u; 100 }; 101 102 /* 103 * The uhci_intr_info free list can be global since they contain 104 * no dma specific data. The other free lists do. 105 */ 106 int uhci_global_init_done = 0; 107 LIST_HEAD(, uhci_intr_info) uhci_ii_free; 108 109 void uhci_busreset __P((uhci_softc_t *)); 110 void uhci_run __P((uhci_softc_t *, int run)); 111 uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *)); 112 void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *)); 113 uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *)); 114 void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *)); 115 uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *)); 116 void uhci_free_intr_info __P((uhci_intr_info_t *ii)); 117 void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *, 118 uhci_intr_info_t *)); 119 void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *)); 120 121 void uhci_free_std_chain __P((uhci_softc_t *, 122 uhci_soft_td_t *, uhci_soft_td_t *)); 123 usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *, 124 int, int, usb_dma_t *, 125 uhci_soft_td_t **, 126 uhci_soft_td_t **)); 127 void uhci_timo __P((void *)); 128 void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle)); 129 void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *)); 130 void uhci_ii_done __P((uhci_intr_info_t *, int)); 131 void uhci_timeout __P((void *)); 132 void uhci_wakeup_ctrl __P((void *, int, int, void *, int)); 133 void uhci_lock_frames __P((uhci_softc_t *)); 134 void uhci_unlock_frames __P((uhci_softc_t *)); 135 void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 136 void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 137 void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 138 void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 139 int uhci_str __P((usb_string_descriptor_t *, int, char *)); 140 141 void uhci_device_close __P((struct uhci_pipe *)); 142 143 void uhci_wakeup_cb __P((usbd_request_handle reqh)); 144 145 usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle)); 146 void uhci_device_ctrl_abort __P((usbd_request_handle)); 147 void uhci_device_ctrl_close __P((usbd_pipe_handle)); 148 usbd_status uhci_device_intr_transfer __P((usbd_request_handle)); 149 void uhci_device_intr_abort __P((usbd_request_handle)); 150 void uhci_device_intr_close __P((usbd_pipe_handle)); 151 usbd_status uhci_device_bulk_transfer __P((usbd_request_handle)); 152 void uhci_device_bulk_abort __P((usbd_request_handle)); 153 void uhci_device_bulk_close __P((usbd_pipe_handle)); 154 155 usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle)); 156 void uhci_root_ctrl_abort __P((usbd_request_handle)); 157 void uhci_root_ctrl_close __P((usbd_pipe_handle)); 158 usbd_status uhci_root_intr_transfer __P((usbd_request_handle)); 159 void uhci_root_intr_abort __P((usbd_request_handle)); 160 void uhci_root_intr_close __P((usbd_pipe_handle)); 161 162 usbd_status uhci_open __P((usbd_pipe_handle)); 163 void uhci_poll __P((struct usbd_bus *)); 164 165 usbd_status uhci_device_request __P((usbd_request_handle reqh)); 166 void uhci_ctrl_done __P((uhci_intr_info_t *ii)); 167 void uhci_bulk_done __P((uhci_intr_info_t *ii)); 168 169 void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 170 void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 171 usbd_status uhci_device_setintr __P((uhci_softc_t *sc, 172 struct uhci_pipe *pipe, int ival)); 173 void uhci_intr_done __P((uhci_intr_info_t *ii)); 174 175 #ifdef USB_DEBUG 176 static void uhci_dumpregs __P((uhci_softc_t *)); 177 void uhci_dump_tds __P((uhci_soft_td_t *)); 178 void uhci_dump_qh __P((uhci_soft_qh_t *)); 179 void uhci_dump __P((void)); 180 void uhci_dump_td __P((uhci_soft_td_t *)); 181 #endif 182 183 #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)) 184 #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 185 #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 186 #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 187 188 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 189 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 190 191 #define UHCI_RESET_TIMEOUT 100 /* reset timeout */ 192 #define UHCI_CTRL_TIMEOUT 500 /* control transaction timeout */ 193 #define UHCI_ISO_DELAY 50 /* delay of start of iso */ 194 195 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 196 197 #define UHCI_INTR_ENDPT 1 198 199 struct usbd_methods uhci_root_ctrl_methods = { 200 uhci_root_ctrl_transfer, 201 uhci_root_ctrl_abort, 202 uhci_root_ctrl_close, 203 0, 204 }; 205 206 struct usbd_methods uhci_root_intr_methods = { 207 uhci_root_intr_transfer, 208 uhci_root_intr_abort, 209 uhci_root_intr_close, 210 0, 211 }; 212 213 struct usbd_methods uhci_device_ctrl_methods = { 214 uhci_device_ctrl_transfer, 215 uhci_device_ctrl_abort, 216 uhci_device_ctrl_close, 217 0, 218 }; 219 220 struct usbd_methods uhci_device_intr_methods = { 221 uhci_device_intr_transfer, 222 uhci_device_intr_abort, 223 uhci_device_intr_close, 224 0, 225 }; 226 227 struct usbd_methods uhci_device_bulk_methods = { 228 uhci_device_bulk_transfer, 229 uhci_device_bulk_abort, 230 uhci_device_bulk_close, 231 0, 232 }; 233 234 void 235 uhci_busreset(sc) 236 uhci_softc_t *sc; 237 { 238 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 239 usbd_delay_ms(&sc->sc_bus, USB_RESET_DELAY); /* wait at least 10ms */ 240 UHCICMD(sc, 0); /* do nothing */ 241 } 242 243 usbd_status 244 uhci_init(sc) 245 uhci_softc_t *sc; 246 { 247 usbd_status r; 248 int i, j; 249 uhci_soft_qh_t *csqh, *bsqh, *sqh; 250 uhci_soft_td_t *std; 251 usb_dma_t dma; 252 253 DPRINTFN(1,("uhci_init: start\n")); 254 255 if (!uhci_global_init_done) { 256 uhci_global_init_done = 1; 257 LIST_INIT(&uhci_ii_free); 258 } 259 260 #if defined(USB_DEBUG) 261 if (uhcidebug > 2) 262 uhci_dumpregs(sc); 263 #endif 264 265 uhci_run(sc, 0); /* stop the controller */ 266 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 267 268 /* Allocate and initialize real frame array. */ 269 r = usb_allocmem(sc->sc_dmatag, 270 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 271 UHCI_FRAMELIST_ALIGN, &dma); 272 if (r != USBD_NORMAL_COMPLETION) 273 return (r); 274 sc->sc_pframes = KERNADDR(&dma); 275 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 276 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&dma)); /* set frame list */ 277 278 uhci_busreset(sc); 279 280 /* Allocate the dummy QH where bulk traffic will be queued. */ 281 bsqh = uhci_alloc_sqh(sc); 282 if (!bsqh) 283 return (USBD_NOMEM); 284 bsqh->qh->qh_hlink = UHCI_PTR_T; /* end of QH chain */ 285 bsqh->qh->qh_elink = UHCI_PTR_T; 286 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 287 288 /* Allocate the dummy QH where control traffic will be queued. */ 289 csqh = uhci_alloc_sqh(sc); 290 if (!csqh) 291 return (USBD_NOMEM); 292 csqh->qh->hlink = bsqh; 293 csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q; 294 csqh->qh->qh_elink = UHCI_PTR_T; 295 sc->sc_ctl_start = sc->sc_ctl_end = csqh; 296 297 /* 298 * Make all (virtual) frame list pointers point to the interrupt 299 * queue heads and the interrupt queue heads at the control 300 * queue head and point the physical frame list to the virtual. 301 */ 302 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 303 std = uhci_alloc_std(sc); 304 sqh = uhci_alloc_sqh(sc); 305 if (!std || !sqh) 306 return (ENOMEM); 307 std->td->link.sqh = sqh; 308 std->td->td_link = sqh->physaddr | UHCI_PTR_Q; 309 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */ 310 std->td->td_token = 0; 311 std->td->td_buffer = 0; 312 sqh->qh->hlink = csqh; 313 sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q; 314 sqh->qh->elink = 0; 315 sqh->qh->qh_elink = UHCI_PTR_T; 316 sc->sc_vframes[i].htd = std; 317 sc->sc_vframes[i].etd = std; 318 sc->sc_vframes[i].hqh = sqh; 319 sc->sc_vframes[i].eqh = sqh; 320 for (j = i; 321 j < UHCI_FRAMELIST_COUNT; 322 j += UHCI_VFRAMELIST_COUNT) 323 sc->sc_pframes[j] = std->physaddr; 324 } 325 326 LIST_INIT(&sc->sc_intrhead); 327 328 /* Set up the bus struct. */ 329 sc->sc_bus.open_pipe = uhci_open; 330 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 331 sc->sc_bus.do_poll = uhci_poll; 332 333 DPRINTFN(1,("uhci_init: enabling\n")); 334 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 335 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 336 337 uhci_run(sc, 1); /* and here we go... */ 338 return (USBD_NORMAL_COMPLETION); 339 } 340 341 #ifdef USB_DEBUG 342 static void 343 uhci_dumpregs(sc) 344 uhci_softc_t *sc; 345 { 346 printf("%s: regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 347 sc->sc_bus.bdev.dv_xname, 348 UREAD2(sc, UHCI_CMD), 349 UREAD2(sc, UHCI_STS), 350 UREAD2(sc, UHCI_INTR), 351 UREAD2(sc, UHCI_FRNUM), 352 UREAD2(sc, UHCI_FLBASEADDR), 353 UREAD2(sc, UHCI_SOF), 354 UREAD2(sc, UHCI_PORTSC1), 355 UREAD2(sc, UHCI_PORTSC2)); 356 } 357 358 int uhci_longtd = 1; 359 360 void 361 uhci_dump_td(p) 362 uhci_soft_td_t *p; 363 { 364 printf("TD(%p) at %08lx = 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", 365 p, (long)p->physaddr, 366 (long)p->td->td_link, 367 (long)p->td->td_status, 368 (long)p->td->td_token, 369 (long)p->td->td_buffer); 370 if (uhci_longtd) 371 printf(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,D=%d,maxlen=%d\n", 372 (long)p->td->td_link, 373 "\20\1T\2Q\3VF", 374 (long)p->td->td_status, 375 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 376 UHCI_TD_GET_ERRCNT(p->td->td_status), 377 UHCI_TD_GET_ACTLEN(p->td->td_status), 378 UHCI_TD_GET_PID(p->td->td_token), 379 UHCI_TD_GET_DEVADDR(p->td->td_token), 380 UHCI_TD_GET_ENDPT(p->td->td_token), 381 UHCI_TD_GET_DT(p->td->td_token), 382 UHCI_TD_GET_MAXLEN(p->td->td_token)); 383 384 } 385 386 void 387 uhci_dump_qh(p) 388 uhci_soft_qh_t *p; 389 { 390 printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr, 391 p->qh->qh_hlink, p->qh->qh_elink); 392 } 393 394 #if 0 395 void 396 uhci_dump() 397 { 398 uhci_softc_t *sc = uhci; 399 400 uhci_dumpregs(sc); 401 printf("intrs=%d\n", sc->sc_intrs); 402 printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link); 403 uhci_dump_qh(sc->sc_ctl_start->qh->hlink); 404 } 405 #endif 406 407 void 408 uhci_dump_tds(std) 409 uhci_soft_td_t *std; 410 { 411 uhci_soft_td_t *p; 412 413 for(p = std; p; p = p->td->link.std) 414 uhci_dump_td(p); 415 } 416 #endif 417 418 /* 419 * This routine is executed periodically and simulates interrupts 420 * from the root controller interrupt pipe for port status change. 421 */ 422 void 423 uhci_timo(addr) 424 void *addr; 425 { 426 usbd_request_handle reqh = addr; 427 usbd_pipe_handle pipe = reqh->pipe; 428 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 429 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 430 int s; 431 u_char *p; 432 433 DPRINTFN(15, ("uhci_timo\n")); 434 435 p = KERNADDR(&upipe->u.intr.datadma); 436 p[0] = 0; 437 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 438 p[0] |= 1<<1; 439 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 440 p[0] |= 1<<2; 441 if (p[0] != 0) { 442 reqh->actlen = 1; 443 reqh->status = USBD_NORMAL_COMPLETION; 444 s = splusb(); 445 reqh->xfercb(reqh); 446 splx(s); 447 } 448 if (reqh->pipe->intrreqh == reqh) { 449 timeout(uhci_timo, addr, sc->sc_ival); 450 } else { 451 usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma); 452 } 453 } 454 455 456 void 457 uhci_lock_frames(sc) 458 uhci_softc_t *sc; 459 { 460 int s = splusb(); 461 while (sc->sc_vflock) { 462 sc->sc_vflock |= UHCI_WANT_LOCK; 463 tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0); 464 } 465 sc->sc_vflock = UHCI_HAS_LOCK; 466 splx(s); 467 } 468 469 void 470 uhci_unlock_frames(sc) 471 uhci_softc_t *sc; 472 { 473 int s = splusb(); 474 sc->sc_vflock &= ~UHCI_HAS_LOCK; 475 if (sc->sc_vflock & UHCI_WANT_LOCK) 476 wakeup(&sc->sc_vflock); 477 splx(s); 478 } 479 480 /* 481 * Allocate an interrupt information struct. A free list is kept 482 * for fast allocation. 483 */ 484 uhci_intr_info_t * 485 uhci_alloc_intr_info(sc) 486 uhci_softc_t *sc; 487 { 488 uhci_intr_info_t *ii; 489 490 ii = LIST_FIRST(&uhci_ii_free); 491 if (ii) 492 LIST_REMOVE(ii, list); 493 else { 494 ii = malloc(sizeof(uhci_intr_info_t), M_USBDEV, M_NOWAIT); 495 } 496 ii->sc = sc; 497 return ii; 498 } 499 500 void 501 uhci_free_intr_info(ii) 502 uhci_intr_info_t *ii; 503 { 504 LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */ 505 } 506 507 /* Add control QH, called at splusb(). */ 508 void 509 uhci_add_ctrl(sc, sqh) 510 uhci_softc_t *sc; 511 uhci_soft_qh_t *sqh; 512 { 513 uhci_qh_t *eqh; 514 515 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 516 eqh = sc->sc_ctl_end->qh; 517 sqh->qh->hlink = eqh->hlink; 518 sqh->qh->qh_hlink = eqh->qh_hlink; 519 eqh->hlink = sqh; 520 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 521 sc->sc_ctl_end = sqh; 522 } 523 524 /* Remove control QH, called at splusb(). */ 525 void 526 uhci_remove_ctrl(sc, sqh) 527 uhci_softc_t *sc; 528 uhci_soft_qh_t *sqh; 529 { 530 uhci_soft_qh_t *pqh; 531 532 DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh)); 533 for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink) 534 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 535 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 536 printf("uhci_remove_ctrl: QH not found\n"); 537 return; 538 } 539 #else 540 ; 541 #endif 542 pqh->qh->hlink = sqh->qh->hlink; 543 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 544 if (sc->sc_ctl_end == sqh) 545 sc->sc_ctl_end = pqh; 546 } 547 548 /* Add bulk QH, called at splusb(). */ 549 void 550 uhci_add_bulk(sc, sqh) 551 uhci_softc_t *sc; 552 uhci_soft_qh_t *sqh; 553 { 554 uhci_qh_t *eqh; 555 556 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 557 eqh = sc->sc_bulk_end->qh; 558 sqh->qh->hlink = eqh->hlink; 559 sqh->qh->qh_hlink = eqh->qh_hlink; 560 eqh->hlink = sqh; 561 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 562 sc->sc_bulk_end = sqh; 563 } 564 565 /* Remove bulk QH, called at splusb(). */ 566 void 567 uhci_remove_bulk(sc, sqh) 568 uhci_softc_t *sc; 569 uhci_soft_qh_t *sqh; 570 { 571 uhci_soft_qh_t *pqh; 572 573 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 574 for (pqh = sc->sc_bulk_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink) 575 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 576 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 577 printf("uhci_remove_bulk: QH not found\n"); 578 return; 579 } 580 #else 581 ; 582 #endif 583 pqh->qh->hlink = sqh->qh->hlink; 584 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 585 if (sc->sc_bulk_end == sqh) 586 sc->sc_bulk_end = pqh; 587 } 588 589 int 590 uhci_intr(p) 591 void *p; 592 { 593 uhci_softc_t *sc = p; 594 int status, ret; 595 uhci_intr_info_t *ii; 596 597 sc->sc_intrs++; 598 #if defined(USB_DEBUG) 599 if (uhcidebug > 9) { 600 DPRINTF(("uhci_intr %s, %p\n", sc->sc_bus.bdev.dv_xname, sc)); 601 uhci_dumpregs(sc); 602 } 603 #endif 604 status = UREAD2(sc, UHCI_STS); 605 ret = 0; 606 if (status & UHCI_STS_USBINT) { 607 UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */ 608 ret = 1; 609 } 610 if (status & UHCI_STS_USBEI) { 611 UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */ 612 ret = 1; 613 } 614 if (status & UHCI_STS_RD) { 615 UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */ 616 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 617 ret = 1; 618 } 619 if (status & UHCI_STS_HSE) { 620 UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */ 621 printf("%s: Host System Error\n", sc->sc_bus.bdev.dv_xname); 622 ret = 1; 623 } 624 if (status & UHCI_STS_HCPE) { 625 UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */ 626 printf("%s: Host System Error\n", sc->sc_bus.bdev.dv_xname); 627 ret = 1; 628 } 629 if (status & UHCI_STS_HCH) { 630 printf("%s: controller halted\n", sc->sc_bus.bdev.dv_xname); 631 } 632 if (!ret) 633 return 0; 634 635 /* 636 * Interrupts on UHCI really suck. When the host controller 637 * interrupts because a transfer is completed there is no 638 * way of knowing which transfer it was. You can scan down 639 * the TDs and QHs of the previous frame to limit the search, 640 * but that assumes that the interrupt was not delayed by more 641 * than 1 ms, which may not always be true (e.g. after debug 642 * output on a slow console). 643 * We scan all interrupt descriptors to see if any have 644 * completed. 645 */ 646 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 647 uhci_check_intr(sc, ii); 648 649 DPRINTFN(10, ("uhci_intr: exit\n")); 650 return 1; 651 } 652 653 /* Check for an interrupt. */ 654 void 655 uhci_check_intr(sc, ii) 656 uhci_softc_t *sc; 657 uhci_intr_info_t *ii; 658 { 659 struct uhci_pipe *upipe; 660 uhci_soft_td_t *std, *lstd; 661 662 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 663 #ifdef DIAGNOSTIC 664 if (!ii) { 665 printf("uhci_check_intr: no ii? %p\n", ii); 666 return; 667 } 668 #endif 669 if (!ii->stdstart) 670 return; 671 lstd = ii->stdend; 672 #ifdef DIAGNOSTIC 673 if (!lstd) { 674 printf("uhci_check_intr: std==0\n"); 675 return; 676 } 677 #endif 678 /* If the last TD is still active the whole transfer probably is. */ 679 if (lstd->td->td_status & UHCI_TD_ACTIVE) { 680 DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii)); 681 for (std = ii->stdstart; std != lstd; std = std->td->link.std) 682 if (std->td->td_status & UHCI_TD_STALLED) 683 goto done; 684 DPRINTFN(15, ("uhci_check_intr: ii=%p still active\n", ii)); 685 return; 686 } 687 done: 688 upipe = (struct uhci_pipe *)ii->reqh->pipe; 689 upipe->pipe.endpoint->toggle = upipe->newtoggle; 690 uhci_ii_done(ii, 0); 691 untimeout(uhci_timeout, ii); 692 } 693 694 void 695 uhci_ii_done(ii, timo) 696 uhci_intr_info_t *ii; 697 int timo; 698 { 699 usbd_request_handle reqh = ii->reqh; 700 uhci_soft_td_t *std; 701 u_int32_t tst; 702 int len, status; 703 704 DPRINTFN(10, ("uhci_ii_done: ii=%p ready %d\n", ii, timo)); 705 706 #ifdef DIAGNOSTIC 707 { 708 int s = splhigh(); 709 if (ii->isdone) { 710 printf("uhci_ii_done: is done!\n"); 711 splx(s); 712 return; 713 } 714 ii->isdone = 1; 715 splx(s); 716 } 717 #endif 718 719 /* The transfer is done, compute length and status. */ 720 for (len = status = 0, std = ii->stdstart; 721 std != 0; 722 std = std->td->link.std) { 723 tst = std->td->td_status; 724 status |= tst; 725 #ifdef USB_DEBUG 726 if ((tst & UHCI_TD_ERROR) && uhcidebug) { 727 printf("uhci_intr: intr error TD:\n"); 728 uhci_dump_td(std); 729 } 730 #endif 731 if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP) 732 len += UHCI_TD_GET_ACTLEN(tst); 733 } 734 status &= UHCI_TD_ERROR; 735 DPRINTFN(10, ("uhci_check_intr: len=%d, status=0x%x\n", len, status)); 736 if (status != 0) { 737 DPRINTFN(-1+(status==UHCI_TD_STALLED), 738 ("uhci_intr: error, status 0x%b\n", (long)status, 739 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27STALLED\30ACTIVE")); 740 if (status == UHCI_TD_STALLED) 741 reqh->status = USBD_STALLED; 742 else 743 reqh->status = USBD_IOERROR; /* more info XXX */ 744 reqh->actlen = 0; 745 } else { 746 reqh->status = USBD_NORMAL_COMPLETION; 747 reqh->actlen = len; 748 } 749 if (timo) { 750 /* We got a timeout. Make sure transaction is not active. */ 751 reqh->status = USBD_TIMEOUT; 752 for (std = ii->stdstart; std != 0; std = std->td->link.std) 753 std->td->td_status &= ~UHCI_TD_ACTIVE; 754 /* XXX should we wait 1 ms */ 755 } 756 DPRINTFN(5, ("uhci_intr: calling handler ii=%p\n", ii)); 757 758 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) { 759 case UE_CONTROL: 760 uhci_ctrl_done(ii); 761 break; 762 case UE_ISOCHRONOUS: 763 printf("uhci_ii_done: ISO??\n"); 764 break; 765 case UE_BULK: 766 uhci_bulk_done(ii); 767 break; 768 case UE_INTERRUPT: 769 uhci_intr_done(ii); 770 break; 771 } 772 773 /* And finally execute callback. */ 774 reqh->xfercb(reqh); 775 } 776 777 void 778 uhci_timeout(addr) 779 void *addr; 780 { 781 uhci_intr_info_t *ii = addr; 782 int s; 783 784 DPRINTF(("uhci_timeout: ii=%p\n", ii)); 785 s = splusb(); 786 uhci_ii_done(ii, 1); 787 splx(s); 788 } 789 790 /* 791 * Wait here until controller claims to have an interrupt. 792 * Then call uhci_intr and return. Use timeout to avoid waiting 793 * too long. 794 */ 795 void 796 uhci_waitintr(sc, reqh) 797 uhci_softc_t *sc; 798 usbd_request_handle reqh; 799 { 800 int timo = reqh->timeout; 801 int usecs; 802 803 reqh->status = USBD_IN_PROGRESS; 804 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 805 delay(1000); 806 DPRINTFN(10,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 807 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 808 uhci_intr(sc); 809 if (reqh->status != USBD_IN_PROGRESS) 810 return; 811 } 812 } 813 reqh->status = USBD_TIMEOUT; 814 reqh->xfercb(reqh); 815 } 816 817 void 818 uhci_poll(bus) 819 struct usbd_bus *bus; 820 { 821 uhci_softc_t *sc = (uhci_softc_t *)bus; 822 823 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 824 uhci_intr(sc); 825 } 826 827 #if 0 828 void 829 uhci_reset(p) 830 void *p; 831 { 832 uhci_softc_t *sc = p; 833 int n; 834 835 UHCICMD(sc, UHCI_CMD_HCRESET); 836 /* The reset bit goes low when the controller is done. */ 837 for (n = 0; n < UHCI_RESET_TIMEOUT && 838 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 839 delay(100); 840 if (n >= UHCI_RESET_TIMEOUT) 841 printf("%s: controller did not reset\n", sc->sc_bus.bdev.dv_xname); 842 } 843 #endif 844 845 void 846 uhci_run(sc, run) 847 uhci_softc_t *sc; 848 int run; 849 { 850 int s, n, running; 851 852 run = run != 0; 853 s = splusb(); /* XXX really? */ 854 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 855 if (run == running) { 856 splx(s); 857 return; 858 } 859 UWRITE2(sc, UHCI_CMD, run ? UHCI_CMD_RS : 0); 860 for(n = 0; n < 100; n++) { 861 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 862 /* return when we've entered the state we want */ 863 if (run == running) { 864 splx(s); 865 return; 866 } 867 } 868 splx(s); 869 printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname, run ? "start" : "stop"); 870 } 871 872 /* 873 * Memory management routines. 874 * uhci_alloc_std allocates TDs 875 * uhci_alloc_sqh allocates QHs 876 * These two routines do their own free list management, 877 * partly for speed, partly because allocating DMAable memory 878 * has page size granularaity so much memory would be wasted if 879 * only one TD/QH (32 bytes) was placed in each alloacted chunk. 880 */ 881 882 uhci_soft_td_t * 883 uhci_alloc_std(sc) 884 uhci_softc_t *sc; 885 { 886 uhci_soft_td_t *std; 887 usbd_status r; 888 int i; 889 usb_dma_t dma; 890 891 if (!sc->sc_freetds) { 892 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 893 std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK, 894 M_USBDEV, M_NOWAIT); 895 if (!std) 896 return 0; 897 r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK, 898 UHCI_TD_ALIGN, &dma); 899 if (r != USBD_NORMAL_COMPLETION) { 900 free(std, M_USBDEV); 901 return 0; 902 } 903 for(i = 0; i < UHCI_TD_CHUNK; i++, std++) { 904 std->physaddr = DMAADDR(&dma) + 905 i * UHCI_TD_SIZE; 906 std->td = (uhci_td_t *) 907 ((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE); 908 std->td->link.std = sc->sc_freetds; 909 sc->sc_freetds = std; 910 } 911 } 912 std = sc->sc_freetds; 913 sc->sc_freetds = std->td->link.std; 914 memset(std->td, 0, UHCI_TD_SIZE); 915 return std; 916 } 917 918 void 919 uhci_free_std(sc, std) 920 uhci_softc_t *sc; 921 uhci_soft_td_t *std; 922 { 923 #ifdef DIAGNOSTIC 924 #define TD_IS_FREE 0x12345678 925 if (std->td->td_token == TD_IS_FREE) { 926 printf("uhci_free_std: freeing free TD %p\n", std); 927 return; 928 } 929 std->td->td_token = TD_IS_FREE; 930 #endif 931 std->td->link.std = sc->sc_freetds; 932 sc->sc_freetds = std; 933 } 934 935 uhci_soft_qh_t * 936 uhci_alloc_sqh(sc) 937 uhci_softc_t *sc; 938 { 939 uhci_soft_qh_t *sqh; 940 usbd_status r; 941 int i, offs; 942 usb_dma_t dma; 943 944 if (!sc->sc_freeqhs) { 945 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 946 sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK, 947 M_USBDEV, M_NOWAIT); 948 if (!sqh) 949 return 0; 950 r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK, 951 UHCI_QH_ALIGN, &dma); 952 if (r != USBD_NORMAL_COMPLETION) { 953 free(sqh, M_USBDEV); 954 return 0; 955 } 956 for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) { 957 offs = i * UHCI_QH_SIZE; 958 sqh->physaddr = DMAADDR(&dma) + offs; 959 sqh->qh = (uhci_qh_t *) 960 ((char *)KERNADDR(&dma) + offs); 961 sqh->qh->hlink = sc->sc_freeqhs; 962 sc->sc_freeqhs = sqh; 963 } 964 } 965 sqh = sc->sc_freeqhs; 966 sc->sc_freeqhs = sqh->qh->hlink; 967 memset(sqh->qh, 0, UHCI_QH_SIZE); 968 return sqh; 969 } 970 971 void 972 uhci_free_sqh(sc, sqh) 973 uhci_softc_t *sc; 974 uhci_soft_qh_t *sqh; 975 { 976 sqh->qh->hlink = sc->sc_freeqhs; 977 sc->sc_freeqhs = sqh; 978 } 979 980 /* 981 * Enter a list of transfers onto a control queue. 982 * Called at splusb() 983 */ 984 void 985 uhci_enter_ctl_q(sc, sqh, ii) 986 uhci_softc_t *sc; 987 uhci_soft_qh_t *sqh; 988 uhci_intr_info_t *ii; 989 { 990 DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh)); 991 992 } 993 994 void 995 uhci_free_std_chain(sc, std, stdend) 996 uhci_softc_t *sc; 997 uhci_soft_td_t *std; 998 uhci_soft_td_t *stdend; 999 { 1000 uhci_soft_td_t *p; 1001 1002 for (; std != stdend; std = p) { 1003 p = std->td->link.std; 1004 uhci_free_std(sc, std); 1005 } 1006 } 1007 1008 usbd_status 1009 uhci_alloc_std_chain(upipe, sc, len, rd, dma, sp, ep) 1010 struct uhci_pipe *upipe; 1011 uhci_softc_t *sc; 1012 int len, rd; 1013 usb_dma_t *dma; 1014 uhci_soft_td_t **sp, **ep; 1015 { 1016 uhci_soft_td_t *p, *lastp; 1017 uhci_physaddr_t lastlink; 1018 u_int32_t ls; 1019 int i, ntd, l, tog, maxp; 1020 int addr = upipe->pipe.device->address; 1021 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1022 1023 DPRINTFN(15, ("uhci_alloc_std_chain: len=%d\n", len)); 1024 if (len == 0) { 1025 *sp = *ep = 0; 1026 printf("uhci_alloc_std_chain: len=0\n"); 1027 return (USBD_NORMAL_COMPLETION); 1028 } 1029 ls = upipe->pipe.device->lowspeed ? UHCI_TD_LS : 0; 1030 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1031 if (maxp == 0) { 1032 printf("uhci_alloc_std_chain: maxp=0\n"); 1033 return (USBD_INVAL); 1034 } 1035 ntd = (len + maxp - 1) / maxp; 1036 tog = upipe->pipe.endpoint->toggle; 1037 if (ntd % 2 == 0) 1038 tog ^= 1; 1039 upipe->newtoggle = tog ^ 1; 1040 lastp = 0; 1041 lastlink = UHCI_PTR_T; 1042 ntd--; 1043 for (i = ntd; i >= 0; i--) { 1044 p = uhci_alloc_std(sc); 1045 if (!p) { 1046 uhci_free_std_chain(sc, lastp, 0); 1047 return (USBD_NOMEM); 1048 } 1049 p->td->link.std = lastp; 1050 p->td->td_link = lastlink; 1051 lastp = p; 1052 lastlink = p->physaddr; 1053 p->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE; 1054 if (i == ntd) { 1055 /* last TD */ 1056 l = len % maxp; 1057 if (l == 0) l = maxp; 1058 *ep = p; 1059 } else 1060 l = maxp; 1061 p->td->td_token = 1062 rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1063 UHCI_TD_OUT(l, endpt, addr, tog); 1064 p->td->td_buffer = DMAADDR(dma) + i * maxp; 1065 tog ^= 1; 1066 } 1067 *sp = lastp; 1068 /*upipe->pipe.endpoint->toggle = tog;*/ 1069 DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d newtog=%d\n", 1070 upipe->pipe.endpoint->toggle, upipe->newtoggle)); 1071 return (USBD_NORMAL_COMPLETION); 1072 } 1073 1074 usbd_status 1075 uhci_device_bulk_transfer(reqh) 1076 usbd_request_handle reqh; 1077 { 1078 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1079 usbd_device_handle dev = upipe->pipe.device; 1080 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1081 uhci_intr_info_t *ii = upipe->iinfo; 1082 uhci_soft_td_t *xfer, *xferend; 1083 uhci_soft_qh_t *sqh; 1084 usb_dma_t *dmap; 1085 usbd_status r; 1086 int len, isread; 1087 int s; 1088 1089 DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d flags=%d\n", 1090 reqh, reqh->buffer, reqh->length, reqh->flags)); 1091 1092 if (reqh->isreq) 1093 panic("uhci_device_bulk_transfer: a request\n"); 1094 1095 len = reqh->length; 1096 dmap = &upipe->u.bulk.datadma; 1097 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 1098 sqh = upipe->u.bulk.sqh; 1099 1100 upipe->u.bulk.isread = isread; 1101 upipe->u.bulk.length = len; 1102 1103 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1104 if (r != USBD_NORMAL_COMPLETION) 1105 goto ret1; 1106 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1107 dmap, &xfer, &xferend); 1108 if (r != USBD_NORMAL_COMPLETION) 1109 goto ret2; 1110 xferend->td->td_status |= UHCI_TD_IOC; 1111 1112 if (!isread && len != 0) 1113 memcpy(KERNADDR(dmap), reqh->buffer, len); 1114 1115 #ifdef USB_DEBUG 1116 if (uhcidebug > 10) { 1117 printf("uhci_device_bulk_transfer: xfer(1)\n"); 1118 uhci_dump_tds(xfer); 1119 } 1120 #endif 1121 1122 /* Set up interrupt info. */ 1123 ii->reqh = reqh; 1124 ii->stdstart = xfer; 1125 ii->stdend = xferend; 1126 #ifdef DIAGNOSTIC 1127 ii->isdone = 0; 1128 #endif 1129 1130 sqh->qh->elink = xfer; 1131 sqh->qh->qh_elink = xfer->physaddr; 1132 sqh->intr_info = ii; 1133 1134 s = splusb(); 1135 uhci_add_bulk(sc, sqh); 1136 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1137 1138 if (reqh->timeout && !sc->sc_bus.use_polling) 1139 timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout)); 1140 splx(s); 1141 1142 #ifdef USB_DEBUG 1143 if (uhcidebug > 10) { 1144 printf("uhci_device_bulk_transfer: xfer(2)\n"); 1145 uhci_dump_tds(xfer); 1146 } 1147 #endif 1148 1149 return (USBD_IN_PROGRESS); 1150 1151 ret2: 1152 if (len != 0) 1153 usb_freemem(sc->sc_dmatag, dmap); 1154 ret1: 1155 return (r); 1156 } 1157 1158 /* Abort a device bulk request. */ 1159 void 1160 uhci_device_bulk_abort(reqh) 1161 usbd_request_handle reqh; 1162 { 1163 /* XXX inactivate */ 1164 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is finished */ 1165 /* XXX call done */ 1166 } 1167 1168 /* Close a device bulk pipe. */ 1169 void 1170 uhci_device_bulk_close(pipe) 1171 usbd_pipe_handle pipe; 1172 { 1173 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1174 usbd_device_handle dev = upipe->pipe.device; 1175 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1176 1177 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1178 uhci_free_intr_info(upipe->iinfo); 1179 /* XXX free other resources */ 1180 } 1181 1182 usbd_status 1183 uhci_device_ctrl_transfer(reqh) 1184 usbd_request_handle reqh; 1185 { 1186 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 1187 usbd_status r; 1188 1189 if (!reqh->isreq) 1190 panic("uhci_device_ctrl_transfer: not a request\n"); 1191 1192 r = uhci_device_request(reqh); 1193 if (r != USBD_NORMAL_COMPLETION) 1194 return (r); 1195 1196 if (sc->sc_bus.use_polling) 1197 uhci_waitintr(sc, reqh); 1198 return (USBD_IN_PROGRESS); 1199 } 1200 1201 usbd_status 1202 uhci_device_intr_transfer(reqh) 1203 usbd_request_handle reqh; 1204 { 1205 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1206 usbd_device_handle dev = upipe->pipe.device; 1207 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1208 uhci_intr_info_t *ii = upipe->iinfo; 1209 uhci_soft_td_t *xfer, *xferend; 1210 uhci_soft_qh_t *sqh; 1211 usb_dma_t *dmap; 1212 usbd_status r; 1213 int len, i; 1214 int s; 1215 1216 DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d flags=%d\n", 1217 reqh, reqh->buffer, reqh->length, reqh->flags)); 1218 1219 if (reqh->isreq) 1220 panic("uhci_device_intr_transfer: a request\n"); 1221 1222 len = reqh->length; 1223 dmap = &upipe->u.intr.datadma; 1224 if (len == 0) 1225 return (USBD_INVAL); /* XXX should it be? */ 1226 1227 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1228 if (r != USBD_NORMAL_COMPLETION) 1229 goto ret1; 1230 r = uhci_alloc_std_chain(upipe, sc, len, 1, dmap, &xfer, &xferend); 1231 if (r != USBD_NORMAL_COMPLETION) 1232 goto ret2; 1233 xferend->td->td_status |= UHCI_TD_IOC; 1234 1235 #ifdef USB_DEBUG 1236 if (uhcidebug > 10) { 1237 printf("uhci_device_intr_transfer: xfer(1)\n"); 1238 uhci_dump_tds(xfer); 1239 uhci_dump_qh(upipe->u.intr.qhs[0]); 1240 } 1241 #endif 1242 1243 s = splusb(); 1244 /* Set up interrupt info. */ 1245 ii->reqh = reqh; 1246 ii->stdstart = xfer; 1247 ii->stdend = xferend; 1248 #ifdef DIAGNOSTIC 1249 ii->isdone = 0; 1250 #endif 1251 1252 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", upipe->u.intr.qhs[0])); 1253 for (i = 0; i < upipe->u.intr.npoll; i++) { 1254 sqh = upipe->u.intr.qhs[i]; 1255 sqh->qh->elink = xfer; 1256 sqh->qh->qh_elink = xfer->physaddr; 1257 } 1258 splx(s); 1259 1260 #ifdef USB_DEBUG 1261 if (uhcidebug > 10) { 1262 printf("uhci_device_intr_transfer: xfer(2)\n"); 1263 uhci_dump_tds(xfer); 1264 uhci_dump_qh(upipe->u.intr.qhs[0]); 1265 } 1266 #endif 1267 1268 return (USBD_IN_PROGRESS); 1269 1270 ret2: 1271 if (len != 0) 1272 usb_freemem(sc->sc_dmatag, dmap); 1273 ret1: 1274 return (r); 1275 } 1276 1277 /* Abort a device control request. */ 1278 void 1279 uhci_device_ctrl_abort(reqh) 1280 usbd_request_handle reqh; 1281 { 1282 /* XXX inactivate */ 1283 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is finished */ 1284 /* XXX call done */ 1285 } 1286 1287 /* Close a device control pipe. */ 1288 void 1289 uhci_device_ctrl_close(pipe) 1290 usbd_pipe_handle pipe; 1291 { 1292 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1293 1294 uhci_free_intr_info(upipe->iinfo); 1295 /* XXX free other resources */ 1296 } 1297 1298 /* Abort a device interrupt request. */ 1299 void 1300 uhci_device_intr_abort(reqh) 1301 usbd_request_handle reqh; 1302 { 1303 struct uhci_pipe *upipe; 1304 1305 DPRINTFN(1, ("uhci_device_intr_abort: reqh=%p\n", reqh)); 1306 /* XXX inactivate */ 1307 usbd_delay_ms(reqh->pipe->device->bus, 2); /* make sure it is finished */ 1308 if (reqh->pipe->intrreqh == reqh) { 1309 DPRINTF(("uhci_device_intr_abort: remove\n")); 1310 reqh->pipe->intrreqh = 0; 1311 upipe = (struct uhci_pipe *)reqh->pipe; 1312 uhci_intr_done(upipe->u.intr.qhs[0]->intr_info); 1313 } 1314 } 1315 1316 /* Close a device interrupt pipe. */ 1317 void 1318 uhci_device_intr_close(pipe) 1319 usbd_pipe_handle pipe; 1320 { 1321 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1322 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 1323 int i, s, npoll; 1324 1325 upipe->iinfo->stdstart = 0; /* inactive */ 1326 1327 /* Unlink descriptors from controller data structures. */ 1328 npoll = upipe->u.intr.npoll; 1329 uhci_lock_frames(sc); 1330 for (i = 0; i < npoll; i++) 1331 uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos, 1332 upipe->u.intr.qhs[i]); 1333 uhci_unlock_frames(sc); 1334 1335 /* 1336 * We now have to wait for any activity on the physical 1337 * descriptors to stop. 1338 */ 1339 usbd_delay_ms(&sc->sc_bus, 2); 1340 1341 for(i = 0; i < npoll; i++) 1342 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 1343 free(upipe->u.intr.qhs, M_USB); 1344 1345 s = splusb(); 1346 LIST_REMOVE(upipe->iinfo, list); /* remove from active list */ 1347 splx(s); 1348 uhci_free_intr_info(upipe->iinfo); 1349 1350 /* XXX free other resources */ 1351 } 1352 1353 usbd_status 1354 uhci_device_request(reqh) 1355 usbd_request_handle reqh; 1356 { 1357 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1358 usb_device_request_t *req = &reqh->request; 1359 usbd_device_handle dev = upipe->pipe.device; 1360 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1361 int addr = dev->address; 1362 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1363 uhci_intr_info_t *ii = upipe->iinfo; 1364 uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend; 1365 uhci_soft_qh_t *sqh; 1366 usb_dma_t *dmap; 1367 int len; 1368 u_int32_t ls; 1369 usbd_status r; 1370 int isread; 1371 int s; 1372 1373 DPRINTFN(1,("uhci_device_control type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1374 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1375 UGETW(req->wIndex), UGETW(req->wLength), 1376 addr, endpt)); 1377 1378 ls = dev->lowspeed ? UHCI_TD_LS : 0; 1379 isread = req->bmRequestType & UT_READ; 1380 len = UGETW(req->wLength); 1381 1382 setup = upipe->u.ctl.setup; 1383 stat = upipe->u.ctl.stat; 1384 sqh = upipe->u.ctl.sqh; 1385 dmap = &upipe->u.ctl.datadma; 1386 1387 /* Set up data transaction */ 1388 if (len != 0) { 1389 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1390 if (r != USBD_NORMAL_COMPLETION) 1391 goto ret1; 1392 upipe->pipe.endpoint->toggle = 1; 1393 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1394 dmap, &xfer, &xferend); 1395 if (r != USBD_NORMAL_COMPLETION) 1396 goto ret2; 1397 next = xfer; 1398 xferend->td->link.std = stat; 1399 xferend->td->td_link = stat->physaddr; 1400 } else { 1401 xfer = 0; 1402 next = stat; 1403 } 1404 upipe->u.ctl.length = len; 1405 upipe->u.ctl.xferend = xferend; 1406 1407 memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req); 1408 if (!isread && len != 0) 1409 memcpy(KERNADDR(dmap), reqh->buffer, len); 1410 1411 setup->td->link.std = next; 1412 setup->td->td_link = next->physaddr; 1413 setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE; 1414 setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr); 1415 setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma); 1416 1417 stat->td->link.std = 0; 1418 stat->td->td_link = UHCI_PTR_T; 1419 stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | 1420 UHCI_TD_ACTIVE | UHCI_TD_IOC; 1421 stat->td->td_token = 1422 isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 1423 UHCI_TD_IN (0, endpt, addr, 1); 1424 stat->td->td_buffer = 0; 1425 1426 #ifdef USB_DEBUG 1427 if (uhcidebug > 20) { 1428 printf("uhci_device_request: setup\n"); 1429 uhci_dump_td(setup); 1430 printf("uhci_device_request: stat\n"); 1431 uhci_dump_td(stat); 1432 } 1433 #endif 1434 1435 /* Set up interrupt info. */ 1436 ii->reqh = reqh; 1437 ii->stdstart = setup; 1438 ii->stdend = stat; 1439 #ifdef DIAGNOSTIC 1440 ii->isdone = 0; 1441 #endif 1442 1443 sqh->qh->elink = setup; 1444 sqh->qh->qh_elink = setup->physaddr; 1445 sqh->intr_info = ii; 1446 1447 s = splusb(); 1448 uhci_add_ctrl(sc, sqh); 1449 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1450 #ifdef USB_DEBUG 1451 if (uhcidebug > 12) { 1452 uhci_soft_td_t *std; 1453 uhci_soft_qh_t *xqh; 1454 uhci_physaddr_t link; 1455 printf("uhci_enter_ctl_q: follow from [0]\n"); 1456 for (std = sc->sc_vframes[0].htd, link = 0; 1457 (link & UHCI_PTR_Q) == 0; 1458 std = std->td->link.std) { 1459 link = std->td->td_link; 1460 uhci_dump_td(std); 1461 } 1462 for (xqh = (uhci_soft_qh_t *)std; 1463 xqh; 1464 xqh = xqh->qh->hlink) 1465 uhci_dump_qh(xqh); 1466 printf("Enqueued QH:\n"); 1467 uhci_dump_qh(sqh); 1468 uhci_dump_tds(sqh->qh->elink); 1469 } 1470 #endif 1471 if (reqh->timeout && !sc->sc_bus.use_polling) 1472 timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout)); 1473 splx(s); 1474 1475 return (USBD_NORMAL_COMPLETION); 1476 1477 ret2: 1478 if (len != 0) 1479 usb_freemem(sc->sc_dmatag, dmap); 1480 ret1: 1481 return (r); 1482 } 1483 1484 void 1485 uhci_intr_done(ii) 1486 uhci_intr_info_t *ii; 1487 { 1488 uhci_softc_t *sc = ii->sc; 1489 usbd_request_handle reqh = ii->reqh; 1490 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1491 usb_dma_t *dma; 1492 uhci_soft_qh_t *sqh; 1493 int i, npoll; 1494 1495 DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen)); 1496 1497 dma = &upipe->u.intr.datadma; 1498 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 1499 npoll = upipe->u.intr.npoll; 1500 for(i = 0; i < npoll; i++) { 1501 sqh = upipe->u.intr.qhs[i]; 1502 sqh->qh->elink = 0; 1503 sqh->qh->qh_elink = UHCI_PTR_T; 1504 } 1505 uhci_free_std_chain(sc, ii->stdstart, 0); 1506 1507 /* XXX Wasteful. */ 1508 if (reqh->pipe->intrreqh == reqh) { 1509 uhci_soft_td_t *xfer, *xferend; 1510 1511 /* This alloc cannot fail since we freed the chain above. */ 1512 uhci_alloc_std_chain(upipe, sc, reqh->length, 1, dma, 1513 &xfer, &xferend); 1514 xferend->td->td_status |= UHCI_TD_IOC; 1515 1516 #ifdef USB_DEBUG 1517 if (uhcidebug > 10) { 1518 printf("uhci_device_intr_done: xfer(1)\n"); 1519 uhci_dump_tds(xfer); 1520 uhci_dump_qh(upipe->u.intr.qhs[0]); 1521 } 1522 #endif 1523 1524 ii->stdstart = xfer; 1525 ii->stdend = xferend; 1526 #ifdef DIAGNOSTIC 1527 ii->isdone = 0; 1528 #endif 1529 for (i = 0; i < npoll; i++) { 1530 sqh = upipe->u.intr.qhs[i]; 1531 sqh->qh->elink = xfer; 1532 sqh->qh->qh_elink = xfer->physaddr; 1533 } 1534 } else { 1535 usb_freemem(sc->sc_dmatag, dma); 1536 ii->stdstart = 0; /* mark as inactive */ 1537 } 1538 } 1539 1540 /* Deallocate request data structures */ 1541 void 1542 uhci_ctrl_done(ii) 1543 uhci_intr_info_t *ii; 1544 { 1545 uhci_softc_t *sc = ii->sc; 1546 usbd_request_handle reqh = ii->reqh; 1547 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1548 u_int len = upipe->u.ctl.length; 1549 usb_dma_t *dma; 1550 uhci_td_t *htd = ii->stdstart->td; 1551 1552 #ifdef DIAGNOSTIC 1553 if (!reqh->isreq) 1554 panic("uhci_ctrl_done: not a request\n"); 1555 #endif 1556 1557 LIST_REMOVE(ii, list); /* remove from active list */ 1558 1559 uhci_remove_ctrl(sc, upipe->u.ctl.sqh); 1560 1561 if (len != 0) { 1562 dma = &upipe->u.ctl.datadma; 1563 if (reqh->request.bmRequestType & UT_READ) 1564 memcpy(reqh->buffer, KERNADDR(dma), len); 1565 uhci_free_std_chain(sc, htd->link.std, ii->stdend); 1566 usb_freemem(sc->sc_dmatag, dma); 1567 } 1568 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen)); 1569 } 1570 1571 /* Deallocate request data structures */ 1572 void 1573 uhci_bulk_done(ii) 1574 uhci_intr_info_t *ii; 1575 { 1576 uhci_softc_t *sc = ii->sc; 1577 usbd_request_handle reqh = ii->reqh; 1578 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1579 u_int len = upipe->u.bulk.length; 1580 usb_dma_t *dma; 1581 uhci_td_t *htd = ii->stdstart->td; 1582 1583 LIST_REMOVE(ii, list); /* remove from active list */ 1584 1585 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 1586 1587 if (len != 0) { 1588 dma = &upipe->u.bulk.datadma; 1589 if (upipe->u.bulk.isread && len != 0) 1590 memcpy(reqh->buffer, KERNADDR(dma), len); 1591 uhci_free_std_chain(sc, htd->link.std, 0); 1592 usb_freemem(sc->sc_dmatag, dma); 1593 } 1594 DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen)); 1595 /* XXX compute new toggle */ 1596 } 1597 1598 /* Add interrupt QH, called with vflock. */ 1599 void 1600 uhci_add_intr(sc, n, sqh) 1601 uhci_softc_t *sc; 1602 int n; 1603 uhci_soft_qh_t *sqh; 1604 { 1605 struct uhci_vframe *vf = &sc->sc_vframes[n]; 1606 uhci_qh_t *eqh; 1607 1608 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh)); 1609 eqh = vf->eqh->qh; 1610 sqh->qh->hlink = eqh->hlink; 1611 sqh->qh->qh_hlink = eqh->qh_hlink; 1612 eqh->hlink = sqh; 1613 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 1614 vf->eqh = sqh; 1615 vf->bandwidth++; 1616 } 1617 1618 /* Remove interrupt QH, called with vflock. */ 1619 void 1620 uhci_remove_intr(sc, n, sqh) 1621 uhci_softc_t *sc; 1622 int n; 1623 uhci_soft_qh_t *sqh; 1624 { 1625 struct uhci_vframe *vf = &sc->sc_vframes[n]; 1626 uhci_soft_qh_t *pqh; 1627 1628 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh)); 1629 1630 for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink) 1631 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 1632 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 1633 printf("uhci_remove_intr: QH not found\n"); 1634 return; 1635 } 1636 #else 1637 ; 1638 #endif 1639 pqh->qh->hlink = sqh->qh->hlink; 1640 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 1641 if (vf->eqh == sqh) 1642 vf->eqh = pqh; 1643 vf->bandwidth--; 1644 } 1645 1646 usbd_status 1647 uhci_device_setintr(sc, upipe, ival) 1648 uhci_softc_t *sc; 1649 struct uhci_pipe *upipe; 1650 int ival; 1651 { 1652 uhci_soft_qh_t *sqh; 1653 int i, npoll, s; 1654 u_int bestbw, bw, bestoffs, offs; 1655 1656 DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe)); 1657 if (ival == 0) { 1658 printf("uhci_setintr: 0 interval\n"); 1659 return (USBD_INVAL); 1660 } 1661 1662 if (ival > UHCI_VFRAMELIST_COUNT) 1663 ival = UHCI_VFRAMELIST_COUNT; 1664 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 1665 DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll)); 1666 1667 upipe->u.intr.npoll = npoll; 1668 upipe->u.intr.qhs = 1669 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USB, M_WAITOK); 1670 1671 /* 1672 * Figure out which offset in the schedule that has most 1673 * bandwidth left over. 1674 */ 1675 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 1676 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 1677 for (bw = i = 0; i < npoll; i++) 1678 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 1679 if (bw < bestbw) { 1680 bestbw = bw; 1681 bestoffs = offs; 1682 } 1683 } 1684 DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 1685 1686 upipe->iinfo->stdstart = 0; 1687 for(i = 0; i < npoll; i++) { 1688 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 1689 sqh->qh->elink = 0; 1690 sqh->qh->qh_elink = UHCI_PTR_T; 1691 sqh->pos = MOD(i * ival + bestoffs); 1692 sqh->intr_info = upipe->iinfo; 1693 } 1694 #undef MOD 1695 1696 s = splusb(); 1697 LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list); 1698 splx(s); 1699 1700 uhci_lock_frames(sc); 1701 /* Enter QHs into the controller data structures. */ 1702 for(i = 0; i < npoll; i++) 1703 uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos, 1704 upipe->u.intr.qhs[i]); 1705 uhci_unlock_frames(sc); 1706 1707 DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe)); 1708 return (USBD_NORMAL_COMPLETION); 1709 } 1710 1711 /* Open a new pipe. */ 1712 usbd_status 1713 uhci_open(pipe) 1714 usbd_pipe_handle pipe; 1715 { 1716 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 1717 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1718 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1719 usbd_status r; 1720 1721 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1722 pipe, pipe->device->address, 1723 ed->bEndpointAddress, sc->sc_addr)); 1724 if (pipe->device->address == sc->sc_addr) { 1725 switch (ed->bEndpointAddress) { 1726 case USB_CONTROL_ENDPOINT: 1727 pipe->methods = &uhci_root_ctrl_methods; 1728 break; 1729 case UE_IN | UHCI_INTR_ENDPT: 1730 pipe->methods = &uhci_root_intr_methods; 1731 break; 1732 default: 1733 return (USBD_INVAL); 1734 } 1735 } else { 1736 upipe->iinfo = uhci_alloc_intr_info(sc); 1737 if (upipe->iinfo == 0) 1738 return (USBD_NOMEM); 1739 switch (ed->bmAttributes & UE_XFERTYPE) { 1740 case UE_CONTROL: 1741 pipe->methods = &uhci_device_ctrl_methods; 1742 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 1743 if (upipe->u.ctl.sqh == 0) 1744 goto bad; 1745 upipe->u.ctl.setup = uhci_alloc_std(sc); 1746 if (upipe->u.ctl.setup == 0) { 1747 uhci_free_sqh(sc, upipe->u.ctl.sqh); 1748 goto bad; 1749 } 1750 upipe->u.ctl.stat = uhci_alloc_std(sc); 1751 if (upipe->u.ctl.stat == 0) { 1752 uhci_free_sqh(sc, upipe->u.ctl.sqh); 1753 uhci_free_std(sc, upipe->u.ctl.setup); 1754 goto bad; 1755 } 1756 r = usb_allocmem(sc->sc_dmatag, 1757 sizeof(usb_device_request_t), 1758 0, &upipe->u.ctl.reqdma); 1759 if (r != USBD_NORMAL_COMPLETION) { 1760 uhci_free_sqh(sc, upipe->u.ctl.sqh); 1761 uhci_free_std(sc, upipe->u.ctl.setup); 1762 uhci_free_std(sc, upipe->u.ctl.stat); 1763 goto bad; 1764 } 1765 break; 1766 case UE_INTERRUPT: 1767 pipe->methods = &uhci_device_intr_methods; 1768 return (uhci_device_setintr(sc, upipe, ed->bInterval)); 1769 case UE_ISOCHRONOUS: 1770 printf("uhci_open: iso not implemented\n"); 1771 return (USBD_XXX); 1772 case UE_BULK: 1773 pipe->methods = &uhci_device_bulk_methods; 1774 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 1775 if (upipe->u.bulk.sqh == 0) 1776 goto bad; 1777 break; 1778 } 1779 } 1780 return (USBD_NORMAL_COMPLETION); 1781 1782 bad: 1783 uhci_free_intr_info(upipe->iinfo); 1784 return (USBD_NOMEM); 1785 } 1786 1787 /* 1788 * Data structures and routines to emulate the root hub. 1789 */ 1790 usb_device_descriptor_t uhci_devd = { 1791 USB_DEVICE_DESCRIPTOR_SIZE, 1792 UDESC_DEVICE, /* type */ 1793 {0x00, 0x01}, /* USB version */ 1794 UCLASS_HUB, /* class */ 1795 USUBCLASS_HUB, /* subclass */ 1796 0, /* protocol */ 1797 64, /* max packet */ 1798 {0},{0},{0x00,0x01}, /* device id */ 1799 1,2,0, /* string indicies */ 1800 1 /* # of configurations */ 1801 }; 1802 1803 usb_config_descriptor_t uhci_confd = { 1804 USB_CONFIG_DESCRIPTOR_SIZE, 1805 UDESC_CONFIG, 1806 {USB_CONFIG_DESCRIPTOR_SIZE + 1807 USB_INTERFACE_DESCRIPTOR_SIZE + 1808 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1809 1, 1810 1, 1811 0, 1812 UC_SELF_POWERED, 1813 0 /* max power */ 1814 }; 1815 1816 usb_interface_descriptor_t uhci_ifcd = { 1817 USB_INTERFACE_DESCRIPTOR_SIZE, 1818 UDESC_INTERFACE, 1819 0, 1820 0, 1821 1, 1822 UCLASS_HUB, 1823 USUBCLASS_HUB, 1824 0, 1825 0 1826 }; 1827 1828 usb_endpoint_descriptor_t uhci_endpd = { 1829 USB_ENDPOINT_DESCRIPTOR_SIZE, 1830 UDESC_ENDPOINT, 1831 UE_IN | UHCI_INTR_ENDPT, 1832 UE_INTERRUPT, 1833 {8}, 1834 255 1835 }; 1836 1837 usb_hub_descriptor_t uhci_hubd_piix = { 1838 USB_HUB_DESCRIPTOR_SIZE, 1839 UDESC_HUB, 1840 2, 1841 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 1842 50, /* power on to power good */ 1843 0, 1844 { 0x00 }, /* both ports are removable */ 1845 { 0x00 }, /* no ports can power down individually */ 1846 }; 1847 1848 int 1849 uhci_str(p, l, s) 1850 usb_string_descriptor_t *p; 1851 int l; 1852 char *s; 1853 { 1854 int i; 1855 1856 if (l == 0) 1857 return (0); 1858 p->bLength = 2 * strlen(s) + 2; 1859 if (l == 1) 1860 return (1); 1861 p->bDescriptorType = UDESC_STRING; 1862 l -= 2; 1863 for (i = 0; s[i] && l > 1; i++, l -= 2) 1864 USETW2(p->bString[i], 0, s[i]); 1865 return (2*i+2); 1866 } 1867 1868 /* 1869 * Simulate a hardware hub by handling all the necessary requests. 1870 */ 1871 usbd_status 1872 uhci_root_ctrl_transfer(reqh) 1873 usbd_request_handle reqh; 1874 { 1875 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 1876 usb_device_request_t *req; 1877 void *buf; 1878 int port, x; 1879 int len, value, index, status, change, l, totlen = 0; 1880 usb_port_status_t ps; 1881 usbd_status r; 1882 1883 if (!reqh->isreq) 1884 panic("uhci_root_ctrl_transfer: not a request\n"); 1885 req = &reqh->request; 1886 buf = reqh->buffer; 1887 1888 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 1889 req->bmRequestType, req->bRequest)); 1890 1891 len = UGETW(req->wLength); 1892 value = UGETW(req->wValue); 1893 index = UGETW(req->wIndex); 1894 #define C(x,y) ((x) | ((y) << 8)) 1895 switch(C(req->bRequest, req->bmRequestType)) { 1896 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1897 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1898 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1899 /* 1900 * DEVICE_REMOTE_WAKEUP and ENDPOINT_STALL are no-ops 1901 * for the integrated root hub. 1902 */ 1903 break; 1904 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1905 if (len > 0) { 1906 *(u_int8_t *)buf = sc->sc_conf; 1907 totlen = 1; 1908 } 1909 break; 1910 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1911 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 1912 switch(value >> 8) { 1913 case UDESC_DEVICE: 1914 if ((value & 0xff) != 0) { 1915 r = USBD_IOERROR; 1916 goto ret; 1917 } 1918 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1919 memcpy(buf, &uhci_devd, l); 1920 break; 1921 case UDESC_CONFIG: 1922 if ((value & 0xff) != 0) { 1923 r = USBD_IOERROR; 1924 goto ret; 1925 } 1926 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1927 memcpy(buf, &uhci_confd, l); 1928 buf = (char *)buf + l; 1929 len -= l; 1930 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1931 totlen += l; 1932 memcpy(buf, &uhci_ifcd, l); 1933 buf = (char *)buf + l; 1934 len -= l; 1935 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1936 totlen += l; 1937 memcpy(buf, &uhci_endpd, l); 1938 break; 1939 case UDESC_STRING: 1940 if (len == 0) 1941 break; 1942 *(u_int8_t *)buf = 0; 1943 totlen = 1; 1944 switch (value & 0xff) { 1945 case 1: /* Vendor */ 1946 totlen = uhci_str(buf, len, sc->sc_vendor); 1947 break; 1948 case 2: /* Product */ 1949 totlen = uhci_str(buf, len, "UHCI root hub"); 1950 break; 1951 } 1952 break; 1953 default: 1954 r = USBD_IOERROR; 1955 goto ret; 1956 } 1957 break; 1958 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1959 if (len > 0) { 1960 *(u_int8_t *)buf = 0; 1961 totlen = 1; 1962 } 1963 break; 1964 case C(UR_GET_STATUS, UT_READ_DEVICE): 1965 if (len > 1) { 1966 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1967 totlen = 2; 1968 } 1969 break; 1970 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1971 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1972 if (len > 1) { 1973 USETW(((usb_status_t *)buf)->wStatus, 0); 1974 totlen = 2; 1975 } 1976 break; 1977 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1978 if (value >= USB_MAX_DEVICES) { 1979 r = USBD_IOERROR; 1980 goto ret; 1981 } 1982 sc->sc_addr = value; 1983 break; 1984 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1985 if (value != 0 && value != 1) { 1986 r = USBD_IOERROR; 1987 goto ret; 1988 } 1989 sc->sc_conf = value; 1990 break; 1991 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1992 break; 1993 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1994 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1995 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1996 r = USBD_IOERROR; 1997 goto ret; 1998 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1999 break; 2000 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2001 break; 2002 /* Hub requests */ 2003 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2004 break; 2005 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2006 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE port=%d feature=%d\n", 2007 index, value)); 2008 if (index == 1) 2009 port = UHCI_PORTSC1; 2010 else if (index == 2) 2011 port = UHCI_PORTSC2; 2012 else { 2013 r = USBD_IOERROR; 2014 goto ret; 2015 } 2016 switch(value) { 2017 case UHF_PORT_ENABLE: 2018 x = UREAD2(sc, port); 2019 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 2020 break; 2021 case UHF_PORT_SUSPEND: 2022 x = UREAD2(sc, port); 2023 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 2024 break; 2025 case UHF_PORT_RESET: 2026 x = UREAD2(sc, port); 2027 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2028 break; 2029 case UHF_C_PORT_CONNECTION: 2030 x = UREAD2(sc, port); 2031 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 2032 break; 2033 case UHF_C_PORT_ENABLE: 2034 x = UREAD2(sc, port); 2035 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 2036 break; 2037 case UHF_C_PORT_OVER_CURRENT: 2038 x = UREAD2(sc, port); 2039 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 2040 break; 2041 case UHF_C_PORT_RESET: 2042 sc->sc_isreset = 0; 2043 r = USBD_NORMAL_COMPLETION; 2044 goto ret; 2045 case UHF_PORT_CONNECTION: 2046 case UHF_PORT_OVER_CURRENT: 2047 case UHF_PORT_POWER: 2048 case UHF_PORT_LOW_SPEED: 2049 case UHF_C_PORT_SUSPEND: 2050 default: 2051 r = USBD_IOERROR; 2052 goto ret; 2053 } 2054 break; 2055 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 2056 if (index == 1) 2057 port = UHCI_PORTSC1; 2058 else if (index == 2) 2059 port = UHCI_PORTSC2; 2060 else { 2061 r = USBD_IOERROR; 2062 goto ret; 2063 } 2064 if (len > 0) { 2065 *(u_int8_t *)buf = 2066 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 2067 UHCI_PORTSC_LS_SHIFT; 2068 totlen = 1; 2069 } 2070 break; 2071 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2072 if (value != 0) { 2073 r = USBD_IOERROR; 2074 goto ret; 2075 } 2076 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 2077 totlen = l; 2078 memcpy(buf, &uhci_hubd_piix, l); 2079 break; 2080 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2081 if (len != 4) { 2082 r = USBD_IOERROR; 2083 goto ret; 2084 } 2085 memset(buf, 0, len); 2086 totlen = len; 2087 break; 2088 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2089 if (index == 1) 2090 port = UHCI_PORTSC1; 2091 else if (index == 2) 2092 port = UHCI_PORTSC2; 2093 else { 2094 r = USBD_IOERROR; 2095 goto ret; 2096 } 2097 if (len != 4) { 2098 r = USBD_IOERROR; 2099 goto ret; 2100 } 2101 x = UREAD2(sc, port); 2102 status = change = 0; 2103 if (x & UHCI_PORTSC_CCS ) 2104 status |= UPS_CURRENT_CONNECT_STATUS; 2105 if (x & UHCI_PORTSC_CSC ) 2106 change |= UPS_C_CONNECT_STATUS; 2107 if (x & UHCI_PORTSC_PE ) 2108 status |= UPS_PORT_ENABLED; 2109 if (x & UHCI_PORTSC_POEDC) 2110 change |= UPS_C_PORT_ENABLED; 2111 if (x & UHCI_PORTSC_OCI ) 2112 status |= UPS_OVERCURRENT_INDICATOR; 2113 if (x & UHCI_PORTSC_OCIC ) 2114 change |= UPS_C_OVERCURRENT_INDICATOR; 2115 if (x & UHCI_PORTSC_SUSP ) 2116 status |= UPS_SUSPEND; 2117 if (x & UHCI_PORTSC_LSDA ) 2118 status |= UPS_LOW_SPEED; 2119 status |= UPS_PORT_POWER; 2120 if (sc->sc_isreset) 2121 change |= UPS_C_PORT_RESET; 2122 USETW(ps.wPortStatus, status); 2123 USETW(ps.wPortChange, change); 2124 l = min(len, sizeof ps); 2125 memcpy(buf, &ps, l); 2126 totlen = l; 2127 break; 2128 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2129 r = USBD_IOERROR; 2130 goto ret; 2131 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2132 break; 2133 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2134 if (index == 1) 2135 port = UHCI_PORTSC1; 2136 else if (index == 2) 2137 port = UHCI_PORTSC2; 2138 else { 2139 r = USBD_IOERROR; 2140 goto ret; 2141 } 2142 switch(value) { 2143 case UHF_PORT_ENABLE: 2144 x = UREAD2(sc, port); 2145 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2146 break; 2147 case UHF_PORT_SUSPEND: 2148 x = UREAD2(sc, port); 2149 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 2150 break; 2151 case UHF_PORT_RESET: 2152 x = UREAD2(sc, port); 2153 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2154 usbd_delay_ms(&sc->sc_bus, 10); 2155 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2156 delay(100); 2157 x = UREAD2(sc, port); 2158 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2159 delay(100); 2160 DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n", 2161 index, UREAD2(sc, port))); 2162 sc->sc_isreset = 1; 2163 break; 2164 case UHF_C_PORT_CONNECTION: 2165 case UHF_C_PORT_ENABLE: 2166 case UHF_C_PORT_OVER_CURRENT: 2167 case UHF_PORT_CONNECTION: 2168 case UHF_PORT_OVER_CURRENT: 2169 case UHF_PORT_POWER: 2170 case UHF_PORT_LOW_SPEED: 2171 case UHF_C_PORT_SUSPEND: 2172 case UHF_C_PORT_RESET: 2173 default: 2174 r = USBD_IOERROR; 2175 goto ret; 2176 } 2177 break; 2178 default: 2179 r = USBD_IOERROR; 2180 goto ret; 2181 } 2182 reqh->actlen = totlen; 2183 r = USBD_NORMAL_COMPLETION; 2184 ret: 2185 reqh->status = r; 2186 reqh->xfercb(reqh); 2187 return (USBD_IN_PROGRESS); 2188 } 2189 2190 /* Abort a root control request. */ 2191 void 2192 uhci_root_ctrl_abort(reqh) 2193 usbd_request_handle reqh; 2194 { 2195 /* Nothing to do, all transfers are syncronous. */ 2196 } 2197 2198 /* Close the root pipe. */ 2199 void 2200 uhci_root_ctrl_close(pipe) 2201 usbd_pipe_handle pipe; 2202 { 2203 untimeout(uhci_timo, pipe->intrreqh); 2204 DPRINTF(("uhci_root_ctrl_close\n")); 2205 } 2206 2207 /* Abort a root interrupt request. */ 2208 void 2209 uhci_root_intr_abort(reqh) 2210 usbd_request_handle reqh; 2211 { 2212 untimeout(uhci_timo, reqh); 2213 } 2214 2215 /* Start a transfer on the root interrupt pipe */ 2216 usbd_status 2217 uhci_root_intr_transfer(reqh) 2218 usbd_request_handle reqh; 2219 { 2220 usbd_pipe_handle pipe = reqh->pipe; 2221 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2222 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2223 usb_dma_t *dmap; 2224 usbd_status r; 2225 int len; 2226 2227 DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d flags=%d\n", 2228 reqh, reqh->buffer, reqh->length, reqh->flags)); 2229 2230 len = reqh->length; 2231 dmap = &upipe->u.intr.datadma; 2232 if (len == 0) 2233 return (USBD_INVAL); /* XXX should it be? */ 2234 2235 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2236 if (r != USBD_NORMAL_COMPLETION) 2237 return (r); 2238 2239 sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval); 2240 timeout(uhci_timo, reqh, sc->sc_ival); 2241 return (USBD_IN_PROGRESS); 2242 } 2243 2244 /* Close the root interrupt pipe. */ 2245 void 2246 uhci_root_intr_close(pipe) 2247 usbd_pipe_handle pipe; 2248 { 2249 untimeout(uhci_timo, pipe->intrreqh); 2250 DPRINTF(("uhci_root_intr_close\n")); 2251 } 2252
Indexes created Tue Sep 30 20:09:53 GMT 2025