uhci.c revision 1.12 1 /* $NetBSD: uhci.c,v 1.12 1998/12/10 23:16:47 augustss Exp $ */
2
3 /*
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 * Carlstedt Research & Technology.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * USB Universal Host Controller driver.
42 * Handles PIIX3 and PIIX4.
43 *
44 * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
45 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
46 * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf
47 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
48 */
49
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/kernel.h>
53 #include <sys/malloc.h>
54 #include <sys/device.h>
55 #include <sys/proc.h>
56 #include <sys/queue.h>
57 #include <sys/select.h>
58
59 #include <machine/bus.h>
60
61 #include <dev/usb/usb.h>
62 #include <dev/usb/usbdi.h>
63 #include <dev/usb/usbdivar.h>
64 #include <dev/usb/usb_mem.h>
65 #include <dev/usb/usb_quirks.h>
66
67 #include <dev/usb/uhcireg.h>
68 #include <dev/usb/uhcivar.h>
69
70 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
71
72 struct uhci_pipe {
73 struct usbd_pipe pipe;
74 uhci_intr_info_t *iinfo;
75 int newtoggle;
76 /* Info needed for different pipe kinds. */
77 union {
78 /* Control pipe */
79 struct {
80 uhci_soft_qh_t *sqh;
81 usb_dma_t reqdma;
82 usb_dma_t datadma;
83 uhci_soft_td_t *setup, *stat, *xferend;
84 u_int length;
85 } ctl;
86 /* Interrupt pipe */
87 struct {
88 usb_dma_t datadma;
89 int npoll;
90 uhci_soft_qh_t **qhs;
91 } intr;
92 /* Bulk pipe */
93 struct {
94 uhci_soft_qh_t *sqh;
95 usb_dma_t datadma;
96 u_int length;
97 int isread;
98 } bulk;
99 } u;
100 };
101
102 /*
103 * The uhci_intr_info free list can be global since they contain
104 * no dma specific data. The other free lists do.
105 */
106 int uhci_global_init_done = 0;
107 LIST_HEAD(, uhci_intr_info) uhci_ii_free;
108
109 void uhci_busreset __P((uhci_softc_t *));
110 void uhci_run __P((uhci_softc_t *, int run));
111 uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *));
112 void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *));
113 uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *));
114 void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *));
115 uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *));
116 void uhci_free_intr_info __P((uhci_intr_info_t *ii));
117 void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *,
118 uhci_intr_info_t *));
119 void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *));
120
121 void uhci_free_std_chain __P((uhci_softc_t *,
122 uhci_soft_td_t *, uhci_soft_td_t *));
123 usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *,
124 int, int, usb_dma_t *,
125 uhci_soft_td_t **,
126 uhci_soft_td_t **));
127 void uhci_timo __P((void *));
128 void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle));
129 void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *));
130 void uhci_ii_done __P((uhci_intr_info_t *, int));
131 void uhci_timeout __P((void *));
132 void uhci_wakeup_ctrl __P((void *, int, int, void *, int));
133 void uhci_lock_frames __P((uhci_softc_t *));
134 void uhci_unlock_frames __P((uhci_softc_t *));
135 void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
136 void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
137 void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
138 void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
139 int uhci_str __P((usb_string_descriptor_t *, int, char *));
140
141 void uhci_device_close __P((struct uhci_pipe *));
142
143 void uhci_wakeup_cb __P((usbd_request_handle reqh));
144
145 usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle));
146 void uhci_device_ctrl_abort __P((usbd_request_handle));
147 void uhci_device_ctrl_close __P((usbd_pipe_handle));
148 usbd_status uhci_device_intr_transfer __P((usbd_request_handle));
149 void uhci_device_intr_abort __P((usbd_request_handle));
150 void uhci_device_intr_close __P((usbd_pipe_handle));
151 usbd_status uhci_device_bulk_transfer __P((usbd_request_handle));
152 void uhci_device_bulk_abort __P((usbd_request_handle));
153 void uhci_device_bulk_close __P((usbd_pipe_handle));
154
155 usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle));
156 void uhci_root_ctrl_abort __P((usbd_request_handle));
157 void uhci_root_ctrl_close __P((usbd_pipe_handle));
158 usbd_status uhci_root_intr_transfer __P((usbd_request_handle));
159 void uhci_root_intr_abort __P((usbd_request_handle));
160 void uhci_root_intr_close __P((usbd_pipe_handle));
161
162 usbd_status uhci_open __P((usbd_pipe_handle));
163 void uhci_poll __P((struct usbd_bus *));
164
165 usbd_status uhci_device_request __P((usbd_request_handle reqh));
166 void uhci_ctrl_done __P((uhci_intr_info_t *ii));
167 void uhci_bulk_done __P((uhci_intr_info_t *ii));
168
169 void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
170 void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
171 usbd_status uhci_device_setintr __P((uhci_softc_t *sc,
172 struct uhci_pipe *pipe, int ival));
173 void uhci_intr_done __P((uhci_intr_info_t *ii));
174
175 #ifdef USB_DEBUG
176 static void uhci_dumpregs __P((uhci_softc_t *));
177 void uhci_dump_tds __P((uhci_soft_td_t *));
178 void uhci_dump_qh __P((uhci_soft_qh_t *));
179 void uhci_dump __P((void));
180 void uhci_dump_td __P((uhci_soft_td_t *));
181 #endif
182
183 #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
184 #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
185 #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
186 #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
187
188 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
189 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
190
191 #define UHCI_RESET_TIMEOUT 100 /* reset timeout */
192 #define UHCI_CTRL_TIMEOUT 500 /* control transaction timeout */
193 #define UHCI_ISO_DELAY 50 /* delay of start of iso */
194
195 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
196
197 #define UHCI_INTR_ENDPT 1
198
199 struct usbd_methods uhci_root_ctrl_methods = {
200 uhci_root_ctrl_transfer,
201 uhci_root_ctrl_abort,
202 uhci_root_ctrl_close,
203 0,
204 };
205
206 struct usbd_methods uhci_root_intr_methods = {
207 uhci_root_intr_transfer,
208 uhci_root_intr_abort,
209 uhci_root_intr_close,
210 0,
211 };
212
213 struct usbd_methods uhci_device_ctrl_methods = {
214 uhci_device_ctrl_transfer,
215 uhci_device_ctrl_abort,
216 uhci_device_ctrl_close,
217 0,
218 };
219
220 struct usbd_methods uhci_device_intr_methods = {
221 uhci_device_intr_transfer,
222 uhci_device_intr_abort,
223 uhci_device_intr_close,
224 0,
225 };
226
227 struct usbd_methods uhci_device_bulk_methods = {
228 uhci_device_bulk_transfer,
229 uhci_device_bulk_abort,
230 uhci_device_bulk_close,
231 0,
232 };
233
234 void
235 uhci_busreset(sc)
236 uhci_softc_t *sc;
237 {
238 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
239 usbd_delay_ms(&sc->sc_bus, USB_RESET_DELAY); /* wait at least 10ms */
240 UHCICMD(sc, 0); /* do nothing */
241 }
242
243 usbd_status
244 uhci_init(sc)
245 uhci_softc_t *sc;
246 {
247 usbd_status r;
248 int i, j;
249 uhci_soft_qh_t *csqh, *bsqh, *sqh;
250 uhci_soft_td_t *std;
251 usb_dma_t dma;
252
253 DPRINTFN(1,("uhci_init: start\n"));
254
255 if (!uhci_global_init_done) {
256 uhci_global_init_done = 1;
257 LIST_INIT(&uhci_ii_free);
258 }
259
260 #if defined(USB_DEBUG)
261 if (uhcidebug > 2)
262 uhci_dumpregs(sc);
263 #endif
264
265 uhci_run(sc, 0); /* stop the controller */
266 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
267
268 /* Allocate and initialize real frame array. */
269 r = usb_allocmem(sc->sc_dmatag,
270 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
271 UHCI_FRAMELIST_ALIGN, &dma);
272 if (r != USBD_NORMAL_COMPLETION)
273 return (r);
274 sc->sc_pframes = KERNADDR(&dma);
275 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
276 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&dma)); /* set frame list */
277
278 uhci_busreset(sc);
279
280 /* Allocate the dummy QH where bulk traffic will be queued. */
281 bsqh = uhci_alloc_sqh(sc);
282 if (!bsqh)
283 return (USBD_NOMEM);
284 bsqh->qh->qh_hlink = UHCI_PTR_T; /* end of QH chain */
285 bsqh->qh->qh_elink = UHCI_PTR_T;
286 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
287
288 /* Allocate the dummy QH where control traffic will be queued. */
289 csqh = uhci_alloc_sqh(sc);
290 if (!csqh)
291 return (USBD_NOMEM);
292 csqh->qh->hlink = bsqh;
293 csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q;
294 csqh->qh->qh_elink = UHCI_PTR_T;
295 sc->sc_ctl_start = sc->sc_ctl_end = csqh;
296
297 /*
298 * Make all (virtual) frame list pointers point to the interrupt
299 * queue heads and the interrupt queue heads at the control
300 * queue head and point the physical frame list to the virtual.
301 */
302 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
303 std = uhci_alloc_std(sc);
304 sqh = uhci_alloc_sqh(sc);
305 if (!std || !sqh)
306 return (ENOMEM);
307 std->td->link.sqh = sqh;
308 std->td->td_link = sqh->physaddr | UHCI_PTR_Q;
309 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */
310 std->td->td_token = 0;
311 std->td->td_buffer = 0;
312 sqh->qh->hlink = csqh;
313 sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q;
314 sqh->qh->elink = 0;
315 sqh->qh->qh_elink = UHCI_PTR_T;
316 sc->sc_vframes[i].htd = std;
317 sc->sc_vframes[i].etd = std;
318 sc->sc_vframes[i].hqh = sqh;
319 sc->sc_vframes[i].eqh = sqh;
320 for (j = i;
321 j < UHCI_FRAMELIST_COUNT;
322 j += UHCI_VFRAMELIST_COUNT)
323 sc->sc_pframes[j] = std->physaddr;
324 }
325
326 LIST_INIT(&sc->sc_intrhead);
327
328 /* Set up the bus struct. */
329 sc->sc_bus.open_pipe = uhci_open;
330 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
331 sc->sc_bus.do_poll = uhci_poll;
332
333 DPRINTFN(1,("uhci_init: enabling\n"));
334 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
335 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
336
337 uhci_run(sc, 1); /* and here we go... */
338 return (USBD_NORMAL_COMPLETION);
339 }
340
341 #ifdef USB_DEBUG
342 static void
343 uhci_dumpregs(sc)
344 uhci_softc_t *sc;
345 {
346 printf("%s: regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
347 sc->sc_bus.bdev.dv_xname,
348 UREAD2(sc, UHCI_CMD),
349 UREAD2(sc, UHCI_STS),
350 UREAD2(sc, UHCI_INTR),
351 UREAD2(sc, UHCI_FRNUM),
352 UREAD2(sc, UHCI_FLBASEADDR),
353 UREAD2(sc, UHCI_SOF),
354 UREAD2(sc, UHCI_PORTSC1),
355 UREAD2(sc, UHCI_PORTSC2));
356 }
357
358 int uhci_longtd = 1;
359
360 void
361 uhci_dump_td(p)
362 uhci_soft_td_t *p;
363 {
364 printf("TD(%p) at %08lx = 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n",
365 p, (long)p->physaddr,
366 (long)p->td->td_link,
367 (long)p->td->td_status,
368 (long)p->td->td_token,
369 (long)p->td->td_buffer);
370 if (uhci_longtd)
371 printf(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
372 "D=%d,maxlen=%d\n",
373 (long)p->td->td_link,
374 "\20\1T\2Q\3VF",
375 (long)p->td->td_status,
376 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
377 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
378 UHCI_TD_GET_ERRCNT(p->td->td_status),
379 UHCI_TD_GET_ACTLEN(p->td->td_status),
380 UHCI_TD_GET_PID(p->td->td_token),
381 UHCI_TD_GET_DEVADDR(p->td->td_token),
382 UHCI_TD_GET_ENDPT(p->td->td_token),
383 UHCI_TD_GET_DT(p->td->td_token),
384 UHCI_TD_GET_MAXLEN(p->td->td_token));
385
386 }
387
388 void
389 uhci_dump_qh(p)
390 uhci_soft_qh_t *p;
391 {
392 printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr,
393 p->qh->qh_hlink, p->qh->qh_elink);
394 }
395
396 #if 0
397 void
398 uhci_dump()
399 {
400 uhci_softc_t *sc = uhci;
401
402 uhci_dumpregs(sc);
403 printf("intrs=%d\n", sc->sc_intrs);
404 printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);
405 uhci_dump_qh(sc->sc_ctl_start->qh->hlink);
406 }
407 #endif
408
409 void
410 uhci_dump_tds(std)
411 uhci_soft_td_t *std;
412 {
413 uhci_soft_td_t *p;
414
415 for(p = std; p; p = p->td->link.std)
416 uhci_dump_td(p);
417 }
418 #endif
419
420 /*
421 * This routine is executed periodically and simulates interrupts
422 * from the root controller interrupt pipe for port status change.
423 */
424 void
425 uhci_timo(addr)
426 void *addr;
427 {
428 usbd_request_handle reqh = addr;
429 usbd_pipe_handle pipe = reqh->pipe;
430 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
431 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
432 int s;
433 u_char *p;
434
435 DPRINTFN(15, ("uhci_timo\n"));
436
437 p = KERNADDR(&upipe->u.intr.datadma);
438 p[0] = 0;
439 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
440 p[0] |= 1<<1;
441 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
442 p[0] |= 1<<2;
443 if (p[0] != 0) {
444 reqh->actlen = 1;
445 reqh->status = USBD_NORMAL_COMPLETION;
446 s = splusb();
447 reqh->xfercb(reqh);
448 splx(s);
449 }
450 if (reqh->pipe->intrreqh == reqh) {
451 timeout(uhci_timo, addr, sc->sc_ival);
452 } else {
453 usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma);
454 }
455 }
456
457
458 void
459 uhci_lock_frames(sc)
460 uhci_softc_t *sc;
461 {
462 int s = splusb();
463 while (sc->sc_vflock) {
464 sc->sc_vflock |= UHCI_WANT_LOCK;
465 tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0);
466 }
467 sc->sc_vflock = UHCI_HAS_LOCK;
468 splx(s);
469 }
470
471 void
472 uhci_unlock_frames(sc)
473 uhci_softc_t *sc;
474 {
475 int s = splusb();
476 sc->sc_vflock &= ~UHCI_HAS_LOCK;
477 if (sc->sc_vflock & UHCI_WANT_LOCK)
478 wakeup(&sc->sc_vflock);
479 splx(s);
480 }
481
482 /*
483 * Allocate an interrupt information struct. A free list is kept
484 * for fast allocation.
485 */
486 uhci_intr_info_t *
487 uhci_alloc_intr_info(sc)
488 uhci_softc_t *sc;
489 {
490 uhci_intr_info_t *ii;
491
492 ii = LIST_FIRST(&uhci_ii_free);
493 if (ii)
494 LIST_REMOVE(ii, list);
495 else {
496 ii = malloc(sizeof(uhci_intr_info_t), M_USBDEV, M_NOWAIT);
497 }
498 ii->sc = sc;
499 return ii;
500 }
501
502 void
503 uhci_free_intr_info(ii)
504 uhci_intr_info_t *ii;
505 {
506 LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */
507 }
508
509 /* Add control QH, called at splusb(). */
510 void
511 uhci_add_ctrl(sc, sqh)
512 uhci_softc_t *sc;
513 uhci_soft_qh_t *sqh;
514 {
515 uhci_qh_t *eqh;
516
517 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
518 eqh = sc->sc_ctl_end->qh;
519 sqh->qh->hlink = eqh->hlink;
520 sqh->qh->qh_hlink = eqh->qh_hlink;
521 eqh->hlink = sqh;
522 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
523 sc->sc_ctl_end = sqh;
524 }
525
526 /* Remove control QH, called at splusb(). */
527 void
528 uhci_remove_ctrl(sc, sqh)
529 uhci_softc_t *sc;
530 uhci_soft_qh_t *sqh;
531 {
532 uhci_soft_qh_t *pqh;
533
534 DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh));
535 for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink)
536 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
537 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
538 printf("uhci_remove_ctrl: QH not found\n");
539 return;
540 }
541 #else
542 ;
543 #endif
544 pqh->qh->hlink = sqh->qh->hlink;
545 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
546 if (sc->sc_ctl_end == sqh)
547 sc->sc_ctl_end = pqh;
548 }
549
550 /* Add bulk QH, called at splusb(). */
551 void
552 uhci_add_bulk(sc, sqh)
553 uhci_softc_t *sc;
554 uhci_soft_qh_t *sqh;
555 {
556 uhci_qh_t *eqh;
557
558 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
559 eqh = sc->sc_bulk_end->qh;
560 sqh->qh->hlink = eqh->hlink;
561 sqh->qh->qh_hlink = eqh->qh_hlink;
562 eqh->hlink = sqh;
563 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
564 sc->sc_bulk_end = sqh;
565 }
566
567 /* Remove bulk QH, called at splusb(). */
568 void
569 uhci_remove_bulk(sc, sqh)
570 uhci_softc_t *sc;
571 uhci_soft_qh_t *sqh;
572 {
573 uhci_soft_qh_t *pqh;
574
575 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
576 for (pqh = sc->sc_bulk_start;
577 pqh->qh->hlink != sqh;
578 pqh = pqh->qh->hlink)
579 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
580 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
581 printf("uhci_remove_bulk: QH not found\n");
582 return;
583 }
584 #else
585 ;
586 #endif
587 pqh->qh->hlink = sqh->qh->hlink;
588 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
589 if (sc->sc_bulk_end == sqh)
590 sc->sc_bulk_end = pqh;
591 }
592
593 int
594 uhci_intr(p)
595 void *p;
596 {
597 uhci_softc_t *sc = p;
598 int status, ret;
599 uhci_intr_info_t *ii;
600
601 sc->sc_intrs++;
602 #if defined(USB_DEBUG)
603 if (uhcidebug > 9) {
604 DPRINTF(("uhci_intr %s, %p\n", sc->sc_bus.bdev.dv_xname, sc));
605 uhci_dumpregs(sc);
606 }
607 #endif
608 status = UREAD2(sc, UHCI_STS);
609 ret = 0;
610 if (status & UHCI_STS_USBINT) {
611 UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */
612 ret = 1;
613 }
614 if (status & UHCI_STS_USBEI) {
615 UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */
616 ret = 1;
617 }
618 if (status & UHCI_STS_RD) {
619 UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */
620 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname);
621 ret = 1;
622 }
623 if (status & UHCI_STS_HSE) {
624 UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */
625 printf("%s: Host System Error\n", sc->sc_bus.bdev.dv_xname);
626 ret = 1;
627 }
628 if (status & UHCI_STS_HCPE) {
629 UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */
630 printf("%s: Host System Error\n", sc->sc_bus.bdev.dv_xname);
631 ret = 1;
632 }
633 if (status & UHCI_STS_HCH) {
634 printf("%s: controller halted\n", sc->sc_bus.bdev.dv_xname);
635 }
636 if (!ret)
637 return 0;
638
639 /*
640 * Interrupts on UHCI really suck. When the host controller
641 * interrupts because a transfer is completed there is no
642 * way of knowing which transfer it was. You can scan down
643 * the TDs and QHs of the previous frame to limit the search,
644 * but that assumes that the interrupt was not delayed by more
645 * than 1 ms, which may not always be true (e.g. after debug
646 * output on a slow console).
647 * We scan all interrupt descriptors to see if any have
648 * completed.
649 */
650 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
651 uhci_check_intr(sc, ii);
652
653 DPRINTFN(10, ("uhci_intr: exit\n"));
654 return 1;
655 }
656
657 /* Check for an interrupt. */
658 void
659 uhci_check_intr(sc, ii)
660 uhci_softc_t *sc;
661 uhci_intr_info_t *ii;
662 {
663 struct uhci_pipe *upipe;
664 uhci_soft_td_t *std, *lstd;
665
666 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
667 #ifdef DIAGNOSTIC
668 if (!ii) {
669 printf("uhci_check_intr: no ii? %p\n", ii);
670 return;
671 }
672 #endif
673 if (!ii->stdstart)
674 return;
675 lstd = ii->stdend;
676 #ifdef DIAGNOSTIC
677 if (!lstd) {
678 printf("uhci_check_intr: std==0\n");
679 return;
680 }
681 #endif
682 /* If the last TD is still active the whole transfer probably is. */
683 if (lstd->td->td_status & UHCI_TD_ACTIVE) {
684 DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii));
685 for (std = ii->stdstart; std != lstd; std = std->td->link.std)
686 if (std->td->td_status & UHCI_TD_STALLED)
687 goto done;
688 DPRINTFN(15, ("uhci_check_intr: ii=%p still active\n", ii));
689 return;
690 }
691 done:
692 upipe = (struct uhci_pipe *)ii->reqh->pipe;
693 upipe->pipe.endpoint->toggle = upipe->newtoggle;
694 uhci_ii_done(ii, 0);
695 untimeout(uhci_timeout, ii);
696 }
697
698 void
699 uhci_ii_done(ii, timo)
700 uhci_intr_info_t *ii;
701 int timo;
702 {
703 usbd_request_handle reqh = ii->reqh;
704 uhci_soft_td_t *std;
705 u_int32_t tst;
706 int len, status;
707
708 DPRINTFN(10, ("uhci_ii_done: ii=%p ready %d\n", ii, timo));
709
710 #ifdef DIAGNOSTIC
711 {
712 int s = splhigh();
713 if (ii->isdone) {
714 printf("uhci_ii_done: is done!\n");
715 splx(s);
716 return;
717 }
718 ii->isdone = 1;
719 splx(s);
720 }
721 #endif
722
723 /* The transfer is done, compute length and status. */
724 for (len = status = 0, std = ii->stdstart;
725 std != 0;
726 std = std->td->link.std) {
727 tst = std->td->td_status;
728 status |= tst;
729 #ifdef USB_DEBUG
730 if ((tst & UHCI_TD_ERROR) && uhcidebug) {
731 printf("uhci_intr: intr error TD:\n");
732 uhci_dump_td(std);
733 }
734 #endif
735 if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP)
736 len += UHCI_TD_GET_ACTLEN(tst);
737 }
738 status &= UHCI_TD_ERROR;
739 DPRINTFN(10, ("uhci_check_intr: len=%d, status=0x%x\n", len, status));
740 if (status != 0) {
741 DPRINTFN(-1+(status==UHCI_TD_STALLED),
742 ("uhci_intr: error, status 0x%b\n", (long)status,
743 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
744 "STALLED\30ACTIVE"));
745 if (status == UHCI_TD_STALLED)
746 reqh->status = USBD_STALLED;
747 else
748 reqh->status = USBD_IOERROR; /* more info XXX */
749 reqh->actlen = 0;
750 } else {
751 reqh->status = USBD_NORMAL_COMPLETION;
752 reqh->actlen = len;
753 }
754 if (timo) {
755 /* We got a timeout. Make sure transaction is not active. */
756 reqh->status = USBD_TIMEOUT;
757 for (std = ii->stdstart; std != 0; std = std->td->link.std)
758 std->td->td_status &= ~UHCI_TD_ACTIVE;
759 /* XXX should we wait 1 ms */
760 }
761 DPRINTFN(5, ("uhci_intr: calling handler ii=%p\n", ii));
762
763 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
764 case UE_CONTROL:
765 uhci_ctrl_done(ii);
766 break;
767 case UE_ISOCHRONOUS:
768 printf("uhci_ii_done: ISO??\n");
769 break;
770 case UE_BULK:
771 uhci_bulk_done(ii);
772 break;
773 case UE_INTERRUPT:
774 uhci_intr_done(ii);
775 break;
776 }
777
778 /* And finally execute callback. */
779 reqh->xfercb(reqh);
780 }
781
782 void
783 uhci_timeout(addr)
784 void *addr;
785 {
786 uhci_intr_info_t *ii = addr;
787 int s;
788
789 DPRINTF(("uhci_timeout: ii=%p\n", ii));
790 s = splusb();
791 uhci_ii_done(ii, 1);
792 splx(s);
793 }
794
795 /*
796 * Wait here until controller claims to have an interrupt.
797 * Then call uhci_intr and return. Use timeout to avoid waiting
798 * too long.
799 */
800 void
801 uhci_waitintr(sc, reqh)
802 uhci_softc_t *sc;
803 usbd_request_handle reqh;
804 {
805 int timo = reqh->timeout;
806 int usecs;
807
808 reqh->status = USBD_IN_PROGRESS;
809 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
810 delay(1000);
811 DPRINTFN(10,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
812 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
813 uhci_intr(sc);
814 if (reqh->status != USBD_IN_PROGRESS)
815 return;
816 }
817 }
818 reqh->status = USBD_TIMEOUT;
819 reqh->xfercb(reqh);
820 }
821
822 void
823 uhci_poll(bus)
824 struct usbd_bus *bus;
825 {
826 uhci_softc_t *sc = (uhci_softc_t *)bus;
827
828 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
829 uhci_intr(sc);
830 }
831
832 #if 0
833 void
834 uhci_reset(p)
835 void *p;
836 {
837 uhci_softc_t *sc = p;
838 int n;
839
840 UHCICMD(sc, UHCI_CMD_HCRESET);
841 /* The reset bit goes low when the controller is done. */
842 for (n = 0; n < UHCI_RESET_TIMEOUT &&
843 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
844 delay(100);
845 if (n >= UHCI_RESET_TIMEOUT)
846 printf("%s: controller did not reset\n", sc->sc_bus.bdev.dv_xname);
847 }
848 #endif
849
850 void
851 uhci_run(sc, run)
852 uhci_softc_t *sc;
853 int run;
854 {
855 int s, n, running;
856
857 run = run != 0;
858 s = splusb(); /* XXX really? */
859 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
860 if (run == running) {
861 splx(s);
862 return;
863 }
864 UWRITE2(sc, UHCI_CMD, run ? UHCI_CMD_RS : 0);
865 for(n = 0; n < 100; n++) {
866 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
867 /* return when we've entered the state we want */
868 if (run == running) {
869 splx(s);
870 return;
871 }
872 }
873 splx(s);
874 printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname,
875 run ? "start" : "stop");
876 }
877
878 /*
879 * Memory management routines.
880 * uhci_alloc_std allocates TDs
881 * uhci_alloc_sqh allocates QHs
882 * These two routines do their own free list management,
883 * partly for speed, partly because allocating DMAable memory
884 * has page size granularaity so much memory would be wasted if
885 * only one TD/QH (32 bytes) was placed in each alloacted chunk.
886 */
887
888 uhci_soft_td_t *
889 uhci_alloc_std(sc)
890 uhci_softc_t *sc;
891 {
892 uhci_soft_td_t *std;
893 usbd_status r;
894 int i;
895 usb_dma_t dma;
896
897 if (!sc->sc_freetds) {
898 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
899 std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK,
900 M_USBDEV, M_NOWAIT);
901 if (!std)
902 return 0;
903 r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK,
904 UHCI_TD_ALIGN, &dma);
905 if (r != USBD_NORMAL_COMPLETION) {
906 free(std, M_USBDEV);
907 return 0;
908 }
909 for(i = 0; i < UHCI_TD_CHUNK; i++, std++) {
910 std->physaddr = DMAADDR(&dma) +
911 i * UHCI_TD_SIZE;
912 std->td = (uhci_td_t *)
913 ((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE);
914 std->td->link.std = sc->sc_freetds;
915 sc->sc_freetds = std;
916 }
917 }
918 std = sc->sc_freetds;
919 sc->sc_freetds = std->td->link.std;
920 memset(std->td, 0, UHCI_TD_SIZE);
921 return std;
922 }
923
924 void
925 uhci_free_std(sc, std)
926 uhci_softc_t *sc;
927 uhci_soft_td_t *std;
928 {
929 #ifdef DIAGNOSTIC
930 #define TD_IS_FREE 0x12345678
931 if (std->td->td_token == TD_IS_FREE) {
932 printf("uhci_free_std: freeing free TD %p\n", std);
933 return;
934 }
935 std->td->td_token = TD_IS_FREE;
936 #endif
937 std->td->link.std = sc->sc_freetds;
938 sc->sc_freetds = std;
939 }
940
941 uhci_soft_qh_t *
942 uhci_alloc_sqh(sc)
943 uhci_softc_t *sc;
944 {
945 uhci_soft_qh_t *sqh;
946 usbd_status r;
947 int i, offs;
948 usb_dma_t dma;
949
950 if (!sc->sc_freeqhs) {
951 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
952 sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK,
953 M_USBDEV, M_NOWAIT);
954 if (!sqh)
955 return 0;
956 r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK,
957 UHCI_QH_ALIGN, &dma);
958 if (r != USBD_NORMAL_COMPLETION) {
959 free(sqh, M_USBDEV);
960 return 0;
961 }
962 for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) {
963 offs = i * UHCI_QH_SIZE;
964 sqh->physaddr = DMAADDR(&dma) + offs;
965 sqh->qh = (uhci_qh_t *)
966 ((char *)KERNADDR(&dma) + offs);
967 sqh->qh->hlink = sc->sc_freeqhs;
968 sc->sc_freeqhs = sqh;
969 }
970 }
971 sqh = sc->sc_freeqhs;
972 sc->sc_freeqhs = sqh->qh->hlink;
973 memset(sqh->qh, 0, UHCI_QH_SIZE);
974 return sqh;
975 }
976
977 void
978 uhci_free_sqh(sc, sqh)
979 uhci_softc_t *sc;
980 uhci_soft_qh_t *sqh;
981 {
982 sqh->qh->hlink = sc->sc_freeqhs;
983 sc->sc_freeqhs = sqh;
984 }
985
986 /*
987 * Enter a list of transfers onto a control queue.
988 * Called at splusb()
989 */
990 void
991 uhci_enter_ctl_q(sc, sqh, ii)
992 uhci_softc_t *sc;
993 uhci_soft_qh_t *sqh;
994 uhci_intr_info_t *ii;
995 {
996 DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh));
997
998 }
999
1000 void
1001 uhci_free_std_chain(sc, std, stdend)
1002 uhci_softc_t *sc;
1003 uhci_soft_td_t *std;
1004 uhci_soft_td_t *stdend;
1005 {
1006 uhci_soft_td_t *p;
1007
1008 for (; std != stdend; std = p) {
1009 p = std->td->link.std;
1010 uhci_free_std(sc, std);
1011 }
1012 }
1013
1014 usbd_status
1015 uhci_alloc_std_chain(upipe, sc, len, rd, dma, sp, ep)
1016 struct uhci_pipe *upipe;
1017 uhci_softc_t *sc;
1018 int len, rd;
1019 usb_dma_t *dma;
1020 uhci_soft_td_t **sp, **ep;
1021 {
1022 uhci_soft_td_t *p, *lastp;
1023 uhci_physaddr_t lastlink;
1024 u_int32_t ls;
1025 int i, ntd, l, tog, maxp;
1026 int addr = upipe->pipe.device->address;
1027 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1028
1029 DPRINTFN(15, ("uhci_alloc_std_chain: len=%d\n", len));
1030 if (len == 0) {
1031 *sp = *ep = 0;
1032 DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n"));
1033 return (USBD_NORMAL_COMPLETION);
1034 }
1035 ls = upipe->pipe.device->lowspeed ? UHCI_TD_LS : 0;
1036 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1037 if (maxp == 0) {
1038 printf("uhci_alloc_std_chain: maxp=0\n");
1039 return (USBD_INVAL);
1040 }
1041 ntd = (len + maxp - 1) / maxp;
1042 tog = upipe->pipe.endpoint->toggle;
1043 if (ntd % 2 == 0)
1044 tog ^= 1;
1045 upipe->newtoggle = tog ^ 1;
1046 lastp = 0;
1047 lastlink = UHCI_PTR_T;
1048 ntd--;
1049 for (i = ntd; i >= 0; i--) {
1050 p = uhci_alloc_std(sc);
1051 if (!p) {
1052 uhci_free_std_chain(sc, lastp, 0);
1053 return (USBD_NOMEM);
1054 }
1055 p->td->link.std = lastp;
1056 p->td->td_link = lastlink;
1057 lastp = p;
1058 lastlink = p->physaddr;
1059 p->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
1060 if (i == ntd) {
1061 /* last TD */
1062 l = len % maxp;
1063 if (l == 0) l = maxp;
1064 *ep = p;
1065 } else
1066 l = maxp;
1067 p->td->td_token =
1068 rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1069 UHCI_TD_OUT(l, endpt, addr, tog);
1070 p->td->td_buffer = DMAADDR(dma) + i * maxp;
1071 tog ^= 1;
1072 }
1073 *sp = lastp;
1074 /*upipe->pipe.endpoint->toggle = tog;*/
1075 DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d newtog=%d\n",
1076 upipe->pipe.endpoint->toggle, upipe->newtoggle));
1077 return (USBD_NORMAL_COMPLETION);
1078 }
1079
1080 usbd_status
1081 uhci_device_bulk_transfer(reqh)
1082 usbd_request_handle reqh;
1083 {
1084 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1085 usbd_device_handle dev = upipe->pipe.device;
1086 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1087 uhci_intr_info_t *ii = upipe->iinfo;
1088 uhci_soft_td_t *xfer, *xferend;
1089 uhci_soft_qh_t *sqh;
1090 usb_dma_t *dmap;
1091 usbd_status r;
1092 int len, isread;
1093 int s;
1094
1095 DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d "
1096 "flags=%d\n",
1097 reqh, reqh->buffer, reqh->length, reqh->flags));
1098
1099 if (reqh->isreq)
1100 panic("uhci_device_bulk_transfer: a request\n");
1101
1102 len = reqh->length;
1103 dmap = &upipe->u.bulk.datadma;
1104 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
1105 sqh = upipe->u.bulk.sqh;
1106
1107 upipe->u.bulk.isread = isread;
1108 upipe->u.bulk.length = len;
1109
1110 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1111 if (r != USBD_NORMAL_COMPLETION)
1112 goto ret1;
1113 r = uhci_alloc_std_chain(upipe, sc, len, isread,
1114 dmap, &xfer, &xferend);
1115 if (r != USBD_NORMAL_COMPLETION)
1116 goto ret2;
1117 xferend->td->td_status |= UHCI_TD_IOC;
1118
1119 if (!isread && len != 0)
1120 memcpy(KERNADDR(dmap), reqh->buffer, len);
1121
1122 #ifdef USB_DEBUG
1123 if (uhcidebug > 10) {
1124 printf("uhci_device_bulk_transfer: xfer(1)\n");
1125 uhci_dump_tds(xfer);
1126 }
1127 #endif
1128
1129 /* Set up interrupt info. */
1130 ii->reqh = reqh;
1131 ii->stdstart = xfer;
1132 ii->stdend = xferend;
1133 #ifdef DIAGNOSTIC
1134 ii->isdone = 0;
1135 #endif
1136
1137 sqh->qh->elink = xfer;
1138 sqh->qh->qh_elink = xfer->physaddr;
1139 sqh->intr_info = ii;
1140
1141 s = splusb();
1142 uhci_add_bulk(sc, sqh);
1143 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1144
1145 if (reqh->timeout && !sc->sc_bus.use_polling)
1146 timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout));
1147 splx(s);
1148
1149 #ifdef USB_DEBUG
1150 if (uhcidebug > 10) {
1151 printf("uhci_device_bulk_transfer: xfer(2)\n");
1152 uhci_dump_tds(xfer);
1153 }
1154 #endif
1155
1156 return (USBD_IN_PROGRESS);
1157
1158 ret2:
1159 if (len != 0)
1160 usb_freemem(sc->sc_dmatag, dmap);
1161 ret1:
1162 return (r);
1163 }
1164
1165 /* Abort a device bulk request. */
1166 void
1167 uhci_device_bulk_abort(reqh)
1168 usbd_request_handle reqh;
1169 {
1170 /* XXX inactivate */
1171 usbd_delay_ms(reqh->pipe->device->bus, 1);/* make sure it is done */
1172 /* XXX call done */
1173 }
1174
1175 /* Close a device bulk pipe. */
1176 void
1177 uhci_device_bulk_close(pipe)
1178 usbd_pipe_handle pipe;
1179 {
1180 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1181 usbd_device_handle dev = upipe->pipe.device;
1182 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1183
1184 uhci_free_sqh(sc, upipe->u.bulk.sqh);
1185 uhci_free_intr_info(upipe->iinfo);
1186 /* XXX free other resources */
1187 }
1188
1189 usbd_status
1190 uhci_device_ctrl_transfer(reqh)
1191 usbd_request_handle reqh;
1192 {
1193 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1194 usbd_status r;
1195
1196 if (!reqh->isreq)
1197 panic("uhci_device_ctrl_transfer: not a request\n");
1198
1199 r = uhci_device_request(reqh);
1200 if (r != USBD_NORMAL_COMPLETION)
1201 return (r);
1202
1203 if (sc->sc_bus.use_polling)
1204 uhci_waitintr(sc, reqh);
1205 return (USBD_IN_PROGRESS);
1206 }
1207
1208 usbd_status
1209 uhci_device_intr_transfer(reqh)
1210 usbd_request_handle reqh;
1211 {
1212 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1213 usbd_device_handle dev = upipe->pipe.device;
1214 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1215 uhci_intr_info_t *ii = upipe->iinfo;
1216 uhci_soft_td_t *xfer, *xferend;
1217 uhci_soft_qh_t *sqh;
1218 usb_dma_t *dmap;
1219 usbd_status r;
1220 int len, i;
1221 int s;
1222
1223 DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d "
1224 "flags=%d\n",
1225 reqh, reqh->buffer, reqh->length, reqh->flags));
1226
1227 if (reqh->isreq)
1228 panic("uhci_device_intr_transfer: a request\n");
1229
1230 len = reqh->length;
1231 dmap = &upipe->u.intr.datadma;
1232 if (len == 0)
1233 return (USBD_INVAL); /* XXX should it be? */
1234
1235 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1236 if (r != USBD_NORMAL_COMPLETION)
1237 goto ret1;
1238 r = uhci_alloc_std_chain(upipe, sc, len, 1, dmap, &xfer, &xferend);
1239 if (r != USBD_NORMAL_COMPLETION)
1240 goto ret2;
1241 xferend->td->td_status |= UHCI_TD_IOC;
1242
1243 #ifdef USB_DEBUG
1244 if (uhcidebug > 10) {
1245 printf("uhci_device_intr_transfer: xfer(1)\n");
1246 uhci_dump_tds(xfer);
1247 uhci_dump_qh(upipe->u.intr.qhs[0]);
1248 }
1249 #endif
1250
1251 s = splusb();
1252 /* Set up interrupt info. */
1253 ii->reqh = reqh;
1254 ii->stdstart = xfer;
1255 ii->stdend = xferend;
1256 #ifdef DIAGNOSTIC
1257 ii->isdone = 0;
1258 #endif
1259
1260 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
1261 upipe->u.intr.qhs[0]));
1262 for (i = 0; i < upipe->u.intr.npoll; i++) {
1263 sqh = upipe->u.intr.qhs[i];
1264 sqh->qh->elink = xfer;
1265 sqh->qh->qh_elink = xfer->physaddr;
1266 }
1267 splx(s);
1268
1269 #ifdef USB_DEBUG
1270 if (uhcidebug > 10) {
1271 printf("uhci_device_intr_transfer: xfer(2)\n");
1272 uhci_dump_tds(xfer);
1273 uhci_dump_qh(upipe->u.intr.qhs[0]);
1274 }
1275 #endif
1276
1277 return (USBD_IN_PROGRESS);
1278
1279 ret2:
1280 if (len != 0)
1281 usb_freemem(sc->sc_dmatag, dmap);
1282 ret1:
1283 return (r);
1284 }
1285
1286 /* Abort a device control request. */
1287 void
1288 uhci_device_ctrl_abort(reqh)
1289 usbd_request_handle reqh;
1290 {
1291 /* XXX inactivate */
1292 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
1293 /* XXX call done */
1294 }
1295
1296 /* Close a device control pipe. */
1297 void
1298 uhci_device_ctrl_close(pipe)
1299 usbd_pipe_handle pipe;
1300 {
1301 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1302
1303 uhci_free_intr_info(upipe->iinfo);
1304 /* XXX free other resources */
1305 }
1306
1307 /* Abort a device interrupt request. */
1308 void
1309 uhci_device_intr_abort(reqh)
1310 usbd_request_handle reqh;
1311 {
1312 struct uhci_pipe *upipe;
1313
1314 DPRINTFN(1, ("uhci_device_intr_abort: reqh=%p\n", reqh));
1315 /* XXX inactivate */
1316 usbd_delay_ms(reqh->pipe->device->bus, 2); /* make sure it is done */
1317 if (reqh->pipe->intrreqh == reqh) {
1318 DPRINTF(("uhci_device_intr_abort: remove\n"));
1319 reqh->pipe->intrreqh = 0;
1320 upipe = (struct uhci_pipe *)reqh->pipe;
1321 uhci_intr_done(upipe->u.intr.qhs[0]->intr_info);
1322 }
1323 }
1324
1325 /* Close a device interrupt pipe. */
1326 void
1327 uhci_device_intr_close(pipe)
1328 usbd_pipe_handle pipe;
1329 {
1330 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1331 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1332 int i, s, npoll;
1333
1334 upipe->iinfo->stdstart = 0; /* inactive */
1335
1336 /* Unlink descriptors from controller data structures. */
1337 npoll = upipe->u.intr.npoll;
1338 uhci_lock_frames(sc);
1339 for (i = 0; i < npoll; i++)
1340 uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos,
1341 upipe->u.intr.qhs[i]);
1342 uhci_unlock_frames(sc);
1343
1344 /*
1345 * We now have to wait for any activity on the physical
1346 * descriptors to stop.
1347 */
1348 usbd_delay_ms(&sc->sc_bus, 2);
1349
1350 for(i = 0; i < npoll; i++)
1351 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
1352 free(upipe->u.intr.qhs, M_USB);
1353
1354 s = splusb();
1355 LIST_REMOVE(upipe->iinfo, list); /* remove from active list */
1356 splx(s);
1357 uhci_free_intr_info(upipe->iinfo);
1358
1359 /* XXX free other resources */
1360 }
1361
1362 usbd_status
1363 uhci_device_request(reqh)
1364 usbd_request_handle reqh;
1365 {
1366 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1367 usb_device_request_t *req = &reqh->request;
1368 usbd_device_handle dev = upipe->pipe.device;
1369 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1370 int addr = dev->address;
1371 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1372 uhci_intr_info_t *ii = upipe->iinfo;
1373 uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend;
1374 uhci_soft_qh_t *sqh;
1375 usb_dma_t *dmap;
1376 int len;
1377 u_int32_t ls;
1378 usbd_status r;
1379 int isread;
1380 int s;
1381
1382 DPRINTFN(1,("uhci_device_control type=0x%02x, request=0x%02x, "
1383 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1384 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1385 UGETW(req->wIndex), UGETW(req->wLength),
1386 addr, endpt));
1387
1388 ls = dev->lowspeed ? UHCI_TD_LS : 0;
1389 isread = req->bmRequestType & UT_READ;
1390 len = UGETW(req->wLength);
1391
1392 setup = upipe->u.ctl.setup;
1393 stat = upipe->u.ctl.stat;
1394 sqh = upipe->u.ctl.sqh;
1395 dmap = &upipe->u.ctl.datadma;
1396
1397 /* Set up data transaction */
1398 if (len != 0) {
1399 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1400 if (r != USBD_NORMAL_COMPLETION)
1401 goto ret1;
1402 upipe->pipe.endpoint->toggle = 1;
1403 r = uhci_alloc_std_chain(upipe, sc, len, isread,
1404 dmap, &xfer, &xferend);
1405 if (r != USBD_NORMAL_COMPLETION)
1406 goto ret2;
1407 next = xfer;
1408 xferend->td->link.std = stat;
1409 xferend->td->td_link = stat->physaddr;
1410 } else {
1411 xfer = 0;
1412 next = stat;
1413 }
1414 upipe->u.ctl.length = len;
1415 upipe->u.ctl.xferend = xferend;
1416
1417 memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
1418 if (!isread && len != 0)
1419 memcpy(KERNADDR(dmap), reqh->buffer, len);
1420
1421 setup->td->link.std = next;
1422 setup->td->td_link = next->physaddr;
1423 setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
1424 setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr);
1425 setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma);
1426
1427 stat->td->link.std = 0;
1428 stat->td->td_link = UHCI_PTR_T;
1429 stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls |
1430 UHCI_TD_ACTIVE | UHCI_TD_IOC;
1431 stat->td->td_token =
1432 isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
1433 UHCI_TD_IN (0, endpt, addr, 1);
1434 stat->td->td_buffer = 0;
1435
1436 #ifdef USB_DEBUG
1437 if (uhcidebug > 20) {
1438 printf("uhci_device_request: setup\n");
1439 uhci_dump_td(setup);
1440 printf("uhci_device_request: stat\n");
1441 uhci_dump_td(stat);
1442 }
1443 #endif
1444
1445 /* Set up interrupt info. */
1446 ii->reqh = reqh;
1447 ii->stdstart = setup;
1448 ii->stdend = stat;
1449 #ifdef DIAGNOSTIC
1450 ii->isdone = 0;
1451 #endif
1452
1453 sqh->qh->elink = setup;
1454 sqh->qh->qh_elink = setup->physaddr;
1455 sqh->intr_info = ii;
1456
1457 s = splusb();
1458 uhci_add_ctrl(sc, sqh);
1459 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1460 #ifdef USB_DEBUG
1461 if (uhcidebug > 12) {
1462 uhci_soft_td_t *std;
1463 uhci_soft_qh_t *xqh;
1464 uhci_physaddr_t link;
1465 printf("uhci_enter_ctl_q: follow from [0]\n");
1466 for (std = sc->sc_vframes[0].htd, link = 0;
1467 (link & UHCI_PTR_Q) == 0;
1468 std = std->td->link.std) {
1469 link = std->td->td_link;
1470 uhci_dump_td(std);
1471 }
1472 for (xqh = (uhci_soft_qh_t *)std;
1473 xqh;
1474 xqh = xqh->qh->hlink)
1475 uhci_dump_qh(xqh);
1476 printf("Enqueued QH:\n");
1477 uhci_dump_qh(sqh);
1478 uhci_dump_tds(sqh->qh->elink);
1479 }
1480 #endif
1481 if (reqh->timeout && !sc->sc_bus.use_polling)
1482 timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout));
1483 splx(s);
1484
1485 return (USBD_NORMAL_COMPLETION);
1486
1487 ret2:
1488 if (len != 0)
1489 usb_freemem(sc->sc_dmatag, dmap);
1490 ret1:
1491 return (r);
1492 }
1493
1494 void
1495 uhci_intr_done(ii)
1496 uhci_intr_info_t *ii;
1497 {
1498 uhci_softc_t *sc = ii->sc;
1499 usbd_request_handle reqh = ii->reqh;
1500 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1501 usb_dma_t *dma;
1502 uhci_soft_qh_t *sqh;
1503 int i, npoll;
1504
1505 DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen));
1506
1507 dma = &upipe->u.intr.datadma;
1508 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
1509 npoll = upipe->u.intr.npoll;
1510 for(i = 0; i < npoll; i++) {
1511 sqh = upipe->u.intr.qhs[i];
1512 sqh->qh->elink = 0;
1513 sqh->qh->qh_elink = UHCI_PTR_T;
1514 }
1515 uhci_free_std_chain(sc, ii->stdstart, 0);
1516
1517 /* XXX Wasteful. */
1518 if (reqh->pipe->intrreqh == reqh) {
1519 uhci_soft_td_t *xfer, *xferend;
1520
1521 /* This alloc cannot fail since we freed the chain above. */
1522 uhci_alloc_std_chain(upipe, sc, reqh->length, 1, dma,
1523 &xfer, &xferend);
1524 xferend->td->td_status |= UHCI_TD_IOC;
1525
1526 #ifdef USB_DEBUG
1527 if (uhcidebug > 10) {
1528 printf("uhci_device_intr_done: xfer(1)\n");
1529 uhci_dump_tds(xfer);
1530 uhci_dump_qh(upipe->u.intr.qhs[0]);
1531 }
1532 #endif
1533
1534 ii->stdstart = xfer;
1535 ii->stdend = xferend;
1536 #ifdef DIAGNOSTIC
1537 ii->isdone = 0;
1538 #endif
1539 for (i = 0; i < npoll; i++) {
1540 sqh = upipe->u.intr.qhs[i];
1541 sqh->qh->elink = xfer;
1542 sqh->qh->qh_elink = xfer->physaddr;
1543 }
1544 } else {
1545 usb_freemem(sc->sc_dmatag, dma);
1546 ii->stdstart = 0; /* mark as inactive */
1547 }
1548 }
1549
1550 /* Deallocate request data structures */
1551 void
1552 uhci_ctrl_done(ii)
1553 uhci_intr_info_t *ii;
1554 {
1555 uhci_softc_t *sc = ii->sc;
1556 usbd_request_handle reqh = ii->reqh;
1557 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1558 u_int len = upipe->u.ctl.length;
1559 usb_dma_t *dma;
1560 uhci_td_t *htd = ii->stdstart->td;
1561
1562 #ifdef DIAGNOSTIC
1563 if (!reqh->isreq)
1564 panic("uhci_ctrl_done: not a request\n");
1565 #endif
1566
1567 LIST_REMOVE(ii, list); /* remove from active list */
1568
1569 uhci_remove_ctrl(sc, upipe->u.ctl.sqh);
1570
1571 if (len != 0) {
1572 dma = &upipe->u.ctl.datadma;
1573 if (reqh->request.bmRequestType & UT_READ)
1574 memcpy(reqh->buffer, KERNADDR(dma), len);
1575 uhci_free_std_chain(sc, htd->link.std, ii->stdend);
1576 usb_freemem(sc->sc_dmatag, dma);
1577 }
1578 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen));
1579 }
1580
1581 /* Deallocate request data structures */
1582 void
1583 uhci_bulk_done(ii)
1584 uhci_intr_info_t *ii;
1585 {
1586 uhci_softc_t *sc = ii->sc;
1587 usbd_request_handle reqh = ii->reqh;
1588 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1589 u_int len = upipe->u.bulk.length;
1590 usb_dma_t *dma;
1591 uhci_td_t *htd = ii->stdstart->td;
1592
1593 LIST_REMOVE(ii, list); /* remove from active list */
1594
1595 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
1596
1597 if (len != 0) {
1598 dma = &upipe->u.bulk.datadma;
1599 if (upipe->u.bulk.isread && len != 0)
1600 memcpy(reqh->buffer, KERNADDR(dma), len);
1601 uhci_free_std_chain(sc, htd->link.std, 0);
1602 usb_freemem(sc->sc_dmatag, dma);
1603 }
1604 DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen));
1605 /* XXX compute new toggle */
1606 }
1607
1608 /* Add interrupt QH, called with vflock. */
1609 void
1610 uhci_add_intr(sc, n, sqh)
1611 uhci_softc_t *sc;
1612 int n;
1613 uhci_soft_qh_t *sqh;
1614 {
1615 struct uhci_vframe *vf = &sc->sc_vframes[n];
1616 uhci_qh_t *eqh;
1617
1618 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh));
1619 eqh = vf->eqh->qh;
1620 sqh->qh->hlink = eqh->hlink;
1621 sqh->qh->qh_hlink = eqh->qh_hlink;
1622 eqh->hlink = sqh;
1623 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
1624 vf->eqh = sqh;
1625 vf->bandwidth++;
1626 }
1627
1628 /* Remove interrupt QH, called with vflock. */
1629 void
1630 uhci_remove_intr(sc, n, sqh)
1631 uhci_softc_t *sc;
1632 int n;
1633 uhci_soft_qh_t *sqh;
1634 {
1635 struct uhci_vframe *vf = &sc->sc_vframes[n];
1636 uhci_soft_qh_t *pqh;
1637
1638 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh));
1639
1640 for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink)
1641 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
1642 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
1643 printf("uhci_remove_intr: QH not found\n");
1644 return;
1645 }
1646 #else
1647 ;
1648 #endif
1649 pqh->qh->hlink = sqh->qh->hlink;
1650 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
1651 if (vf->eqh == sqh)
1652 vf->eqh = pqh;
1653 vf->bandwidth--;
1654 }
1655
1656 usbd_status
1657 uhci_device_setintr(sc, upipe, ival)
1658 uhci_softc_t *sc;
1659 struct uhci_pipe *upipe;
1660 int ival;
1661 {
1662 uhci_soft_qh_t *sqh;
1663 int i, npoll, s;
1664 u_int bestbw, bw, bestoffs, offs;
1665
1666 DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
1667 if (ival == 0) {
1668 printf("uhci_setintr: 0 interval\n");
1669 return (USBD_INVAL);
1670 }
1671
1672 if (ival > UHCI_VFRAMELIST_COUNT)
1673 ival = UHCI_VFRAMELIST_COUNT;
1674 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
1675 DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
1676
1677 upipe->u.intr.npoll = npoll;
1678 upipe->u.intr.qhs =
1679 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USB, M_WAITOK);
1680
1681 /*
1682 * Figure out which offset in the schedule that has most
1683 * bandwidth left over.
1684 */
1685 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
1686 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
1687 for (bw = i = 0; i < npoll; i++)
1688 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
1689 if (bw < bestbw) {
1690 bestbw = bw;
1691 bestoffs = offs;
1692 }
1693 }
1694 DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
1695
1696 upipe->iinfo->stdstart = 0;
1697 for(i = 0; i < npoll; i++) {
1698 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
1699 sqh->qh->elink = 0;
1700 sqh->qh->qh_elink = UHCI_PTR_T;
1701 sqh->pos = MOD(i * ival + bestoffs);
1702 sqh->intr_info = upipe->iinfo;
1703 }
1704 #undef MOD
1705
1706 s = splusb();
1707 LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list);
1708 splx(s);
1709
1710 uhci_lock_frames(sc);
1711 /* Enter QHs into the controller data structures. */
1712 for(i = 0; i < npoll; i++)
1713 uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos,
1714 upipe->u.intr.qhs[i]);
1715 uhci_unlock_frames(sc);
1716
1717 DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
1718 return (USBD_NORMAL_COMPLETION);
1719 }
1720
1721 /* Open a new pipe. */
1722 usbd_status
1723 uhci_open(pipe)
1724 usbd_pipe_handle pipe;
1725 {
1726 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1727 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1728 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1729 usbd_status r;
1730
1731 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1732 pipe, pipe->device->address,
1733 ed->bEndpointAddress, sc->sc_addr));
1734 if (pipe->device->address == sc->sc_addr) {
1735 switch (ed->bEndpointAddress) {
1736 case USB_CONTROL_ENDPOINT:
1737 pipe->methods = &uhci_root_ctrl_methods;
1738 break;
1739 case UE_IN | UHCI_INTR_ENDPT:
1740 pipe->methods = &uhci_root_intr_methods;
1741 break;
1742 default:
1743 return (USBD_INVAL);
1744 }
1745 } else {
1746 upipe->iinfo = uhci_alloc_intr_info(sc);
1747 if (upipe->iinfo == 0)
1748 return (USBD_NOMEM);
1749 switch (ed->bmAttributes & UE_XFERTYPE) {
1750 case UE_CONTROL:
1751 pipe->methods = &uhci_device_ctrl_methods;
1752 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
1753 if (upipe->u.ctl.sqh == 0)
1754 goto bad;
1755 upipe->u.ctl.setup = uhci_alloc_std(sc);
1756 if (upipe->u.ctl.setup == 0) {
1757 uhci_free_sqh(sc, upipe->u.ctl.sqh);
1758 goto bad;
1759 }
1760 upipe->u.ctl.stat = uhci_alloc_std(sc);
1761 if (upipe->u.ctl.stat == 0) {
1762 uhci_free_sqh(sc, upipe->u.ctl.sqh);
1763 uhci_free_std(sc, upipe->u.ctl.setup);
1764 goto bad;
1765 }
1766 r = usb_allocmem(sc->sc_dmatag,
1767 sizeof(usb_device_request_t),
1768 0, &upipe->u.ctl.reqdma);
1769 if (r != USBD_NORMAL_COMPLETION) {
1770 uhci_free_sqh(sc, upipe->u.ctl.sqh);
1771 uhci_free_std(sc, upipe->u.ctl.setup);
1772 uhci_free_std(sc, upipe->u.ctl.stat);
1773 goto bad;
1774 }
1775 break;
1776 case UE_INTERRUPT:
1777 pipe->methods = &uhci_device_intr_methods;
1778 return (uhci_device_setintr(sc, upipe, ed->bInterval));
1779 case UE_ISOCHRONOUS:
1780 printf("uhci_open: iso not implemented\n");
1781 return (USBD_XXX);
1782 case UE_BULK:
1783 pipe->methods = &uhci_device_bulk_methods;
1784 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
1785 if (upipe->u.bulk.sqh == 0)
1786 goto bad;
1787 break;
1788 }
1789 }
1790 return (USBD_NORMAL_COMPLETION);
1791
1792 bad:
1793 uhci_free_intr_info(upipe->iinfo);
1794 return (USBD_NOMEM);
1795 }
1796
1797 /*
1798 * Data structures and routines to emulate the root hub.
1799 */
1800 usb_device_descriptor_t uhci_devd = {
1801 USB_DEVICE_DESCRIPTOR_SIZE,
1802 UDESC_DEVICE, /* type */
1803 {0x00, 0x01}, /* USB version */
1804 UCLASS_HUB, /* class */
1805 USUBCLASS_HUB, /* subclass */
1806 0, /* protocol */
1807 64, /* max packet */
1808 {0},{0},{0x00,0x01}, /* device id */
1809 1,2,0, /* string indicies */
1810 1 /* # of configurations */
1811 };
1812
1813 usb_config_descriptor_t uhci_confd = {
1814 USB_CONFIG_DESCRIPTOR_SIZE,
1815 UDESC_CONFIG,
1816 {USB_CONFIG_DESCRIPTOR_SIZE +
1817 USB_INTERFACE_DESCRIPTOR_SIZE +
1818 USB_ENDPOINT_DESCRIPTOR_SIZE},
1819 1,
1820 1,
1821 0,
1822 UC_SELF_POWERED,
1823 0 /* max power */
1824 };
1825
1826 usb_interface_descriptor_t uhci_ifcd = {
1827 USB_INTERFACE_DESCRIPTOR_SIZE,
1828 UDESC_INTERFACE,
1829 0,
1830 0,
1831 1,
1832 UCLASS_HUB,
1833 USUBCLASS_HUB,
1834 0,
1835 0
1836 };
1837
1838 usb_endpoint_descriptor_t uhci_endpd = {
1839 USB_ENDPOINT_DESCRIPTOR_SIZE,
1840 UDESC_ENDPOINT,
1841 UE_IN | UHCI_INTR_ENDPT,
1842 UE_INTERRUPT,
1843 {8},
1844 255
1845 };
1846
1847 usb_hub_descriptor_t uhci_hubd_piix = {
1848 USB_HUB_DESCRIPTOR_SIZE,
1849 UDESC_HUB,
1850 2,
1851 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
1852 50, /* power on to power good */
1853 0,
1854 { 0x00 }, /* both ports are removable */
1855 { 0x00 }, /* no ports can power down individually */
1856 };
1857
1858 int
1859 uhci_str(p, l, s)
1860 usb_string_descriptor_t *p;
1861 int l;
1862 char *s;
1863 {
1864 int i;
1865
1866 if (l == 0)
1867 return (0);
1868 p->bLength = 2 * strlen(s) + 2;
1869 if (l == 1)
1870 return (1);
1871 p->bDescriptorType = UDESC_STRING;
1872 l -= 2;
1873 for (i = 0; s[i] && l > 1; i++, l -= 2)
1874 USETW2(p->bString[i], 0, s[i]);
1875 return (2*i+2);
1876 }
1877
1878 /*
1879 * Simulate a hardware hub by handling all the necessary requests.
1880 */
1881 usbd_status
1882 uhci_root_ctrl_transfer(reqh)
1883 usbd_request_handle reqh;
1884 {
1885 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1886 usb_device_request_t *req;
1887 void *buf;
1888 int port, x;
1889 int len, value, index, status, change, l, totlen = 0;
1890 usb_port_status_t ps;
1891 usbd_status r;
1892
1893 if (!reqh->isreq)
1894 panic("uhci_root_ctrl_transfer: not a request\n");
1895 req = &reqh->request;
1896 buf = reqh->buffer;
1897
1898 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
1899 req->bmRequestType, req->bRequest));
1900
1901 len = UGETW(req->wLength);
1902 value = UGETW(req->wValue);
1903 index = UGETW(req->wIndex);
1904 #define C(x,y) ((x) | ((y) << 8))
1905 switch(C(req->bRequest, req->bmRequestType)) {
1906 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1907 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1908 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1909 /*
1910 * DEVICE_REMOTE_WAKEUP and ENDPOINT_STALL are no-ops
1911 * for the integrated root hub.
1912 */
1913 break;
1914 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1915 if (len > 0) {
1916 *(u_int8_t *)buf = sc->sc_conf;
1917 totlen = 1;
1918 }
1919 break;
1920 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1921 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
1922 switch(value >> 8) {
1923 case UDESC_DEVICE:
1924 if ((value & 0xff) != 0) {
1925 r = USBD_IOERROR;
1926 goto ret;
1927 }
1928 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1929 memcpy(buf, &uhci_devd, l);
1930 break;
1931 case UDESC_CONFIG:
1932 if ((value & 0xff) != 0) {
1933 r = USBD_IOERROR;
1934 goto ret;
1935 }
1936 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1937 memcpy(buf, &uhci_confd, l);
1938 buf = (char *)buf + l;
1939 len -= l;
1940 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1941 totlen += l;
1942 memcpy(buf, &uhci_ifcd, l);
1943 buf = (char *)buf + l;
1944 len -= l;
1945 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1946 totlen += l;
1947 memcpy(buf, &uhci_endpd, l);
1948 break;
1949 case UDESC_STRING:
1950 if (len == 0)
1951 break;
1952 *(u_int8_t *)buf = 0;
1953 totlen = 1;
1954 switch (value & 0xff) {
1955 case 1: /* Vendor */
1956 totlen = uhci_str(buf, len, sc->sc_vendor);
1957 break;
1958 case 2: /* Product */
1959 totlen = uhci_str(buf, len, "UHCI root hub");
1960 break;
1961 }
1962 break;
1963 default:
1964 r = USBD_IOERROR;
1965 goto ret;
1966 }
1967 break;
1968 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1969 if (len > 0) {
1970 *(u_int8_t *)buf = 0;
1971 totlen = 1;
1972 }
1973 break;
1974 case C(UR_GET_STATUS, UT_READ_DEVICE):
1975 if (len > 1) {
1976 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1977 totlen = 2;
1978 }
1979 break;
1980 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1981 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1982 if (len > 1) {
1983 USETW(((usb_status_t *)buf)->wStatus, 0);
1984 totlen = 2;
1985 }
1986 break;
1987 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1988 if (value >= USB_MAX_DEVICES) {
1989 r = USBD_IOERROR;
1990 goto ret;
1991 }
1992 sc->sc_addr = value;
1993 break;
1994 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1995 if (value != 0 && value != 1) {
1996 r = USBD_IOERROR;
1997 goto ret;
1998 }
1999 sc->sc_conf = value;
2000 break;
2001 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2002 break;
2003 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2004 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2005 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2006 r = USBD_IOERROR;
2007 goto ret;
2008 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2009 break;
2010 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2011 break;
2012 /* Hub requests */
2013 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2014 break;
2015 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2016 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2017 "port=%d feature=%d\n",
2018 index, value));
2019 if (index == 1)
2020 port = UHCI_PORTSC1;
2021 else if (index == 2)
2022 port = UHCI_PORTSC2;
2023 else {
2024 r = USBD_IOERROR;
2025 goto ret;
2026 }
2027 switch(value) {
2028 case UHF_PORT_ENABLE:
2029 x = UREAD2(sc, port);
2030 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
2031 break;
2032 case UHF_PORT_SUSPEND:
2033 x = UREAD2(sc, port);
2034 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
2035 break;
2036 case UHF_PORT_RESET:
2037 x = UREAD2(sc, port);
2038 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2039 break;
2040 case UHF_C_PORT_CONNECTION:
2041 x = UREAD2(sc, port);
2042 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
2043 break;
2044 case UHF_C_PORT_ENABLE:
2045 x = UREAD2(sc, port);
2046 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
2047 break;
2048 case UHF_C_PORT_OVER_CURRENT:
2049 x = UREAD2(sc, port);
2050 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
2051 break;
2052 case UHF_C_PORT_RESET:
2053 sc->sc_isreset = 0;
2054 r = USBD_NORMAL_COMPLETION;
2055 goto ret;
2056 case UHF_PORT_CONNECTION:
2057 case UHF_PORT_OVER_CURRENT:
2058 case UHF_PORT_POWER:
2059 case UHF_PORT_LOW_SPEED:
2060 case UHF_C_PORT_SUSPEND:
2061 default:
2062 r = USBD_IOERROR;
2063 goto ret;
2064 }
2065 break;
2066 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
2067 if (index == 1)
2068 port = UHCI_PORTSC1;
2069 else if (index == 2)
2070 port = UHCI_PORTSC2;
2071 else {
2072 r = USBD_IOERROR;
2073 goto ret;
2074 }
2075 if (len > 0) {
2076 *(u_int8_t *)buf =
2077 (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
2078 UHCI_PORTSC_LS_SHIFT;
2079 totlen = 1;
2080 }
2081 break;
2082 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2083 if (value != 0) {
2084 r = USBD_IOERROR;
2085 goto ret;
2086 }
2087 l = min(len, USB_HUB_DESCRIPTOR_SIZE);
2088 totlen = l;
2089 memcpy(buf, &uhci_hubd_piix, l);
2090 break;
2091 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2092 if (len != 4) {
2093 r = USBD_IOERROR;
2094 goto ret;
2095 }
2096 memset(buf, 0, len);
2097 totlen = len;
2098 break;
2099 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2100 if (index == 1)
2101 port = UHCI_PORTSC1;
2102 else if (index == 2)
2103 port = UHCI_PORTSC2;
2104 else {
2105 r = USBD_IOERROR;
2106 goto ret;
2107 }
2108 if (len != 4) {
2109 r = USBD_IOERROR;
2110 goto ret;
2111 }
2112 x = UREAD2(sc, port);
2113 status = change = 0;
2114 if (x & UHCI_PORTSC_CCS )
2115 status |= UPS_CURRENT_CONNECT_STATUS;
2116 if (x & UHCI_PORTSC_CSC )
2117 change |= UPS_C_CONNECT_STATUS;
2118 if (x & UHCI_PORTSC_PE )
2119 status |= UPS_PORT_ENABLED;
2120 if (x & UHCI_PORTSC_POEDC)
2121 change |= UPS_C_PORT_ENABLED;
2122 if (x & UHCI_PORTSC_OCI )
2123 status |= UPS_OVERCURRENT_INDICATOR;
2124 if (x & UHCI_PORTSC_OCIC )
2125 change |= UPS_C_OVERCURRENT_INDICATOR;
2126 if (x & UHCI_PORTSC_SUSP )
2127 status |= UPS_SUSPEND;
2128 if (x & UHCI_PORTSC_LSDA )
2129 status |= UPS_LOW_SPEED;
2130 status |= UPS_PORT_POWER;
2131 if (sc->sc_isreset)
2132 change |= UPS_C_PORT_RESET;
2133 USETW(ps.wPortStatus, status);
2134 USETW(ps.wPortChange, change);
2135 l = min(len, sizeof ps);
2136 memcpy(buf, &ps, l);
2137 totlen = l;
2138 break;
2139 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2140 r = USBD_IOERROR;
2141 goto ret;
2142 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2143 break;
2144 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2145 if (index == 1)
2146 port = UHCI_PORTSC1;
2147 else if (index == 2)
2148 port = UHCI_PORTSC2;
2149 else {
2150 r = USBD_IOERROR;
2151 goto ret;
2152 }
2153 switch(value) {
2154 case UHF_PORT_ENABLE:
2155 x = UREAD2(sc, port);
2156 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2157 break;
2158 case UHF_PORT_SUSPEND:
2159 x = UREAD2(sc, port);
2160 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
2161 break;
2162 case UHF_PORT_RESET:
2163 x = UREAD2(sc, port);
2164 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2165 usbd_delay_ms(&sc->sc_bus, 10);
2166 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2167 delay(100);
2168 x = UREAD2(sc, port);
2169 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2170 delay(100);
2171 DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
2172 index, UREAD2(sc, port)));
2173 sc->sc_isreset = 1;
2174 break;
2175 case UHF_C_PORT_CONNECTION:
2176 case UHF_C_PORT_ENABLE:
2177 case UHF_C_PORT_OVER_CURRENT:
2178 case UHF_PORT_CONNECTION:
2179 case UHF_PORT_OVER_CURRENT:
2180 case UHF_PORT_POWER:
2181 case UHF_PORT_LOW_SPEED:
2182 case UHF_C_PORT_SUSPEND:
2183 case UHF_C_PORT_RESET:
2184 default:
2185 r = USBD_IOERROR;
2186 goto ret;
2187 }
2188 break;
2189 default:
2190 r = USBD_IOERROR;
2191 goto ret;
2192 }
2193 reqh->actlen = totlen;
2194 r = USBD_NORMAL_COMPLETION;
2195 ret:
2196 reqh->status = r;
2197 reqh->xfercb(reqh);
2198 return (USBD_IN_PROGRESS);
2199 }
2200
2201 /* Abort a root control request. */
2202 void
2203 uhci_root_ctrl_abort(reqh)
2204 usbd_request_handle reqh;
2205 {
2206 /* Nothing to do, all transfers are syncronous. */
2207 }
2208
2209 /* Close the root pipe. */
2210 void
2211 uhci_root_ctrl_close(pipe)
2212 usbd_pipe_handle pipe;
2213 {
2214 untimeout(uhci_timo, pipe->intrreqh);
2215 DPRINTF(("uhci_root_ctrl_close\n"));
2216 }
2217
2218 /* Abort a root interrupt request. */
2219 void
2220 uhci_root_intr_abort(reqh)
2221 usbd_request_handle reqh;
2222 {
2223 untimeout(uhci_timo, reqh);
2224 }
2225
2226 /* Start a transfer on the root interrupt pipe */
2227 usbd_status
2228 uhci_root_intr_transfer(reqh)
2229 usbd_request_handle reqh;
2230 {
2231 usbd_pipe_handle pipe = reqh->pipe;
2232 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2233 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2234 usb_dma_t *dmap;
2235 usbd_status r;
2236 int len;
2237
2238 DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d "
2239 "flags=%d\n",
2240 reqh, reqh->buffer, reqh->length, reqh->flags));
2241
2242 len = reqh->length;
2243 dmap = &upipe->u.intr.datadma;
2244 if (len == 0)
2245 return (USBD_INVAL); /* XXX should it be? */
2246
2247 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2248 if (r != USBD_NORMAL_COMPLETION)
2249 return (r);
2250
2251 sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval);
2252 timeout(uhci_timo, reqh, sc->sc_ival);
2253 return (USBD_IN_PROGRESS);
2254 }
2255
2256 /* Close the root interrupt pipe. */
2257 void
2258 uhci_root_intr_close(pipe)
2259 usbd_pipe_handle pipe;
2260 {
2261 untimeout(uhci_timo, pipe->intrreqh);
2262 DPRINTF(("uhci_root_intr_close\n"));
2263 }
2264