uhci.c revision 1.14 1 /* $NetBSD: uhci.c,v 1.14 1998/12/28 02:06:25 augustss Exp $ */
2
3 /*
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 * Carlstedt Research & Technology.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * USB Universal Host Controller driver.
42 * Handles PIIX3 and PIIX4.
43 *
44 * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
45 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
46 * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf
47 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
48 */
49
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/kernel.h>
53 #include <sys/malloc.h>
54 #if defined(__NetBSD__)
55 #include <sys/device.h>
56 #elif defined(__FreeBSD__)
57 #include <sys/module.h>
58 #include <sys/bus.h>
59 #endif
60 #include <sys/proc.h>
61 #include <sys/queue.h>
62 #include <sys/select.h>
63
64 #include <machine/bus.h>
65
66 #include <dev/usb/usb.h>
67 #include <dev/usb/usbdi.h>
68 #include <dev/usb/usbdivar.h>
69 #include <dev/usb/usb_mem.h>
70 #include <dev/usb/usb_quirks.h>
71
72 #include <dev/usb/uhcireg.h>
73 #include <dev/usb/uhcivar.h>
74
75 #if defined(__FreeBSD__)
76 #include <machine/clock.h>
77 #include "dev/usb/queue.addendum.h"
78
79 #define delay(d) DELAY(d)
80 #endif
81
82 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
83
84 struct uhci_pipe {
85 struct usbd_pipe pipe;
86 uhci_intr_info_t *iinfo;
87 int newtoggle;
88 /* Info needed for different pipe kinds. */
89 union {
90 /* Control pipe */
91 struct {
92 uhci_soft_qh_t *sqh;
93 usb_dma_t reqdma;
94 usb_dma_t datadma;
95 uhci_soft_td_t *setup, *stat, *xferend;
96 u_int length;
97 } ctl;
98 /* Interrupt pipe */
99 struct {
100 usb_dma_t datadma;
101 int npoll;
102 uhci_soft_qh_t **qhs;
103 } intr;
104 /* Bulk pipe */
105 struct {
106 uhci_soft_qh_t *sqh;
107 usb_dma_t datadma;
108 u_int length;
109 int isread;
110 } bulk;
111 } u;
112 };
113
114 /*
115 * The uhci_intr_info free list can be global since they contain
116 * no dma specific data. The other free lists do.
117 */
118 LIST_HEAD(, uhci_intr_info) uhci_ii_free;
119
120 void uhci_busreset __P((uhci_softc_t *));
121 void uhci_run __P((uhci_softc_t *, int run));
122 uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *));
123 void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *));
124 uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *));
125 void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *));
126 uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *));
127 void uhci_free_intr_info __P((uhci_intr_info_t *ii));
128 void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *,
129 uhci_intr_info_t *));
130 void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *));
131
132 void uhci_free_std_chain __P((uhci_softc_t *,
133 uhci_soft_td_t *, uhci_soft_td_t *));
134 usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *,
135 int, int, usb_dma_t *,
136 uhci_soft_td_t **,
137 uhci_soft_td_t **));
138 void uhci_timo __P((void *));
139 void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle));
140 void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *));
141 void uhci_ii_done __P((uhci_intr_info_t *, int));
142 void uhci_timeout __P((void *));
143 void uhci_wakeup_ctrl __P((void *, int, int, void *, int));
144 void uhci_lock_frames __P((uhci_softc_t *));
145 void uhci_unlock_frames __P((uhci_softc_t *));
146 void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
147 void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
148 void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
149 void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
150 int uhci_str __P((usb_string_descriptor_t *, int, char *));
151
152 void uhci_device_close __P((struct uhci_pipe *));
153
154 void uhci_wakeup_cb __P((usbd_request_handle reqh));
155
156 usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle));
157 void uhci_device_ctrl_abort __P((usbd_request_handle));
158 void uhci_device_ctrl_close __P((usbd_pipe_handle));
159 usbd_status uhci_device_intr_transfer __P((usbd_request_handle));
160 void uhci_device_intr_abort __P((usbd_request_handle));
161 void uhci_device_intr_close __P((usbd_pipe_handle));
162 usbd_status uhci_device_bulk_transfer __P((usbd_request_handle));
163 void uhci_device_bulk_abort __P((usbd_request_handle));
164 void uhci_device_bulk_close __P((usbd_pipe_handle));
165
166 usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle));
167 void uhci_root_ctrl_abort __P((usbd_request_handle));
168 void uhci_root_ctrl_close __P((usbd_pipe_handle));
169 usbd_status uhci_root_intr_transfer __P((usbd_request_handle));
170 void uhci_root_intr_abort __P((usbd_request_handle));
171 void uhci_root_intr_close __P((usbd_pipe_handle));
172
173 usbd_status uhci_open __P((usbd_pipe_handle));
174 void uhci_poll __P((struct usbd_bus *));
175
176 usbd_status uhci_device_request __P((usbd_request_handle reqh));
177 void uhci_ctrl_done __P((uhci_intr_info_t *ii));
178 void uhci_bulk_done __P((uhci_intr_info_t *ii));
179
180 void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
181 void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
182 usbd_status uhci_device_setintr __P((uhci_softc_t *sc,
183 struct uhci_pipe *pipe, int ival));
184 void uhci_intr_done __P((uhci_intr_info_t *ii));
185
186 #ifdef USB_DEBUG
187 static void uhci_dumpregs __P((uhci_softc_t *));
188 void uhci_dump_tds __P((uhci_soft_td_t *));
189 void uhci_dump_qh __P((uhci_soft_qh_t *));
190 void uhci_dump __P((void));
191 void uhci_dump_td __P((uhci_soft_td_t *));
192 #endif
193
194 #if defined(__NetBSD__)
195 #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
196 #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
197 #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
198 #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
199 #elif defined(__FreeBSD__)
200 #define UWRITE2(sc,r,x) outw((sc)->sc_iobase + (r), (x))
201 #define UWRITE4(sc,r,x) outl((sc)->sc_iobase + (r), (x))
202 #define UREAD2(sc,r) inw((sc)->sc_iobase + (r))
203 #define UREAD4(sc,r) inl((sc)->sc_iobase + (r))
204 #endif
205
206 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
207 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
208
209 #define UHCI_RESET_TIMEOUT 100 /* reset timeout */
210 #define UHCI_CTRL_TIMEOUT 500 /* control transaction timeout */
211 #define UHCI_ISO_DELAY 50 /* delay of start of iso */
212
213 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
214
215 #define UHCI_INTR_ENDPT 1
216
217 struct usbd_methods uhci_root_ctrl_methods = {
218 uhci_root_ctrl_transfer,
219 uhci_root_ctrl_abort,
220 uhci_root_ctrl_close,
221 0,
222 };
223
224 struct usbd_methods uhci_root_intr_methods = {
225 uhci_root_intr_transfer,
226 uhci_root_intr_abort,
227 uhci_root_intr_close,
228 0,
229 };
230
231 struct usbd_methods uhci_device_ctrl_methods = {
232 uhci_device_ctrl_transfer,
233 uhci_device_ctrl_abort,
234 uhci_device_ctrl_close,
235 0,
236 };
237
238 struct usbd_methods uhci_device_intr_methods = {
239 uhci_device_intr_transfer,
240 uhci_device_intr_abort,
241 uhci_device_intr_close,
242 0,
243 };
244
245 struct usbd_methods uhci_device_bulk_methods = {
246 uhci_device_bulk_transfer,
247 uhci_device_bulk_abort,
248 uhci_device_bulk_close,
249 0,
250 };
251
252 void
253 uhci_busreset(sc)
254 uhci_softc_t *sc;
255 {
256 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
257 usbd_delay_ms(&sc->sc_bus, USB_RESET_DELAY); /* wait at least 10ms */
258 UHCICMD(sc, 0); /* do nothing */
259 }
260
261 usbd_status
262 uhci_init(sc)
263 uhci_softc_t *sc;
264 {
265 usbd_status r;
266 int i, j;
267 uhci_soft_qh_t *csqh, *bsqh, *sqh;
268 uhci_soft_td_t *std;
269 usb_dma_t dma;
270 static int uhci_global_init_done = 0;
271
272 DPRINTFN(1,("uhci_init: start\n"));
273
274 if (!uhci_global_init_done) {
275 uhci_global_init_done = 1;
276 LIST_INIT(&uhci_ii_free);
277 }
278
279 #if defined(USB_DEBUG)
280 if (uhcidebug > 2)
281 uhci_dumpregs(sc);
282 #endif
283
284 uhci_run(sc, 0); /* stop the controller */
285 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
286
287 /* Allocate and initialize real frame array. */
288 r = usb_allocmem(sc->sc_dmatag,
289 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
290 UHCI_FRAMELIST_ALIGN, &dma);
291 if (r != USBD_NORMAL_COMPLETION)
292 return (r);
293 sc->sc_pframes = KERNADDR(&dma);
294 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
295 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&dma)); /* set frame list */
296
297 uhci_busreset(sc);
298
299 /* Allocate the dummy QH where bulk traffic will be queued. */
300 bsqh = uhci_alloc_sqh(sc);
301 if (!bsqh)
302 return (USBD_NOMEM);
303 bsqh->qh->qh_hlink = UHCI_PTR_T; /* end of QH chain */
304 bsqh->qh->qh_elink = UHCI_PTR_T;
305 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
306
307 /* Allocate the dummy QH where control traffic will be queued. */
308 csqh = uhci_alloc_sqh(sc);
309 if (!csqh)
310 return (USBD_NOMEM);
311 csqh->qh->hlink = bsqh;
312 csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q;
313 csqh->qh->qh_elink = UHCI_PTR_T;
314 sc->sc_ctl_start = sc->sc_ctl_end = csqh;
315
316 /*
317 * Make all (virtual) frame list pointers point to the interrupt
318 * queue heads and the interrupt queue heads at the control
319 * queue head and point the physical frame list to the virtual.
320 */
321 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
322 std = uhci_alloc_std(sc);
323 sqh = uhci_alloc_sqh(sc);
324 if (!std || !sqh)
325 return (USBD_NOMEM);
326 std->td->link.sqh = sqh;
327 std->td->td_link = sqh->physaddr | UHCI_PTR_Q;
328 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */
329 std->td->td_token = 0;
330 std->td->td_buffer = 0;
331 sqh->qh->hlink = csqh;
332 sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q;
333 sqh->qh->elink = 0;
334 sqh->qh->qh_elink = UHCI_PTR_T;
335 sc->sc_vframes[i].htd = std;
336 sc->sc_vframes[i].etd = std;
337 sc->sc_vframes[i].hqh = sqh;
338 sc->sc_vframes[i].eqh = sqh;
339 for (j = i;
340 j < UHCI_FRAMELIST_COUNT;
341 j += UHCI_VFRAMELIST_COUNT)
342 sc->sc_pframes[j] = std->physaddr;
343 }
344
345 LIST_INIT(&sc->sc_intrhead);
346
347 /* Set up the bus struct. */
348 sc->sc_bus.open_pipe = uhci_open;
349 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
350 sc->sc_bus.do_poll = uhci_poll;
351
352 DPRINTFN(1,("uhci_init: enabling\n"));
353 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
354 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
355
356 uhci_run(sc, 1); /* and here we go... */
357 return (USBD_NORMAL_COMPLETION);
358 }
359
360 #ifdef USB_DEBUG
361 static void
362 uhci_dumpregs(sc)
363 uhci_softc_t *sc;
364 {
365 printf("%s; regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
366 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
367 USBDEVNAME(sc->sc_bus.bdev),
368 UREAD2(sc, UHCI_CMD),
369 UREAD2(sc, UHCI_STS),
370 UREAD2(sc, UHCI_INTR),
371 UREAD2(sc, UHCI_FRNUM),
372 UREAD2(sc, UHCI_FLBASEADDR),
373 UREAD2(sc, UHCI_SOF),
374 UREAD2(sc, UHCI_PORTSC1),
375 UREAD2(sc, UHCI_PORTSC2));
376 }
377
378 int uhci_longtd = 1;
379
380 void
381 uhci_dump_td(p)
382 uhci_soft_td_t *p;
383 {
384 printf("TD(%p) at %08lx = 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n",
385 p, (long)p->physaddr,
386 (long)p->td->td_link,
387 (long)p->td->td_status,
388 (long)p->td->td_token,
389 (long)p->td->td_buffer);
390 if (uhci_longtd)
391 printf(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
392 "D=%d,maxlen=%d\n",
393 (long)p->td->td_link,
394 "\20\1T\2Q\3VF",
395 (long)p->td->td_status,
396 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
397 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
398 UHCI_TD_GET_ERRCNT(p->td->td_status),
399 UHCI_TD_GET_ACTLEN(p->td->td_status),
400 UHCI_TD_GET_PID(p->td->td_token),
401 UHCI_TD_GET_DEVADDR(p->td->td_token),
402 UHCI_TD_GET_ENDPT(p->td->td_token),
403 UHCI_TD_GET_DT(p->td->td_token),
404 UHCI_TD_GET_MAXLEN(p->td->td_token));
405 }
406
407 void
408 uhci_dump_qh(p)
409 uhci_soft_qh_t *p;
410 {
411 printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr,
412 p->qh->qh_hlink, p->qh->qh_elink);
413 }
414
415
416 #if 0
417 void
418 uhci_dump()
419 {
420 uhci_softc_t *sc = uhci;
421
422 uhci_dumpregs(sc);
423 printf("intrs=%d\n", sc->sc_intrs);
424 printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);
425 uhci_dump_qh(sc->sc_ctl_start->qh->hlink);
426 }
427 #endif
428
429 void
430 uhci_dump_tds(std)
431 uhci_soft_td_t *std;
432 {
433 uhci_soft_td_t *p;
434
435 for(p = std; p; p = p->td->link.std)
436 uhci_dump_td(p);
437 }
438 #endif
439
440 /*
441 * This routine is executed periodically and simulates interrupts
442 * from the root controller interrupt pipe for port status change.
443 */
444 void
445 uhci_timo(addr)
446 void *addr;
447 {
448 usbd_request_handle reqh = addr;
449 usbd_pipe_handle pipe = reqh->pipe;
450 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
451 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
452 int s;
453 u_char *p;
454
455 DPRINTFN(15, ("uhci_timo\n"));
456
457 p = KERNADDR(&upipe->u.intr.datadma);
458 p[0] = 0;
459 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
460 p[0] |= 1<<1;
461 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
462 p[0] |= 1<<2;
463 if (p[0] != 0) {
464 reqh->actlen = 1;
465 reqh->status = USBD_NORMAL_COMPLETION;
466 s = splusb();
467 reqh->xfercb(reqh);
468 splx(s);
469 }
470 if (reqh->pipe->intrreqh == reqh) {
471 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
472 } else {
473 usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma);
474 }
475 }
476
477
478 void
479 uhci_lock_frames(sc)
480 uhci_softc_t *sc;
481 {
482 int s = splusb();
483 while (sc->sc_vflock) {
484 sc->sc_vflock |= UHCI_WANT_LOCK;
485 tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0);
486 }
487 sc->sc_vflock = UHCI_HAS_LOCK;
488 splx(s);
489 }
490
491 void
492 uhci_unlock_frames(sc)
493 uhci_softc_t *sc;
494 {
495 int s = splusb();
496 sc->sc_vflock &= ~UHCI_HAS_LOCK;
497 if (sc->sc_vflock & UHCI_WANT_LOCK)
498 wakeup(&sc->sc_vflock);
499 splx(s);
500 }
501
502 /*
503 * Allocate an interrupt information struct. A free list is kept
504 * for fast allocation.
505 */
506 uhci_intr_info_t *
507 uhci_alloc_intr_info(sc)
508 uhci_softc_t *sc;
509 {
510 uhci_intr_info_t *ii;
511
512 ii = LIST_FIRST(&uhci_ii_free);
513 if (ii)
514 LIST_REMOVE(ii, list);
515 else {
516 ii = malloc(sizeof(uhci_intr_info_t), M_USBDEV, M_NOWAIT);
517 }
518 ii->sc = sc;
519 return ii;
520 }
521
522 void
523 uhci_free_intr_info(ii)
524 uhci_intr_info_t *ii;
525 {
526 LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */
527 }
528
529 /* Add control QH, called at splusb(). */
530 void
531 uhci_add_ctrl(sc, sqh)
532 uhci_softc_t *sc;
533 uhci_soft_qh_t *sqh;
534 {
535 uhci_qh_t *eqh;
536
537 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
538 eqh = sc->sc_ctl_end->qh;
539 sqh->qh->hlink = eqh->hlink;
540 sqh->qh->qh_hlink = eqh->qh_hlink;
541 eqh->hlink = sqh;
542 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
543 sc->sc_ctl_end = sqh;
544 }
545
546 /* Remove control QH, called at splusb(). */
547 void
548 uhci_remove_ctrl(sc, sqh)
549 uhci_softc_t *sc;
550 uhci_soft_qh_t *sqh;
551 {
552 uhci_soft_qh_t *pqh;
553
554 DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh));
555 for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink)
556 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
557 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
558 printf("uhci_remove_ctrl: QH not found\n");
559 return;
560 }
561 #else
562 ;
563 #endif
564 pqh->qh->hlink = sqh->qh->hlink;
565 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
566 if (sc->sc_ctl_end == sqh)
567 sc->sc_ctl_end = pqh;
568 }
569
570 /* Add bulk QH, called at splusb(). */
571 void
572 uhci_add_bulk(sc, sqh)
573 uhci_softc_t *sc;
574 uhci_soft_qh_t *sqh;
575 {
576 uhci_qh_t *eqh;
577
578 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
579 eqh = sc->sc_bulk_end->qh;
580 sqh->qh->hlink = eqh->hlink;
581 sqh->qh->qh_hlink = eqh->qh_hlink;
582 eqh->hlink = sqh;
583 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
584 sc->sc_bulk_end = sqh;
585 }
586
587 /* Remove bulk QH, called at splusb(). */
588 void
589 uhci_remove_bulk(sc, sqh)
590 uhci_softc_t *sc;
591 uhci_soft_qh_t *sqh;
592 {
593 uhci_soft_qh_t *pqh;
594
595 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
596 for (pqh = sc->sc_bulk_start;
597 pqh->qh->hlink != sqh;
598 pqh = pqh->qh->hlink)
599 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
600 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
601 printf("uhci_remove_bulk: QH not found\n");
602 return;
603 }
604 #else
605 ;
606 #endif
607 pqh->qh->hlink = sqh->qh->hlink;
608 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
609 if (sc->sc_bulk_end == sqh)
610 sc->sc_bulk_end = pqh;
611 }
612
613 int
614 uhci_intr(p)
615 void *p;
616 {
617 uhci_softc_t *sc = p;
618 int status, ret;
619 uhci_intr_info_t *ii;
620
621 sc->sc_intrs++;
622 #if defined(USB_DEBUG)
623 if (uhcidebug > 9) {
624 printf("uhci_intr %p\n", sc);
625 uhci_dumpregs(sc);
626 }
627 #endif
628 status = UREAD2(sc, UHCI_STS);
629 ret = 0;
630 if (status & UHCI_STS_USBINT) {
631 UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */
632 ret = 1;
633 }
634 if (status & UHCI_STS_USBEI) {
635 UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */
636 ret = 1;
637 }
638 if (status & UHCI_STS_RD) {
639 UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */
640 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
641 ret = 1;
642 }
643 if (status & UHCI_STS_HSE) {
644 UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */
645 printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev));
646 ret = 1;
647 }
648 if (status & UHCI_STS_HCPE) {
649 UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */
650 printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev));
651 ret = 1;
652 }
653 if (status & UHCI_STS_HCH)
654 printf("%s: controller halted\n", USBDEVNAME(sc->sc_bus.bdev));
655 if (!ret)
656 return 0;
657
658 /*
659 * Interrupts on UHCI really suck. When the host controller
660 * interrupts because a transfer is completed there is no
661 * way of knowing which transfer it was. You can scan down
662 * the TDs and QHs of the previous frame to limit the search,
663 * but that assumes that the interrupt was not delayed by more
664 * than 1 ms, which may not always be true (e.g. after debug
665 * output on a slow console).
666 * We scan all interrupt descriptors to see if any have
667 * completed.
668 */
669 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
670 uhci_check_intr(sc, ii);
671
672 DPRINTFN(10, ("uhci_intr: exit\n"));
673 return 1;
674 }
675
676 /* Check for an interrupt. */
677 void
678 uhci_check_intr(sc, ii)
679 uhci_softc_t *sc;
680 uhci_intr_info_t *ii;
681 {
682 struct uhci_pipe *upipe;
683 uhci_soft_td_t *std, *lstd;
684
685 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
686 #ifdef DIAGNOSTIC
687 if (!ii) {
688 printf("uhci_check_intr: no ii? %p\n", ii);
689 return;
690 }
691 #endif
692 if (!ii->stdstart)
693 return;
694 lstd = ii->stdend;
695 #ifdef DIAGNOSTIC
696 if (!lstd) {
697 printf("uhci_check_intr: std==0\n");
698 return;
699 }
700 #endif
701 /* If the last TD is still active the whole transfer probably is. */
702 if (lstd->td->td_status & UHCI_TD_ACTIVE) {
703 DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii));
704 for (std = ii->stdstart; std != lstd; std = std->td->link.std)
705 if (std->td->td_status & UHCI_TD_STALLED)
706 goto done;
707 DPRINTFN(15, ("uhci_check_intr: ii=%p still active\n", ii));
708 return;
709 }
710 done:
711 upipe = (struct uhci_pipe *)ii->reqh->pipe;
712 upipe->pipe.endpoint->toggle = upipe->newtoggle;
713 uhci_ii_done(ii, 0);
714 usb_untimeout(uhci_timeout, ii, ii->timeout_handle);
715 }
716
717 void
718 uhci_ii_done(ii, timo)
719 uhci_intr_info_t *ii;
720 int timo;
721 {
722 usbd_request_handle reqh = ii->reqh;
723 uhci_soft_td_t *std;
724 u_int32_t tst;
725 int len, status;
726
727 DPRINTFN(10, ("uhci_ii_done: ii=%p ready %d\n", ii, timo));
728
729 #ifdef DIAGNOSTIC
730 {
731 int s = splhigh();
732 if (ii->isdone) {
733 printf("uhci_ii_done: is done!\n");
734 splx(s);
735 return;
736 }
737 ii->isdone = 1;
738 splx(s);
739 }
740 #endif
741
742 /* The transfer is done, compute length and status. */
743 for (len = status = 0, std = ii->stdstart;
744 std != 0;
745 std = std->td->link.std) {
746 tst = std->td->td_status;
747 status |= tst;
748 #ifdef USB_DEBUG
749 if ((tst & UHCI_TD_ERROR) && uhcidebug) {
750 printf("uhci_ii_done: intr error TD:\n");
751 uhci_dump_td(std);
752 }
753 #endif
754 if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP)
755 len += UHCI_TD_GET_ACTLEN(tst);
756 }
757 status &= UHCI_TD_ERROR;
758 DPRINTFN(10, ("uhci_check_intr: len=%d, status=0x%x\n", len, status));
759 if (status != 0) {
760 DPRINTFN(-1+(status==UHCI_TD_STALLED),
761 ("uhci_ii_done: error, status 0x%b\n", (long)status,
762 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
763 "STALLED\30ACTIVE"));
764 if (status == UHCI_TD_STALLED)
765 reqh->status = USBD_STALLED;
766 else
767 reqh->status = USBD_IOERROR; /* more info XXX */
768 reqh->actlen = 0;
769 } else {
770 reqh->status = USBD_NORMAL_COMPLETION;
771 reqh->actlen = len;
772 }
773 if (timo) {
774 /* We got a timeout. Make sure transaction is not active. */
775 reqh->status = USBD_TIMEOUT;
776 for (std = ii->stdstart; std != 0; std = std->td->link.std)
777 std->td->td_status &= ~UHCI_TD_ACTIVE;
778 /* XXX should we wait 1 ms */
779 }
780 DPRINTFN(5, ("uhci_ii_done: calling handler ii=%p\n", ii));
781
782 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
783 case UE_CONTROL:
784 uhci_ctrl_done(ii);
785 break;
786 case UE_ISOCHRONOUS:
787 printf("uhci_ii_done: ISO??\n");
788 break;
789 case UE_BULK:
790 uhci_bulk_done(ii);
791 break;
792 case UE_INTERRUPT:
793 uhci_intr_done(ii);
794 break;
795 }
796
797 /* And finally execute callback. */
798 reqh->xfercb(reqh);
799 }
800
801 /*
802 * Called when a request does not complete.
803 */
804 void
805 uhci_timeout(addr)
806 void *addr;
807 {
808 uhci_intr_info_t *ii = addr;
809 int s;
810
811 DPRINTF(("uhci_timeout: ii=%p\n", ii));
812 s = splusb();
813 uhci_ii_done(ii, 1);
814 splx(s);
815 }
816
817 /*
818 * Wait here until controller claims to have an interrupt.
819 * Then call uhci_intr and return. Use timeout to avoid waiting
820 * too long.
821 * Only used during boot when interrupts are not enabled yet.
822 */
823 void
824 uhci_waitintr(sc, reqh)
825 uhci_softc_t *sc;
826 usbd_request_handle reqh;
827 {
828 int timo = reqh->timeout;
829 int usecs;
830 uhci_intr_info_t *ii;
831
832 DPRINTFN(10,("uhci_waitintr: timeout = %ds\n", timo));
833
834 reqh->status = USBD_IN_PROGRESS;
835 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
836 usbd_delay_ms(&sc->sc_bus, 1);
837 DPRINTFN(10,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
838 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
839 uhci_intr(sc);
840 if (reqh->status != USBD_IN_PROGRESS)
841 return;
842 }
843 }
844
845 /* Timeout */
846 DPRINTF(("uhci_waitintr: timeout\n"));
847 for (ii = LIST_FIRST(&sc->sc_intrhead);
848 ii && ii->reqh != reqh;
849 ii = LIST_NEXT(ii, list))
850 ;
851 if (ii)
852 uhci_ii_done(ii, 1);
853 else
854 panic("uhci_waitintr: lost intr_info\n");
855 }
856
857 void
858 uhci_poll(bus)
859 struct usbd_bus *bus;
860 {
861 uhci_softc_t *sc = (uhci_softc_t *)bus;
862
863 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
864 uhci_intr(sc);
865 }
866
867 #if 0
868 void
869 uhci_reset(p)
870 void *p;
871 {
872 uhci_softc_t *sc = p;
873 int n;
874
875 UHCICMD(sc, UHCI_CMD_HCRESET);
876 /* The reset bit goes low when the controller is done. */
877 for (n = 0; n < UHCI_RESET_TIMEOUT &&
878 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
879 delay(100);
880 if (n >= UHCI_RESET_TIMEOUT)
881 printf("%s: controller did not reset\n",
882 USBDEVNAME(sc->sc_bus.bdev));
883 }
884 #endif
885
886 void
887 uhci_run(sc, run)
888 uhci_softc_t *sc;
889 int run;
890 {
891 int s, n, running;
892
893 run = run != 0;
894 s = splusb(); /* XXX really? */
895 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
896 if (run == running) {
897 splx(s);
898 return;
899 }
900 UWRITE2(sc, UHCI_CMD, run ? UHCI_CMD_RS : 0);
901 for(n = 0; n < 10; n++) {
902 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
903 /* return when we've entered the state we want */
904 if (run == running) {
905 splx(s);
906 return;
907 }
908 usbd_delay_ms(&sc->sc_bus, 1);
909 }
910 splx(s);
911 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
912 run ? "start" : "stop");
913 }
914
915 /*
916 * Memory management routines.
917 * uhci_alloc_std allocates TDs
918 * uhci_alloc_sqh allocates QHs
919 * These two routines do their own free list management,
920 * partly for speed, partly because allocating DMAable memory
921 * has page size granularaity so much memory would be wasted if
922 * only one TD/QH (32 bytes) was placed in each alloacted chunk.
923 */
924
925 uhci_soft_td_t *
926 uhci_alloc_std(sc)
927 uhci_softc_t *sc;
928 {
929 uhci_soft_td_t *std;
930 usbd_status r;
931 int i;
932 usb_dma_t dma;
933
934 if (!sc->sc_freetds) {
935 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
936 std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK,
937 M_USBDEV, M_NOWAIT);
938 if (!std)
939 return 0;
940 r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK,
941 UHCI_TD_ALIGN, &dma);
942 if (r != USBD_NORMAL_COMPLETION) {
943 free(std, M_USBDEV);
944 return 0;
945 }
946 for(i = 0; i < UHCI_TD_CHUNK; i++, std++) {
947 std->physaddr = DMAADDR(&dma) +
948 i * UHCI_TD_SIZE;
949 std->td = (uhci_td_t *)
950 ((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE);
951 std->td->link.std = sc->sc_freetds;
952 sc->sc_freetds = std;
953 }
954 }
955 std = sc->sc_freetds;
956 sc->sc_freetds = std->td->link.std;
957 memset(std->td, 0, UHCI_TD_SIZE);
958 return std;
959 }
960
961 void
962 uhci_free_std(sc, std)
963 uhci_softc_t *sc;
964 uhci_soft_td_t *std;
965 {
966 #ifdef DIAGNOSTIC
967 #define TD_IS_FREE 0x12345678
968 if (std->td->td_token == TD_IS_FREE) {
969 printf("uhci_free_std: freeing free TD %p\n", std);
970 return;
971 }
972 std->td->td_token = TD_IS_FREE;
973 #endif
974 std->td->link.std = sc->sc_freetds;
975 sc->sc_freetds = std;
976 }
977
978 uhci_soft_qh_t *
979 uhci_alloc_sqh(sc)
980 uhci_softc_t *sc;
981 {
982 uhci_soft_qh_t *sqh;
983 usbd_status r;
984 int i, offs;
985 usb_dma_t dma;
986
987 if (!sc->sc_freeqhs) {
988 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
989 sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK,
990 M_USBDEV, M_NOWAIT);
991 if (!sqh)
992 return 0;
993 r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK,
994 UHCI_QH_ALIGN, &dma);
995 if (r != USBD_NORMAL_COMPLETION) {
996 free(sqh, M_USBDEV);
997 return 0;
998 }
999 for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) {
1000 offs = i * UHCI_QH_SIZE;
1001 sqh->physaddr = DMAADDR(&dma) + offs;
1002 sqh->qh = (uhci_qh_t *)
1003 ((char *)KERNADDR(&dma) + offs);
1004 sqh->qh->hlink = sc->sc_freeqhs;
1005 sc->sc_freeqhs = sqh;
1006 }
1007 }
1008 sqh = sc->sc_freeqhs;
1009 sc->sc_freeqhs = sqh->qh->hlink;
1010 memset(sqh->qh, 0, UHCI_QH_SIZE);
1011 return sqh;
1012 }
1013
1014 void
1015 uhci_free_sqh(sc, sqh)
1016 uhci_softc_t *sc;
1017 uhci_soft_qh_t *sqh;
1018 {
1019 sqh->qh->hlink = sc->sc_freeqhs;
1020 sc->sc_freeqhs = sqh;
1021 }
1022
1023 /*
1024 * Enter a list of transfers onto a control queue.
1025 * Called at splusb()
1026 */
1027 void
1028 uhci_enter_ctl_q(sc, sqh, ii)
1029 uhci_softc_t *sc;
1030 uhci_soft_qh_t *sqh;
1031 uhci_intr_info_t *ii;
1032 {
1033 DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh));
1034
1035 }
1036
1037 void
1038 uhci_free_std_chain(sc, std, stdend)
1039 uhci_softc_t *sc;
1040 uhci_soft_td_t *std;
1041 uhci_soft_td_t *stdend;
1042 {
1043 uhci_soft_td_t *p;
1044
1045 for (; std != stdend; std = p) {
1046 p = std->td->link.std;
1047 uhci_free_std(sc, std);
1048 }
1049 }
1050
1051 usbd_status
1052 uhci_alloc_std_chain(upipe, sc, len, rd, dma, sp, ep)
1053 struct uhci_pipe *upipe;
1054 uhci_softc_t *sc;
1055 int len, rd;
1056 usb_dma_t *dma;
1057 uhci_soft_td_t **sp, **ep;
1058 {
1059 uhci_soft_td_t *p, *lastp;
1060 uhci_physaddr_t lastlink;
1061 u_int32_t ls;
1062 int i, ntd, l, tog, maxp;
1063 int addr = upipe->pipe.device->address;
1064 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1065
1066 DPRINTFN(15, ("uhci_alloc_std_chain: len=%d\n", len));
1067 if (len == 0) {
1068 *sp = *ep = 0;
1069 DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n"));
1070 return (USBD_NORMAL_COMPLETION);
1071 }
1072 ls = upipe->pipe.device->lowspeed ? UHCI_TD_LS : 0;
1073 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1074 if (maxp == 0) {
1075 printf("uhci_alloc_std_chain: maxp=0\n");
1076 return (USBD_INVAL);
1077 }
1078 ntd = (len + maxp - 1) / maxp;
1079 tog = upipe->pipe.endpoint->toggle;
1080 if (ntd % 2 == 0)
1081 tog ^= 1;
1082 upipe->newtoggle = tog ^ 1;
1083 lastp = 0;
1084 lastlink = UHCI_PTR_T;
1085 ntd--;
1086 for (i = ntd; i >= 0; i--) {
1087 p = uhci_alloc_std(sc);
1088 if (!p) {
1089 uhci_free_std_chain(sc, lastp, 0);
1090 return (USBD_NOMEM);
1091 }
1092 p->td->link.std = lastp;
1093 p->td->td_link = lastlink;
1094 lastp = p;
1095 lastlink = p->physaddr;
1096 p->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
1097 if (i == ntd) {
1098 /* last TD */
1099 l = len % maxp;
1100 if (l == 0) l = maxp;
1101 *ep = p;
1102 } else
1103 l = maxp;
1104 p->td->td_token =
1105 rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1106 UHCI_TD_OUT(l, endpt, addr, tog);
1107 p->td->td_buffer = DMAADDR(dma) + i * maxp;
1108 tog ^= 1;
1109 }
1110 *sp = lastp;
1111 /*upipe->pipe.endpoint->toggle = tog;*/
1112 DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d newtog=%d\n",
1113 upipe->pipe.endpoint->toggle, upipe->newtoggle));
1114 return (USBD_NORMAL_COMPLETION);
1115 }
1116
1117 usbd_status
1118 uhci_device_bulk_transfer(reqh)
1119 usbd_request_handle reqh;
1120 {
1121 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1122 usbd_device_handle dev = upipe->pipe.device;
1123 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1124 uhci_intr_info_t *ii = upipe->iinfo;
1125 uhci_soft_td_t *xfer, *xferend;
1126 uhci_soft_qh_t *sqh;
1127 usb_dma_t *dmap;
1128 usbd_status r;
1129 int len, isread;
1130 int s;
1131
1132 DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d "
1133 "flags=%d\n",
1134 reqh, reqh->buffer, reqh->length, reqh->flags));
1135
1136 if (reqh->isreq)
1137 panic("uhci_device_bulk_transfer: a request\n");
1138
1139 len = reqh->length;
1140 dmap = &upipe->u.bulk.datadma;
1141 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
1142 sqh = upipe->u.bulk.sqh;
1143
1144 upipe->u.bulk.isread = isread;
1145 upipe->u.bulk.length = len;
1146
1147 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1148 if (r != USBD_NORMAL_COMPLETION)
1149 goto ret1;
1150 r = uhci_alloc_std_chain(upipe, sc, len, isread,
1151 dmap, &xfer, &xferend);
1152 if (r != USBD_NORMAL_COMPLETION)
1153 goto ret2;
1154 xferend->td->td_status |= UHCI_TD_IOC;
1155
1156 if (!isread && len != 0)
1157 memcpy(KERNADDR(dmap), reqh->buffer, len);
1158
1159 #ifdef USB_DEBUG
1160 if (uhcidebug > 10) {
1161 printf("uhci_device_bulk_transfer: xfer(1)\n");
1162 uhci_dump_tds(xfer);
1163 }
1164 #endif
1165
1166 /* Set up interrupt info. */
1167 ii->reqh = reqh;
1168 ii->stdstart = xfer;
1169 ii->stdend = xferend;
1170 #ifdef DIAGNOSTIC
1171 ii->isdone = 0;
1172 #endif
1173
1174 sqh->qh->elink = xfer;
1175 sqh->qh->qh_elink = xfer->physaddr;
1176 sqh->intr_info = ii;
1177
1178 s = splusb();
1179 uhci_add_bulk(sc, sqh);
1180 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1181
1182 if (reqh->timeout && !sc->sc_bus.use_polling) {
1183 usb_timeout(uhci_timeout, ii,
1184 MS_TO_TICKS(reqh->timeout), ii->timeout_handle);
1185 }
1186 splx(s);
1187
1188 #ifdef USB_DEBUG
1189 if (uhcidebug > 10) {
1190 printf("uhci_device_bulk_transfer: xfer(2)\n");
1191 uhci_dump_tds(xfer);
1192 }
1193 #endif
1194
1195 return (USBD_IN_PROGRESS);
1196
1197 ret2:
1198 if (len != 0)
1199 usb_freemem(sc->sc_dmatag, dmap);
1200 ret1:
1201 return (r);
1202 }
1203
1204 /* Abort a device bulk request. */
1205 void
1206 uhci_device_bulk_abort(reqh)
1207 usbd_request_handle reqh;
1208 {
1209 /* XXX inactivate */
1210 usbd_delay_ms(reqh->pipe->device->bus, 1);/* make sure it is done */
1211 /* XXX call done */
1212 }
1213
1214 /* Close a device bulk pipe. */
1215 void
1216 uhci_device_bulk_close(pipe)
1217 usbd_pipe_handle pipe;
1218 {
1219 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1220 usbd_device_handle dev = upipe->pipe.device;
1221 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1222
1223 uhci_free_sqh(sc, upipe->u.bulk.sqh);
1224 uhci_free_intr_info(upipe->iinfo);
1225 /* XXX free other resources */
1226 }
1227
1228 usbd_status
1229 uhci_device_ctrl_transfer(reqh)
1230 usbd_request_handle reqh;
1231 {
1232 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1233 usbd_status r;
1234
1235 if (!reqh->isreq)
1236 panic("uhci_device_ctrl_transfer: not a request\n");
1237
1238 r = uhci_device_request(reqh);
1239 if (r != USBD_NORMAL_COMPLETION)
1240 return (r);
1241
1242 if (sc->sc_bus.use_polling)
1243 uhci_waitintr(sc, reqh);
1244 return (USBD_IN_PROGRESS);
1245 }
1246
1247 usbd_status
1248 uhci_device_intr_transfer(reqh)
1249 usbd_request_handle reqh;
1250 {
1251 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1252 usbd_device_handle dev = upipe->pipe.device;
1253 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1254 uhci_intr_info_t *ii = upipe->iinfo;
1255 uhci_soft_td_t *xfer, *xferend;
1256 uhci_soft_qh_t *sqh;
1257 usb_dma_t *dmap;
1258 usbd_status r;
1259 int len, i;
1260 int s;
1261
1262 DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d "
1263 "flags=%d\n",
1264 reqh, reqh->buffer, reqh->length, reqh->flags));
1265
1266 if (reqh->isreq)
1267 panic("uhci_device_intr_transfer: a request\n");
1268
1269 len = reqh->length;
1270 dmap = &upipe->u.intr.datadma;
1271 if (len == 0)
1272 return (USBD_INVAL); /* XXX should it be? */
1273
1274 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1275 if (r != USBD_NORMAL_COMPLETION)
1276 goto ret1;
1277 r = uhci_alloc_std_chain(upipe, sc, len, 1, dmap, &xfer, &xferend);
1278 if (r != USBD_NORMAL_COMPLETION)
1279 goto ret2;
1280 xferend->td->td_status |= UHCI_TD_IOC;
1281
1282 #ifdef USB_DEBUG
1283 if (uhcidebug > 10) {
1284 printf("uhci_device_intr_transfer: xfer(1)\n");
1285 uhci_dump_tds(xfer);
1286 uhci_dump_qh(upipe->u.intr.qhs[0]);
1287 }
1288 #endif
1289
1290 s = splusb();
1291 /* Set up interrupt info. */
1292 ii->reqh = reqh;
1293 ii->stdstart = xfer;
1294 ii->stdend = xferend;
1295 #ifdef DIAGNOSTIC
1296 ii->isdone = 0;
1297 #endif
1298
1299 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
1300 upipe->u.intr.qhs[0]));
1301 for (i = 0; i < upipe->u.intr.npoll; i++) {
1302 sqh = upipe->u.intr.qhs[i];
1303 sqh->qh->elink = xfer;
1304 sqh->qh->qh_elink = xfer->physaddr;
1305 }
1306 splx(s);
1307
1308 #ifdef USB_DEBUG
1309 if (uhcidebug > 10) {
1310 printf("uhci_device_intr_transfer: xfer(2)\n");
1311 uhci_dump_tds(xfer);
1312 uhci_dump_qh(upipe->u.intr.qhs[0]);
1313 }
1314 #endif
1315
1316 return (USBD_IN_PROGRESS);
1317
1318 ret2:
1319 if (len != 0)
1320 usb_freemem(sc->sc_dmatag, dmap);
1321 ret1:
1322 return (r);
1323 }
1324
1325 /* Abort a device control request. */
1326 void
1327 uhci_device_ctrl_abort(reqh)
1328 usbd_request_handle reqh;
1329 {
1330 /* XXX inactivate */
1331 usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
1332 /* XXX call done */
1333 }
1334
1335 /* Close a device control pipe. */
1336 void
1337 uhci_device_ctrl_close(pipe)
1338 usbd_pipe_handle pipe;
1339 {
1340 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1341
1342 uhci_free_intr_info(upipe->iinfo);
1343 /* XXX free other resources */
1344 }
1345
1346 /* Abort a device interrupt request. */
1347 void
1348 uhci_device_intr_abort(reqh)
1349 usbd_request_handle reqh;
1350 {
1351 struct uhci_pipe *upipe;
1352
1353 DPRINTFN(1, ("uhci_device_intr_abort: reqh=%p\n", reqh));
1354 /* XXX inactivate */
1355 usbd_delay_ms(reqh->pipe->device->bus, 2); /* make sure it is done */
1356 if (reqh->pipe->intrreqh == reqh) {
1357 DPRINTF(("uhci_device_intr_abort: remove\n"));
1358 reqh->pipe->intrreqh = 0;
1359 upipe = (struct uhci_pipe *)reqh->pipe;
1360 uhci_intr_done(upipe->u.intr.qhs[0]->intr_info);
1361 }
1362 }
1363
1364 /* Close a device interrupt pipe. */
1365 void
1366 uhci_device_intr_close(pipe)
1367 usbd_pipe_handle pipe;
1368 {
1369 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1370 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1371 int i, s, npoll;
1372
1373 upipe->iinfo->stdstart = 0; /* inactive */
1374
1375 /* Unlink descriptors from controller data structures. */
1376 npoll = upipe->u.intr.npoll;
1377 uhci_lock_frames(sc);
1378 for (i = 0; i < npoll; i++)
1379 uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos,
1380 upipe->u.intr.qhs[i]);
1381 uhci_unlock_frames(sc);
1382
1383 /*
1384 * We now have to wait for any activity on the physical
1385 * descriptors to stop.
1386 */
1387 usbd_delay_ms(&sc->sc_bus, 2);
1388
1389 for(i = 0; i < npoll; i++)
1390 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
1391 free(upipe->u.intr.qhs, M_USB);
1392
1393 s = splusb();
1394 LIST_REMOVE(upipe->iinfo, list); /* remove from active list */
1395 splx(s);
1396 uhci_free_intr_info(upipe->iinfo);
1397
1398 /* XXX free other resources */
1399 }
1400
1401 usbd_status
1402 uhci_device_request(reqh)
1403 usbd_request_handle reqh;
1404 {
1405 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1406 usb_device_request_t *req = &reqh->request;
1407 usbd_device_handle dev = upipe->pipe.device;
1408 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1409 int addr = dev->address;
1410 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1411 uhci_intr_info_t *ii = upipe->iinfo;
1412 uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend;
1413 uhci_soft_qh_t *sqh;
1414 usb_dma_t *dmap;
1415 int len;
1416 u_int32_t ls;
1417 usbd_status r;
1418 int isread;
1419 int s;
1420
1421 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
1422 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1423 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1424 UGETW(req->wIndex), UGETW(req->wLength),
1425 addr, endpt));
1426
1427 ls = dev->lowspeed ? UHCI_TD_LS : 0;
1428 isread = req->bmRequestType & UT_READ;
1429 len = UGETW(req->wLength);
1430
1431 setup = upipe->u.ctl.setup;
1432 stat = upipe->u.ctl.stat;
1433 sqh = upipe->u.ctl.sqh;
1434 dmap = &upipe->u.ctl.datadma;
1435
1436 /* Set up data transaction */
1437 if (len != 0) {
1438 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1439 if (r != USBD_NORMAL_COMPLETION)
1440 goto ret1;
1441 upipe->pipe.endpoint->toggle = 1;
1442 r = uhci_alloc_std_chain(upipe, sc, len, isread,
1443 dmap, &xfer, &xferend);
1444 if (r != USBD_NORMAL_COMPLETION)
1445 goto ret2;
1446 next = xfer;
1447 xferend->td->link.std = stat;
1448 xferend->td->td_link = stat->physaddr;
1449 } else {
1450 xfer = 0;
1451 next = stat;
1452 }
1453 upipe->u.ctl.length = len;
1454 upipe->u.ctl.xferend = xferend;
1455
1456 memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
1457 if (!isread && len != 0)
1458 memcpy(KERNADDR(dmap), reqh->buffer, len);
1459
1460 setup->td->link.std = next;
1461 setup->td->td_link = next->physaddr;
1462 setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
1463 setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr);
1464 setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma);
1465
1466 stat->td->link.std = 0;
1467 stat->td->td_link = UHCI_PTR_T;
1468 stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls |
1469 UHCI_TD_ACTIVE | UHCI_TD_IOC;
1470 stat->td->td_token =
1471 isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
1472 UHCI_TD_IN (0, endpt, addr, 1);
1473 stat->td->td_buffer = 0;
1474
1475 #ifdef USB_DEBUG
1476 if (uhcidebug > 20) {
1477 printf("uhci_device_request: setup\n");
1478 uhci_dump_td(setup);
1479 printf("uhci_device_request: stat\n");
1480 uhci_dump_td(stat);
1481 }
1482 #endif
1483
1484 /* Set up interrupt info. */
1485 ii->reqh = reqh;
1486 ii->stdstart = setup;
1487 ii->stdend = stat;
1488 #ifdef DIAGNOSTIC
1489 ii->isdone = 0;
1490 #endif
1491
1492 sqh->qh->elink = setup;
1493 sqh->qh->qh_elink = setup->physaddr;
1494 sqh->intr_info = ii;
1495
1496 s = splusb();
1497 uhci_add_ctrl(sc, sqh);
1498 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1499 #ifdef USB_DEBUG
1500 if (uhcidebug > 12) {
1501 uhci_soft_td_t *std;
1502 uhci_soft_qh_t *xqh;
1503 uhci_soft_qh_t *sxqh;
1504 int maxqh = 0;
1505 uhci_physaddr_t link;
1506 printf("uhci_enter_ctl_q: follow from [0]\n");
1507 for (std = sc->sc_vframes[0].htd, link = 0;
1508 (link & UHCI_PTR_Q) == 0;
1509 std = std->td->link.std) {
1510 link = std->td->td_link;
1511 uhci_dump_td(std);
1512 }
1513 for (sxqh = xqh = (uhci_soft_qh_t *)std;
1514 xqh;
1515 xqh = (maxqh++ == 5 || xqh->qh->hlink==sxqh ||
1516 xqh->qh->hlink==xqh ? NULL : xqh->qh->hlink)) {
1517 uhci_dump_qh(xqh);
1518 uhci_dump_qh(sxqh);
1519 }
1520 printf("Enqueued QH:\n");
1521 uhci_dump_qh(sqh);
1522 uhci_dump_tds(sqh->qh->elink);
1523 }
1524 #endif
1525 if (reqh->timeout && !sc->sc_bus.use_polling) {
1526 usb_timeout(uhci_timeout, ii,
1527 MS_TO_TICKS(reqh->timeout), ii->timeout_handle);
1528 }
1529 splx(s);
1530
1531 return (USBD_NORMAL_COMPLETION);
1532
1533 ret2:
1534 if (len != 0)
1535 usb_freemem(sc->sc_dmatag, dmap);
1536 ret1:
1537 return (r);
1538 }
1539
1540 void
1541 uhci_intr_done(ii)
1542 uhci_intr_info_t *ii;
1543 {
1544 uhci_softc_t *sc = ii->sc;
1545 usbd_request_handle reqh = ii->reqh;
1546 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1547 usb_dma_t *dma;
1548 uhci_soft_qh_t *sqh;
1549 int i, npoll;
1550
1551 DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen));
1552
1553 dma = &upipe->u.intr.datadma;
1554 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
1555 npoll = upipe->u.intr.npoll;
1556 for(i = 0; i < npoll; i++) {
1557 sqh = upipe->u.intr.qhs[i];
1558 sqh->qh->elink = 0;
1559 sqh->qh->qh_elink = UHCI_PTR_T;
1560 }
1561 uhci_free_std_chain(sc, ii->stdstart, 0);
1562
1563 /* XXX Wasteful. */
1564 if (reqh->pipe->intrreqh == reqh) {
1565 uhci_soft_td_t *xfer, *xferend;
1566
1567 /* This alloc cannot fail since we freed the chain above. */
1568 uhci_alloc_std_chain(upipe, sc, reqh->length, 1, dma,
1569 &xfer, &xferend);
1570 xferend->td->td_status |= UHCI_TD_IOC;
1571
1572 #ifdef USB_DEBUG
1573 if (uhcidebug > 10) {
1574 printf("uhci_device_intr_done: xfer(1)\n");
1575 uhci_dump_tds(xfer);
1576 uhci_dump_qh(upipe->u.intr.qhs[0]);
1577 }
1578 #endif
1579
1580 ii->stdstart = xfer;
1581 ii->stdend = xferend;
1582 #ifdef DIAGNOSTIC
1583 ii->isdone = 0;
1584 #endif
1585 for (i = 0; i < npoll; i++) {
1586 sqh = upipe->u.intr.qhs[i];
1587 sqh->qh->elink = xfer;
1588 sqh->qh->qh_elink = xfer->physaddr;
1589 }
1590 } else {
1591 usb_freemem(sc->sc_dmatag, dma);
1592 ii->stdstart = 0; /* mark as inactive */
1593 }
1594 }
1595
1596 /* Deallocate request data structures */
1597 void
1598 uhci_ctrl_done(ii)
1599 uhci_intr_info_t *ii;
1600 {
1601 uhci_softc_t *sc = ii->sc;
1602 usbd_request_handle reqh = ii->reqh;
1603 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1604 u_int len = upipe->u.ctl.length;
1605 usb_dma_t *dma;
1606 uhci_td_t *htd = ii->stdstart->td;
1607
1608 #ifdef DIAGNOSTIC
1609 if (!reqh->isreq)
1610 panic("uhci_ctrl_done: not a request\n");
1611 #endif
1612
1613 LIST_REMOVE(ii, list); /* remove from active list */
1614
1615 uhci_remove_ctrl(sc, upipe->u.ctl.sqh);
1616
1617 if (len != 0) {
1618 dma = &upipe->u.ctl.datadma;
1619 if (reqh->request.bmRequestType & UT_READ)
1620 memcpy(reqh->buffer, KERNADDR(dma), len);
1621 uhci_free_std_chain(sc, htd->link.std, ii->stdend);
1622 usb_freemem(sc->sc_dmatag, dma);
1623 }
1624 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen));
1625 }
1626
1627 /* Deallocate request data structures */
1628 void
1629 uhci_bulk_done(ii)
1630 uhci_intr_info_t *ii;
1631 {
1632 uhci_softc_t *sc = ii->sc;
1633 usbd_request_handle reqh = ii->reqh;
1634 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1635 u_int len = upipe->u.bulk.length;
1636 usb_dma_t *dma;
1637 uhci_td_t *htd = ii->stdstart->td;
1638
1639 LIST_REMOVE(ii, list); /* remove from active list */
1640
1641 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
1642
1643 if (len != 0) {
1644 dma = &upipe->u.bulk.datadma;
1645 if (upipe->u.bulk.isread && len != 0)
1646 memcpy(reqh->buffer, KERNADDR(dma), len);
1647 uhci_free_std_chain(sc, htd->link.std, 0);
1648 usb_freemem(sc->sc_dmatag, dma);
1649 }
1650 DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen));
1651 /* XXX compute new toggle */
1652 }
1653
1654 /* Add interrupt QH, called with vflock. */
1655 void
1656 uhci_add_intr(sc, n, sqh)
1657 uhci_softc_t *sc;
1658 int n;
1659 uhci_soft_qh_t *sqh;
1660 {
1661 struct uhci_vframe *vf = &sc->sc_vframes[n];
1662 uhci_qh_t *eqh;
1663
1664 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh));
1665 eqh = vf->eqh->qh;
1666 sqh->qh->hlink = eqh->hlink;
1667 sqh->qh->qh_hlink = eqh->qh_hlink;
1668 eqh->hlink = sqh;
1669 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
1670 vf->eqh = sqh;
1671 vf->bandwidth++;
1672 }
1673
1674 /* Remove interrupt QH, called with vflock. */
1675 void
1676 uhci_remove_intr(sc, n, sqh)
1677 uhci_softc_t *sc;
1678 int n;
1679 uhci_soft_qh_t *sqh;
1680 {
1681 struct uhci_vframe *vf = &sc->sc_vframes[n];
1682 uhci_soft_qh_t *pqh;
1683
1684 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh));
1685
1686 for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink)
1687 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
1688 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
1689 printf("uhci_remove_intr: QH not found\n");
1690 return;
1691 }
1692 #else
1693 ;
1694 #endif
1695 pqh->qh->hlink = sqh->qh->hlink;
1696 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
1697 if (vf->eqh == sqh)
1698 vf->eqh = pqh;
1699 vf->bandwidth--;
1700 }
1701
1702 usbd_status
1703 uhci_device_setintr(sc, upipe, ival)
1704 uhci_softc_t *sc;
1705 struct uhci_pipe *upipe;
1706 int ival;
1707 {
1708 uhci_soft_qh_t *sqh;
1709 int i, npoll, s;
1710 u_int bestbw, bw, bestoffs, offs;
1711
1712 DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
1713 if (ival == 0) {
1714 printf("uhci_setintr: 0 interval\n");
1715 return (USBD_INVAL);
1716 }
1717
1718 if (ival > UHCI_VFRAMELIST_COUNT)
1719 ival = UHCI_VFRAMELIST_COUNT;
1720 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
1721 DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
1722
1723 upipe->u.intr.npoll = npoll;
1724 upipe->u.intr.qhs =
1725 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USB, M_WAITOK);
1726
1727 /*
1728 * Figure out which offset in the schedule that has most
1729 * bandwidth left over.
1730 */
1731 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
1732 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
1733 for (bw = i = 0; i < npoll; i++)
1734 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
1735 if (bw < bestbw) {
1736 bestbw = bw;
1737 bestoffs = offs;
1738 }
1739 }
1740 DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
1741
1742 upipe->iinfo->stdstart = 0;
1743 for(i = 0; i < npoll; i++) {
1744 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
1745 sqh->qh->elink = 0;
1746 sqh->qh->qh_elink = UHCI_PTR_T;
1747 sqh->pos = MOD(i * ival + bestoffs);
1748 sqh->intr_info = upipe->iinfo;
1749 }
1750 #undef MOD
1751
1752 s = splusb();
1753 LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list);
1754 splx(s);
1755
1756 uhci_lock_frames(sc);
1757 /* Enter QHs into the controller data structures. */
1758 for(i = 0; i < npoll; i++)
1759 uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos,
1760 upipe->u.intr.qhs[i]);
1761 uhci_unlock_frames(sc);
1762
1763 DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
1764 return (USBD_NORMAL_COMPLETION);
1765 }
1766
1767 /* Open a new pipe. */
1768 usbd_status
1769 uhci_open(pipe)
1770 usbd_pipe_handle pipe;
1771 {
1772 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1773 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1774 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1775 usbd_status r;
1776
1777 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1778 pipe, pipe->device->address,
1779 ed->bEndpointAddress, sc->sc_addr));
1780 if (pipe->device->address == sc->sc_addr) {
1781 switch (ed->bEndpointAddress) {
1782 case USB_CONTROL_ENDPOINT:
1783 pipe->methods = &uhci_root_ctrl_methods;
1784 break;
1785 case UE_IN | UHCI_INTR_ENDPT:
1786 pipe->methods = &uhci_root_intr_methods;
1787 break;
1788 default:
1789 return (USBD_INVAL);
1790 }
1791 } else {
1792 upipe->iinfo = uhci_alloc_intr_info(sc);
1793 if (upipe->iinfo == 0)
1794 return (USBD_NOMEM);
1795 switch (ed->bmAttributes & UE_XFERTYPE) {
1796 case UE_CONTROL:
1797 pipe->methods = &uhci_device_ctrl_methods;
1798 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
1799 if (upipe->u.ctl.sqh == 0)
1800 goto bad;
1801 upipe->u.ctl.setup = uhci_alloc_std(sc);
1802 if (upipe->u.ctl.setup == 0) {
1803 uhci_free_sqh(sc, upipe->u.ctl.sqh);
1804 goto bad;
1805 }
1806 upipe->u.ctl.stat = uhci_alloc_std(sc);
1807 if (upipe->u.ctl.stat == 0) {
1808 uhci_free_sqh(sc, upipe->u.ctl.sqh);
1809 uhci_free_std(sc, upipe->u.ctl.setup);
1810 goto bad;
1811 }
1812 r = usb_allocmem(sc->sc_dmatag,
1813 sizeof(usb_device_request_t),
1814 0, &upipe->u.ctl.reqdma);
1815 if (r != USBD_NORMAL_COMPLETION) {
1816 uhci_free_sqh(sc, upipe->u.ctl.sqh);
1817 uhci_free_std(sc, upipe->u.ctl.setup);
1818 uhci_free_std(sc, upipe->u.ctl.stat);
1819 goto bad;
1820 }
1821 break;
1822 case UE_INTERRUPT:
1823 pipe->methods = &uhci_device_intr_methods;
1824 return (uhci_device_setintr(sc, upipe, ed->bInterval));
1825 case UE_ISOCHRONOUS:
1826 printf("uhci_open: iso not implemented\n");
1827 return (USBD_XXX);
1828 case UE_BULK:
1829 pipe->methods = &uhci_device_bulk_methods;
1830 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
1831 if (upipe->u.bulk.sqh == 0)
1832 goto bad;
1833 break;
1834 }
1835 }
1836 return (USBD_NORMAL_COMPLETION);
1837
1838 bad:
1839 uhci_free_intr_info(upipe->iinfo);
1840 return (USBD_NOMEM);
1841 }
1842
1843 /*
1844 * Data structures and routines to emulate the root hub.
1845 */
1846 usb_device_descriptor_t uhci_devd = {
1847 USB_DEVICE_DESCRIPTOR_SIZE,
1848 UDESC_DEVICE, /* type */
1849 {0x00, 0x01}, /* USB version */
1850 UCLASS_HUB, /* class */
1851 USUBCLASS_HUB, /* subclass */
1852 0, /* protocol */
1853 64, /* max packet */
1854 {0},{0},{0x00,0x01}, /* device id */
1855 1,2,0, /* string indicies */
1856 1 /* # of configurations */
1857 };
1858
1859 usb_config_descriptor_t uhci_confd = {
1860 USB_CONFIG_DESCRIPTOR_SIZE,
1861 UDESC_CONFIG,
1862 {USB_CONFIG_DESCRIPTOR_SIZE +
1863 USB_INTERFACE_DESCRIPTOR_SIZE +
1864 USB_ENDPOINT_DESCRIPTOR_SIZE},
1865 1,
1866 1,
1867 0,
1868 UC_SELF_POWERED,
1869 0 /* max power */
1870 };
1871
1872 usb_interface_descriptor_t uhci_ifcd = {
1873 USB_INTERFACE_DESCRIPTOR_SIZE,
1874 UDESC_INTERFACE,
1875 0,
1876 0,
1877 1,
1878 UCLASS_HUB,
1879 USUBCLASS_HUB,
1880 0,
1881 0
1882 };
1883
1884 usb_endpoint_descriptor_t uhci_endpd = {
1885 USB_ENDPOINT_DESCRIPTOR_SIZE,
1886 UDESC_ENDPOINT,
1887 UE_IN | UHCI_INTR_ENDPT,
1888 UE_INTERRUPT,
1889 {8},
1890 255
1891 };
1892
1893 usb_hub_descriptor_t uhci_hubd_piix = {
1894 USB_HUB_DESCRIPTOR_SIZE,
1895 UDESC_HUB,
1896 2,
1897 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
1898 50, /* power on to power good */
1899 0,
1900 { 0x00 }, /* both ports are removable */
1901 };
1902
1903 int
1904 uhci_str(p, l, s)
1905 usb_string_descriptor_t *p;
1906 int l;
1907 char *s;
1908 {
1909 int i;
1910
1911 if (l == 0)
1912 return (0);
1913 p->bLength = 2 * strlen(s) + 2;
1914 if (l == 1)
1915 return (1);
1916 p->bDescriptorType = UDESC_STRING;
1917 l -= 2;
1918 for (i = 0; s[i] && l > 1; i++, l -= 2)
1919 USETW2(p->bString[i], 0, s[i]);
1920 return (2*i+2);
1921 }
1922
1923 /*
1924 * Simulate a hardware hub by handling all the necessary requests.
1925 */
1926 usbd_status
1927 uhci_root_ctrl_transfer(reqh)
1928 usbd_request_handle reqh;
1929 {
1930 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1931 usb_device_request_t *req;
1932 void *buf;
1933 int port, x;
1934 int len, value, index, status, change, l, totlen = 0;
1935 usb_port_status_t ps;
1936 usbd_status r;
1937
1938 if (!reqh->isreq)
1939 panic("uhci_root_ctrl_transfer: not a request\n");
1940 req = &reqh->request;
1941 buf = reqh->buffer;
1942
1943 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
1944 req->bmRequestType, req->bRequest));
1945
1946 len = UGETW(req->wLength);
1947 value = UGETW(req->wValue);
1948 index = UGETW(req->wIndex);
1949 #define C(x,y) ((x) | ((y) << 8))
1950 switch(C(req->bRequest, req->bmRequestType)) {
1951 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1952 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1953 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1954 /*
1955 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1956 * for the integrated root hub.
1957 */
1958 break;
1959 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1960 if (len > 0) {
1961 *(u_int8_t *)buf = sc->sc_conf;
1962 totlen = 1;
1963 }
1964 break;
1965 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1966 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
1967 switch(value >> 8) {
1968 case UDESC_DEVICE:
1969 if ((value & 0xff) != 0) {
1970 r = USBD_IOERROR;
1971 goto ret;
1972 }
1973 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1974 memcpy(buf, &uhci_devd, l);
1975 break;
1976 case UDESC_CONFIG:
1977 if ((value & 0xff) != 0) {
1978 r = USBD_IOERROR;
1979 goto ret;
1980 }
1981 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1982 memcpy(buf, &uhci_confd, l);
1983 buf = (char *)buf + l;
1984 len -= l;
1985 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1986 totlen += l;
1987 memcpy(buf, &uhci_ifcd, l);
1988 buf = (char *)buf + l;
1989 len -= l;
1990 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1991 totlen += l;
1992 memcpy(buf, &uhci_endpd, l);
1993 break;
1994 case UDESC_STRING:
1995 if (len == 0)
1996 break;
1997 *(u_int8_t *)buf = 0;
1998 totlen = 1;
1999 switch (value & 0xff) {
2000 case 1: /* Vendor */
2001 totlen = uhci_str(buf, len, sc->sc_vendor);
2002 break;
2003 case 2: /* Product */
2004 totlen = uhci_str(buf, len, "UHCI root hub");
2005 break;
2006 }
2007 break;
2008 default:
2009 r = USBD_IOERROR;
2010 goto ret;
2011 }
2012 break;
2013 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2014 if (len > 0) {
2015 *(u_int8_t *)buf = 0;
2016 totlen = 1;
2017 }
2018 break;
2019 case C(UR_GET_STATUS, UT_READ_DEVICE):
2020 if (len > 1) {
2021 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2022 totlen = 2;
2023 }
2024 break;
2025 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2026 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2027 if (len > 1) {
2028 USETW(((usb_status_t *)buf)->wStatus, 0);
2029 totlen = 2;
2030 }
2031 break;
2032 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2033 if (value >= USB_MAX_DEVICES) {
2034 r = USBD_IOERROR;
2035 goto ret;
2036 }
2037 sc->sc_addr = value;
2038 break;
2039 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2040 if (value != 0 && value != 1) {
2041 r = USBD_IOERROR;
2042 goto ret;
2043 }
2044 sc->sc_conf = value;
2045 break;
2046 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2047 break;
2048 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2049 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2050 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2051 r = USBD_IOERROR;
2052 goto ret;
2053 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2054 break;
2055 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2056 break;
2057 /* Hub requests */
2058 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2059 break;
2060 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2061 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2062 "port=%d feature=%d\n",
2063 index, value));
2064 if (index == 1)
2065 port = UHCI_PORTSC1;
2066 else if (index == 2)
2067 port = UHCI_PORTSC2;
2068 else {
2069 r = USBD_IOERROR;
2070 goto ret;
2071 }
2072 switch(value) {
2073 case UHF_PORT_ENABLE:
2074 x = UREAD2(sc, port);
2075 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
2076 break;
2077 case UHF_PORT_SUSPEND:
2078 x = UREAD2(sc, port);
2079 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
2080 break;
2081 case UHF_PORT_RESET:
2082 x = UREAD2(sc, port);
2083 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2084 break;
2085 case UHF_C_PORT_CONNECTION:
2086 x = UREAD2(sc, port);
2087 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
2088 break;
2089 case UHF_C_PORT_ENABLE:
2090 x = UREAD2(sc, port);
2091 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
2092 break;
2093 case UHF_C_PORT_OVER_CURRENT:
2094 x = UREAD2(sc, port);
2095 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
2096 break;
2097 case UHF_C_PORT_RESET:
2098 sc->sc_isreset = 0;
2099 r = USBD_NORMAL_COMPLETION;
2100 goto ret;
2101 case UHF_PORT_CONNECTION:
2102 case UHF_PORT_OVER_CURRENT:
2103 case UHF_PORT_POWER:
2104 case UHF_PORT_LOW_SPEED:
2105 case UHF_C_PORT_SUSPEND:
2106 default:
2107 r = USBD_IOERROR;
2108 goto ret;
2109 }
2110 break;
2111 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
2112 if (index == 1)
2113 port = UHCI_PORTSC1;
2114 else if (index == 2)
2115 port = UHCI_PORTSC2;
2116 else {
2117 r = USBD_IOERROR;
2118 goto ret;
2119 }
2120 if (len > 0) {
2121 *(u_int8_t *)buf =
2122 (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
2123 UHCI_PORTSC_LS_SHIFT;
2124 totlen = 1;
2125 }
2126 break;
2127 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2128 if (value != 0) {
2129 r = USBD_IOERROR;
2130 goto ret;
2131 }
2132 l = min(len, USB_HUB_DESCRIPTOR_SIZE);
2133 totlen = l;
2134 memcpy(buf, &uhci_hubd_piix, l);
2135 break;
2136 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2137 if (len != 4) {
2138 r = USBD_IOERROR;
2139 goto ret;
2140 }
2141 memset(buf, 0, len);
2142 totlen = len;
2143 break;
2144 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2145 if (index == 1)
2146 port = UHCI_PORTSC1;
2147 else if (index == 2)
2148 port = UHCI_PORTSC2;
2149 else {
2150 r = USBD_IOERROR;
2151 goto ret;
2152 }
2153 if (len != 4) {
2154 r = USBD_IOERROR;
2155 goto ret;
2156 }
2157 x = UREAD2(sc, port);
2158 status = change = 0;
2159 if (x & UHCI_PORTSC_CCS )
2160 status |= UPS_CURRENT_CONNECT_STATUS;
2161 if (x & UHCI_PORTSC_CSC )
2162 change |= UPS_C_CONNECT_STATUS;
2163 if (x & UHCI_PORTSC_PE )
2164 status |= UPS_PORT_ENABLED;
2165 if (x & UHCI_PORTSC_POEDC)
2166 change |= UPS_C_PORT_ENABLED;
2167 if (x & UHCI_PORTSC_OCI )
2168 status |= UPS_OVERCURRENT_INDICATOR;
2169 if (x & UHCI_PORTSC_OCIC )
2170 change |= UPS_C_OVERCURRENT_INDICATOR;
2171 if (x & UHCI_PORTSC_SUSP )
2172 status |= UPS_SUSPEND;
2173 if (x & UHCI_PORTSC_LSDA )
2174 status |= UPS_LOW_SPEED;
2175 status |= UPS_PORT_POWER;
2176 if (sc->sc_isreset)
2177 change |= UPS_C_PORT_RESET;
2178 USETW(ps.wPortStatus, status);
2179 USETW(ps.wPortChange, change);
2180 l = min(len, sizeof ps);
2181 memcpy(buf, &ps, l);
2182 totlen = l;
2183 break;
2184 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2185 r = USBD_IOERROR;
2186 goto ret;
2187 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2188 break;
2189 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2190 if (index == 1)
2191 port = UHCI_PORTSC1;
2192 else if (index == 2)
2193 port = UHCI_PORTSC2;
2194 else {
2195 r = USBD_IOERROR;
2196 goto ret;
2197 }
2198 switch(value) {
2199 case UHF_PORT_ENABLE:
2200 x = UREAD2(sc, port);
2201 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2202 break;
2203 case UHF_PORT_SUSPEND:
2204 x = UREAD2(sc, port);
2205 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
2206 break;
2207 case UHF_PORT_RESET:
2208 x = UREAD2(sc, port);
2209 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2210 usbd_delay_ms(&sc->sc_bus, 10);
2211 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2212 delay(100);
2213 x = UREAD2(sc, port);
2214 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2215 delay(100);
2216 DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
2217 index, UREAD2(sc, port)));
2218 sc->sc_isreset = 1;
2219 break;
2220 case UHF_C_PORT_CONNECTION:
2221 case UHF_C_PORT_ENABLE:
2222 case UHF_C_PORT_OVER_CURRENT:
2223 case UHF_PORT_CONNECTION:
2224 case UHF_PORT_OVER_CURRENT:
2225 case UHF_PORT_POWER:
2226 case UHF_PORT_LOW_SPEED:
2227 case UHF_C_PORT_SUSPEND:
2228 case UHF_C_PORT_RESET:
2229 default:
2230 r = USBD_IOERROR;
2231 goto ret;
2232 }
2233 break;
2234 default:
2235 r = USBD_IOERROR;
2236 goto ret;
2237 }
2238 reqh->actlen = totlen;
2239 r = USBD_NORMAL_COMPLETION;
2240 ret:
2241 reqh->status = r;
2242 reqh->xfercb(reqh);
2243 return (USBD_IN_PROGRESS);
2244 }
2245
2246 /* Abort a root control request. */
2247 void
2248 uhci_root_ctrl_abort(reqh)
2249 usbd_request_handle reqh;
2250 {
2251 /* Nothing to do, all transfers are syncronous. */
2252 }
2253
2254 /* Close the root pipe. */
2255 void
2256 uhci_root_ctrl_close(pipe)
2257 usbd_pipe_handle pipe;
2258 {
2259 usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle);
2260 DPRINTF(("uhci_root_ctrl_close\n"));
2261 }
2262
2263 /* Abort a root interrupt request. */
2264 void
2265 uhci_root_intr_abort(reqh)
2266 usbd_request_handle reqh;
2267 {
2268 usb_untimeout(uhci_timo, reqh, reqh->timo_handle);
2269 }
2270
2271 /* Start a transfer on the root interrupt pipe */
2272 usbd_status
2273 uhci_root_intr_transfer(reqh)
2274 usbd_request_handle reqh;
2275 {
2276 usbd_pipe_handle pipe = reqh->pipe;
2277 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2278 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2279 usb_dma_t *dmap;
2280 usbd_status r;
2281 int len;
2282
2283 DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d "
2284 "flags=%d\n",
2285 reqh, reqh->buffer, reqh->length, reqh->flags));
2286
2287 len = reqh->length;
2288 dmap = &upipe->u.intr.datadma;
2289 if (len == 0)
2290 return (USBD_INVAL); /* XXX should it be? */
2291
2292 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2293 if (r != USBD_NORMAL_COMPLETION)
2294 return (r);
2295
2296 sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval);
2297 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
2298 return (USBD_IN_PROGRESS);
2299 }
2300
2301 /* Close the root interrupt pipe. */
2302 void
2303 uhci_root_intr_close(pipe)
2304 usbd_pipe_handle pipe;
2305 {
2306 usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle);
2307 DPRINTF(("uhci_root_intr_close\n"));
2308 }
2309