uhci.c revision 1.199.2.2 1 /* $NetBSD: uhci.c,v 1.199.2.2 2007/02/01 08:48:29 ad Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */
3
4 /*
5 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Lennart Augustsson (lennart (at) augustsson.net) at
10 * Carlstedt Research & Technology.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the NetBSD
23 * Foundation, Inc. and its contributors.
24 * 4. Neither the name of The NetBSD Foundation nor the names of its
25 * contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 */
40
41 /*
42 * USB Universal Host Controller driver.
43 * Handles e.g. PIIX3 and PIIX4.
44 *
45 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
46 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
47 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
48 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
49 */
50
51 #include <sys/cdefs.h>
52 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.199.2.2 2007/02/01 08:48:29 ad Exp $");
53
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/kernel.h>
57 #include <sys/malloc.h>
58 #if defined(__NetBSD__) || defined(__OpenBSD__)
59 #include <sys/device.h>
60 #include <sys/select.h>
61 #include <sys/extent.h>
62 #include <uvm/uvm_extern.h>
63 #elif defined(__FreeBSD__)
64 #include <sys/module.h>
65 #include <sys/bus.h>
66 #include <machine/bus_pio.h>
67 #if defined(DIAGNOSTIC) && defined(__i386__)
68 #include <machine/cpu.h>
69 #endif
70 #endif
71 #include <sys/proc.h>
72 #include <sys/queue.h>
73
74 #include <machine/bus.h>
75 #include <machine/endian.h>
76
77 #include <dev/usb/usb.h>
78 #include <dev/usb/usbdi.h>
79 #include <dev/usb/usbdivar.h>
80 #include <dev/usb/usb_mem.h>
81 #include <dev/usb/usb_quirks.h>
82
83 #include <dev/usb/uhcireg.h>
84 #include <dev/usb/uhcivar.h>
85
86 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
87 /*#define UHCI_CTL_LOOP */
88
89 #if defined(__FreeBSD__)
90 #include <machine/clock.h>
91
92 #define delay(d) DELAY(d)
93 #endif
94
95 #if defined(__OpenBSD__)
96 struct cfdriver uhci_cd = {
97 NULL, "uhci", DV_DULL
98 };
99 #endif
100
101 #ifdef UHCI_DEBUG
102 uhci_softc_t *thesc;
103 #define DPRINTF(x) if (uhcidebug) printf x
104 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
105 int uhcidebug = 0;
106 int uhcinoloop = 0;
107 #ifndef __NetBSD__
108 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
109 #endif
110 #else
111 #define DPRINTF(x)
112 #define DPRINTFN(n,x)
113 #endif
114
115 /*
116 * The UHCI controller is little endian, so on big endian machines
117 * the data stored in memory needs to be swapped.
118 */
119 #if defined(__FreeBSD__) || defined(__OpenBSD__)
120 #if BYTE_ORDER == BIG_ENDIAN
121 #define htole32(x) (bswap32(x))
122 #define le32toh(x) (bswap32(x))
123 #else
124 #define htole32(x) (x)
125 #define le32toh(x) (x)
126 #endif
127 #endif
128
129 struct uhci_pipe {
130 struct usbd_pipe pipe;
131 int nexttoggle;
132
133 u_char aborting;
134 usbd_xfer_handle abortstart, abortend;
135
136 /* Info needed for different pipe kinds. */
137 union {
138 /* Control pipe */
139 struct {
140 uhci_soft_qh_t *sqh;
141 usb_dma_t reqdma;
142 uhci_soft_td_t *setup, *stat;
143 u_int length;
144 } ctl;
145 /* Interrupt pipe */
146 struct {
147 int npoll;
148 int isread;
149 uhci_soft_qh_t **qhs;
150 } intr;
151 /* Bulk pipe */
152 struct {
153 uhci_soft_qh_t *sqh;
154 u_int length;
155 int isread;
156 } bulk;
157 /* Iso pipe */
158 struct iso {
159 uhci_soft_td_t **stds;
160 int next, inuse;
161 } iso;
162 } u;
163 };
164
165 Static void uhci_globalreset(uhci_softc_t *);
166 Static usbd_status uhci_portreset(uhci_softc_t*, int);
167 Static void uhci_reset(uhci_softc_t *);
168 Static void uhci_shutdown(void *v);
169 Static void uhci_power(int, void *);
170 Static usbd_status uhci_run(uhci_softc_t *, int run);
171 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
172 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
173 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
174 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
175 #if 0
176 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
177 uhci_intr_info_t *);
178 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
179 #endif
180
181 Static void uhci_free_std_chain(uhci_softc_t *,
182 uhci_soft_td_t *, uhci_soft_td_t *);
183 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
184 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
185 uhci_soft_td_t **, uhci_soft_td_t **);
186 Static void uhci_poll_hub(void *);
187 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
188 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
189 Static void uhci_idone(uhci_intr_info_t *);
190
191 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
192
193 Static void uhci_timeout(void *);
194 Static void uhci_timeout_task(void *);
195 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
196 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
197 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
198 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
199 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
200 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
201 Static int uhci_str(usb_string_descriptor_t *, int, const char *);
202 Static void uhci_add_loop(uhci_softc_t *sc);
203 Static void uhci_rem_loop(uhci_softc_t *sc);
204
205 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
206 Static void uhci_device_isoc_enter(usbd_xfer_handle);
207
208 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
209 Static void uhci_freem(struct usbd_bus *, usb_dma_t *);
210
211 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *);
212 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
213
214 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
215 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
216 Static void uhci_device_ctrl_abort(usbd_xfer_handle);
217 Static void uhci_device_ctrl_close(usbd_pipe_handle);
218 Static void uhci_device_ctrl_done(usbd_xfer_handle);
219
220 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
221 Static usbd_status uhci_device_intr_start(usbd_xfer_handle);
222 Static void uhci_device_intr_abort(usbd_xfer_handle);
223 Static void uhci_device_intr_close(usbd_pipe_handle);
224 Static void uhci_device_intr_done(usbd_xfer_handle);
225
226 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
227 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
228 Static void uhci_device_bulk_abort(usbd_xfer_handle);
229 Static void uhci_device_bulk_close(usbd_pipe_handle);
230 Static void uhci_device_bulk_done(usbd_xfer_handle);
231
232 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
233 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
234 Static void uhci_device_isoc_abort(usbd_xfer_handle);
235 Static void uhci_device_isoc_close(usbd_pipe_handle);
236 Static void uhci_device_isoc_done(usbd_xfer_handle);
237
238 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
239 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
240 Static void uhci_root_ctrl_abort(usbd_xfer_handle);
241 Static void uhci_root_ctrl_close(usbd_pipe_handle);
242 Static void uhci_root_ctrl_done(usbd_xfer_handle);
243
244 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
245 Static usbd_status uhci_root_intr_start(usbd_xfer_handle);
246 Static void uhci_root_intr_abort(usbd_xfer_handle);
247 Static void uhci_root_intr_close(usbd_pipe_handle);
248 Static void uhci_root_intr_done(usbd_xfer_handle);
249
250 Static usbd_status uhci_open(usbd_pipe_handle);
251 Static void uhci_poll(struct usbd_bus *);
252 Static void uhci_softintr(void *);
253
254 Static usbd_status uhci_device_request(usbd_xfer_handle xfer);
255
256 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
257 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
258 Static usbd_status uhci_device_setintr(uhci_softc_t *sc,
259 struct uhci_pipe *pipe, int ival);
260
261 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
262 Static void uhci_noop(usbd_pipe_handle pipe);
263
264 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
265 uhci_soft_qh_t *);
266
267 #ifdef UHCI_DEBUG
268 Static void uhci_dump_all(uhci_softc_t *);
269 Static void uhci_dumpregs(uhci_softc_t *);
270 Static void uhci_dump_qhs(uhci_soft_qh_t *);
271 Static void uhci_dump_qh(uhci_soft_qh_t *);
272 Static void uhci_dump_tds(uhci_soft_td_t *);
273 Static void uhci_dump_td(uhci_soft_td_t *);
274 Static void uhci_dump_ii(uhci_intr_info_t *ii);
275 void uhci_dump(void);
276 #endif
277
278 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
279 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
280 #define UWRITE1(sc, r, x) \
281 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
282 } while (/*CONSTCOND*/0)
283 #define UWRITE2(sc, r, x) \
284 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
285 } while (/*CONSTCOND*/0)
286 #define UWRITE4(sc, r, x) \
287 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
288 } while (/*CONSTCOND*/0)
289 static __inline uint8_t
290 UREAD1(uhci_softc_t *sc, bus_size_t r)
291 {
292
293 UBARR(sc);
294 return bus_space_read_1(sc->iot, sc->ioh, r);
295 }
296
297 static __inline uint16_t
298 UREAD2(uhci_softc_t *sc, bus_size_t r)
299 {
300
301 UBARR(sc);
302 return bus_space_read_2(sc->iot, sc->ioh, r);
303 }
304
305 static __inline uint32_t
306 UREAD4(uhci_softc_t *sc, bus_size_t r)
307 {
308
309 UBARR(sc);
310 return bus_space_read_4(sc->iot, sc->ioh, r);
311 }
312
313 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
314 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
315
316 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
317
318 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
319
320 #define UHCI_INTR_ENDPT 1
321
322 struct usbd_bus_methods uhci_bus_methods = {
323 uhci_open,
324 uhci_softintr,
325 uhci_poll,
326 uhci_allocm,
327 uhci_freem,
328 uhci_allocx,
329 uhci_freex,
330 };
331
332 struct usbd_pipe_methods uhci_root_ctrl_methods = {
333 uhci_root_ctrl_transfer,
334 uhci_root_ctrl_start,
335 uhci_root_ctrl_abort,
336 uhci_root_ctrl_close,
337 uhci_noop,
338 uhci_root_ctrl_done,
339 };
340
341 struct usbd_pipe_methods uhci_root_intr_methods = {
342 uhci_root_intr_transfer,
343 uhci_root_intr_start,
344 uhci_root_intr_abort,
345 uhci_root_intr_close,
346 uhci_noop,
347 uhci_root_intr_done,
348 };
349
350 struct usbd_pipe_methods uhci_device_ctrl_methods = {
351 uhci_device_ctrl_transfer,
352 uhci_device_ctrl_start,
353 uhci_device_ctrl_abort,
354 uhci_device_ctrl_close,
355 uhci_noop,
356 uhci_device_ctrl_done,
357 };
358
359 struct usbd_pipe_methods uhci_device_intr_methods = {
360 uhci_device_intr_transfer,
361 uhci_device_intr_start,
362 uhci_device_intr_abort,
363 uhci_device_intr_close,
364 uhci_device_clear_toggle,
365 uhci_device_intr_done,
366 };
367
368 struct usbd_pipe_methods uhci_device_bulk_methods = {
369 uhci_device_bulk_transfer,
370 uhci_device_bulk_start,
371 uhci_device_bulk_abort,
372 uhci_device_bulk_close,
373 uhci_device_clear_toggle,
374 uhci_device_bulk_done,
375 };
376
377 struct usbd_pipe_methods uhci_device_isoc_methods = {
378 uhci_device_isoc_transfer,
379 uhci_device_isoc_start,
380 uhci_device_isoc_abort,
381 uhci_device_isoc_close,
382 uhci_noop,
383 uhci_device_isoc_done,
384 };
385
386 #define uhci_add_intr_info(sc, ii) \
387 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
388 #define uhci_del_intr_info(ii) \
389 do { \
390 LIST_REMOVE((ii), list); \
391 (ii)->list.le_prev = NULL; \
392 } while (0)
393 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
394
395 Static inline uhci_soft_qh_t *
396 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
397 {
398 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
399
400 for (; pqh->hlink != sqh; pqh = pqh->hlink) {
401 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
402 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
403 printf("uhci_find_prev_qh: QH not found\n");
404 return (NULL);
405 }
406 #endif
407 }
408 return (pqh);
409 }
410
411 void
412 uhci_globalreset(uhci_softc_t *sc)
413 {
414 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
415 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
416 UHCICMD(sc, 0); /* do nothing */
417 }
418
419 usbd_status
420 uhci_init(uhci_softc_t *sc)
421 {
422 usbd_status err;
423 int i, j;
424 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
425 uhci_soft_td_t *std;
426
427 DPRINTFN(1,("uhci_init: start\n"));
428
429 #ifdef UHCI_DEBUG
430 thesc = sc;
431
432 if (uhcidebug > 2)
433 uhci_dumpregs(sc);
434 #endif
435
436 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
437 uhci_globalreset(sc); /* reset the controller */
438 uhci_reset(sc);
439
440 #ifdef __NetBSD__
441 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
442 USB_MEM_RESERVE);
443 #endif
444
445 /* Allocate and initialize real frame array. */
446 err = usb_allocmem(&sc->sc_bus,
447 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
448 UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
449 if (err)
450 return (err);
451 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
452 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
453 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
454
455 /*
456 * Allocate a TD, inactive, that hangs from the last QH.
457 * This is to avoid a bug in the PIIX that makes it run berserk
458 * otherwise.
459 */
460 std = uhci_alloc_std(sc);
461 if (std == NULL)
462 return (USBD_NOMEM);
463 std->link.std = NULL;
464 std->td.td_link = htole32(UHCI_PTR_T);
465 std->td.td_status = htole32(0); /* inactive */
466 std->td.td_token = htole32(0);
467 std->td.td_buffer = htole32(0);
468
469 /* Allocate the dummy QH marking the end and used for looping the QHs.*/
470 lsqh = uhci_alloc_sqh(sc);
471 if (lsqh == NULL)
472 return (USBD_NOMEM);
473 lsqh->hlink = NULL;
474 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
475 lsqh->elink = std;
476 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
477 sc->sc_last_qh = lsqh;
478
479 /* Allocate the dummy QH where bulk traffic will be queued. */
480 bsqh = uhci_alloc_sqh(sc);
481 if (bsqh == NULL)
482 return (USBD_NOMEM);
483 bsqh->hlink = lsqh;
484 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
485 bsqh->elink = NULL;
486 bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
487 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
488
489 /* Allocate dummy QH where high speed control traffic will be queued. */
490 chsqh = uhci_alloc_sqh(sc);
491 if (chsqh == NULL)
492 return (USBD_NOMEM);
493 chsqh->hlink = bsqh;
494 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
495 chsqh->elink = NULL;
496 chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
497 sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
498
499 /* Allocate dummy QH where control traffic will be queued. */
500 clsqh = uhci_alloc_sqh(sc);
501 if (clsqh == NULL)
502 return (USBD_NOMEM);
503 clsqh->hlink = bsqh;
504 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
505 clsqh->elink = NULL;
506 clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
507 sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
508
509 /*
510 * Make all (virtual) frame list pointers point to the interrupt
511 * queue heads and the interrupt queue heads at the control
512 * queue head and point the physical frame list to the virtual.
513 */
514 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
515 std = uhci_alloc_std(sc);
516 sqh = uhci_alloc_sqh(sc);
517 if (std == NULL || sqh == NULL)
518 return (USBD_NOMEM);
519 std->link.sqh = sqh;
520 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
521 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
522 std->td.td_token = htole32(0);
523 std->td.td_buffer = htole32(0);
524 sqh->hlink = clsqh;
525 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
526 sqh->elink = NULL;
527 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
528 sc->sc_vframes[i].htd = std;
529 sc->sc_vframes[i].etd = std;
530 sc->sc_vframes[i].hqh = sqh;
531 sc->sc_vframes[i].eqh = sqh;
532 for (j = i;
533 j < UHCI_FRAMELIST_COUNT;
534 j += UHCI_VFRAMELIST_COUNT)
535 sc->sc_pframes[j] = htole32(std->physaddr);
536 }
537
538 LIST_INIT(&sc->sc_intrhead);
539
540 SIMPLEQ_INIT(&sc->sc_free_xfers);
541
542 usb_callout_init(sc->sc_poll_handle);
543
544 /* Set up the bus struct. */
545 sc->sc_bus.methods = &uhci_bus_methods;
546 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
547
548 #if defined(__NetBSD__) || defined(__OpenBSD__)
549 sc->sc_suspend = PWR_RESUME;
550 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev),
551 uhci_power, sc);
552 sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
553 #endif
554
555 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
556
557 DPRINTFN(1,("uhci_init: enabling\n"));
558 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
559 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
560
561 return (uhci_run(sc, 1)); /* and here we go... */
562 }
563
564 #if defined(__NetBSD__) || defined(__OpenBSD__)
565 int
566 uhci_activate(device_ptr_t self, enum devact act)
567 {
568 struct uhci_softc *sc = (struct uhci_softc *)self;
569 int rv = 0;
570
571 switch (act) {
572 case DVACT_ACTIVATE:
573 return (EOPNOTSUPP);
574
575 case DVACT_DEACTIVATE:
576 if (sc->sc_child != NULL)
577 rv = config_deactivate(sc->sc_child);
578 break;
579 }
580 return (rv);
581 }
582
583 int
584 uhci_detach(struct uhci_softc *sc, int flags)
585 {
586 usbd_xfer_handle xfer;
587 int rv = 0;
588
589 if (sc->sc_child != NULL)
590 rv = config_detach(sc->sc_child, flags);
591
592 if (rv != 0)
593 return (rv);
594
595 #if defined(__NetBSD__) || defined(__OpenBSD__)
596 powerhook_disestablish(sc->sc_powerhook);
597 shutdownhook_disestablish(sc->sc_shutdownhook);
598 #endif
599
600 /* Free all xfers associated with this HC. */
601 for (;;) {
602 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
603 if (xfer == NULL)
604 break;
605 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
606 free(xfer, M_USB);
607 }
608
609 /* XXX free other data structures XXX */
610
611 return (rv);
612 }
613 #endif
614
615 usbd_status
616 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
617 {
618 struct uhci_softc *sc = (struct uhci_softc *)bus;
619 usbd_status status;
620 u_int32_t n;
621
622 /*
623 * XXX
624 * Since we are allocating a buffer we can assume that we will
625 * need TDs for it. Since we don't want to allocate those from
626 * an interrupt context, we allocate them here and free them again.
627 * This is no guarantee that we'll get the TDs next time...
628 */
629 n = size / 8;
630 if (n > 16) {
631 u_int32_t i;
632 uhci_soft_td_t **stds;
633 DPRINTF(("uhci_allocm: get %d TDs\n", n));
634 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
635 M_WAITOK|M_ZERO);
636 for(i=0; i < n; i++)
637 stds[i] = uhci_alloc_std(sc);
638 for(i=0; i < n; i++)
639 if (stds[i] != NULL)
640 uhci_free_std(sc, stds[i]);
641 free(stds, M_TEMP);
642 }
643
644
645 status = usb_allocmem(&sc->sc_bus, size, 0, dma);
646 #ifdef __NetBSD__
647 if (status == USBD_NOMEM)
648 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
649 #endif
650 return status;
651 }
652
653 void
654 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
655 {
656 #ifdef __NetBSD__
657 if (dma->block->flags & USB_DMA_RESERVE) {
658 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
659 dma);
660 return;
661 }
662 #endif
663 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
664 }
665
666 usbd_xfer_handle
667 uhci_allocx(struct usbd_bus *bus)
668 {
669 struct uhci_softc *sc = (struct uhci_softc *)bus;
670 usbd_xfer_handle xfer;
671
672 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
673 if (xfer != NULL) {
674 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
675 #ifdef DIAGNOSTIC
676 if (xfer->busy_free != XFER_FREE) {
677 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
678 xfer->busy_free);
679 }
680 #endif
681 } else {
682 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
683 }
684 if (xfer != NULL) {
685 memset(xfer, 0, sizeof (struct uhci_xfer));
686 UXFER(xfer)->iinfo.sc = sc;
687 #ifdef DIAGNOSTIC
688 UXFER(xfer)->iinfo.isdone = 1;
689 xfer->busy_free = XFER_BUSY;
690 #endif
691 }
692 return (xfer);
693 }
694
695 void
696 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
697 {
698 struct uhci_softc *sc = (struct uhci_softc *)bus;
699
700 #ifdef DIAGNOSTIC
701 if (xfer->busy_free != XFER_BUSY) {
702 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
703 xfer->busy_free);
704 return;
705 }
706 xfer->busy_free = XFER_FREE;
707 if (!UXFER(xfer)->iinfo.isdone) {
708 printf("uhci_freex: !isdone\n");
709 return;
710 }
711 #endif
712 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
713 }
714
715 /*
716 * Shut down the controller when the system is going down.
717 */
718 void
719 uhci_shutdown(void *v)
720 {
721 uhci_softc_t *sc = v;
722 int s;
723
724 DPRINTF(("uhci_shutdown: stopping the HC\n"));
725
726 /*
727 * Use polling mode to prevent the interrupts shutting
728 * us down before we shut them down.
729 */
730 s = splhardusb();
731 sc->sc_bus.use_polling++;
732 uhci_run(sc, 0); /* stop the controller */
733 sc->sc_bus.use_polling--;
734 splx(s);
735 }
736
737 /*
738 * Handle suspend/resume.
739 *
740 * We need to switch to polling mode here, because this routine is
741 * called from an interrupt context. This is all right since we
742 * are almost suspended anyway.
743 */
744 void
745 uhci_power(int why, void *v)
746 {
747 uhci_softc_t *sc = v;
748 int cmd;
749 int s;
750
751 s = splhardusb();
752 cmd = UREAD2(sc, UHCI_CMD);
753
754 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
755 sc, why, sc->sc_suspend, cmd));
756
757 switch (why) {
758 case PWR_SUSPEND:
759 case PWR_STANDBY:
760 #ifdef UHCI_DEBUG
761 if (uhcidebug > 2)
762 uhci_dumpregs(sc);
763 #endif
764 if (sc->sc_intr_xfer != NULL)
765 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
766 sc->sc_intr_xfer);
767 sc->sc_bus.use_polling++;
768 uhci_run(sc, 0); /* stop the controller */
769
770 /* save some state if BIOS doesn't */
771 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
772 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
773
774 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
775
776 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
777 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
778 sc->sc_suspend = why;
779 sc->sc_bus.use_polling--;
780 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
781 break;
782 case PWR_RESUME:
783 #ifdef DIAGNOSTIC
784 if (sc->sc_suspend == PWR_RESUME)
785 printf("uhci_power: weird, resume without suspend.\n");
786 #endif
787 sc->sc_bus.use_polling++;
788 sc->sc_suspend = why;
789 if (cmd & UHCI_CMD_RS)
790 uhci_run(sc, 0); /* in case BIOS has started it */
791
792 /* restore saved state */
793 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
794 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
795 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
796
797 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
798 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
799 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
800 UHCICMD(sc, UHCI_CMD_MAXP);
801 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
802 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
803 uhci_run(sc, 1); /* and start traffic again */
804 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
805 sc->sc_bus.use_polling--;
806 if (sc->sc_intr_xfer != NULL)
807 usb_callout(sc->sc_poll_handle, sc->sc_ival,
808 uhci_poll_hub, sc->sc_intr_xfer);
809 #ifdef UHCI_DEBUG
810 if (uhcidebug > 2)
811 uhci_dumpregs(sc);
812 #endif
813 break;
814 case PWR_SOFTSUSPEND:
815 case PWR_SOFTSTANDBY:
816 case PWR_SOFTRESUME:
817 break;
818 }
819 splx(s);
820 }
821
822 #ifdef UHCI_DEBUG
823 Static void
824 uhci_dumpregs(uhci_softc_t *sc)
825 {
826 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
827 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
828 USBDEVNAME(sc->sc_bus.bdev),
829 UREAD2(sc, UHCI_CMD),
830 UREAD2(sc, UHCI_STS),
831 UREAD2(sc, UHCI_INTR),
832 UREAD2(sc, UHCI_FRNUM),
833 UREAD4(sc, UHCI_FLBASEADDR),
834 UREAD1(sc, UHCI_SOF),
835 UREAD2(sc, UHCI_PORTSC1),
836 UREAD2(sc, UHCI_PORTSC2)));
837 }
838
839 void
840 uhci_dump_td(uhci_soft_td_t *p)
841 {
842 char sbuf[128], sbuf2[128];
843
844 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
845 "token=0x%08lx buffer=0x%08lx\n",
846 p, (long)p->physaddr,
847 (long)le32toh(p->td.td_link),
848 (long)le32toh(p->td.td_status),
849 (long)le32toh(p->td.td_token),
850 (long)le32toh(p->td.td_buffer)));
851
852 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
853 sbuf, sizeof(sbuf));
854 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
855 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
856 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
857 sbuf2, sizeof(sbuf2));
858
859 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
860 "D=%d,maxlen=%d\n", sbuf, sbuf2,
861 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
862 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
863 UHCI_TD_GET_PID(le32toh(p->td.td_token)),
864 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
865 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
866 UHCI_TD_GET_DT(le32toh(p->td.td_token)),
867 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
868 }
869
870 void
871 uhci_dump_qh(uhci_soft_qh_t *sqh)
872 {
873 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
874 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
875 le32toh(sqh->qh.qh_elink)));
876 }
877
878
879 #if 1
880 void
881 uhci_dump(void)
882 {
883 uhci_dump_all(thesc);
884 }
885 #endif
886
887 void
888 uhci_dump_all(uhci_softc_t *sc)
889 {
890 uhci_dumpregs(sc);
891 printf("intrs=%d\n", sc->sc_bus.no_intrs);
892 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
893 uhci_dump_qh(sc->sc_lctl_start);
894 }
895
896
897 void
898 uhci_dump_qhs(uhci_soft_qh_t *sqh)
899 {
900 uhci_dump_qh(sqh);
901
902 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
903 * Traverses sideways first, then down.
904 *
905 * QH1
906 * QH2
907 * No QH
908 * TD2.1
909 * TD2.2
910 * TD1.1
911 * etc.
912 *
913 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
914 */
915
916
917 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
918 uhci_dump_qhs(sqh->hlink);
919 else
920 DPRINTF(("No QH\n"));
921
922 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
923 uhci_dump_tds(sqh->elink);
924 else
925 DPRINTF(("No TD\n"));
926 }
927
928 void
929 uhci_dump_tds(uhci_soft_td_t *std)
930 {
931 uhci_soft_td_t *td;
932
933 for(td = std; td != NULL; td = td->link.std) {
934 uhci_dump_td(td);
935
936 /* Check whether the link pointer in this TD marks
937 * the link pointer as end of queue. This avoids
938 * printing the free list in case the queue/TD has
939 * already been moved there (seatbelt).
940 */
941 if (le32toh(td->td.td_link) & UHCI_PTR_T ||
942 le32toh(td->td.td_link) == 0)
943 break;
944 }
945 }
946
947 Static void
948 uhci_dump_ii(uhci_intr_info_t *ii)
949 {
950 usbd_pipe_handle pipe;
951 usb_endpoint_descriptor_t *ed;
952 usbd_device_handle dev;
953
954 #ifdef DIAGNOSTIC
955 #define DONE ii->isdone
956 #else
957 #define DONE 0
958 #endif
959 if (ii == NULL) {
960 printf("ii NULL\n");
961 return;
962 }
963 if (ii->xfer == NULL) {
964 printf("ii %p: done=%d xfer=NULL\n",
965 ii, DONE);
966 return;
967 }
968 pipe = ii->xfer->pipe;
969 if (pipe == NULL) {
970 printf("ii %p: done=%d xfer=%p pipe=NULL\n",
971 ii, DONE, ii->xfer);
972 return;
973 }
974 if (pipe->endpoint == NULL) {
975 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
976 ii, DONE, ii->xfer, pipe);
977 return;
978 }
979 if (pipe->device == NULL) {
980 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
981 ii, DONE, ii->xfer, pipe);
982 return;
983 }
984 ed = pipe->endpoint->edesc;
985 dev = pipe->device;
986 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
987 ii, DONE, ii->xfer, dev,
988 UGETW(dev->ddesc.idVendor),
989 UGETW(dev->ddesc.idProduct),
990 dev->address, pipe,
991 ed->bEndpointAddress, ed->bmAttributes);
992 #undef DONE
993 }
994
995 void uhci_dump_iis(struct uhci_softc *sc);
996 void
997 uhci_dump_iis(struct uhci_softc *sc)
998 {
999 uhci_intr_info_t *ii;
1000
1001 printf("intr_info list:\n");
1002 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
1003 uhci_dump_ii(ii);
1004 }
1005
1006 void iidump(void);
1007 void iidump(void) { uhci_dump_iis(thesc); }
1008
1009 #endif
1010
1011 /*
1012 * This routine is executed periodically and simulates interrupts
1013 * from the root controller interrupt pipe for port status change.
1014 */
1015 void
1016 uhci_poll_hub(void *addr)
1017 {
1018 usbd_xfer_handle xfer = addr;
1019 usbd_pipe_handle pipe = xfer->pipe;
1020 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1021 int s;
1022 u_char *p;
1023
1024 DPRINTFN(20, ("uhci_poll_hub\n"));
1025
1026 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
1027
1028 p = KERNADDR(&xfer->dmabuf, 0);
1029 p[0] = 0;
1030 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1031 p[0] |= 1<<1;
1032 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1033 p[0] |= 1<<2;
1034 if (p[0] == 0)
1035 /* No change, try again in a while */
1036 return;
1037
1038 xfer->actlen = 1;
1039 xfer->status = USBD_NORMAL_COMPLETION;
1040 s = splusb();
1041 xfer->device->bus->intr_context++;
1042 usb_transfer_complete(xfer);
1043 xfer->device->bus->intr_context--;
1044 splx(s);
1045 }
1046
1047 void
1048 uhci_root_intr_done(usbd_xfer_handle xfer)
1049 {
1050 }
1051
1052 void
1053 uhci_root_ctrl_done(usbd_xfer_handle xfer)
1054 {
1055 }
1056
1057 /*
1058 * Let the last QH loop back to the high speed control transfer QH.
1059 * This is what intel calls "bandwidth reclamation" and improves
1060 * USB performance a lot for some devices.
1061 * If we are already looping, just count it.
1062 */
1063 void
1064 uhci_add_loop(uhci_softc_t *sc) {
1065 #ifdef UHCI_DEBUG
1066 if (uhcinoloop)
1067 return;
1068 #endif
1069 if (++sc->sc_loops == 1) {
1070 DPRINTFN(5,("uhci_start_loop: add\n"));
1071 /* Note, we don't loop back the soft pointer. */
1072 sc->sc_last_qh->qh.qh_hlink =
1073 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
1074 }
1075 }
1076
1077 void
1078 uhci_rem_loop(uhci_softc_t *sc) {
1079 #ifdef UHCI_DEBUG
1080 if (uhcinoloop)
1081 return;
1082 #endif
1083 if (--sc->sc_loops == 0) {
1084 DPRINTFN(5,("uhci_end_loop: remove\n"));
1085 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
1086 }
1087 }
1088
1089 /* Add high speed control QH, called at splusb(). */
1090 void
1091 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1092 {
1093 uhci_soft_qh_t *eqh;
1094
1095 SPLUSBCHECK;
1096
1097 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
1098 eqh = sc->sc_hctl_end;
1099 sqh->hlink = eqh->hlink;
1100 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1101 eqh->hlink = sqh;
1102 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1103 sc->sc_hctl_end = sqh;
1104 #ifdef UHCI_CTL_LOOP
1105 uhci_add_loop(sc);
1106 #endif
1107 }
1108
1109 /* Remove high speed control QH, called at splusb(). */
1110 void
1111 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1112 {
1113 uhci_soft_qh_t *pqh;
1114
1115 SPLUSBCHECK;
1116
1117 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
1118 #ifdef UHCI_CTL_LOOP
1119 uhci_rem_loop(sc);
1120 #endif
1121 /*
1122 * The T bit should be set in the elink of the QH so that the HC
1123 * doesn't follow the pointer. This condition may fail if the
1124 * the transferred packet was short so that the QH still points
1125 * at the last used TD.
1126 * In this case we set the T bit and wait a little for the HC
1127 * to stop looking at the TD.
1128 */
1129 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1130 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1131 delay(UHCI_QH_REMOVE_DELAY);
1132 }
1133
1134 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1135 pqh->hlink = sqh->hlink;
1136 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1137 delay(UHCI_QH_REMOVE_DELAY);
1138 if (sc->sc_hctl_end == sqh)
1139 sc->sc_hctl_end = pqh;
1140 }
1141
1142 /* Add low speed control QH, called at splusb(). */
1143 void
1144 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1145 {
1146 uhci_soft_qh_t *eqh;
1147
1148 SPLUSBCHECK;
1149
1150 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1151 eqh = sc->sc_lctl_end;
1152 sqh->hlink = eqh->hlink;
1153 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1154 eqh->hlink = sqh;
1155 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1156 sc->sc_lctl_end = sqh;
1157 }
1158
1159 /* Remove low speed control QH, called at splusb(). */
1160 void
1161 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1162 {
1163 uhci_soft_qh_t *pqh;
1164
1165 SPLUSBCHECK;
1166
1167 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1168 /* See comment in uhci_remove_hs_ctrl() */
1169 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1170 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1171 delay(UHCI_QH_REMOVE_DELAY);
1172 }
1173 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1174 pqh->hlink = sqh->hlink;
1175 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1176 delay(UHCI_QH_REMOVE_DELAY);
1177 if (sc->sc_lctl_end == sqh)
1178 sc->sc_lctl_end = pqh;
1179 }
1180
1181 /* Add bulk QH, called at splusb(). */
1182 void
1183 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1184 {
1185 uhci_soft_qh_t *eqh;
1186
1187 SPLUSBCHECK;
1188
1189 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1190 eqh = sc->sc_bulk_end;
1191 sqh->hlink = eqh->hlink;
1192 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1193 eqh->hlink = sqh;
1194 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1195 sc->sc_bulk_end = sqh;
1196 uhci_add_loop(sc);
1197 }
1198
1199 /* Remove bulk QH, called at splusb(). */
1200 void
1201 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1202 {
1203 uhci_soft_qh_t *pqh;
1204
1205 SPLUSBCHECK;
1206
1207 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1208 uhci_rem_loop(sc);
1209 /* See comment in uhci_remove_hs_ctrl() */
1210 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1211 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1212 delay(UHCI_QH_REMOVE_DELAY);
1213 }
1214 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1215 pqh->hlink = sqh->hlink;
1216 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1217 delay(UHCI_QH_REMOVE_DELAY);
1218 if (sc->sc_bulk_end == sqh)
1219 sc->sc_bulk_end = pqh;
1220 }
1221
1222 Static int uhci_intr1(uhci_softc_t *);
1223
1224 int
1225 uhci_intr(void *arg)
1226 {
1227 uhci_softc_t *sc = arg;
1228
1229 if (sc->sc_dying)
1230 return (0);
1231
1232 if (sc->sc_bus.use_polling) {
1233 #ifdef DIAGNOSTIC
1234 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
1235 #endif
1236 return (0);
1237 }
1238
1239 return (uhci_intr1(sc));
1240 }
1241
1242 int
1243 uhci_intr1(uhci_softc_t *sc)
1244 {
1245 int status;
1246 int ack;
1247
1248 #ifdef UHCI_DEBUG
1249 if (uhcidebug > 15) {
1250 DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
1251 uhci_dumpregs(sc);
1252 }
1253 #endif
1254
1255 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1256 if (status == 0) /* The interrupt was not for us. */
1257 return (0);
1258
1259 if (sc->sc_suspend != PWR_RESUME) {
1260 #ifdef DIAGNOSTIC
1261 printf("%s: interrupt while not operating ignored\n",
1262 USBDEVNAME(sc->sc_bus.bdev));
1263 #endif
1264 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1265 return (0);
1266 }
1267
1268 ack = 0;
1269 if (status & UHCI_STS_USBINT)
1270 ack |= UHCI_STS_USBINT;
1271 if (status & UHCI_STS_USBEI)
1272 ack |= UHCI_STS_USBEI;
1273 if (status & UHCI_STS_RD) {
1274 ack |= UHCI_STS_RD;
1275 #ifdef UHCI_DEBUG
1276 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1277 #endif
1278 }
1279 if (status & UHCI_STS_HSE) {
1280 ack |= UHCI_STS_HSE;
1281 printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
1282 }
1283 if (status & UHCI_STS_HCPE) {
1284 ack |= UHCI_STS_HCPE;
1285 printf("%s: host controller process error\n",
1286 USBDEVNAME(sc->sc_bus.bdev));
1287 }
1288 if (status & UHCI_STS_HCH) {
1289 /* no acknowledge needed */
1290 if (!sc->sc_dying) {
1291 printf("%s: host controller halted\n",
1292 USBDEVNAME(sc->sc_bus.bdev));
1293 #ifdef UHCI_DEBUG
1294 uhci_dump_all(sc);
1295 #endif
1296 }
1297 sc->sc_dying = 1;
1298 }
1299
1300 if (!ack)
1301 return (0); /* nothing to acknowledge */
1302 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1303
1304 sc->sc_bus.no_intrs++;
1305 usb_schedsoftintr(&sc->sc_bus);
1306
1307 DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
1308
1309 return (1);
1310 }
1311
1312 void
1313 uhci_softintr(void *v)
1314 {
1315 uhci_softc_t *sc = v;
1316 uhci_intr_info_t *ii, *nextii;
1317
1318 DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
1319 sc->sc_bus.intr_context));
1320
1321 sc->sc_bus.intr_context++;
1322
1323 /*
1324 * Interrupts on UHCI really suck. When the host controller
1325 * interrupts because a transfer is completed there is no
1326 * way of knowing which transfer it was. You can scan down
1327 * the TDs and QHs of the previous frame to limit the search,
1328 * but that assumes that the interrupt was not delayed by more
1329 * than 1 ms, which may not always be true (e.g. after debug
1330 * output on a slow console).
1331 * We scan all interrupt descriptors to see if any have
1332 * completed.
1333 */
1334 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
1335 nextii = LIST_NEXT(ii, list);
1336 uhci_check_intr(sc, ii);
1337 }
1338
1339 #ifdef USB_USE_SOFTINTR
1340 if (sc->sc_softwake) {
1341 sc->sc_softwake = 0;
1342 wakeup(&sc->sc_softwake);
1343 }
1344 #endif /* USB_USE_SOFTINTR */
1345
1346 sc->sc_bus.intr_context--;
1347 }
1348
1349 /* Check for an interrupt. */
1350 void
1351 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1352 {
1353 uhci_soft_td_t *std, *lstd;
1354 u_int32_t status;
1355
1356 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1357 #ifdef DIAGNOSTIC
1358 if (ii == NULL) {
1359 printf("uhci_check_intr: no ii? %p\n", ii);
1360 return;
1361 }
1362 #endif
1363 if (ii->xfer->status == USBD_CANCELLED ||
1364 ii->xfer->status == USBD_TIMEOUT) {
1365 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1366 return;
1367 }
1368
1369 if (ii->stdstart == NULL)
1370 return;
1371 lstd = ii->stdend;
1372 #ifdef DIAGNOSTIC
1373 if (lstd == NULL) {
1374 printf("uhci_check_intr: std==0\n");
1375 return;
1376 }
1377 #endif
1378 /*
1379 * If the last TD is still active we need to check whether there
1380 * is an error somewhere in the middle, or whether there was a
1381 * short packet (SPD and not ACTIVE).
1382 */
1383 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1384 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1385 for (std = ii->stdstart; std != lstd; std = std->link.std) {
1386 status = le32toh(std->td.td_status);
1387 /* If there's an active TD the xfer isn't done. */
1388 if (status & UHCI_TD_ACTIVE)
1389 break;
1390 /* Any kind of error makes the xfer done. */
1391 if (status & UHCI_TD_STALLED)
1392 goto done;
1393 /* We want short packets, and it is short: it's done */
1394 if ((status & UHCI_TD_SPD) &&
1395 UHCI_TD_GET_ACTLEN(status) <
1396 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
1397 goto done;
1398 }
1399 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1400 ii, ii->stdstart));
1401 return;
1402 }
1403 done:
1404 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1405 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
1406 uhci_idone(ii);
1407 }
1408
1409 /* Called at splusb() */
1410 void
1411 uhci_idone(uhci_intr_info_t *ii)
1412 {
1413 usbd_xfer_handle xfer = ii->xfer;
1414 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1415 uhci_soft_td_t *std;
1416 u_int32_t status = 0, nstatus;
1417 int actlen;
1418
1419 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1420 #ifdef DIAGNOSTIC
1421 {
1422 int s = splhigh();
1423 if (ii->isdone) {
1424 splx(s);
1425 #ifdef UHCI_DEBUG
1426 printf("uhci_idone: ii is done!\n ");
1427 uhci_dump_ii(ii);
1428 #else
1429 printf("uhci_idone: ii=%p is done!\n", ii);
1430 #endif
1431 return;
1432 }
1433 ii->isdone = 1;
1434 splx(s);
1435 }
1436 #endif
1437
1438 if (xfer->nframes != 0) {
1439 /* Isoc transfer, do things differently. */
1440 uhci_soft_td_t **stds = upipe->u.iso.stds;
1441 int i, n, nframes, len;
1442
1443 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1444
1445 nframes = xfer->nframes;
1446 actlen = 0;
1447 n = UXFER(xfer)->curframe;
1448 for (i = 0; i < nframes; i++) {
1449 std = stds[n];
1450 #ifdef UHCI_DEBUG
1451 if (uhcidebug > 5) {
1452 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1453 uhci_dump_td(std);
1454 }
1455 #endif
1456 if (++n >= UHCI_VFRAMELIST_COUNT)
1457 n = 0;
1458 status = le32toh(std->td.td_status);
1459 len = UHCI_TD_GET_ACTLEN(status);
1460 xfer->frlengths[i] = len;
1461 actlen += len;
1462 }
1463 upipe->u.iso.inuse -= nframes;
1464 xfer->actlen = actlen;
1465 xfer->status = USBD_NORMAL_COMPLETION;
1466 goto end;
1467 }
1468
1469 #ifdef UHCI_DEBUG
1470 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1471 ii, xfer, upipe));
1472 if (uhcidebug > 10)
1473 uhci_dump_tds(ii->stdstart);
1474 #endif
1475
1476 /* The transfer is done, compute actual length and status. */
1477 actlen = 0;
1478 for (std = ii->stdstart; std != NULL; std = std->link.std) {
1479 nstatus = le32toh(std->td.td_status);
1480 if (nstatus & UHCI_TD_ACTIVE)
1481 break;
1482
1483 status = nstatus;
1484 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1485 UHCI_TD_PID_SETUP)
1486 actlen += UHCI_TD_GET_ACTLEN(status);
1487 else {
1488 /*
1489 * UHCI will report CRCTO in addition to a STALL or NAK
1490 * for a SETUP transaction. See section 3.2.2, "TD
1491 * CONTROL AND STATUS".
1492 */
1493 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1494 status &= ~UHCI_TD_CRCTO;
1495 }
1496 }
1497 /* If there are left over TDs we need to update the toggle. */
1498 if (std != NULL)
1499 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1500
1501 status &= UHCI_TD_ERROR;
1502 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1503 actlen, status));
1504 xfer->actlen = actlen;
1505 if (status != 0) {
1506 #ifdef UHCI_DEBUG
1507 char sbuf[128];
1508
1509 bitmask_snprintf((u_int32_t)status,
1510 "\20\22BITSTUFF\23CRCTO\24NAK\25"
1511 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1512 sbuf, sizeof(sbuf));
1513
1514 DPRINTFN((status == UHCI_TD_STALLED)*10,
1515 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1516 "status 0x%s\n",
1517 xfer->pipe->device->address,
1518 xfer->pipe->endpoint->edesc->bEndpointAddress,
1519 sbuf));
1520 #endif
1521
1522 if (status == UHCI_TD_STALLED)
1523 xfer->status = USBD_STALLED;
1524 else
1525 xfer->status = USBD_IOERROR; /* more info XXX */
1526 } else {
1527 xfer->status = USBD_NORMAL_COMPLETION;
1528 }
1529
1530 end:
1531 usb_transfer_complete(xfer);
1532 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1533 }
1534
1535 /*
1536 * Called when a request does not complete.
1537 */
1538 void
1539 uhci_timeout(void *addr)
1540 {
1541 uhci_intr_info_t *ii = addr;
1542 struct uhci_xfer *uxfer = UXFER(ii->xfer);
1543 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1544 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1545
1546 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1547
1548 if (sc->sc_dying) {
1549 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1550 return;
1551 }
1552
1553 /* Execute the abort in a process context. */
1554 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
1555 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
1556 USB_TASKQ_HC);
1557 }
1558
1559 void
1560 uhci_timeout_task(void *addr)
1561 {
1562 usbd_xfer_handle xfer = addr;
1563 int s;
1564
1565 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1566
1567 s = splusb();
1568 uhci_abort_xfer(xfer, USBD_TIMEOUT);
1569 splx(s);
1570 }
1571
1572 /*
1573 * Wait here until controller claims to have an interrupt.
1574 * Then call uhci_intr and return. Use timeout to avoid waiting
1575 * too long.
1576 * Only used during boot when interrupts are not enabled yet.
1577 */
1578 void
1579 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1580 {
1581 int timo = xfer->timeout;
1582 uhci_intr_info_t *ii;
1583
1584 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1585
1586 xfer->status = USBD_IN_PROGRESS;
1587 for (; timo >= 0; timo--) {
1588 usb_delay_ms(&sc->sc_bus, 1);
1589 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1590 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
1591 uhci_intr1(sc);
1592 if (xfer->status != USBD_IN_PROGRESS)
1593 return;
1594 }
1595 }
1596
1597 /* Timeout */
1598 DPRINTF(("uhci_waitintr: timeout\n"));
1599 for (ii = LIST_FIRST(&sc->sc_intrhead);
1600 ii != NULL && ii->xfer != xfer;
1601 ii = LIST_NEXT(ii, list))
1602 ;
1603 #ifdef DIAGNOSTIC
1604 if (ii == NULL)
1605 panic("uhci_waitintr: lost intr_info");
1606 #endif
1607 uhci_idone(ii);
1608 }
1609
1610 void
1611 uhci_poll(struct usbd_bus *bus)
1612 {
1613 uhci_softc_t *sc = (uhci_softc_t *)bus;
1614
1615 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
1616 uhci_intr1(sc);
1617 }
1618
1619 void
1620 uhci_reset(uhci_softc_t *sc)
1621 {
1622 int n;
1623
1624 UHCICMD(sc, UHCI_CMD_HCRESET);
1625 /* The reset bit goes low when the controller is done. */
1626 for (n = 0; n < UHCI_RESET_TIMEOUT &&
1627 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1628 usb_delay_ms(&sc->sc_bus, 1);
1629 if (n >= UHCI_RESET_TIMEOUT)
1630 printf("%s: controller did not reset\n",
1631 USBDEVNAME(sc->sc_bus.bdev));
1632 }
1633
1634 usbd_status
1635 uhci_run(uhci_softc_t *sc, int run)
1636 {
1637 int s, n, running;
1638 u_int16_t cmd;
1639
1640 run = run != 0;
1641 s = splhardusb();
1642 DPRINTF(("uhci_run: setting run=%d\n", run));
1643 cmd = UREAD2(sc, UHCI_CMD);
1644 if (run)
1645 cmd |= UHCI_CMD_RS;
1646 else
1647 cmd &= ~UHCI_CMD_RS;
1648 UHCICMD(sc, cmd);
1649 for(n = 0; n < 10; n++) {
1650 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1651 /* return when we've entered the state we want */
1652 if (run == running) {
1653 splx(s);
1654 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1655 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1656 return (USBD_NORMAL_COMPLETION);
1657 }
1658 usb_delay_ms(&sc->sc_bus, 1);
1659 }
1660 splx(s);
1661 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1662 run ? "start" : "stop");
1663 return (USBD_IOERROR);
1664 }
1665
1666 /*
1667 * Memory management routines.
1668 * uhci_alloc_std allocates TDs
1669 * uhci_alloc_sqh allocates QHs
1670 * These two routines do their own free list management,
1671 * partly for speed, partly because allocating DMAable memory
1672 * has page size granularaity so much memory would be wasted if
1673 * only one TD/QH (32 bytes) was placed in each allocated chunk.
1674 */
1675
1676 uhci_soft_td_t *
1677 uhci_alloc_std(uhci_softc_t *sc)
1678 {
1679 uhci_soft_td_t *std;
1680 usbd_status err;
1681 int i, offs;
1682 usb_dma_t dma;
1683
1684 if (sc->sc_freetds == NULL) {
1685 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1686 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1687 UHCI_TD_ALIGN, &dma);
1688 if (err)
1689 return (0);
1690 for(i = 0; i < UHCI_STD_CHUNK; i++) {
1691 offs = i * UHCI_STD_SIZE;
1692 std = KERNADDR(&dma, offs);
1693 std->physaddr = DMAADDR(&dma, offs);
1694 std->link.std = sc->sc_freetds;
1695 sc->sc_freetds = std;
1696 }
1697 }
1698 std = sc->sc_freetds;
1699 sc->sc_freetds = std->link.std;
1700 memset(&std->td, 0, sizeof(uhci_td_t));
1701 return std;
1702 }
1703
1704 void
1705 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1706 {
1707 #ifdef DIAGNOSTIC
1708 #define TD_IS_FREE 0x12345678
1709 if (le32toh(std->td.td_token) == TD_IS_FREE) {
1710 printf("uhci_free_std: freeing free TD %p\n", std);
1711 return;
1712 }
1713 std->td.td_token = htole32(TD_IS_FREE);
1714 #endif
1715 std->link.std = sc->sc_freetds;
1716 sc->sc_freetds = std;
1717 }
1718
1719 uhci_soft_qh_t *
1720 uhci_alloc_sqh(uhci_softc_t *sc)
1721 {
1722 uhci_soft_qh_t *sqh;
1723 usbd_status err;
1724 int i, offs;
1725 usb_dma_t dma;
1726
1727 if (sc->sc_freeqhs == NULL) {
1728 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1729 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1730 UHCI_QH_ALIGN, &dma);
1731 if (err)
1732 return (0);
1733 for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1734 offs = i * UHCI_SQH_SIZE;
1735 sqh = KERNADDR(&dma, offs);
1736 sqh->physaddr = DMAADDR(&dma, offs);
1737 sqh->hlink = sc->sc_freeqhs;
1738 sc->sc_freeqhs = sqh;
1739 }
1740 }
1741 sqh = sc->sc_freeqhs;
1742 sc->sc_freeqhs = sqh->hlink;
1743 memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1744 return (sqh);
1745 }
1746
1747 void
1748 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1749 {
1750 sqh->hlink = sc->sc_freeqhs;
1751 sc->sc_freeqhs = sqh;
1752 }
1753
1754 void
1755 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1756 uhci_soft_td_t *stdend)
1757 {
1758 uhci_soft_td_t *p;
1759
1760 for (; std != stdend; std = p) {
1761 p = std->link.std;
1762 uhci_free_std(sc, std);
1763 }
1764 }
1765
1766 usbd_status
1767 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1768 int rd, u_int16_t flags, usb_dma_t *dma,
1769 uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1770 {
1771 uhci_soft_td_t *p, *lastp;
1772 uhci_physaddr_t lastlink;
1773 int i, ntd, l, tog, maxp;
1774 u_int32_t status;
1775 int addr = upipe->pipe.device->address;
1776 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1777
1778 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
1779 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1780 upipe->pipe.device->speed, flags));
1781 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1782 if (maxp == 0) {
1783 printf("uhci_alloc_std_chain: maxp=0\n");
1784 return (USBD_INVAL);
1785 }
1786 ntd = (len + maxp - 1) / maxp;
1787 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1788 ntd++;
1789 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1790 if (ntd == 0) {
1791 *sp = *ep = 0;
1792 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1793 return (USBD_NORMAL_COMPLETION);
1794 }
1795 tog = upipe->nexttoggle;
1796 if (ntd % 2 == 0)
1797 tog ^= 1;
1798 upipe->nexttoggle = tog ^ 1;
1799 lastp = NULL;
1800 lastlink = UHCI_PTR_T;
1801 ntd--;
1802 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1803 if (upipe->pipe.device->speed == USB_SPEED_LOW)
1804 status |= UHCI_TD_LS;
1805 if (flags & USBD_SHORT_XFER_OK)
1806 status |= UHCI_TD_SPD;
1807 for (i = ntd; i >= 0; i--) {
1808 p = uhci_alloc_std(sc);
1809 if (p == NULL) {
1810 KASSERT(lastp != NULL);
1811 uhci_free_std_chain(sc, lastp, NULL);
1812 return (USBD_NOMEM);
1813 }
1814 p->link.std = lastp;
1815 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1816 lastp = p;
1817 lastlink = p->physaddr;
1818 p->td.td_status = htole32(status);
1819 if (i == ntd) {
1820 /* last TD */
1821 l = len % maxp;
1822 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1823 l = maxp;
1824 *ep = p;
1825 } else
1826 l = maxp;
1827 p->td.td_token =
1828 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1829 UHCI_TD_OUT(l, endpt, addr, tog));
1830 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
1831 tog ^= 1;
1832 }
1833 *sp = lastp;
1834 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1835 upipe->nexttoggle));
1836 return (USBD_NORMAL_COMPLETION);
1837 }
1838
1839 void
1840 uhci_device_clear_toggle(usbd_pipe_handle pipe)
1841 {
1842 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1843 upipe->nexttoggle = 0;
1844 }
1845
1846 void
1847 uhci_noop(usbd_pipe_handle pipe)
1848 {
1849 }
1850
1851 usbd_status
1852 uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1853 {
1854 usbd_status err;
1855
1856 /* Insert last in queue. */
1857 err = usb_insert_transfer(xfer);
1858 if (err)
1859 return (err);
1860
1861 /*
1862 * Pipe isn't running (otherwise err would be USBD_INPROG),
1863 * so start it first.
1864 */
1865 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1866 }
1867
1868 usbd_status
1869 uhci_device_bulk_start(usbd_xfer_handle xfer)
1870 {
1871 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1872 usbd_device_handle dev = upipe->pipe.device;
1873 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1874 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1875 uhci_soft_td_t *data, *dataend;
1876 uhci_soft_qh_t *sqh;
1877 usbd_status err;
1878 int len, isread, endpt;
1879 int s;
1880
1881 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
1882 xfer, xfer->length, xfer->flags, ii));
1883
1884 if (sc->sc_dying)
1885 return (USBD_IOERROR);
1886
1887 #ifdef DIAGNOSTIC
1888 if (xfer->rqflags & URQ_REQUEST)
1889 panic("uhci_device_bulk_transfer: a request");
1890 #endif
1891
1892 len = xfer->length;
1893 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1894 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1895 sqh = upipe->u.bulk.sqh;
1896
1897 upipe->u.bulk.isread = isread;
1898 upipe->u.bulk.length = len;
1899
1900 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
1901 &xfer->dmabuf, &data, &dataend);
1902 if (err)
1903 return (err);
1904 dataend->td.td_status |= htole32(UHCI_TD_IOC);
1905
1906 #ifdef UHCI_DEBUG
1907 if (uhcidebug > 8) {
1908 DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1909 uhci_dump_tds(data);
1910 }
1911 #endif
1912
1913 /* Set up interrupt info. */
1914 ii->xfer = xfer;
1915 ii->stdstart = data;
1916 ii->stdend = dataend;
1917 #ifdef DIAGNOSTIC
1918 if (!ii->isdone) {
1919 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
1920 }
1921 ii->isdone = 0;
1922 #endif
1923
1924 sqh->elink = data;
1925 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
1926
1927 s = splusb();
1928 uhci_add_bulk(sc, sqh);
1929 uhci_add_intr_info(sc, ii);
1930
1931 if (xfer->timeout && !sc->sc_bus.use_polling) {
1932 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1933 uhci_timeout, ii);
1934 }
1935 xfer->status = USBD_IN_PROGRESS;
1936 splx(s);
1937
1938 #ifdef UHCI_DEBUG
1939 if (uhcidebug > 10) {
1940 DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1941 uhci_dump_tds(data);
1942 }
1943 #endif
1944
1945 if (sc->sc_bus.use_polling)
1946 uhci_waitintr(sc, xfer);
1947
1948 return (USBD_IN_PROGRESS);
1949 }
1950
1951 /* Abort a device bulk request. */
1952 void
1953 uhci_device_bulk_abort(usbd_xfer_handle xfer)
1954 {
1955 DPRINTF(("uhci_device_bulk_abort:\n"));
1956 uhci_abort_xfer(xfer, USBD_CANCELLED);
1957 }
1958
1959 /*
1960 * Abort a device request.
1961 * If this routine is called at splusb() it guarantees that the request
1962 * will be removed from the hardware scheduling and that the callback
1963 * for it will be called with USBD_CANCELLED status.
1964 * It's impossible to guarantee that the requested transfer will not
1965 * have happened since the hardware runs concurrently.
1966 * If the transaction has already happened we rely on the ordinary
1967 * interrupt processing to process it.
1968 */
1969 void
1970 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1971 {
1972 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1973 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1974 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1975 uhci_soft_td_t *std;
1976 int s;
1977 int wake;
1978
1979 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1980
1981 if (sc->sc_dying) {
1982 /* If we're dying, just do the software part. */
1983 s = splusb();
1984 xfer->status = status; /* make software ignore it */
1985 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
1986 usb_transfer_complete(xfer);
1987 splx(s);
1988 return;
1989 }
1990
1991 if (xfer->device->bus->intr_context || !curproc)
1992 panic("uhci_abort_xfer: not in process context");
1993
1994 /*
1995 * If an abort is already in progress then just wait for it to
1996 * complete and return.
1997 */
1998 if (xfer->hcflags & UXFER_ABORTING) {
1999 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
2000 #ifdef DIAGNOSTIC
2001 if (status == USBD_TIMEOUT)
2002 printf("uhci_abort_xfer: TIMEOUT while aborting\n");
2003 #endif
2004 /* Override the status which might be USBD_TIMEOUT. */
2005 xfer->status = status;
2006 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
2007 xfer->hcflags |= UXFER_ABORTWAIT;
2008 while (xfer->hcflags & UXFER_ABORTING)
2009 tsleep(&xfer->hcflags, PZERO, "uhciaw", 0);
2010 return;
2011 }
2012 xfer->hcflags |= UXFER_ABORTING;
2013
2014 /*
2015 * Step 1: Make interrupt routine and hardware ignore xfer.
2016 */
2017 s = splusb();
2018 xfer->status = status; /* make software ignore it */
2019 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
2020 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
2021 for (std = ii->stdstart; std != NULL; std = std->link.std)
2022 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2023 splx(s);
2024
2025 /*
2026 * Step 2: Wait until we know hardware has finished any possible
2027 * use of the xfer. Also make sure the soft interrupt routine
2028 * has run.
2029 */
2030 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
2031 s = splusb();
2032 #ifdef USB_USE_SOFTINTR
2033 sc->sc_softwake = 1;
2034 #endif /* USB_USE_SOFTINTR */
2035 usb_schedsoftintr(&sc->sc_bus);
2036 #ifdef USB_USE_SOFTINTR
2037 DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
2038 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
2039 #endif /* USB_USE_SOFTINTR */
2040 splx(s);
2041
2042 /*
2043 * Step 3: Execute callback.
2044 */
2045 DPRINTFN(1,("uhci_abort_xfer: callback\n"));
2046 s = splusb();
2047 #ifdef DIAGNOSTIC
2048 ii->isdone = 1;
2049 #endif
2050 wake = xfer->hcflags & UXFER_ABORTWAIT;
2051 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2052 usb_transfer_complete(xfer);
2053 if (wake)
2054 wakeup(&xfer->hcflags);
2055 splx(s);
2056 }
2057
2058 /* Close a device bulk pipe. */
2059 void
2060 uhci_device_bulk_close(usbd_pipe_handle pipe)
2061 {
2062 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2063 usbd_device_handle dev = upipe->pipe.device;
2064 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2065
2066 uhci_free_sqh(sc, upipe->u.bulk.sqh);
2067 }
2068
2069 usbd_status
2070 uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
2071 {
2072 usbd_status err;
2073
2074 /* Insert last in queue. */
2075 err = usb_insert_transfer(xfer);
2076 if (err)
2077 return (err);
2078
2079 /*
2080 * Pipe isn't running (otherwise err would be USBD_INPROG),
2081 * so start it first.
2082 */
2083 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2084 }
2085
2086 usbd_status
2087 uhci_device_ctrl_start(usbd_xfer_handle xfer)
2088 {
2089 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2090 usbd_status err;
2091
2092 if (sc->sc_dying)
2093 return (USBD_IOERROR);
2094
2095 #ifdef DIAGNOSTIC
2096 if (!(xfer->rqflags & URQ_REQUEST))
2097 panic("uhci_device_ctrl_transfer: not a request");
2098 #endif
2099
2100 err = uhci_device_request(xfer);
2101 if (err)
2102 return (err);
2103
2104 if (sc->sc_bus.use_polling)
2105 uhci_waitintr(sc, xfer);
2106 return (USBD_IN_PROGRESS);
2107 }
2108
2109 usbd_status
2110 uhci_device_intr_transfer(usbd_xfer_handle xfer)
2111 {
2112 usbd_status err;
2113
2114 /* Insert last in queue. */
2115 err = usb_insert_transfer(xfer);
2116 if (err)
2117 return (err);
2118
2119 /*
2120 * Pipe isn't running (otherwise err would be USBD_INPROG),
2121 * so start it first.
2122 */
2123 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2124 }
2125
2126 usbd_status
2127 uhci_device_intr_start(usbd_xfer_handle xfer)
2128 {
2129 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2130 usbd_device_handle dev = upipe->pipe.device;
2131 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2132 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2133 uhci_soft_td_t *data, *dataend;
2134 uhci_soft_qh_t *sqh;
2135 usbd_status err;
2136 int isread, endpt;
2137 int i, s;
2138
2139 if (sc->sc_dying)
2140 return (USBD_IOERROR);
2141
2142 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2143 xfer, xfer->length, xfer->flags));
2144
2145 #ifdef DIAGNOSTIC
2146 if (xfer->rqflags & URQ_REQUEST)
2147 panic("uhci_device_intr_transfer: a request");
2148 #endif
2149
2150 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2151 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2152
2153 upipe->u.intr.isread = isread;
2154
2155 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
2156 xfer->flags, &xfer->dmabuf, &data,
2157 &dataend);
2158 if (err)
2159 return (err);
2160 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2161
2162 #ifdef UHCI_DEBUG
2163 if (uhcidebug > 10) {
2164 DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2165 uhci_dump_tds(data);
2166 uhci_dump_qh(upipe->u.intr.qhs[0]);
2167 }
2168 #endif
2169
2170 s = splusb();
2171 /* Set up interrupt info. */
2172 ii->xfer = xfer;
2173 ii->stdstart = data;
2174 ii->stdend = dataend;
2175 #ifdef DIAGNOSTIC
2176 if (!ii->isdone) {
2177 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2178 }
2179 ii->isdone = 0;
2180 #endif
2181
2182 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2183 upipe->u.intr.qhs[0]));
2184 for (i = 0; i < upipe->u.intr.npoll; i++) {
2185 sqh = upipe->u.intr.qhs[i];
2186 sqh->elink = data;
2187 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2188 }
2189 uhci_add_intr_info(sc, ii);
2190 xfer->status = USBD_IN_PROGRESS;
2191 splx(s);
2192
2193 #ifdef UHCI_DEBUG
2194 if (uhcidebug > 10) {
2195 DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2196 uhci_dump_tds(data);
2197 uhci_dump_qh(upipe->u.intr.qhs[0]);
2198 }
2199 #endif
2200
2201 return (USBD_IN_PROGRESS);
2202 }
2203
2204 /* Abort a device control request. */
2205 void
2206 uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2207 {
2208 DPRINTF(("uhci_device_ctrl_abort:\n"));
2209 uhci_abort_xfer(xfer, USBD_CANCELLED);
2210 }
2211
2212 /* Close a device control pipe. */
2213 void
2214 uhci_device_ctrl_close(usbd_pipe_handle pipe)
2215 {
2216 }
2217
2218 /* Abort a device interrupt request. */
2219 void
2220 uhci_device_intr_abort(usbd_xfer_handle xfer)
2221 {
2222 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2223 if (xfer->pipe->intrxfer == xfer) {
2224 DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2225 xfer->pipe->intrxfer = NULL;
2226 }
2227 uhci_abort_xfer(xfer, USBD_CANCELLED);
2228 }
2229
2230 /* Close a device interrupt pipe. */
2231 void
2232 uhci_device_intr_close(usbd_pipe_handle pipe)
2233 {
2234 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2235 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2236 int i, npoll;
2237 int s;
2238
2239 /* Unlink descriptors from controller data structures. */
2240 npoll = upipe->u.intr.npoll;
2241 s = splusb();
2242 for (i = 0; i < npoll; i++)
2243 uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2244 splx(s);
2245
2246 /*
2247 * We now have to wait for any activity on the physical
2248 * descriptors to stop.
2249 */
2250 usb_delay_ms(&sc->sc_bus, 2);
2251
2252 for(i = 0; i < npoll; i++)
2253 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2254 free(upipe->u.intr.qhs, M_USBHC);
2255
2256 /* XXX free other resources */
2257 }
2258
2259 usbd_status
2260 uhci_device_request(usbd_xfer_handle xfer)
2261 {
2262 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2263 usb_device_request_t *req = &xfer->request;
2264 usbd_device_handle dev = upipe->pipe.device;
2265 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2266 int addr = dev->address;
2267 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2268 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2269 uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2270 uhci_soft_qh_t *sqh;
2271 int len;
2272 u_int32_t ls;
2273 usbd_status err;
2274 int isread;
2275 int s;
2276
2277 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2278 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2279 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2280 UGETW(req->wIndex), UGETW(req->wLength),
2281 addr, endpt));
2282
2283 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2284 isread = req->bmRequestType & UT_READ;
2285 len = UGETW(req->wLength);
2286
2287 setup = upipe->u.ctl.setup;
2288 stat = upipe->u.ctl.stat;
2289 sqh = upipe->u.ctl.sqh;
2290
2291 /* Set up data transaction */
2292 if (len != 0) {
2293 upipe->nexttoggle = 1;
2294 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2295 &xfer->dmabuf, &data, &dataend);
2296 if (err)
2297 return (err);
2298 next = data;
2299 dataend->link.std = stat;
2300 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2301 } else {
2302 next = stat;
2303 }
2304 upipe->u.ctl.length = len;
2305
2306 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2307
2308 setup->link.std = next;
2309 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2310 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2311 UHCI_TD_ACTIVE);
2312 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2313 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2314
2315 stat->link.std = NULL;
2316 stat->td.td_link = htole32(UHCI_PTR_T);
2317 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2318 UHCI_TD_ACTIVE | UHCI_TD_IOC);
2319 stat->td.td_token =
2320 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2321 UHCI_TD_IN (0, endpt, addr, 1));
2322 stat->td.td_buffer = htole32(0);
2323
2324 #ifdef UHCI_DEBUG
2325 if (uhcidebug > 10) {
2326 DPRINTF(("uhci_device_request: before transfer\n"));
2327 uhci_dump_tds(setup);
2328 }
2329 #endif
2330
2331 /* Set up interrupt info. */
2332 ii->xfer = xfer;
2333 ii->stdstart = setup;
2334 ii->stdend = stat;
2335 #ifdef DIAGNOSTIC
2336 if (!ii->isdone) {
2337 printf("uhci_device_request: not done, ii=%p\n", ii);
2338 }
2339 ii->isdone = 0;
2340 #endif
2341
2342 sqh->elink = setup;
2343 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2344
2345 s = splusb();
2346 if (dev->speed == USB_SPEED_LOW)
2347 uhci_add_ls_ctrl(sc, sqh);
2348 else
2349 uhci_add_hs_ctrl(sc, sqh);
2350 uhci_add_intr_info(sc, ii);
2351 #ifdef UHCI_DEBUG
2352 if (uhcidebug > 12) {
2353 uhci_soft_td_t *std;
2354 uhci_soft_qh_t *xqh;
2355 uhci_soft_qh_t *sxqh;
2356 int maxqh = 0;
2357 uhci_physaddr_t link;
2358 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2359 for (std = sc->sc_vframes[0].htd, link = 0;
2360 (link & UHCI_PTR_QH) == 0;
2361 std = std->link.std) {
2362 link = le32toh(std->td.td_link);
2363 uhci_dump_td(std);
2364 }
2365 sxqh = (uhci_soft_qh_t *)std;
2366 uhci_dump_qh(sxqh);
2367 for (xqh = sxqh;
2368 xqh != NULL;
2369 xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2370 xqh->hlink == xqh ? NULL : xqh->hlink)) {
2371 uhci_dump_qh(xqh);
2372 }
2373 DPRINTF(("Enqueued QH:\n"));
2374 uhci_dump_qh(sqh);
2375 uhci_dump_tds(sqh->elink);
2376 }
2377 #endif
2378 if (xfer->timeout && !sc->sc_bus.use_polling) {
2379 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2380 uhci_timeout, ii);
2381 }
2382 xfer->status = USBD_IN_PROGRESS;
2383 splx(s);
2384
2385 return (USBD_NORMAL_COMPLETION);
2386 }
2387
2388 usbd_status
2389 uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2390 {
2391 usbd_status err;
2392
2393 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2394
2395 /* Put it on our queue, */
2396 err = usb_insert_transfer(xfer);
2397
2398 /* bail out on error, */
2399 if (err && err != USBD_IN_PROGRESS)
2400 return (err);
2401
2402 /* XXX should check inuse here */
2403
2404 /* insert into schedule, */
2405 uhci_device_isoc_enter(xfer);
2406
2407 /* and start if the pipe wasn't running */
2408 if (!err)
2409 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2410
2411 return (err);
2412 }
2413
2414 void
2415 uhci_device_isoc_enter(usbd_xfer_handle xfer)
2416 {
2417 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2418 usbd_device_handle dev = upipe->pipe.device;
2419 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2420 struct iso *iso = &upipe->u.iso;
2421 uhci_soft_td_t *std;
2422 u_int32_t buf, len, status;
2423 int s, i, next, nframes;
2424
2425 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2426 "nframes=%d\n",
2427 iso->inuse, iso->next, xfer, xfer->nframes));
2428
2429 if (sc->sc_dying)
2430 return;
2431
2432 if (xfer->status == USBD_IN_PROGRESS) {
2433 /* This request has already been entered into the frame list */
2434 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2435 /* XXX */
2436 }
2437
2438 #ifdef DIAGNOSTIC
2439 if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2440 printf("uhci_device_isoc_enter: overflow!\n");
2441 #endif
2442
2443 next = iso->next;
2444 if (next == -1) {
2445 /* Not in use yet, schedule it a few frames ahead. */
2446 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2447 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2448 }
2449
2450 xfer->status = USBD_IN_PROGRESS;
2451 UXFER(xfer)->curframe = next;
2452
2453 buf = DMAADDR(&xfer->dmabuf, 0);
2454 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2455 UHCI_TD_ACTIVE |
2456 UHCI_TD_IOS);
2457 nframes = xfer->nframes;
2458 s = splusb();
2459 for (i = 0; i < nframes; i++) {
2460 std = iso->stds[next];
2461 if (++next >= UHCI_VFRAMELIST_COUNT)
2462 next = 0;
2463 len = xfer->frlengths[i];
2464 std->td.td_buffer = htole32(buf);
2465 if (i == nframes - 1)
2466 status |= UHCI_TD_IOC;
2467 std->td.td_status = htole32(status);
2468 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2469 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2470 #ifdef UHCI_DEBUG
2471 if (uhcidebug > 5) {
2472 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2473 uhci_dump_td(std);
2474 }
2475 #endif
2476 buf += len;
2477 }
2478 iso->next = next;
2479 iso->inuse += xfer->nframes;
2480
2481 splx(s);
2482 }
2483
2484 usbd_status
2485 uhci_device_isoc_start(usbd_xfer_handle xfer)
2486 {
2487 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2488 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2489 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2490 uhci_soft_td_t *end;
2491 int s, i;
2492
2493 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2494
2495 if (sc->sc_dying)
2496 return (USBD_IOERROR);
2497
2498 #ifdef DIAGNOSTIC
2499 if (xfer->status != USBD_IN_PROGRESS)
2500 printf("uhci_device_isoc_start: not in progress %p\n", xfer);
2501 #endif
2502
2503 /* Find the last TD */
2504 i = UXFER(xfer)->curframe + xfer->nframes;
2505 if (i >= UHCI_VFRAMELIST_COUNT)
2506 i -= UHCI_VFRAMELIST_COUNT;
2507 end = upipe->u.iso.stds[i];
2508
2509 #ifdef DIAGNOSTIC
2510 if (end == NULL) {
2511 printf("uhci_device_isoc_start: end == NULL\n");
2512 return (USBD_INVAL);
2513 }
2514 #endif
2515
2516 s = splusb();
2517
2518 /* Set up interrupt info. */
2519 ii->xfer = xfer;
2520 ii->stdstart = end;
2521 ii->stdend = end;
2522 #ifdef DIAGNOSTIC
2523 if (!ii->isdone)
2524 printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2525 ii->isdone = 0;
2526 #endif
2527 uhci_add_intr_info(sc, ii);
2528
2529 splx(s);
2530
2531 return (USBD_IN_PROGRESS);
2532 }
2533
2534 void
2535 uhci_device_isoc_abort(usbd_xfer_handle xfer)
2536 {
2537 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2538 uhci_soft_td_t **stds = upipe->u.iso.stds;
2539 uhci_soft_td_t *std;
2540 int i, n, s, nframes, maxlen, len;
2541
2542 s = splusb();
2543
2544 /* Transfer is already done. */
2545 if (xfer->status != USBD_NOT_STARTED &&
2546 xfer->status != USBD_IN_PROGRESS) {
2547 splx(s);
2548 return;
2549 }
2550
2551 /* Give xfer the requested abort code. */
2552 xfer->status = USBD_CANCELLED;
2553
2554 /* make hardware ignore it, */
2555 nframes = xfer->nframes;
2556 n = UXFER(xfer)->curframe;
2557 maxlen = 0;
2558 for (i = 0; i < nframes; i++) {
2559 std = stds[n];
2560 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2561 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2562 if (len > maxlen)
2563 maxlen = len;
2564 if (++n >= UHCI_VFRAMELIST_COUNT)
2565 n = 0;
2566 }
2567
2568 /* and wait until we are sure the hardware has finished. */
2569 delay(maxlen);
2570
2571 #ifdef DIAGNOSTIC
2572 UXFER(xfer)->iinfo.isdone = 1;
2573 #endif
2574 /* Run callback and remove from interrupt list. */
2575 usb_transfer_complete(xfer);
2576
2577 splx(s);
2578 }
2579
2580 void
2581 uhci_device_isoc_close(usbd_pipe_handle pipe)
2582 {
2583 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2584 usbd_device_handle dev = upipe->pipe.device;
2585 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2586 uhci_soft_td_t *std, *vstd;
2587 struct iso *iso;
2588 int i, s;
2589
2590 /*
2591 * Make sure all TDs are marked as inactive.
2592 * Wait for completion.
2593 * Unschedule.
2594 * Deallocate.
2595 */
2596 iso = &upipe->u.iso;
2597
2598 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2599 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2600 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2601
2602 s = splusb();
2603 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2604 std = iso->stds[i];
2605 for (vstd = sc->sc_vframes[i].htd;
2606 vstd != NULL && vstd->link.std != std;
2607 vstd = vstd->link.std)
2608 ;
2609 if (vstd == NULL) {
2610 /*panic*/
2611 printf("uhci_device_isoc_close: %p not found\n", std);
2612 splx(s);
2613 return;
2614 }
2615 vstd->link = std->link;
2616 vstd->td.td_link = std->td.td_link;
2617 uhci_free_std(sc, std);
2618 }
2619 splx(s);
2620
2621 free(iso->stds, M_USBHC);
2622 }
2623
2624 usbd_status
2625 uhci_setup_isoc(usbd_pipe_handle pipe)
2626 {
2627 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2628 usbd_device_handle dev = upipe->pipe.device;
2629 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2630 int addr = upipe->pipe.device->address;
2631 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2632 int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2633 uhci_soft_td_t *std, *vstd;
2634 u_int32_t token;
2635 struct iso *iso;
2636 int i, s;
2637
2638 iso = &upipe->u.iso;
2639 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2640 M_USBHC, M_WAITOK);
2641
2642 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2643 UHCI_TD_OUT(0, endpt, addr, 0);
2644
2645 /* Allocate the TDs and mark as inactive; */
2646 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2647 std = uhci_alloc_std(sc);
2648 if (std == 0)
2649 goto bad;
2650 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2651 std->td.td_token = htole32(token);
2652 iso->stds[i] = std;
2653 }
2654
2655 /* Insert TDs into schedule. */
2656 s = splusb();
2657 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2658 std = iso->stds[i];
2659 vstd = sc->sc_vframes[i].htd;
2660 std->link = vstd->link;
2661 std->td.td_link = vstd->td.td_link;
2662 vstd->link.std = std;
2663 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2664 }
2665 splx(s);
2666
2667 iso->next = -1;
2668 iso->inuse = 0;
2669
2670 return (USBD_NORMAL_COMPLETION);
2671
2672 bad:
2673 while (--i >= 0)
2674 uhci_free_std(sc, iso->stds[i]);
2675 free(iso->stds, M_USBHC);
2676 return (USBD_NOMEM);
2677 }
2678
2679 void
2680 uhci_device_isoc_done(usbd_xfer_handle xfer)
2681 {
2682 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2683
2684 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
2685 xfer->actlen, xfer->busy_free));
2686
2687 if (ii->xfer != xfer)
2688 /* Not on interrupt list, ignore it. */
2689 return;
2690
2691 if (!uhci_active_intr_info(ii))
2692 return;
2693
2694 #ifdef DIAGNOSTIC
2695 if (ii->stdend == NULL) {
2696 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2697 #ifdef UHCI_DEBUG
2698 uhci_dump_ii(ii);
2699 #endif
2700 return;
2701 }
2702 #endif
2703
2704 /* Turn off the interrupt since it is active even if the TD is not. */
2705 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2706
2707 uhci_del_intr_info(ii); /* remove from active list */
2708 }
2709
2710 void
2711 uhci_device_intr_done(usbd_xfer_handle xfer)
2712 {
2713 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2714 uhci_softc_t *sc = ii->sc;
2715 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2716 uhci_soft_qh_t *sqh;
2717 int i, npoll;
2718
2719 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2720
2721 npoll = upipe->u.intr.npoll;
2722 for(i = 0; i < npoll; i++) {
2723 sqh = upipe->u.intr.qhs[i];
2724 sqh->elink = NULL;
2725 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2726 }
2727 uhci_free_std_chain(sc, ii->stdstart, NULL);
2728
2729 /* XXX Wasteful. */
2730 if (xfer->pipe->repeat) {
2731 uhci_soft_td_t *data, *dataend;
2732
2733 DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
2734
2735 /* This alloc cannot fail since we freed the chain above. */
2736 uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
2737 &xfer->dmabuf, &data, &dataend);
2738 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2739
2740 #ifdef UHCI_DEBUG
2741 if (uhcidebug > 10) {
2742 DPRINTF(("uhci_device_intr_done: data(1)\n"));
2743 uhci_dump_tds(data);
2744 uhci_dump_qh(upipe->u.intr.qhs[0]);
2745 }
2746 #endif
2747
2748 ii->stdstart = data;
2749 ii->stdend = dataend;
2750 #ifdef DIAGNOSTIC
2751 if (!ii->isdone) {
2752 printf("uhci_device_intr_done: not done, ii=%p\n", ii);
2753 }
2754 ii->isdone = 0;
2755 #endif
2756 for (i = 0; i < npoll; i++) {
2757 sqh = upipe->u.intr.qhs[i];
2758 sqh->elink = data;
2759 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2760 }
2761 xfer->status = USBD_IN_PROGRESS;
2762 /* The ii is already on the examined list, just leave it. */
2763 } else {
2764 DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2765 if (uhci_active_intr_info(ii))
2766 uhci_del_intr_info(ii);
2767 }
2768 }
2769
2770 /* Deallocate request data structures */
2771 void
2772 uhci_device_ctrl_done(usbd_xfer_handle xfer)
2773 {
2774 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2775 uhci_softc_t *sc = ii->sc;
2776 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2777
2778 #ifdef DIAGNOSTIC
2779 if (!(xfer->rqflags & URQ_REQUEST))
2780 panic("uhci_device_ctrl_done: not a request");
2781 #endif
2782
2783 if (!uhci_active_intr_info(ii))
2784 return;
2785
2786 uhci_del_intr_info(ii); /* remove from active list */
2787
2788 if (upipe->pipe.device->speed == USB_SPEED_LOW)
2789 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
2790 else
2791 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
2792
2793 if (upipe->u.ctl.length != 0)
2794 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2795
2796 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
2797 }
2798
2799 /* Deallocate request data structures */
2800 void
2801 uhci_device_bulk_done(usbd_xfer_handle xfer)
2802 {
2803 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2804 uhci_softc_t *sc = ii->sc;
2805 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2806
2807 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
2808 xfer, ii, sc, upipe));
2809
2810 if (!uhci_active_intr_info(ii))
2811 return;
2812
2813 uhci_del_intr_info(ii); /* remove from active list */
2814
2815 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2816
2817 uhci_free_std_chain(sc, ii->stdstart, NULL);
2818
2819 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
2820 }
2821
2822 /* Add interrupt QH, called with vflock. */
2823 void
2824 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2825 {
2826 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2827 uhci_soft_qh_t *eqh;
2828
2829 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2830
2831 eqh = vf->eqh;
2832 sqh->hlink = eqh->hlink;
2833 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2834 eqh->hlink = sqh;
2835 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
2836 vf->eqh = sqh;
2837 vf->bandwidth++;
2838 }
2839
2840 /* Remove interrupt QH. */
2841 void
2842 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2843 {
2844 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2845 uhci_soft_qh_t *pqh;
2846
2847 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2848
2849 /* See comment in uhci_remove_ctrl() */
2850 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
2851 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2852 delay(UHCI_QH_REMOVE_DELAY);
2853 }
2854
2855 pqh = uhci_find_prev_qh(vf->hqh, sqh);
2856 pqh->hlink = sqh->hlink;
2857 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2858 delay(UHCI_QH_REMOVE_DELAY);
2859 if (vf->eqh == sqh)
2860 vf->eqh = pqh;
2861 vf->bandwidth--;
2862 }
2863
2864 usbd_status
2865 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
2866 {
2867 uhci_soft_qh_t *sqh;
2868 int i, npoll, s;
2869 u_int bestbw, bw, bestoffs, offs;
2870
2871 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
2872 if (ival == 0) {
2873 printf("uhci_device_setintr: 0 interval\n");
2874 return (USBD_INVAL);
2875 }
2876
2877 if (ival > UHCI_VFRAMELIST_COUNT)
2878 ival = UHCI_VFRAMELIST_COUNT;
2879 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2880 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
2881
2882 upipe->u.intr.npoll = npoll;
2883 upipe->u.intr.qhs =
2884 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2885
2886 /*
2887 * Figure out which offset in the schedule that has most
2888 * bandwidth left over.
2889 */
2890 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2891 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2892 for (bw = i = 0; i < npoll; i++)
2893 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2894 if (bw < bestbw) {
2895 bestbw = bw;
2896 bestoffs = offs;
2897 }
2898 }
2899 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2900
2901 for(i = 0; i < npoll; i++) {
2902 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2903 sqh->elink = NULL;
2904 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2905 sqh->pos = MOD(i * ival + bestoffs);
2906 }
2907 #undef MOD
2908
2909 s = splusb();
2910 /* Enter QHs into the controller data structures. */
2911 for(i = 0; i < npoll; i++)
2912 uhci_add_intr(sc, upipe->u.intr.qhs[i]);
2913 splx(s);
2914
2915 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
2916 return (USBD_NORMAL_COMPLETION);
2917 }
2918
2919 /* Open a new pipe. */
2920 usbd_status
2921 uhci_open(usbd_pipe_handle pipe)
2922 {
2923 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2924 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2925 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2926 usbd_status err;
2927 int ival;
2928
2929 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2930 pipe, pipe->device->address,
2931 ed->bEndpointAddress, sc->sc_addr));
2932
2933 upipe->aborting = 0;
2934 upipe->nexttoggle = 0;
2935
2936 if (pipe->device->address == sc->sc_addr) {
2937 switch (ed->bEndpointAddress) {
2938 case USB_CONTROL_ENDPOINT:
2939 pipe->methods = &uhci_root_ctrl_methods;
2940 break;
2941 case UE_DIR_IN | UHCI_INTR_ENDPT:
2942 pipe->methods = &uhci_root_intr_methods;
2943 break;
2944 default:
2945 return (USBD_INVAL);
2946 }
2947 } else {
2948 switch (ed->bmAttributes & UE_XFERTYPE) {
2949 case UE_CONTROL:
2950 pipe->methods = &uhci_device_ctrl_methods;
2951 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2952 if (upipe->u.ctl.sqh == NULL)
2953 goto bad;
2954 upipe->u.ctl.setup = uhci_alloc_std(sc);
2955 if (upipe->u.ctl.setup == NULL) {
2956 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2957 goto bad;
2958 }
2959 upipe->u.ctl.stat = uhci_alloc_std(sc);
2960 if (upipe->u.ctl.stat == NULL) {
2961 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2962 uhci_free_std(sc, upipe->u.ctl.setup);
2963 goto bad;
2964 }
2965 err = usb_allocmem(&sc->sc_bus,
2966 sizeof(usb_device_request_t),
2967 0, &upipe->u.ctl.reqdma);
2968 if (err) {
2969 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2970 uhci_free_std(sc, upipe->u.ctl.setup);
2971 uhci_free_std(sc, upipe->u.ctl.stat);
2972 goto bad;
2973 }
2974 break;
2975 case UE_INTERRUPT:
2976 pipe->methods = &uhci_device_intr_methods;
2977 ival = pipe->interval;
2978 if (ival == USBD_DEFAULT_INTERVAL)
2979 ival = ed->bInterval;
2980 return (uhci_device_setintr(sc, upipe, ival));
2981 case UE_ISOCHRONOUS:
2982 pipe->methods = &uhci_device_isoc_methods;
2983 return (uhci_setup_isoc(pipe));
2984 case UE_BULK:
2985 pipe->methods = &uhci_device_bulk_methods;
2986 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2987 if (upipe->u.bulk.sqh == NULL)
2988 goto bad;
2989 break;
2990 }
2991 }
2992 return (USBD_NORMAL_COMPLETION);
2993
2994 bad:
2995 return (USBD_NOMEM);
2996 }
2997
2998 /*
2999 * Data structures and routines to emulate the root hub.
3000 */
3001 usb_device_descriptor_t uhci_devd = {
3002 USB_DEVICE_DESCRIPTOR_SIZE,
3003 UDESC_DEVICE, /* type */
3004 {0x00, 0x01}, /* USB version */
3005 UDCLASS_HUB, /* class */
3006 UDSUBCLASS_HUB, /* subclass */
3007 UDPROTO_FSHUB, /* protocol */
3008 64, /* max packet */
3009 {0},{0},{0x00,0x01}, /* device id */
3010 1,2,0, /* string indicies */
3011 1 /* # of configurations */
3012 };
3013
3014 usb_config_descriptor_t uhci_confd = {
3015 USB_CONFIG_DESCRIPTOR_SIZE,
3016 UDESC_CONFIG,
3017 {USB_CONFIG_DESCRIPTOR_SIZE +
3018 USB_INTERFACE_DESCRIPTOR_SIZE +
3019 USB_ENDPOINT_DESCRIPTOR_SIZE},
3020 1,
3021 1,
3022 0,
3023 UC_ATTR_MBO | UC_SELF_POWERED,
3024 0 /* max power */
3025 };
3026
3027 usb_interface_descriptor_t uhci_ifcd = {
3028 USB_INTERFACE_DESCRIPTOR_SIZE,
3029 UDESC_INTERFACE,
3030 0,
3031 0,
3032 1,
3033 UICLASS_HUB,
3034 UISUBCLASS_HUB,
3035 UIPROTO_FSHUB,
3036 0
3037 };
3038
3039 usb_endpoint_descriptor_t uhci_endpd = {
3040 USB_ENDPOINT_DESCRIPTOR_SIZE,
3041 UDESC_ENDPOINT,
3042 UE_DIR_IN | UHCI_INTR_ENDPT,
3043 UE_INTERRUPT,
3044 {8},
3045 255
3046 };
3047
3048 usb_hub_descriptor_t uhci_hubd_piix = {
3049 USB_HUB_DESCRIPTOR_SIZE,
3050 UDESC_HUB,
3051 2,
3052 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
3053 50, /* power on to power good */
3054 0,
3055 { 0x00 }, /* both ports are removable */
3056 { 0 },
3057 };
3058
3059 int
3060 uhci_str(usb_string_descriptor_t *p, int l, const char *s)
3061 {
3062 int i;
3063
3064 if (l == 0)
3065 return (0);
3066 p->bLength = 2 * strlen(s) + 2;
3067 if (l == 1)
3068 return (1);
3069 p->bDescriptorType = UDESC_STRING;
3070 l -= 2;
3071 for (i = 0; s[i] && l > 1; i++, l -= 2)
3072 USETW2(p->bString[i], 0, s[i]);
3073 return (2*i+2);
3074 }
3075
3076 /*
3077 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
3078 * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
3079 * should not be used by the USB subsystem. As we cannot issue a
3080 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
3081 * will be enabled as part of the reset.
3082 *
3083 * On the VT83C572, the port cannot be successfully enabled until the
3084 * outstanding "port enable change" and "connection status change"
3085 * events have been reset.
3086 */
3087 Static usbd_status
3088 uhci_portreset(uhci_softc_t *sc, int index)
3089 {
3090 int lim, port, x;
3091
3092 if (index == 1)
3093 port = UHCI_PORTSC1;
3094 else if (index == 2)
3095 port = UHCI_PORTSC2;
3096 else
3097 return (USBD_IOERROR);
3098
3099 x = URWMASK(UREAD2(sc, port));
3100 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
3101
3102 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
3103
3104 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
3105 index, UREAD2(sc, port)));
3106
3107 x = URWMASK(UREAD2(sc, port));
3108 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3109
3110 delay(100);
3111
3112 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
3113 index, UREAD2(sc, port)));
3114
3115 x = URWMASK(UREAD2(sc, port));
3116 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3117
3118 for (lim = 10; --lim > 0;) {
3119 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3120
3121 x = UREAD2(sc, port);
3122
3123 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3124 index, lim, x));
3125
3126 if (!(x & UHCI_PORTSC_CCS)) {
3127 /*
3128 * No device is connected (or was disconnected
3129 * during reset). Consider the port reset.
3130 * The delay must be long enough to ensure on
3131 * the initial iteration that the device
3132 * connection will have been registered. 50ms
3133 * appears to be sufficient, but 20ms is not.
3134 */
3135 DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3136 index, lim));
3137 break;
3138 }
3139
3140 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3141 /*
3142 * Port enabled changed and/or connection
3143 * status changed were set. Reset either or
3144 * both raised flags (by writing a 1 to that
3145 * bit), and wait again for state to settle.
3146 */
3147 UWRITE2(sc, port, URWMASK(x) |
3148 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3149 continue;
3150 }
3151
3152 if (x & UHCI_PORTSC_PE)
3153 /* Port is enabled */
3154 break;
3155
3156 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3157 }
3158
3159 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3160 index, UREAD2(sc, port)));
3161
3162 if (lim <= 0) {
3163 DPRINTFN(1,("uhci port %d reset timed out\n", index));
3164 return (USBD_TIMEOUT);
3165 }
3166
3167 sc->sc_isreset = 1;
3168 return (USBD_NORMAL_COMPLETION);
3169 }
3170
3171 /*
3172 * Simulate a hardware hub by handling all the necessary requests.
3173 */
3174 usbd_status
3175 uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3176 {
3177 usbd_status err;
3178
3179 /* Insert last in queue. */
3180 err = usb_insert_transfer(xfer);
3181 if (err)
3182 return (err);
3183
3184 /*
3185 * Pipe isn't running (otherwise err would be USBD_INPROG),
3186 * so start it first.
3187 */
3188 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3189 }
3190
3191 usbd_status
3192 uhci_root_ctrl_start(usbd_xfer_handle xfer)
3193 {
3194 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3195 usb_device_request_t *req;
3196 void *buf = NULL;
3197 int port, x;
3198 int s, len, value, index, status, change, l, totlen = 0;
3199 usb_port_status_t ps;
3200 usbd_status err;
3201
3202 if (sc->sc_dying)
3203 return (USBD_IOERROR);
3204
3205 #ifdef DIAGNOSTIC
3206 if (!(xfer->rqflags & URQ_REQUEST))
3207 panic("uhci_root_ctrl_transfer: not a request");
3208 #endif
3209 req = &xfer->request;
3210
3211 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3212 req->bmRequestType, req->bRequest));
3213
3214 len = UGETW(req->wLength);
3215 value = UGETW(req->wValue);
3216 index = UGETW(req->wIndex);
3217
3218 if (len != 0)
3219 buf = KERNADDR(&xfer->dmabuf, 0);
3220
3221 #define C(x,y) ((x) | ((y) << 8))
3222 switch(C(req->bRequest, req->bmRequestType)) {
3223 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3224 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3225 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3226 /*
3227 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3228 * for the integrated root hub.
3229 */
3230 break;
3231 case C(UR_GET_CONFIG, UT_READ_DEVICE):
3232 if (len > 0) {
3233 *(u_int8_t *)buf = sc->sc_conf;
3234 totlen = 1;
3235 }
3236 break;
3237 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3238 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3239 if (len == 0)
3240 break;
3241 switch(value >> 8) {
3242 case UDESC_DEVICE:
3243 if ((value & 0xff) != 0) {
3244 err = USBD_IOERROR;
3245 goto ret;
3246 }
3247 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3248 USETW(uhci_devd.idVendor, sc->sc_id_vendor);
3249 memcpy(buf, &uhci_devd, l);
3250 break;
3251 case UDESC_CONFIG:
3252 if ((value & 0xff) != 0) {
3253 err = USBD_IOERROR;
3254 goto ret;
3255 }
3256 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3257 memcpy(buf, &uhci_confd, l);
3258 buf = (char *)buf + l;
3259 len -= l;
3260 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3261 totlen += l;
3262 memcpy(buf, &uhci_ifcd, l);
3263 buf = (char *)buf + l;
3264 len -= l;
3265 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3266 totlen += l;
3267 memcpy(buf, &uhci_endpd, l);
3268 break;
3269 case UDESC_STRING:
3270 *(u_int8_t *)buf = 0;
3271 totlen = 1;
3272 switch (value & 0xff) {
3273 case 0: /* Language table */
3274 totlen = uhci_str(buf, len, "\001");
3275 break;
3276 case 1: /* Vendor */
3277 totlen = uhci_str(buf, len, sc->sc_vendor);
3278 break;
3279 case 2: /* Product */
3280 totlen = uhci_str(buf, len, "UHCI root hub");
3281 break;
3282 }
3283 break;
3284 default:
3285 err = USBD_IOERROR;
3286 goto ret;
3287 }
3288 break;
3289 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3290 if (len > 0) {
3291 *(u_int8_t *)buf = 0;
3292 totlen = 1;
3293 }
3294 break;
3295 case C(UR_GET_STATUS, UT_READ_DEVICE):
3296 if (len > 1) {
3297 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3298 totlen = 2;
3299 }
3300 break;
3301 case C(UR_GET_STATUS, UT_READ_INTERFACE):
3302 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3303 if (len > 1) {
3304 USETW(((usb_status_t *)buf)->wStatus, 0);
3305 totlen = 2;
3306 }
3307 break;
3308 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3309 if (value >= USB_MAX_DEVICES) {
3310 err = USBD_IOERROR;
3311 goto ret;
3312 }
3313 sc->sc_addr = value;
3314 break;
3315 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3316 if (value != 0 && value != 1) {
3317 err = USBD_IOERROR;
3318 goto ret;
3319 }
3320 sc->sc_conf = value;
3321 break;
3322 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3323 break;
3324 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3325 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3326 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3327 err = USBD_IOERROR;
3328 goto ret;
3329 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3330 break;
3331 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3332 break;
3333 /* Hub requests */
3334 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3335 break;
3336 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3337 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3338 "port=%d feature=%d\n",
3339 index, value));
3340 if (index == 1)
3341 port = UHCI_PORTSC1;
3342 else if (index == 2)
3343 port = UHCI_PORTSC2;
3344 else {
3345 err = USBD_IOERROR;
3346 goto ret;
3347 }
3348 switch(value) {
3349 case UHF_PORT_ENABLE:
3350 x = URWMASK(UREAD2(sc, port));
3351 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3352 break;
3353 case UHF_PORT_SUSPEND:
3354 x = URWMASK(UREAD2(sc, port));
3355 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3356 break;
3357 case UHF_PORT_RESET:
3358 x = URWMASK(UREAD2(sc, port));
3359 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3360 break;
3361 case UHF_C_PORT_CONNECTION:
3362 x = URWMASK(UREAD2(sc, port));
3363 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3364 break;
3365 case UHF_C_PORT_ENABLE:
3366 x = URWMASK(UREAD2(sc, port));
3367 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3368 break;
3369 case UHF_C_PORT_OVER_CURRENT:
3370 x = URWMASK(UREAD2(sc, port));
3371 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3372 break;
3373 case UHF_C_PORT_RESET:
3374 sc->sc_isreset = 0;
3375 err = USBD_NORMAL_COMPLETION;
3376 goto ret;
3377 case UHF_PORT_CONNECTION:
3378 case UHF_PORT_OVER_CURRENT:
3379 case UHF_PORT_POWER:
3380 case UHF_PORT_LOW_SPEED:
3381 case UHF_C_PORT_SUSPEND:
3382 default:
3383 err = USBD_IOERROR;
3384 goto ret;
3385 }
3386 break;
3387 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3388 if (index == 1)
3389 port = UHCI_PORTSC1;
3390 else if (index == 2)
3391 port = UHCI_PORTSC2;
3392 else {
3393 err = USBD_IOERROR;
3394 goto ret;
3395 }
3396 if (len > 0) {
3397 *(u_int8_t *)buf =
3398 (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3399 UHCI_PORTSC_LS_SHIFT;
3400 totlen = 1;
3401 }
3402 break;
3403 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3404 if (len == 0)
3405 break;
3406 if ((value & 0xff) != 0) {
3407 err = USBD_IOERROR;
3408 goto ret;
3409 }
3410 l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3411 totlen = l;
3412 memcpy(buf, &uhci_hubd_piix, l);
3413 break;
3414 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3415 if (len != 4) {
3416 err = USBD_IOERROR;
3417 goto ret;
3418 }
3419 memset(buf, 0, len);
3420 totlen = len;
3421 break;
3422 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3423 if (index == 1)
3424 port = UHCI_PORTSC1;
3425 else if (index == 2)
3426 port = UHCI_PORTSC2;
3427 else {
3428 err = USBD_IOERROR;
3429 goto ret;
3430 }
3431 if (len != 4) {
3432 err = USBD_IOERROR;
3433 goto ret;
3434 }
3435 x = UREAD2(sc, port);
3436 status = change = 0;
3437 if (x & UHCI_PORTSC_CCS)
3438 status |= UPS_CURRENT_CONNECT_STATUS;
3439 if (x & UHCI_PORTSC_CSC)
3440 change |= UPS_C_CONNECT_STATUS;
3441 if (x & UHCI_PORTSC_PE)
3442 status |= UPS_PORT_ENABLED;
3443 if (x & UHCI_PORTSC_POEDC)
3444 change |= UPS_C_PORT_ENABLED;
3445 if (x & UHCI_PORTSC_OCI)
3446 status |= UPS_OVERCURRENT_INDICATOR;
3447 if (x & UHCI_PORTSC_OCIC)
3448 change |= UPS_C_OVERCURRENT_INDICATOR;
3449 if (x & UHCI_PORTSC_SUSP)
3450 status |= UPS_SUSPEND;
3451 if (x & UHCI_PORTSC_LSDA)
3452 status |= UPS_LOW_SPEED;
3453 status |= UPS_PORT_POWER;
3454 if (sc->sc_isreset)
3455 change |= UPS_C_PORT_RESET;
3456 USETW(ps.wPortStatus, status);
3457 USETW(ps.wPortChange, change);
3458 l = min(len, sizeof ps);
3459 memcpy(buf, &ps, l);
3460 totlen = l;
3461 break;
3462 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3463 err = USBD_IOERROR;
3464 goto ret;
3465 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3466 break;
3467 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3468 if (index == 1)
3469 port = UHCI_PORTSC1;
3470 else if (index == 2)
3471 port = UHCI_PORTSC2;
3472 else {
3473 err = USBD_IOERROR;
3474 goto ret;
3475 }
3476 switch(value) {
3477 case UHF_PORT_ENABLE:
3478 x = URWMASK(UREAD2(sc, port));
3479 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3480 break;
3481 case UHF_PORT_SUSPEND:
3482 x = URWMASK(UREAD2(sc, port));
3483 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3484 break;
3485 case UHF_PORT_RESET:
3486 err = uhci_portreset(sc, index);
3487 goto ret;
3488 case UHF_PORT_POWER:
3489 /* Pretend we turned on power */
3490 err = USBD_NORMAL_COMPLETION;
3491 goto ret;
3492 case UHF_C_PORT_CONNECTION:
3493 case UHF_C_PORT_ENABLE:
3494 case UHF_C_PORT_OVER_CURRENT:
3495 case UHF_PORT_CONNECTION:
3496 case UHF_PORT_OVER_CURRENT:
3497 case UHF_PORT_LOW_SPEED:
3498 case UHF_C_PORT_SUSPEND:
3499 case UHF_C_PORT_RESET:
3500 default:
3501 err = USBD_IOERROR;
3502 goto ret;
3503 }
3504 break;
3505 default:
3506 err = USBD_IOERROR;
3507 goto ret;
3508 }
3509 xfer->actlen = totlen;
3510 err = USBD_NORMAL_COMPLETION;
3511 ret:
3512 xfer->status = err;
3513 s = splusb();
3514 usb_transfer_complete(xfer);
3515 splx(s);
3516 return (USBD_IN_PROGRESS);
3517 }
3518
3519 /* Abort a root control request. */
3520 void
3521 uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3522 {
3523 /* Nothing to do, all transfers are synchronous. */
3524 }
3525
3526 /* Close the root pipe. */
3527 void
3528 uhci_root_ctrl_close(usbd_pipe_handle pipe)
3529 {
3530 DPRINTF(("uhci_root_ctrl_close\n"));
3531 }
3532
3533 /* Abort a root interrupt request. */
3534 void
3535 uhci_root_intr_abort(usbd_xfer_handle xfer)
3536 {
3537 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3538
3539 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
3540 sc->sc_intr_xfer = NULL;
3541
3542 if (xfer->pipe->intrxfer == xfer) {
3543 DPRINTF(("uhci_root_intr_abort: remove\n"));
3544 xfer->pipe->intrxfer = 0;
3545 }
3546 xfer->status = USBD_CANCELLED;
3547 #ifdef DIAGNOSTIC
3548 UXFER(xfer)->iinfo.isdone = 1;
3549 #endif
3550 usb_transfer_complete(xfer);
3551 }
3552
3553 usbd_status
3554 uhci_root_intr_transfer(usbd_xfer_handle xfer)
3555 {
3556 usbd_status err;
3557
3558 /* Insert last in queue. */
3559 err = usb_insert_transfer(xfer);
3560 if (err)
3561 return (err);
3562
3563 /*
3564 * Pipe isn't running (otherwise err would be USBD_INPROG),
3565 * start first
3566 */
3567 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3568 }
3569
3570 /* Start a transfer on the root interrupt pipe */
3571 usbd_status
3572 uhci_root_intr_start(usbd_xfer_handle xfer)
3573 {
3574 usbd_pipe_handle pipe = xfer->pipe;
3575 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3576 unsigned int ival;
3577
3578 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
3579 xfer, xfer->length, xfer->flags));
3580
3581 if (sc->sc_dying)
3582 return (USBD_IOERROR);
3583
3584 /* XXX temporary variable needed to avoid gcc3 warning */
3585 ival = xfer->pipe->endpoint->edesc->bInterval;
3586 sc->sc_ival = mstohz(ival);
3587 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3588 sc->sc_intr_xfer = xfer;
3589 return (USBD_IN_PROGRESS);
3590 }
3591
3592 /* Close the root interrupt pipe. */
3593 void
3594 uhci_root_intr_close(usbd_pipe_handle pipe)
3595 {
3596 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3597
3598 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
3599 sc->sc_intr_xfer = NULL;
3600 DPRINTF(("uhci_root_intr_close\n"));
3601 }
3602