uhci.c revision 1.20
1 /* $NetBSD: uhci.c,v 1.20 1998/12/30 18:06:25 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Universal Host Controller driver. 42 * Handles PIIX3 and PIIX4. 43 * 44 * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 45 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 46 * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf 47 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) 55 #include <sys/device.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #endif 60 #include <sys/proc.h> 61 #include <sys/queue.h> 62 #include <sys/select.h> 63 64 #include <machine/bus.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdivar.h> 69 #include <dev/usb/usb_mem.h> 70 #include <dev/usb/usb_quirks.h> 71 72 #include <dev/usb/uhcireg.h> 73 #include <dev/usb/uhcivar.h> 74 75 #if defined(__FreeBSD__) 76 #include <machine/clock.h> 77 #include "dev/usb/queue.addendum.h" 78 79 #define delay(d) DELAY(d) 80 #endif 81 82 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 83 84 struct uhci_pipe { 85 struct usbd_pipe pipe; 86 uhci_intr_info_t *iinfo; 87 int newtoggle; 88 /* Info needed for different pipe kinds. */ 89 union { 90 /* Control pipe */ 91 struct { 92 uhci_soft_qh_t *sqh; 93 usb_dma_t reqdma; 94 usb_dma_t datadma; 95 uhci_soft_td_t *setup, *stat; 96 u_int length; 97 } ctl; 98 /* Interrupt pipe */ 99 struct { 100 usb_dma_t datadma; 101 int npoll; 102 uhci_soft_qh_t **qhs; 103 } intr; 104 /* Bulk pipe */ 105 struct { 106 uhci_soft_qh_t *sqh; 107 usb_dma_t datadma; 108 u_int length; 109 int isread; 110 } bulk; 111 /* Iso pipe */ 112 struct iso { 113 u_int bufsize; 114 u_int nbuf; 115 usb_dma_t *bufs; 116 uhci_soft_td_t **stds; 117 } iso; 118 } u; 119 }; 120 121 /* 122 * The uhci_intr_info free list can be global since they contain 123 * no dma specific data. The other free lists do. 124 */ 125 LIST_HEAD(, uhci_intr_info) uhci_ii_free; 126 127 void uhci_busreset __P((uhci_softc_t *)); 128 usbd_status uhci_run __P((uhci_softc_t *, int run)); 129 uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *)); 130 void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *)); 131 uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *)); 132 void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *)); 133 uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *)); 134 void uhci_free_intr_info __P((uhci_intr_info_t *ii)); 135 #if 0 136 void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *, 137 uhci_intr_info_t *)); 138 void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *)); 139 #endif 140 141 void uhci_free_std_chain __P((uhci_softc_t *, 142 uhci_soft_td_t *, uhci_soft_td_t *)); 143 usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *, 144 int, int, int, usb_dma_t *, 145 uhci_soft_td_t **, 146 uhci_soft_td_t **)); 147 void uhci_timo __P((void *)); 148 void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle)); 149 void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *)); 150 void uhci_ii_done __P((uhci_intr_info_t *, int)); 151 void uhci_timeout __P((void *)); 152 void uhci_wakeup_ctrl __P((void *, int, int, void *, int)); 153 void uhci_lock_frames __P((uhci_softc_t *)); 154 void uhci_unlock_frames __P((uhci_softc_t *)); 155 void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 156 void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 157 void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 158 void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 159 int uhci_str __P((usb_string_descriptor_t *, int, char *)); 160 161 void uhci_wakeup_cb __P((usbd_request_handle reqh)); 162 163 usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle)); 164 usbd_status uhci_device_ctrl_start __P((usbd_request_handle)); 165 void uhci_device_ctrl_abort __P((usbd_request_handle)); 166 void uhci_device_ctrl_close __P((usbd_pipe_handle)); 167 usbd_status uhci_device_intr_transfer __P((usbd_request_handle)); 168 usbd_status uhci_device_intr_start __P((usbd_request_handle)); 169 void uhci_device_intr_abort __P((usbd_request_handle)); 170 void uhci_device_intr_close __P((usbd_pipe_handle)); 171 usbd_status uhci_device_bulk_transfer __P((usbd_request_handle)); 172 usbd_status uhci_device_bulk_start __P((usbd_request_handle)); 173 void uhci_device_bulk_abort __P((usbd_request_handle)); 174 void uhci_device_bulk_close __P((usbd_pipe_handle)); 175 usbd_status uhci_device_isoc_transfer __P((usbd_request_handle)); 176 usbd_status uhci_device_isoc_start __P((usbd_request_handle)); 177 void uhci_device_isoc_abort __P((usbd_request_handle)); 178 void uhci_device_isoc_close __P((usbd_pipe_handle)); 179 usbd_status uhci_device_isoc_setbuf __P((usbd_pipe_handle, u_int, u_int)); 180 181 usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle)); 182 usbd_status uhci_root_ctrl_start __P((usbd_request_handle)); 183 void uhci_root_ctrl_abort __P((usbd_request_handle)); 184 void uhci_root_ctrl_close __P((usbd_pipe_handle)); 185 usbd_status uhci_root_intr_transfer __P((usbd_request_handle)); 186 usbd_status uhci_root_intr_start __P((usbd_request_handle)); 187 void uhci_root_intr_abort __P((usbd_request_handle)); 188 void uhci_root_intr_close __P((usbd_pipe_handle)); 189 190 usbd_status uhci_open __P((usbd_pipe_handle)); 191 void uhci_poll __P((struct usbd_bus *)); 192 193 usbd_status uhci_device_request __P((usbd_request_handle reqh)); 194 void uhci_ctrl_done __P((uhci_intr_info_t *ii)); 195 void uhci_bulk_done __P((uhci_intr_info_t *ii)); 196 197 void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 198 void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 199 usbd_status uhci_device_setintr __P((uhci_softc_t *sc, 200 struct uhci_pipe *pipe, int ival)); 201 void uhci_intr_done __P((uhci_intr_info_t *ii)); 202 void uhci_isoc_done __P((uhci_intr_info_t *ii)); 203 204 #ifdef USB_DEBUG 205 static void uhci_dumpregs __P((uhci_softc_t *)); 206 void uhci_dump_tds __P((uhci_soft_td_t *)); 207 void uhci_dump_qh __P((uhci_soft_qh_t *)); 208 void uhci_dump __P((void)); 209 void uhci_dump_td __P((uhci_soft_td_t *)); 210 #endif 211 212 #if defined(__NetBSD__) 213 #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)) 214 #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 215 #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 216 #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 217 #elif defined(__FreeBSD__) 218 #define UWRITE2(sc,r,x) outw((sc)->sc_iobase + (r), (x)) 219 #define UWRITE4(sc,r,x) outl((sc)->sc_iobase + (r), (x)) 220 #define UREAD2(sc,r) inw((sc)->sc_iobase + (r)) 221 #define UREAD4(sc,r) inl((sc)->sc_iobase + (r)) 222 #endif 223 224 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 225 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 226 227 #define UHCI_RESET_TIMEOUT 100 /* reset timeout */ 228 229 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 230 231 #define UHCI_INTR_ENDPT 1 232 233 struct usbd_methods uhci_root_ctrl_methods = { 234 uhci_root_ctrl_transfer, 235 uhci_root_ctrl_start, 236 uhci_root_ctrl_abort, 237 uhci_root_ctrl_close, 238 0, 239 }; 240 241 struct usbd_methods uhci_root_intr_methods = { 242 uhci_root_intr_transfer, 243 uhci_root_intr_start, 244 uhci_root_intr_abort, 245 uhci_root_intr_close, 246 0, 247 }; 248 249 struct usbd_methods uhci_device_ctrl_methods = { 250 uhci_device_ctrl_transfer, 251 uhci_device_ctrl_start, 252 uhci_device_ctrl_abort, 253 uhci_device_ctrl_close, 254 0, 255 }; 256 257 struct usbd_methods uhci_device_intr_methods = { 258 uhci_device_intr_transfer, 259 uhci_device_intr_start, 260 uhci_device_intr_abort, 261 uhci_device_intr_close, 262 0, 263 }; 264 265 struct usbd_methods uhci_device_bulk_methods = { 266 uhci_device_bulk_transfer, 267 uhci_device_bulk_start, 268 uhci_device_bulk_abort, 269 uhci_device_bulk_close, 270 0, 271 }; 272 273 struct usbd_methods uhci_device_isoc_methods = { 274 uhci_device_isoc_transfer, 275 uhci_device_isoc_start, 276 uhci_device_isoc_abort, 277 uhci_device_isoc_close, 278 uhci_device_isoc_setbuf, 279 }; 280 281 void 282 uhci_busreset(sc) 283 uhci_softc_t *sc; 284 { 285 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 286 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 287 UHCICMD(sc, 0); /* do nothing */ 288 } 289 290 usbd_status 291 uhci_init(sc) 292 uhci_softc_t *sc; 293 { 294 usbd_status r; 295 int i, j; 296 uhci_soft_qh_t *csqh, *bsqh, *sqh; 297 uhci_soft_td_t *std; 298 usb_dma_t dma; 299 static int uhci_global_init_done = 0; 300 301 DPRINTFN(1,("uhci_init: start\n")); 302 303 if (!uhci_global_init_done) { 304 uhci_global_init_done = 1; 305 LIST_INIT(&uhci_ii_free); 306 } 307 308 #if defined(USB_DEBUG) 309 if (uhcidebug > 2) 310 uhci_dumpregs(sc); 311 #endif 312 313 uhci_run(sc, 0); /* stop the controller */ 314 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 315 316 /* Allocate and initialize real frame array. */ 317 r = usb_allocmem(sc->sc_dmatag, 318 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 319 UHCI_FRAMELIST_ALIGN, &dma); 320 if (r != USBD_NORMAL_COMPLETION) 321 return (r); 322 sc->sc_pframes = KERNADDR(&dma); 323 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 324 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&dma)); /* set frame list */ 325 326 uhci_busreset(sc); 327 328 /* Allocate the dummy QH where bulk traffic will be queued. */ 329 bsqh = uhci_alloc_sqh(sc); 330 if (!bsqh) 331 return (USBD_NOMEM); 332 bsqh->qh->qh_hlink = UHCI_PTR_T; /* end of QH chain */ 333 bsqh->qh->qh_elink = UHCI_PTR_T; 334 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 335 336 /* Allocate the dummy QH where control traffic will be queued. */ 337 csqh = uhci_alloc_sqh(sc); 338 if (!csqh) 339 return (USBD_NOMEM); 340 csqh->qh->hlink = bsqh; 341 csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q; 342 csqh->qh->qh_elink = UHCI_PTR_T; 343 sc->sc_ctl_start = sc->sc_ctl_end = csqh; 344 345 /* 346 * Make all (virtual) frame list pointers point to the interrupt 347 * queue heads and the interrupt queue heads at the control 348 * queue head and point the physical frame list to the virtual. 349 */ 350 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 351 std = uhci_alloc_std(sc); 352 sqh = uhci_alloc_sqh(sc); 353 if (!std || !sqh) 354 return (USBD_NOMEM); 355 std->td->link.sqh = sqh; 356 std->td->td_link = sqh->physaddr | UHCI_PTR_Q; 357 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */ 358 std->td->td_token = 0; 359 std->td->td_buffer = 0; 360 sqh->qh->hlink = csqh; 361 sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q; 362 sqh->qh->elink = 0; 363 sqh->qh->qh_elink = UHCI_PTR_T; 364 sc->sc_vframes[i].htd = std; 365 sc->sc_vframes[i].etd = std; 366 sc->sc_vframes[i].hqh = sqh; 367 sc->sc_vframes[i].eqh = sqh; 368 for (j = i; 369 j < UHCI_FRAMELIST_COUNT; 370 j += UHCI_VFRAMELIST_COUNT) 371 sc->sc_pframes[j] = std->physaddr; 372 } 373 374 LIST_INIT(&sc->sc_intrhead); 375 376 /* Set up the bus struct. */ 377 sc->sc_bus.open_pipe = uhci_open; 378 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 379 sc->sc_bus.do_poll = uhci_poll; 380 381 DPRINTFN(1,("uhci_init: enabling\n")); 382 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 383 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 384 385 return (uhci_run(sc, 1)); /* and here we go... */ 386 } 387 388 #ifdef USB_DEBUG 389 static void 390 uhci_dumpregs(sc) 391 uhci_softc_t *sc; 392 { 393 printf("%s; regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 394 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 395 USBDEVNAME(sc->sc_bus.bdev), 396 UREAD2(sc, UHCI_CMD), 397 UREAD2(sc, UHCI_STS), 398 UREAD2(sc, UHCI_INTR), 399 UREAD2(sc, UHCI_FRNUM), 400 UREAD2(sc, UHCI_FLBASEADDR), 401 UREAD2(sc, UHCI_SOF), 402 UREAD2(sc, UHCI_PORTSC1), 403 UREAD2(sc, UHCI_PORTSC2)); 404 } 405 406 int uhci_longtd = 1; 407 408 void 409 uhci_dump_td(p) 410 uhci_soft_td_t *p; 411 { 412 printf("TD(%p) at %08lx = 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", 413 p, (long)p->physaddr, 414 (long)p->td->td_link, 415 (long)p->td->td_status, 416 (long)p->td->td_token, 417 (long)p->td->td_buffer); 418 if (uhci_longtd) 419 printf(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 420 "D=%d,maxlen=%d\n", 421 (long)p->td->td_link, 422 "\20\1T\2Q\3VF", 423 (long)p->td->td_status, 424 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 425 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 426 UHCI_TD_GET_ERRCNT(p->td->td_status), 427 UHCI_TD_GET_ACTLEN(p->td->td_status), 428 UHCI_TD_GET_PID(p->td->td_token), 429 UHCI_TD_GET_DEVADDR(p->td->td_token), 430 UHCI_TD_GET_ENDPT(p->td->td_token), 431 UHCI_TD_GET_DT(p->td->td_token), 432 UHCI_TD_GET_MAXLEN(p->td->td_token)); 433 } 434 435 void 436 uhci_dump_qh(p) 437 uhci_soft_qh_t *p; 438 { 439 printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr, 440 p->qh->qh_hlink, p->qh->qh_elink); 441 } 442 443 444 #if 0 445 void 446 uhci_dump() 447 { 448 uhci_softc_t *sc = uhci; 449 450 uhci_dumpregs(sc); 451 printf("intrs=%d\n", sc->sc_intrs); 452 printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link); 453 uhci_dump_qh(sc->sc_ctl_start->qh->hlink); 454 } 455 #endif 456 457 void 458 uhci_dump_tds(std) 459 uhci_soft_td_t *std; 460 { 461 uhci_soft_td_t *p; 462 463 for(p = std; p; p = p->td->link.std) 464 uhci_dump_td(p); 465 } 466 #endif 467 468 /* 469 * This routine is executed periodically and simulates interrupts 470 * from the root controller interrupt pipe for port status change. 471 */ 472 void 473 uhci_timo(addr) 474 void *addr; 475 { 476 usbd_request_handle reqh = addr; 477 usbd_pipe_handle pipe = reqh->pipe; 478 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 479 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 480 int s; 481 u_char *p; 482 483 DPRINTFN(15, ("uhci_timo\n")); 484 485 p = KERNADDR(&upipe->u.intr.datadma); 486 p[0] = 0; 487 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 488 p[0] |= 1<<1; 489 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 490 p[0] |= 1<<2; 491 s = splusb(); 492 if (p[0] != 0) { 493 reqh->actlen = 1; 494 reqh->status = USBD_NORMAL_COMPLETION; 495 reqh->xfercb(reqh); 496 } 497 if (reqh->pipe->intrreqh == reqh) { 498 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle); 499 } else { 500 usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma); 501 usb_start_next(reqh->pipe); 502 } 503 splx(s); 504 } 505 506 507 void 508 uhci_lock_frames(sc) 509 uhci_softc_t *sc; 510 { 511 int s = splusb(); 512 while (sc->sc_vflock) { 513 sc->sc_vflock |= UHCI_WANT_LOCK; 514 tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0); 515 } 516 sc->sc_vflock = UHCI_HAS_LOCK; 517 splx(s); 518 } 519 520 void 521 uhci_unlock_frames(sc) 522 uhci_softc_t *sc; 523 { 524 int s = splusb(); 525 sc->sc_vflock &= ~UHCI_HAS_LOCK; 526 if (sc->sc_vflock & UHCI_WANT_LOCK) 527 wakeup(&sc->sc_vflock); 528 splx(s); 529 } 530 531 /* 532 * Allocate an interrupt information struct. A free list is kept 533 * for fast allocation. 534 */ 535 uhci_intr_info_t * 536 uhci_alloc_intr_info(sc) 537 uhci_softc_t *sc; 538 { 539 uhci_intr_info_t *ii; 540 541 ii = LIST_FIRST(&uhci_ii_free); 542 if (ii) 543 LIST_REMOVE(ii, list); 544 else { 545 ii = malloc(sizeof(uhci_intr_info_t), M_USBDEV, M_NOWAIT); 546 } 547 ii->sc = sc; 548 return ii; 549 } 550 551 void 552 uhci_free_intr_info(ii) 553 uhci_intr_info_t *ii; 554 { 555 LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */ 556 } 557 558 /* Add control QH, called at splusb(). */ 559 void 560 uhci_add_ctrl(sc, sqh) 561 uhci_softc_t *sc; 562 uhci_soft_qh_t *sqh; 563 { 564 uhci_qh_t *eqh; 565 566 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 567 eqh = sc->sc_ctl_end->qh; 568 sqh->qh->hlink = eqh->hlink; 569 sqh->qh->qh_hlink = eqh->qh_hlink; 570 eqh->hlink = sqh; 571 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 572 sc->sc_ctl_end = sqh; 573 } 574 575 /* Remove control QH, called at splusb(). */ 576 void 577 uhci_remove_ctrl(sc, sqh) 578 uhci_softc_t *sc; 579 uhci_soft_qh_t *sqh; 580 { 581 uhci_soft_qh_t *pqh; 582 583 DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh)); 584 for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink) 585 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 586 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 587 printf("uhci_remove_ctrl: QH not found\n"); 588 return; 589 } 590 #else 591 ; 592 #endif 593 pqh->qh->hlink = sqh->qh->hlink; 594 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 595 if (sc->sc_ctl_end == sqh) 596 sc->sc_ctl_end = pqh; 597 } 598 599 /* Add bulk QH, called at splusb(). */ 600 void 601 uhci_add_bulk(sc, sqh) 602 uhci_softc_t *sc; 603 uhci_soft_qh_t *sqh; 604 { 605 uhci_qh_t *eqh; 606 607 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 608 eqh = sc->sc_bulk_end->qh; 609 sqh->qh->hlink = eqh->hlink; 610 sqh->qh->qh_hlink = eqh->qh_hlink; 611 eqh->hlink = sqh; 612 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 613 sc->sc_bulk_end = sqh; 614 } 615 616 /* Remove bulk QH, called at splusb(). */ 617 void 618 uhci_remove_bulk(sc, sqh) 619 uhci_softc_t *sc; 620 uhci_soft_qh_t *sqh; 621 { 622 uhci_soft_qh_t *pqh; 623 624 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 625 for (pqh = sc->sc_bulk_start; 626 pqh->qh->hlink != sqh; 627 pqh = pqh->qh->hlink) 628 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 629 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 630 printf("uhci_remove_bulk: QH not found\n"); 631 return; 632 } 633 #else 634 ; 635 #endif 636 pqh->qh->hlink = sqh->qh->hlink; 637 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 638 if (sc->sc_bulk_end == sqh) 639 sc->sc_bulk_end = pqh; 640 } 641 642 int 643 uhci_intr(p) 644 void *p; 645 { 646 uhci_softc_t *sc = p; 647 int status, ret; 648 uhci_intr_info_t *ii; 649 650 sc->sc_intrs++; 651 #if defined(USB_DEBUG) 652 if (uhcidebug > 9) { 653 printf("uhci_intr %p\n", sc); 654 uhci_dumpregs(sc); 655 } 656 #endif 657 status = UREAD2(sc, UHCI_STS); 658 ret = 0; 659 if (status & UHCI_STS_USBINT) { 660 UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */ 661 ret = 1; 662 } 663 if (status & UHCI_STS_USBEI) { 664 UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */ 665 ret = 1; 666 } 667 if (status & UHCI_STS_RD) { 668 UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */ 669 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 670 ret = 1; 671 } 672 if (status & UHCI_STS_HSE) { 673 UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */ 674 printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev)); 675 ret = 1; 676 } 677 if (status & UHCI_STS_HCPE) { 678 UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */ 679 printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev)); 680 ret = 1; 681 } 682 if (status & UHCI_STS_HCH) 683 printf("%s: controller halted\n", USBDEVNAME(sc->sc_bus.bdev)); 684 if (!ret) 685 return 0; 686 687 /* 688 * Interrupts on UHCI really suck. When the host controller 689 * interrupts because a transfer is completed there is no 690 * way of knowing which transfer it was. You can scan down 691 * the TDs and QHs of the previous frame to limit the search, 692 * but that assumes that the interrupt was not delayed by more 693 * than 1 ms, which may not always be true (e.g. after debug 694 * output on a slow console). 695 * We scan all interrupt descriptors to see if any have 696 * completed. 697 */ 698 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 699 uhci_check_intr(sc, ii); 700 701 DPRINTFN(10, ("uhci_intr: exit\n")); 702 return 1; 703 } 704 705 /* Check for an interrupt. */ 706 void 707 uhci_check_intr(sc, ii) 708 uhci_softc_t *sc; 709 uhci_intr_info_t *ii; 710 { 711 struct uhci_pipe *upipe; 712 uhci_soft_td_t *std, *lstd; 713 u_int32_t status; 714 715 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 716 #ifdef DIAGNOSTIC 717 if (!ii) { 718 printf("uhci_check_intr: no ii? %p\n", ii); 719 return; 720 } 721 #endif 722 if (!ii->stdstart) 723 return; 724 lstd = ii->stdend; 725 #ifdef DIAGNOSTIC 726 if (!lstd) { 727 printf("uhci_check_intr: std==0\n"); 728 return; 729 } 730 #endif 731 /* If the last TD is still active the whole transfer probably is. */ 732 if (lstd->td->td_status & UHCI_TD_ACTIVE) { 733 DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii)); 734 for (std = ii->stdstart; std != lstd; std = std->td->link.std){ 735 status = std->td->td_status; 736 if ((status & UHCI_TD_STALLED) || 737 (status & (UHCI_TD_SPD | UHCI_TD_ACTIVE)) == 738 UHCI_TD_SPD) 739 goto done; 740 } 741 DPRINTFN(15, ("uhci_check_intr: ii=%p std=%p still active\n", 742 ii, ii->stdstart)); 743 return; 744 } 745 done: 746 upipe = (struct uhci_pipe *)ii->reqh->pipe; 747 upipe->pipe.endpoint->toggle = upipe->newtoggle; 748 uhci_ii_done(ii, 0); 749 usb_untimeout(uhci_timeout, ii, ii->timeout_handle); 750 } 751 752 void 753 uhci_ii_done(ii, timo) 754 uhci_intr_info_t *ii; 755 int timo; 756 { 757 usbd_request_handle reqh = ii->reqh; 758 uhci_soft_td_t *std; 759 u_int32_t tst; 760 int len, status, attr; 761 762 DPRINTFN(10, ("uhci_ii_done: ii=%p ready %d\n", ii, timo)); 763 764 #ifdef DIAGNOSTIC 765 { 766 int s = splhigh(); 767 if (ii->isdone) { 768 printf("uhci_ii_done: is done!\n"); 769 splx(s); 770 return; 771 } 772 ii->isdone = 1; 773 splx(s); 774 } 775 #endif 776 777 /* The transfer is done, compute length and status. */ 778 /* XXX stop at first inactive to get toggle right. */ 779 /* XXX Is this correct for control xfers? */ 780 for (len = status = 0, std = ii->stdstart; 781 std != 0; 782 std = std->td->link.std) { 783 tst = std->td->td_status; 784 status |= tst; 785 #ifdef USB_DEBUG 786 if ((tst & UHCI_TD_ERROR) && uhcidebug) { 787 printf("uhci_ii_done: intr error TD:\n"); 788 uhci_dump_td(std); 789 } 790 #endif 791 if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP) 792 len += UHCI_TD_GET_ACTLEN(tst); 793 } 794 status &= UHCI_TD_ERROR; 795 DPRINTFN(10, ("uhci_check_intr: len=%d, status=0x%x\n", len, status)); 796 if (status != 0) { 797 DPRINTFN(-1+(status==UHCI_TD_STALLED), 798 ("uhci_ii_done: error, addr=%d, endpt=0x%02x, " 799 "status 0x%b\n", 800 reqh->pipe->device->address, 801 reqh->pipe->endpoint->edesc->bEndpointAddress, 802 (long)status, 803 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 804 "STALLED\30ACTIVE")); 805 if (status == UHCI_TD_STALLED) 806 reqh->status = USBD_STALLED; 807 else 808 reqh->status = USBD_IOERROR; /* more info XXX */ 809 reqh->actlen = 0; 810 } else { 811 reqh->status = USBD_NORMAL_COMPLETION; 812 reqh->actlen = len; 813 } 814 if (timo) { 815 /* We got a timeout. Make sure transaction is not active. */ 816 reqh->status = USBD_TIMEOUT; 817 for (std = ii->stdstart; std != 0; std = std->td->link.std) 818 std->td->td_status &= ~UHCI_TD_ACTIVE; 819 /* XXX should we wait 1 ms */ 820 } 821 DPRINTFN(5, ("uhci_ii_done: calling handler ii=%p\n", ii)); 822 823 attr = reqh->pipe->endpoint->edesc->bmAttributes; 824 switch (attr & UE_XFERTYPE) { 825 case UE_CONTROL: 826 uhci_ctrl_done(ii); 827 usb_start_next(reqh->pipe); 828 break; 829 case UE_ISOCHRONOUS: 830 uhci_isoc_done(ii); 831 usb_start_next(reqh->pipe); 832 break; 833 case UE_BULK: 834 uhci_bulk_done(ii); 835 usb_start_next(reqh->pipe); 836 break; 837 case UE_INTERRUPT: 838 uhci_intr_done(ii); 839 break; 840 } 841 842 /* And finally execute callback. */ 843 reqh->xfercb(reqh); 844 } 845 846 /* 847 * Called when a request does not complete. 848 */ 849 void 850 uhci_timeout(addr) 851 void *addr; 852 { 853 uhci_intr_info_t *ii = addr; 854 int s; 855 856 DPRINTF(("uhci_timeout: ii=%p\n", ii)); 857 s = splusb(); 858 uhci_ii_done(ii, 1); 859 splx(s); 860 } 861 862 /* 863 * Wait here until controller claims to have an interrupt. 864 * Then call uhci_intr and return. Use timeout to avoid waiting 865 * too long. 866 * Only used during boot when interrupts are not enabled yet. 867 */ 868 void 869 uhci_waitintr(sc, reqh) 870 uhci_softc_t *sc; 871 usbd_request_handle reqh; 872 { 873 int timo = reqh->timeout; 874 int usecs; 875 uhci_intr_info_t *ii; 876 877 DPRINTFN(10,("uhci_waitintr: timeout = %ds\n", timo)); 878 879 reqh->status = USBD_IN_PROGRESS; 880 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 881 usb_delay_ms(&sc->sc_bus, 1); 882 DPRINTFN(10,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 883 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 884 uhci_intr(sc); 885 if (reqh->status != USBD_IN_PROGRESS) 886 return; 887 } 888 } 889 890 /* Timeout */ 891 DPRINTF(("uhci_waitintr: timeout\n")); 892 for (ii = LIST_FIRST(&sc->sc_intrhead); 893 ii && ii->reqh != reqh; 894 ii = LIST_NEXT(ii, list)) 895 ; 896 if (ii) 897 uhci_ii_done(ii, 1); 898 else 899 panic("uhci_waitintr: lost intr_info\n"); 900 } 901 902 void 903 uhci_poll(bus) 904 struct usbd_bus *bus; 905 { 906 uhci_softc_t *sc = (uhci_softc_t *)bus; 907 908 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 909 uhci_intr(sc); 910 } 911 912 #if 0 913 void 914 uhci_reset(p) 915 void *p; 916 { 917 uhci_softc_t *sc = p; 918 int n; 919 920 UHCICMD(sc, UHCI_CMD_HCRESET); 921 /* The reset bit goes low when the controller is done. */ 922 for (n = 0; n < UHCI_RESET_TIMEOUT && 923 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 924 delay(100); 925 if (n >= UHCI_RESET_TIMEOUT) 926 printf("%s: controller did not reset\n", 927 USBDEVNAME(sc->sc_bus.bdev)); 928 } 929 #endif 930 931 usbd_status 932 uhci_run(sc, run) 933 uhci_softc_t *sc; 934 int run; 935 { 936 int s, n, running; 937 938 run = run != 0; 939 s = splusb(); 940 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 941 if (run == running) { 942 splx(s); 943 return (USBD_NORMAL_COMPLETION); 944 } 945 UWRITE2(sc, UHCI_CMD, run ? UHCI_CMD_RS : 0); 946 for(n = 0; n < 10; n++) { 947 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 948 /* return when we've entered the state we want */ 949 if (run == running) { 950 splx(s); 951 return (USBD_NORMAL_COMPLETION); 952 } 953 usb_delay_ms(&sc->sc_bus, 1); 954 } 955 splx(s); 956 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev), 957 run ? "start" : "stop"); 958 return (USBD_IOERROR); 959 } 960 961 /* 962 * Memory management routines. 963 * uhci_alloc_std allocates TDs 964 * uhci_alloc_sqh allocates QHs 965 * These two routines do their own free list management, 966 * partly for speed, partly because allocating DMAable memory 967 * has page size granularaity so much memory would be wasted if 968 * only one TD/QH (32 bytes) was placed in each allocated chunk. 969 */ 970 971 uhci_soft_td_t * 972 uhci_alloc_std(sc) 973 uhci_softc_t *sc; 974 { 975 uhci_soft_td_t *std; 976 usbd_status r; 977 int i; 978 usb_dma_t dma; 979 980 if (!sc->sc_freetds) { 981 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 982 std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK, 983 M_USBDEV, M_NOWAIT); 984 if (!std) 985 return (0); 986 r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK, 987 UHCI_TD_ALIGN, &dma); 988 if (r != USBD_NORMAL_COMPLETION) { 989 free(std, M_USBDEV); 990 return (0); 991 } 992 for(i = 0; i < UHCI_TD_CHUNK; i++, std++) { 993 std->physaddr = DMAADDR(&dma) + i * UHCI_TD_SIZE; 994 std->td = (uhci_td_t *) 995 ((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE); 996 std->td->link.std = sc->sc_freetds; 997 sc->sc_freetds = std; 998 } 999 } 1000 std = sc->sc_freetds; 1001 sc->sc_freetds = std->td->link.std; 1002 memset(std->td, 0, UHCI_TD_SIZE); 1003 return std; 1004 } 1005 1006 void 1007 uhci_free_std(sc, std) 1008 uhci_softc_t *sc; 1009 uhci_soft_td_t *std; 1010 { 1011 #ifdef DIAGNOSTIC 1012 #define TD_IS_FREE 0x12345678 1013 if (std->td->td_token == TD_IS_FREE) { 1014 printf("uhci_free_std: freeing free TD %p\n", std); 1015 return; 1016 } 1017 std->td->td_token = TD_IS_FREE; 1018 #endif 1019 std->td->link.std = sc->sc_freetds; 1020 sc->sc_freetds = std; 1021 } 1022 1023 uhci_soft_qh_t * 1024 uhci_alloc_sqh(sc) 1025 uhci_softc_t *sc; 1026 { 1027 uhci_soft_qh_t *sqh; 1028 usbd_status r; 1029 int i, offs; 1030 usb_dma_t dma; 1031 1032 if (!sc->sc_freeqhs) { 1033 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1034 sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK, 1035 M_USBDEV, M_NOWAIT); 1036 if (!sqh) 1037 return 0; 1038 r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK, 1039 UHCI_QH_ALIGN, &dma); 1040 if (r != USBD_NORMAL_COMPLETION) { 1041 free(sqh, M_USBDEV); 1042 return 0; 1043 } 1044 for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) { 1045 offs = i * UHCI_QH_SIZE; 1046 sqh->physaddr = DMAADDR(&dma) + offs; 1047 sqh->qh = (uhci_qh_t *) 1048 ((char *)KERNADDR(&dma) + offs); 1049 sqh->qh->hlink = sc->sc_freeqhs; 1050 sc->sc_freeqhs = sqh; 1051 } 1052 } 1053 sqh = sc->sc_freeqhs; 1054 sc->sc_freeqhs = sqh->qh->hlink; 1055 memset(sqh->qh, 0, UHCI_QH_SIZE); 1056 return (sqh); 1057 } 1058 1059 void 1060 uhci_free_sqh(sc, sqh) 1061 uhci_softc_t *sc; 1062 uhci_soft_qh_t *sqh; 1063 { 1064 sqh->qh->hlink = sc->sc_freeqhs; 1065 sc->sc_freeqhs = sqh; 1066 } 1067 1068 #if 0 1069 /* 1070 * Enter a list of transfers onto a control queue. 1071 * Called at splusb() 1072 */ 1073 void 1074 uhci_enter_ctl_q(sc, sqh, ii) 1075 uhci_softc_t *sc; 1076 uhci_soft_qh_t *sqh; 1077 uhci_intr_info_t *ii; 1078 { 1079 DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh)); 1080 1081 } 1082 #endif 1083 1084 void 1085 uhci_free_std_chain(sc, std, stdend) 1086 uhci_softc_t *sc; 1087 uhci_soft_td_t *std; 1088 uhci_soft_td_t *stdend; 1089 { 1090 uhci_soft_td_t *p; 1091 1092 for (; std != stdend; std = p) { 1093 p = std->td->link.std; 1094 uhci_free_std(sc, std); 1095 } 1096 } 1097 1098 usbd_status 1099 uhci_alloc_std_chain(upipe, sc, len, rd, spd, dma, sp, ep) 1100 struct uhci_pipe *upipe; 1101 uhci_softc_t *sc; 1102 int len, rd, spd; 1103 usb_dma_t *dma; 1104 uhci_soft_td_t **sp, **ep; 1105 { 1106 uhci_soft_td_t *p, *lastp; 1107 uhci_physaddr_t lastlink; 1108 int i, ntd, l, tog, maxp; 1109 u_int32_t status; 1110 int addr = upipe->pipe.device->address; 1111 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1112 1113 DPRINTFN(15, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d " 1114 "spd=%d\n", addr, endpt, len, 1115 upipe->pipe.device->lowspeed, spd)); 1116 if (len == 0) { 1117 *sp = *ep = 0; 1118 DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n")); 1119 return (USBD_NORMAL_COMPLETION); 1120 } 1121 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1122 if (maxp == 0) { 1123 printf("uhci_alloc_std_chain: maxp=0\n"); 1124 return (USBD_INVAL); 1125 } 1126 ntd = (len + maxp - 1) / maxp; 1127 tog = upipe->pipe.endpoint->toggle; 1128 if (ntd % 2 == 0) 1129 tog ^= 1; 1130 upipe->newtoggle = tog ^ 1; 1131 lastp = 0; 1132 lastlink = UHCI_PTR_T; 1133 ntd--; 1134 status = UHCI_TD_SET_ERRCNT(2) | UHCI_TD_ACTIVE; 1135 if (upipe->pipe.device->lowspeed) 1136 status |= UHCI_TD_LS; 1137 if (spd) 1138 status |= UHCI_TD_SPD; 1139 for (i = ntd; i >= 0; i--) { 1140 p = uhci_alloc_std(sc); 1141 if (!p) { 1142 uhci_free_std_chain(sc, lastp, 0); 1143 return (USBD_NOMEM); 1144 } 1145 p->td->link.std = lastp; 1146 p->td->td_link = lastlink; 1147 lastp = p; 1148 lastlink = p->physaddr; 1149 p->td->td_status = status; 1150 if (i == ntd) { 1151 /* last TD */ 1152 l = len % maxp; 1153 if (l == 0) l = maxp; 1154 *ep = p; 1155 } else 1156 l = maxp; 1157 p->td->td_token = 1158 rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1159 UHCI_TD_OUT(l, endpt, addr, tog); 1160 p->td->td_buffer = DMAADDR(dma) + i * maxp; 1161 tog ^= 1; 1162 } 1163 *sp = lastp; 1164 /*upipe->pipe.endpoint->toggle = tog;*/ 1165 DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d newtog=%d\n", 1166 upipe->pipe.endpoint->toggle, upipe->newtoggle)); 1167 return (USBD_NORMAL_COMPLETION); 1168 } 1169 1170 usbd_status 1171 uhci_device_bulk_transfer(reqh) 1172 usbd_request_handle reqh; 1173 { 1174 int s; 1175 usbd_status r; 1176 1177 s = splusb(); 1178 r = usb_insert_transfer(reqh); 1179 splx(s); 1180 if (r != USBD_NORMAL_COMPLETION) 1181 return (r); 1182 else 1183 return (uhci_device_bulk_start(reqh)); 1184 } 1185 1186 usbd_status 1187 uhci_device_bulk_start(reqh) 1188 usbd_request_handle reqh; 1189 { 1190 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1191 usbd_device_handle dev = upipe->pipe.device; 1192 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1193 uhci_intr_info_t *ii = upipe->iinfo; 1194 uhci_soft_td_t *xfer, *xferend; 1195 uhci_soft_qh_t *sqh; 1196 usb_dma_t *dmap; 1197 usbd_status r; 1198 int len, isread; 1199 int s; 1200 1201 DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d " 1202 "flags=%d\n", 1203 reqh, reqh->buffer, reqh->length, reqh->flags)); 1204 1205 if (reqh->isreq) 1206 panic("uhci_device_bulk_transfer: a request\n"); 1207 1208 len = reqh->length; 1209 dmap = &upipe->u.bulk.datadma; 1210 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 1211 sqh = upipe->u.bulk.sqh; 1212 1213 upipe->u.bulk.isread = isread; 1214 upipe->u.bulk.length = len; 1215 1216 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1217 if (r != USBD_NORMAL_COMPLETION) 1218 goto ret1; 1219 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1220 reqh->flags & USBD_SHORT_XFER_OK, 1221 dmap, &xfer, &xferend); 1222 if (r != USBD_NORMAL_COMPLETION) 1223 goto ret2; 1224 xferend->td->td_status |= UHCI_TD_IOC; 1225 1226 if (!isread && len != 0) 1227 memcpy(KERNADDR(dmap), reqh->buffer, len); 1228 1229 #ifdef USB_DEBUG 1230 if (uhcidebug > 10) { 1231 printf("uhci_device_bulk_transfer: xfer(1)\n"); 1232 uhci_dump_tds(xfer); 1233 } 1234 #endif 1235 1236 /* Set up interrupt info. */ 1237 ii->reqh = reqh; 1238 ii->stdstart = xfer; 1239 ii->stdend = xferend; 1240 #ifdef DIAGNOSTIC 1241 ii->isdone = 0; 1242 #endif 1243 1244 sqh->qh->elink = xfer; 1245 sqh->qh->qh_elink = xfer->physaddr; 1246 sqh->intr_info = ii; 1247 1248 s = splusb(); 1249 uhci_add_bulk(sc, sqh); 1250 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1251 1252 if (reqh->timeout && !sc->sc_bus.use_polling) { 1253 usb_timeout(uhci_timeout, ii, 1254 MS_TO_TICKS(reqh->timeout), ii->timeout_handle); 1255 } 1256 splx(s); 1257 1258 #ifdef USB_DEBUG 1259 if (uhcidebug > 10) { 1260 printf("uhci_device_bulk_transfer: xfer(2)\n"); 1261 uhci_dump_tds(xfer); 1262 } 1263 #endif 1264 1265 return (USBD_IN_PROGRESS); 1266 1267 ret2: 1268 if (len != 0) 1269 usb_freemem(sc->sc_dmatag, dmap); 1270 ret1: 1271 return (r); 1272 } 1273 1274 /* Abort a device bulk request. */ 1275 void 1276 uhci_device_bulk_abort(reqh) 1277 usbd_request_handle reqh; 1278 { 1279 /* XXX inactivate */ 1280 usb_delay_ms(reqh->pipe->device->bus, 1);/* make sure it is done */ 1281 /* XXX call done */ 1282 } 1283 1284 /* Close a device bulk pipe. */ 1285 void 1286 uhci_device_bulk_close(pipe) 1287 usbd_pipe_handle pipe; 1288 { 1289 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1290 usbd_device_handle dev = upipe->pipe.device; 1291 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1292 1293 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1294 uhci_free_intr_info(upipe->iinfo); 1295 /* XXX free other resources */ 1296 } 1297 1298 usbd_status 1299 uhci_device_ctrl_transfer(reqh) 1300 usbd_request_handle reqh; 1301 { 1302 int s; 1303 usbd_status r; 1304 1305 s = splusb(); 1306 r = usb_insert_transfer(reqh); 1307 splx(s); 1308 if (r != USBD_NORMAL_COMPLETION) 1309 return (r); 1310 else 1311 return (uhci_device_ctrl_start(reqh)); 1312 } 1313 1314 usbd_status 1315 uhci_device_ctrl_start(reqh) 1316 usbd_request_handle reqh; 1317 { 1318 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 1319 usbd_status r; 1320 1321 if (!reqh->isreq) 1322 panic("uhci_device_ctrl_transfer: not a request\n"); 1323 1324 r = uhci_device_request(reqh); 1325 if (r != USBD_NORMAL_COMPLETION) 1326 return (r); 1327 1328 if (sc->sc_bus.use_polling) 1329 uhci_waitintr(sc, reqh); 1330 return (USBD_IN_PROGRESS); 1331 } 1332 1333 usbd_status 1334 uhci_device_intr_transfer(reqh) 1335 usbd_request_handle reqh; 1336 { 1337 int s; 1338 usbd_status r; 1339 1340 s = splusb(); 1341 r = usb_insert_transfer(reqh); 1342 splx(s); 1343 if (r != USBD_NORMAL_COMPLETION) 1344 return (r); 1345 else 1346 return (uhci_device_intr_start(reqh)); 1347 } 1348 1349 usbd_status 1350 uhci_device_intr_start(reqh) 1351 usbd_request_handle reqh; 1352 { 1353 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1354 usbd_device_handle dev = upipe->pipe.device; 1355 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1356 uhci_intr_info_t *ii = upipe->iinfo; 1357 uhci_soft_td_t *xfer, *xferend; 1358 uhci_soft_qh_t *sqh; 1359 usb_dma_t *dmap; 1360 usbd_status r; 1361 int len, i; 1362 int s; 1363 1364 DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d " 1365 "flags=%d\n", 1366 reqh, reqh->buffer, reqh->length, reqh->flags)); 1367 1368 if (reqh->isreq) 1369 panic("uhci_device_intr_transfer: a request\n"); 1370 1371 len = reqh->length; 1372 dmap = &upipe->u.intr.datadma; 1373 if (len == 0) 1374 return (USBD_INVAL); /* XXX should it be? */ 1375 1376 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1377 if (r != USBD_NORMAL_COMPLETION) 1378 goto ret1; 1379 r = uhci_alloc_std_chain(upipe, sc, len, 1, 1380 reqh->flags & USBD_SHORT_XFER_OK, 1381 dmap, &xfer, &xferend); 1382 if (r != USBD_NORMAL_COMPLETION) 1383 goto ret2; 1384 xferend->td->td_status |= UHCI_TD_IOC; 1385 1386 #ifdef USB_DEBUG 1387 if (uhcidebug > 10) { 1388 printf("uhci_device_intr_transfer: xfer(1)\n"); 1389 uhci_dump_tds(xfer); 1390 uhci_dump_qh(upipe->u.intr.qhs[0]); 1391 } 1392 #endif 1393 1394 s = splusb(); 1395 /* Set up interrupt info. */ 1396 ii->reqh = reqh; 1397 ii->stdstart = xfer; 1398 ii->stdend = xferend; 1399 #ifdef DIAGNOSTIC 1400 ii->isdone = 0; 1401 #endif 1402 1403 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 1404 upipe->u.intr.qhs[0])); 1405 for (i = 0; i < upipe->u.intr.npoll; i++) { 1406 sqh = upipe->u.intr.qhs[i]; 1407 sqh->qh->elink = xfer; 1408 sqh->qh->qh_elink = xfer->physaddr; 1409 } 1410 splx(s); 1411 1412 #ifdef USB_DEBUG 1413 if (uhcidebug > 10) { 1414 printf("uhci_device_intr_transfer: xfer(2)\n"); 1415 uhci_dump_tds(xfer); 1416 uhci_dump_qh(upipe->u.intr.qhs[0]); 1417 } 1418 #endif 1419 1420 return (USBD_IN_PROGRESS); 1421 1422 ret2: 1423 if (len != 0) 1424 usb_freemem(sc->sc_dmatag, dmap); 1425 ret1: 1426 return (r); 1427 } 1428 1429 /* Abort a device control request. */ 1430 void 1431 uhci_device_ctrl_abort(reqh) 1432 usbd_request_handle reqh; 1433 { 1434 /* XXX inactivate */ 1435 usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 1436 /* XXX call done */ 1437 } 1438 1439 /* Close a device control pipe. */ 1440 void 1441 uhci_device_ctrl_close(pipe) 1442 usbd_pipe_handle pipe; 1443 { 1444 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1445 1446 uhci_free_intr_info(upipe->iinfo); 1447 /* XXX free other resources */ 1448 } 1449 1450 /* Abort a device interrupt request. */ 1451 void 1452 uhci_device_intr_abort(reqh) 1453 usbd_request_handle reqh; 1454 { 1455 struct uhci_pipe *upipe; 1456 1457 DPRINTFN(1, ("uhci_device_intr_abort: reqh=%p\n", reqh)); 1458 /* XXX inactivate */ 1459 usb_delay_ms(reqh->pipe->device->bus, 2); /* make sure it is done */ 1460 if (reqh->pipe->intrreqh == reqh) { 1461 DPRINTF(("uhci_device_intr_abort: remove\n")); 1462 reqh->pipe->intrreqh = 0; 1463 upipe = (struct uhci_pipe *)reqh->pipe; 1464 uhci_intr_done(upipe->u.intr.qhs[0]->intr_info); 1465 } 1466 } 1467 1468 /* Close a device interrupt pipe. */ 1469 void 1470 uhci_device_intr_close(pipe) 1471 usbd_pipe_handle pipe; 1472 { 1473 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1474 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 1475 int i, s, npoll; 1476 1477 upipe->iinfo->stdstart = 0; /* inactive */ 1478 1479 /* Unlink descriptors from controller data structures. */ 1480 npoll = upipe->u.intr.npoll; 1481 uhci_lock_frames(sc); 1482 for (i = 0; i < npoll; i++) 1483 uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos, 1484 upipe->u.intr.qhs[i]); 1485 uhci_unlock_frames(sc); 1486 1487 /* 1488 * We now have to wait for any activity on the physical 1489 * descriptors to stop. 1490 */ 1491 usb_delay_ms(&sc->sc_bus, 2); 1492 1493 for(i = 0; i < npoll; i++) 1494 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 1495 free(upipe->u.intr.qhs, M_USB); 1496 1497 s = splusb(); 1498 LIST_REMOVE(upipe->iinfo, list); /* remove from active list */ 1499 splx(s); 1500 uhci_free_intr_info(upipe->iinfo); 1501 1502 /* XXX free other resources */ 1503 } 1504 1505 usbd_status 1506 uhci_device_request(reqh) 1507 usbd_request_handle reqh; 1508 { 1509 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1510 usb_device_request_t *req = &reqh->request; 1511 usbd_device_handle dev = upipe->pipe.device; 1512 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1513 int addr = dev->address; 1514 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1515 uhci_intr_info_t *ii = upipe->iinfo; 1516 uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend; 1517 uhci_soft_qh_t *sqh; 1518 usb_dma_t *dmap; 1519 int len; 1520 u_int32_t ls; 1521 usbd_status r; 1522 int isread; 1523 int s; 1524 1525 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 1526 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1527 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1528 UGETW(req->wIndex), UGETW(req->wLength), 1529 addr, endpt)); 1530 1531 ls = dev->lowspeed ? UHCI_TD_LS : 0; 1532 isread = req->bmRequestType & UT_READ; 1533 len = UGETW(req->wLength); 1534 1535 setup = upipe->u.ctl.setup; 1536 stat = upipe->u.ctl.stat; 1537 sqh = upipe->u.ctl.sqh; 1538 dmap = &upipe->u.ctl.datadma; 1539 1540 /* Set up data transaction */ 1541 if (len != 0) { 1542 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1543 if (r != USBD_NORMAL_COMPLETION) 1544 goto ret1; 1545 upipe->pipe.endpoint->toggle = 1; 1546 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1547 reqh->flags & USBD_SHORT_XFER_OK, 1548 dmap, &xfer, &xferend); 1549 if (r != USBD_NORMAL_COMPLETION) 1550 goto ret2; 1551 next = xfer; 1552 xferend->td->link.std = stat; 1553 xferend->td->td_link = stat->physaddr; 1554 } else { 1555 next = stat; 1556 } 1557 upipe->u.ctl.length = len; 1558 1559 memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req); 1560 if (!isread && len != 0) 1561 memcpy(KERNADDR(dmap), reqh->buffer, len); 1562 1563 setup->td->link.std = next; 1564 setup->td->td_link = next->physaddr; 1565 setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE; 1566 setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr); 1567 setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma); 1568 1569 stat->td->link.std = 0; 1570 stat->td->td_link = UHCI_PTR_T; 1571 stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | 1572 UHCI_TD_ACTIVE | UHCI_TD_IOC; 1573 stat->td->td_token = 1574 isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 1575 UHCI_TD_IN (0, endpt, addr, 1); 1576 stat->td->td_buffer = 0; 1577 1578 #ifdef USB_DEBUG 1579 if (uhcidebug > 20) { 1580 printf("uhci_device_request: setup\n"); 1581 uhci_dump_td(setup); 1582 printf("uhci_device_request: stat\n"); 1583 uhci_dump_td(stat); 1584 } 1585 #endif 1586 1587 /* Set up interrupt info. */ 1588 ii->reqh = reqh; 1589 ii->stdstart = setup; 1590 ii->stdend = stat; 1591 #ifdef DIAGNOSTIC 1592 ii->isdone = 0; 1593 #endif 1594 1595 sqh->qh->elink = setup; 1596 sqh->qh->qh_elink = setup->physaddr; 1597 sqh->intr_info = ii; 1598 1599 s = splusb(); 1600 uhci_add_ctrl(sc, sqh); 1601 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1602 #ifdef USB_DEBUG 1603 if (uhcidebug > 12) { 1604 uhci_soft_td_t *std; 1605 uhci_soft_qh_t *xqh; 1606 uhci_soft_qh_t *sxqh; 1607 int maxqh = 0; 1608 uhci_physaddr_t link; 1609 printf("uhci_enter_ctl_q: follow from [0]\n"); 1610 for (std = sc->sc_vframes[0].htd, link = 0; 1611 (link & UHCI_PTR_Q) == 0; 1612 std = std->td->link.std) { 1613 link = std->td->td_link; 1614 uhci_dump_td(std); 1615 } 1616 for (sxqh = xqh = (uhci_soft_qh_t *)std; 1617 xqh; 1618 xqh = (maxqh++ == 5 || xqh->qh->hlink==sxqh || 1619 xqh->qh->hlink==xqh ? NULL : xqh->qh->hlink)) { 1620 uhci_dump_qh(xqh); 1621 uhci_dump_qh(sxqh); 1622 } 1623 printf("Enqueued QH:\n"); 1624 uhci_dump_qh(sqh); 1625 uhci_dump_tds(sqh->qh->elink); 1626 } 1627 #endif 1628 if (reqh->timeout && !sc->sc_bus.use_polling) { 1629 usb_timeout(uhci_timeout, ii, 1630 MS_TO_TICKS(reqh->timeout), ii->timeout_handle); 1631 } 1632 splx(s); 1633 1634 return (USBD_NORMAL_COMPLETION); 1635 1636 ret2: 1637 if (len != 0) 1638 usb_freemem(sc->sc_dmatag, dmap); 1639 ret1: 1640 return (r); 1641 } 1642 1643 usbd_status 1644 uhci_device_isoc_transfer(reqh) 1645 usbd_request_handle reqh; 1646 { 1647 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1648 #ifdef USB_DEBUG 1649 usbd_device_handle dev = upipe->pipe.device; 1650 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1651 #endif 1652 1653 DPRINTFN(1,("uhci_device_isoc_transfer: sc=%p\n", sc)); 1654 if (upipe->u.iso.bufsize == 0) 1655 return (USBD_INVAL); 1656 1657 /* XXX copy data */ 1658 return (USBD_XXX); 1659 } 1660 1661 usbd_status 1662 uhci_device_isoc_start(reqh) 1663 usbd_request_handle reqh; 1664 { 1665 return (USBD_XXX); 1666 } 1667 1668 void 1669 uhci_device_isoc_abort(reqh) 1670 usbd_request_handle reqh; 1671 { 1672 /* XXX Can't abort a single request. */ 1673 } 1674 1675 void 1676 uhci_device_isoc_close(pipe) 1677 usbd_pipe_handle pipe; 1678 { 1679 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1680 usbd_device_handle dev = upipe->pipe.device; 1681 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1682 struct iso *iso; 1683 int i; 1684 1685 /* 1686 * Make sure all TDs are marked as inactive. 1687 * Wait for completion. 1688 * Unschedule. 1689 * Deallocate. 1690 */ 1691 iso = &upipe->u.iso; 1692 1693 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 1694 iso->stds[i]->td->td_status &= ~UHCI_TD_ACTIVE; 1695 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 1696 1697 uhci_lock_frames(sc); 1698 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 1699 uhci_soft_td_t *std, *vstd; 1700 1701 std = iso->stds[i]; 1702 for (vstd = sc->sc_vframes[i % UHCI_VFRAMELIST_COUNT].htd; 1703 vstd && vstd->td->link.std != std; 1704 vstd = vstd->td->link.std) 1705 ; 1706 if (!vstd) { 1707 /*panic*/ 1708 printf("uhci_device_isoc_close: %p not found\n", std); 1709 uhci_unlock_frames(sc); 1710 return; 1711 } 1712 vstd->td->link = std->td->link; 1713 vstd->td->td_link = std->td->td_link; 1714 uhci_free_std(sc, std); 1715 } 1716 uhci_unlock_frames(sc); 1717 1718 for (i = 0; i < iso->nbuf; i++) 1719 usb_freemem(sc->sc_dmatag, &iso->bufs[i]); 1720 free(iso->stds, M_USB); 1721 free(iso->bufs, M_USB); 1722 1723 /* XXX what else? */ 1724 } 1725 1726 usbd_status 1727 uhci_device_isoc_setbuf(pipe, bufsize, nbuf) 1728 usbd_pipe_handle pipe; 1729 u_int bufsize; 1730 u_int nbuf; 1731 { 1732 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1733 usbd_device_handle dev = upipe->pipe.device; 1734 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1735 int addr = upipe->pipe.device->address; 1736 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1737 int rd = upipe->pipe.endpoint->edesc->bEndpointAddress & UE_IN; 1738 struct iso *iso; 1739 int i; 1740 usbd_status r; 1741 1742 /* 1743 * For simplicity the number of buffers must fit nicely in the frame 1744 * list. 1745 */ 1746 if (UHCI_VFRAMELIST_COUNT % nbuf != 0) 1747 return (USBD_INVAL); 1748 1749 iso = &upipe->u.iso; 1750 iso->bufsize = bufsize; 1751 iso->nbuf = nbuf; 1752 1753 /* Allocate memory for buffers. */ 1754 iso->bufs = malloc(nbuf * sizeof(usb_dma_t), M_USB, M_WAITOK); 1755 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 1756 M_USB, M_WAITOK); 1757 1758 for (i = 0; i < nbuf; i++) { 1759 r = usb_allocmem(sc->sc_dmatag, bufsize, 0, &iso->bufs[i]); 1760 if (r != USBD_NORMAL_COMPLETION) { 1761 nbuf = i; 1762 goto bad1; 1763 } 1764 } 1765 1766 /* Allocate the TDs. */ 1767 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 1768 iso->stds[i] = uhci_alloc_std(sc); 1769 if (iso->stds[i] == 0) 1770 goto bad2; 1771 } 1772 1773 /* XXX check schedule */ 1774 1775 /* XXX interrupts */ 1776 1777 /* Insert TDs into schedule, all marked inactive. */ 1778 uhci_lock_frames(sc); 1779 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 1780 uhci_soft_td_t *std, *vstd; 1781 1782 std = iso->stds[i]; 1783 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */ 1784 std->td->td_token = 1785 rd ? UHCI_TD_IN (0, endpt, addr, 0) : 1786 UHCI_TD_OUT(0, endpt, addr, 0); 1787 std->td->td_buffer = DMAADDR(&iso->bufs[i % nbuf]); 1788 1789 vstd = sc->sc_vframes[i % UHCI_VFRAMELIST_COUNT].htd; 1790 std->td->link = vstd->td->link; 1791 std->td->td_link = vstd->td->td_link; 1792 vstd->td->link.std = std; 1793 vstd->td->td_link = std->physaddr; 1794 } 1795 uhci_unlock_frames(sc); 1796 1797 return (USBD_NORMAL_COMPLETION); 1798 1799 bad2: 1800 while (--i >= 0) 1801 uhci_free_std(sc, iso->stds[i]); 1802 bad1: 1803 for (i = 0; i < nbuf; i++) 1804 usb_freemem(sc->sc_dmatag, &iso->bufs[i]); 1805 free(iso->stds, M_USB); 1806 free(iso->bufs, M_USB); 1807 return (USBD_NOMEM); 1808 } 1809 1810 void 1811 uhci_isoc_done(ii) 1812 uhci_intr_info_t *ii; 1813 { 1814 } 1815 1816 void 1817 uhci_intr_done(ii) 1818 uhci_intr_info_t *ii; 1819 { 1820 uhci_softc_t *sc = ii->sc; 1821 usbd_request_handle reqh = ii->reqh; 1822 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1823 usb_dma_t *dma; 1824 uhci_soft_qh_t *sqh; 1825 int i, npoll; 1826 1827 DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen)); 1828 1829 dma = &upipe->u.intr.datadma; 1830 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 1831 npoll = upipe->u.intr.npoll; 1832 for(i = 0; i < npoll; i++) { 1833 sqh = upipe->u.intr.qhs[i]; 1834 sqh->qh->elink = 0; 1835 sqh->qh->qh_elink = UHCI_PTR_T; 1836 } 1837 uhci_free_std_chain(sc, ii->stdstart, 0); 1838 1839 /* XXX Wasteful. */ 1840 if (reqh->pipe->intrreqh == reqh) { 1841 uhci_soft_td_t *xfer, *xferend; 1842 1843 /* This alloc cannot fail since we freed the chain above. */ 1844 uhci_alloc_std_chain(upipe, sc, reqh->length, 1, 1845 reqh->flags & USBD_SHORT_XFER_OK, 1846 dma, &xfer, &xferend); 1847 xferend->td->td_status |= UHCI_TD_IOC; 1848 1849 #ifdef USB_DEBUG 1850 if (uhcidebug > 10) { 1851 printf("uhci_device_intr_done: xfer(1)\n"); 1852 uhci_dump_tds(xfer); 1853 uhci_dump_qh(upipe->u.intr.qhs[0]); 1854 } 1855 #endif 1856 1857 ii->stdstart = xfer; 1858 ii->stdend = xferend; 1859 #ifdef DIAGNOSTIC 1860 ii->isdone = 0; 1861 #endif 1862 for (i = 0; i < npoll; i++) { 1863 sqh = upipe->u.intr.qhs[i]; 1864 sqh->qh->elink = xfer; 1865 sqh->qh->qh_elink = xfer->physaddr; 1866 } 1867 } else { 1868 usb_freemem(sc->sc_dmatag, dma); 1869 ii->stdstart = 0; /* mark as inactive */ 1870 usb_start_next(reqh->pipe); 1871 } 1872 } 1873 1874 /* Deallocate request data structures */ 1875 void 1876 uhci_ctrl_done(ii) 1877 uhci_intr_info_t *ii; 1878 { 1879 uhci_softc_t *sc = ii->sc; 1880 usbd_request_handle reqh = ii->reqh; 1881 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1882 u_int len = upipe->u.ctl.length; 1883 usb_dma_t *dma; 1884 uhci_td_t *htd = ii->stdstart->td; 1885 1886 #ifdef DIAGNOSTIC 1887 if (!reqh->isreq) 1888 panic("uhci_ctrl_done: not a request\n"); 1889 #endif 1890 1891 LIST_REMOVE(ii, list); /* remove from active list */ 1892 1893 uhci_remove_ctrl(sc, upipe->u.ctl.sqh); 1894 1895 if (len != 0) { 1896 dma = &upipe->u.ctl.datadma; 1897 if (reqh->request.bmRequestType & UT_READ) 1898 memcpy(reqh->buffer, KERNADDR(dma), len); 1899 uhci_free_std_chain(sc, htd->link.std, ii->stdend); 1900 usb_freemem(sc->sc_dmatag, dma); 1901 } 1902 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen)); 1903 } 1904 1905 /* Deallocate request data structures */ 1906 void 1907 uhci_bulk_done(ii) 1908 uhci_intr_info_t *ii; 1909 { 1910 uhci_softc_t *sc = ii->sc; 1911 usbd_request_handle reqh = ii->reqh; 1912 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1913 u_int len = upipe->u.bulk.length; 1914 usb_dma_t *dma; 1915 uhci_td_t *htd = ii->stdstart->td; 1916 1917 LIST_REMOVE(ii, list); /* remove from active list */ 1918 1919 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 1920 1921 if (len != 0) { 1922 dma = &upipe->u.bulk.datadma; 1923 if (upipe->u.bulk.isread && len != 0) 1924 memcpy(reqh->buffer, KERNADDR(dma), len); 1925 uhci_free_std_chain(sc, htd->link.std, 0); 1926 usb_freemem(sc->sc_dmatag, dma); 1927 } 1928 DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen)); 1929 /* XXX compute new toggle */ 1930 } 1931 1932 /* Add interrupt QH, called with vflock. */ 1933 void 1934 uhci_add_intr(sc, n, sqh) 1935 uhci_softc_t *sc; 1936 int n; 1937 uhci_soft_qh_t *sqh; 1938 { 1939 struct uhci_vframe *vf = &sc->sc_vframes[n]; 1940 uhci_qh_t *eqh; 1941 1942 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh)); 1943 eqh = vf->eqh->qh; 1944 sqh->qh->hlink = eqh->hlink; 1945 sqh->qh->qh_hlink = eqh->qh_hlink; 1946 eqh->hlink = sqh; 1947 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 1948 vf->eqh = sqh; 1949 vf->bandwidth++; 1950 } 1951 1952 /* Remove interrupt QH, called with vflock. */ 1953 void 1954 uhci_remove_intr(sc, n, sqh) 1955 uhci_softc_t *sc; 1956 int n; 1957 uhci_soft_qh_t *sqh; 1958 { 1959 struct uhci_vframe *vf = &sc->sc_vframes[n]; 1960 uhci_soft_qh_t *pqh; 1961 1962 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh)); 1963 1964 for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink) 1965 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 1966 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 1967 printf("uhci_remove_intr: QH not found\n"); 1968 return; 1969 } 1970 #else 1971 ; 1972 #endif 1973 pqh->qh->hlink = sqh->qh->hlink; 1974 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 1975 if (vf->eqh == sqh) 1976 vf->eqh = pqh; 1977 vf->bandwidth--; 1978 } 1979 1980 usbd_status 1981 uhci_device_setintr(sc, upipe, ival) 1982 uhci_softc_t *sc; 1983 struct uhci_pipe *upipe; 1984 int ival; 1985 { 1986 uhci_soft_qh_t *sqh; 1987 int i, npoll, s; 1988 u_int bestbw, bw, bestoffs, offs; 1989 1990 DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe)); 1991 if (ival == 0) { 1992 printf("uhci_setintr: 0 interval\n"); 1993 return (USBD_INVAL); 1994 } 1995 1996 if (ival > UHCI_VFRAMELIST_COUNT) 1997 ival = UHCI_VFRAMELIST_COUNT; 1998 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 1999 DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2000 2001 upipe->u.intr.npoll = npoll; 2002 upipe->u.intr.qhs = 2003 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USB, M_WAITOK); 2004 2005 /* 2006 * Figure out which offset in the schedule that has most 2007 * bandwidth left over. 2008 */ 2009 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2010 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2011 for (bw = i = 0; i < npoll; i++) 2012 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2013 if (bw < bestbw) { 2014 bestbw = bw; 2015 bestoffs = offs; 2016 } 2017 } 2018 DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2019 2020 upipe->iinfo->stdstart = 0; 2021 for(i = 0; i < npoll; i++) { 2022 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2023 sqh->qh->elink = 0; 2024 sqh->qh->qh_elink = UHCI_PTR_T; 2025 sqh->pos = MOD(i * ival + bestoffs); 2026 sqh->intr_info = upipe->iinfo; 2027 } 2028 #undef MOD 2029 2030 s = splusb(); 2031 LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list); 2032 splx(s); 2033 2034 uhci_lock_frames(sc); 2035 /* Enter QHs into the controller data structures. */ 2036 for(i = 0; i < npoll; i++) 2037 uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos, 2038 upipe->u.intr.qhs[i]); 2039 uhci_unlock_frames(sc); 2040 2041 DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe)); 2042 return (USBD_NORMAL_COMPLETION); 2043 } 2044 2045 /* Open a new pipe. */ 2046 usbd_status 2047 uhci_open(pipe) 2048 usbd_pipe_handle pipe; 2049 { 2050 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2051 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2052 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2053 usbd_status r; 2054 2055 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2056 pipe, pipe->device->address, 2057 ed->bEndpointAddress, sc->sc_addr)); 2058 if (pipe->device->address == sc->sc_addr) { 2059 switch (ed->bEndpointAddress) { 2060 case USB_CONTROL_ENDPOINT: 2061 pipe->methods = &uhci_root_ctrl_methods; 2062 break; 2063 case UE_IN | UHCI_INTR_ENDPT: 2064 pipe->methods = &uhci_root_intr_methods; 2065 break; 2066 default: 2067 return (USBD_INVAL); 2068 } 2069 } else { 2070 upipe->iinfo = uhci_alloc_intr_info(sc); 2071 if (upipe->iinfo == 0) 2072 return (USBD_NOMEM); 2073 switch (ed->bmAttributes & UE_XFERTYPE) { 2074 case UE_CONTROL: 2075 pipe->methods = &uhci_device_ctrl_methods; 2076 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2077 if (upipe->u.ctl.sqh == 0) 2078 goto bad; 2079 upipe->u.ctl.setup = uhci_alloc_std(sc); 2080 if (upipe->u.ctl.setup == 0) { 2081 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2082 goto bad; 2083 } 2084 upipe->u.ctl.stat = uhci_alloc_std(sc); 2085 if (upipe->u.ctl.stat == 0) { 2086 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2087 uhci_free_std(sc, upipe->u.ctl.setup); 2088 goto bad; 2089 } 2090 r = usb_allocmem(sc->sc_dmatag, 2091 sizeof(usb_device_request_t), 2092 0, &upipe->u.ctl.reqdma); 2093 if (r != USBD_NORMAL_COMPLETION) { 2094 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2095 uhci_free_std(sc, upipe->u.ctl.setup); 2096 uhci_free_std(sc, upipe->u.ctl.stat); 2097 goto bad; 2098 } 2099 break; 2100 case UE_INTERRUPT: 2101 pipe->methods = &uhci_device_intr_methods; 2102 return (uhci_device_setintr(sc, upipe, ed->bInterval)); 2103 case UE_ISOCHRONOUS: 2104 pipe->methods = &uhci_device_isoc_methods; 2105 upipe->u.iso.nbuf = 0; 2106 return (USBD_NORMAL_COMPLETION); 2107 case UE_BULK: 2108 pipe->methods = &uhci_device_bulk_methods; 2109 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2110 if (upipe->u.bulk.sqh == 0) 2111 goto bad; 2112 break; 2113 } 2114 } 2115 return (USBD_NORMAL_COMPLETION); 2116 2117 bad: 2118 uhci_free_intr_info(upipe->iinfo); 2119 return (USBD_NOMEM); 2120 } 2121 2122 /* 2123 * Data structures and routines to emulate the root hub. 2124 */ 2125 usb_device_descriptor_t uhci_devd = { 2126 USB_DEVICE_DESCRIPTOR_SIZE, 2127 UDESC_DEVICE, /* type */ 2128 {0x00, 0x01}, /* USB version */ 2129 UCLASS_HUB, /* class */ 2130 USUBCLASS_HUB, /* subclass */ 2131 0, /* protocol */ 2132 64, /* max packet */ 2133 {0},{0},{0x00,0x01}, /* device id */ 2134 1,2,0, /* string indicies */ 2135 1 /* # of configurations */ 2136 }; 2137 2138 usb_config_descriptor_t uhci_confd = { 2139 USB_CONFIG_DESCRIPTOR_SIZE, 2140 UDESC_CONFIG, 2141 {USB_CONFIG_DESCRIPTOR_SIZE + 2142 USB_INTERFACE_DESCRIPTOR_SIZE + 2143 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2144 1, 2145 1, 2146 0, 2147 UC_SELF_POWERED, 2148 0 /* max power */ 2149 }; 2150 2151 usb_interface_descriptor_t uhci_ifcd = { 2152 USB_INTERFACE_DESCRIPTOR_SIZE, 2153 UDESC_INTERFACE, 2154 0, 2155 0, 2156 1, 2157 UCLASS_HUB, 2158 USUBCLASS_HUB, 2159 0, 2160 0 2161 }; 2162 2163 usb_endpoint_descriptor_t uhci_endpd = { 2164 USB_ENDPOINT_DESCRIPTOR_SIZE, 2165 UDESC_ENDPOINT, 2166 UE_IN | UHCI_INTR_ENDPT, 2167 UE_INTERRUPT, 2168 {8}, 2169 255 2170 }; 2171 2172 usb_hub_descriptor_t uhci_hubd_piix = { 2173 USB_HUB_DESCRIPTOR_SIZE, 2174 UDESC_HUB, 2175 2, 2176 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 2177 50, /* power on to power good */ 2178 0, 2179 { 0x00 }, /* both ports are removable */ 2180 }; 2181 2182 int 2183 uhci_str(p, l, s) 2184 usb_string_descriptor_t *p; 2185 int l; 2186 char *s; 2187 { 2188 int i; 2189 2190 if (l == 0) 2191 return (0); 2192 p->bLength = 2 * strlen(s) + 2; 2193 if (l == 1) 2194 return (1); 2195 p->bDescriptorType = UDESC_STRING; 2196 l -= 2; 2197 for (i = 0; s[i] && l > 1; i++, l -= 2) 2198 USETW2(p->bString[i], 0, s[i]); 2199 return (2*i+2); 2200 } 2201 2202 /* 2203 * Simulate a hardware hub by handling all the necessary requests. 2204 */ 2205 usbd_status 2206 uhci_root_ctrl_transfer(reqh) 2207 usbd_request_handle reqh; 2208 { 2209 int s; 2210 usbd_status r; 2211 2212 s = splusb(); 2213 r = usb_insert_transfer(reqh); 2214 splx(s); 2215 if (r != USBD_NORMAL_COMPLETION) 2216 return (r); 2217 else 2218 return (uhci_root_ctrl_start(reqh)); 2219 } 2220 2221 usbd_status 2222 uhci_root_ctrl_start(reqh) 2223 usbd_request_handle reqh; 2224 { 2225 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 2226 usb_device_request_t *req; 2227 void *buf; 2228 int port, x; 2229 int len, value, index, status, change, l, totlen = 0; 2230 usb_port_status_t ps; 2231 usbd_status r; 2232 2233 if (!reqh->isreq) 2234 panic("uhci_root_ctrl_transfer: not a request\n"); 2235 req = &reqh->request; 2236 buf = reqh->buffer; 2237 2238 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 2239 req->bmRequestType, req->bRequest)); 2240 2241 len = UGETW(req->wLength); 2242 value = UGETW(req->wValue); 2243 index = UGETW(req->wIndex); 2244 #define C(x,y) ((x) | ((y) << 8)) 2245 switch(C(req->bRequest, req->bmRequestType)) { 2246 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2247 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2248 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2249 /* 2250 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2251 * for the integrated root hub. 2252 */ 2253 break; 2254 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2255 if (len > 0) { 2256 *(u_int8_t *)buf = sc->sc_conf; 2257 totlen = 1; 2258 } 2259 break; 2260 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2261 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 2262 switch(value >> 8) { 2263 case UDESC_DEVICE: 2264 if ((value & 0xff) != 0) { 2265 r = USBD_IOERROR; 2266 goto ret; 2267 } 2268 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2269 memcpy(buf, &uhci_devd, l); 2270 break; 2271 case UDESC_CONFIG: 2272 if ((value & 0xff) != 0) { 2273 r = USBD_IOERROR; 2274 goto ret; 2275 } 2276 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2277 memcpy(buf, &uhci_confd, l); 2278 buf = (char *)buf + l; 2279 len -= l; 2280 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2281 totlen += l; 2282 memcpy(buf, &uhci_ifcd, l); 2283 buf = (char *)buf + l; 2284 len -= l; 2285 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2286 totlen += l; 2287 memcpy(buf, &uhci_endpd, l); 2288 break; 2289 case UDESC_STRING: 2290 if (len == 0) 2291 break; 2292 *(u_int8_t *)buf = 0; 2293 totlen = 1; 2294 switch (value & 0xff) { 2295 case 1: /* Vendor */ 2296 totlen = uhci_str(buf, len, sc->sc_vendor); 2297 break; 2298 case 2: /* Product */ 2299 totlen = uhci_str(buf, len, "UHCI root hub"); 2300 break; 2301 } 2302 break; 2303 default: 2304 r = USBD_IOERROR; 2305 goto ret; 2306 } 2307 break; 2308 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2309 if (len > 0) { 2310 *(u_int8_t *)buf = 0; 2311 totlen = 1; 2312 } 2313 break; 2314 case C(UR_GET_STATUS, UT_READ_DEVICE): 2315 if (len > 1) { 2316 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2317 totlen = 2; 2318 } 2319 break; 2320 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2321 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2322 if (len > 1) { 2323 USETW(((usb_status_t *)buf)->wStatus, 0); 2324 totlen = 2; 2325 } 2326 break; 2327 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2328 if (value >= USB_MAX_DEVICES) { 2329 r = USBD_IOERROR; 2330 goto ret; 2331 } 2332 sc->sc_addr = value; 2333 break; 2334 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2335 if (value != 0 && value != 1) { 2336 r = USBD_IOERROR; 2337 goto ret; 2338 } 2339 sc->sc_conf = value; 2340 break; 2341 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2342 break; 2343 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2344 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2345 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2346 r = USBD_IOERROR; 2347 goto ret; 2348 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2349 break; 2350 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2351 break; 2352 /* Hub requests */ 2353 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2354 break; 2355 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2356 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2357 "port=%d feature=%d\n", 2358 index, value)); 2359 if (index == 1) 2360 port = UHCI_PORTSC1; 2361 else if (index == 2) 2362 port = UHCI_PORTSC2; 2363 else { 2364 r = USBD_IOERROR; 2365 goto ret; 2366 } 2367 switch(value) { 2368 case UHF_PORT_ENABLE: 2369 x = UREAD2(sc, port); 2370 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 2371 break; 2372 case UHF_PORT_SUSPEND: 2373 x = UREAD2(sc, port); 2374 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 2375 break; 2376 case UHF_PORT_RESET: 2377 x = UREAD2(sc, port); 2378 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2379 break; 2380 case UHF_C_PORT_CONNECTION: 2381 x = UREAD2(sc, port); 2382 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 2383 break; 2384 case UHF_C_PORT_ENABLE: 2385 x = UREAD2(sc, port); 2386 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 2387 break; 2388 case UHF_C_PORT_OVER_CURRENT: 2389 x = UREAD2(sc, port); 2390 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 2391 break; 2392 case UHF_C_PORT_RESET: 2393 sc->sc_isreset = 0; 2394 r = USBD_NORMAL_COMPLETION; 2395 goto ret; 2396 case UHF_PORT_CONNECTION: 2397 case UHF_PORT_OVER_CURRENT: 2398 case UHF_PORT_POWER: 2399 case UHF_PORT_LOW_SPEED: 2400 case UHF_C_PORT_SUSPEND: 2401 default: 2402 r = USBD_IOERROR; 2403 goto ret; 2404 } 2405 break; 2406 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 2407 if (index == 1) 2408 port = UHCI_PORTSC1; 2409 else if (index == 2) 2410 port = UHCI_PORTSC2; 2411 else { 2412 r = USBD_IOERROR; 2413 goto ret; 2414 } 2415 if (len > 0) { 2416 *(u_int8_t *)buf = 2417 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 2418 UHCI_PORTSC_LS_SHIFT; 2419 totlen = 1; 2420 } 2421 break; 2422 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2423 if (value != 0) { 2424 r = USBD_IOERROR; 2425 goto ret; 2426 } 2427 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 2428 totlen = l; 2429 memcpy(buf, &uhci_hubd_piix, l); 2430 break; 2431 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2432 if (len != 4) { 2433 r = USBD_IOERROR; 2434 goto ret; 2435 } 2436 memset(buf, 0, len); 2437 totlen = len; 2438 break; 2439 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2440 if (index == 1) 2441 port = UHCI_PORTSC1; 2442 else if (index == 2) 2443 port = UHCI_PORTSC2; 2444 else { 2445 r = USBD_IOERROR; 2446 goto ret; 2447 } 2448 if (len != 4) { 2449 r = USBD_IOERROR; 2450 goto ret; 2451 } 2452 x = UREAD2(sc, port); 2453 status = change = 0; 2454 if (x & UHCI_PORTSC_CCS ) 2455 status |= UPS_CURRENT_CONNECT_STATUS; 2456 if (x & UHCI_PORTSC_CSC ) 2457 change |= UPS_C_CONNECT_STATUS; 2458 if (x & UHCI_PORTSC_PE ) 2459 status |= UPS_PORT_ENABLED; 2460 if (x & UHCI_PORTSC_POEDC) 2461 change |= UPS_C_PORT_ENABLED; 2462 if (x & UHCI_PORTSC_OCI ) 2463 status |= UPS_OVERCURRENT_INDICATOR; 2464 if (x & UHCI_PORTSC_OCIC ) 2465 change |= UPS_C_OVERCURRENT_INDICATOR; 2466 if (x & UHCI_PORTSC_SUSP ) 2467 status |= UPS_SUSPEND; 2468 if (x & UHCI_PORTSC_LSDA ) 2469 status |= UPS_LOW_SPEED; 2470 status |= UPS_PORT_POWER; 2471 if (sc->sc_isreset) 2472 change |= UPS_C_PORT_RESET; 2473 USETW(ps.wPortStatus, status); 2474 USETW(ps.wPortChange, change); 2475 l = min(len, sizeof ps); 2476 memcpy(buf, &ps, l); 2477 totlen = l; 2478 break; 2479 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2480 r = USBD_IOERROR; 2481 goto ret; 2482 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2483 break; 2484 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2485 if (index == 1) 2486 port = UHCI_PORTSC1; 2487 else if (index == 2) 2488 port = UHCI_PORTSC2; 2489 else { 2490 r = USBD_IOERROR; 2491 goto ret; 2492 } 2493 switch(value) { 2494 case UHF_PORT_ENABLE: 2495 x = UREAD2(sc, port); 2496 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2497 break; 2498 case UHF_PORT_SUSPEND: 2499 x = UREAD2(sc, port); 2500 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 2501 break; 2502 case UHF_PORT_RESET: 2503 x = UREAD2(sc, port); 2504 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2505 usb_delay_ms(&sc->sc_bus, 10); 2506 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2507 delay(100); 2508 x = UREAD2(sc, port); 2509 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2510 delay(100); 2511 DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n", 2512 index, UREAD2(sc, port))); 2513 sc->sc_isreset = 1; 2514 break; 2515 case UHF_C_PORT_CONNECTION: 2516 case UHF_C_PORT_ENABLE: 2517 case UHF_C_PORT_OVER_CURRENT: 2518 case UHF_PORT_CONNECTION: 2519 case UHF_PORT_OVER_CURRENT: 2520 case UHF_PORT_POWER: 2521 case UHF_PORT_LOW_SPEED: 2522 case UHF_C_PORT_SUSPEND: 2523 case UHF_C_PORT_RESET: 2524 default: 2525 r = USBD_IOERROR; 2526 goto ret; 2527 } 2528 break; 2529 default: 2530 r = USBD_IOERROR; 2531 goto ret; 2532 } 2533 reqh->actlen = totlen; 2534 r = USBD_NORMAL_COMPLETION; 2535 ret: 2536 reqh->status = r; 2537 reqh->xfercb(reqh); 2538 usb_start_next(reqh->pipe); 2539 return (USBD_IN_PROGRESS); 2540 } 2541 2542 /* Abort a root control request. */ 2543 void 2544 uhci_root_ctrl_abort(reqh) 2545 usbd_request_handle reqh; 2546 { 2547 /* Nothing to do, all transfers are syncronous. */ 2548 } 2549 2550 /* Close the root pipe. */ 2551 void 2552 uhci_root_ctrl_close(pipe) 2553 usbd_pipe_handle pipe; 2554 { 2555 usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle); 2556 DPRINTF(("uhci_root_ctrl_close\n")); 2557 } 2558 2559 /* Abort a root interrupt request. */ 2560 void 2561 uhci_root_intr_abort(reqh) 2562 usbd_request_handle reqh; 2563 { 2564 usb_untimeout(uhci_timo, reqh, reqh->timo_handle); 2565 } 2566 2567 usbd_status 2568 uhci_root_intr_transfer(reqh) 2569 usbd_request_handle reqh; 2570 { 2571 int s; 2572 usbd_status r; 2573 2574 s = splusb(); 2575 r = usb_insert_transfer(reqh); 2576 splx(s); 2577 if (r != USBD_NORMAL_COMPLETION) 2578 return (r); 2579 else 2580 return (uhci_root_intr_start(reqh)); 2581 } 2582 2583 /* Start a transfer on the root interrupt pipe */ 2584 usbd_status 2585 uhci_root_intr_start(reqh) 2586 usbd_request_handle reqh; 2587 { 2588 usbd_pipe_handle pipe = reqh->pipe; 2589 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2590 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2591 usb_dma_t *dmap; 2592 usbd_status r; 2593 int len; 2594 2595 DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d " 2596 "flags=%d\n", 2597 reqh, reqh->buffer, reqh->length, reqh->flags)); 2598 2599 len = reqh->length; 2600 dmap = &upipe->u.intr.datadma; 2601 if (len == 0) 2602 return (USBD_INVAL); /* XXX should it be? */ 2603 2604 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2605 if (r != USBD_NORMAL_COMPLETION) 2606 return (r); 2607 2608 sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval); 2609 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle); 2610 return (USBD_IN_PROGRESS); 2611 } 2612 2613 /* Close the root interrupt pipe. */ 2614 void 2615 uhci_root_intr_close(pipe) 2616 usbd_pipe_handle pipe; 2617 { 2618 usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle); 2619 DPRINTF(("uhci_root_intr_close\n")); 2620 } 2621
Indexes created Tue Sep 30 20:09:53 GMT 2025