uhci.c revision 1.208.12.4
1 /* $NetBSD: uhci.c,v 1.208.12.4 2007/06/05 09:32:51 itohy Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.172 2006/10/19 01:15:58 iedowse Exp $ */ 3 4 /*- 5 * Copyright (c) 1998, 2004, 2007 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Universal Host Controller driver. 43 * Handles e.g. PIIX3 and PIIX4. 44 * 45 * UHCI spec: http://developer.intel.com/technology/usb/uhci11d.htm 46 * USB spec: http://www.usb.org/developers/docs/ 47 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 48 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 49 */ 50 51 #include <sys/cdefs.h> 52 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.208.12.4 2007/06/05 09:32:51 itohy Exp $"); 53 /* __FBSDID("$FreeBSD: src/sys/dev/usb/uhci.c,v 1.172 2006/10/19 01:15:58 iedowse Exp $"); */ 54 55 #include <sys/param.h> 56 #include <sys/systm.h> 57 #include <sys/kernel.h> 58 #include <sys/malloc.h> 59 #include <sys/mbuf.h> 60 #if defined(__NetBSD__) || defined(__OpenBSD__) 61 #include <sys/device.h> 62 #include <sys/select.h> 63 #include <sys/extent.h> 64 #include <uvm/uvm_extern.h> 65 #elif defined(__FreeBSD__) 66 #include <sys/endian.h> 67 #include <sys/module.h> 68 #include <sys/bus.h> 69 #include <sys/sysctl.h> 70 #if defined(DIAGNOSTIC) && defined(__i386__) 71 #include <machine/cpu.h> 72 #endif 73 #endif 74 #include <sys/proc.h> 75 #include <sys/queue.h> 76 77 #include <machine/bus.h> 78 #include <machine/endian.h> 79 80 #include <dev/usb/usb.h> 81 #include <dev/usb/usbdi.h> 82 #include <dev/usb/usbdivar.h> 83 #include <dev/usb/usb_mem.h> 84 #include <dev/usb/usb_quirks.h> 85 86 #include <dev/usb/uhcireg.h> 87 #include <dev/usb/uhcivar.h> 88 89 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 90 /*#define UHCI_CTL_LOOP */ 91 92 #if defined(__FreeBSD__) 93 94 #define delay(d) DELAY(d) 95 #endif 96 97 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 98 99 #if defined(__OpenBSD__) 100 struct cfdriver uhci_cd = { 101 NULL, "uhci", DV_DULL 102 }; 103 #endif 104 105 #ifdef USB_DEBUG 106 uhci_softc_t *thesc; 107 #define DPRINTF(x) if (uhcidebug) printf x 108 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 109 int uhcidebug = 0; 110 int uhcinoloop = 0; 111 #ifdef __FreeBSD__ 112 SYSCTL_NODE(_hw_usb, OID_AUTO, uhci, CTLFLAG_RW, 0, "USB uhci"); 113 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, debug, CTLFLAG_RW, 114 &uhcidebug, 0, "uhci debug level"); 115 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, loop, CTLFLAG_RW, 116 &uhcinoloop, 0, "uhci noloop"); 117 #endif 118 #ifndef __NetBSD__ 119 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 120 #endif 121 #else 122 #define DPRINTF(x) 123 #define DPRINTFN(n,x) 124 #endif 125 126 /* 127 * The UHCI controller is little endian, so on big endian machines 128 * the data stored in memory needs to be swapped. 129 */ 130 #if defined(__OpenBSD__) 131 #if BYTE_ORDER == BIG_ENDIAN 132 #define htole32(x) (bswap32(x)) 133 #define le32toh(x) (bswap32(x)) 134 #else 135 #define htole32(x) (x) 136 #define le32toh(x) (x) 137 #endif 138 #endif 139 140 struct uhci_pipe { 141 struct usbd_pipe pipe; 142 int nexttoggle; 143 144 u_char aborting; 145 usbd_xfer_handle abortstart, abortend; 146 147 /* Info needed for different pipe kinds. */ 148 union { 149 /* Control pipe */ 150 struct { 151 uhci_soft_qh_t *sqh; 152 usb_dma_t reqdma; 153 uhci_soft_td_t *setup, *stat; 154 u_int length; 155 } ctl; 156 /* Interrupt pipe */ 157 struct { 158 int npoll; 159 int isread; 160 uhci_soft_qh_t **qhs; 161 } intr; 162 /* Bulk pipe */ 163 struct { 164 uhci_soft_qh_t *sqh; 165 u_int length; 166 int isread; 167 } bulk; 168 /* Iso pipe */ 169 struct iso { 170 uhci_soft_td_t **stds; 171 int next, inuse; 172 } iso; 173 } u; 174 }; 175 176 Static void uhci_globalreset(uhci_softc_t *); 177 Static usbd_status uhci_portreset(uhci_softc_t*, int); 178 Static void uhci_reset(uhci_softc_t *); 179 Static usbd_status uhci_run(uhci_softc_t *, int run); 180 Static usbd_status uhci_grow_std(uhci_softc_t *); 181 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 182 Static uhci_soft_td_t *uhci_alloc_std_norsv(uhci_softc_t *); 183 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 184 Static void uhci_free_std_norsv(uhci_softc_t *, uhci_soft_td_t *); 185 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 186 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 187 Static void uhci_free_desc_chunks(uhci_softc_t *, 188 struct uhci_mdescs *); 189 190 Static void uhci_bufptr_init(union uhci_bufptr *, 191 struct uhci_xfer *); 192 Static void uhci_bufptr_advance(union uhci_bufptr *, int len, 193 int is_mbuf); 194 Static void uhci_bufptr_rd(const union uhci_bufptr *, void *, 195 int len, int is_mbuf); 196 Static void uhci_bufptr_wr(const union uhci_bufptr *p, 197 const void *, int len, int is_mbuf); 198 199 Static void uhci_aux_mem_init(struct uhci_aux_mem *); 200 Static usbd_status uhci_aux_mem_alloc(uhci_softc_t *, 201 struct uhci_aux_mem *, 202 int /*naux*/, int /*maxp*/); 203 Static void uhci_aux_mem_free(uhci_softc_t *, 204 struct uhci_aux_mem *); 205 Static void uhci_aux_dma_alloc(uhci_soft_td_t *, 206 struct uhci_aux_mem *, const union uhci_bufptr *, 207 int); 208 Static void uhci_aux_dma_prepare(uhci_soft_td_t *, int /*is_mbuf*/, 209 int /*isread*/); 210 Static void uhci_aux_dma_complete(uhci_soft_td_t *, 211 struct uhci_aux_mem *, int /*is_mbuf*/, 212 int /*isread*/); 213 Static void uhci_aux_dma_sync(uhci_softc_t *, 214 struct uhci_aux_mem *, int /*op*/); 215 #if 0 216 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 217 uhci_intr_info_t *); 218 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 219 #endif 220 221 Static void uhci_free_std_chain(uhci_softc_t *, 222 uhci_soft_td_t *, uhci_soft_td_t *); 223 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 224 uhci_softc_t *, int, int, u_int16_t, 225 usbd_xfer_handle xfer, 226 uhci_soft_td_t **, uhci_soft_td_t **); 227 Static void uhci_poll_hub(void *); 228 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 229 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 230 Static void uhci_idone(uhci_intr_info_t *); 231 232 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 233 Static void uhci_transfer_complete(usbd_xfer_handle xfer); 234 235 Static void uhci_timeout(void *); 236 Static void uhci_timeout_task(void *); 237 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 238 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 239 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 240 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 241 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 242 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 243 Static int uhci_str(usb_string_descriptor_t *, int, const char *); 244 Static void uhci_add_loop(uhci_softc_t *sc); 245 Static void uhci_rem_loop(uhci_softc_t *sc); 246 247 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 248 Static void uhci_device_isoc_enter(usbd_xfer_handle); 249 250 Static usbd_status uhci_prealloc(struct uhci_softc *, 251 struct uhci_xfer *, size_t /*bufsize*/, 252 int /*nseg*/); 253 Static usbd_status uhci_allocm(struct usbd_bus *, usbd_xfer_handle, 254 void *, size_t); 255 Static void uhci_freem(struct usbd_bus *, usbd_xfer_handle, 256 enum usbd_waitflg); 257 258 Static usbd_status uhci_map_alloc(usbd_xfer_handle); 259 Static void uhci_map_free(usbd_xfer_handle); 260 Static void uhci_mapm(usbd_xfer_handle, void *, size_t); 261 Static usbd_status uhci_mapm_mbuf(usbd_xfer_handle, struct mbuf *); 262 Static void uhci_unmapm(usbd_xfer_handle); 263 264 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *, usbd_pipe_handle, 265 enum usbd_waitflg); 266 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 267 268 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 269 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 270 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 271 Static void uhci_device_ctrl_close(usbd_pipe_handle); 272 Static void uhci_device_ctrl_done(usbd_xfer_handle); 273 274 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 275 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 276 Static void uhci_device_intr_abort(usbd_xfer_handle); 277 Static void uhci_device_intr_close(usbd_pipe_handle); 278 Static void uhci_device_intr_done(usbd_xfer_handle); 279 280 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 281 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 282 Static void uhci_device_bulk_abort(usbd_xfer_handle); 283 Static void uhci_device_bulk_close(usbd_pipe_handle); 284 Static void uhci_device_bulk_done(usbd_xfer_handle); 285 286 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 287 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 288 Static void uhci_device_isoc_abort(usbd_xfer_handle); 289 Static void uhci_device_isoc_close(usbd_pipe_handle); 290 Static void uhci_device_isoc_done(usbd_xfer_handle); 291 292 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 293 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 294 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 295 Static void uhci_root_ctrl_close(usbd_pipe_handle); 296 Static void uhci_root_ctrl_done(usbd_xfer_handle); 297 298 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 299 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 300 Static void uhci_root_intr_abort(usbd_xfer_handle); 301 Static void uhci_root_intr_close(usbd_pipe_handle); 302 Static void uhci_root_intr_done(usbd_xfer_handle); 303 304 Static usbd_status uhci_open(usbd_pipe_handle); 305 Static void uhci_poll(struct usbd_bus *); 306 Static void uhci_softintr(void *); 307 308 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 309 310 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 311 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 312 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 313 struct uhci_pipe *pipe, int ival); 314 315 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 316 Static void uhci_noop(usbd_pipe_handle pipe); 317 318 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 319 uhci_soft_qh_t *); 320 321 #ifdef USB_DEBUG 322 Static void uhci_dump_all(uhci_softc_t *); 323 Static void uhci_dumpregs(uhci_softc_t *); 324 Static void uhci_dump_qhs(uhci_soft_qh_t *); 325 Static void uhci_dump_qh(uhci_soft_qh_t *); 326 Static void uhci_dump_tds(uhci_soft_td_t *); 327 Static void uhci_dump_td(uhci_soft_td_t *); 328 Static void uhci_dump_ii(uhci_intr_info_t *ii); 329 void uhci_dump(void); 330 #endif 331 332 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 333 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 334 #define UWRITE1(sc, r, x) \ 335 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 336 } while (/*CONSTCOND*/0) 337 #define UWRITE2(sc, r, x) \ 338 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 339 } while (/*CONSTCOND*/0) 340 #define UWRITE4(sc, r, x) \ 341 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 342 } while (/*CONSTCOND*/0) 343 static __inline uint8_t 344 UREAD1(uhci_softc_t *sc, bus_size_t r) 345 { 346 347 UBARR(sc); 348 return bus_space_read_1(sc->iot, sc->ioh, r); 349 } 350 351 static __inline uint16_t 352 UREAD2(uhci_softc_t *sc, bus_size_t r) 353 { 354 355 UBARR(sc); 356 return bus_space_read_2(sc->iot, sc->ioh, r); 357 } 358 359 static __inline uint32_t 360 UREAD4(uhci_softc_t *sc, bus_size_t r) 361 { 362 363 UBARR(sc); 364 return bus_space_read_4(sc->iot, sc->ioh, r); 365 } 366 367 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 368 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 369 370 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 371 372 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 373 374 #define UHCI_INTR_ENDPT 1 375 376 const struct usbd_bus_methods uhci_bus_methods = { 377 uhci_open, 378 uhci_softintr, 379 uhci_poll, 380 uhci_allocm, 381 uhci_freem, 382 uhci_map_alloc, 383 uhci_map_free, 384 uhci_mapm, 385 uhci_mapm_mbuf, 386 uhci_unmapm, 387 uhci_allocx, 388 uhci_freex, 389 }; 390 391 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 392 uhci_root_ctrl_transfer, 393 uhci_root_ctrl_start, 394 uhci_root_ctrl_abort, 395 uhci_root_ctrl_close, 396 uhci_noop, 397 uhci_root_ctrl_done, 398 }; 399 400 const struct usbd_pipe_methods uhci_root_intr_methods = { 401 uhci_root_intr_transfer, 402 uhci_root_intr_start, 403 uhci_root_intr_abort, 404 uhci_root_intr_close, 405 uhci_noop, 406 uhci_root_intr_done, 407 }; 408 409 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 410 uhci_device_ctrl_transfer, 411 uhci_device_ctrl_start, 412 uhci_device_ctrl_abort, 413 uhci_device_ctrl_close, 414 uhci_noop, 415 uhci_device_ctrl_done, 416 }; 417 418 const struct usbd_pipe_methods uhci_device_intr_methods = { 419 uhci_device_intr_transfer, 420 uhci_device_intr_start, 421 uhci_device_intr_abort, 422 uhci_device_intr_close, 423 uhci_device_clear_toggle, 424 uhci_device_intr_done, 425 }; 426 427 const struct usbd_pipe_methods uhci_device_bulk_methods = { 428 uhci_device_bulk_transfer, 429 uhci_device_bulk_start, 430 uhci_device_bulk_abort, 431 uhci_device_bulk_close, 432 uhci_device_clear_toggle, 433 uhci_device_bulk_done, 434 }; 435 436 const struct usbd_pipe_methods uhci_device_isoc_methods = { 437 uhci_device_isoc_transfer, 438 uhci_device_isoc_start, 439 uhci_device_isoc_abort, 440 uhci_device_isoc_close, 441 uhci_noop, 442 uhci_device_isoc_done, 443 }; 444 445 #define uhci_add_intr_info(sc, ii) \ 446 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 447 #define uhci_del_intr_info(ii) \ 448 do { \ 449 LIST_REMOVE((ii), list); \ 450 (ii)->list.le_prev = NULL; \ 451 } while (0) 452 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 453 454 Static inline uhci_soft_qh_t * 455 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 456 { 457 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 458 459 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 460 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 461 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 462 printf("uhci_find_prev_qh: QH not found\n"); 463 return (NULL); 464 } 465 #endif 466 } 467 return (pqh); 468 } 469 470 void 471 uhci_globalreset(uhci_softc_t *sc) 472 { 473 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 474 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 475 UHCICMD(sc, 0); /* do nothing */ 476 } 477 478 usbd_status 479 uhci_init(uhci_softc_t *sc) 480 { 481 usbd_status err; 482 int i, j; 483 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 484 uhci_soft_td_t *std; 485 486 DPRINTFN(1,("uhci_init: start\n")); 487 488 #ifdef USB_DEBUG 489 thesc = sc; 490 491 if (uhcidebug > 2) 492 uhci_dumpregs(sc); 493 #endif 494 495 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 496 uhci_globalreset(sc); /* reset the controller */ 497 uhci_reset(sc); 498 499 usb_dma_tag_init(&sc->sc_dmatag); 500 501 /* Allocate and initialize real frame array. */ 502 err = usb_allocmem(&sc->sc_dmatag, 503 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 504 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 505 if (err) 506 return (err); 507 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 508 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 509 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 510 511 /* 512 * Allocate a TD, inactive, that hangs from the last QH. 513 * This is to avoid a bug in the PIIX that makes it run berserk 514 * otherwise. 515 */ 516 std = uhci_alloc_std_norsv(sc); 517 if (std == NULL) 518 return (USBD_NOMEM); 519 std->link.std = NULL; 520 std->td.td_link = htole32(UHCI_PTR_T); 521 std->td.td_status = htole32(0); /* inactive */ 522 std->td.td_token = htole32(0); 523 std->td.td_buffer = htole32(0); 524 UHCI_STD_SYNC(sc, std, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 525 526 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 527 lsqh = uhci_alloc_sqh(sc); 528 if (lsqh == NULL) 529 return (USBD_NOMEM); 530 lsqh->hlink = NULL; 531 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 532 lsqh->elink = std; 533 lsqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(std) | UHCI_PTR_TD); 534 UHCI_SQH_SYNC(sc, lsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 535 sc->sc_last_qh = lsqh; 536 537 /* Allocate the dummy QH where bulk traffic will be queued. */ 538 bsqh = uhci_alloc_sqh(sc); 539 if (bsqh == NULL) 540 return (USBD_NOMEM); 541 bsqh->hlink = lsqh; 542 bsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(lsqh) | UHCI_PTR_QH); 543 bsqh->elink = NULL; 544 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 545 UHCI_SQH_SYNC(sc, bsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 546 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 547 548 /* Allocate dummy QH where high speed control traffic will be queued. */ 549 chsqh = uhci_alloc_sqh(sc); 550 if (chsqh == NULL) 551 return (USBD_NOMEM); 552 chsqh->hlink = bsqh; 553 chsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(bsqh) | UHCI_PTR_QH); 554 chsqh->elink = NULL; 555 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 556 UHCI_SQH_SYNC(sc, chsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 557 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 558 559 /* Allocate dummy QH where control traffic will be queued. */ 560 clsqh = uhci_alloc_sqh(sc); 561 if (clsqh == NULL) 562 return (USBD_NOMEM); 563 clsqh->hlink = chsqh; 564 clsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(chsqh) | UHCI_PTR_QH); 565 clsqh->elink = NULL; 566 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 567 UHCI_SQH_SYNC(sc, clsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 568 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 569 570 /* 571 * Make all (virtual) frame list pointers point to the interrupt 572 * queue heads and the interrupt queue heads at the control 573 * queue head and point the physical frame list to the virtual. 574 */ 575 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 576 std = uhci_alloc_std_norsv(sc); 577 sqh = uhci_alloc_sqh(sc); 578 if (std == NULL || sqh == NULL) { 579 if (std) 580 uhci_free_std_norsv(sc, std); 581 /* XXX free resources */ 582 return (USBD_NOMEM); 583 } 584 std->link.sqh = sqh; 585 std->td.td_link = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH); 586 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 587 std->td.td_token = htole32(0); 588 std->td.td_buffer = htole32(0); 589 UHCI_STD_SYNC(sc, std, 590 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 591 sqh->hlink = clsqh; 592 sqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(clsqh) | UHCI_PTR_QH); 593 sqh->elink = NULL; 594 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 595 UHCI_SQH_SYNC(sc, sqh, 596 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 597 sc->sc_vframes[i].htd = std; 598 sc->sc_vframes[i].etd = std; 599 sc->sc_vframes[i].hqh = sqh; 600 sc->sc_vframes[i].eqh = sqh; 601 for (j = i; 602 j < UHCI_FRAMELIST_COUNT; 603 j += UHCI_VFRAMELIST_COUNT) 604 sc->sc_pframes[j] = htole32(UHCI_STD_DMAADDR(std)); 605 } 606 607 LIST_INIT(&sc->sc_intrhead); 608 609 SIMPLEQ_INIT(&sc->sc_free_xfers); 610 611 usb_callout_init(sc->sc_poll_handle); 612 613 /* Set up the bus struct. */ 614 sc->sc_bus.methods = &uhci_bus_methods; 615 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 616 617 sc->sc_suspend = PWR_RESUME; 618 #if defined(__NetBSD__) || defined(__OpenBSD__) 619 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev), 620 uhci_power, sc); 621 sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc); 622 #endif 623 624 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 625 626 DPRINTFN(1,("uhci_init: enabling\n")); 627 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 628 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 629 630 return (uhci_run(sc, 1)); /* and here we go... */ 631 } 632 633 #if defined(__NetBSD__) || defined(__OpenBSD__) 634 int 635 uhci_activate(device_t self, enum devact act) 636 { 637 struct uhci_softc *sc = (struct uhci_softc *)self; 638 int rv = 0; 639 640 switch (act) { 641 case DVACT_ACTIVATE: 642 return (EOPNOTSUPP); 643 644 case DVACT_DEACTIVATE: 645 if (sc->sc_child != NULL) 646 rv = config_deactivate(sc->sc_child); 647 break; 648 } 649 return (rv); 650 } 651 #endif 652 653 int 654 uhci_detach(struct uhci_softc *sc, int flags) 655 { 656 usbd_xfer_handle xfer; 657 int rv = 0; 658 659 #if defined(__NetBSD__) || defined(__OpenBSD__) 660 if (sc->sc_child != NULL) 661 rv = config_detach(sc->sc_child, flags); 662 663 if (rv != 0) 664 return (rv); 665 #else 666 sc->sc_dying = 1; 667 #endif 668 669 #if defined(__NetBSD__) || defined(__OpenBSD__) 670 /* Don't touch hardware if it has already been gone. */ 671 if ((flags & DETACH_FORCE) == 0) 672 #endif 673 { 674 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 675 uhci_run(sc, 0); 676 } 677 678 #if defined(__NetBSD__) || defined(__OpenBSD__) 679 powerhook_disestablish(sc->sc_powerhook); 680 shutdownhook_disestablish(sc->sc_shutdownhook); 681 #endif 682 683 /* Free all xfers associated with this HC. */ 684 while ((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) == NULL) { 685 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 686 usb_clean_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf); 687 free(xfer, M_USB); 688 } 689 690 /* XXX free other data structures XXX */ 691 usb_freemem(&sc->sc_dmatag, &sc->sc_dma); 692 693 uhci_free_desc_chunks(sc, &sc->sc_std_chunks); 694 uhci_free_desc_chunks(sc, &sc->sc_sqh_chunks); 695 usb_dma_tag_finish(&sc->sc_dmatag); 696 697 return (rv); 698 } 699 700 Static usbd_status 701 uhci_prealloc(struct uhci_softc *sc, struct uhci_xfer *uxfer, 702 size_t bufsize, int nseg) 703 { 704 struct usbd_pipe *pipe; 705 int maxp, ntd, naux; 706 int s; 707 int err; 708 709 pipe = uxfer->xfer.pipe; 710 maxp = UE_MAXPKTSZ(pipe->endpoint->edesc); 711 712 if (maxp == 0 || maxp > UHCI_MAX_PKT_SIZE) 713 return (USBD_INVAL); 714 715 /* estimate needed number of TDs */ 716 if ((pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) == 717 UE_ISOCHRONOUS) { 718 /* isochronous: TDs are allocated when uhci_open() is called */ 719 ntd = 0; 720 } else { 721 /* UHCI: one TD per packet */ 722 ntd = (bufsize + maxp - 1) / maxp; 723 } 724 725 /* estimate needed aux segments */ 726 naux = nseg - 1; 727 728 /* pre-allocate aux memory */ 729 err = uhci_aux_mem_alloc(sc, &uxfer->aux, naux, maxp); 730 if (err) 731 return err; 732 733 s = splusb(); 734 /* pre-allocate TDs */ 735 while (sc->sc_nfreetds < ntd) { 736 DPRINTF(("%s: uhci_prealloc: need %d TD (%d cur)\n", 737 USBDEVNAME(sc->sc_bus.bdev), 738 ntd, sc->sc_nfreetds)); 739 if ((err = uhci_grow_std(sc)) != USBD_NORMAL_COMPLETION) 740 break; 741 } 742 if (!err) { 743 sc->sc_nfreetds -= ntd; 744 uxfer->rsvd_tds = ntd; 745 } 746 splx(s); 747 748 if (err) 749 uhci_aux_mem_free(sc, &uxfer->aux); 750 751 return err; 752 } 753 754 usbd_status 755 uhci_allocm(struct usbd_bus *bus, usbd_xfer_handle xfer, void *buf, size_t size) 756 { 757 struct uhci_softc *sc = (struct uhci_softc *)bus; 758 struct uhci_xfer *uxfer = UXFER(xfer); 759 usbd_status err; 760 761 if ((err = usb_alloc_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf, 762 buf, size, &xfer->hcbuffer)) == USBD_NORMAL_COMPLETION) { 763 if ((xfer->rqflags & URQ_DEV_MAP_PREPARED) == 0 && 764 (err = uhci_prealloc(sc, uxfer, size, 765 USB_BUFFER_NSEGS(&uxfer->dmabuf))) 766 != USBD_NORMAL_COMPLETION) { 767 usb_free_buffer_dma(&sc->sc_dmatag, &uxfer->dmabuf, 768 U_WAITOK); 769 } 770 } 771 772 return err; 773 } 774 775 void 776 uhci_freem(struct usbd_bus *bus, usbd_xfer_handle xfer, 777 enum usbd_waitflg waitflg) 778 { 779 struct uhci_softc *sc = (struct uhci_softc *)bus; 780 struct uhci_xfer *uxfer = UXFER(xfer); 781 int s; 782 783 usb_free_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf, waitflg); 784 785 if ((xfer->rqflags & URQ_DEV_MAP_PREPARED) == 0) { 786 s = splusb(); 787 sc->sc_nfreetds += uxfer->rsvd_tds; 788 splx(s); 789 uxfer->rsvd_tds = 0; 790 uhci_aux_mem_free(sc, &uxfer->aux); 791 } 792 } 793 794 Static usbd_status 795 uhci_map_alloc(usbd_xfer_handle xfer) 796 { 797 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 798 struct uhci_xfer *uxfer = UXFER(xfer); 799 usbd_status st; 800 801 st = usb_alloc_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf); 802 if (st) 803 return st; 804 805 if ((st = uhci_prealloc(sc, uxfer, MAXPHYS, USB_DMA_NSEG))) { 806 usb_free_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf); 807 } 808 809 return st; 810 } 811 812 Static void 813 uhci_map_free(usbd_xfer_handle xfer) 814 { 815 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 816 struct uhci_xfer *uxfer = UXFER(xfer); 817 int s; 818 819 USB_KASSERT(xfer->rqflags & URQ_DEV_MAP_PREPARED); 820 821 usb_free_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf); 822 823 uhci_aux_mem_free(sc, &uxfer->aux); 824 s = splusb(); 825 sc->sc_nfreetds += uxfer->rsvd_tds; 826 splx(s); 827 uxfer->rsvd_tds = 0; 828 } 829 830 Static void 831 uhci_mapm(usbd_xfer_handle xfer, void *buf, size_t size) 832 { 833 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 834 struct uhci_xfer *uxfer = UXFER(xfer); 835 836 usb_map_dma(&sc->sc_dmatag, &uxfer->dmabuf, buf, size); 837 } 838 839 Static usbd_status 840 uhci_mapm_mbuf(usbd_xfer_handle xfer, struct mbuf *chain) 841 { 842 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 843 struct uhci_xfer *uxfer = UXFER(xfer); 844 usbd_status err; 845 846 err = usb_map_mbuf_dma(&sc->sc_dmatag, &uxfer->dmabuf, chain); 847 if (!err) 848 uxfer->mbuf = chain; 849 850 return (err); 851 } 852 853 Static void 854 uhci_unmapm(usbd_xfer_handle xfer) 855 { 856 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 857 struct uhci_xfer *uxfer = UXFER(xfer); 858 859 usb_unmap_dma(&sc->sc_dmatag, &uxfer->dmabuf); 860 uxfer->mbuf = NULL; 861 } 862 863 usbd_xfer_handle 864 uhci_allocx(struct usbd_bus *bus, usbd_pipe_handle pipe, 865 enum usbd_waitflg waitflg) 866 { 867 struct uhci_softc *sc = (struct uhci_softc *)bus; 868 usbd_xfer_handle xfer; 869 870 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 871 if (xfer != NULL) { 872 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 873 #ifdef DIAGNOSTIC 874 if (xfer->busy_free != XFER_FREE) { 875 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 876 xfer->busy_free); 877 } 878 #endif 879 } else { 880 xfer = malloc(sizeof(struct uhci_xfer), M_USB, 881 waitflg == U_WAITOK ? M_WAITOK : M_NOWAIT); 882 } 883 if (xfer != NULL) { 884 memset(xfer, 0, sizeof (struct uhci_xfer)); 885 UXFER(xfer)->iinfo.sc = sc; 886 usb_init_task(&UXFER(xfer)->abort_task, uhci_timeout_task, 887 xfer); 888 UXFER(xfer)->uhci_xfer_flags = 0; 889 UXFER(xfer)->mbuf = NULL; 890 #ifdef DIAGNOSTIC 891 UXFER(xfer)->iinfo.isdone = 1; 892 xfer->busy_free = XFER_BUSY; 893 #endif 894 } 895 return (xfer); 896 } 897 898 void 899 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 900 { 901 struct uhci_softc *sc = (struct uhci_softc *)bus; 902 903 #ifdef DIAGNOSTIC 904 if (xfer->busy_free != XFER_BUSY) { 905 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 906 xfer->busy_free); 907 } 908 xfer->busy_free = XFER_FREE; 909 if (!UXFER(xfer)->iinfo.isdone) { 910 printf("uhci_freex: !isdone\n"); 911 } 912 #endif 913 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 914 } 915 916 /* 917 * Shut down the controller when the system is going down. 918 */ 919 void 920 uhci_shutdown(void *v) 921 { 922 uhci_softc_t *sc = v; 923 int s; 924 925 DPRINTF(("uhci_shutdown: stopping the HC\n")); 926 927 /* 928 * Use polling mode to prevent the interrupts shutting 929 * us down before we shut them down. 930 */ 931 s = splhardusb(); 932 sc->sc_bus.use_polling++; 933 uhci_run(sc, 0); /* stop the controller */ 934 sc->sc_bus.use_polling--; 935 splx(s); 936 } 937 938 /* 939 * Handle suspend/resume. 940 * 941 * We need to switch to polling mode here, because this routine is 942 * called from an interrupt context. This is all right since we 943 * are almost suspended anyway. 944 */ 945 void 946 uhci_power(int why, void *v) 947 { 948 uhci_softc_t *sc = v; 949 int cmd; 950 int s; 951 952 s = splhardusb(); 953 cmd = UREAD2(sc, UHCI_CMD); 954 955 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n", 956 sc, why, sc->sc_suspend, cmd)); 957 958 switch (why) { 959 USB_PWR_CASE_SUSPEND: 960 #ifdef USB_DEBUG 961 if (uhcidebug > 2) 962 uhci_dumpregs(sc); 963 #endif 964 if (sc->sc_intr_xfer != NULL) 965 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, 966 sc->sc_intr_xfer); 967 sc->sc_bus.use_polling++; 968 uhci_run(sc, 0); /* stop the controller */ 969 970 /* save some state if BIOS doesn't */ 971 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 972 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 973 974 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 975 976 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 977 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 978 sc->sc_suspend = why; 979 sc->sc_bus.use_polling--; 980 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 981 break; 982 983 USB_PWR_CASE_RESUME: 984 #ifdef DIAGNOSTIC 985 if (sc->sc_suspend == PWR_RESUME) 986 printf("uhci_power: weird, resume without suspend.\n"); 987 #endif 988 sc->sc_bus.use_polling++; 989 sc->sc_suspend = why; 990 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 991 uhci_globalreset(sc); /* reset the controller */ 992 uhci_reset(sc); 993 if (cmd & UHCI_CMD_RS) 994 uhci_run(sc, 0); /* in case BIOS has started it */ 995 996 uhci_globalreset(sc); 997 uhci_reset(sc); 998 999 /* restore saved state */ 1000 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 1001 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 1002 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 1003 1004 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 1005 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1006 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 1007 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 1008 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 1009 UHCICMD(sc, UHCI_CMD_MAXP); 1010 uhci_run(sc, 1); /* and start traffic again */ 1011 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1012 sc->sc_bus.use_polling--; 1013 if (sc->sc_intr_xfer != NULL) 1014 usb_callout(sc->sc_poll_handle, sc->sc_ival, 1015 uhci_poll_hub, sc->sc_intr_xfer); 1016 #ifdef USB_DEBUG 1017 if (uhcidebug > 2) 1018 uhci_dumpregs(sc); 1019 #endif 1020 break; 1021 1022 default: 1023 break; 1024 } 1025 splx(s); 1026 } 1027 1028 #ifdef USB_DEBUG 1029 Static void 1030 uhci_dumpregs(uhci_softc_t *sc) 1031 { 1032 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 1033 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 1034 USBDEVNAME(sc->sc_bus.bdev), 1035 UREAD2(sc, UHCI_CMD), 1036 UREAD2(sc, UHCI_STS), 1037 UREAD2(sc, UHCI_INTR), 1038 UREAD2(sc, UHCI_FRNUM), 1039 UREAD4(sc, UHCI_FLBASEADDR), 1040 UREAD1(sc, UHCI_SOF), 1041 UREAD2(sc, UHCI_PORTSC1), 1042 UREAD2(sc, UHCI_PORTSC2))); 1043 } 1044 1045 void 1046 uhci_dump_td(uhci_soft_td_t *p) 1047 { 1048 char sbuf[128], sbuf2[128]; 1049 1050 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 1051 "token=0x%08lx buffer=0x%08lx\n", 1052 p, (long)UHCI_STD_DMAADDR(p), 1053 (long)le32toh(p->td.td_link), 1054 (long)le32toh(p->td.td_status), 1055 (long)le32toh(p->td.td_token), 1056 (long)le32toh(p->td.td_buffer))); 1057 1058 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF", 1059 sbuf, sizeof(sbuf)); 1060 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status), 1061 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 1062 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 1063 sbuf2, sizeof(sbuf2)); 1064 1065 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 1066 "D=%d,maxlen=%d\n", sbuf, sbuf2, 1067 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 1068 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 1069 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 1070 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 1071 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 1072 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 1073 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 1074 } 1075 1076 void 1077 uhci_dump_qh(uhci_soft_qh_t *sqh) 1078 { 1079 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 1080 (int)UHCI_SQH_DMAADDR(sqh), le32toh(sqh->qh.qh_hlink), 1081 le32toh(sqh->qh.qh_elink))); 1082 } 1083 1084 1085 #if 1 1086 void 1087 uhci_dump(void) 1088 { 1089 uhci_dump_all(thesc); 1090 } 1091 #endif 1092 1093 void 1094 uhci_dump_all(uhci_softc_t *sc) 1095 { 1096 uhci_dumpregs(sc); 1097 printf("intrs=%d\n", sc->sc_bus.no_intrs); 1098 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 1099 uhci_dump_qh(sc->sc_lctl_start); 1100 } 1101 1102 1103 void 1104 uhci_dump_qhs(uhci_soft_qh_t *sqh) 1105 { 1106 uhci_dump_qh(sqh); 1107 1108 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 1109 * Traverses sideways first, then down. 1110 * 1111 * QH1 1112 * QH2 1113 * No QH 1114 * TD2.1 1115 * TD2.2 1116 * TD1.1 1117 * etc. 1118 * 1119 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 1120 */ 1121 1122 1123 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 1124 uhci_dump_qhs(sqh->hlink); 1125 else 1126 DPRINTF(("No QH\n")); 1127 1128 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 1129 uhci_dump_tds(sqh->elink); 1130 else 1131 DPRINTF(("No TD\n")); 1132 } 1133 1134 void 1135 uhci_dump_tds(uhci_soft_td_t *std) 1136 { 1137 uhci_soft_td_t *td; 1138 1139 for(td = std; td != NULL; td = td->link.std) { 1140 uhci_dump_td(td); 1141 1142 /* Check whether the link pointer in this TD marks 1143 * the link pointer as end of queue. This avoids 1144 * printing the free list in case the queue/TD has 1145 * already been moved there (seatbelt). 1146 */ 1147 if (le32toh(td->td.td_link) & UHCI_PTR_T || 1148 le32toh(td->td.td_link) == 0) 1149 break; 1150 } 1151 } 1152 1153 Static void 1154 uhci_dump_ii(uhci_intr_info_t *ii) 1155 { 1156 usbd_pipe_handle pipe; 1157 usb_endpoint_descriptor_t *ed; 1158 usbd_device_handle dev; 1159 1160 #ifdef DIAGNOSTIC 1161 #define DONE ii->isdone 1162 #else 1163 #define DONE 0 1164 #endif 1165 if (ii == NULL) { 1166 printf("ii NULL\n"); 1167 return; 1168 } 1169 if (ii->xfer == NULL) { 1170 printf("ii %p: done=%d xfer=NULL\n", 1171 ii, DONE); 1172 return; 1173 } 1174 pipe = ii->xfer->pipe; 1175 if (pipe == NULL) { 1176 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 1177 ii, DONE, ii->xfer); 1178 return; 1179 } 1180 if (pipe->endpoint == NULL) { 1181 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 1182 ii, DONE, ii->xfer, pipe); 1183 return; 1184 } 1185 if (pipe->device == NULL) { 1186 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 1187 ii, DONE, ii->xfer, pipe); 1188 return; 1189 } 1190 ed = pipe->endpoint->edesc; 1191 dev = pipe->device; 1192 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 1193 ii, DONE, ii->xfer, dev, 1194 UGETW(dev->ddesc.idVendor), 1195 UGETW(dev->ddesc.idProduct), 1196 dev->address, pipe, 1197 ed->bEndpointAddress, ed->bmAttributes); 1198 #undef DONE 1199 } 1200 1201 void uhci_dump_iis(struct uhci_softc *sc); 1202 void 1203 uhci_dump_iis(struct uhci_softc *sc) 1204 { 1205 uhci_intr_info_t *ii; 1206 1207 printf("intr_info list:\n"); 1208 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 1209 uhci_dump_ii(ii); 1210 } 1211 1212 void iidump(void); 1213 void iidump(void) { uhci_dump_iis(thesc); } 1214 1215 #endif 1216 1217 /* 1218 * This routine is executed periodically and simulates interrupts 1219 * from the root controller interrupt pipe for port status change. 1220 */ 1221 void 1222 uhci_poll_hub(void *addr) 1223 { 1224 usbd_xfer_handle xfer = addr; 1225 usbd_pipe_handle pipe = xfer->pipe; 1226 usbd_device_handle dev = pipe->device; 1227 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1228 int s; 1229 u_char *p; 1230 1231 DPRINTFN(20, ("uhci_poll_hub\n")); 1232 1233 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1234 1235 p = xfer->hcbuffer; 1236 p[0] = 0; 1237 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1238 p[0] |= 1<<1; 1239 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1240 p[0] |= 1<<2; 1241 if (p[0] == 0) 1242 /* No change, try again in a while */ 1243 return; 1244 1245 xfer->actlen = 1; 1246 xfer->status = USBD_NORMAL_COMPLETION; 1247 s = splusb(); 1248 dev->bus->intr_context++; 1249 uhci_transfer_complete(xfer); 1250 dev->bus->intr_context--; 1251 splx(s); 1252 } 1253 1254 void 1255 uhci_root_intr_done(usbd_xfer_handle xfer) 1256 { 1257 } 1258 1259 void 1260 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1261 { 1262 } 1263 1264 /* 1265 * Let the last QH loop back to the high speed control transfer QH. 1266 * This is what intel calls "bandwidth reclamation" and improves 1267 * USB performance a lot for some devices. 1268 * If we are already looping, just count it. 1269 */ 1270 void 1271 uhci_add_loop(uhci_softc_t *sc) { 1272 #ifdef USB_DEBUG 1273 if (uhcinoloop) 1274 return; 1275 #endif 1276 if (++sc->sc_loops == 1) { 1277 DPRINTFN(5,("uhci_start_loop: add\n")); 1278 /* Note, we don't loop back the soft pointer. */ 1279 sc->sc_last_qh->qh.qh_hlink = 1280 htole32(UHCI_SQH_DMAADDR(sc->sc_hctl_start) | UHCI_PTR_QH); 1281 } 1282 } 1283 1284 void 1285 uhci_rem_loop(uhci_softc_t *sc) { 1286 #ifdef USB_DEBUG 1287 if (uhcinoloop) 1288 return; 1289 #endif 1290 if (--sc->sc_loops == 0) { 1291 DPRINTFN(5,("uhci_end_loop: remove\n")); 1292 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1293 } 1294 } 1295 1296 /* Add high speed control QH, called at splusb(). */ 1297 void 1298 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1299 { 1300 uhci_soft_qh_t *eqh; 1301 1302 SPLUSBCHECK; 1303 1304 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1305 eqh = sc->sc_hctl_end; 1306 sqh->hlink = eqh->hlink; 1307 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1308 UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1309 eqh->hlink = sqh; 1310 eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH); 1311 UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1312 sc->sc_hctl_end = sqh; 1313 #ifdef UHCI_CTL_LOOP 1314 uhci_add_loop(sc); 1315 #endif 1316 } 1317 1318 /* Remove high speed control QH, called at splusb(). */ 1319 void 1320 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1321 { 1322 uhci_soft_qh_t *pqh; 1323 1324 SPLUSBCHECK; 1325 1326 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1327 #ifdef UHCI_CTL_LOOP 1328 uhci_rem_loop(sc); 1329 #endif 1330 /* 1331 * The T bit should be set in the elink of the QH so that the HC 1332 * doesn't follow the pointer. This condition may fail if the 1333 * the transferred packet was short so that the QH still points 1334 * at the last used TD. 1335 * In this case we set the T bit and wait a little for the HC 1336 * to stop looking at the TD. 1337 */ 1338 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1339 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1340 UHCI_SQH_SYNC(sc, sqh, 1341 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1342 delay(UHCI_QH_REMOVE_DELAY); 1343 } 1344 1345 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1346 pqh->hlink = sqh->hlink; 1347 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1348 UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1349 delay(UHCI_QH_REMOVE_DELAY); 1350 if (sc->sc_hctl_end == sqh) 1351 sc->sc_hctl_end = pqh; 1352 } 1353 1354 /* Add low speed control QH, called at splusb(). */ 1355 void 1356 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1357 { 1358 uhci_soft_qh_t *eqh; 1359 1360 SPLUSBCHECK; 1361 1362 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1363 eqh = sc->sc_lctl_end; 1364 sqh->hlink = eqh->hlink; 1365 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1366 UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1367 eqh->hlink = sqh; 1368 eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH); 1369 UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1370 sc->sc_lctl_end = sqh; 1371 } 1372 1373 /* Remove low speed control QH, called at splusb(). */ 1374 void 1375 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1376 { 1377 uhci_soft_qh_t *pqh; 1378 1379 SPLUSBCHECK; 1380 1381 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1382 /* See comment in uhci_remove_hs_ctrl() */ 1383 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1384 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1385 UHCI_SQH_SYNC(sc, sqh, 1386 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1387 delay(UHCI_QH_REMOVE_DELAY); 1388 } 1389 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1390 pqh->hlink = sqh->hlink; 1391 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1392 UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1393 delay(UHCI_QH_REMOVE_DELAY); 1394 if (sc->sc_lctl_end == sqh) 1395 sc->sc_lctl_end = pqh; 1396 } 1397 1398 /* Add bulk QH, called at splusb(). */ 1399 void 1400 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1401 { 1402 uhci_soft_qh_t *eqh; 1403 1404 SPLUSBCHECK; 1405 1406 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1407 eqh = sc->sc_bulk_end; 1408 sqh->hlink = eqh->hlink; 1409 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1410 UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1411 eqh->hlink = sqh; 1412 eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH); 1413 UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1414 sc->sc_bulk_end = sqh; 1415 uhci_add_loop(sc); 1416 } 1417 1418 /* Remove bulk QH, called at splusb(). */ 1419 void 1420 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1421 { 1422 uhci_soft_qh_t *pqh; 1423 1424 SPLUSBCHECK; 1425 1426 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1427 uhci_rem_loop(sc); 1428 /* See comment in uhci_remove_hs_ctrl() */ 1429 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1430 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1431 UHCI_SQH_SYNC(sc, sqh, 1432 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1433 delay(UHCI_QH_REMOVE_DELAY); 1434 } 1435 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1436 pqh->hlink = sqh->hlink; 1437 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1438 UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1439 delay(UHCI_QH_REMOVE_DELAY); 1440 if (sc->sc_bulk_end == sqh) 1441 sc->sc_bulk_end = pqh; 1442 } 1443 1444 Static int uhci_intr1(uhci_softc_t *); 1445 1446 int 1447 uhci_intr(void *arg) 1448 { 1449 uhci_softc_t *sc = arg; 1450 1451 if (sc->sc_dying) 1452 return (0); 1453 1454 DPRINTFN(15,("uhci_intr: real interrupt\n")); 1455 if (sc->sc_bus.use_polling) { 1456 #ifdef DIAGNOSTIC 1457 printf("uhci_intr: ignored interrupt while polling\n"); 1458 #endif 1459 return (0); 1460 } 1461 return (uhci_intr1(sc)); 1462 } 1463 1464 int 1465 uhci_intr1(uhci_softc_t *sc) 1466 { 1467 1468 int status; 1469 int ack; 1470 1471 #ifdef __FreeBSD__ 1472 /* 1473 * It can happen that an interrupt will be delivered to 1474 * us before the device has been fully attached and the 1475 * softc struct has been configured on FreeBSD. Usually 1476 * this happens when kldloading the USB support as a module 1477 * after the system has been booted. If we detect this condition, 1478 * we need to squelch the unwanted interrupts until we're 1479 * ready for them. 1480 */ 1481 if (sc->sc_bus.bdev == NULL) { 1482 UWRITE2(sc, UHCI_STS, 0xFFFF); /* ack pending interrupts */ 1483 uhci_run(sc, 0); /* stop the controller */ 1484 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 1485 return(0); 1486 } 1487 #endif 1488 1489 #ifdef USB_DEBUG 1490 if (uhcidebug > 15) { 1491 DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev))); 1492 uhci_dumpregs(sc); 1493 } 1494 #endif 1495 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1496 if (status == 0) /* The interrupt was not for us. */ 1497 return (0); 1498 1499 if (sc->sc_suspend != PWR_RESUME) { 1500 #ifdef DIAGNOSTIC 1501 printf("uhci_intr: suspended sts=0x%x\n", status); 1502 printf("%s: interrupt while not operating ignored\n", 1503 USBDEVNAME(sc->sc_bus.bdev)); 1504 #endif 1505 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1506 return (0); 1507 } 1508 1509 ack = 0; 1510 if (status & UHCI_STS_USBINT) 1511 ack |= UHCI_STS_USBINT; 1512 if (status & UHCI_STS_USBEI) 1513 ack |= UHCI_STS_USBEI; 1514 if (status & UHCI_STS_RD) { 1515 ack |= UHCI_STS_RD; 1516 #ifdef USB_DEBUG 1517 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1518 #endif 1519 } 1520 if (status & UHCI_STS_HSE) { 1521 ack |= UHCI_STS_HSE; 1522 printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev)); 1523 } 1524 if (status & UHCI_STS_HCPE) { 1525 ack |= UHCI_STS_HCPE; 1526 printf("%s: host controller process error\n", 1527 USBDEVNAME(sc->sc_bus.bdev)); 1528 } 1529 if (status & UHCI_STS_HCH) { 1530 /* no acknowledge needed */ 1531 if (!sc->sc_dying) { 1532 printf("%s: host controller halted\n", 1533 USBDEVNAME(sc->sc_bus.bdev)); 1534 #ifdef USB_DEBUG 1535 uhci_dump_all(sc); 1536 #endif 1537 } 1538 sc->sc_dying = 1; 1539 } 1540 1541 if (!ack) 1542 return (0); /* nothing to acknowledge */ 1543 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1544 1545 sc->sc_bus.no_intrs++; 1546 usb_schedsoftintr(&sc->sc_bus); 1547 1548 DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev))); 1549 1550 return (1); 1551 } 1552 1553 void 1554 uhci_softintr(void *v) 1555 { 1556 uhci_softc_t *sc = v; 1557 uhci_intr_info_t *ii, *nextii; 1558 1559 DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 1560 sc->sc_bus.intr_context)); 1561 1562 sc->sc_bus.intr_context++; 1563 1564 /* 1565 * Interrupts on UHCI really suck. When the host controller 1566 * interrupts because a transfer is completed there is no 1567 * way of knowing which transfer it was. You can scan down 1568 * the TDs and QHs of the previous frame to limit the search, 1569 * but that assumes that the interrupt was not delayed by more 1570 * than 1 ms, which may not always be true (e.g. after debug 1571 * output on a slow console). 1572 * We scan all interrupt descriptors to see if any have 1573 * completed. 1574 */ 1575 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1576 nextii = LIST_NEXT(ii, list); 1577 uhci_check_intr(sc, ii); 1578 } 1579 1580 #ifdef USB_USE_SOFTINTR 1581 if (sc->sc_softwake) { 1582 sc->sc_softwake = 0; 1583 wakeup(&sc->sc_softwake); 1584 } 1585 #endif /* USB_USE_SOFTINTR */ 1586 1587 sc->sc_bus.intr_context--; 1588 } 1589 1590 /* Check for an interrupt. */ 1591 void 1592 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1593 { 1594 uhci_soft_td_t *std, *lstd; 1595 u_int32_t status; 1596 1597 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1598 #ifdef DIAGNOSTIC 1599 if (ii == NULL) { 1600 printf("uhci_check_intr: no ii? %p\n", ii); 1601 return; 1602 } 1603 #endif 1604 if (ii->xfer->status == USBD_CANCELLED || 1605 ii->xfer->status == USBD_TIMEOUT) { 1606 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1607 return; 1608 } 1609 1610 if (ii->stdstart == NULL) 1611 return; 1612 lstd = ii->stdend; 1613 #ifdef DIAGNOSTIC 1614 if (lstd == NULL) { 1615 printf("uhci_check_intr: std==0\n"); 1616 return; 1617 } 1618 #endif 1619 /* 1620 * If the last TD is still active we need to check whether there 1621 * is an error somewhere in the middle, or whether there was a 1622 * short packet (SPD and not ACTIVE). 1623 */ 1624 UHCI_STD_SYNC(sc, lstd, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1625 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1626 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1627 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1628 UHCI_STD_SYNC(sc, lstd, 1629 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1630 status = le32toh(std->td.td_status); 1631 /* If there's an active TD the xfer isn't done. */ 1632 if (status & UHCI_TD_ACTIVE) 1633 break; 1634 /* Any kind of error makes the xfer done. */ 1635 if (status & UHCI_TD_STALLED) 1636 goto done; 1637 /* We want short packets, and it is short: it's done */ 1638 if ((status & UHCI_TD_SPD) && 1639 UHCI_TD_GET_ACTLEN(status) < 1640 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1641 goto done; 1642 } 1643 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1644 ii, ii->stdstart)); 1645 return; 1646 } 1647 done: 1648 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1649 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii); 1650 usb_rem_task(ii->xfer->pipe->device, &UXFER(ii->xfer)->abort_task); 1651 uhci_idone(ii); 1652 } 1653 1654 /* Called at splusb() */ 1655 void 1656 uhci_idone(uhci_intr_info_t *ii) 1657 { 1658 usbd_xfer_handle xfer = ii->xfer; 1659 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1660 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1661 uhci_soft_td_t *std; 1662 u_int32_t status = 0, nstatus; 1663 int actlen; 1664 1665 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1666 #ifdef DIAGNOSTIC 1667 { 1668 int s = splhigh(); 1669 if (ii->isdone) { 1670 splx(s); 1671 #ifdef USB_DEBUG 1672 printf("uhci_idone: ii is done!\n "); 1673 uhci_dump_ii(ii); 1674 #else 1675 printf("uhci_idone: ii=%p is done!\n", ii); 1676 #endif 1677 return; 1678 } 1679 ii->isdone = 1; 1680 splx(s); 1681 } 1682 #endif 1683 1684 if (xfer->nframes != 0) { 1685 /* Isoc transfer, do things differently. */ 1686 uhci_soft_td_t **stds = upipe->u.iso.stds; 1687 int i, n, nframes, len; 1688 1689 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1690 1691 nframes = xfer->nframes; 1692 actlen = 0; 1693 n = UXFER(xfer)->curframe; 1694 for (i = 0; i < nframes; i++) { 1695 std = stds[n]; 1696 UHCI_STD_SYNC(sc, std, 1697 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1698 #ifdef USB_DEBUG 1699 if (uhcidebug > 5) { 1700 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1701 uhci_dump_td(std); 1702 } 1703 #endif 1704 if (++n >= UHCI_VFRAMELIST_COUNT) 1705 n = 0; 1706 status = le32toh(std->td.td_status); 1707 len = UHCI_TD_GET_ACTLEN(status); 1708 xfer->frlengths[i] = len; 1709 actlen += len; 1710 } 1711 upipe->u.iso.inuse -= nframes; 1712 xfer->actlen = actlen; 1713 xfer->status = USBD_NORMAL_COMPLETION; 1714 goto end; 1715 } 1716 1717 #ifdef USB_DEBUG 1718 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1719 ii, xfer, upipe)); 1720 if (uhcidebug > 10) 1721 uhci_dump_tds(ii->stdstart); 1722 #endif 1723 1724 /* The transfer is done, compute actual length and status. */ 1725 actlen = 0; 1726 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1727 nstatus = le32toh(std->td.td_status); 1728 if (nstatus & UHCI_TD_ACTIVE) 1729 break; 1730 1731 status = nstatus; 1732 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1733 UHCI_TD_PID_SETUP) 1734 actlen += UHCI_TD_GET_ACTLEN(status); 1735 else { 1736 /* 1737 * UHCI will report CRCTO in addition to a STALL or NAK 1738 * for a SETUP transaction. See section 3.2.2, "TD 1739 * CONTROL AND STATUS". 1740 */ 1741 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1742 status &= ~UHCI_TD_CRCTO; 1743 } 1744 } 1745 /* If there are left over TDs we need to update the toggle. */ 1746 if (std != NULL) 1747 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1748 1749 status &= UHCI_TD_ERROR; 1750 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1751 actlen, status)); 1752 xfer->actlen = actlen; 1753 if (status != 0) { 1754 #ifdef USB_DEBUG 1755 char sbuf[128]; 1756 1757 bitmask_snprintf((u_int32_t)status, 1758 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1759 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1760 sbuf, sizeof(sbuf)); 1761 1762 DPRINTFN((status == UHCI_TD_STALLED)*10, 1763 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1764 "status 0x%s\n", 1765 xfer->pipe->device->address, 1766 xfer->pipe->endpoint->edesc->bEndpointAddress, 1767 sbuf)); 1768 #endif 1769 1770 if (status == UHCI_TD_STALLED) 1771 xfer->status = USBD_STALLED; 1772 else 1773 xfer->status = USBD_IOERROR; /* more info XXX */ 1774 } else { 1775 xfer->status = USBD_NORMAL_COMPLETION; 1776 } 1777 1778 end: 1779 uhci_transfer_complete(xfer); 1780 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1781 } 1782 1783 /* 1784 * Called when a request does not complete. 1785 */ 1786 void 1787 uhci_timeout(void *addr) 1788 { 1789 uhci_intr_info_t *ii = addr; 1790 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1791 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1792 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1793 1794 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1795 1796 if (sc->sc_dying) { 1797 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1798 return; 1799 } 1800 1801 /* Execute the abort in a process context. */ 1802 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1803 USB_TASKQ_HC); 1804 } 1805 1806 void 1807 uhci_timeout_task(void *addr) 1808 { 1809 usbd_xfer_handle xfer = addr; 1810 int s; 1811 1812 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1813 1814 s = splusb(); 1815 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1816 splx(s); 1817 } 1818 1819 /* 1820 * Wait here until controller claims to have an interrupt. 1821 * Then call uhci_intr and return. Use timeout to avoid waiting 1822 * too long. 1823 * Only used during boot when interrupts are not enabled yet. 1824 */ 1825 void 1826 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1827 { 1828 int timo = xfer->timeout; 1829 uhci_intr_info_t *ii; 1830 1831 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1832 1833 xfer->status = USBD_IN_PROGRESS; 1834 for (; timo >= 0; timo--) { 1835 usb_delay_ms(&sc->sc_bus, 1); 1836 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1837 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) 1838 uhci_intr1(sc); 1839 if (xfer->status != USBD_IN_PROGRESS) 1840 return; 1841 } 1842 1843 /* Timeout */ 1844 DPRINTF(("uhci_waitintr: timeout\n")); 1845 for (ii = LIST_FIRST(&sc->sc_intrhead); 1846 ii != NULL && ii->xfer != xfer; 1847 ii = LIST_NEXT(ii, list)) 1848 ; 1849 #ifdef DIAGNOSTIC 1850 if (ii == NULL) 1851 panic("uhci_waitintr: lost intr_info"); 1852 #endif 1853 uhci_idone(ii); 1854 } 1855 1856 void 1857 uhci_poll(struct usbd_bus *bus) 1858 { 1859 uhci_softc_t *sc = (uhci_softc_t *)bus; 1860 1861 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) 1862 uhci_intr1(sc); 1863 } 1864 1865 void 1866 uhci_reset(uhci_softc_t *sc) 1867 { 1868 int n; 1869 1870 UHCICMD(sc, UHCI_CMD_HCRESET); 1871 /* The reset bit goes low when the controller is done. */ 1872 for (n = 0; n < UHCI_RESET_TIMEOUT && 1873 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1874 usb_delay_ms(&sc->sc_bus, 1); 1875 if (n >= UHCI_RESET_TIMEOUT) 1876 printf("%s: controller did not reset\n", 1877 USBDEVNAME(sc->sc_bus.bdev)); 1878 } 1879 1880 usbd_status 1881 uhci_run(uhci_softc_t *sc, int run) 1882 { 1883 int s, n, running; 1884 u_int16_t cmd; 1885 1886 run = run != 0; 1887 s = splhardusb(); 1888 DPRINTF(("uhci_run: setting run=%d\n", run)); 1889 cmd = UREAD2(sc, UHCI_CMD); 1890 if (run) 1891 cmd |= UHCI_CMD_RS; 1892 else 1893 cmd &= ~UHCI_CMD_RS; 1894 UHCICMD(sc, cmd); 1895 for(n = 0; n < 10; n++) { 1896 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1897 /* return when we've entered the state we want */ 1898 if (run == running) { 1899 splx(s); 1900 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1901 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1902 return (USBD_NORMAL_COMPLETION); 1903 } 1904 usb_delay_ms(&sc->sc_bus, 1); 1905 } 1906 splx(s); 1907 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev), 1908 run ? "start" : "stop"); 1909 return (USBD_IOERROR); 1910 } 1911 1912 /* 1913 * Memory management routines. 1914 * uhci_alloc_std allocates TDs 1915 * uhci_alloc_sqh allocates QHs 1916 * These two routines do their own free list management, 1917 * partly for speed, partly because allocating DMAable memory 1918 * has page size granularaity so much memory would be wasted if 1919 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1920 */ 1921 1922 Static usbd_status 1923 uhci_grow_std(uhci_softc_t *sc) 1924 { 1925 usb_dma_t dma; 1926 struct uhci_mem_desc *um; 1927 uhci_soft_td_t *std; 1928 usbd_status err; 1929 int i, offs; 1930 int s; 1931 1932 DPRINTFN(2,("uhci_grow_std: allocating chunk\n")); 1933 err = usb_allocmem(&sc->sc_dmatag, 1934 UHCI_STD_SIZE*UHCI_STD_CHUNK + sizeof(struct uhci_mem_desc), 1935 UHCI_TD_ALIGN, &dma); 1936 if (err) 1937 return (err); 1938 um = KERNADDR(&dma, UHCI_STD_SIZE * UHCI_STD_CHUNK); 1939 um->um_top = KERNADDR(&dma, 0); 1940 um->um_topdma = DMAADDR(&dma, 0); 1941 um->um_dma = dma; 1942 s = splusb(); 1943 SIMPLEQ_INSERT_HEAD(&sc->sc_std_chunks, um, um_next); 1944 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1945 offs = i * UHCI_STD_SIZE; 1946 std = KERNADDR(&dma, offs); 1947 std->ut_mdesc = um; 1948 std->link.std = sc->sc_freetds; 1949 #if 0 1950 std->aux_dma.block = NULL; 1951 #endif 1952 std->aux_len = 0; 1953 sc->sc_freetds = std; 1954 sc->sc_nfreetds++; 1955 } 1956 splx(s); 1957 1958 return (USBD_NORMAL_COMPLETION); 1959 } 1960 1961 uhci_soft_td_t * 1962 uhci_alloc_std(uhci_softc_t *sc) 1963 { 1964 uhci_soft_td_t *std; 1965 int s; 1966 1967 #ifdef DIAGNOSTIC 1968 if (sc->sc_freetds == NULL) 1969 panic("uhci_alloc_std: %d", sc->sc_nfreetds); 1970 #endif 1971 s = splusb(); 1972 std = sc->sc_freetds; 1973 sc->sc_freetds = std->link.std; 1974 splx(s); 1975 memset(&std->td, 0, sizeof(uhci_td_t)); 1976 return std; 1977 } 1978 1979 Static uhci_soft_td_t * 1980 uhci_alloc_std_norsv(uhci_softc_t *sc) 1981 { 1982 int s; 1983 1984 s = splusb(); 1985 if (sc->sc_nfreetds < 1) 1986 if (uhci_grow_std(sc)) 1987 return (NULL); 1988 sc->sc_nfreetds--; 1989 splx(s); 1990 return (uhci_alloc_std(sc)); 1991 } 1992 1993 void 1994 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1995 { 1996 int s; 1997 1998 #ifdef DIAGNOSTIC 1999 #define TD_IS_FREE 0x12345678 2000 if (le32toh(std->td.td_token) == TD_IS_FREE) { 2001 printf("uhci_free_std: freeing free TD %p\n", std); 2002 return; 2003 } 2004 std->td.td_token = htole32(TD_IS_FREE); 2005 #endif 2006 #if 0 2007 if (std->aux_dma.block != NULL) { 2008 usb_freemem(&sc->sc_dmatag, &std->aux_dma); 2009 std->aux_dma.block = NULL; 2010 std->aux_len = 0; 2011 } 2012 #endif 2013 s = splusb(); 2014 std->link.std = sc->sc_freetds; 2015 sc->sc_freetds = std; 2016 splx(s); 2017 } 2018 2019 Static void 2020 uhci_free_std_norsv(uhci_softc_t *sc, uhci_soft_td_t *std) 2021 { 2022 int s; 2023 2024 s = splusb(); 2025 uhci_free_std(sc, std); 2026 sc->sc_nfreetds++; 2027 splx(s); 2028 } 2029 2030 uhci_soft_qh_t * 2031 uhci_alloc_sqh(uhci_softc_t *sc) 2032 { 2033 uhci_soft_qh_t *sqh; 2034 usbd_status err; 2035 int i, offs; 2036 usb_dma_t dma; 2037 struct uhci_mem_desc *um; 2038 2039 if (sc->sc_freeqhs == NULL) { 2040 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 2041 err = usb_allocmem(&sc->sc_dmatag, 2042 UHCI_SQH_SIZE*UHCI_SQH_CHUNK + sizeof(struct uhci_mem_desc), 2043 UHCI_QH_ALIGN, &dma); 2044 if (err) 2045 return (0); 2046 um = KERNADDR(&dma, UHCI_SQH_SIZE * UHCI_SQH_CHUNK); 2047 um->um_top = KERNADDR(&dma, 0); 2048 um->um_topdma = DMAADDR(&dma, 0); 2049 um->um_dma = dma; 2050 SIMPLEQ_INSERT_HEAD(&sc->sc_sqh_chunks, um, um_next); 2051 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 2052 offs = i * UHCI_SQH_SIZE; 2053 sqh = KERNADDR(&dma, offs); 2054 sqh->uq_mdesc = um; 2055 sqh->hlink = sc->sc_freeqhs; 2056 sc->sc_freeqhs = sqh; 2057 } 2058 } 2059 sqh = sc->sc_freeqhs; 2060 sc->sc_freeqhs = sqh->hlink; 2061 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 2062 return (sqh); 2063 } 2064 2065 void 2066 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2067 { 2068 sqh->hlink = sc->sc_freeqhs; 2069 sc->sc_freeqhs = sqh; 2070 } 2071 2072 Static void 2073 uhci_free_desc_chunks(uhci_softc_t *sc, struct uhci_mdescs *c) 2074 { 2075 struct uhci_mem_desc *um; 2076 2077 while ((um = SIMPLEQ_FIRST(c)) != NULL) { 2078 SIMPLEQ_REMOVE_HEAD(c, um_next); 2079 usb_freemem(&sc->sc_dmatag, &um->um_dma); 2080 } 2081 } 2082 2083 /* 2084 * Manipulate pointer to plain buffer or mbuf. 2085 */ 2086 2087 /* Set the buffer pointer to the beginning of buffer */ 2088 Static void 2089 uhci_bufptr_init(union uhci_bufptr *p, struct uhci_xfer *uxfer) 2090 { 2091 2092 if (uxfer->mbuf) { 2093 p->ptr_m.m_mbuf = uxfer->mbuf; 2094 p->ptr_m.m_off = 0; 2095 } else { 2096 p->ptr_p.p_buf = uxfer->xfer.hcbuffer; 2097 } 2098 } 2099 2100 /* Advance the buffer pointer by len bytes. */ 2101 Static void 2102 uhci_bufptr_advance(union uhci_bufptr *p, int len, int is_mbuf) 2103 { 2104 struct mbuf *m; 2105 int off, mlen; 2106 2107 if (is_mbuf) { 2108 for (m = p->ptr_m.m_mbuf, off = p->ptr_m.m_off; m && len; 2109 m = m->m_next, off = 0) { 2110 mlen = m->m_len - off; 2111 if (mlen > len) { 2112 off += len; 2113 len = 0; 2114 break; 2115 } 2116 len -= mlen; 2117 } 2118 p->ptr_m.m_off = off; 2119 p->ptr_m.m_mbuf = m; 2120 #ifdef DIAGNOSTIC 2121 if (len) 2122 panic("uhci_bufptr_advance: overrun %d", len); 2123 #endif 2124 } else { 2125 p->ptr_p.p_buf += len; 2126 } 2127 } 2128 2129 /* Copy data from the buffer pointer to linear buffer b. */ 2130 Static void 2131 uhci_bufptr_rd(const union uhci_bufptr *p, void *b, int len, int is_mbuf) 2132 { 2133 2134 if (is_mbuf) { 2135 m_copydata(p->ptr_m.m_mbuf, p->ptr_m.m_off, len, b); 2136 } else { 2137 memcpy(b, p->ptr_p.p_buf, len); 2138 } 2139 } 2140 2141 /* Copy data to the buffer pointer from linear buffer b. */ 2142 Static void 2143 uhci_bufptr_wr(const union uhci_bufptr *p, const void *b, int len, int is_mbuf) 2144 { 2145 struct mbuf *m; 2146 int off, mlen, curlen; 2147 const char *buf; 2148 2149 if (is_mbuf) { 2150 #if 0 /* overkill? */ 2151 m_copyback(p->ptr_m.m_mbuf, p->ptr_m.m_off, len, b); 2152 #else 2153 for (m = p->ptr_m.m_mbuf, off = p->ptr_m.m_off, buf = b; 2154 m && len; m = m->m_next, off = 0, buf += curlen) { 2155 mlen = m->m_len - off; 2156 curlen = (mlen > len) ? len : mlen; 2157 memcpy(mtod(m, caddr_t) + off, buf, curlen); 2158 len -= curlen; 2159 } 2160 #ifdef DIAGNOSTIC 2161 if (len) 2162 panic("uhci_bufptr_wr: overrun %d", len); 2163 #endif 2164 #endif 2165 } else { 2166 memcpy(p->ptr_p.p_buf, b, len); 2167 } 2168 } 2169 2170 void 2171 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 2172 uhci_soft_td_t *stdend) 2173 { 2174 uhci_soft_td_t *p; 2175 2176 for (; std != stdend; std = p) { 2177 p = std->link.std; 2178 uhci_free_std(sc, std); 2179 } 2180 } 2181 2182 usbd_status 2183 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 2184 int rd, u_int16_t flags, usbd_xfer_handle xfer, 2185 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 2186 { 2187 struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf; 2188 uhci_soft_td_t *p, *prevp, *startp; 2189 int i, ntd, l, tog, maxp, seg, segoff; 2190 u_int32_t status; 2191 int addr = upipe->pipe.device->address; 2192 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2193 bus_dma_segment_t *segs = USB_BUFFER_SEGS(ub); 2194 union uhci_bufptr bufptr; 2195 int is_mbuf; 2196 2197 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 2198 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 2199 upipe->pipe.device->speed, flags)); 2200 maxp = UE_MAXPKTSZ(upipe->pipe.endpoint->edesc); 2201 if (maxp == 0) { 2202 printf("uhci_alloc_std_chain: maxp=0\n"); 2203 return (USBD_INVAL); 2204 } 2205 ntd = (len + maxp - 1) / maxp; 2206 if (len == 0) 2207 flags |= USBD_FORCE_SHORT_XFER; 2208 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 2209 ntd++; 2210 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 2211 USB_KASSERT2(ntd > 0, ("uhci_alloc_std_chain: ntd=0")); 2212 tog = upipe->nexttoggle; 2213 prevp = NULL; 2214 startp = NULL; 2215 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 2216 if (upipe->pipe.device->speed == USB_SPEED_LOW) 2217 status |= UHCI_TD_LS; 2218 if (flags & USBD_SHORT_XFER_OK) 2219 status |= UHCI_TD_SPD; 2220 uhci_bufptr_init(&bufptr, UXFER(xfer)); 2221 is_mbuf = UXFER(xfer)->mbuf != NULL; 2222 seg = 0; 2223 segoff = 0; 2224 for (i = 0; i < ntd; i++) { 2225 p = uhci_alloc_std(sc); 2226 if (p == NULL) { 2227 uhci_free_std_chain(sc, startp, NULL); 2228 return (USBD_NOMEM); 2229 } 2230 p->link.std = NULL; 2231 if (prevp != NULL) { 2232 prevp->link.std = p; 2233 prevp->td.td_link = 2234 htole32(UHCI_STD_DMAADDR(p) | UHCI_PTR_VF | 2235 UHCI_PTR_TD); 2236 UHCI_STD_SYNC(sc, prevp, 2237 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 2238 } else { 2239 startp = p; 2240 } 2241 p->td.td_status = htole32(status); 2242 if (i == ntd - 1) { 2243 /* last TD */ 2244 l = len % maxp; 2245 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 2246 l = maxp; 2247 *ep = p; 2248 } else 2249 l = maxp; 2250 p->td.td_token = 2251 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 2252 UHCI_TD_OUT(l, endpt, addr, tog)); 2253 2254 if (i) 2255 uhci_bufptr_advance(&bufptr, maxp, is_mbuf); 2256 2257 USB_KASSERT2(seg < USB_BUFFER_NSEGS(ub) || l == 0, 2258 ("uhci_alloc_std_chain: too few segments")); 2259 if (l == 0) { 2260 p->td.td_buffer = 0; 2261 } else if (l > segs[seg].ds_len - segoff) { 2262 /* UHCI can't handle non-contiguous data. */ 2263 uhci_aux_dma_alloc(p, &UXFER(xfer)->aux, &bufptr, l); 2264 2265 /* prepare aux DMA */ 2266 uhci_aux_dma_prepare(p, is_mbuf, rd); 2267 p->td.td_buffer = htole32(p->aux_dma); 2268 2269 /* skip handled segments */ 2270 l += segoff; 2271 do { 2272 l -= segs[seg].ds_len; 2273 seg++; 2274 USB_KASSERT2(seg < USB_BUFFER_NSEGS(ub), 2275 ("uhci_alloc_std_chain: too few segments 2")); 2276 } while (l > segs[seg].ds_len); 2277 segoff = 0; 2278 } else { 2279 p->td.td_buffer = htole32(segs[seg].ds_addr + 2280 segoff); 2281 } 2282 segoff += l; 2283 if (l > 0 && segoff >= segs[seg].ds_len) { 2284 USB_KASSERT2(segoff == segs[seg].ds_len, 2285 ("uhci_alloc_std_chain: overlap")); 2286 if (i * maxp + l != len) { 2287 seg++; 2288 segoff = 0; 2289 } 2290 } 2291 prevp = p; 2292 tog ^= 1; 2293 } 2294 prevp->td.td_link = htole32(UHCI_PTR_T | UHCI_PTR_VF | UHCI_PTR_TD); 2295 upipe->nexttoggle = tog; 2296 *sp = startp; 2297 uhci_aux_dma_sync(sc, &UXFER(xfer)->aux, 2298 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2299 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 2300 upipe->nexttoggle)); 2301 return (USBD_NORMAL_COMPLETION); 2302 } 2303 2304 /* 2305 * Allocate a physically contiguous buffer to handle cases where UHCI 2306 * cannot handle a packet because it is not physically contiguous. 2307 */ 2308 Static void 2309 uhci_aux_mem_init(struct uhci_aux_mem *aux) 2310 { 2311 2312 aux->aux_curchunk = aux->aux_chunkoff = aux->aux_naux = 0; 2313 } 2314 2315 Static usbd_status 2316 uhci_aux_mem_alloc(uhci_softc_t *sc, struct uhci_aux_mem *aux, 2317 int naux, int maxp) 2318 { 2319 int nchunk, i, j; 2320 usbd_status err; 2321 2322 USB_KASSERT(aux->aux_nchunk == 0); 2323 2324 nchunk = UHCI_NCHUNK(naux, maxp); 2325 for (i = 0; i < nchunk; i++) { 2326 err = usb_allocmem(&sc->sc_dmatag, UHCI_AUX_CHUNK_SIZE, 2327 UHCI_AUX_CHUNK_SIZE, &aux->aux_chunk_dma[i]); 2328 if (err) { 2329 for (j = 0; j < i; j++) 2330 usb_freemem(&sc->sc_dmatag, 2331 &aux->aux_chunk_dma[j]); 2332 return (err); 2333 } 2334 } 2335 2336 aux->aux_nchunk = nchunk; 2337 uhci_aux_mem_init(aux); 2338 2339 return (USBD_NORMAL_COMPLETION); 2340 } 2341 2342 Static void 2343 uhci_aux_mem_free(uhci_softc_t *sc, struct uhci_aux_mem *aux) 2344 { 2345 int i; 2346 2347 for (i = 0; i < aux->aux_nchunk; i++) 2348 usb_freemem(&sc->sc_dmatag, &aux->aux_chunk_dma[i]); 2349 2350 aux->aux_nchunk = 0; 2351 } 2352 2353 Static void 2354 uhci_aux_dma_alloc(uhci_soft_td_t *std, struct uhci_aux_mem *aux, 2355 const union uhci_bufptr *bufptr, int len) 2356 { 2357 2358 if (aux->aux_chunkoff + len > UHCI_AUX_CHUNK_SIZE) { 2359 aux->aux_curchunk++; 2360 aux->aux_chunkoff = 0; 2361 } 2362 USB_KASSERT(aux->aux_curchunk < aux->aux_nchunk); 2363 2364 std->aux_dma = 2365 DMAADDR(&aux->aux_chunk_dma[aux->aux_curchunk], aux->aux_chunkoff); 2366 std->aux_kern = 2367 KERNADDR(&aux->aux_chunk_dma[aux->aux_curchunk], aux->aux_chunkoff); 2368 std->aux_ptr = *bufptr; 2369 std->aux_len = len; 2370 2371 aux->aux_chunkoff += len; 2372 aux->aux_naux++; 2373 } 2374 2375 Static void 2376 uhci_aux_dma_prepare(uhci_soft_td_t *std, int is_mbuf, int isread) 2377 { 2378 2379 if (!isread) { 2380 uhci_bufptr_rd(&std->aux_ptr, std->aux_kern, std->aux_len, 2381 is_mbuf); 2382 } 2383 } 2384 2385 Static void 2386 uhci_aux_dma_complete(uhci_soft_td_t *std, struct uhci_aux_mem *aux, 2387 int is_mbuf, int isread) 2388 { 2389 2390 if (isread) { 2391 uhci_bufptr_wr(&std->aux_ptr, std->aux_kern, std->aux_len, 2392 is_mbuf); 2393 } 2394 std->aux_len = 0; 2395 USB_KASSERT(aux->aux_naux > 0); 2396 if (--aux->aux_naux == 0) 2397 uhci_aux_mem_init(aux); 2398 } 2399 2400 Static void 2401 uhci_aux_dma_sync(uhci_softc_t *sc, struct uhci_aux_mem *aux, int op) 2402 { 2403 int naux, i; 2404 2405 naux = aux->aux_curchunk; 2406 if (aux->aux_chunkoff) 2407 naux++; 2408 2409 for (i = 0; i < naux; i++) 2410 USB_MEM_SYNC(&sc->sc_dmatag, &aux->aux_chunk_dma[i], op); 2411 } 2412 2413 void 2414 uhci_device_clear_toggle(usbd_pipe_handle pipe) 2415 { 2416 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2417 upipe->nexttoggle = 0; 2418 } 2419 2420 void 2421 uhci_noop(usbd_pipe_handle pipe) 2422 { 2423 } 2424 2425 usbd_status 2426 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 2427 { 2428 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 2429 usbd_status err; 2430 2431 /* Insert last in queue. */ 2432 err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag, 2433 &UXFER(xfer)->dmabuf); 2434 if (err) 2435 return (err); 2436 2437 /* 2438 * Pipe isn't running (otherwise err would be USBD_INPROG), 2439 * so start it first. 2440 */ 2441 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2442 } 2443 2444 usbd_status 2445 uhci_device_bulk_start(usbd_xfer_handle xfer) 2446 { 2447 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2448 usbd_device_handle dev = upipe->pipe.device; 2449 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2450 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2451 uhci_soft_td_t *data, *dataend; 2452 uhci_soft_qh_t *sqh; 2453 usbd_status err; 2454 int len, isread, endpt; 2455 int s; 2456 2457 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2458 xfer, xfer->length, xfer->flags, ii)); 2459 2460 if (sc->sc_dying) 2461 return (USBD_IOERROR); 2462 2463 #ifdef DIAGNOSTIC 2464 if (xfer->rqflags & URQ_REQUEST) 2465 panic("uhci_device_bulk_transfer: a request"); 2466 #endif 2467 2468 len = xfer->length; 2469 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2470 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2471 sqh = upipe->u.bulk.sqh; 2472 2473 upipe->u.bulk.isread = isread; 2474 upipe->u.bulk.length = len; 2475 2476 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, xfer, 2477 &data, &dataend); 2478 if (err) 2479 return (err); 2480 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2481 UHCI_STD_SYNC(sc, dataend, 2482 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2483 2484 #ifdef USB_DEBUG 2485 if (uhcidebug > 8) { 2486 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2487 uhci_dump_tds(data); 2488 } 2489 #endif 2490 2491 /* Set up interrupt info. */ 2492 ii->xfer = xfer; 2493 ii->stdstart = data; 2494 ii->stdend = dataend; 2495 #ifdef DIAGNOSTIC 2496 if (!ii->isdone) { 2497 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2498 } 2499 ii->isdone = 0; 2500 #endif 2501 2502 sqh->elink = data; 2503 sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD); 2504 2505 s = splusb(); 2506 uhci_add_bulk(sc, sqh); 2507 uhci_add_intr_info(sc, ii); 2508 2509 if (xfer->timeout && !sc->sc_bus.use_polling) { 2510 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2511 uhci_timeout, ii); 2512 } 2513 xfer->status = USBD_IN_PROGRESS; 2514 splx(s); 2515 2516 #ifdef USB_DEBUG 2517 if (uhcidebug > 10) { 2518 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2519 uhci_dump_tds(data); 2520 } 2521 #endif 2522 2523 if (sc->sc_bus.use_polling) 2524 uhci_waitintr(sc, xfer); 2525 2526 return (USBD_IN_PROGRESS); 2527 } 2528 2529 /* Abort a device bulk request. */ 2530 void 2531 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2532 { 2533 DPRINTF(("uhci_device_bulk_abort:\n")); 2534 uhci_abort_xfer(xfer, USBD_CANCELLED); 2535 } 2536 2537 /* 2538 * Abort a device request. 2539 * If this routine is called at splusb() it guarantees that the request 2540 * will be removed from the hardware scheduling and that the callback 2541 * for it will be called with USBD_CANCELLED status. 2542 * It's impossible to guarantee that the requested transfer will not 2543 * have happened since the hardware runs concurrently. 2544 * If the transaction has already happened we rely on the ordinary 2545 * interrupt processing to process it. 2546 */ 2547 void 2548 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2549 { 2550 struct uhci_xfer *uxfer = UXFER(xfer); 2551 uhci_intr_info_t *ii = &uxfer->iinfo; 2552 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2553 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 2554 uhci_soft_td_t *std; 2555 int s; 2556 int wake; 2557 2558 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2559 2560 if (sc->sc_dying) { 2561 /* If we're dying, just do the software part. */ 2562 s = splusb(); 2563 xfer->status = status; /* make software ignore it */ 2564 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer); 2565 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task); 2566 uhci_transfer_complete(xfer); 2567 splx(s); 2568 return; 2569 } 2570 2571 if (xfer->device->bus->intr_context || !curproc) 2572 panic("uhci_abort_xfer: not in process context"); 2573 2574 /* 2575 * If an abort is already in progress then just wait for it to 2576 * complete and return. 2577 */ 2578 if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING) { 2579 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2580 /* No need to wait if we're aborting from a timeout. */ 2581 if (status == USBD_TIMEOUT) { 2582 #ifdef DIAGNOSTIC 2583 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2584 #endif 2585 return; 2586 } 2587 /* Override the status which might be USBD_TIMEOUT. */ 2588 xfer->status = status; 2589 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2590 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTWAIT; 2591 while (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING) 2592 tsleep(&uxfer->uhci_xfer_flags, PZERO, "uhciaw", 0); 2593 return; 2594 } 2595 2596 /* 2597 * Step 1: Make interrupt routine and hardware ignore xfer. 2598 */ 2599 s = splusb(); 2600 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTING; 2601 xfer->status = status; /* make software ignore it */ 2602 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii); 2603 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task); 2604 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2605 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2606 UHCI_STD_SYNC(sc, std, 2607 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 2608 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2609 UHCI_STD_SYNC(sc, std, 2610 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2611 } 2612 splx(s); 2613 2614 /* 2615 * Step 2: Wait until we know hardware has finished any possible 2616 * use of the xfer. Also make sure the soft interrupt routine 2617 * has run. 2618 */ 2619 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2620 s = splusb(); 2621 #ifdef USB_USE_SOFTINTR 2622 sc->sc_softwake = 1; 2623 #endif /* USB_USE_SOFTINTR */ 2624 usb_schedsoftintr(&sc->sc_bus); 2625 #ifdef USB_USE_SOFTINTR 2626 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2627 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 2628 #endif /* USB_USE_SOFTINTR */ 2629 splx(s); 2630 2631 /* 2632 * Step 3: Execute callback. 2633 */ 2634 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2635 s = splusb(); 2636 #ifdef DIAGNOSTIC 2637 ii->isdone = 1; 2638 #endif 2639 /* Do the wakeup first to avoid touching the xfer after the callback. */ 2640 wake = uxfer->uhci_xfer_flags & UHCI_XFER_ABORTWAIT; 2641 uxfer->uhci_xfer_flags &= ~(UHCI_XFER_ABORTING | UHCI_XFER_ABORTWAIT); 2642 uhci_transfer_complete(xfer); 2643 if (wake) 2644 wakeup(&uxfer->uhci_xfer_flags); 2645 splx(s); 2646 } 2647 2648 /* 2649 * Perform any UHCI-specific transfer completion operations, then 2650 * call usb_transfer_complete(). 2651 */ 2652 Static void 2653 uhci_transfer_complete(usbd_xfer_handle xfer) 2654 { 2655 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2656 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2657 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 2658 uhci_soft_td_t *p; 2659 struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf; 2660 int i, isread, n; 2661 int is_mbuf; 2662 2663 /* XXX, must be an easier way to detect reads... */ 2664 isread = ((xfer->rqflags & URQ_REQUEST) && 2665 (xfer->request.bmRequestType & UT_READ)) || 2666 (xfer->pipe->endpoint->edesc->bEndpointAddress & UE_DIR_IN); 2667 2668 if (ub) 2669 usb_sync_buffer_dma(&sc->sc_dmatag, ub, 2670 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2671 2672 uhci_aux_dma_sync(sc, &UXFER(xfer)->aux, 2673 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2674 2675 is_mbuf = UXFER(xfer)->mbuf != NULL; 2676 2677 /* Copy back from any auxillary buffers after a read operation. */ 2678 if (xfer->nframes == 0) { 2679 for (p = ii->stdstart; p != NULL; p = p->link.std) { 2680 if (p->aux_len) 2681 uhci_aux_dma_complete(p, &UXFER(xfer)->aux, 2682 is_mbuf, isread); 2683 } 2684 } else { 2685 if (xfer->nframes != 0) { 2686 /* Isoc transfer, do things differently. */ 2687 n = UXFER(xfer)->curframe; 2688 for (i = 0; i < xfer->nframes; i++) { 2689 p = upipe->u.iso.stds[n]; 2690 if (p->aux_len) 2691 uhci_aux_dma_complete(p, 2692 &UXFER(xfer)->aux, is_mbuf, isread); 2693 if (++n >= UHCI_VFRAMELIST_COUNT) 2694 n = 0; 2695 } 2696 } 2697 } 2698 2699 usb_transfer_complete(xfer); 2700 } 2701 2702 /* Close a device bulk pipe. */ 2703 void 2704 uhci_device_bulk_close(usbd_pipe_handle pipe) 2705 { 2706 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2707 usbd_device_handle dev = upipe->pipe.device; 2708 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2709 2710 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2711 pipe->endpoint->savedtoggle = upipe->nexttoggle; 2712 } 2713 2714 usbd_status 2715 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2716 { 2717 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 2718 usbd_status err; 2719 2720 /* Insert last in queue. */ 2721 err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag, 2722 &UXFER(xfer)->dmabuf); 2723 if (err) 2724 return (err); 2725 2726 /* 2727 * Pipe isn't running (otherwise err would be USBD_INPROG), 2728 * so start it first. 2729 */ 2730 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2731 } 2732 2733 usbd_status 2734 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2735 { 2736 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 2737 usbd_status err; 2738 2739 if (sc->sc_dying) 2740 return (USBD_IOERROR); 2741 2742 #ifdef DIAGNOSTIC 2743 if (!(xfer->rqflags & URQ_REQUEST)) 2744 panic("uhci_device_ctrl_transfer: not a request"); 2745 #endif 2746 2747 err = uhci_device_request(xfer); 2748 if (err) 2749 return (err); 2750 2751 if (sc->sc_bus.use_polling) 2752 uhci_waitintr(sc, xfer); 2753 return (USBD_IN_PROGRESS); 2754 } 2755 2756 usbd_status 2757 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2758 { 2759 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 2760 usbd_status err; 2761 2762 /* Insert last in queue. */ 2763 err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag, 2764 &UXFER(xfer)->dmabuf); 2765 if (err) 2766 return (err); 2767 2768 /* 2769 * Pipe isn't running (otherwise err would be USBD_INPROG), 2770 * so start it first. 2771 */ 2772 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2773 } 2774 2775 usbd_status 2776 uhci_device_intr_start(usbd_xfer_handle xfer) 2777 { 2778 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2779 usbd_device_handle dev = upipe->pipe.device; 2780 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2781 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2782 uhci_soft_td_t *data, *dataend; 2783 uhci_soft_qh_t *sqh; 2784 usbd_status err; 2785 int isread, endpt; 2786 int i, s; 2787 2788 if (sc->sc_dying) 2789 return (USBD_IOERROR); 2790 2791 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2792 xfer, xfer->length, xfer->flags)); 2793 2794 #ifdef DIAGNOSTIC 2795 if (xfer->rqflags & URQ_REQUEST) 2796 panic("uhci_device_intr_transfer: a request"); 2797 #endif 2798 2799 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2800 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2801 sqh = upipe->u.bulk.sqh; 2802 2803 upipe->u.intr.isread = isread; 2804 2805 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, xfer->flags, 2806 xfer, &data, &dataend); 2807 if (err) 2808 return (err); 2809 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2810 UHCI_STD_SYNC(sc, dataend, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2811 2812 #ifdef USB_DEBUG 2813 if (uhcidebug > 10) { 2814 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2815 uhci_dump_tds(data); 2816 uhci_dump_qh(upipe->u.intr.qhs[0]); 2817 } 2818 #endif 2819 2820 s = splusb(); 2821 /* Set up interrupt info. */ 2822 ii->xfer = xfer; 2823 ii->stdstart = data; 2824 ii->stdend = dataend; 2825 #ifdef DIAGNOSTIC 2826 if (!ii->isdone) { 2827 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2828 } 2829 ii->isdone = 0; 2830 #endif 2831 2832 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2833 upipe->u.intr.qhs[0])); 2834 for (i = 0; i < upipe->u.intr.npoll; i++) { 2835 sqh = upipe->u.intr.qhs[i]; 2836 sqh->elink = data; 2837 sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD); 2838 UHCI_SQH_SYNC(sc, sqh, 2839 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2840 } 2841 uhci_add_intr_info(sc, ii); 2842 xfer->status = USBD_IN_PROGRESS; 2843 splx(s); 2844 2845 #ifdef USB_DEBUG 2846 if (uhcidebug > 10) { 2847 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2848 uhci_dump_tds(data); 2849 uhci_dump_qh(upipe->u.intr.qhs[0]); 2850 } 2851 #endif 2852 2853 return (USBD_IN_PROGRESS); 2854 } 2855 2856 /* Abort a device control request. */ 2857 void 2858 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2859 { 2860 DPRINTF(("uhci_device_ctrl_abort:\n")); 2861 uhci_abort_xfer(xfer, USBD_CANCELLED); 2862 } 2863 2864 /* Close a device control pipe. */ 2865 void 2866 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2867 { 2868 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2869 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2870 2871 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2872 uhci_free_std_norsv(sc, upipe->u.ctl.setup); 2873 uhci_free_std_norsv(sc, upipe->u.ctl.stat); 2874 usb_freemem(&sc->sc_dmatag, &upipe->u.ctl.reqdma); 2875 } 2876 2877 /* Abort a device interrupt request. */ 2878 void 2879 uhci_device_intr_abort(usbd_xfer_handle xfer) 2880 { 2881 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2882 if (xfer->pipe->intrxfer == xfer) { 2883 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2884 xfer->pipe->intrxfer = NULL; 2885 } 2886 uhci_abort_xfer(xfer, USBD_CANCELLED); 2887 } 2888 2889 /* Close a device interrupt pipe. */ 2890 void 2891 uhci_device_intr_close(usbd_pipe_handle pipe) 2892 { 2893 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2894 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2895 int i, npoll; 2896 int s; 2897 2898 /* Unlink descriptors from controller data structures. */ 2899 npoll = upipe->u.intr.npoll; 2900 s = splusb(); 2901 for (i = 0; i < npoll; i++) 2902 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2903 splx(s); 2904 2905 /* 2906 * We now have to wait for any activity on the physical 2907 * descriptors to stop. 2908 */ 2909 usb_delay_ms(&sc->sc_bus, 2); 2910 2911 for(i = 0; i < npoll; i++) 2912 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2913 free(upipe->u.intr.qhs, M_USBHC); 2914 2915 /* XXX free other resources */ 2916 } 2917 2918 usbd_status 2919 uhci_device_request(usbd_xfer_handle xfer) 2920 { 2921 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2922 usb_device_request_t *req = &xfer->request; 2923 usbd_device_handle dev = upipe->pipe.device; 2924 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2925 int addr = dev->address; 2926 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2927 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2928 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2929 uhci_soft_qh_t *sqh; 2930 int len; 2931 u_int32_t ls; 2932 usbd_status err; 2933 int isread; 2934 int s; 2935 2936 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2937 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2938 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2939 UGETW(req->wIndex), UGETW(req->wLength), 2940 addr, endpt)); 2941 2942 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2943 isread = req->bmRequestType & UT_READ; 2944 len = UGETW(req->wLength); 2945 2946 setup = upipe->u.ctl.setup; 2947 stat = upipe->u.ctl.stat; 2948 sqh = upipe->u.ctl.sqh; 2949 2950 /* Set up data transaction */ 2951 if (len != 0) { 2952 upipe->nexttoggle = 1; 2953 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2954 xfer, &data, &dataend); 2955 if (err) 2956 return (err); 2957 next = data; 2958 dataend->link.std = stat; 2959 dataend->td.td_link = 2960 htole32(UHCI_STD_DMAADDR(stat) | UHCI_PTR_VF | UHCI_PTR_TD); 2961 UHCI_STD_SYNC(sc, dataend, 2962 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2963 } else { 2964 next = stat; 2965 } 2966 upipe->u.ctl.length = len; 2967 2968 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2969 USB_MEM_SYNC(&sc->sc_dmatag, &upipe->u.ctl.reqdma, 2970 BUS_DMASYNC_PREWRITE); 2971 2972 setup->link.std = next; 2973 setup->td.td_link = htole32(UHCI_STD_DMAADDR(next) | UHCI_PTR_VF | UHCI_PTR_TD); 2974 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2975 UHCI_TD_ACTIVE); 2976 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2977 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2978 UHCI_STD_SYNC(sc, setup, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2979 2980 stat->link.std = NULL; 2981 stat->td.td_link = htole32(UHCI_PTR_T); 2982 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2983 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2984 stat->td.td_token = 2985 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2986 UHCI_TD_IN (0, endpt, addr, 1)); 2987 stat->td.td_buffer = htole32(0); 2988 UHCI_STD_SYNC(sc, stat, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2989 2990 #ifdef USB_DEBUG 2991 if (uhcidebug > 10) { 2992 DPRINTF(("uhci_device_request: before transfer\n")); 2993 uhci_dump_tds(setup); 2994 } 2995 #endif 2996 2997 /* Set up interrupt info. */ 2998 ii->xfer = xfer; 2999 ii->stdstart = setup; 3000 ii->stdend = stat; 3001 #ifdef DIAGNOSTIC 3002 if (!ii->isdone) { 3003 printf("uhci_device_request: not done, ii=%p\n", ii); 3004 } 3005 ii->isdone = 0; 3006 #endif 3007 3008 sqh->elink = setup; 3009 sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(setup) | UHCI_PTR_TD); 3010 UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3011 3012 s = splusb(); 3013 if (dev->speed == USB_SPEED_LOW) 3014 uhci_add_ls_ctrl(sc, sqh); 3015 else 3016 uhci_add_hs_ctrl(sc, sqh); 3017 uhci_add_intr_info(sc, ii); 3018 #ifdef USB_DEBUG 3019 if (uhcidebug > 12) { 3020 uhci_soft_td_t *std; 3021 uhci_soft_qh_t *xqh; 3022 uhci_soft_qh_t *sxqh; 3023 int maxqh = 0; 3024 uhci_physaddr_t link; 3025 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 3026 for (std = sc->sc_vframes[0].htd, link = 0; 3027 (link & UHCI_PTR_QH) == 0; 3028 std = std->link.std) { 3029 link = le32toh(std->td.td_link); 3030 uhci_dump_td(std); 3031 } 3032 sxqh = (uhci_soft_qh_t *)std; 3033 uhci_dump_qh(sxqh); 3034 for (xqh = sxqh; 3035 xqh != NULL; 3036 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 3037 xqh->hlink == xqh ? NULL : xqh->hlink)) { 3038 uhci_dump_qh(xqh); 3039 } 3040 DPRINTF(("Enqueued QH:\n")); 3041 uhci_dump_qh(sqh); 3042 uhci_dump_tds(sqh->elink); 3043 } 3044 #endif 3045 if (xfer->timeout && !sc->sc_bus.use_polling) { 3046 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 3047 uhci_timeout, ii); 3048 } 3049 xfer->status = USBD_IN_PROGRESS; 3050 splx(s); 3051 3052 return (USBD_NORMAL_COMPLETION); 3053 } 3054 3055 usbd_status 3056 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 3057 { 3058 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3059 usbd_status err; 3060 3061 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 3062 3063 /* Put it on our queue, */ 3064 err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag, 3065 &UXFER(xfer)->dmabuf); 3066 3067 /* bail out on error, */ 3068 if (err && err != USBD_IN_PROGRESS) 3069 return (err); 3070 3071 /* XXX should check inuse here */ 3072 3073 /* insert into schedule, */ 3074 uhci_device_isoc_enter(xfer); 3075 3076 /* and start if the pipe wasn't running */ 3077 if (!err) 3078 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3079 3080 return (err); 3081 } 3082 3083 void 3084 uhci_device_isoc_enter(usbd_xfer_handle xfer) 3085 { 3086 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3087 usbd_device_handle dev = upipe->pipe.device; 3088 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 3089 struct iso *iso = &upipe->u.iso; 3090 uhci_soft_td_t *std; 3091 u_int32_t len, status; 3092 int s, i, isread, next, nframes, seg, segoff; 3093 struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf; 3094 bus_dma_segment_t *segs = USB_BUFFER_SEGS(ub); 3095 int nsegs = USB_BUFFER_NSEGS(ub); 3096 union uhci_bufptr bufptr; 3097 int is_mbuf; 3098 3099 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 3100 "nframes=%d\n", 3101 iso->inuse, iso->next, xfer, xfer->nframes)); 3102 3103 if (sc->sc_dying) 3104 return; 3105 3106 if (xfer->status == USBD_IN_PROGRESS) { 3107 /* This request has already been entered into the frame list */ 3108 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 3109 /* XXX */ 3110 } 3111 3112 #ifdef DIAGNOSTIC 3113 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 3114 printf("uhci_device_isoc_enter: overflow!\n"); 3115 #endif 3116 3117 next = iso->next; 3118 if (next == -1) { 3119 /* Not in use yet, schedule it a few frames ahead. */ 3120 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 3121 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 3122 } 3123 3124 xfer->status = USBD_IN_PROGRESS; 3125 UXFER(xfer)->curframe = next; 3126 3127 seg = 0; 3128 segoff = 0; 3129 uhci_bufptr_init(&bufptr, UXFER(xfer)); 3130 is_mbuf = UXFER(xfer)->mbuf != NULL; 3131 isread = xfer->pipe->endpoint->edesc->bEndpointAddress & UE_DIR_IN; 3132 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 3133 UHCI_TD_ACTIVE | 3134 UHCI_TD_IOS); 3135 nframes = xfer->nframes; 3136 s = splusb(); 3137 for (i = 0; i < nframes; i++) { 3138 std = iso->stds[next]; 3139 if (++next >= UHCI_VFRAMELIST_COUNT) 3140 next = 0; 3141 len = xfer->frlengths[i]; 3142 USB_KASSERT2(seg < nsegs, 3143 ("uhci_device_isoc_enter: too few segments")); 3144 if (len + segoff > segs[seg].ds_len) { 3145 /* UHCI can't handle non-contiguous data. */ 3146 uhci_aux_dma_alloc(std, &UXFER(xfer)->aux, &bufptr, 3147 len); 3148 3149 /* prepare aux DMA */ 3150 uhci_aux_dma_prepare(std, is_mbuf, isread); 3151 std->td.td_buffer = htole32(std->aux_dma); 3152 3153 /* skip handled segments */ 3154 segoff += len; 3155 while (segoff >= segs[seg].ds_len) { 3156 USB_KASSERT2(seg < nsegs - 1 || 3157 segoff == segs[seg].ds_len, 3158 ("uhci_device_isoc_enter: overlap2")); 3159 segoff -= segs[seg].ds_len; 3160 seg++; 3161 } 3162 } else { 3163 std->td.td_buffer = 3164 htole32(segs[seg].ds_addr + segoff); 3165 segoff += len; 3166 if (segoff >= segs[seg].ds_len) { 3167 USB_KASSERT2(segoff == segs[seg].ds_len, 3168 ("uhci_device_isoc_enter: overlap")); 3169 segoff = 0; 3170 seg++; 3171 } 3172 } 3173 if (i == nframes - 1) 3174 status |= UHCI_TD_IOC; 3175 std->td.td_status = htole32(status); 3176 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 3177 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 3178 UHCI_STD_SYNC(sc, std, 3179 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3180 #ifdef USB_DEBUG 3181 if (uhcidebug > 5) { 3182 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 3183 uhci_dump_td(std); 3184 } 3185 #endif 3186 uhci_bufptr_advance(&bufptr, len, is_mbuf); 3187 } 3188 iso->next = next; 3189 iso->inuse += xfer->nframes; 3190 3191 uhci_aux_dma_sync(sc, &UXFER(xfer)->aux, 3192 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 3193 3194 splx(s); 3195 } 3196 3197 usbd_status 3198 uhci_device_isoc_start(usbd_xfer_handle xfer) 3199 { 3200 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3201 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 3202 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3203 uhci_soft_td_t *end; 3204 int s, i; 3205 3206 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 3207 3208 if (sc->sc_dying) 3209 return (USBD_IOERROR); 3210 3211 #ifdef DIAGNOSTIC 3212 if (xfer->status != USBD_IN_PROGRESS) 3213 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3214 #endif 3215 3216 /* Find the last TD */ 3217 i = UXFER(xfer)->curframe + xfer->nframes; 3218 if (i >= UHCI_VFRAMELIST_COUNT) 3219 i -= UHCI_VFRAMELIST_COUNT; 3220 end = upipe->u.iso.stds[i]; 3221 3222 #ifdef DIAGNOSTIC 3223 if (end == NULL) { 3224 printf("uhci_device_isoc_start: end == NULL\n"); 3225 return (USBD_INVAL); 3226 } 3227 #endif 3228 3229 s = splusb(); 3230 3231 /* Set up interrupt info. */ 3232 ii->xfer = xfer; 3233 ii->stdstart = end; 3234 ii->stdend = end; 3235 #ifdef DIAGNOSTIC 3236 if (!ii->isdone) 3237 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 3238 ii->isdone = 0; 3239 #endif 3240 uhci_add_intr_info(sc, ii); 3241 3242 splx(s); 3243 3244 return (USBD_IN_PROGRESS); 3245 } 3246 3247 void 3248 uhci_device_isoc_abort(usbd_xfer_handle xfer) 3249 { 3250 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3251 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 3252 uhci_soft_td_t **stds = upipe->u.iso.stds; 3253 uhci_soft_td_t *std; 3254 int i, n, s, nframes, maxlen, len; 3255 3256 s = splusb(); 3257 3258 /* Transfer is already done. */ 3259 if (xfer->status != USBD_NOT_STARTED && 3260 xfer->status != USBD_IN_PROGRESS) { 3261 splx(s); 3262 return; 3263 } 3264 3265 /* Give xfer the requested abort code. */ 3266 xfer->status = USBD_CANCELLED; 3267 3268 /* make hardware ignore it, */ 3269 nframes = xfer->nframes; 3270 n = UXFER(xfer)->curframe; 3271 maxlen = 0; 3272 for (i = 0; i < nframes; i++) { 3273 std = stds[n]; 3274 UHCI_STD_SYNC(sc, std, 3275 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 3276 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 3277 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 3278 UHCI_STD_SYNC(sc, std, 3279 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3280 if (len > maxlen) 3281 maxlen = len; 3282 if (++n >= UHCI_VFRAMELIST_COUNT) 3283 n = 0; 3284 } 3285 3286 /* and wait until we are sure the hardware has finished. */ 3287 delay(maxlen); 3288 3289 #ifdef DIAGNOSTIC 3290 UXFER(xfer)->iinfo.isdone = 1; 3291 #endif 3292 /* Run callback and remove from interrupt list. */ 3293 uhci_transfer_complete(xfer); 3294 3295 splx(s); 3296 } 3297 3298 void 3299 uhci_device_isoc_close(usbd_pipe_handle pipe) 3300 { 3301 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3302 usbd_device_handle dev = upipe->pipe.device; 3303 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 3304 uhci_soft_td_t *std, *vstd; 3305 struct iso *iso; 3306 int i, s; 3307 3308 /* 3309 * Make sure all TDs are marked as inactive. 3310 * Wait for completion. 3311 * Unschedule. 3312 * Deallocate. 3313 */ 3314 iso = &upipe->u.iso; 3315 3316 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3317 UHCI_STD_SYNC(sc, iso->stds[i], 3318 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 3319 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 3320 UHCI_STD_SYNC(sc, iso->stds[i], 3321 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3322 } 3323 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 3324 3325 s = splusb(); 3326 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3327 std = iso->stds[i]; 3328 for (vstd = sc->sc_vframes[i].htd; 3329 vstd != NULL && vstd->link.std != std; 3330 vstd = vstd->link.std) 3331 ; 3332 if (vstd == NULL) { 3333 /*panic*/ 3334 printf("uhci_device_isoc_close: %p not found\n", std); 3335 splx(s); 3336 return; 3337 } 3338 vstd->link = std->link; 3339 vstd->td.td_link = std->td.td_link; 3340 uhci_free_std_norsv(sc, std); 3341 } 3342 splx(s); 3343 3344 free(iso->stds, M_USBHC); 3345 } 3346 3347 usbd_status 3348 uhci_setup_isoc(usbd_pipe_handle pipe) 3349 { 3350 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3351 usbd_device_handle dev = upipe->pipe.device; 3352 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 3353 int addr = upipe->pipe.device->address; 3354 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 3355 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 3356 uhci_soft_td_t *std, *vstd; 3357 u_int32_t token; 3358 struct iso *iso; 3359 int i, s; 3360 3361 iso = &upipe->u.iso; 3362 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 3363 M_USBHC, M_WAITOK); 3364 3365 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 3366 UHCI_TD_OUT(0, endpt, addr, 0); 3367 3368 /* Allocate the TDs and mark as inactive; */ 3369 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3370 std = uhci_alloc_std_norsv(sc); 3371 if (std == 0) 3372 goto bad; 3373 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 3374 std->td.td_token = htole32(token); 3375 iso->stds[i] = std; 3376 } 3377 3378 /* Insert TDs into schedule. */ 3379 s = splusb(); 3380 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3381 std = iso->stds[i]; 3382 vstd = sc->sc_vframes[i].htd; 3383 std->link = vstd->link; 3384 std->td.td_link = vstd->td.td_link; 3385 UHCI_STD_SYNC(sc, std, 3386 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3387 vstd->link.std = std; 3388 vstd->td.td_link = htole32(UHCI_STD_DMAADDR(std) | UHCI_PTR_TD); 3389 } 3390 splx(s); 3391 3392 iso->next = -1; 3393 iso->inuse = 0; 3394 3395 return (USBD_NORMAL_COMPLETION); 3396 3397 bad: 3398 while (--i >= 0) 3399 uhci_free_std_norsv(sc, iso->stds[i]); 3400 free(iso->stds, M_USBHC); 3401 return (USBD_NOMEM); 3402 } 3403 3404 void 3405 uhci_device_isoc_done(usbd_xfer_handle xfer) 3406 { 3407 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3408 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3409 3410 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 3411 xfer->actlen, xfer->busy_free)); 3412 3413 if (ii->xfer != xfer) 3414 /* Not on interrupt list, ignore it. */ 3415 return; 3416 3417 if (!uhci_active_intr_info(ii)) 3418 return; 3419 3420 #ifdef DIAGNOSTIC 3421 if (ii->stdend == NULL) { 3422 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 3423 #ifdef USB_DEBUG 3424 uhci_dump_ii(ii); 3425 #endif 3426 return; 3427 } 3428 #endif 3429 3430 /* Turn off the interrupt since it is active even if the TD is not. */ 3431 UHCI_STD_SYNC(sc, ii->stdend, 3432 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 3433 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 3434 UHCI_STD_SYNC(sc, ii->stdend, 3435 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3436 3437 uhci_del_intr_info(ii); /* remove from active list */ 3438 3439 #ifdef DIAGNOSTIC 3440 if (ii->stdend == NULL) { 3441 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 3442 #ifdef USB_DEBUG 3443 uhci_dump_ii(ii); 3444 #endif 3445 return; 3446 } 3447 #endif 3448 ii->stdstart = NULL; 3449 ii->stdend = NULL; 3450 } 3451 3452 void 3453 uhci_device_intr_done(usbd_xfer_handle xfer) 3454 { 3455 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3456 uhci_softc_t *sc = ii->sc; 3457 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3458 uhci_soft_qh_t *sqh; 3459 int i, npoll; 3460 3461 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 3462 3463 npoll = upipe->u.intr.npoll; 3464 for(i = 0; i < npoll; i++) { 3465 sqh = upipe->u.intr.qhs[i]; 3466 sqh->elink = NULL; 3467 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3468 } 3469 uhci_free_std_chain(sc, ii->stdstart, NULL); 3470 3471 /* XXX Wasteful. */ 3472 if (xfer->pipe->repeat) { 3473 uhci_soft_td_t *data, *dataend; 3474 3475 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 3476 3477 /* This alloc cannot fail since we freed the chain above. */ 3478 uhci_alloc_std_chain(upipe, sc, xfer->length, 3479 upipe->u.intr.isread, xfer->flags, xfer, 3480 &data, &dataend); 3481 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3482 UHCI_STD_SYNC(sc, dataend, 3483 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3484 3485 #ifdef USB_DEBUG 3486 if (uhcidebug > 10) { 3487 DPRINTF(("uhci_device_intr_done: data(1)\n")); 3488 uhci_dump_tds(data); 3489 uhci_dump_qh(upipe->u.intr.qhs[0]); 3490 } 3491 #endif 3492 3493 ii->stdstart = data; 3494 ii->stdend = dataend; 3495 #ifdef DIAGNOSTIC 3496 if (!ii->isdone) { 3497 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3498 } 3499 ii->isdone = 0; 3500 #endif 3501 for (i = 0; i < npoll; i++) { 3502 sqh = upipe->u.intr.qhs[i]; 3503 sqh->elink = data; 3504 sqh->qh.qh_elink = 3505 htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD); 3506 UHCI_SQH_SYNC(sc, sqh, 3507 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3508 } 3509 xfer->status = USBD_IN_PROGRESS; 3510 /* The ii is already on the examined list, just leave it. */ 3511 } else { 3512 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3513 if (uhci_active_intr_info(ii)) { 3514 uhci_del_intr_info(ii); 3515 ii->stdstart = NULL; 3516 ii->stdend = NULL; 3517 } 3518 } 3519 } 3520 3521 /* Deallocate request data structures */ 3522 void 3523 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3524 { 3525 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3526 uhci_softc_t *sc = ii->sc; 3527 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3528 3529 #ifdef DIAGNOSTIC 3530 if (!(xfer->rqflags & URQ_REQUEST)) 3531 panic("uhci_device_ctrl_done: not a request"); 3532 #endif 3533 3534 if (!uhci_active_intr_info(ii)) 3535 return; 3536 3537 uhci_del_intr_info(ii); /* remove from active list */ 3538 3539 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3540 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3541 else 3542 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3543 3544 if (upipe->u.ctl.length != 0) 3545 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3546 ii->stdstart = NULL; 3547 ii->stdend = NULL; 3548 3549 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3550 } 3551 3552 /* Deallocate request data structures */ 3553 void 3554 uhci_device_bulk_done(usbd_xfer_handle xfer) 3555 { 3556 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3557 uhci_softc_t *sc = ii->sc; 3558 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3559 3560 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3561 xfer, ii, sc, upipe)); 3562 3563 if (!uhci_active_intr_info(ii)) 3564 return; 3565 3566 uhci_del_intr_info(ii); /* remove from active list */ 3567 3568 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3569 3570 uhci_free_std_chain(sc, ii->stdstart, NULL); 3571 ii->stdstart = NULL; 3572 ii->stdend = NULL; 3573 3574 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3575 } 3576 3577 /* Add interrupt QH, called with vflock. */ 3578 void 3579 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3580 { 3581 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3582 uhci_soft_qh_t *eqh; 3583 3584 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3585 3586 eqh = vf->eqh; 3587 sqh->hlink = eqh->hlink; 3588 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3589 eqh->hlink = sqh; 3590 eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH); 3591 vf->eqh = sqh; 3592 vf->bandwidth++; 3593 } 3594 3595 /* Remove interrupt QH. */ 3596 void 3597 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3598 { 3599 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3600 uhci_soft_qh_t *pqh; 3601 3602 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3603 3604 /* See comment in uhci_remove_ctrl() */ 3605 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3606 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3607 UHCI_SQH_SYNC(sc, sqh, 3608 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3609 delay(UHCI_QH_REMOVE_DELAY); 3610 } 3611 3612 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3613 pqh->hlink = sqh->hlink; 3614 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3615 UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3616 delay(UHCI_QH_REMOVE_DELAY); 3617 if (vf->eqh == sqh) 3618 vf->eqh = pqh; 3619 vf->bandwidth--; 3620 } 3621 3622 usbd_status 3623 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3624 { 3625 uhci_soft_qh_t *sqh; 3626 int i, npoll, s; 3627 u_int bestbw, bw, bestoffs, offs; 3628 3629 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3630 if (ival == 0) { 3631 printf("uhci_setintr: 0 interval\n"); 3632 return (USBD_INVAL); 3633 } 3634 3635 if (ival > UHCI_VFRAMELIST_COUNT) 3636 ival = UHCI_VFRAMELIST_COUNT; 3637 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3638 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3639 3640 upipe->u.intr.npoll = npoll; 3641 upipe->u.intr.qhs = 3642 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 3643 3644 /* 3645 * Figure out which offset in the schedule that has most 3646 * bandwidth left over. 3647 */ 3648 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3649 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3650 for (bw = i = 0; i < npoll; i++) 3651 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3652 if (bw < bestbw) { 3653 bestbw = bw; 3654 bestoffs = offs; 3655 } 3656 } 3657 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3658 3659 for(i = 0; i < npoll; i++) { 3660 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3661 sqh->elink = NULL; 3662 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3663 sqh->pos = MOD(i * ival + bestoffs); 3664 } 3665 #undef MOD 3666 3667 s = splusb(); 3668 /* Enter QHs into the controller data structures. */ 3669 for(i = 0; i < npoll; i++) 3670 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3671 splx(s); 3672 3673 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3674 return (USBD_NORMAL_COMPLETION); 3675 } 3676 3677 /* Open a new pipe. */ 3678 usbd_status 3679 uhci_open(usbd_pipe_handle pipe) 3680 { 3681 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3682 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3683 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3684 usbd_status err; 3685 int ival; 3686 3687 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3688 pipe, pipe->device->address, 3689 ed->bEndpointAddress, sc->sc_addr)); 3690 3691 upipe->aborting = 0; 3692 upipe->nexttoggle = pipe->endpoint->savedtoggle; 3693 3694 if (pipe->device->address == sc->sc_addr) { 3695 switch (ed->bEndpointAddress) { 3696 case USB_CONTROL_ENDPOINT: 3697 pipe->methods = &uhci_root_ctrl_methods; 3698 break; 3699 case UE_DIR_IN | UHCI_INTR_ENDPT: 3700 pipe->methods = &uhci_root_intr_methods; 3701 break; 3702 default: 3703 return (USBD_INVAL); 3704 } 3705 } else { 3706 switch (ed->bmAttributes & UE_XFERTYPE) { 3707 case UE_CONTROL: 3708 pipe->methods = &uhci_device_ctrl_methods; 3709 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3710 if (upipe->u.ctl.sqh == NULL) 3711 goto bad; 3712 upipe->u.ctl.setup = uhci_alloc_std_norsv(sc); 3713 if (upipe->u.ctl.setup == NULL) { 3714 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3715 goto bad; 3716 } 3717 upipe->u.ctl.stat = uhci_alloc_std_norsv(sc); 3718 if (upipe->u.ctl.stat == NULL) { 3719 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3720 uhci_free_std_norsv(sc, upipe->u.ctl.setup); 3721 goto bad; 3722 } 3723 err = usb_allocmem(&sc->sc_dmatag, 3724 sizeof(usb_device_request_t), 3725 0, &upipe->u.ctl.reqdma); 3726 if (err) { 3727 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3728 uhci_free_std_norsv(sc, upipe->u.ctl.setup); 3729 uhci_free_std_norsv(sc, upipe->u.ctl.stat); 3730 goto bad; 3731 } 3732 break; 3733 case UE_INTERRUPT: 3734 pipe->methods = &uhci_device_intr_methods; 3735 ival = pipe->interval; 3736 if (ival == USBD_DEFAULT_INTERVAL) 3737 ival = ed->bInterval; 3738 return (uhci_device_setintr(sc, upipe, ival)); 3739 case UE_ISOCHRONOUS: 3740 pipe->methods = &uhci_device_isoc_methods; 3741 return (uhci_setup_isoc(pipe)); 3742 case UE_BULK: 3743 pipe->methods = &uhci_device_bulk_methods; 3744 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3745 if (upipe->u.bulk.sqh == NULL) 3746 goto bad; 3747 break; 3748 } 3749 } 3750 return (USBD_NORMAL_COMPLETION); 3751 3752 bad: 3753 return (USBD_NOMEM); 3754 } 3755 3756 /* 3757 * Data structures and routines to emulate the root hub. 3758 */ 3759 const usb_device_descriptor_t uhci_devd = { 3760 USB_DEVICE_DESCRIPTOR_SIZE, 3761 UDESC_DEVICE, /* type */ 3762 {0x00, 0x01}, /* USB version */ 3763 UDCLASS_HUB, /* class */ 3764 UDSUBCLASS_HUB, /* subclass */ 3765 UDPROTO_FSHUB, /* protocol */ 3766 64, /* max packet */ 3767 {0},{0},{0x00,0x01}, /* device id */ 3768 1,2,0, /* string indicies */ 3769 1 /* # of configurations */ 3770 }; 3771 3772 const usb_config_descriptor_t uhci_confd = { 3773 USB_CONFIG_DESCRIPTOR_SIZE, 3774 UDESC_CONFIG, 3775 {USB_CONFIG_DESCRIPTOR_SIZE + 3776 USB_INTERFACE_DESCRIPTOR_SIZE + 3777 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3778 1, 3779 1, 3780 0, 3781 UC_ATTR_MBO | UC_SELF_POWERED, 3782 0 /* max power */ 3783 }; 3784 3785 const usb_interface_descriptor_t uhci_ifcd = { 3786 USB_INTERFACE_DESCRIPTOR_SIZE, 3787 UDESC_INTERFACE, 3788 0, 3789 0, 3790 1, 3791 UICLASS_HUB, 3792 UISUBCLASS_HUB, 3793 UIPROTO_FSHUB, 3794 0 3795 }; 3796 3797 const usb_endpoint_descriptor_t uhci_endpd = { 3798 USB_ENDPOINT_DESCRIPTOR_SIZE, 3799 UDESC_ENDPOINT, 3800 UE_DIR_IN | UHCI_INTR_ENDPT, 3801 UE_INTERRUPT, 3802 {8}, 3803 255 3804 }; 3805 3806 const usb_hub_descriptor_t uhci_hubd_piix = { 3807 USB_HUB_DESCRIPTOR_SIZE, 3808 UDESC_HUB, 3809 2, 3810 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3811 50, /* power on to power good */ 3812 0, 3813 { 0x00 }, /* both ports are removable */ 3814 { 0 }, 3815 }; 3816 3817 int 3818 uhci_str(usb_string_descriptor_t *p, int l, const char *s) 3819 { 3820 int i; 3821 3822 if (l == 0) 3823 return (0); 3824 p->bLength = 2 * strlen(s) + 2; 3825 if (l == 1) 3826 return (1); 3827 p->bDescriptorType = UDESC_STRING; 3828 l -= 2; 3829 for (i = 0; s[i] && l > 1; i++, l -= 2) 3830 USETW2(p->bString[i], 0, s[i]); 3831 return (2*i+2); 3832 } 3833 3834 /* 3835 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3836 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3837 * should not be used by the USB subsystem. As we cannot issue a 3838 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3839 * will be enabled as part of the reset. 3840 * 3841 * On the VT83C572, the port cannot be successfully enabled until the 3842 * outstanding "port enable change" and "connection status change" 3843 * events have been reset. 3844 */ 3845 Static usbd_status 3846 uhci_portreset(uhci_softc_t *sc, int index) 3847 { 3848 int lim, port, x; 3849 3850 if (index == 1) 3851 port = UHCI_PORTSC1; 3852 else if (index == 2) 3853 port = UHCI_PORTSC2; 3854 else 3855 return (USBD_IOERROR); 3856 3857 x = URWMASK(UREAD2(sc, port)); 3858 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3859 3860 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3861 3862 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3863 index, UREAD2(sc, port))); 3864 3865 x = URWMASK(UREAD2(sc, port)); 3866 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3867 3868 delay(100); 3869 3870 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3871 index, UREAD2(sc, port))); 3872 3873 x = URWMASK(UREAD2(sc, port)); 3874 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3875 3876 for (lim = 10; --lim > 0;) { 3877 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3878 3879 x = UREAD2(sc, port); 3880 3881 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3882 index, lim, x)); 3883 3884 if (!(x & UHCI_PORTSC_CCS)) { 3885 /* 3886 * No device is connected (or was disconnected 3887 * during reset). Consider the port reset. 3888 * The delay must be long enough to ensure on 3889 * the initial iteration that the device 3890 * connection will have been registered. 50ms 3891 * appears to be sufficient, but 20ms is not. 3892 */ 3893 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3894 index, lim)); 3895 break; 3896 } 3897 3898 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3899 /* 3900 * Port enabled changed and/or connection 3901 * status changed were set. Reset either or 3902 * both raised flags (by writing a 1 to that 3903 * bit), and wait again for state to settle. 3904 */ 3905 UWRITE2(sc, port, URWMASK(x) | 3906 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3907 continue; 3908 } 3909 3910 if (x & UHCI_PORTSC_PE) 3911 /* Port is enabled */ 3912 break; 3913 3914 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3915 } 3916 3917 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3918 index, UREAD2(sc, port))); 3919 3920 if (lim <= 0) { 3921 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3922 return (USBD_TIMEOUT); 3923 } 3924 3925 sc->sc_isreset = 1; 3926 return (USBD_NORMAL_COMPLETION); 3927 } 3928 3929 /* 3930 * Simulate a hardware hub by handling all the necessary requests. 3931 */ 3932 usbd_status 3933 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3934 { 3935 usbd_status err; 3936 3937 /* Insert last in queue. */ 3938 err = usb_insert_transfer(xfer); 3939 if (err) 3940 return (err); 3941 3942 /* 3943 * Pipe isn't running (otherwise err would be USBD_INPROG), 3944 * so start it first. 3945 */ 3946 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3947 } 3948 3949 usbd_status 3950 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3951 { 3952 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3953 usb_device_request_t *req; 3954 void *buf = NULL; 3955 int port, x; 3956 int s, len, value, index, status, change, l, totlen = 0; 3957 usb_port_status_t ps; 3958 usbd_status err; 3959 3960 if (sc->sc_dying) 3961 return (USBD_IOERROR); 3962 3963 #ifdef DIAGNOSTIC 3964 if (!(xfer->rqflags & URQ_REQUEST)) 3965 panic("uhci_root_ctrl_transfer: not a request"); 3966 #endif 3967 req = &xfer->request; 3968 3969 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3970 req->bmRequestType, req->bRequest)); 3971 3972 len = UGETW(req->wLength); 3973 value = UGETW(req->wValue); 3974 index = UGETW(req->wIndex); 3975 3976 if (len != 0) { 3977 /* mbuf transfer is not supported */ 3978 if (xfer->rqflags & URQ_DEV_MAP_MBUF) 3979 return (USBD_INVAL); 3980 buf = xfer->hcbuffer; 3981 } 3982 3983 #define C(x,y) ((x) | ((y) << 8)) 3984 switch(C(req->bRequest, req->bmRequestType)) { 3985 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3986 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3987 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3988 /* 3989 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3990 * for the integrated root hub. 3991 */ 3992 break; 3993 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3994 if (len > 0) { 3995 *(u_int8_t *)buf = sc->sc_conf; 3996 totlen = 1; 3997 } 3998 break; 3999 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 4000 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 4001 if (len == 0) 4002 break; 4003 switch(value >> 8) { 4004 case UDESC_DEVICE: 4005 if ((value & 0xff) != 0) { 4006 err = USBD_IOERROR; 4007 goto ret; 4008 } 4009 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 4010 memcpy(buf, &uhci_devd, l); 4011 USETW(((usb_device_descriptor_t *)buf)->idVendor, 4012 sc->sc_id_vendor); 4013 break; 4014 case UDESC_CONFIG: 4015 if ((value & 0xff) != 0) { 4016 err = USBD_IOERROR; 4017 goto ret; 4018 } 4019 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 4020 memcpy(buf, &uhci_confd, l); 4021 buf = (char *)buf + l; 4022 len -= l; 4023 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 4024 totlen += l; 4025 memcpy(buf, &uhci_ifcd, l); 4026 buf = (char *)buf + l; 4027 len -= l; 4028 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 4029 totlen += l; 4030 memcpy(buf, &uhci_endpd, l); 4031 break; 4032 case UDESC_STRING: 4033 *(u_int8_t *)buf = 0; 4034 totlen = 1; 4035 switch (value & 0xff) { 4036 case 0: /* Language table */ 4037 if (len > 0) 4038 *(u_int8_t *)buf = 4; 4039 if (len >= 4) { 4040 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 4041 totlen = 4; 4042 } 4043 break; 4044 case 1: /* Vendor */ 4045 totlen = uhci_str(buf, len, sc->sc_vendor); 4046 break; 4047 case 2: /* Product */ 4048 totlen = uhci_str(buf, len, "UHCI root hub"); 4049 break; 4050 } 4051 break; 4052 default: 4053 err = USBD_IOERROR; 4054 goto ret; 4055 } 4056 break; 4057 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 4058 if (len > 0) { 4059 *(u_int8_t *)buf = 0; 4060 totlen = 1; 4061 } 4062 break; 4063 case C(UR_GET_STATUS, UT_READ_DEVICE): 4064 if (len > 1) { 4065 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 4066 totlen = 2; 4067 } 4068 break; 4069 case C(UR_GET_STATUS, UT_READ_INTERFACE): 4070 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 4071 if (len > 1) { 4072 USETW(((usb_status_t *)buf)->wStatus, 0); 4073 totlen = 2; 4074 } 4075 break; 4076 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 4077 if (value >= USB_MAX_DEVICES) { 4078 err = USBD_IOERROR; 4079 goto ret; 4080 } 4081 sc->sc_addr = value; 4082 break; 4083 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 4084 if (value != 0 && value != 1) { 4085 err = USBD_IOERROR; 4086 goto ret; 4087 } 4088 sc->sc_conf = value; 4089 break; 4090 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 4091 break; 4092 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 4093 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 4094 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 4095 err = USBD_IOERROR; 4096 goto ret; 4097 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 4098 break; 4099 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 4100 break; 4101 /* Hub requests */ 4102 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 4103 break; 4104 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 4105 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 4106 "port=%d feature=%d\n", 4107 index, value)); 4108 if (index == 1) 4109 port = UHCI_PORTSC1; 4110 else if (index == 2) 4111 port = UHCI_PORTSC2; 4112 else { 4113 err = USBD_IOERROR; 4114 goto ret; 4115 } 4116 switch(value) { 4117 case UHF_PORT_ENABLE: 4118 x = URWMASK(UREAD2(sc, port)); 4119 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 4120 break; 4121 case UHF_PORT_SUSPEND: 4122 x = URWMASK(UREAD2(sc, port)); 4123 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 4124 break; 4125 case UHF_PORT_RESET: 4126 x = URWMASK(UREAD2(sc, port)); 4127 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 4128 break; 4129 case UHF_C_PORT_CONNECTION: 4130 x = URWMASK(UREAD2(sc, port)); 4131 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 4132 break; 4133 case UHF_C_PORT_ENABLE: 4134 x = URWMASK(UREAD2(sc, port)); 4135 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 4136 break; 4137 case UHF_C_PORT_OVER_CURRENT: 4138 x = URWMASK(UREAD2(sc, port)); 4139 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 4140 break; 4141 case UHF_C_PORT_RESET: 4142 sc->sc_isreset = 0; 4143 err = USBD_NORMAL_COMPLETION; 4144 goto ret; 4145 case UHF_PORT_CONNECTION: 4146 case UHF_PORT_OVER_CURRENT: 4147 case UHF_PORT_POWER: 4148 case UHF_PORT_LOW_SPEED: 4149 case UHF_C_PORT_SUSPEND: 4150 default: 4151 err = USBD_IOERROR; 4152 goto ret; 4153 } 4154 break; 4155 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 4156 if (index == 1) 4157 port = UHCI_PORTSC1; 4158 else if (index == 2) 4159 port = UHCI_PORTSC2; 4160 else { 4161 err = USBD_IOERROR; 4162 goto ret; 4163 } 4164 if (len > 0) { 4165 *(u_int8_t *)buf = 4166 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 4167 UHCI_PORTSC_LS_SHIFT; 4168 totlen = 1; 4169 } 4170 break; 4171 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 4172 if (len == 0) 4173 break; 4174 if ((value & 0xff) != 0) { 4175 err = USBD_IOERROR; 4176 goto ret; 4177 } 4178 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 4179 totlen = l; 4180 memcpy(buf, &uhci_hubd_piix, l); 4181 break; 4182 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 4183 if (len != 4) { 4184 err = USBD_IOERROR; 4185 goto ret; 4186 } 4187 memset(buf, 0, len); 4188 totlen = len; 4189 break; 4190 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 4191 if (index == 1) 4192 port = UHCI_PORTSC1; 4193 else if (index == 2) 4194 port = UHCI_PORTSC2; 4195 else { 4196 err = USBD_IOERROR; 4197 goto ret; 4198 } 4199 if (len != 4) { 4200 err = USBD_IOERROR; 4201 goto ret; 4202 } 4203 x = UREAD2(sc, port); 4204 status = change = 0; 4205 if (x & UHCI_PORTSC_CCS) 4206 status |= UPS_CURRENT_CONNECT_STATUS; 4207 if (x & UHCI_PORTSC_CSC) 4208 change |= UPS_C_CONNECT_STATUS; 4209 if (x & UHCI_PORTSC_PE) 4210 status |= UPS_PORT_ENABLED; 4211 if (x & UHCI_PORTSC_POEDC) 4212 change |= UPS_C_PORT_ENABLED; 4213 if (x & UHCI_PORTSC_OCI) 4214 status |= UPS_OVERCURRENT_INDICATOR; 4215 if (x & UHCI_PORTSC_OCIC) 4216 change |= UPS_C_OVERCURRENT_INDICATOR; 4217 if (x & UHCI_PORTSC_SUSP) 4218 status |= UPS_SUSPEND; 4219 if (x & UHCI_PORTSC_LSDA) 4220 status |= UPS_LOW_SPEED; 4221 status |= UPS_PORT_POWER; 4222 if (sc->sc_isreset) 4223 change |= UPS_C_PORT_RESET; 4224 USETW(ps.wPortStatus, status); 4225 USETW(ps.wPortChange, change); 4226 l = min(len, sizeof ps); 4227 memcpy(buf, &ps, l); 4228 totlen = l; 4229 break; 4230 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 4231 err = USBD_IOERROR; 4232 goto ret; 4233 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 4234 break; 4235 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 4236 if (index == 1) 4237 port = UHCI_PORTSC1; 4238 else if (index == 2) 4239 port = UHCI_PORTSC2; 4240 else { 4241 err = USBD_IOERROR; 4242 goto ret; 4243 } 4244 switch(value) { 4245 case UHF_PORT_ENABLE: 4246 x = URWMASK(UREAD2(sc, port)); 4247 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 4248 break; 4249 case UHF_PORT_SUSPEND: 4250 x = URWMASK(UREAD2(sc, port)); 4251 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 4252 break; 4253 case UHF_PORT_RESET: 4254 err = uhci_portreset(sc, index); 4255 goto ret; 4256 case UHF_PORT_POWER: 4257 /* Pretend we turned on power */ 4258 err = USBD_NORMAL_COMPLETION; 4259 goto ret; 4260 case UHF_C_PORT_CONNECTION: 4261 case UHF_C_PORT_ENABLE: 4262 case UHF_C_PORT_OVER_CURRENT: 4263 case UHF_PORT_CONNECTION: 4264 case UHF_PORT_OVER_CURRENT: 4265 case UHF_PORT_LOW_SPEED: 4266 case UHF_C_PORT_SUSPEND: 4267 case UHF_C_PORT_RESET: 4268 default: 4269 err = USBD_IOERROR; 4270 goto ret; 4271 } 4272 break; 4273 default: 4274 err = USBD_IOERROR; 4275 goto ret; 4276 } 4277 xfer->actlen = totlen; 4278 err = USBD_NORMAL_COMPLETION; 4279 ret: 4280 xfer->status = err; 4281 s = splusb(); 4282 uhci_transfer_complete(xfer); 4283 splx(s); 4284 return (USBD_IN_PROGRESS); 4285 } 4286 4287 /* Abort a root control request. */ 4288 void 4289 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 4290 { 4291 /* Nothing to do, all transfers are synchronous. */ 4292 } 4293 4294 /* Close the root pipe. */ 4295 void 4296 uhci_root_ctrl_close(usbd_pipe_handle pipe) 4297 { 4298 DPRINTF(("uhci_root_ctrl_close\n")); 4299 } 4300 4301 /* Abort a root interrupt request. */ 4302 void 4303 uhci_root_intr_abort(usbd_xfer_handle xfer) 4304 { 4305 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 4306 4307 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer); 4308 sc->sc_intr_xfer = NULL; 4309 4310 if (xfer->pipe->intrxfer == xfer) { 4311 DPRINTF(("uhci_root_intr_abort: remove\n")); 4312 xfer->pipe->intrxfer = 0; 4313 } 4314 xfer->status = USBD_CANCELLED; 4315 #ifdef DIAGNOSTIC 4316 UXFER(xfer)->iinfo.isdone = 1; 4317 #endif 4318 uhci_transfer_complete(xfer); 4319 } 4320 4321 usbd_status 4322 uhci_root_intr_transfer(usbd_xfer_handle xfer) 4323 { 4324 usbd_status err; 4325 4326 /* Insert last in queue. */ 4327 err = usb_insert_transfer(xfer); 4328 if (err) 4329 return (err); 4330 4331 /* 4332 * Pipe isn't running (otherwise err would be USBD_INPROG), 4333 * so start it first. 4334 */ 4335 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 4336 } 4337 4338 /* Start a transfer on the root interrupt pipe */ 4339 usbd_status 4340 uhci_root_intr_start(usbd_xfer_handle xfer) 4341 { 4342 usbd_pipe_handle pipe = xfer->pipe; 4343 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 4344 4345 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 4346 xfer, xfer->length, xfer->flags)); 4347 4348 if (sc->sc_dying) 4349 return (USBD_IOERROR); 4350 4351 if (xfer->rqflags & URQ_DEV_MAP_MBUF) 4352 return (USBD_INVAL); /* mbuf transfer is not supported */ 4353 4354 sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval); 4355 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 4356 sc->sc_intr_xfer = xfer; 4357 return (USBD_IN_PROGRESS); 4358 } 4359 4360 /* Close the root interrupt pipe. */ 4361 void 4362 uhci_root_intr_close(usbd_pipe_handle pipe) 4363 { 4364 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 4365 4366 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer); 4367 sc->sc_intr_xfer = NULL; 4368 DPRINTF(("uhci_root_intr_close\n")); 4369 } 4370
Indexes created Tue Sep 30 17:09:57 GMT 2025