uhci.c revision 1.208.12.5
1 /* $NetBSD: uhci.c,v 1.208.12.5 2007/06/22 10:49:45 itohy Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.172 2006/10/19 01:15:58 iedowse Exp $ */ 3 4 /*- 5 * Copyright (c) 1998, 2004, 2007 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Universal Host Controller driver. 43 * Handles e.g. PIIX3 and PIIX4. 44 * 45 * UHCI spec: http://developer.intel.com/technology/usb/uhci11d.htm 46 * USB spec: http://www.usb.org/developers/docs/ 47 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 48 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 49 */ 50 51 #include <sys/cdefs.h> 52 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.208.12.5 2007/06/22 10:49:45 itohy Exp $"); 53 /* __FBSDID("$FreeBSD: src/sys/dev/usb/uhci.c,v 1.172 2006/10/19 01:15:58 iedowse Exp $"); */ 54 55 #include <sys/param.h> 56 #include <sys/systm.h> 57 #include <sys/kernel.h> 58 #include <sys/malloc.h> 59 #include <sys/mbuf.h> 60 #if defined(__NetBSD__) || defined(__OpenBSD__) 61 #include <sys/device.h> 62 #include <sys/select.h> 63 #include <sys/extent.h> 64 #include <uvm/uvm_extern.h> 65 #elif defined(__FreeBSD__) 66 #include <sys/endian.h> 67 #include <sys/module.h> 68 #include <sys/bus.h> 69 #include <sys/sysctl.h> 70 #if defined(DIAGNOSTIC) && defined(__i386__) 71 #include <machine/cpu.h> 72 #endif 73 #endif 74 #include <sys/proc.h> 75 #include <sys/queue.h> 76 77 #include <machine/bus.h> 78 #include <machine/endian.h> 79 80 #include <dev/usb/usb.h> 81 #include <dev/usb/usbdi.h> 82 #include <dev/usb/usbdivar.h> 83 #include <dev/usb/usb_mem.h> 84 #include <dev/usb/usb_quirks.h> 85 86 #include <dev/usb/uhcireg.h> 87 #include <dev/usb/uhcivar.h> 88 89 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 90 /*#define UHCI_CTL_LOOP */ 91 92 #if defined(__FreeBSD__) 93 94 #define delay(d) DELAY(d) 95 #endif 96 97 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 98 99 #if defined(__OpenBSD__) 100 struct cfdriver uhci_cd = { 101 NULL, "uhci", DV_DULL 102 }; 103 #endif 104 105 #ifdef USB_DEBUG 106 uhci_softc_t *thesc; 107 #define DPRINTF(x) if (uhcidebug) printf x 108 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 109 int uhcidebug = 0; 110 int uhcinoloop = 0; 111 #ifdef __FreeBSD__ 112 SYSCTL_NODE(_hw_usb, OID_AUTO, uhci, CTLFLAG_RW, 0, "USB uhci"); 113 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, debug, CTLFLAG_RW, 114 &uhcidebug, 0, "uhci debug level"); 115 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, loop, CTLFLAG_RW, 116 &uhcinoloop, 0, "uhci noloop"); 117 #endif 118 #ifndef __NetBSD__ 119 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 120 #endif 121 #else 122 #define DPRINTF(x) 123 #define DPRINTFN(n,x) 124 #endif 125 126 /* 127 * The UHCI controller is little endian, so on big endian machines 128 * the data stored in memory needs to be swapped. 129 */ 130 #if defined(__OpenBSD__) 131 #if BYTE_ORDER == BIG_ENDIAN 132 #define htole32(x) (bswap32(x)) 133 #define le32toh(x) (bswap32(x)) 134 #else 135 #define htole32(x) (x) 136 #define le32toh(x) (x) 137 #endif 138 #endif 139 140 struct uhci_pipe { 141 struct usbd_pipe pipe; 142 int nexttoggle; 143 144 u_char aborting; 145 usbd_xfer_handle abortstart, abortend; 146 147 /* Info needed for different pipe kinds. */ 148 union { 149 /* Control pipe */ 150 struct { 151 uhci_soft_qh_t *sqh; 152 usb_dma_t reqdma; 153 uhci_soft_td_t *setup, *stat; 154 u_int length; 155 } ctl; 156 /* Interrupt pipe */ 157 struct { 158 int npoll; 159 int isread; 160 uhci_soft_qh_t **qhs; 161 } intr; 162 /* Bulk pipe */ 163 struct { 164 uhci_soft_qh_t *sqh; 165 u_int length; 166 int isread; 167 } bulk; 168 /* Iso pipe */ 169 struct iso { 170 uhci_soft_td_t **stds; 171 int next, inuse; 172 } iso; 173 } u; 174 }; 175 176 Static void uhci_globalreset(uhci_softc_t *); 177 Static usbd_status uhci_portreset(uhci_softc_t*, int); 178 Static void uhci_reset(uhci_softc_t *); 179 Static usbd_status uhci_run(uhci_softc_t *, int run); 180 Static usbd_status uhci_grow_std(uhci_softc_t *); 181 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 182 Static uhci_soft_td_t *uhci_alloc_std_norsv(uhci_softc_t *); 183 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 184 Static void uhci_free_std_norsv(uhci_softc_t *, uhci_soft_td_t *); 185 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 186 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 187 Static void uhci_free_desc_chunks(uhci_softc_t *, 188 struct uhci_mdescs *); 189 190 Static void uhci_bufptr_init(union uhci_bufptr *, 191 struct uhci_xfer *); 192 Static void uhci_bufptr_advance(union uhci_bufptr *, int len, 193 int is_mbuf); 194 Static void uhci_bufptr_wr(const union uhci_bufptr *, void *, 195 int len, int is_mbuf); 196 Static void uhci_bufptr_rd(const union uhci_bufptr *p, 197 const void *, int len, int is_mbuf); 198 199 Static void uhci_aux_mem_init(struct uhci_aux_mem *); 200 Static usbd_status uhci_aux_mem_alloc(uhci_softc_t *, 201 struct uhci_aux_mem *, 202 int /*naux*/, int /*maxp*/); 203 Static void uhci_aux_mem_free(uhci_softc_t *, 204 struct uhci_aux_mem *); 205 Static void uhci_aux_dma_alloc(uhci_soft_td_t *, 206 struct uhci_aux_mem *, const union uhci_bufptr *, 207 int); 208 Static void uhci_aux_dma_prepare(uhci_soft_td_t *, int /*is_mbuf*/, 209 int /*isread*/); 210 Static void uhci_aux_dma_complete(uhci_soft_td_t *, 211 struct uhci_aux_mem *, int /*is_mbuf*/, 212 int /*isread*/); 213 Static void uhci_aux_dma_sync(uhci_softc_t *, 214 struct uhci_aux_mem *, int /*op*/); 215 #if 0 216 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 217 uhci_intr_info_t *); 218 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 219 #endif 220 221 Static void uhci_free_std_chain(uhci_softc_t *, 222 uhci_soft_td_t *, uhci_soft_td_t *); 223 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 224 uhci_softc_t *, int, int, u_int16_t, 225 usbd_xfer_handle xfer, 226 uhci_soft_td_t **, uhci_soft_td_t **); 227 Static void uhci_poll_hub(void *); 228 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 229 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 230 Static void uhci_idone(uhci_intr_info_t *); 231 232 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 233 Static void uhci_transfer_complete(usbd_xfer_handle xfer); 234 235 Static void uhci_timeout(void *); 236 Static void uhci_timeout_task(void *); 237 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 238 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 239 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 240 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 241 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 242 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 243 Static int uhci_str(usb_string_descriptor_t *, int, const char *); 244 Static void uhci_add_loop(uhci_softc_t *sc); 245 Static void uhci_rem_loop(uhci_softc_t *sc); 246 247 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 248 Static void uhci_device_isoc_enter(usbd_xfer_handle); 249 250 Static usbd_status uhci_prealloc(struct uhci_softc *, 251 struct uhci_xfer *, size_t /*bufsize*/, 252 int /*nseg*/); 253 Static usbd_status uhci_allocm(struct usbd_bus *, usbd_xfer_handle, 254 void *, size_t); 255 Static void uhci_freem(struct usbd_bus *, usbd_xfer_handle, 256 enum usbd_waitflg); 257 258 Static usbd_status uhci_map_alloc(usbd_xfer_handle); 259 Static void uhci_map_free(usbd_xfer_handle); 260 Static void uhci_mapm(usbd_xfer_handle, void *, size_t); 261 Static usbd_status uhci_mapm_mbuf(usbd_xfer_handle, struct mbuf *); 262 Static void uhci_unmapm(usbd_xfer_handle); 263 264 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *, usbd_pipe_handle, 265 enum usbd_waitflg); 266 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 267 268 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 269 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 270 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 271 Static void uhci_device_ctrl_close(usbd_pipe_handle); 272 Static void uhci_device_ctrl_done(usbd_xfer_handle); 273 274 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 275 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 276 Static void uhci_device_intr_abort(usbd_xfer_handle); 277 Static void uhci_device_intr_close(usbd_pipe_handle); 278 Static void uhci_device_intr_done(usbd_xfer_handle); 279 280 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 281 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 282 Static void uhci_device_bulk_abort(usbd_xfer_handle); 283 Static void uhci_device_bulk_close(usbd_pipe_handle); 284 Static void uhci_device_bulk_done(usbd_xfer_handle); 285 286 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 287 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 288 Static void uhci_device_isoc_abort(usbd_xfer_handle); 289 Static void uhci_device_isoc_close(usbd_pipe_handle); 290 Static void uhci_device_isoc_done(usbd_xfer_handle); 291 292 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 293 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 294 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 295 Static void uhci_root_ctrl_close(usbd_pipe_handle); 296 Static void uhci_root_ctrl_done(usbd_xfer_handle); 297 298 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 299 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 300 Static void uhci_root_intr_abort(usbd_xfer_handle); 301 Static void uhci_root_intr_close(usbd_pipe_handle); 302 Static void uhci_root_intr_done(usbd_xfer_handle); 303 304 Static usbd_status uhci_open(usbd_pipe_handle); 305 Static void uhci_poll(struct usbd_bus *); 306 Static void uhci_softintr(void *); 307 308 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 309 310 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 311 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 312 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 313 struct uhci_pipe *pipe, int ival); 314 315 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 316 Static void uhci_noop(usbd_pipe_handle pipe); 317 318 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 319 uhci_soft_qh_t *); 320 321 #ifdef USB_DEBUG 322 Static void uhci_dump_all(uhci_softc_t *); 323 Static void uhci_dumpregs(uhci_softc_t *); 324 Static void uhci_dump_qhs(uhci_soft_qh_t *); 325 Static void uhci_dump_qh(uhci_soft_qh_t *); 326 Static void uhci_dump_tds(uhci_soft_td_t *); 327 Static void uhci_dump_td(uhci_soft_td_t *); 328 Static void uhci_dump_ii(uhci_intr_info_t *ii); 329 void uhci_dump(void); 330 #endif 331 332 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 333 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 334 #define UWRITE1(sc, r, x) \ 335 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 336 } while (/*CONSTCOND*/0) 337 #define UWRITE2(sc, r, x) \ 338 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 339 } while (/*CONSTCOND*/0) 340 #define UWRITE4(sc, r, x) \ 341 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 342 } while (/*CONSTCOND*/0) 343 static __inline uint8_t 344 UREAD1(uhci_softc_t *sc, bus_size_t r) 345 { 346 347 UBARR(sc); 348 return bus_space_read_1(sc->iot, sc->ioh, r); 349 } 350 351 static __inline uint16_t 352 UREAD2(uhci_softc_t *sc, bus_size_t r) 353 { 354 355 UBARR(sc); 356 return bus_space_read_2(sc->iot, sc->ioh, r); 357 } 358 359 static __inline uint32_t 360 UREAD4(uhci_softc_t *sc, bus_size_t r) 361 { 362 363 UBARR(sc); 364 return bus_space_read_4(sc->iot, sc->ioh, r); 365 } 366 367 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 368 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 369 370 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 371 372 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 373 374 #define UHCI_INTR_ENDPT 1 375 376 const struct usbd_bus_methods uhci_bus_methods = { 377 uhci_open, 378 uhci_softintr, 379 uhci_poll, 380 uhci_allocm, 381 uhci_freem, 382 uhci_map_alloc, 383 uhci_map_free, 384 uhci_mapm, 385 uhci_mapm_mbuf, 386 uhci_unmapm, 387 uhci_allocx, 388 uhci_freex, 389 }; 390 391 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 392 uhci_root_ctrl_transfer, 393 uhci_root_ctrl_start, 394 uhci_root_ctrl_abort, 395 uhci_root_ctrl_close, 396 uhci_noop, 397 uhci_root_ctrl_done, 398 }; 399 400 const struct usbd_pipe_methods uhci_root_intr_methods = { 401 uhci_root_intr_transfer, 402 uhci_root_intr_start, 403 uhci_root_intr_abort, 404 uhci_root_intr_close, 405 uhci_noop, 406 uhci_root_intr_done, 407 }; 408 409 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 410 uhci_device_ctrl_transfer, 411 uhci_device_ctrl_start, 412 uhci_device_ctrl_abort, 413 uhci_device_ctrl_close, 414 uhci_noop, 415 uhci_device_ctrl_done, 416 }; 417 418 const struct usbd_pipe_methods uhci_device_intr_methods = { 419 uhci_device_intr_transfer, 420 uhci_device_intr_start, 421 uhci_device_intr_abort, 422 uhci_device_intr_close, 423 uhci_device_clear_toggle, 424 uhci_device_intr_done, 425 }; 426 427 const struct usbd_pipe_methods uhci_device_bulk_methods = { 428 uhci_device_bulk_transfer, 429 uhci_device_bulk_start, 430 uhci_device_bulk_abort, 431 uhci_device_bulk_close, 432 uhci_device_clear_toggle, 433 uhci_device_bulk_done, 434 }; 435 436 const struct usbd_pipe_methods uhci_device_isoc_methods = { 437 uhci_device_isoc_transfer, 438 uhci_device_isoc_start, 439 uhci_device_isoc_abort, 440 uhci_device_isoc_close, 441 uhci_noop, 442 uhci_device_isoc_done, 443 }; 444 445 #define uhci_add_intr_info(sc, ii) \ 446 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 447 #define uhci_del_intr_info(ii) \ 448 do { \ 449 LIST_REMOVE((ii), list); \ 450 (ii)->list.le_prev = NULL; \ 451 } while (0) 452 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 453 454 Static inline uhci_soft_qh_t * 455 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 456 { 457 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 458 459 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 460 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 461 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 462 printf("uhci_find_prev_qh: QH not found\n"); 463 return (NULL); 464 } 465 #endif 466 } 467 return (pqh); 468 } 469 470 void 471 uhci_globalreset(uhci_softc_t *sc) 472 { 473 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 474 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 475 UHCICMD(sc, 0); /* do nothing */ 476 } 477 478 usbd_status 479 uhci_init(uhci_softc_t *sc) 480 { 481 usbd_status err; 482 int i, j; 483 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 484 uhci_soft_td_t *std; 485 486 DPRINTFN(1,("uhci_init: start\n")); 487 488 #ifdef USB_DEBUG 489 thesc = sc; 490 491 if (uhcidebug > 2) 492 uhci_dumpregs(sc); 493 #endif 494 495 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 496 uhci_globalreset(sc); /* reset the controller */ 497 uhci_reset(sc); 498 499 usb_dma_tag_init(&sc->sc_dmatag); 500 501 /* Allocate and initialize real frame array. */ 502 err = usb_allocmem(&sc->sc_dmatag, 503 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 504 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 505 if (err) 506 return (err); 507 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 508 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 509 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 510 511 /* 512 * Allocate a TD, inactive, that hangs from the last QH. 513 * This is to avoid a bug in the PIIX that makes it run berserk 514 * otherwise. 515 */ 516 std = uhci_alloc_std_norsv(sc); 517 if (std == NULL) 518 return (USBD_NOMEM); 519 std->link.std = NULL; 520 std->td.td_link = htole32(UHCI_PTR_T); 521 std->td.td_status = htole32(0); /* inactive */ 522 std->td.td_token = htole32(0); 523 std->td.td_buffer = htole32(0); 524 UHCI_STD_SYNC(sc, std, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 525 526 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 527 lsqh = uhci_alloc_sqh(sc); 528 if (lsqh == NULL) 529 return (USBD_NOMEM); 530 lsqh->hlink = NULL; 531 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 532 lsqh->elink = std; 533 lsqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(std) | UHCI_PTR_TD); 534 UHCI_SQH_SYNC(sc, lsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 535 sc->sc_last_qh = lsqh; 536 537 /* Allocate the dummy QH where bulk traffic will be queued. */ 538 bsqh = uhci_alloc_sqh(sc); 539 if (bsqh == NULL) 540 return (USBD_NOMEM); 541 bsqh->hlink = lsqh; 542 bsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(lsqh) | UHCI_PTR_QH); 543 bsqh->elink = NULL; 544 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 545 UHCI_SQH_SYNC(sc, bsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 546 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 547 548 /* Allocate dummy QH where high speed control traffic will be queued. */ 549 chsqh = uhci_alloc_sqh(sc); 550 if (chsqh == NULL) 551 return (USBD_NOMEM); 552 chsqh->hlink = bsqh; 553 chsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(bsqh) | UHCI_PTR_QH); 554 chsqh->elink = NULL; 555 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 556 UHCI_SQH_SYNC(sc, chsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 557 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 558 559 /* Allocate dummy QH where control traffic will be queued. */ 560 clsqh = uhci_alloc_sqh(sc); 561 if (clsqh == NULL) 562 return (USBD_NOMEM); 563 clsqh->hlink = chsqh; 564 clsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(chsqh) | UHCI_PTR_QH); 565 clsqh->elink = NULL; 566 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 567 UHCI_SQH_SYNC(sc, clsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 568 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 569 570 /* 571 * Make all (virtual) frame list pointers point to the interrupt 572 * queue heads and the interrupt queue heads at the control 573 * queue head and point the physical frame list to the virtual. 574 */ 575 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 576 std = uhci_alloc_std_norsv(sc); 577 sqh = uhci_alloc_sqh(sc); 578 if (std == NULL || sqh == NULL) { 579 if (std) 580 uhci_free_std_norsv(sc, std); 581 /* XXX free resources */ 582 return (USBD_NOMEM); 583 } 584 std->link.sqh = sqh; 585 std->td.td_link = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH); 586 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 587 std->td.td_token = htole32(0); 588 std->td.td_buffer = htole32(0); 589 UHCI_STD_SYNC(sc, std, 590 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 591 sqh->hlink = clsqh; 592 sqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(clsqh) | UHCI_PTR_QH); 593 sqh->elink = NULL; 594 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 595 UHCI_SQH_SYNC(sc, sqh, 596 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 597 sc->sc_vframes[i].htd = std; 598 sc->sc_vframes[i].etd = std; 599 sc->sc_vframes[i].hqh = sqh; 600 sc->sc_vframes[i].eqh = sqh; 601 for (j = i; 602 j < UHCI_FRAMELIST_COUNT; 603 j += UHCI_VFRAMELIST_COUNT) 604 sc->sc_pframes[j] = htole32(UHCI_STD_DMAADDR(std)); 605 } 606 607 LIST_INIT(&sc->sc_intrhead); 608 609 SIMPLEQ_INIT(&sc->sc_free_xfers); 610 611 usb_callout_init(sc->sc_poll_handle); 612 613 /* Set up the bus struct. */ 614 sc->sc_bus.methods = &uhci_bus_methods; 615 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 616 617 sc->sc_suspend = PWR_RESUME; 618 #if defined(__NetBSD__) || defined(__OpenBSD__) 619 sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev), 620 uhci_power, sc); 621 sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc); 622 #endif 623 624 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 625 626 DPRINTFN(1,("uhci_init: enabling\n")); 627 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 628 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 629 630 return (uhci_run(sc, 1)); /* and here we go... */ 631 } 632 633 #if defined(__NetBSD__) || defined(__OpenBSD__) 634 int 635 uhci_activate(device_t self, enum devact act) 636 { 637 struct uhci_softc *sc = (struct uhci_softc *)self; 638 int rv = 0; 639 640 switch (act) { 641 case DVACT_ACTIVATE: 642 return (EOPNOTSUPP); 643 644 case DVACT_DEACTIVATE: 645 if (sc->sc_child != NULL) 646 rv = config_deactivate(sc->sc_child); 647 break; 648 } 649 return (rv); 650 } 651 #endif 652 653 int 654 uhci_detach(struct uhci_softc *sc, int flags) 655 { 656 usbd_xfer_handle xfer; 657 int rv = 0; 658 659 #if defined(__NetBSD__) || defined(__OpenBSD__) 660 if (sc->sc_child != NULL) 661 rv = config_detach(sc->sc_child, flags); 662 663 if (rv != 0) 664 return (rv); 665 #else 666 sc->sc_dying = 1; 667 #endif 668 669 #if defined(__NetBSD__) || defined(__OpenBSD__) 670 /* Don't touch hardware if it has already been gone. */ 671 if ((flags & DETACH_FORCE) == 0) 672 #endif 673 { 674 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 675 uhci_run(sc, 0); 676 } 677 678 #if defined(__NetBSD__) || defined(__OpenBSD__) 679 powerhook_disestablish(sc->sc_powerhook); 680 shutdownhook_disestablish(sc->sc_shutdownhook); 681 #endif 682 683 /* Free all xfers associated with this HC. */ 684 while ((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) == NULL) { 685 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 686 usb_clean_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf); 687 free(xfer, M_USB); 688 } 689 690 /* XXX free other data structures XXX */ 691 usb_freemem(&sc->sc_dmatag, &sc->sc_dma); 692 693 uhci_free_desc_chunks(sc, &sc->sc_std_chunks); 694 uhci_free_desc_chunks(sc, &sc->sc_sqh_chunks); 695 usb_dma_tag_finish(&sc->sc_dmatag); 696 697 return (rv); 698 } 699 700 Static usbd_status 701 uhci_prealloc(struct uhci_softc *sc, struct uhci_xfer *uxfer, 702 size_t bufsize, int nseg) 703 { 704 struct usbd_pipe *pipe; 705 int maxp, ntd, naux; 706 int s; 707 int err; 708 709 pipe = uxfer->xfer.pipe; 710 maxp = UE_MAXPKTSZ(pipe->endpoint->edesc); 711 712 if (maxp == 0 || maxp > UHCI_MAX_PKT_SIZE) 713 return (USBD_INVAL); 714 715 /* estimate needed number of TDs */ 716 if ((pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) == 717 UE_ISOCHRONOUS) { 718 /* isochronous: TDs are allocated when uhci_open() is called */ 719 ntd = 0; 720 } else { 721 /* UHCI: one TD per packet */ 722 ntd = (bufsize + maxp - 1) / maxp; 723 } 724 725 /* estimate needed aux segments */ 726 naux = nseg - 1; 727 728 /* pre-allocate aux memory */ 729 err = uhci_aux_mem_alloc(sc, &uxfer->aux, naux, maxp); 730 if (err) 731 return err; 732 733 s = splusb(); 734 /* pre-allocate TDs */ 735 while (sc->sc_nfreetds < ntd) { 736 DPRINTF(("%s: uhci_prealloc: need %d TD (%d cur)\n", 737 USBDEVNAME(sc->sc_bus.bdev), 738 ntd, sc->sc_nfreetds)); 739 if ((err = uhci_grow_std(sc)) != USBD_NORMAL_COMPLETION) 740 break; 741 } 742 if (!err) { 743 sc->sc_nfreetds -= ntd; 744 uxfer->rsvd_tds = ntd; 745 } 746 splx(s); 747 748 if (err) 749 uhci_aux_mem_free(sc, &uxfer->aux); 750 751 return err; 752 } 753 754 usbd_status 755 uhci_allocm(struct usbd_bus *bus, usbd_xfer_handle xfer, void *buf, size_t size) 756 { 757 struct uhci_softc *sc = (struct uhci_softc *)bus; 758 struct uhci_xfer *uxfer = UXFER(xfer); 759 usbd_status err; 760 761 if ((err = usb_alloc_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf, 762 buf, size, &xfer->hcbuffer)) == USBD_NORMAL_COMPLETION) { 763 if ((xfer->rqflags & URQ_DEV_MAP_PREPARED) == 0 && 764 (err = uhci_prealloc(sc, uxfer, size, 765 USB_BUFFER_NSEGS(&uxfer->dmabuf))) 766 != USBD_NORMAL_COMPLETION) { 767 usb_free_buffer_dma(&sc->sc_dmatag, &uxfer->dmabuf, 768 U_WAITOK); 769 } 770 } 771 772 return err; 773 } 774 775 void 776 uhci_freem(struct usbd_bus *bus, usbd_xfer_handle xfer, 777 enum usbd_waitflg waitflg) 778 { 779 struct uhci_softc *sc = (struct uhci_softc *)bus; 780 struct uhci_xfer *uxfer = UXFER(xfer); 781 int s; 782 783 usb_free_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf, waitflg); 784 785 if ((xfer->rqflags & URQ_DEV_MAP_PREPARED) == 0) { 786 s = splusb(); 787 sc->sc_nfreetds += uxfer->rsvd_tds; 788 splx(s); 789 uxfer->rsvd_tds = 0; 790 uhci_aux_mem_free(sc, &uxfer->aux); 791 } 792 } 793 794 Static usbd_status 795 uhci_map_alloc(usbd_xfer_handle xfer) 796 { 797 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 798 struct uhci_xfer *uxfer = UXFER(xfer); 799 usbd_status st; 800 801 st = usb_alloc_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf); 802 if (st) 803 return st; 804 805 if ((st = uhci_prealloc(sc, uxfer, MAXPHYS, USB_DMA_NSEG))) { 806 usb_free_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf); 807 } 808 809 return st; 810 } 811 812 Static void 813 uhci_map_free(usbd_xfer_handle xfer) 814 { 815 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 816 struct uhci_xfer *uxfer = UXFER(xfer); 817 int s; 818 819 USB_KASSERT(xfer->rqflags & URQ_DEV_MAP_PREPARED); 820 821 usb_free_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf); 822 823 uhci_aux_mem_free(sc, &uxfer->aux); 824 s = splusb(); 825 sc->sc_nfreetds += uxfer->rsvd_tds; 826 splx(s); 827 uxfer->rsvd_tds = 0; 828 } 829 830 Static void 831 uhci_mapm(usbd_xfer_handle xfer, void *buf, size_t size) 832 { 833 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 834 struct uhci_xfer *uxfer = UXFER(xfer); 835 836 usb_map_dma(&sc->sc_dmatag, &uxfer->dmabuf, buf, size); 837 } 838 839 Static usbd_status 840 uhci_mapm_mbuf(usbd_xfer_handle xfer, struct mbuf *chain) 841 { 842 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 843 struct uhci_xfer *uxfer = UXFER(xfer); 844 usbd_status err; 845 846 err = usb_map_mbuf_dma(&sc->sc_dmatag, &uxfer->dmabuf, chain); 847 if (!err) 848 uxfer->mbuf = chain; 849 850 return (err); 851 } 852 853 Static void 854 uhci_unmapm(usbd_xfer_handle xfer) 855 { 856 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 857 struct uhci_xfer *uxfer = UXFER(xfer); 858 859 usb_unmap_dma(&sc->sc_dmatag, &uxfer->dmabuf); 860 uxfer->mbuf = NULL; 861 } 862 863 usbd_xfer_handle 864 uhci_allocx(struct usbd_bus *bus, usbd_pipe_handle pipe, 865 enum usbd_waitflg waitflg) 866 { 867 struct uhci_softc *sc = (struct uhci_softc *)bus; 868 usbd_xfer_handle xfer; 869 870 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 871 if (xfer != NULL) { 872 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 873 #ifdef DIAGNOSTIC 874 if (xfer->busy_free != XFER_FREE) { 875 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 876 xfer->busy_free); 877 } 878 #endif 879 } else { 880 xfer = malloc(sizeof(struct uhci_xfer), M_USB, 881 waitflg == U_WAITOK ? M_WAITOK : M_NOWAIT); 882 } 883 if (xfer != NULL) { 884 memset(xfer, 0, sizeof (struct uhci_xfer)); 885 UXFER(xfer)->iinfo.sc = sc; 886 usb_init_task(&UXFER(xfer)->abort_task, uhci_timeout_task, 887 xfer); 888 UXFER(xfer)->uhci_xfer_flags = 0; 889 UXFER(xfer)->mbuf = NULL; 890 #ifdef DIAGNOSTIC 891 UXFER(xfer)->iinfo.isdone = 1; 892 xfer->busy_free = XFER_BUSY; 893 #endif 894 } 895 return (xfer); 896 } 897 898 void 899 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 900 { 901 struct uhci_softc *sc = (struct uhci_softc *)bus; 902 903 #ifdef DIAGNOSTIC 904 if (xfer->busy_free != XFER_BUSY) { 905 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 906 xfer->busy_free); 907 } 908 xfer->busy_free = XFER_FREE; 909 if (!UXFER(xfer)->iinfo.isdone) { 910 printf("uhci_freex: !isdone\n"); 911 } 912 #endif 913 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 914 } 915 916 /* 917 * Shut down the controller when the system is going down. 918 */ 919 void 920 uhci_shutdown(void *v) 921 { 922 uhci_softc_t *sc = v; 923 int s; 924 925 DPRINTF(("uhci_shutdown: stopping the HC\n")); 926 927 /* 928 * Use polling mode to prevent the interrupts shutting 929 * us down before we shut them down. 930 */ 931 s = splhardusb(); 932 sc->sc_bus.use_polling++; 933 uhci_run(sc, 0); /* stop the controller */ 934 sc->sc_bus.use_polling--; 935 splx(s); 936 } 937 938 /* 939 * Handle suspend/resume. 940 * 941 * We need to switch to polling mode here, because this routine is 942 * called from an interrupt context. This is all right since we 943 * are almost suspended anyway. 944 */ 945 void 946 uhci_power(int why, void *v) 947 { 948 uhci_softc_t *sc = v; 949 int cmd; 950 int s; 951 952 s = splhardusb(); 953 cmd = UREAD2(sc, UHCI_CMD); 954 955 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n", 956 sc, why, sc->sc_suspend, cmd)); 957 958 switch (why) { 959 USB_PWR_CASE_SUSPEND: 960 #ifdef USB_DEBUG 961 if (uhcidebug > 2) 962 uhci_dumpregs(sc); 963 #endif 964 if (sc->sc_intr_xfer != NULL) 965 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, 966 sc->sc_intr_xfer); 967 sc->sc_bus.use_polling++; 968 uhci_run(sc, 0); /* stop the controller */ 969 970 /* save some state if BIOS doesn't */ 971 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 972 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 973 974 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 975 976 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 977 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 978 sc->sc_suspend = why; 979 sc->sc_bus.use_polling--; 980 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 981 break; 982 983 USB_PWR_CASE_RESUME: 984 #ifdef DIAGNOSTIC 985 if (sc->sc_suspend == PWR_RESUME) 986 printf("uhci_power: weird, resume without suspend.\n"); 987 #endif 988 sc->sc_bus.use_polling++; 989 sc->sc_suspend = why; 990 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 991 uhci_globalreset(sc); /* reset the controller */ 992 uhci_reset(sc); 993 if (cmd & UHCI_CMD_RS) 994 uhci_run(sc, 0); /* in case BIOS has started it */ 995 996 uhci_globalreset(sc); 997 uhci_reset(sc); 998 999 /* restore saved state */ 1000 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 1001 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 1002 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 1003 1004 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 1005 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1006 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 1007 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 1008 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 1009 UHCICMD(sc, UHCI_CMD_MAXP); 1010 uhci_run(sc, 1); /* and start traffic again */ 1011 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1012 sc->sc_bus.use_polling--; 1013 if (sc->sc_intr_xfer != NULL) 1014 usb_callout(sc->sc_poll_handle, sc->sc_ival, 1015 uhci_poll_hub, sc->sc_intr_xfer); 1016 #ifdef USB_DEBUG 1017 if (uhcidebug > 2) 1018 uhci_dumpregs(sc); 1019 #endif 1020 break; 1021 1022 default: 1023 break; 1024 } 1025 splx(s); 1026 } 1027 1028 #ifdef USB_DEBUG 1029 Static void 1030 uhci_dumpregs(uhci_softc_t *sc) 1031 { 1032 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 1033 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 1034 USBDEVNAME(sc->sc_bus.bdev), 1035 UREAD2(sc, UHCI_CMD), 1036 UREAD2(sc, UHCI_STS), 1037 UREAD2(sc, UHCI_INTR), 1038 UREAD2(sc, UHCI_FRNUM), 1039 UREAD4(sc, UHCI_FLBASEADDR), 1040 UREAD1(sc, UHCI_SOF), 1041 UREAD2(sc, UHCI_PORTSC1), 1042 UREAD2(sc, UHCI_PORTSC2))); 1043 } 1044 1045 void 1046 uhci_dump_td(uhci_soft_td_t *p) 1047 { 1048 char sbuf[128], sbuf2[128]; 1049 1050 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 1051 "token=0x%08lx buffer=0x%08lx\n", 1052 p, (long)UHCI_STD_DMAADDR(p), 1053 (long)le32toh(p->td.td_link), 1054 (long)le32toh(p->td.td_status), 1055 (long)le32toh(p->td.td_token), 1056 (long)le32toh(p->td.td_buffer))); 1057 1058 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF", 1059 sbuf, sizeof(sbuf)); 1060 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status), 1061 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 1062 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 1063 sbuf2, sizeof(sbuf2)); 1064 1065 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 1066 "D=%d,maxlen=%d\n", sbuf, sbuf2, 1067 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 1068 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 1069 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 1070 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 1071 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 1072 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 1073 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 1074 } 1075 1076 void 1077 uhci_dump_qh(uhci_soft_qh_t *sqh) 1078 { 1079 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 1080 (int)UHCI_SQH_DMAADDR(sqh), le32toh(sqh->qh.qh_hlink), 1081 le32toh(sqh->qh.qh_elink))); 1082 } 1083 1084 1085 #if 1 1086 void 1087 uhci_dump(void) 1088 { 1089 uhci_dump_all(thesc); 1090 } 1091 #endif 1092 1093 void 1094 uhci_dump_all(uhci_softc_t *sc) 1095 { 1096 uhci_dumpregs(sc); 1097 printf("intrs=%d\n", sc->sc_bus.no_intrs); 1098 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 1099 uhci_dump_qh(sc->sc_lctl_start); 1100 } 1101 1102 1103 void 1104 uhci_dump_qhs(uhci_soft_qh_t *sqh) 1105 { 1106 uhci_dump_qh(sqh); 1107 1108 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 1109 * Traverses sideways first, then down. 1110 * 1111 * QH1 1112 * QH2 1113 * No QH 1114 * TD2.1 1115 * TD2.2 1116 * TD1.1 1117 * etc. 1118 * 1119 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 1120 */ 1121 1122 1123 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 1124 uhci_dump_qhs(sqh->hlink); 1125 else 1126 DPRINTF(("No QH\n")); 1127 1128 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 1129 uhci_dump_tds(sqh->elink); 1130 else 1131 DPRINTF(("No TD\n")); 1132 } 1133 1134 void 1135 uhci_dump_tds(uhci_soft_td_t *std) 1136 { 1137 uhci_soft_td_t *td; 1138 1139 for(td = std; td != NULL; td = td->link.std) { 1140 uhci_dump_td(td); 1141 1142 /* Check whether the link pointer in this TD marks 1143 * the link pointer as end of queue. This avoids 1144 * printing the free list in case the queue/TD has 1145 * already been moved there (seatbelt). 1146 */ 1147 if (le32toh(td->td.td_link) & UHCI_PTR_T || 1148 le32toh(td->td.td_link) == 0) 1149 break; 1150 } 1151 } 1152 1153 Static void 1154 uhci_dump_ii(uhci_intr_info_t *ii) 1155 { 1156 usbd_pipe_handle pipe; 1157 usb_endpoint_descriptor_t *ed; 1158 usbd_device_handle dev; 1159 1160 #ifdef DIAGNOSTIC 1161 #define DONE ii->isdone 1162 #else 1163 #define DONE 0 1164 #endif 1165 if (ii == NULL) { 1166 printf("ii NULL\n"); 1167 return; 1168 } 1169 if (ii->xfer == NULL) { 1170 printf("ii %p: done=%d xfer=NULL\n", 1171 ii, DONE); 1172 return; 1173 } 1174 pipe = ii->xfer->pipe; 1175 if (pipe == NULL) { 1176 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 1177 ii, DONE, ii->xfer); 1178 return; 1179 } 1180 if (pipe->endpoint == NULL) { 1181 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 1182 ii, DONE, ii->xfer, pipe); 1183 return; 1184 } 1185 if (pipe->device == NULL) { 1186 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 1187 ii, DONE, ii->xfer, pipe); 1188 return; 1189 } 1190 ed = pipe->endpoint->edesc; 1191 dev = pipe->device; 1192 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 1193 ii, DONE, ii->xfer, dev, 1194 UGETW(dev->ddesc.idVendor), 1195 UGETW(dev->ddesc.idProduct), 1196 dev->address, pipe, 1197 ed->bEndpointAddress, ed->bmAttributes); 1198 #undef DONE 1199 } 1200 1201 void uhci_dump_iis(struct uhci_softc *sc); 1202 void 1203 uhci_dump_iis(struct uhci_softc *sc) 1204 { 1205 uhci_intr_info_t *ii; 1206 1207 printf("intr_info list:\n"); 1208 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 1209 uhci_dump_ii(ii); 1210 } 1211 1212 void iidump(void); 1213 void iidump(void) { uhci_dump_iis(thesc); } 1214 1215 #endif 1216 1217 /* 1218 * This routine is executed periodically and simulates interrupts 1219 * from the root controller interrupt pipe for port status change. 1220 */ 1221 void 1222 uhci_poll_hub(void *addr) 1223 { 1224 usbd_xfer_handle xfer = addr; 1225 usbd_pipe_handle pipe = xfer->pipe; 1226 usbd_device_handle dev = pipe->device; 1227 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1228 int s; 1229 u_char *p; 1230 1231 DPRINTFN(20, ("uhci_poll_hub\n")); 1232 1233 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1234 1235 p = xfer->hcbuffer; 1236 p[0] = 0; 1237 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1238 p[0] |= 1<<1; 1239 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1240 p[0] |= 1<<2; 1241 if (p[0] == 0) 1242 /* No change, try again in a while */ 1243 return; 1244 1245 xfer->actlen = 1; 1246 xfer->status = USBD_NORMAL_COMPLETION; 1247 s = splusb(); 1248 dev->bus->intr_context++; 1249 uhci_transfer_complete(xfer); 1250 dev->bus->intr_context--; 1251 splx(s); 1252 } 1253 1254 void 1255 uhci_root_intr_done(usbd_xfer_handle xfer) 1256 { 1257 } 1258 1259 void 1260 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1261 { 1262 } 1263 1264 /* 1265 * Let the last QH loop back to the high speed control transfer QH. 1266 * This is what intel calls "bandwidth reclamation" and improves 1267 * USB performance a lot for some devices. 1268 * If we are already looping, just count it. 1269 */ 1270 void 1271 uhci_add_loop(uhci_softc_t *sc) { 1272 #ifdef USB_DEBUG 1273 if (uhcinoloop) 1274 return; 1275 #endif 1276 if (++sc->sc_loops == 1) { 1277 DPRINTFN(5,("uhci_start_loop: add\n")); 1278 /* Note, we don't loop back the soft pointer. */ 1279 sc->sc_last_qh->qh.qh_hlink = 1280 htole32(UHCI_SQH_DMAADDR(sc->sc_hctl_start) | UHCI_PTR_QH); 1281 } 1282 } 1283 1284 void 1285 uhci_rem_loop(uhci_softc_t *sc) { 1286 #ifdef USB_DEBUG 1287 if (uhcinoloop) 1288 return; 1289 #endif 1290 if (--sc->sc_loops == 0) { 1291 DPRINTFN(5,("uhci_end_loop: remove\n")); 1292 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1293 } 1294 } 1295 1296 /* Add high speed control QH, called at splusb(). */ 1297 void 1298 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1299 { 1300 uhci_soft_qh_t *eqh; 1301 1302 SPLUSBCHECK; 1303 1304 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1305 eqh = sc->sc_hctl_end; 1306 sqh->hlink = eqh->hlink; 1307 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1308 UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1309 eqh->hlink = sqh; 1310 eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH); 1311 UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1312 sc->sc_hctl_end = sqh; 1313 #ifdef UHCI_CTL_LOOP 1314 uhci_add_loop(sc); 1315 #endif 1316 } 1317 1318 /* Remove high speed control QH, called at splusb(). */ 1319 void 1320 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1321 { 1322 uhci_soft_qh_t *pqh; 1323 1324 SPLUSBCHECK; 1325 1326 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1327 #ifdef UHCI_CTL_LOOP 1328 uhci_rem_loop(sc); 1329 #endif 1330 /* 1331 * The T bit should be set in the elink of the QH so that the HC 1332 * doesn't follow the pointer. This condition may fail if the 1333 * the transferred packet was short so that the QH still points 1334 * at the last used TD. 1335 * In this case we set the T bit and wait a little for the HC 1336 * to stop looking at the TD. 1337 */ 1338 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1339 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1340 UHCI_SQH_SYNC(sc, sqh, 1341 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1342 delay(UHCI_QH_REMOVE_DELAY); 1343 } 1344 1345 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1346 pqh->hlink = sqh->hlink; 1347 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1348 UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1349 delay(UHCI_QH_REMOVE_DELAY); 1350 if (sc->sc_hctl_end == sqh) 1351 sc->sc_hctl_end = pqh; 1352 } 1353 1354 /* Add low speed control QH, called at splusb(). */ 1355 void 1356 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1357 { 1358 uhci_soft_qh_t *eqh; 1359 1360 SPLUSBCHECK; 1361 1362 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1363 eqh = sc->sc_lctl_end; 1364 sqh->hlink = eqh->hlink; 1365 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1366 UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1367 eqh->hlink = sqh; 1368 eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH); 1369 UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1370 sc->sc_lctl_end = sqh; 1371 } 1372 1373 /* Remove low speed control QH, called at splusb(). */ 1374 void 1375 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1376 { 1377 uhci_soft_qh_t *pqh; 1378 1379 SPLUSBCHECK; 1380 1381 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1382 /* See comment in uhci_remove_hs_ctrl() */ 1383 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1384 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1385 UHCI_SQH_SYNC(sc, sqh, 1386 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1387 delay(UHCI_QH_REMOVE_DELAY); 1388 } 1389 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1390 pqh->hlink = sqh->hlink; 1391 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1392 UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1393 delay(UHCI_QH_REMOVE_DELAY); 1394 if (sc->sc_lctl_end == sqh) 1395 sc->sc_lctl_end = pqh; 1396 } 1397 1398 /* Add bulk QH, called at splusb(). */ 1399 void 1400 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1401 { 1402 uhci_soft_qh_t *eqh; 1403 1404 SPLUSBCHECK; 1405 1406 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1407 eqh = sc->sc_bulk_end; 1408 sqh->hlink = eqh->hlink; 1409 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1410 UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1411 eqh->hlink = sqh; 1412 eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH); 1413 UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1414 sc->sc_bulk_end = sqh; 1415 uhci_add_loop(sc); 1416 } 1417 1418 /* Remove bulk QH, called at splusb(). */ 1419 void 1420 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1421 { 1422 uhci_soft_qh_t *pqh; 1423 1424 SPLUSBCHECK; 1425 1426 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1427 uhci_rem_loop(sc); 1428 /* See comment in uhci_remove_hs_ctrl() */ 1429 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1430 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1431 UHCI_SQH_SYNC(sc, sqh, 1432 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1433 delay(UHCI_QH_REMOVE_DELAY); 1434 } 1435 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1436 pqh->hlink = sqh->hlink; 1437 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1438 UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1439 delay(UHCI_QH_REMOVE_DELAY); 1440 if (sc->sc_bulk_end == sqh) 1441 sc->sc_bulk_end = pqh; 1442 } 1443 1444 Static int uhci_intr1(uhci_softc_t *); 1445 1446 int 1447 uhci_intr(void *arg) 1448 { 1449 uhci_softc_t *sc = arg; 1450 1451 if (sc->sc_dying) 1452 return (0); 1453 1454 DPRINTFN(15,("uhci_intr: real interrupt\n")); 1455 if (sc->sc_bus.use_polling) { 1456 #ifdef DIAGNOSTIC 1457 printf("uhci_intr: ignored interrupt while polling\n"); 1458 #endif 1459 return (0); 1460 } 1461 return (uhci_intr1(sc)); 1462 } 1463 1464 int 1465 uhci_intr1(uhci_softc_t *sc) 1466 { 1467 1468 int status; 1469 int ack; 1470 1471 #ifdef __FreeBSD__ 1472 /* 1473 * It can happen that an interrupt will be delivered to 1474 * us before the device has been fully attached and the 1475 * softc struct has been configured on FreeBSD. Usually 1476 * this happens when kldloading the USB support as a module 1477 * after the system has been booted. If we detect this condition, 1478 * we need to squelch the unwanted interrupts until we're 1479 * ready for them. 1480 */ 1481 if (sc->sc_bus.bdev == NULL) { 1482 UWRITE2(sc, UHCI_STS, 0xFFFF); /* ack pending interrupts */ 1483 uhci_run(sc, 0); /* stop the controller */ 1484 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 1485 return(0); 1486 } 1487 #endif 1488 1489 #ifdef USB_DEBUG 1490 if (uhcidebug > 15) { 1491 DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev))); 1492 uhci_dumpregs(sc); 1493 } 1494 #endif 1495 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1496 if (status == 0) /* The interrupt was not for us. */ 1497 return (0); 1498 1499 if (sc->sc_suspend != PWR_RESUME) { 1500 #ifdef DIAGNOSTIC 1501 printf("uhci_intr: suspended sts=0x%x\n", status); 1502 printf("%s: interrupt while not operating ignored\n", 1503 USBDEVNAME(sc->sc_bus.bdev)); 1504 #endif 1505 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1506 return (0); 1507 } 1508 1509 ack = 0; 1510 if (status & UHCI_STS_USBINT) 1511 ack |= UHCI_STS_USBINT; 1512 if (status & UHCI_STS_USBEI) 1513 ack |= UHCI_STS_USBEI; 1514 if (status & UHCI_STS_RD) { 1515 ack |= UHCI_STS_RD; 1516 #ifdef USB_DEBUG 1517 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1518 #endif 1519 } 1520 if (status & UHCI_STS_HSE) { 1521 ack |= UHCI_STS_HSE; 1522 printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev)); 1523 } 1524 if (status & UHCI_STS_HCPE) { 1525 ack |= UHCI_STS_HCPE; 1526 printf("%s: host controller process error\n", 1527 USBDEVNAME(sc->sc_bus.bdev)); 1528 } 1529 if (status & UHCI_STS_HCH) { 1530 /* no acknowledge needed */ 1531 if (!sc->sc_dying) { 1532 printf("%s: host controller halted\n", 1533 USBDEVNAME(sc->sc_bus.bdev)); 1534 #ifdef USB_DEBUG 1535 uhci_dump_all(sc); 1536 #endif 1537 } 1538 sc->sc_dying = 1; 1539 } 1540 1541 if (!ack) 1542 return (0); /* nothing to acknowledge */ 1543 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1544 1545 sc->sc_bus.no_intrs++; 1546 usb_schedsoftintr(&sc->sc_bus); 1547 1548 DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev))); 1549 1550 return (1); 1551 } 1552 1553 void 1554 uhci_softintr(void *v) 1555 { 1556 uhci_softc_t *sc = v; 1557 uhci_intr_info_t *ii, *nextii; 1558 1559 DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 1560 sc->sc_bus.intr_context)); 1561 1562 sc->sc_bus.intr_context++; 1563 1564 /* 1565 * Interrupts on UHCI really suck. When the host controller 1566 * interrupts because a transfer is completed there is no 1567 * way of knowing which transfer it was. You can scan down 1568 * the TDs and QHs of the previous frame to limit the search, 1569 * but that assumes that the interrupt was not delayed by more 1570 * than 1 ms, which may not always be true (e.g. after debug 1571 * output on a slow console). 1572 * We scan all interrupt descriptors to see if any have 1573 * completed. 1574 */ 1575 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1576 nextii = LIST_NEXT(ii, list); 1577 uhci_check_intr(sc, ii); 1578 } 1579 1580 #ifdef USB_USE_SOFTINTR 1581 if (sc->sc_softwake) { 1582 sc->sc_softwake = 0; 1583 wakeup(&sc->sc_softwake); 1584 } 1585 #endif /* USB_USE_SOFTINTR */ 1586 1587 sc->sc_bus.intr_context--; 1588 } 1589 1590 /* Check for an interrupt. */ 1591 void 1592 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1593 { 1594 uhci_soft_td_t *std, *lstd; 1595 u_int32_t status; 1596 1597 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1598 #ifdef DIAGNOSTIC 1599 if (ii == NULL) { 1600 printf("uhci_check_intr: no ii? %p\n", ii); 1601 return; 1602 } 1603 #endif 1604 if (ii->xfer->status == USBD_CANCELLED || 1605 ii->xfer->status == USBD_TIMEOUT) { 1606 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1607 return; 1608 } 1609 1610 if (ii->stdstart == NULL) 1611 return; 1612 lstd = ii->stdend; 1613 #ifdef DIAGNOSTIC 1614 if (lstd == NULL) { 1615 printf("uhci_check_intr: std==0\n"); 1616 return; 1617 } 1618 #endif 1619 /* 1620 * If the last TD is still active we need to check whether there 1621 * is an error somewhere in the middle, or whether there was a 1622 * short packet (SPD and not ACTIVE). 1623 */ 1624 UHCI_STD_SYNC(sc, lstd, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1625 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1626 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1627 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1628 UHCI_STD_SYNC(sc, lstd, 1629 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1630 status = le32toh(std->td.td_status); 1631 /* If there's an active TD the xfer isn't done. */ 1632 if (status & UHCI_TD_ACTIVE) 1633 break; 1634 /* Any kind of error makes the xfer done. */ 1635 if (status & UHCI_TD_STALLED) 1636 goto done; 1637 /* We want short packets, and it is short: it's done */ 1638 if ((status & UHCI_TD_SPD) && 1639 UHCI_TD_GET_ACTLEN(status) < 1640 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1641 goto done; 1642 } 1643 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1644 ii, ii->stdstart)); 1645 return; 1646 } 1647 done: 1648 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1649 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii); 1650 usb_rem_task(ii->xfer->pipe->device, &UXFER(ii->xfer)->abort_task); 1651 uhci_idone(ii); 1652 } 1653 1654 /* Called at splusb() */ 1655 void 1656 uhci_idone(uhci_intr_info_t *ii) 1657 { 1658 usbd_xfer_handle xfer = ii->xfer; 1659 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1660 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1661 uhci_soft_td_t *std; 1662 u_int32_t status = 0, nstatus; 1663 int actlen; 1664 1665 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1666 #ifdef DIAGNOSTIC 1667 { 1668 int s = splhigh(); 1669 if (ii->isdone) { 1670 splx(s); 1671 #ifdef USB_DEBUG 1672 printf("uhci_idone: ii is done!\n "); 1673 uhci_dump_ii(ii); 1674 #else 1675 printf("uhci_idone: ii=%p is done!\n", ii); 1676 #endif 1677 return; 1678 } 1679 ii->isdone = 1; 1680 splx(s); 1681 } 1682 #endif 1683 1684 if (xfer->nframes != 0) { 1685 /* Isoc transfer, do things differently. */ 1686 uhci_soft_td_t **stds = upipe->u.iso.stds; 1687 int i, n, nframes, len; 1688 1689 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1690 1691 nframes = xfer->nframes; 1692 actlen = 0; 1693 n = UXFER(xfer)->curframe; 1694 for (i = 0; i < nframes; i++) { 1695 std = stds[n]; 1696 UHCI_STD_SYNC(sc, std, 1697 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1698 #ifdef USB_DEBUG 1699 if (uhcidebug > 5) { 1700 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1701 uhci_dump_td(std); 1702 } 1703 #endif 1704 if (++n >= UHCI_VFRAMELIST_COUNT) 1705 n = 0; 1706 status = le32toh(std->td.td_status); 1707 len = UHCI_TD_GET_ACTLEN(status); 1708 xfer->frlengths[i] = len; 1709 actlen += len; 1710 } 1711 upipe->u.iso.inuse -= nframes; 1712 xfer->actlen = actlen; 1713 xfer->status = USBD_NORMAL_COMPLETION; 1714 goto end; 1715 } 1716 1717 #ifdef USB_DEBUG 1718 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1719 ii, xfer, upipe)); 1720 if (uhcidebug > 10) 1721 uhci_dump_tds(ii->stdstart); 1722 #endif 1723 1724 /* The transfer is done, compute actual length and status. */ 1725 actlen = 0; 1726 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1727 nstatus = le32toh(std->td.td_status); 1728 if (nstatus & UHCI_TD_ACTIVE) 1729 break; 1730 1731 status = nstatus; 1732 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1733 UHCI_TD_PID_SETUP) 1734 actlen += UHCI_TD_GET_ACTLEN(status); 1735 else { 1736 /* 1737 * UHCI will report CRCTO in addition to a STALL or NAK 1738 * for a SETUP transaction. See section 3.2.2, "TD 1739 * CONTROL AND STATUS". 1740 */ 1741 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1742 status &= ~UHCI_TD_CRCTO; 1743 } 1744 } 1745 /* If there are left over TDs we need to update the toggle. */ 1746 if (std != NULL) 1747 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1748 1749 status &= UHCI_TD_ERROR; 1750 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1751 actlen, status)); 1752 xfer->actlen = actlen; 1753 if (status != 0) { 1754 #ifdef USB_DEBUG 1755 char sbuf[128]; 1756 1757 bitmask_snprintf((u_int32_t)status, 1758 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1759 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1760 sbuf, sizeof(sbuf)); 1761 1762 DPRINTFN((status == UHCI_TD_STALLED)*10, 1763 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1764 "status 0x%s\n", 1765 xfer->pipe->device->address, 1766 xfer->pipe->endpoint->edesc->bEndpointAddress, 1767 sbuf)); 1768 #endif 1769 1770 if (status == UHCI_TD_STALLED) 1771 xfer->status = USBD_STALLED; 1772 else 1773 xfer->status = USBD_IOERROR; /* more info XXX */ 1774 } else { 1775 xfer->status = USBD_NORMAL_COMPLETION; 1776 } 1777 1778 end: 1779 uhci_transfer_complete(xfer); 1780 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1781 } 1782 1783 /* 1784 * Called when a request does not complete. 1785 */ 1786 void 1787 uhci_timeout(void *addr) 1788 { 1789 uhci_intr_info_t *ii = addr; 1790 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1791 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1792 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1793 1794 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1795 1796 if (sc->sc_dying) { 1797 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1798 return; 1799 } 1800 1801 /* Execute the abort in a process context. */ 1802 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1803 USB_TASKQ_HC); 1804 } 1805 1806 void 1807 uhci_timeout_task(void *addr) 1808 { 1809 usbd_xfer_handle xfer = addr; 1810 int s; 1811 1812 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1813 1814 s = splusb(); 1815 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1816 splx(s); 1817 } 1818 1819 /* 1820 * Wait here until controller claims to have an interrupt. 1821 * Then call uhci_intr and return. Use timeout to avoid waiting 1822 * too long. 1823 * Only used during boot when interrupts are not enabled yet. 1824 */ 1825 void 1826 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1827 { 1828 int timo = xfer->timeout; 1829 uhci_intr_info_t *ii; 1830 1831 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1832 1833 xfer->status = USBD_IN_PROGRESS; 1834 for (; timo >= 0; timo--) { 1835 usb_delay_ms(&sc->sc_bus, 1); 1836 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1837 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) 1838 uhci_intr1(sc); 1839 if (xfer->status != USBD_IN_PROGRESS) 1840 return; 1841 } 1842 1843 /* Timeout */ 1844 DPRINTF(("uhci_waitintr: timeout\n")); 1845 for (ii = LIST_FIRST(&sc->sc_intrhead); 1846 ii != NULL && ii->xfer != xfer; 1847 ii = LIST_NEXT(ii, list)) 1848 ; 1849 #ifdef DIAGNOSTIC 1850 if (ii == NULL) 1851 panic("uhci_waitintr: lost intr_info"); 1852 #endif 1853 uhci_idone(ii); 1854 } 1855 1856 void 1857 uhci_poll(struct usbd_bus *bus) 1858 { 1859 uhci_softc_t *sc = (uhci_softc_t *)bus; 1860 1861 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) 1862 uhci_intr1(sc); 1863 } 1864 1865 void 1866 uhci_reset(uhci_softc_t *sc) 1867 { 1868 int n; 1869 1870 UHCICMD(sc, UHCI_CMD_HCRESET); 1871 /* The reset bit goes low when the controller is done. */ 1872 for (n = 0; n < UHCI_RESET_TIMEOUT && 1873 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1874 usb_delay_ms(&sc->sc_bus, 1); 1875 if (n >= UHCI_RESET_TIMEOUT) 1876 printf("%s: controller did not reset\n", 1877 USBDEVNAME(sc->sc_bus.bdev)); 1878 } 1879 1880 usbd_status 1881 uhci_run(uhci_softc_t *sc, int run) 1882 { 1883 int s, n, running; 1884 u_int16_t cmd; 1885 1886 run = run != 0; 1887 s = splhardusb(); 1888 DPRINTF(("uhci_run: setting run=%d\n", run)); 1889 cmd = UREAD2(sc, UHCI_CMD); 1890 if (run) 1891 cmd |= UHCI_CMD_RS; 1892 else 1893 cmd &= ~UHCI_CMD_RS; 1894 UHCICMD(sc, cmd); 1895 for(n = 0; n < 10; n++) { 1896 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1897 /* return when we've entered the state we want */ 1898 if (run == running) { 1899 splx(s); 1900 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1901 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1902 return (USBD_NORMAL_COMPLETION); 1903 } 1904 usb_delay_ms(&sc->sc_bus, 1); 1905 } 1906 splx(s); 1907 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev), 1908 run ? "start" : "stop"); 1909 return (USBD_IOERROR); 1910 } 1911 1912 /* 1913 * Memory management routines. 1914 * uhci_alloc_std allocates TDs 1915 * uhci_alloc_sqh allocates QHs 1916 * These two routines do their own free list management, 1917 * partly for speed, partly because allocating DMAable memory 1918 * has page size granularaity so much memory would be wasted if 1919 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1920 */ 1921 1922 Static usbd_status 1923 uhci_grow_std(uhci_softc_t *sc) 1924 { 1925 usb_dma_t dma; 1926 struct uhci_mem_desc *um; 1927 uhci_soft_td_t *std; 1928 usbd_status err; 1929 int i, offs; 1930 int s; 1931 1932 DPRINTFN(2,("uhci_grow_std: allocating chunk\n")); 1933 err = usb_allocmem(&sc->sc_dmatag, 1934 UHCI_STD_SIZE*UHCI_STD_CHUNK + sizeof(struct uhci_mem_desc), 1935 UHCI_TD_ALIGN, &dma); 1936 if (err) 1937 return (err); 1938 um = KERNADDR(&dma, UHCI_STD_SIZE * UHCI_STD_CHUNK); 1939 um->um_top = KERNADDR(&dma, 0); 1940 um->um_topdma = DMAADDR(&dma, 0); 1941 um->um_dma = dma; 1942 s = splusb(); 1943 SIMPLEQ_INSERT_HEAD(&sc->sc_std_chunks, um, um_next); 1944 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1945 offs = i * UHCI_STD_SIZE; 1946 std = KERNADDR(&dma, offs); 1947 std->ut_mdesc = um; 1948 std->link.std = sc->sc_freetds; 1949 std->aux_len = 0; 1950 sc->sc_freetds = std; 1951 sc->sc_nfreetds++; 1952 } 1953 splx(s); 1954 1955 return (USBD_NORMAL_COMPLETION); 1956 } 1957 1958 uhci_soft_td_t * 1959 uhci_alloc_std(uhci_softc_t *sc) 1960 { 1961 uhci_soft_td_t *std; 1962 int s; 1963 1964 #ifdef DIAGNOSTIC 1965 if (sc->sc_freetds == NULL) 1966 panic("uhci_alloc_std: %d", sc->sc_nfreetds); 1967 #endif 1968 s = splusb(); 1969 std = sc->sc_freetds; 1970 sc->sc_freetds = std->link.std; 1971 splx(s); 1972 memset(&std->td, 0, sizeof(uhci_td_t)); 1973 return std; 1974 } 1975 1976 Static uhci_soft_td_t * 1977 uhci_alloc_std_norsv(uhci_softc_t *sc) 1978 { 1979 int s; 1980 1981 s = splusb(); 1982 if (sc->sc_nfreetds < 1) 1983 if (uhci_grow_std(sc)) 1984 return (NULL); 1985 sc->sc_nfreetds--; 1986 splx(s); 1987 return (uhci_alloc_std(sc)); 1988 } 1989 1990 void 1991 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1992 { 1993 int s; 1994 1995 #ifdef DIAGNOSTIC 1996 #define TD_IS_FREE 0x12345678 1997 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1998 printf("uhci_free_std: freeing free TD %p\n", std); 1999 return; 2000 } 2001 std->td.td_token = htole32(TD_IS_FREE); 2002 #endif 2003 s = splusb(); 2004 std->link.std = sc->sc_freetds; 2005 sc->sc_freetds = std; 2006 splx(s); 2007 } 2008 2009 Static void 2010 uhci_free_std_norsv(uhci_softc_t *sc, uhci_soft_td_t *std) 2011 { 2012 int s; 2013 2014 s = splusb(); 2015 uhci_free_std(sc, std); 2016 sc->sc_nfreetds++; 2017 splx(s); 2018 } 2019 2020 uhci_soft_qh_t * 2021 uhci_alloc_sqh(uhci_softc_t *sc) 2022 { 2023 uhci_soft_qh_t *sqh; 2024 usbd_status err; 2025 int i, offs; 2026 usb_dma_t dma; 2027 struct uhci_mem_desc *um; 2028 2029 if (sc->sc_freeqhs == NULL) { 2030 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 2031 err = usb_allocmem(&sc->sc_dmatag, 2032 UHCI_SQH_SIZE*UHCI_SQH_CHUNK + sizeof(struct uhci_mem_desc), 2033 UHCI_QH_ALIGN, &dma); 2034 if (err) 2035 return (0); 2036 um = KERNADDR(&dma, UHCI_SQH_SIZE * UHCI_SQH_CHUNK); 2037 um->um_top = KERNADDR(&dma, 0); 2038 um->um_topdma = DMAADDR(&dma, 0); 2039 um->um_dma = dma; 2040 SIMPLEQ_INSERT_HEAD(&sc->sc_sqh_chunks, um, um_next); 2041 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 2042 offs = i * UHCI_SQH_SIZE; 2043 sqh = KERNADDR(&dma, offs); 2044 sqh->uq_mdesc = um; 2045 sqh->hlink = sc->sc_freeqhs; 2046 sc->sc_freeqhs = sqh; 2047 } 2048 } 2049 sqh = sc->sc_freeqhs; 2050 sc->sc_freeqhs = sqh->hlink; 2051 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 2052 return (sqh); 2053 } 2054 2055 void 2056 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2057 { 2058 sqh->hlink = sc->sc_freeqhs; 2059 sc->sc_freeqhs = sqh; 2060 } 2061 2062 Static void 2063 uhci_free_desc_chunks(uhci_softc_t *sc, struct uhci_mdescs *c) 2064 { 2065 struct uhci_mem_desc *um; 2066 2067 while ((um = SIMPLEQ_FIRST(c)) != NULL) { 2068 SIMPLEQ_REMOVE_HEAD(c, um_next); 2069 usb_freemem(&sc->sc_dmatag, &um->um_dma); 2070 } 2071 } 2072 2073 /* 2074 * Manipulate pointer to plain buffer or mbuf. 2075 */ 2076 2077 /* Set the buffer pointer at the beginning of buffer */ 2078 Static void 2079 uhci_bufptr_init(union uhci_bufptr *p, struct uhci_xfer *uxfer) 2080 { 2081 2082 if (uxfer->mbuf) { 2083 p->ptr_m.m_mbuf = uxfer->mbuf; 2084 p->ptr_m.m_off = 0; 2085 } else { 2086 p->ptr_p.p_buf = uxfer->xfer.hcbuffer; 2087 } 2088 } 2089 2090 /* Advance the buffer pointer by len bytes. */ 2091 Static void 2092 uhci_bufptr_advance(union uhci_bufptr *p, int len, int is_mbuf) 2093 { 2094 struct mbuf *m; 2095 int off, mlen; 2096 2097 if (is_mbuf) { 2098 for (m = p->ptr_m.m_mbuf, off = p->ptr_m.m_off; m && len; 2099 m = m->m_next, off = 0) { 2100 mlen = m->m_len - off; 2101 if (mlen > len) { 2102 off += len; 2103 len = 0; 2104 break; 2105 } 2106 len -= mlen; 2107 } 2108 p->ptr_m.m_off = off; 2109 p->ptr_m.m_mbuf = m; 2110 #ifdef DIAGNOSTIC 2111 if (len) 2112 panic("uhci_bufptr_advance: overrun %d", len); 2113 #endif 2114 } else { 2115 p->ptr_p.p_buf += len; 2116 } 2117 } 2118 2119 /* Copy data from the buffer pointer to linear buffer b. */ 2120 Static void 2121 uhci_bufptr_wr(const union uhci_bufptr *p, void *b, int len, int is_mbuf) 2122 { 2123 2124 if (is_mbuf) { 2125 m_copydata(p->ptr_m.m_mbuf, p->ptr_m.m_off, len, b); 2126 } else { 2127 memcpy(b, p->ptr_p.p_buf, len); 2128 } 2129 } 2130 2131 /* Copy data to the buffer pointer from linear buffer b. */ 2132 Static void 2133 uhci_bufptr_rd(const union uhci_bufptr *p, const void *b, int len, int is_mbuf) 2134 { 2135 struct mbuf *m; 2136 int off, mlen, curlen; 2137 const char *buf; 2138 2139 if (is_mbuf) { 2140 #if 0 /* overkill? */ 2141 m_copyback(p->ptr_m.m_mbuf, p->ptr_m.m_off, len, b); 2142 #else 2143 for (m = p->ptr_m.m_mbuf, off = p->ptr_m.m_off, buf = b; 2144 m && len; m = m->m_next, off = 0, buf += curlen) { 2145 mlen = m->m_len - off; 2146 curlen = (mlen > len) ? len : mlen; 2147 memcpy(mtod(m, caddr_t) + off, buf, curlen); 2148 len -= curlen; 2149 } 2150 #ifdef DIAGNOSTIC 2151 if (len) 2152 panic("uhci_bufptr_rd: overrun %d", len); 2153 #endif 2154 #endif 2155 } else { 2156 memcpy(p->ptr_p.p_buf, b, len); 2157 } 2158 } 2159 2160 void 2161 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 2162 uhci_soft_td_t *stdend) 2163 { 2164 uhci_soft_td_t *p; 2165 2166 for (; std != stdend; std = p) { 2167 p = std->link.std; 2168 uhci_free_std(sc, std); 2169 } 2170 } 2171 2172 usbd_status 2173 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 2174 int rd, u_int16_t flags, usbd_xfer_handle xfer, 2175 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 2176 { 2177 struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf; 2178 uhci_soft_td_t *p, *prevp, *startp; 2179 int i, ntd, l, tog, maxp, seg, segoff; 2180 u_int32_t status; 2181 int addr = upipe->pipe.device->address; 2182 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2183 bus_dma_segment_t *segs = USB_BUFFER_SEGS(ub); 2184 union uhci_bufptr bufptr; 2185 int is_mbuf; 2186 2187 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 2188 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 2189 upipe->pipe.device->speed, flags)); 2190 maxp = UE_MAXPKTSZ(upipe->pipe.endpoint->edesc); 2191 if (maxp == 0) { 2192 printf("uhci_alloc_std_chain: maxp=0\n"); 2193 return (USBD_INVAL); 2194 } 2195 ntd = (len + maxp - 1) / maxp; 2196 if (len == 0) 2197 flags |= USBD_FORCE_SHORT_XFER; 2198 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 2199 ntd++; 2200 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 2201 USB_KASSERT2(ntd > 0, ("uhci_alloc_std_chain: ntd=0")); 2202 tog = upipe->nexttoggle; 2203 prevp = NULL; 2204 startp = NULL; 2205 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 2206 if (upipe->pipe.device->speed == USB_SPEED_LOW) 2207 status |= UHCI_TD_LS; 2208 if (flags & USBD_SHORT_XFER_OK) 2209 status |= UHCI_TD_SPD; 2210 uhci_bufptr_init(&bufptr, UXFER(xfer)); 2211 is_mbuf = UXFER(xfer)->mbuf != NULL; 2212 seg = 0; 2213 segoff = 0; 2214 for (i = 0; i < ntd; i++) { 2215 p = uhci_alloc_std(sc); 2216 if (p == NULL) { 2217 uhci_free_std_chain(sc, startp, NULL); 2218 return (USBD_NOMEM); 2219 } 2220 p->link.std = NULL; 2221 if (prevp != NULL) { 2222 prevp->link.std = p; 2223 prevp->td.td_link = 2224 htole32(UHCI_STD_DMAADDR(p) | UHCI_PTR_VF | 2225 UHCI_PTR_TD); 2226 UHCI_STD_SYNC(sc, prevp, 2227 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 2228 } else { 2229 startp = p; 2230 } 2231 p->td.td_status = htole32(status); 2232 if (i == ntd - 1) { 2233 /* last TD */ 2234 l = len % maxp; 2235 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 2236 l = maxp; 2237 *ep = p; 2238 } else 2239 l = maxp; 2240 p->td.td_token = 2241 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 2242 UHCI_TD_OUT(l, endpt, addr, tog)); 2243 2244 if (i) 2245 uhci_bufptr_advance(&bufptr, maxp, is_mbuf); 2246 2247 USB_KASSERT2(seg < USB_BUFFER_NSEGS(ub) || l == 0, 2248 ("uhci_alloc_std_chain: too few segments")); 2249 if (l == 0) { 2250 p->td.td_buffer = 0; 2251 } else if (l > segs[seg].ds_len - segoff) { 2252 /* UHCI can't handle non-contiguous data. */ 2253 uhci_aux_dma_alloc(p, &UXFER(xfer)->aux, &bufptr, l); 2254 2255 /* prepare aux DMA */ 2256 uhci_aux_dma_prepare(p, is_mbuf, rd); 2257 p->td.td_buffer = htole32(p->aux_dma); 2258 2259 /* skip handled segments */ 2260 l += segoff; 2261 do { 2262 l -= segs[seg].ds_len; 2263 seg++; 2264 USB_KASSERT2(seg < USB_BUFFER_NSEGS(ub), 2265 ("uhci_alloc_std_chain: too few segments 2")); 2266 } while (l > segs[seg].ds_len); 2267 segoff = 0; 2268 } else { 2269 p->td.td_buffer = htole32(segs[seg].ds_addr + 2270 segoff); 2271 } 2272 segoff += l; 2273 if (l > 0 && segoff >= segs[seg].ds_len) { 2274 USB_KASSERT2(segoff == segs[seg].ds_len, 2275 ("uhci_alloc_std_chain: overlap")); 2276 if (i * maxp + l != len) { 2277 seg++; 2278 segoff = 0; 2279 } 2280 } 2281 prevp = p; 2282 tog ^= 1; 2283 } 2284 prevp->td.td_link = htole32(UHCI_PTR_T | UHCI_PTR_VF | UHCI_PTR_TD); 2285 upipe->nexttoggle = tog; 2286 *sp = startp; 2287 uhci_aux_dma_sync(sc, &UXFER(xfer)->aux, 2288 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2289 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 2290 upipe->nexttoggle)); 2291 return (USBD_NORMAL_COMPLETION); 2292 } 2293 2294 /* 2295 * Allocate a physically contiguous buffer to handle cases where UHCI 2296 * cannot handle a packet because it is not physically contiguous. 2297 */ 2298 Static void 2299 uhci_aux_mem_init(struct uhci_aux_mem *aux) 2300 { 2301 2302 aux->aux_curchunk = aux->aux_chunkoff = aux->aux_naux = 0; 2303 } 2304 2305 Static usbd_status 2306 uhci_aux_mem_alloc(uhci_softc_t *sc, struct uhci_aux_mem *aux, 2307 int naux, int maxp) 2308 { 2309 int nchunk, i, j; 2310 usbd_status err; 2311 2312 USB_KASSERT(aux->aux_nchunk == 0); 2313 2314 nchunk = UHCI_NCHUNK(naux, maxp); 2315 for (i = 0; i < nchunk; i++) { 2316 err = usb_allocmem(&sc->sc_dmatag, UHCI_AUX_CHUNK_SIZE, 2317 UHCI_AUX_CHUNK_SIZE, &aux->aux_chunk_dma[i]); 2318 if (err) { 2319 for (j = 0; j < i; j++) 2320 usb_freemem(&sc->sc_dmatag, 2321 &aux->aux_chunk_dma[j]); 2322 return (err); 2323 } 2324 } 2325 2326 aux->aux_nchunk = nchunk; 2327 uhci_aux_mem_init(aux); 2328 2329 return (USBD_NORMAL_COMPLETION); 2330 } 2331 2332 Static void 2333 uhci_aux_mem_free(uhci_softc_t *sc, struct uhci_aux_mem *aux) 2334 { 2335 int i; 2336 2337 for (i = 0; i < aux->aux_nchunk; i++) 2338 usb_freemem(&sc->sc_dmatag, &aux->aux_chunk_dma[i]); 2339 2340 aux->aux_nchunk = 0; 2341 } 2342 2343 Static void 2344 uhci_aux_dma_alloc(uhci_soft_td_t *std, struct uhci_aux_mem *aux, 2345 const union uhci_bufptr *bufptr, int len) 2346 { 2347 2348 if (aux->aux_chunkoff + len > UHCI_AUX_CHUNK_SIZE) { 2349 aux->aux_curchunk++; 2350 aux->aux_chunkoff = 0; 2351 } 2352 USB_KASSERT(aux->aux_curchunk < aux->aux_nchunk); 2353 2354 std->aux_dma = 2355 DMAADDR(&aux->aux_chunk_dma[aux->aux_curchunk], aux->aux_chunkoff); 2356 std->aux_kern = 2357 KERNADDR(&aux->aux_chunk_dma[aux->aux_curchunk], aux->aux_chunkoff); 2358 std->aux_ptr = *bufptr; 2359 std->aux_len = len; 2360 2361 aux->aux_chunkoff += len; 2362 aux->aux_naux++; 2363 } 2364 2365 Static void 2366 uhci_aux_dma_prepare(uhci_soft_td_t *std, int is_mbuf, int isread) 2367 { 2368 2369 if (!isread) { 2370 uhci_bufptr_wr(&std->aux_ptr, std->aux_kern, std->aux_len, 2371 is_mbuf); 2372 } 2373 } 2374 2375 Static void 2376 uhci_aux_dma_complete(uhci_soft_td_t *std, struct uhci_aux_mem *aux, 2377 int is_mbuf, int isread) 2378 { 2379 2380 if (isread) { 2381 uhci_bufptr_rd(&std->aux_ptr, std->aux_kern, std->aux_len, 2382 is_mbuf); 2383 } 2384 std->aux_len = 0; 2385 USB_KASSERT(aux->aux_naux > 0); 2386 if (--aux->aux_naux == 0) 2387 uhci_aux_mem_init(aux); 2388 } 2389 2390 Static void 2391 uhci_aux_dma_sync(uhci_softc_t *sc, struct uhci_aux_mem *aux, int op) 2392 { 2393 int naux, i; 2394 2395 naux = aux->aux_curchunk; 2396 if (aux->aux_chunkoff) 2397 naux++; 2398 2399 for (i = 0; i < naux; i++) 2400 USB_MEM_SYNC(&sc->sc_dmatag, &aux->aux_chunk_dma[i], op); 2401 } 2402 2403 void 2404 uhci_device_clear_toggle(usbd_pipe_handle pipe) 2405 { 2406 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2407 upipe->nexttoggle = 0; 2408 } 2409 2410 void 2411 uhci_noop(usbd_pipe_handle pipe) 2412 { 2413 } 2414 2415 usbd_status 2416 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 2417 { 2418 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 2419 usbd_status err; 2420 2421 /* Insert last in queue. */ 2422 err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag, 2423 &UXFER(xfer)->dmabuf); 2424 if (err) 2425 return (err); 2426 2427 /* 2428 * Pipe isn't running (otherwise err would be USBD_INPROG), 2429 * so start it first. 2430 */ 2431 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2432 } 2433 2434 usbd_status 2435 uhci_device_bulk_start(usbd_xfer_handle xfer) 2436 { 2437 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2438 usbd_device_handle dev = upipe->pipe.device; 2439 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2440 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2441 uhci_soft_td_t *data, *dataend; 2442 uhci_soft_qh_t *sqh; 2443 usbd_status err; 2444 int len, isread, endpt; 2445 int s; 2446 2447 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2448 xfer, xfer->length, xfer->flags, ii)); 2449 2450 if (sc->sc_dying) 2451 return (USBD_IOERROR); 2452 2453 #ifdef DIAGNOSTIC 2454 if (xfer->rqflags & URQ_REQUEST) 2455 panic("uhci_device_bulk_transfer: a request"); 2456 #endif 2457 2458 len = xfer->length; 2459 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2460 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2461 sqh = upipe->u.bulk.sqh; 2462 2463 upipe->u.bulk.isread = isread; 2464 upipe->u.bulk.length = len; 2465 2466 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, xfer, 2467 &data, &dataend); 2468 if (err) 2469 return (err); 2470 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2471 UHCI_STD_SYNC(sc, dataend, 2472 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2473 2474 #ifdef USB_DEBUG 2475 if (uhcidebug > 8) { 2476 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2477 uhci_dump_tds(data); 2478 } 2479 #endif 2480 2481 /* Set up interrupt info. */ 2482 ii->xfer = xfer; 2483 ii->stdstart = data; 2484 ii->stdend = dataend; 2485 #ifdef DIAGNOSTIC 2486 if (!ii->isdone) { 2487 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2488 } 2489 ii->isdone = 0; 2490 #endif 2491 2492 sqh->elink = data; 2493 sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD); 2494 2495 s = splusb(); 2496 uhci_add_bulk(sc, sqh); 2497 uhci_add_intr_info(sc, ii); 2498 2499 if (xfer->timeout && !sc->sc_bus.use_polling) { 2500 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2501 uhci_timeout, ii); 2502 } 2503 xfer->status = USBD_IN_PROGRESS; 2504 splx(s); 2505 2506 #ifdef USB_DEBUG 2507 if (uhcidebug > 10) { 2508 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2509 uhci_dump_tds(data); 2510 } 2511 #endif 2512 2513 if (sc->sc_bus.use_polling) 2514 uhci_waitintr(sc, xfer); 2515 2516 return (USBD_IN_PROGRESS); 2517 } 2518 2519 /* Abort a device bulk request. */ 2520 void 2521 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2522 { 2523 DPRINTF(("uhci_device_bulk_abort:\n")); 2524 uhci_abort_xfer(xfer, USBD_CANCELLED); 2525 } 2526 2527 /* 2528 * Abort a device request. 2529 * If this routine is called at splusb() it guarantees that the request 2530 * will be removed from the hardware scheduling and that the callback 2531 * for it will be called with USBD_CANCELLED status. 2532 * It's impossible to guarantee that the requested transfer will not 2533 * have happened since the hardware runs concurrently. 2534 * If the transaction has already happened we rely on the ordinary 2535 * interrupt processing to process it. 2536 */ 2537 void 2538 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2539 { 2540 struct uhci_xfer *uxfer = UXFER(xfer); 2541 uhci_intr_info_t *ii = &uxfer->iinfo; 2542 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2543 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 2544 uhci_soft_td_t *std; 2545 int s; 2546 int wake; 2547 2548 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2549 2550 if (sc->sc_dying) { 2551 /* If we're dying, just do the software part. */ 2552 s = splusb(); 2553 xfer->status = status; /* make software ignore it */ 2554 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer); 2555 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task); 2556 uhci_transfer_complete(xfer); 2557 splx(s); 2558 return; 2559 } 2560 2561 if (xfer->device->bus->intr_context || !curproc) 2562 panic("uhci_abort_xfer: not in process context"); 2563 2564 /* 2565 * If an abort is already in progress then just wait for it to 2566 * complete and return. 2567 */ 2568 if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING) { 2569 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2570 /* No need to wait if we're aborting from a timeout. */ 2571 if (status == USBD_TIMEOUT) { 2572 #ifdef DIAGNOSTIC 2573 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2574 #endif 2575 return; 2576 } 2577 /* Override the status which might be USBD_TIMEOUT. */ 2578 xfer->status = status; 2579 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2580 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTWAIT; 2581 while (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING) 2582 tsleep(&uxfer->uhci_xfer_flags, PZERO, "uhciaw", 0); 2583 return; 2584 } 2585 2586 /* 2587 * Step 1: Make interrupt routine and hardware ignore xfer. 2588 */ 2589 s = splusb(); 2590 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTING; 2591 xfer->status = status; /* make software ignore it */ 2592 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii); 2593 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task); 2594 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2595 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2596 UHCI_STD_SYNC(sc, std, 2597 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 2598 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2599 UHCI_STD_SYNC(sc, std, 2600 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2601 } 2602 splx(s); 2603 2604 /* 2605 * Step 2: Wait until we know hardware has finished any possible 2606 * use of the xfer. Also make sure the soft interrupt routine 2607 * has run. 2608 */ 2609 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2610 s = splusb(); 2611 #ifdef USB_USE_SOFTINTR 2612 sc->sc_softwake = 1; 2613 #endif /* USB_USE_SOFTINTR */ 2614 usb_schedsoftintr(&sc->sc_bus); 2615 #ifdef USB_USE_SOFTINTR 2616 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2617 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 2618 #endif /* USB_USE_SOFTINTR */ 2619 splx(s); 2620 2621 /* 2622 * Step 3: Execute callback. 2623 */ 2624 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2625 s = splusb(); 2626 #ifdef DIAGNOSTIC 2627 ii->isdone = 1; 2628 #endif 2629 /* Do the wakeup first to avoid touching the xfer after the callback. */ 2630 wake = uxfer->uhci_xfer_flags & UHCI_XFER_ABORTWAIT; 2631 uxfer->uhci_xfer_flags &= ~(UHCI_XFER_ABORTING | UHCI_XFER_ABORTWAIT); 2632 uhci_transfer_complete(xfer); 2633 if (wake) 2634 wakeup(&uxfer->uhci_xfer_flags); 2635 splx(s); 2636 } 2637 2638 /* 2639 * Perform any UHCI-specific transfer completion operations, then 2640 * call usb_transfer_complete(). 2641 */ 2642 Static void 2643 uhci_transfer_complete(usbd_xfer_handle xfer) 2644 { 2645 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2646 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2647 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 2648 uhci_soft_td_t *p; 2649 struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf; 2650 int i, isread, n; 2651 int is_mbuf; 2652 2653 /* XXX, must be an easier way to detect reads... */ 2654 isread = ((xfer->rqflags & URQ_REQUEST) && 2655 (xfer->request.bmRequestType & UT_READ)) || 2656 (xfer->pipe->endpoint->edesc->bEndpointAddress & UE_DIR_IN); 2657 2658 if (ub) 2659 usb_sync_buffer_dma(&sc->sc_dmatag, ub, 2660 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2661 2662 uhci_aux_dma_sync(sc, &UXFER(xfer)->aux, 2663 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2664 2665 is_mbuf = UXFER(xfer)->mbuf != NULL; 2666 2667 /* Copy back from any auxillary buffers after a read operation. */ 2668 if (xfer->nframes == 0) { 2669 for (p = ii->stdstart; p != NULL; p = p->link.std) { 2670 if (p->aux_len) 2671 uhci_aux_dma_complete(p, &UXFER(xfer)->aux, 2672 is_mbuf, isread); 2673 } 2674 } else { 2675 if (xfer->nframes != 0) { 2676 /* Isoc transfer, do things differently. */ 2677 n = UXFER(xfer)->curframe; 2678 for (i = 0; i < xfer->nframes; i++) { 2679 p = upipe->u.iso.stds[n]; 2680 if (p->aux_len) 2681 uhci_aux_dma_complete(p, 2682 &UXFER(xfer)->aux, is_mbuf, isread); 2683 if (++n >= UHCI_VFRAMELIST_COUNT) 2684 n = 0; 2685 } 2686 } 2687 } 2688 2689 usb_transfer_complete(xfer); 2690 } 2691 2692 /* Close a device bulk pipe. */ 2693 void 2694 uhci_device_bulk_close(usbd_pipe_handle pipe) 2695 { 2696 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2697 usbd_device_handle dev = upipe->pipe.device; 2698 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2699 2700 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2701 pipe->endpoint->savedtoggle = upipe->nexttoggle; 2702 } 2703 2704 usbd_status 2705 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2706 { 2707 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 2708 usbd_status err; 2709 2710 /* Insert last in queue. */ 2711 err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag, 2712 &UXFER(xfer)->dmabuf); 2713 if (err) 2714 return (err); 2715 2716 /* 2717 * Pipe isn't running (otherwise err would be USBD_INPROG), 2718 * so start it first. 2719 */ 2720 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2721 } 2722 2723 usbd_status 2724 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2725 { 2726 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 2727 usbd_status err; 2728 2729 if (sc->sc_dying) 2730 return (USBD_IOERROR); 2731 2732 #ifdef DIAGNOSTIC 2733 if (!(xfer->rqflags & URQ_REQUEST)) 2734 panic("uhci_device_ctrl_transfer: not a request"); 2735 #endif 2736 2737 err = uhci_device_request(xfer); 2738 if (err) 2739 return (err); 2740 2741 if (sc->sc_bus.use_polling) 2742 uhci_waitintr(sc, xfer); 2743 return (USBD_IN_PROGRESS); 2744 } 2745 2746 usbd_status 2747 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2748 { 2749 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 2750 usbd_status err; 2751 2752 /* Insert last in queue. */ 2753 err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag, 2754 &UXFER(xfer)->dmabuf); 2755 if (err) 2756 return (err); 2757 2758 /* 2759 * Pipe isn't running (otherwise err would be USBD_INPROG), 2760 * so start it first. 2761 */ 2762 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2763 } 2764 2765 usbd_status 2766 uhci_device_intr_start(usbd_xfer_handle xfer) 2767 { 2768 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2769 usbd_device_handle dev = upipe->pipe.device; 2770 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2771 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2772 uhci_soft_td_t *data, *dataend; 2773 uhci_soft_qh_t *sqh; 2774 usbd_status err; 2775 int isread, endpt; 2776 int i, s; 2777 2778 if (sc->sc_dying) 2779 return (USBD_IOERROR); 2780 2781 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2782 xfer, xfer->length, xfer->flags)); 2783 2784 #ifdef DIAGNOSTIC 2785 if (xfer->rqflags & URQ_REQUEST) 2786 panic("uhci_device_intr_transfer: a request"); 2787 #endif 2788 2789 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2790 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2791 sqh = upipe->u.bulk.sqh; 2792 2793 upipe->u.intr.isread = isread; 2794 2795 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, xfer->flags, 2796 xfer, &data, &dataend); 2797 if (err) 2798 return (err); 2799 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2800 UHCI_STD_SYNC(sc, dataend, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2801 2802 #ifdef USB_DEBUG 2803 if (uhcidebug > 10) { 2804 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2805 uhci_dump_tds(data); 2806 uhci_dump_qh(upipe->u.intr.qhs[0]); 2807 } 2808 #endif 2809 2810 s = splusb(); 2811 /* Set up interrupt info. */ 2812 ii->xfer = xfer; 2813 ii->stdstart = data; 2814 ii->stdend = dataend; 2815 #ifdef DIAGNOSTIC 2816 if (!ii->isdone) { 2817 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2818 } 2819 ii->isdone = 0; 2820 #endif 2821 2822 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2823 upipe->u.intr.qhs[0])); 2824 for (i = 0; i < upipe->u.intr.npoll; i++) { 2825 sqh = upipe->u.intr.qhs[i]; 2826 sqh->elink = data; 2827 sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD); 2828 UHCI_SQH_SYNC(sc, sqh, 2829 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2830 } 2831 uhci_add_intr_info(sc, ii); 2832 xfer->status = USBD_IN_PROGRESS; 2833 splx(s); 2834 2835 #ifdef USB_DEBUG 2836 if (uhcidebug > 10) { 2837 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2838 uhci_dump_tds(data); 2839 uhci_dump_qh(upipe->u.intr.qhs[0]); 2840 } 2841 #endif 2842 2843 return (USBD_IN_PROGRESS); 2844 } 2845 2846 /* Abort a device control request. */ 2847 void 2848 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2849 { 2850 DPRINTF(("uhci_device_ctrl_abort:\n")); 2851 uhci_abort_xfer(xfer, USBD_CANCELLED); 2852 } 2853 2854 /* Close a device control pipe. */ 2855 void 2856 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2857 { 2858 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2859 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2860 2861 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2862 uhci_free_std_norsv(sc, upipe->u.ctl.setup); 2863 uhci_free_std_norsv(sc, upipe->u.ctl.stat); 2864 usb_freemem(&sc->sc_dmatag, &upipe->u.ctl.reqdma); 2865 } 2866 2867 /* Abort a device interrupt request. */ 2868 void 2869 uhci_device_intr_abort(usbd_xfer_handle xfer) 2870 { 2871 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2872 if (xfer->pipe->intrxfer == xfer) { 2873 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2874 xfer->pipe->intrxfer = NULL; 2875 } 2876 uhci_abort_xfer(xfer, USBD_CANCELLED); 2877 } 2878 2879 /* Close a device interrupt pipe. */ 2880 void 2881 uhci_device_intr_close(usbd_pipe_handle pipe) 2882 { 2883 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2884 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2885 int i, npoll; 2886 int s; 2887 2888 /* Unlink descriptors from controller data structures. */ 2889 npoll = upipe->u.intr.npoll; 2890 s = splusb(); 2891 for (i = 0; i < npoll; i++) 2892 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2893 splx(s); 2894 2895 /* 2896 * We now have to wait for any activity on the physical 2897 * descriptors to stop. 2898 */ 2899 usb_delay_ms(&sc->sc_bus, 2); 2900 2901 for(i = 0; i < npoll; i++) 2902 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2903 free(upipe->u.intr.qhs, M_USBHC); 2904 2905 /* XXX free other resources */ 2906 } 2907 2908 usbd_status 2909 uhci_device_request(usbd_xfer_handle xfer) 2910 { 2911 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2912 usb_device_request_t *req = &xfer->request; 2913 usbd_device_handle dev = upipe->pipe.device; 2914 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2915 int addr = dev->address; 2916 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2917 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2918 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2919 uhci_soft_qh_t *sqh; 2920 int len; 2921 u_int32_t ls; 2922 usbd_status err; 2923 int isread; 2924 int s; 2925 2926 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2927 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2928 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2929 UGETW(req->wIndex), UGETW(req->wLength), 2930 addr, endpt)); 2931 2932 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2933 isread = req->bmRequestType & UT_READ; 2934 len = UGETW(req->wLength); 2935 2936 setup = upipe->u.ctl.setup; 2937 stat = upipe->u.ctl.stat; 2938 sqh = upipe->u.ctl.sqh; 2939 2940 /* Set up data transaction */ 2941 if (len != 0) { 2942 upipe->nexttoggle = 1; 2943 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2944 xfer, &data, &dataend); 2945 if (err) 2946 return (err); 2947 next = data; 2948 dataend->link.std = stat; 2949 dataend->td.td_link = 2950 htole32(UHCI_STD_DMAADDR(stat) | UHCI_PTR_VF | UHCI_PTR_TD); 2951 UHCI_STD_SYNC(sc, dataend, 2952 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2953 } else { 2954 next = stat; 2955 } 2956 upipe->u.ctl.length = len; 2957 2958 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2959 USB_MEM_SYNC(&sc->sc_dmatag, &upipe->u.ctl.reqdma, 2960 BUS_DMASYNC_PREWRITE); 2961 2962 setup->link.std = next; 2963 setup->td.td_link = htole32(UHCI_STD_DMAADDR(next) | UHCI_PTR_VF | UHCI_PTR_TD); 2964 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2965 UHCI_TD_ACTIVE); 2966 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2967 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2968 UHCI_STD_SYNC(sc, setup, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2969 2970 stat->link.std = NULL; 2971 stat->td.td_link = htole32(UHCI_PTR_T); 2972 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2973 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2974 stat->td.td_token = 2975 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2976 UHCI_TD_IN (0, endpt, addr, 1)); 2977 stat->td.td_buffer = htole32(0); 2978 UHCI_STD_SYNC(sc, stat, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2979 2980 #ifdef USB_DEBUG 2981 if (uhcidebug > 10) { 2982 DPRINTF(("uhci_device_request: before transfer\n")); 2983 uhci_dump_tds(setup); 2984 } 2985 #endif 2986 2987 /* Set up interrupt info. */ 2988 ii->xfer = xfer; 2989 ii->stdstart = setup; 2990 ii->stdend = stat; 2991 #ifdef DIAGNOSTIC 2992 if (!ii->isdone) { 2993 printf("uhci_device_request: not done, ii=%p\n", ii); 2994 } 2995 ii->isdone = 0; 2996 #endif 2997 2998 sqh->elink = setup; 2999 sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(setup) | UHCI_PTR_TD); 3000 UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3001 3002 s = splusb(); 3003 if (dev->speed == USB_SPEED_LOW) 3004 uhci_add_ls_ctrl(sc, sqh); 3005 else 3006 uhci_add_hs_ctrl(sc, sqh); 3007 uhci_add_intr_info(sc, ii); 3008 #ifdef USB_DEBUG 3009 if (uhcidebug > 12) { 3010 uhci_soft_td_t *std; 3011 uhci_soft_qh_t *xqh; 3012 uhci_soft_qh_t *sxqh; 3013 int maxqh = 0; 3014 uhci_physaddr_t link; 3015 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 3016 for (std = sc->sc_vframes[0].htd, link = 0; 3017 (link & UHCI_PTR_QH) == 0; 3018 std = std->link.std) { 3019 link = le32toh(std->td.td_link); 3020 uhci_dump_td(std); 3021 } 3022 sxqh = (uhci_soft_qh_t *)std; 3023 uhci_dump_qh(sxqh); 3024 for (xqh = sxqh; 3025 xqh != NULL; 3026 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 3027 xqh->hlink == xqh ? NULL : xqh->hlink)) { 3028 uhci_dump_qh(xqh); 3029 } 3030 DPRINTF(("Enqueued QH:\n")); 3031 uhci_dump_qh(sqh); 3032 uhci_dump_tds(sqh->elink); 3033 } 3034 #endif 3035 if (xfer->timeout && !sc->sc_bus.use_polling) { 3036 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 3037 uhci_timeout, ii); 3038 } 3039 xfer->status = USBD_IN_PROGRESS; 3040 splx(s); 3041 3042 return (USBD_NORMAL_COMPLETION); 3043 } 3044 3045 usbd_status 3046 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 3047 { 3048 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3049 usbd_status err; 3050 3051 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 3052 3053 /* Put it on our queue, */ 3054 err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag, 3055 &UXFER(xfer)->dmabuf); 3056 3057 /* bail out on error, */ 3058 if (err && err != USBD_IN_PROGRESS) 3059 return (err); 3060 3061 /* XXX should check inuse here */ 3062 3063 /* insert into schedule, */ 3064 uhci_device_isoc_enter(xfer); 3065 3066 /* and start if the pipe wasn't running */ 3067 if (!err) 3068 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3069 3070 return (err); 3071 } 3072 3073 void 3074 uhci_device_isoc_enter(usbd_xfer_handle xfer) 3075 { 3076 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3077 usbd_device_handle dev = upipe->pipe.device; 3078 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 3079 struct iso *iso = &upipe->u.iso; 3080 uhci_soft_td_t *std; 3081 u_int32_t len, status; 3082 int s, i, isread, next, nframes, seg, segoff; 3083 struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf; 3084 bus_dma_segment_t *segs = USB_BUFFER_SEGS(ub); 3085 int nsegs = USB_BUFFER_NSEGS(ub); 3086 union uhci_bufptr bufptr; 3087 int is_mbuf; 3088 3089 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 3090 "nframes=%d\n", 3091 iso->inuse, iso->next, xfer, xfer->nframes)); 3092 3093 if (sc->sc_dying) 3094 return; 3095 3096 if (xfer->status == USBD_IN_PROGRESS) { 3097 /* This request has already been entered into the frame list */ 3098 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 3099 /* XXX */ 3100 } 3101 3102 #ifdef DIAGNOSTIC 3103 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 3104 printf("uhci_device_isoc_enter: overflow!\n"); 3105 #endif 3106 3107 next = iso->next; 3108 if (next == -1) { 3109 /* Not in use yet, schedule it a few frames ahead. */ 3110 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 3111 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 3112 } 3113 3114 xfer->status = USBD_IN_PROGRESS; 3115 UXFER(xfer)->curframe = next; 3116 3117 seg = 0; 3118 segoff = 0; 3119 uhci_bufptr_init(&bufptr, UXFER(xfer)); 3120 is_mbuf = UXFER(xfer)->mbuf != NULL; 3121 isread = xfer->pipe->endpoint->edesc->bEndpointAddress & UE_DIR_IN; 3122 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 3123 UHCI_TD_ACTIVE | 3124 UHCI_TD_IOS); 3125 nframes = xfer->nframes; 3126 s = splusb(); 3127 for (i = 0; i < nframes; i++) { 3128 std = iso->stds[next]; 3129 if (++next >= UHCI_VFRAMELIST_COUNT) 3130 next = 0; 3131 len = xfer->frlengths[i]; 3132 USB_KASSERT2(seg < nsegs, 3133 ("uhci_device_isoc_enter: too few segments")); 3134 if (len + segoff > segs[seg].ds_len) { 3135 /* UHCI can't handle non-contiguous data. */ 3136 uhci_aux_dma_alloc(std, &UXFER(xfer)->aux, &bufptr, 3137 len); 3138 3139 /* prepare aux DMA */ 3140 uhci_aux_dma_prepare(std, is_mbuf, isread); 3141 std->td.td_buffer = htole32(std->aux_dma); 3142 3143 /* skip handled segments */ 3144 segoff += len; 3145 while (segoff >= segs[seg].ds_len) { 3146 USB_KASSERT2(seg < nsegs - 1 || 3147 segoff == segs[seg].ds_len, 3148 ("uhci_device_isoc_enter: overlap2")); 3149 segoff -= segs[seg].ds_len; 3150 seg++; 3151 } 3152 } else { 3153 std->td.td_buffer = 3154 htole32(segs[seg].ds_addr + segoff); 3155 segoff += len; 3156 if (segoff >= segs[seg].ds_len) { 3157 USB_KASSERT2(segoff == segs[seg].ds_len, 3158 ("uhci_device_isoc_enter: overlap")); 3159 segoff = 0; 3160 seg++; 3161 } 3162 } 3163 if (i == nframes - 1) 3164 status |= UHCI_TD_IOC; 3165 std->td.td_status = htole32(status); 3166 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 3167 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 3168 UHCI_STD_SYNC(sc, std, 3169 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3170 #ifdef USB_DEBUG 3171 if (uhcidebug > 5) { 3172 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 3173 uhci_dump_td(std); 3174 } 3175 #endif 3176 uhci_bufptr_advance(&bufptr, len, is_mbuf); 3177 } 3178 iso->next = next; 3179 iso->inuse += xfer->nframes; 3180 3181 uhci_aux_dma_sync(sc, &UXFER(xfer)->aux, 3182 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 3183 3184 splx(s); 3185 } 3186 3187 usbd_status 3188 uhci_device_isoc_start(usbd_xfer_handle xfer) 3189 { 3190 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3191 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 3192 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3193 uhci_soft_td_t *end; 3194 int s, i; 3195 3196 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 3197 3198 if (sc->sc_dying) 3199 return (USBD_IOERROR); 3200 3201 #ifdef DIAGNOSTIC 3202 if (xfer->status != USBD_IN_PROGRESS) 3203 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3204 #endif 3205 3206 /* Find the last TD */ 3207 i = UXFER(xfer)->curframe + xfer->nframes; 3208 if (i >= UHCI_VFRAMELIST_COUNT) 3209 i -= UHCI_VFRAMELIST_COUNT; 3210 end = upipe->u.iso.stds[i]; 3211 3212 #ifdef DIAGNOSTIC 3213 if (end == NULL) { 3214 printf("uhci_device_isoc_start: end == NULL\n"); 3215 return (USBD_INVAL); 3216 } 3217 #endif 3218 3219 s = splusb(); 3220 3221 /* Set up interrupt info. */ 3222 ii->xfer = xfer; 3223 ii->stdstart = end; 3224 ii->stdend = end; 3225 #ifdef DIAGNOSTIC 3226 if (!ii->isdone) 3227 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 3228 ii->isdone = 0; 3229 #endif 3230 uhci_add_intr_info(sc, ii); 3231 3232 splx(s); 3233 3234 return (USBD_IN_PROGRESS); 3235 } 3236 3237 void 3238 uhci_device_isoc_abort(usbd_xfer_handle xfer) 3239 { 3240 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3241 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 3242 uhci_soft_td_t **stds = upipe->u.iso.stds; 3243 uhci_soft_td_t *std; 3244 int i, n, s, nframes, maxlen, len; 3245 3246 s = splusb(); 3247 3248 /* Transfer is already done. */ 3249 if (xfer->status != USBD_NOT_STARTED && 3250 xfer->status != USBD_IN_PROGRESS) { 3251 splx(s); 3252 return; 3253 } 3254 3255 /* Give xfer the requested abort code. */ 3256 xfer->status = USBD_CANCELLED; 3257 3258 /* make hardware ignore it, */ 3259 nframes = xfer->nframes; 3260 n = UXFER(xfer)->curframe; 3261 maxlen = 0; 3262 for (i = 0; i < nframes; i++) { 3263 std = stds[n]; 3264 UHCI_STD_SYNC(sc, std, 3265 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 3266 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 3267 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 3268 UHCI_STD_SYNC(sc, std, 3269 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3270 if (len > maxlen) 3271 maxlen = len; 3272 if (++n >= UHCI_VFRAMELIST_COUNT) 3273 n = 0; 3274 } 3275 3276 /* and wait until we are sure the hardware has finished. */ 3277 delay(maxlen); 3278 3279 #ifdef DIAGNOSTIC 3280 UXFER(xfer)->iinfo.isdone = 1; 3281 #endif 3282 /* Run callback and remove from interrupt list. */ 3283 uhci_transfer_complete(xfer); 3284 3285 splx(s); 3286 } 3287 3288 void 3289 uhci_device_isoc_close(usbd_pipe_handle pipe) 3290 { 3291 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3292 usbd_device_handle dev = upipe->pipe.device; 3293 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 3294 uhci_soft_td_t *std, *vstd; 3295 struct iso *iso; 3296 int i, s; 3297 3298 /* 3299 * Make sure all TDs are marked as inactive. 3300 * Wait for completion. 3301 * Unschedule. 3302 * Deallocate. 3303 */ 3304 iso = &upipe->u.iso; 3305 3306 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3307 UHCI_STD_SYNC(sc, iso->stds[i], 3308 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 3309 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 3310 UHCI_STD_SYNC(sc, iso->stds[i], 3311 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3312 } 3313 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 3314 3315 s = splusb(); 3316 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3317 std = iso->stds[i]; 3318 for (vstd = sc->sc_vframes[i].htd; 3319 vstd != NULL && vstd->link.std != std; 3320 vstd = vstd->link.std) 3321 ; 3322 if (vstd == NULL) { 3323 /*panic*/ 3324 printf("uhci_device_isoc_close: %p not found\n", std); 3325 splx(s); 3326 return; 3327 } 3328 vstd->link = std->link; 3329 vstd->td.td_link = std->td.td_link; 3330 uhci_free_std_norsv(sc, std); 3331 } 3332 splx(s); 3333 3334 free(iso->stds, M_USBHC); 3335 } 3336 3337 usbd_status 3338 uhci_setup_isoc(usbd_pipe_handle pipe) 3339 { 3340 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3341 usbd_device_handle dev = upipe->pipe.device; 3342 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 3343 int addr = upipe->pipe.device->address; 3344 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 3345 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 3346 uhci_soft_td_t *std, *vstd; 3347 u_int32_t token; 3348 struct iso *iso; 3349 int i, s; 3350 3351 iso = &upipe->u.iso; 3352 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 3353 M_USBHC, M_WAITOK); 3354 3355 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 3356 UHCI_TD_OUT(0, endpt, addr, 0); 3357 3358 /* Allocate the TDs and mark as inactive; */ 3359 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3360 std = uhci_alloc_std_norsv(sc); 3361 if (std == 0) 3362 goto bad; 3363 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 3364 std->td.td_token = htole32(token); 3365 iso->stds[i] = std; 3366 } 3367 3368 /* Insert TDs into schedule. */ 3369 s = splusb(); 3370 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3371 std = iso->stds[i]; 3372 vstd = sc->sc_vframes[i].htd; 3373 std->link = vstd->link; 3374 std->td.td_link = vstd->td.td_link; 3375 UHCI_STD_SYNC(sc, std, 3376 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3377 vstd->link.std = std; 3378 vstd->td.td_link = htole32(UHCI_STD_DMAADDR(std) | UHCI_PTR_TD); 3379 } 3380 splx(s); 3381 3382 iso->next = -1; 3383 iso->inuse = 0; 3384 3385 return (USBD_NORMAL_COMPLETION); 3386 3387 bad: 3388 while (--i >= 0) 3389 uhci_free_std_norsv(sc, iso->stds[i]); 3390 free(iso->stds, M_USBHC); 3391 return (USBD_NOMEM); 3392 } 3393 3394 void 3395 uhci_device_isoc_done(usbd_xfer_handle xfer) 3396 { 3397 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3398 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3399 3400 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 3401 xfer->actlen, xfer->busy_free)); 3402 3403 if (ii->xfer != xfer) 3404 /* Not on interrupt list, ignore it. */ 3405 return; 3406 3407 if (!uhci_active_intr_info(ii)) 3408 return; 3409 3410 #ifdef DIAGNOSTIC 3411 if (ii->stdend == NULL) { 3412 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 3413 #ifdef USB_DEBUG 3414 uhci_dump_ii(ii); 3415 #endif 3416 return; 3417 } 3418 #endif 3419 3420 /* Turn off the interrupt since it is active even if the TD is not. */ 3421 UHCI_STD_SYNC(sc, ii->stdend, 3422 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 3423 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 3424 UHCI_STD_SYNC(sc, ii->stdend, 3425 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3426 3427 uhci_del_intr_info(ii); /* remove from active list */ 3428 3429 #ifdef DIAGNOSTIC 3430 if (ii->stdend == NULL) { 3431 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 3432 #ifdef USB_DEBUG 3433 uhci_dump_ii(ii); 3434 #endif 3435 return; 3436 } 3437 #endif 3438 ii->stdstart = NULL; 3439 ii->stdend = NULL; 3440 } 3441 3442 void 3443 uhci_device_intr_done(usbd_xfer_handle xfer) 3444 { 3445 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3446 uhci_softc_t *sc = ii->sc; 3447 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3448 uhci_soft_qh_t *sqh; 3449 int i, npoll; 3450 3451 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 3452 3453 npoll = upipe->u.intr.npoll; 3454 for(i = 0; i < npoll; i++) { 3455 sqh = upipe->u.intr.qhs[i]; 3456 sqh->elink = NULL; 3457 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3458 } 3459 uhci_free_std_chain(sc, ii->stdstart, NULL); 3460 3461 /* XXX Wasteful. */ 3462 if (xfer->pipe->repeat) { 3463 uhci_soft_td_t *data, *dataend; 3464 3465 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 3466 3467 /* This alloc cannot fail since we freed the chain above. */ 3468 uhci_alloc_std_chain(upipe, sc, xfer->length, 3469 upipe->u.intr.isread, xfer->flags, xfer, 3470 &data, &dataend); 3471 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3472 UHCI_STD_SYNC(sc, dataend, 3473 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3474 3475 #ifdef USB_DEBUG 3476 if (uhcidebug > 10) { 3477 DPRINTF(("uhci_device_intr_done: data(1)\n")); 3478 uhci_dump_tds(data); 3479 uhci_dump_qh(upipe->u.intr.qhs[0]); 3480 } 3481 #endif 3482 3483 ii->stdstart = data; 3484 ii->stdend = dataend; 3485 #ifdef DIAGNOSTIC 3486 if (!ii->isdone) { 3487 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3488 } 3489 ii->isdone = 0; 3490 #endif 3491 for (i = 0; i < npoll; i++) { 3492 sqh = upipe->u.intr.qhs[i]; 3493 sqh->elink = data; 3494 sqh->qh.qh_elink = 3495 htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD); 3496 UHCI_SQH_SYNC(sc, sqh, 3497 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3498 } 3499 xfer->status = USBD_IN_PROGRESS; 3500 /* The ii is already on the examined list, just leave it. */ 3501 } else { 3502 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3503 if (uhci_active_intr_info(ii)) { 3504 uhci_del_intr_info(ii); 3505 ii->stdstart = NULL; 3506 ii->stdend = NULL; 3507 } 3508 } 3509 } 3510 3511 /* Deallocate request data structures */ 3512 void 3513 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3514 { 3515 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3516 uhci_softc_t *sc = ii->sc; 3517 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3518 3519 #ifdef DIAGNOSTIC 3520 if (!(xfer->rqflags & URQ_REQUEST)) 3521 panic("uhci_device_ctrl_done: not a request"); 3522 #endif 3523 3524 if (!uhci_active_intr_info(ii)) 3525 return; 3526 3527 uhci_del_intr_info(ii); /* remove from active list */ 3528 3529 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3530 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3531 else 3532 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3533 3534 if (upipe->u.ctl.length != 0) 3535 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3536 ii->stdstart = NULL; 3537 ii->stdend = NULL; 3538 3539 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3540 } 3541 3542 /* Deallocate request data structures */ 3543 void 3544 uhci_device_bulk_done(usbd_xfer_handle xfer) 3545 { 3546 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3547 uhci_softc_t *sc = ii->sc; 3548 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3549 3550 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3551 xfer, ii, sc, upipe)); 3552 3553 if (!uhci_active_intr_info(ii)) 3554 return; 3555 3556 uhci_del_intr_info(ii); /* remove from active list */ 3557 3558 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3559 3560 uhci_free_std_chain(sc, ii->stdstart, NULL); 3561 ii->stdstart = NULL; 3562 ii->stdend = NULL; 3563 3564 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3565 } 3566 3567 /* Add interrupt QH, called with vflock. */ 3568 void 3569 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3570 { 3571 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3572 uhci_soft_qh_t *eqh; 3573 3574 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3575 3576 eqh = vf->eqh; 3577 sqh->hlink = eqh->hlink; 3578 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3579 eqh->hlink = sqh; 3580 eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH); 3581 vf->eqh = sqh; 3582 vf->bandwidth++; 3583 } 3584 3585 /* Remove interrupt QH. */ 3586 void 3587 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3588 { 3589 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3590 uhci_soft_qh_t *pqh; 3591 3592 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3593 3594 /* See comment in uhci_remove_ctrl() */ 3595 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3596 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3597 UHCI_SQH_SYNC(sc, sqh, 3598 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3599 delay(UHCI_QH_REMOVE_DELAY); 3600 } 3601 3602 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3603 pqh->hlink = sqh->hlink; 3604 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3605 UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 3606 delay(UHCI_QH_REMOVE_DELAY); 3607 if (vf->eqh == sqh) 3608 vf->eqh = pqh; 3609 vf->bandwidth--; 3610 } 3611 3612 usbd_status 3613 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3614 { 3615 uhci_soft_qh_t *sqh; 3616 int i, npoll, s; 3617 u_int bestbw, bw, bestoffs, offs; 3618 3619 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3620 if (ival == 0) { 3621 printf("uhci_setintr: 0 interval\n"); 3622 return (USBD_INVAL); 3623 } 3624 3625 if (ival > UHCI_VFRAMELIST_COUNT) 3626 ival = UHCI_VFRAMELIST_COUNT; 3627 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3628 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3629 3630 upipe->u.intr.npoll = npoll; 3631 upipe->u.intr.qhs = 3632 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 3633 3634 /* 3635 * Figure out which offset in the schedule that has most 3636 * bandwidth left over. 3637 */ 3638 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3639 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3640 for (bw = i = 0; i < npoll; i++) 3641 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3642 if (bw < bestbw) { 3643 bestbw = bw; 3644 bestoffs = offs; 3645 } 3646 } 3647 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3648 3649 for(i = 0; i < npoll; i++) { 3650 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3651 sqh->elink = NULL; 3652 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3653 sqh->pos = MOD(i * ival + bestoffs); 3654 } 3655 #undef MOD 3656 3657 s = splusb(); 3658 /* Enter QHs into the controller data structures. */ 3659 for(i = 0; i < npoll; i++) 3660 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3661 splx(s); 3662 3663 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3664 return (USBD_NORMAL_COMPLETION); 3665 } 3666 3667 /* Open a new pipe. */ 3668 usbd_status 3669 uhci_open(usbd_pipe_handle pipe) 3670 { 3671 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3672 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3673 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3674 usbd_status err; 3675 int ival; 3676 3677 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3678 pipe, pipe->device->address, 3679 ed->bEndpointAddress, sc->sc_addr)); 3680 3681 upipe->aborting = 0; 3682 upipe->nexttoggle = pipe->endpoint->savedtoggle; 3683 3684 if (pipe->device->address == sc->sc_addr) { 3685 switch (ed->bEndpointAddress) { 3686 case USB_CONTROL_ENDPOINT: 3687 pipe->methods = &uhci_root_ctrl_methods; 3688 break; 3689 case UE_DIR_IN | UHCI_INTR_ENDPT: 3690 pipe->methods = &uhci_root_intr_methods; 3691 break; 3692 default: 3693 return (USBD_INVAL); 3694 } 3695 } else { 3696 switch (ed->bmAttributes & UE_XFERTYPE) { 3697 case UE_CONTROL: 3698 pipe->methods = &uhci_device_ctrl_methods; 3699 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3700 if (upipe->u.ctl.sqh == NULL) 3701 goto bad; 3702 upipe->u.ctl.setup = uhci_alloc_std_norsv(sc); 3703 if (upipe->u.ctl.setup == NULL) { 3704 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3705 goto bad; 3706 } 3707 upipe->u.ctl.stat = uhci_alloc_std_norsv(sc); 3708 if (upipe->u.ctl.stat == NULL) { 3709 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3710 uhci_free_std_norsv(sc, upipe->u.ctl.setup); 3711 goto bad; 3712 } 3713 err = usb_allocmem(&sc->sc_dmatag, 3714 sizeof(usb_device_request_t), 3715 0, &upipe->u.ctl.reqdma); 3716 if (err) { 3717 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3718 uhci_free_std_norsv(sc, upipe->u.ctl.setup); 3719 uhci_free_std_norsv(sc, upipe->u.ctl.stat); 3720 goto bad; 3721 } 3722 break; 3723 case UE_INTERRUPT: 3724 pipe->methods = &uhci_device_intr_methods; 3725 ival = pipe->interval; 3726 if (ival == USBD_DEFAULT_INTERVAL) 3727 ival = ed->bInterval; 3728 return (uhci_device_setintr(sc, upipe, ival)); 3729 case UE_ISOCHRONOUS: 3730 pipe->methods = &uhci_device_isoc_methods; 3731 return (uhci_setup_isoc(pipe)); 3732 case UE_BULK: 3733 pipe->methods = &uhci_device_bulk_methods; 3734 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3735 if (upipe->u.bulk.sqh == NULL) 3736 goto bad; 3737 break; 3738 } 3739 } 3740 return (USBD_NORMAL_COMPLETION); 3741 3742 bad: 3743 return (USBD_NOMEM); 3744 } 3745 3746 /* 3747 * Data structures and routines to emulate the root hub. 3748 */ 3749 const usb_device_descriptor_t uhci_devd = { 3750 USB_DEVICE_DESCRIPTOR_SIZE, 3751 UDESC_DEVICE, /* type */ 3752 {0x00, 0x01}, /* USB version */ 3753 UDCLASS_HUB, /* class */ 3754 UDSUBCLASS_HUB, /* subclass */ 3755 UDPROTO_FSHUB, /* protocol */ 3756 64, /* max packet */ 3757 {0},{0},{0x00,0x01}, /* device id */ 3758 1,2,0, /* string indicies */ 3759 1 /* # of configurations */ 3760 }; 3761 3762 const usb_config_descriptor_t uhci_confd = { 3763 USB_CONFIG_DESCRIPTOR_SIZE, 3764 UDESC_CONFIG, 3765 {USB_CONFIG_DESCRIPTOR_SIZE + 3766 USB_INTERFACE_DESCRIPTOR_SIZE + 3767 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3768 1, 3769 1, 3770 0, 3771 UC_ATTR_MBO | UC_SELF_POWERED, 3772 0 /* max power */ 3773 }; 3774 3775 const usb_interface_descriptor_t uhci_ifcd = { 3776 USB_INTERFACE_DESCRIPTOR_SIZE, 3777 UDESC_INTERFACE, 3778 0, 3779 0, 3780 1, 3781 UICLASS_HUB, 3782 UISUBCLASS_HUB, 3783 UIPROTO_FSHUB, 3784 0 3785 }; 3786 3787 const usb_endpoint_descriptor_t uhci_endpd = { 3788 USB_ENDPOINT_DESCRIPTOR_SIZE, 3789 UDESC_ENDPOINT, 3790 UE_DIR_IN | UHCI_INTR_ENDPT, 3791 UE_INTERRUPT, 3792 {8}, 3793 255 3794 }; 3795 3796 const usb_hub_descriptor_t uhci_hubd_piix = { 3797 USB_HUB_DESCRIPTOR_SIZE, 3798 UDESC_HUB, 3799 2, 3800 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3801 50, /* power on to power good */ 3802 0, 3803 { 0x00 }, /* both ports are removable */ 3804 { 0 }, 3805 }; 3806 3807 int 3808 uhci_str(usb_string_descriptor_t *p, int l, const char *s) 3809 { 3810 int i; 3811 3812 if (l == 0) 3813 return (0); 3814 p->bLength = 2 * strlen(s) + 2; 3815 if (l == 1) 3816 return (1); 3817 p->bDescriptorType = UDESC_STRING; 3818 l -= 2; 3819 for (i = 0; s[i] && l > 1; i++, l -= 2) 3820 USETW2(p->bString[i], 0, s[i]); 3821 return (2*i+2); 3822 } 3823 3824 /* 3825 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3826 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3827 * should not be used by the USB subsystem. As we cannot issue a 3828 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3829 * will be enabled as part of the reset. 3830 * 3831 * On the VT83C572, the port cannot be successfully enabled until the 3832 * outstanding "port enable change" and "connection status change" 3833 * events have been reset. 3834 */ 3835 Static usbd_status 3836 uhci_portreset(uhci_softc_t *sc, int index) 3837 { 3838 int lim, port, x; 3839 3840 if (index == 1) 3841 port = UHCI_PORTSC1; 3842 else if (index == 2) 3843 port = UHCI_PORTSC2; 3844 else 3845 return (USBD_IOERROR); 3846 3847 x = URWMASK(UREAD2(sc, port)); 3848 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3849 3850 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3851 3852 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3853 index, UREAD2(sc, port))); 3854 3855 x = URWMASK(UREAD2(sc, port)); 3856 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3857 3858 delay(100); 3859 3860 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3861 index, UREAD2(sc, port))); 3862 3863 x = URWMASK(UREAD2(sc, port)); 3864 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3865 3866 for (lim = 10; --lim > 0;) { 3867 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3868 3869 x = UREAD2(sc, port); 3870 3871 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3872 index, lim, x)); 3873 3874 if (!(x & UHCI_PORTSC_CCS)) { 3875 /* 3876 * No device is connected (or was disconnected 3877 * during reset). Consider the port reset. 3878 * The delay must be long enough to ensure on 3879 * the initial iteration that the device 3880 * connection will have been registered. 50ms 3881 * appears to be sufficient, but 20ms is not. 3882 */ 3883 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3884 index, lim)); 3885 break; 3886 } 3887 3888 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3889 /* 3890 * Port enabled changed and/or connection 3891 * status changed were set. Reset either or 3892 * both raised flags (by writing a 1 to that 3893 * bit), and wait again for state to settle. 3894 */ 3895 UWRITE2(sc, port, URWMASK(x) | 3896 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3897 continue; 3898 } 3899 3900 if (x & UHCI_PORTSC_PE) 3901 /* Port is enabled */ 3902 break; 3903 3904 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3905 } 3906 3907 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3908 index, UREAD2(sc, port))); 3909 3910 if (lim <= 0) { 3911 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3912 return (USBD_TIMEOUT); 3913 } 3914 3915 sc->sc_isreset = 1; 3916 return (USBD_NORMAL_COMPLETION); 3917 } 3918 3919 /* 3920 * Simulate a hardware hub by handling all the necessary requests. 3921 */ 3922 usbd_status 3923 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3924 { 3925 usbd_status err; 3926 3927 /* Insert last in queue. */ 3928 err = usb_insert_transfer(xfer); 3929 if (err) 3930 return (err); 3931 3932 /* 3933 * Pipe isn't running (otherwise err would be USBD_INPROG), 3934 * so start it first. 3935 */ 3936 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3937 } 3938 3939 usbd_status 3940 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3941 { 3942 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3943 usb_device_request_t *req; 3944 void *buf = NULL; 3945 int port, x; 3946 int s, len, value, index, status, change, l, totlen = 0; 3947 usb_port_status_t ps; 3948 usbd_status err; 3949 3950 if (sc->sc_dying) 3951 return (USBD_IOERROR); 3952 3953 #ifdef DIAGNOSTIC 3954 if (!(xfer->rqflags & URQ_REQUEST)) 3955 panic("uhci_root_ctrl_transfer: not a request"); 3956 #endif 3957 req = &xfer->request; 3958 3959 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3960 req->bmRequestType, req->bRequest)); 3961 3962 len = UGETW(req->wLength); 3963 value = UGETW(req->wValue); 3964 index = UGETW(req->wIndex); 3965 3966 if (len != 0) { 3967 /* mbuf transfer is not supported */ 3968 if (xfer->rqflags & URQ_DEV_MAP_MBUF) 3969 return (USBD_INVAL); 3970 buf = xfer->hcbuffer; 3971 } 3972 3973 #define C(x,y) ((x) | ((y) << 8)) 3974 switch(C(req->bRequest, req->bmRequestType)) { 3975 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3976 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3977 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3978 /* 3979 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3980 * for the integrated root hub. 3981 */ 3982 break; 3983 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3984 if (len > 0) { 3985 *(u_int8_t *)buf = sc->sc_conf; 3986 totlen = 1; 3987 } 3988 break; 3989 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3990 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3991 if (len == 0) 3992 break; 3993 switch(value >> 8) { 3994 case UDESC_DEVICE: 3995 if ((value & 0xff) != 0) { 3996 err = USBD_IOERROR; 3997 goto ret; 3998 } 3999 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 4000 memcpy(buf, &uhci_devd, l); 4001 USETW(((usb_device_descriptor_t *)buf)->idVendor, 4002 sc->sc_id_vendor); 4003 break; 4004 case UDESC_CONFIG: 4005 if ((value & 0xff) != 0) { 4006 err = USBD_IOERROR; 4007 goto ret; 4008 } 4009 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 4010 memcpy(buf, &uhci_confd, l); 4011 buf = (char *)buf + l; 4012 len -= l; 4013 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 4014 totlen += l; 4015 memcpy(buf, &uhci_ifcd, l); 4016 buf = (char *)buf + l; 4017 len -= l; 4018 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 4019 totlen += l; 4020 memcpy(buf, &uhci_endpd, l); 4021 break; 4022 case UDESC_STRING: 4023 *(u_int8_t *)buf = 0; 4024 totlen = 1; 4025 switch (value & 0xff) { 4026 case 0: /* Language table */ 4027 if (len > 0) 4028 *(u_int8_t *)buf = 4; 4029 if (len >= 4) { 4030 USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409); 4031 totlen = 4; 4032 } 4033 break; 4034 case 1: /* Vendor */ 4035 totlen = uhci_str(buf, len, sc->sc_vendor); 4036 break; 4037 case 2: /* Product */ 4038 totlen = uhci_str(buf, len, "UHCI root hub"); 4039 break; 4040 } 4041 break; 4042 default: 4043 err = USBD_IOERROR; 4044 goto ret; 4045 } 4046 break; 4047 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 4048 if (len > 0) { 4049 *(u_int8_t *)buf = 0; 4050 totlen = 1; 4051 } 4052 break; 4053 case C(UR_GET_STATUS, UT_READ_DEVICE): 4054 if (len > 1) { 4055 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 4056 totlen = 2; 4057 } 4058 break; 4059 case C(UR_GET_STATUS, UT_READ_INTERFACE): 4060 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 4061 if (len > 1) { 4062 USETW(((usb_status_t *)buf)->wStatus, 0); 4063 totlen = 2; 4064 } 4065 break; 4066 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 4067 if (value >= USB_MAX_DEVICES) { 4068 err = USBD_IOERROR; 4069 goto ret; 4070 } 4071 sc->sc_addr = value; 4072 break; 4073 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 4074 if (value != 0 && value != 1) { 4075 err = USBD_IOERROR; 4076 goto ret; 4077 } 4078 sc->sc_conf = value; 4079 break; 4080 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 4081 break; 4082 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 4083 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 4084 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 4085 err = USBD_IOERROR; 4086 goto ret; 4087 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 4088 break; 4089 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 4090 break; 4091 /* Hub requests */ 4092 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 4093 break; 4094 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 4095 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 4096 "port=%d feature=%d\n", 4097 index, value)); 4098 if (index == 1) 4099 port = UHCI_PORTSC1; 4100 else if (index == 2) 4101 port = UHCI_PORTSC2; 4102 else { 4103 err = USBD_IOERROR; 4104 goto ret; 4105 } 4106 switch(value) { 4107 case UHF_PORT_ENABLE: 4108 x = URWMASK(UREAD2(sc, port)); 4109 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 4110 break; 4111 case UHF_PORT_SUSPEND: 4112 x = URWMASK(UREAD2(sc, port)); 4113 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 4114 break; 4115 case UHF_PORT_RESET: 4116 x = URWMASK(UREAD2(sc, port)); 4117 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 4118 break; 4119 case UHF_C_PORT_CONNECTION: 4120 x = URWMASK(UREAD2(sc, port)); 4121 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 4122 break; 4123 case UHF_C_PORT_ENABLE: 4124 x = URWMASK(UREAD2(sc, port)); 4125 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 4126 break; 4127 case UHF_C_PORT_OVER_CURRENT: 4128 x = URWMASK(UREAD2(sc, port)); 4129 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 4130 break; 4131 case UHF_C_PORT_RESET: 4132 sc->sc_isreset = 0; 4133 err = USBD_NORMAL_COMPLETION; 4134 goto ret; 4135 case UHF_PORT_CONNECTION: 4136 case UHF_PORT_OVER_CURRENT: 4137 case UHF_PORT_POWER: 4138 case UHF_PORT_LOW_SPEED: 4139 case UHF_C_PORT_SUSPEND: 4140 default: 4141 err = USBD_IOERROR; 4142 goto ret; 4143 } 4144 break; 4145 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 4146 if (index == 1) 4147 port = UHCI_PORTSC1; 4148 else if (index == 2) 4149 port = UHCI_PORTSC2; 4150 else { 4151 err = USBD_IOERROR; 4152 goto ret; 4153 } 4154 if (len > 0) { 4155 *(u_int8_t *)buf = 4156 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 4157 UHCI_PORTSC_LS_SHIFT; 4158 totlen = 1; 4159 } 4160 break; 4161 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 4162 if (len == 0) 4163 break; 4164 if ((value & 0xff) != 0) { 4165 err = USBD_IOERROR; 4166 goto ret; 4167 } 4168 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 4169 totlen = l; 4170 memcpy(buf, &uhci_hubd_piix, l); 4171 break; 4172 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 4173 if (len != 4) { 4174 err = USBD_IOERROR; 4175 goto ret; 4176 } 4177 memset(buf, 0, len); 4178 totlen = len; 4179 break; 4180 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 4181 if (index == 1) 4182 port = UHCI_PORTSC1; 4183 else if (index == 2) 4184 port = UHCI_PORTSC2; 4185 else { 4186 err = USBD_IOERROR; 4187 goto ret; 4188 } 4189 if (len != 4) { 4190 err = USBD_IOERROR; 4191 goto ret; 4192 } 4193 x = UREAD2(sc, port); 4194 status = change = 0; 4195 if (x & UHCI_PORTSC_CCS) 4196 status |= UPS_CURRENT_CONNECT_STATUS; 4197 if (x & UHCI_PORTSC_CSC) 4198 change |= UPS_C_CONNECT_STATUS; 4199 if (x & UHCI_PORTSC_PE) 4200 status |= UPS_PORT_ENABLED; 4201 if (x & UHCI_PORTSC_POEDC) 4202 change |= UPS_C_PORT_ENABLED; 4203 if (x & UHCI_PORTSC_OCI) 4204 status |= UPS_OVERCURRENT_INDICATOR; 4205 if (x & UHCI_PORTSC_OCIC) 4206 change |= UPS_C_OVERCURRENT_INDICATOR; 4207 if (x & UHCI_PORTSC_SUSP) 4208 status |= UPS_SUSPEND; 4209 if (x & UHCI_PORTSC_LSDA) 4210 status |= UPS_LOW_SPEED; 4211 status |= UPS_PORT_POWER; 4212 if (sc->sc_isreset) 4213 change |= UPS_C_PORT_RESET; 4214 USETW(ps.wPortStatus, status); 4215 USETW(ps.wPortChange, change); 4216 l = min(len, sizeof ps); 4217 memcpy(buf, &ps, l); 4218 totlen = l; 4219 break; 4220 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 4221 err = USBD_IOERROR; 4222 goto ret; 4223 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 4224 break; 4225 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 4226 if (index == 1) 4227 port = UHCI_PORTSC1; 4228 else if (index == 2) 4229 port = UHCI_PORTSC2; 4230 else { 4231 err = USBD_IOERROR; 4232 goto ret; 4233 } 4234 switch(value) { 4235 case UHF_PORT_ENABLE: 4236 x = URWMASK(UREAD2(sc, port)); 4237 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 4238 break; 4239 case UHF_PORT_SUSPEND: 4240 x = URWMASK(UREAD2(sc, port)); 4241 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 4242 break; 4243 case UHF_PORT_RESET: 4244 err = uhci_portreset(sc, index); 4245 goto ret; 4246 case UHF_PORT_POWER: 4247 /* Pretend we turned on power */ 4248 err = USBD_NORMAL_COMPLETION; 4249 goto ret; 4250 case UHF_C_PORT_CONNECTION: 4251 case UHF_C_PORT_ENABLE: 4252 case UHF_C_PORT_OVER_CURRENT: 4253 case UHF_PORT_CONNECTION: 4254 case UHF_PORT_OVER_CURRENT: 4255 case UHF_PORT_LOW_SPEED: 4256 case UHF_C_PORT_SUSPEND: 4257 case UHF_C_PORT_RESET: 4258 default: 4259 err = USBD_IOERROR; 4260 goto ret; 4261 } 4262 break; 4263 default: 4264 err = USBD_IOERROR; 4265 goto ret; 4266 } 4267 xfer->actlen = totlen; 4268 err = USBD_NORMAL_COMPLETION; 4269 ret: 4270 xfer->status = err; 4271 s = splusb(); 4272 uhci_transfer_complete(xfer); 4273 splx(s); 4274 return (USBD_IN_PROGRESS); 4275 } 4276 4277 /* Abort a root control request. */ 4278 void 4279 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 4280 { 4281 /* Nothing to do, all transfers are synchronous. */ 4282 } 4283 4284 /* Close the root pipe. */ 4285 void 4286 uhci_root_ctrl_close(usbd_pipe_handle pipe) 4287 { 4288 DPRINTF(("uhci_root_ctrl_close\n")); 4289 } 4290 4291 /* Abort a root interrupt request. */ 4292 void 4293 uhci_root_intr_abort(usbd_xfer_handle xfer) 4294 { 4295 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 4296 4297 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer); 4298 sc->sc_intr_xfer = NULL; 4299 4300 if (xfer->pipe->intrxfer == xfer) { 4301 DPRINTF(("uhci_root_intr_abort: remove\n")); 4302 xfer->pipe->intrxfer = 0; 4303 } 4304 xfer->status = USBD_CANCELLED; 4305 #ifdef DIAGNOSTIC 4306 UXFER(xfer)->iinfo.isdone = 1; 4307 #endif 4308 uhci_transfer_complete(xfer); 4309 } 4310 4311 usbd_status 4312 uhci_root_intr_transfer(usbd_xfer_handle xfer) 4313 { 4314 usbd_status err; 4315 4316 /* Insert last in queue. */ 4317 err = usb_insert_transfer(xfer); 4318 if (err) 4319 return (err); 4320 4321 /* 4322 * Pipe isn't running (otherwise err would be USBD_INPROG), 4323 * so start it first. 4324 */ 4325 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 4326 } 4327 4328 /* Start a transfer on the root interrupt pipe */ 4329 usbd_status 4330 uhci_root_intr_start(usbd_xfer_handle xfer) 4331 { 4332 usbd_pipe_handle pipe = xfer->pipe; 4333 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 4334 4335 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 4336 xfer, xfer->length, xfer->flags)); 4337 4338 if (sc->sc_dying) 4339 return (USBD_IOERROR); 4340 4341 if (xfer->rqflags & URQ_DEV_MAP_MBUF) 4342 return (USBD_INVAL); /* mbuf transfer is not supported */ 4343 4344 sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval); 4345 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 4346 sc->sc_intr_xfer = xfer; 4347 return (USBD_IN_PROGRESS); 4348 } 4349 4350 /* Close the root interrupt pipe. */ 4351 void 4352 uhci_root_intr_close(usbd_pipe_handle pipe) 4353 { 4354 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 4355 4356 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer); 4357 sc->sc_intr_xfer = NULL; 4358 DPRINTF(("uhci_root_intr_close\n")); 4359 } 4360
Indexes created Tue Sep 30 20:09:53 GMT 2025