uhci.c revision 1.221.2.1
1 /* $NetBSD: uhci.c,v 1.221.2.1 2008/06/18 16:33:26 simonb Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm 39 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.221.2.1 2008/06/18 16:33:26 simonb Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #include <sys/select.h> 54 #include <sys/extent.h> 55 #include <uvm/uvm_extern.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #include <machine/bus_pio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) 61 #include <sys/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 #include <sys/bus.h> 67 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/uhcireg.h> 77 #include <dev/usb/uhcivar.h> 78 #include <dev/usb/usbroothub_subr.h> 79 80 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 81 /*#define UHCI_CTL_LOOP */ 82 83 #if defined(__FreeBSD__) 84 #include <machine/clock.h> 85 86 #define delay(d) DELAY(d) 87 #endif 88 89 #if defined(__OpenBSD__) 90 struct cfdriver uhci_cd = { 91 NULL, "uhci", DV_DULL 92 }; 93 #endif 94 95 #ifdef UHCI_DEBUG 96 uhci_softc_t *thesc; 97 #define DPRINTF(x) if (uhcidebug) printf x 98 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 99 int uhcidebug = 0; 100 int uhcinoloop = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The UHCI controller is little endian, so on big endian machines 111 * the data stored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct uhci_pipe { 124 struct usbd_pipe pipe; 125 int nexttoggle; 126 127 u_char aborting; 128 usbd_xfer_handle abortstart, abortend; 129 130 /* Info needed for different pipe kinds. */ 131 union { 132 /* Control pipe */ 133 struct { 134 uhci_soft_qh_t *sqh; 135 usb_dma_t reqdma; 136 uhci_soft_td_t *setup, *stat; 137 u_int length; 138 } ctl; 139 /* Interrupt pipe */ 140 struct { 141 int npoll; 142 int isread; 143 uhci_soft_qh_t **qhs; 144 } intr; 145 /* Bulk pipe */ 146 struct { 147 uhci_soft_qh_t *sqh; 148 u_int length; 149 int isread; 150 } bulk; 151 /* Iso pipe */ 152 struct iso { 153 uhci_soft_td_t **stds; 154 int next, inuse; 155 } iso; 156 } u; 157 }; 158 159 Static void uhci_globalreset(uhci_softc_t *); 160 Static usbd_status uhci_portreset(uhci_softc_t*, int); 161 Static void uhci_reset(uhci_softc_t *); 162 Static usbd_status uhci_run(uhci_softc_t *, int run); 163 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 164 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 165 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 166 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 167 #if 0 168 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 169 uhci_intr_info_t *); 170 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 171 #endif 172 173 Static void uhci_free_std_chain(uhci_softc_t *, 174 uhci_soft_td_t *, uhci_soft_td_t *); 175 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 176 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 177 uhci_soft_td_t **, uhci_soft_td_t **); 178 Static void uhci_poll_hub(void *); 179 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 180 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 181 Static void uhci_idone(uhci_intr_info_t *); 182 183 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 184 185 Static void uhci_timeout(void *); 186 Static void uhci_timeout_task(void *); 187 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 188 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 189 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 190 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 191 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 192 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 193 Static void uhci_add_loop(uhci_softc_t *sc); 194 Static void uhci_rem_loop(uhci_softc_t *sc); 195 196 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 197 Static void uhci_device_isoc_enter(usbd_xfer_handle); 198 199 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 200 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 201 202 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 203 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 204 205 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 206 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 207 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 208 Static void uhci_device_ctrl_close(usbd_pipe_handle); 209 Static void uhci_device_ctrl_done(usbd_xfer_handle); 210 211 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 212 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 213 Static void uhci_device_intr_abort(usbd_xfer_handle); 214 Static void uhci_device_intr_close(usbd_pipe_handle); 215 Static void uhci_device_intr_done(usbd_xfer_handle); 216 217 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 218 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 219 Static void uhci_device_bulk_abort(usbd_xfer_handle); 220 Static void uhci_device_bulk_close(usbd_pipe_handle); 221 Static void uhci_device_bulk_done(usbd_xfer_handle); 222 223 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 224 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 225 Static void uhci_device_isoc_abort(usbd_xfer_handle); 226 Static void uhci_device_isoc_close(usbd_pipe_handle); 227 Static void uhci_device_isoc_done(usbd_xfer_handle); 228 229 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 230 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 231 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 232 Static void uhci_root_ctrl_close(usbd_pipe_handle); 233 Static void uhci_root_ctrl_done(usbd_xfer_handle); 234 235 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 236 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 237 Static void uhci_root_intr_abort(usbd_xfer_handle); 238 Static void uhci_root_intr_close(usbd_pipe_handle); 239 Static void uhci_root_intr_done(usbd_xfer_handle); 240 241 Static usbd_status uhci_open(usbd_pipe_handle); 242 Static void uhci_poll(struct usbd_bus *); 243 Static void uhci_softintr(void *); 244 245 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 246 247 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 248 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 249 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 250 struct uhci_pipe *pipe, int ival); 251 252 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 253 Static void uhci_noop(usbd_pipe_handle pipe); 254 255 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 256 uhci_soft_qh_t *); 257 258 #ifdef UHCI_DEBUG 259 Static void uhci_dump_all(uhci_softc_t *); 260 Static void uhci_dumpregs(uhci_softc_t *); 261 Static void uhci_dump_qhs(uhci_soft_qh_t *); 262 Static void uhci_dump_qh(uhci_soft_qh_t *); 263 Static void uhci_dump_tds(uhci_soft_td_t *); 264 Static void uhci_dump_td(uhci_soft_td_t *); 265 Static void uhci_dump_ii(uhci_intr_info_t *ii); 266 void uhci_dump(void); 267 #endif 268 269 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 270 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 271 #define UWRITE1(sc, r, x) \ 272 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 273 } while (/*CONSTCOND*/0) 274 #define UWRITE2(sc, r, x) \ 275 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 276 } while (/*CONSTCOND*/0) 277 #define UWRITE4(sc, r, x) \ 278 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 279 } while (/*CONSTCOND*/0) 280 static __inline uint8_t 281 UREAD1(uhci_softc_t *sc, bus_size_t r) 282 { 283 284 UBARR(sc); 285 return bus_space_read_1(sc->iot, sc->ioh, r); 286 } 287 288 static __inline uint16_t 289 UREAD2(uhci_softc_t *sc, bus_size_t r) 290 { 291 292 UBARR(sc); 293 return bus_space_read_2(sc->iot, sc->ioh, r); 294 } 295 296 static __inline uint32_t 297 UREAD4(uhci_softc_t *sc, bus_size_t r) 298 { 299 300 UBARR(sc); 301 return bus_space_read_4(sc->iot, sc->ioh, r); 302 } 303 304 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 305 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 306 307 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 308 309 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 310 311 #define UHCI_INTR_ENDPT 1 312 313 const struct usbd_bus_methods uhci_bus_methods = { 314 uhci_open, 315 uhci_softintr, 316 uhci_poll, 317 uhci_allocm, 318 uhci_freem, 319 uhci_allocx, 320 uhci_freex, 321 }; 322 323 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 324 uhci_root_ctrl_transfer, 325 uhci_root_ctrl_start, 326 uhci_root_ctrl_abort, 327 uhci_root_ctrl_close, 328 uhci_noop, 329 uhci_root_ctrl_done, 330 }; 331 332 const struct usbd_pipe_methods uhci_root_intr_methods = { 333 uhci_root_intr_transfer, 334 uhci_root_intr_start, 335 uhci_root_intr_abort, 336 uhci_root_intr_close, 337 uhci_noop, 338 uhci_root_intr_done, 339 }; 340 341 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 342 uhci_device_ctrl_transfer, 343 uhci_device_ctrl_start, 344 uhci_device_ctrl_abort, 345 uhci_device_ctrl_close, 346 uhci_noop, 347 uhci_device_ctrl_done, 348 }; 349 350 const struct usbd_pipe_methods uhci_device_intr_methods = { 351 uhci_device_intr_transfer, 352 uhci_device_intr_start, 353 uhci_device_intr_abort, 354 uhci_device_intr_close, 355 uhci_device_clear_toggle, 356 uhci_device_intr_done, 357 }; 358 359 const struct usbd_pipe_methods uhci_device_bulk_methods = { 360 uhci_device_bulk_transfer, 361 uhci_device_bulk_start, 362 uhci_device_bulk_abort, 363 uhci_device_bulk_close, 364 uhci_device_clear_toggle, 365 uhci_device_bulk_done, 366 }; 367 368 const struct usbd_pipe_methods uhci_device_isoc_methods = { 369 uhci_device_isoc_transfer, 370 uhci_device_isoc_start, 371 uhci_device_isoc_abort, 372 uhci_device_isoc_close, 373 uhci_noop, 374 uhci_device_isoc_done, 375 }; 376 377 #define uhci_add_intr_info(sc, ii) \ 378 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 379 #define uhci_del_intr_info(ii) \ 380 do { \ 381 LIST_REMOVE((ii), list); \ 382 (ii)->list.le_prev = NULL; \ 383 } while (0) 384 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 385 386 Static inline uhci_soft_qh_t * 387 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 388 { 389 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 390 391 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 392 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 393 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 394 printf("uhci_find_prev_qh: QH not found\n"); 395 return (NULL); 396 } 397 #endif 398 } 399 return (pqh); 400 } 401 402 void 403 uhci_globalreset(uhci_softc_t *sc) 404 { 405 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 406 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 407 UHCICMD(sc, 0); /* do nothing */ 408 } 409 410 usbd_status 411 uhci_init(uhci_softc_t *sc) 412 { 413 usbd_status err; 414 int i, j; 415 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 416 uhci_soft_td_t *std; 417 418 DPRINTFN(1,("uhci_init: start\n")); 419 420 #ifdef UHCI_DEBUG 421 thesc = sc; 422 423 if (uhcidebug > 2) 424 uhci_dumpregs(sc); 425 #endif 426 427 sc->sc_suspend = PWR_RESUME; 428 429 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 430 uhci_globalreset(sc); /* reset the controller */ 431 uhci_reset(sc); 432 433 #ifdef __NetBSD__ 434 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 435 USB_MEM_RESERVE); 436 #endif 437 438 /* Allocate and initialize real frame array. */ 439 err = usb_allocmem(&sc->sc_bus, 440 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 441 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 442 if (err) 443 return (err); 444 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 445 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 446 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 447 448 /* 449 * Allocate a TD, inactive, that hangs from the last QH. 450 * This is to avoid a bug in the PIIX that makes it run berserk 451 * otherwise. 452 */ 453 std = uhci_alloc_std(sc); 454 if (std == NULL) 455 return (USBD_NOMEM); 456 std->link.std = NULL; 457 std->td.td_link = htole32(UHCI_PTR_T); 458 std->td.td_status = htole32(0); /* inactive */ 459 std->td.td_token = htole32(0); 460 std->td.td_buffer = htole32(0); 461 462 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 463 lsqh = uhci_alloc_sqh(sc); 464 if (lsqh == NULL) 465 return (USBD_NOMEM); 466 lsqh->hlink = NULL; 467 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 468 lsqh->elink = std; 469 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 470 sc->sc_last_qh = lsqh; 471 472 /* Allocate the dummy QH where bulk traffic will be queued. */ 473 bsqh = uhci_alloc_sqh(sc); 474 if (bsqh == NULL) 475 return (USBD_NOMEM); 476 bsqh->hlink = lsqh; 477 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 478 bsqh->elink = NULL; 479 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 480 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 481 482 /* Allocate dummy QH where high speed control traffic will be queued. */ 483 chsqh = uhci_alloc_sqh(sc); 484 if (chsqh == NULL) 485 return (USBD_NOMEM); 486 chsqh->hlink = bsqh; 487 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 488 chsqh->elink = NULL; 489 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 490 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 491 492 /* Allocate dummy QH where control traffic will be queued. */ 493 clsqh = uhci_alloc_sqh(sc); 494 if (clsqh == NULL) 495 return (USBD_NOMEM); 496 clsqh->hlink = chsqh; 497 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 498 clsqh->elink = NULL; 499 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 500 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 501 502 /* 503 * Make all (virtual) frame list pointers point to the interrupt 504 * queue heads and the interrupt queue heads at the control 505 * queue head and point the physical frame list to the virtual. 506 */ 507 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 508 std = uhci_alloc_std(sc); 509 sqh = uhci_alloc_sqh(sc); 510 if (std == NULL || sqh == NULL) 511 return (USBD_NOMEM); 512 std->link.sqh = sqh; 513 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 514 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 515 std->td.td_token = htole32(0); 516 std->td.td_buffer = htole32(0); 517 sqh->hlink = clsqh; 518 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 519 sqh->elink = NULL; 520 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 521 sc->sc_vframes[i].htd = std; 522 sc->sc_vframes[i].etd = std; 523 sc->sc_vframes[i].hqh = sqh; 524 sc->sc_vframes[i].eqh = sqh; 525 for (j = i; 526 j < UHCI_FRAMELIST_COUNT; 527 j += UHCI_VFRAMELIST_COUNT) 528 sc->sc_pframes[j] = htole32(std->physaddr); 529 } 530 531 LIST_INIT(&sc->sc_intrhead); 532 533 SIMPLEQ_INIT(&sc->sc_free_xfers); 534 535 usb_callout_init(sc->sc_poll_handle); 536 537 /* Set up the bus struct. */ 538 sc->sc_bus.methods = &uhci_bus_methods; 539 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 540 541 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 542 543 DPRINTFN(1,("uhci_init: enabling\n")); 544 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 545 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 546 547 return (uhci_run(sc, 1)); /* and here we go... */ 548 } 549 550 #if defined(__NetBSD__) || defined(__OpenBSD__) 551 int 552 uhci_activate(device_t self, enum devact act) 553 { 554 struct uhci_softc *sc = device_private(self); 555 int rv = 0; 556 557 switch (act) { 558 case DVACT_ACTIVATE: 559 return (EOPNOTSUPP); 560 561 case DVACT_DEACTIVATE: 562 sc->sc_dying = 1; 563 if (sc->sc_child != NULL) 564 rv = config_deactivate(sc->sc_child); 565 break; 566 } 567 return (rv); 568 } 569 570 void 571 uhci_childdet(device_t self, device_t child) 572 { 573 struct uhci_softc *sc = device_private(self); 574 575 KASSERT(sc->sc_child == child); 576 sc->sc_child = NULL; 577 } 578 579 int 580 uhci_detach(struct uhci_softc *sc, int flags) 581 { 582 usbd_xfer_handle xfer; 583 int rv = 0; 584 585 if (sc->sc_child != NULL) 586 rv = config_detach(sc->sc_child, flags); 587 588 if (rv != 0) 589 return (rv); 590 591 /* Free all xfers associated with this HC. */ 592 for (;;) { 593 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 594 if (xfer == NULL) 595 break; 596 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 597 free(xfer, M_USB); 598 } 599 600 /* XXX free other data structures XXX */ 601 602 return (rv); 603 } 604 #endif 605 606 usbd_status 607 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 608 { 609 struct uhci_softc *sc = bus->hci_private; 610 usbd_status status; 611 u_int32_t n; 612 613 /* 614 * XXX 615 * Since we are allocating a buffer we can assume that we will 616 * need TDs for it. Since we don't want to allocate those from 617 * an interrupt context, we allocate them here and free them again. 618 * This is no guarantee that we'll get the TDs next time... 619 */ 620 n = size / 8; 621 if (n > 16) { 622 u_int32_t i; 623 uhci_soft_td_t **stds; 624 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 625 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 626 M_WAITOK|M_ZERO); 627 for(i=0; i < n; i++) 628 stds[i] = uhci_alloc_std(sc); 629 for(i=0; i < n; i++) 630 if (stds[i] != NULL) 631 uhci_free_std(sc, stds[i]); 632 free(stds, M_TEMP); 633 } 634 635 636 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 637 #ifdef __NetBSD__ 638 if (status == USBD_NOMEM) 639 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 640 #endif 641 return status; 642 } 643 644 void 645 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 646 { 647 #ifdef __NetBSD__ 648 if (dma->block->flags & USB_DMA_RESERVE) { 649 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 650 dma); 651 return; 652 } 653 #endif 654 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 655 } 656 657 usbd_xfer_handle 658 uhci_allocx(struct usbd_bus *bus) 659 { 660 struct uhci_softc *sc = bus->hci_private; 661 usbd_xfer_handle xfer; 662 663 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 664 if (xfer != NULL) { 665 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 666 #ifdef DIAGNOSTIC 667 if (xfer->busy_free != XFER_FREE) { 668 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 669 xfer->busy_free); 670 } 671 #endif 672 } else { 673 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 674 } 675 if (xfer != NULL) { 676 memset(xfer, 0, sizeof (struct uhci_xfer)); 677 UXFER(xfer)->iinfo.sc = sc; 678 #ifdef DIAGNOSTIC 679 UXFER(xfer)->iinfo.isdone = 1; 680 xfer->busy_free = XFER_BUSY; 681 #endif 682 } 683 return (xfer); 684 } 685 686 void 687 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 688 { 689 struct uhci_softc *sc = bus->hci_private; 690 691 #ifdef DIAGNOSTIC 692 if (xfer->busy_free != XFER_BUSY) { 693 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 694 xfer->busy_free); 695 } 696 xfer->busy_free = XFER_FREE; 697 if (!UXFER(xfer)->iinfo.isdone) { 698 printf("uhci_freex: !isdone\n"); 699 } 700 #endif 701 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 702 } 703 704 /* 705 * Handle suspend/resume. 706 * 707 * We need to switch to polling mode here, because this routine is 708 * called from an interrupt context. This is all right since we 709 * are almost suspended anyway. 710 */ 711 bool 712 uhci_resume(device_t dv PMF_FN_ARGS) 713 { 714 uhci_softc_t *sc = device_private(dv); 715 int cmd; 716 int s; 717 718 s = splhardusb(); 719 720 cmd = UREAD2(sc, UHCI_CMD); 721 sc->sc_bus.use_polling++; 722 UWRITE2(sc, UHCI_INTR, 0); 723 uhci_globalreset(sc); 724 uhci_reset(sc); 725 if (cmd & UHCI_CMD_RS) 726 uhci_run(sc, 0); 727 728 /* restore saved state */ 729 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 730 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 731 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 732 733 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 734 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 735 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 736 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 737 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 738 UHCICMD(sc, UHCI_CMD_MAXP); 739 uhci_run(sc, 1); /* and start traffic again */ 740 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 741 sc->sc_bus.use_polling--; 742 if (sc->sc_intr_xfer != NULL) 743 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 744 sc->sc_intr_xfer); 745 #ifdef UHCI_DEBUG 746 if (uhcidebug > 2) 747 uhci_dumpregs(sc); 748 #endif 749 750 sc->sc_suspend = PWR_RESUME; 751 splx(s); 752 753 return true; 754 } 755 756 bool 757 uhci_suspend(device_t dv PMF_FN_ARGS) 758 { 759 uhci_softc_t *sc = device_private(dv); 760 int cmd; 761 int s; 762 763 s = splhardusb(); 764 765 cmd = UREAD2(sc, UHCI_CMD); 766 767 #ifdef UHCI_DEBUG 768 if (uhcidebug > 2) 769 uhci_dumpregs(sc); 770 #endif 771 if (sc->sc_intr_xfer != NULL) 772 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, 773 sc->sc_intr_xfer); 774 sc->sc_suspend = PWR_SUSPEND; 775 sc->sc_bus.use_polling++; 776 777 uhci_run(sc, 0); /* stop the controller */ 778 cmd &= ~UHCI_CMD_RS; 779 780 /* save some state if BIOS doesn't */ 781 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 782 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 783 784 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 785 786 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 787 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 788 sc->sc_bus.use_polling--; 789 790 splx(s); 791 792 return true; 793 } 794 795 #ifdef UHCI_DEBUG 796 Static void 797 uhci_dumpregs(uhci_softc_t *sc) 798 { 799 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 800 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 801 device_xname(sc->sc_dev), 802 UREAD2(sc, UHCI_CMD), 803 UREAD2(sc, UHCI_STS), 804 UREAD2(sc, UHCI_INTR), 805 UREAD2(sc, UHCI_FRNUM), 806 UREAD4(sc, UHCI_FLBASEADDR), 807 UREAD1(sc, UHCI_SOF), 808 UREAD2(sc, UHCI_PORTSC1), 809 UREAD2(sc, UHCI_PORTSC2))); 810 } 811 812 void 813 uhci_dump_td(uhci_soft_td_t *p) 814 { 815 char sbuf[128], sbuf2[128]; 816 817 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 818 "token=0x%08lx buffer=0x%08lx\n", 819 p, (long)p->physaddr, 820 (long)le32toh(p->td.td_link), 821 (long)le32toh(p->td.td_status), 822 (long)le32toh(p->td.td_token), 823 (long)le32toh(p->td.td_buffer))); 824 825 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF", 826 sbuf, sizeof(sbuf)); 827 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status), 828 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 829 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 830 sbuf2, sizeof(sbuf2)); 831 832 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 833 "D=%d,maxlen=%d\n", sbuf, sbuf2, 834 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 835 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 836 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 837 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 838 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 839 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 840 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 841 } 842 843 void 844 uhci_dump_qh(uhci_soft_qh_t *sqh) 845 { 846 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 847 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 848 le32toh(sqh->qh.qh_elink))); 849 } 850 851 852 #if 1 853 void 854 uhci_dump(void) 855 { 856 uhci_dump_all(thesc); 857 } 858 #endif 859 860 void 861 uhci_dump_all(uhci_softc_t *sc) 862 { 863 uhci_dumpregs(sc); 864 printf("intrs=%d\n", sc->sc_bus.no_intrs); 865 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 866 uhci_dump_qh(sc->sc_lctl_start); 867 } 868 869 870 void 871 uhci_dump_qhs(uhci_soft_qh_t *sqh) 872 { 873 uhci_dump_qh(sqh); 874 875 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 876 * Traverses sideways first, then down. 877 * 878 * QH1 879 * QH2 880 * No QH 881 * TD2.1 882 * TD2.2 883 * TD1.1 884 * etc. 885 * 886 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 887 */ 888 889 890 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 891 uhci_dump_qhs(sqh->hlink); 892 else 893 DPRINTF(("No QH\n")); 894 895 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 896 uhci_dump_tds(sqh->elink); 897 else 898 DPRINTF(("No TD\n")); 899 } 900 901 void 902 uhci_dump_tds(uhci_soft_td_t *std) 903 { 904 uhci_soft_td_t *td; 905 906 for(td = std; td != NULL; td = td->link.std) { 907 uhci_dump_td(td); 908 909 /* Check whether the link pointer in this TD marks 910 * the link pointer as end of queue. This avoids 911 * printing the free list in case the queue/TD has 912 * already been moved there (seatbelt). 913 */ 914 if (le32toh(td->td.td_link) & UHCI_PTR_T || 915 le32toh(td->td.td_link) == 0) 916 break; 917 } 918 } 919 920 Static void 921 uhci_dump_ii(uhci_intr_info_t *ii) 922 { 923 usbd_pipe_handle pipe; 924 usb_endpoint_descriptor_t *ed; 925 usbd_device_handle dev; 926 927 #ifdef DIAGNOSTIC 928 #define DONE ii->isdone 929 #else 930 #define DONE 0 931 #endif 932 if (ii == NULL) { 933 printf("ii NULL\n"); 934 return; 935 } 936 if (ii->xfer == NULL) { 937 printf("ii %p: done=%d xfer=NULL\n", 938 ii, DONE); 939 return; 940 } 941 pipe = ii->xfer->pipe; 942 if (pipe == NULL) { 943 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 944 ii, DONE, ii->xfer); 945 return; 946 } 947 if (pipe->endpoint == NULL) { 948 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 949 ii, DONE, ii->xfer, pipe); 950 return; 951 } 952 if (pipe->device == NULL) { 953 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 954 ii, DONE, ii->xfer, pipe); 955 return; 956 } 957 ed = pipe->endpoint->edesc; 958 dev = pipe->device; 959 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 960 ii, DONE, ii->xfer, dev, 961 UGETW(dev->ddesc.idVendor), 962 UGETW(dev->ddesc.idProduct), 963 dev->address, pipe, 964 ed->bEndpointAddress, ed->bmAttributes); 965 #undef DONE 966 } 967 968 void uhci_dump_iis(struct uhci_softc *sc); 969 void 970 uhci_dump_iis(struct uhci_softc *sc) 971 { 972 uhci_intr_info_t *ii; 973 974 printf("intr_info list:\n"); 975 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 976 uhci_dump_ii(ii); 977 } 978 979 void iidump(void); 980 void iidump(void) { uhci_dump_iis(thesc); } 981 982 #endif 983 984 /* 985 * This routine is executed periodically and simulates interrupts 986 * from the root controller interrupt pipe for port status change. 987 */ 988 void 989 uhci_poll_hub(void *addr) 990 { 991 usbd_xfer_handle xfer = addr; 992 usbd_pipe_handle pipe = xfer->pipe; 993 uhci_softc_t *sc = pipe->device->bus->hci_private; 994 int s; 995 u_char *p; 996 997 DPRINTFN(20, ("uhci_poll_hub\n")); 998 999 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1000 1001 p = KERNADDR(&xfer->dmabuf, 0); 1002 p[0] = 0; 1003 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1004 p[0] |= 1<<1; 1005 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1006 p[0] |= 1<<2; 1007 if (p[0] == 0) 1008 /* No change, try again in a while */ 1009 return; 1010 1011 xfer->actlen = 1; 1012 xfer->status = USBD_NORMAL_COMPLETION; 1013 s = splusb(); 1014 xfer->device->bus->intr_context++; 1015 usb_transfer_complete(xfer); 1016 xfer->device->bus->intr_context--; 1017 splx(s); 1018 } 1019 1020 void 1021 uhci_root_intr_done(usbd_xfer_handle xfer) 1022 { 1023 } 1024 1025 void 1026 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1027 { 1028 } 1029 1030 /* 1031 * Let the last QH loop back to the high speed control transfer QH. 1032 * This is what intel calls "bandwidth reclamation" and improves 1033 * USB performance a lot for some devices. 1034 * If we are already looping, just count it. 1035 */ 1036 void 1037 uhci_add_loop(uhci_softc_t *sc) { 1038 #ifdef UHCI_DEBUG 1039 if (uhcinoloop) 1040 return; 1041 #endif 1042 if (++sc->sc_loops == 1) { 1043 DPRINTFN(5,("uhci_start_loop: add\n")); 1044 /* Note, we don't loop back the soft pointer. */ 1045 sc->sc_last_qh->qh.qh_hlink = 1046 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1047 } 1048 } 1049 1050 void 1051 uhci_rem_loop(uhci_softc_t *sc) { 1052 #ifdef UHCI_DEBUG 1053 if (uhcinoloop) 1054 return; 1055 #endif 1056 if (--sc->sc_loops == 0) { 1057 DPRINTFN(5,("uhci_end_loop: remove\n")); 1058 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1059 } 1060 } 1061 1062 /* Add high speed control QH, called at splusb(). */ 1063 void 1064 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1065 { 1066 uhci_soft_qh_t *eqh; 1067 1068 SPLUSBCHECK; 1069 1070 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1071 eqh = sc->sc_hctl_end; 1072 sqh->hlink = eqh->hlink; 1073 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1074 eqh->hlink = sqh; 1075 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1076 sc->sc_hctl_end = sqh; 1077 #ifdef UHCI_CTL_LOOP 1078 uhci_add_loop(sc); 1079 #endif 1080 } 1081 1082 /* Remove high speed control QH, called at splusb(). */ 1083 void 1084 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1085 { 1086 uhci_soft_qh_t *pqh; 1087 1088 SPLUSBCHECK; 1089 1090 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1091 #ifdef UHCI_CTL_LOOP 1092 uhci_rem_loop(sc); 1093 #endif 1094 /* 1095 * The T bit should be set in the elink of the QH so that the HC 1096 * doesn't follow the pointer. This condition may fail if the 1097 * the transferred packet was short so that the QH still points 1098 * at the last used TD. 1099 * In this case we set the T bit and wait a little for the HC 1100 * to stop looking at the TD. 1101 */ 1102 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1103 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1104 delay(UHCI_QH_REMOVE_DELAY); 1105 } 1106 1107 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1108 pqh->hlink = sqh->hlink; 1109 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1110 delay(UHCI_QH_REMOVE_DELAY); 1111 if (sc->sc_hctl_end == sqh) 1112 sc->sc_hctl_end = pqh; 1113 } 1114 1115 /* Add low speed control QH, called at splusb(). */ 1116 void 1117 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1118 { 1119 uhci_soft_qh_t *eqh; 1120 1121 SPLUSBCHECK; 1122 1123 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1124 eqh = sc->sc_lctl_end; 1125 sqh->hlink = eqh->hlink; 1126 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1127 eqh->hlink = sqh; 1128 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1129 sc->sc_lctl_end = sqh; 1130 } 1131 1132 /* Remove low speed control QH, called at splusb(). */ 1133 void 1134 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1135 { 1136 uhci_soft_qh_t *pqh; 1137 1138 SPLUSBCHECK; 1139 1140 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1141 /* See comment in uhci_remove_hs_ctrl() */ 1142 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1143 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1144 delay(UHCI_QH_REMOVE_DELAY); 1145 } 1146 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1147 pqh->hlink = sqh->hlink; 1148 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1149 delay(UHCI_QH_REMOVE_DELAY); 1150 if (sc->sc_lctl_end == sqh) 1151 sc->sc_lctl_end = pqh; 1152 } 1153 1154 /* Add bulk QH, called at splusb(). */ 1155 void 1156 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1157 { 1158 uhci_soft_qh_t *eqh; 1159 1160 SPLUSBCHECK; 1161 1162 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1163 eqh = sc->sc_bulk_end; 1164 sqh->hlink = eqh->hlink; 1165 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1166 eqh->hlink = sqh; 1167 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1168 sc->sc_bulk_end = sqh; 1169 uhci_add_loop(sc); 1170 } 1171 1172 /* Remove bulk QH, called at splusb(). */ 1173 void 1174 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1175 { 1176 uhci_soft_qh_t *pqh; 1177 1178 SPLUSBCHECK; 1179 1180 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1181 uhci_rem_loop(sc); 1182 /* See comment in uhci_remove_hs_ctrl() */ 1183 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1184 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1185 delay(UHCI_QH_REMOVE_DELAY); 1186 } 1187 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1188 pqh->hlink = sqh->hlink; 1189 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1190 delay(UHCI_QH_REMOVE_DELAY); 1191 if (sc->sc_bulk_end == sqh) 1192 sc->sc_bulk_end = pqh; 1193 } 1194 1195 Static int uhci_intr1(uhci_softc_t *); 1196 1197 int 1198 uhci_intr(void *arg) 1199 { 1200 uhci_softc_t *sc = arg; 1201 1202 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1203 return (0); 1204 1205 if (sc->sc_bus.use_polling) { 1206 #ifdef DIAGNOSTIC 1207 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1208 #endif 1209 return (0); 1210 } 1211 1212 return (uhci_intr1(sc)); 1213 } 1214 1215 int 1216 uhci_intr1(uhci_softc_t *sc) 1217 { 1218 int status; 1219 int ack; 1220 1221 #ifdef UHCI_DEBUG 1222 if (uhcidebug > 15) { 1223 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1224 uhci_dumpregs(sc); 1225 } 1226 #endif 1227 1228 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1229 if (status == 0) /* The interrupt was not for us. */ 1230 return (0); 1231 1232 if (sc->sc_suspend != PWR_RESUME) { 1233 #ifdef DIAGNOSTIC 1234 printf("%s: interrupt while not operating ignored\n", 1235 device_xname(sc->sc_dev)); 1236 #endif 1237 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1238 return (0); 1239 } 1240 1241 ack = 0; 1242 if (status & UHCI_STS_USBINT) 1243 ack |= UHCI_STS_USBINT; 1244 if (status & UHCI_STS_USBEI) 1245 ack |= UHCI_STS_USBEI; 1246 if (status & UHCI_STS_RD) { 1247 ack |= UHCI_STS_RD; 1248 #ifdef UHCI_DEBUG 1249 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1250 #endif 1251 } 1252 if (status & UHCI_STS_HSE) { 1253 ack |= UHCI_STS_HSE; 1254 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1255 } 1256 if (status & UHCI_STS_HCPE) { 1257 ack |= UHCI_STS_HCPE; 1258 printf("%s: host controller process error\n", 1259 device_xname(sc->sc_dev)); 1260 } 1261 if (status & UHCI_STS_HCH) { 1262 /* no acknowledge needed */ 1263 if (!sc->sc_dying) { 1264 printf("%s: host controller halted\n", 1265 device_xname(sc->sc_dev)); 1266 #ifdef UHCI_DEBUG 1267 uhci_dump_all(sc); 1268 #endif 1269 } 1270 sc->sc_dying = 1; 1271 } 1272 1273 if (!ack) 1274 return (0); /* nothing to acknowledge */ 1275 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1276 1277 sc->sc_bus.no_intrs++; 1278 usb_schedsoftintr(&sc->sc_bus); 1279 1280 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1281 1282 return (1); 1283 } 1284 1285 void 1286 uhci_softintr(void *v) 1287 { 1288 struct usbd_bus *bus = v; 1289 uhci_softc_t *sc = bus->hci_private; 1290 uhci_intr_info_t *ii, *nextii; 1291 1292 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev), 1293 sc->sc_bus.intr_context)); 1294 1295 sc->sc_bus.intr_context++; 1296 1297 /* 1298 * Interrupts on UHCI really suck. When the host controller 1299 * interrupts because a transfer is completed there is no 1300 * way of knowing which transfer it was. You can scan down 1301 * the TDs and QHs of the previous frame to limit the search, 1302 * but that assumes that the interrupt was not delayed by more 1303 * than 1 ms, which may not always be true (e.g. after debug 1304 * output on a slow console). 1305 * We scan all interrupt descriptors to see if any have 1306 * completed. 1307 */ 1308 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1309 nextii = LIST_NEXT(ii, list); 1310 uhci_check_intr(sc, ii); 1311 } 1312 1313 #ifdef USB_USE_SOFTINTR 1314 if (sc->sc_softwake) { 1315 sc->sc_softwake = 0; 1316 wakeup(&sc->sc_softwake); 1317 } 1318 #endif /* USB_USE_SOFTINTR */ 1319 1320 sc->sc_bus.intr_context--; 1321 } 1322 1323 /* Check for an interrupt. */ 1324 void 1325 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1326 { 1327 uhci_soft_td_t *std, *lstd; 1328 u_int32_t status; 1329 1330 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1331 #ifdef DIAGNOSTIC 1332 if (ii == NULL) { 1333 printf("uhci_check_intr: no ii? %p\n", ii); 1334 return; 1335 } 1336 #endif 1337 if (ii->xfer->status == USBD_CANCELLED || 1338 ii->xfer->status == USBD_TIMEOUT) { 1339 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1340 return; 1341 } 1342 1343 if (ii->stdstart == NULL) 1344 return; 1345 lstd = ii->stdend; 1346 #ifdef DIAGNOSTIC 1347 if (lstd == NULL) { 1348 printf("uhci_check_intr: std==0\n"); 1349 return; 1350 } 1351 #endif 1352 /* 1353 * If the last TD is still active we need to check whether there 1354 * is an error somewhere in the middle, or whether there was a 1355 * short packet (SPD and not ACTIVE). 1356 */ 1357 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1358 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1359 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1360 status = le32toh(std->td.td_status); 1361 /* If there's an active TD the xfer isn't done. */ 1362 if (status & UHCI_TD_ACTIVE) 1363 break; 1364 /* Any kind of error makes the xfer done. */ 1365 if (status & UHCI_TD_STALLED) 1366 goto done; 1367 /* We want short packets, and it is short: it's done */ 1368 if ((status & UHCI_TD_SPD) && 1369 UHCI_TD_GET_ACTLEN(status) < 1370 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1371 goto done; 1372 } 1373 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1374 ii, ii->stdstart)); 1375 return; 1376 } 1377 done: 1378 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1379 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii); 1380 uhci_idone(ii); 1381 } 1382 1383 /* Called at splusb() */ 1384 void 1385 uhci_idone(uhci_intr_info_t *ii) 1386 { 1387 usbd_xfer_handle xfer = ii->xfer; 1388 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1389 uhci_soft_td_t *std; 1390 u_int32_t status = 0, nstatus; 1391 int actlen; 1392 1393 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1394 #ifdef DIAGNOSTIC 1395 { 1396 int s = splhigh(); 1397 if (ii->isdone) { 1398 splx(s); 1399 #ifdef UHCI_DEBUG 1400 printf("uhci_idone: ii is done!\n "); 1401 uhci_dump_ii(ii); 1402 #else 1403 printf("uhci_idone: ii=%p is done!\n", ii); 1404 #endif 1405 return; 1406 } 1407 ii->isdone = 1; 1408 splx(s); 1409 } 1410 #endif 1411 1412 if (xfer->nframes != 0) { 1413 /* Isoc transfer, do things differently. */ 1414 uhci_soft_td_t **stds = upipe->u.iso.stds; 1415 int i, n, nframes, len; 1416 1417 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1418 1419 nframes = xfer->nframes; 1420 actlen = 0; 1421 n = UXFER(xfer)->curframe; 1422 for (i = 0; i < nframes; i++) { 1423 std = stds[n]; 1424 #ifdef UHCI_DEBUG 1425 if (uhcidebug > 5) { 1426 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1427 uhci_dump_td(std); 1428 } 1429 #endif 1430 if (++n >= UHCI_VFRAMELIST_COUNT) 1431 n = 0; 1432 status = le32toh(std->td.td_status); 1433 len = UHCI_TD_GET_ACTLEN(status); 1434 xfer->frlengths[i] = len; 1435 actlen += len; 1436 } 1437 upipe->u.iso.inuse -= nframes; 1438 xfer->actlen = actlen; 1439 xfer->status = USBD_NORMAL_COMPLETION; 1440 goto end; 1441 } 1442 1443 #ifdef UHCI_DEBUG 1444 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1445 ii, xfer, upipe)); 1446 if (uhcidebug > 10) 1447 uhci_dump_tds(ii->stdstart); 1448 #endif 1449 1450 /* The transfer is done, compute actual length and status. */ 1451 actlen = 0; 1452 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1453 nstatus = le32toh(std->td.td_status); 1454 if (nstatus & UHCI_TD_ACTIVE) 1455 break; 1456 1457 status = nstatus; 1458 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1459 UHCI_TD_PID_SETUP) 1460 actlen += UHCI_TD_GET_ACTLEN(status); 1461 else { 1462 /* 1463 * UHCI will report CRCTO in addition to a STALL or NAK 1464 * for a SETUP transaction. See section 3.2.2, "TD 1465 * CONTROL AND STATUS". 1466 */ 1467 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1468 status &= ~UHCI_TD_CRCTO; 1469 } 1470 } 1471 /* If there are left over TDs we need to update the toggle. */ 1472 if (std != NULL) 1473 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1474 1475 status &= UHCI_TD_ERROR; 1476 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1477 actlen, status)); 1478 xfer->actlen = actlen; 1479 if (status != 0) { 1480 #ifdef UHCI_DEBUG 1481 char sbuf[128]; 1482 1483 bitmask_snprintf((u_int32_t)status, 1484 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1485 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1486 sbuf, sizeof(sbuf)); 1487 1488 DPRINTFN((status == UHCI_TD_STALLED)*10, 1489 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1490 "status 0x%s\n", 1491 xfer->pipe->device->address, 1492 xfer->pipe->endpoint->edesc->bEndpointAddress, 1493 sbuf)); 1494 #endif 1495 1496 if (status == UHCI_TD_STALLED) 1497 xfer->status = USBD_STALLED; 1498 else 1499 xfer->status = USBD_IOERROR; /* more info XXX */ 1500 } else { 1501 xfer->status = USBD_NORMAL_COMPLETION; 1502 } 1503 1504 end: 1505 usb_transfer_complete(xfer); 1506 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1507 } 1508 1509 /* 1510 * Called when a request does not complete. 1511 */ 1512 void 1513 uhci_timeout(void *addr) 1514 { 1515 uhci_intr_info_t *ii = addr; 1516 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1517 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1518 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1519 1520 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1521 1522 if (sc->sc_dying) { 1523 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1524 return; 1525 } 1526 1527 /* Execute the abort in a process context. */ 1528 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1529 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1530 USB_TASKQ_HC); 1531 } 1532 1533 void 1534 uhci_timeout_task(void *addr) 1535 { 1536 usbd_xfer_handle xfer = addr; 1537 int s; 1538 1539 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1540 1541 s = splusb(); 1542 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1543 splx(s); 1544 } 1545 1546 /* 1547 * Wait here until controller claims to have an interrupt. 1548 * Then call uhci_intr and return. Use timeout to avoid waiting 1549 * too long. 1550 * Only used during boot when interrupts are not enabled yet. 1551 */ 1552 void 1553 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1554 { 1555 int timo = xfer->timeout; 1556 uhci_intr_info_t *ii; 1557 1558 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1559 1560 xfer->status = USBD_IN_PROGRESS; 1561 for (; timo >= 0; timo--) { 1562 usb_delay_ms(&sc->sc_bus, 1); 1563 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1564 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1565 uhci_intr1(sc); 1566 if (xfer->status != USBD_IN_PROGRESS) 1567 return; 1568 } 1569 } 1570 1571 /* Timeout */ 1572 DPRINTF(("uhci_waitintr: timeout\n")); 1573 for (ii = LIST_FIRST(&sc->sc_intrhead); 1574 ii != NULL && ii->xfer != xfer; 1575 ii = LIST_NEXT(ii, list)) 1576 ; 1577 #ifdef DIAGNOSTIC 1578 if (ii == NULL) 1579 panic("uhci_waitintr: lost intr_info"); 1580 #endif 1581 uhci_idone(ii); 1582 } 1583 1584 void 1585 uhci_poll(struct usbd_bus *bus) 1586 { 1587 uhci_softc_t *sc = bus->hci_private; 1588 1589 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1590 uhci_intr1(sc); 1591 } 1592 1593 void 1594 uhci_reset(uhci_softc_t *sc) 1595 { 1596 int n; 1597 1598 UHCICMD(sc, UHCI_CMD_HCRESET); 1599 /* The reset bit goes low when the controller is done. */ 1600 for (n = 0; n < UHCI_RESET_TIMEOUT && 1601 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1602 usb_delay_ms(&sc->sc_bus, 1); 1603 if (n >= UHCI_RESET_TIMEOUT) 1604 printf("%s: controller did not reset\n", 1605 device_xname(sc->sc_dev)); 1606 } 1607 1608 usbd_status 1609 uhci_run(uhci_softc_t *sc, int run) 1610 { 1611 int s, n, running; 1612 u_int16_t cmd; 1613 1614 run = run != 0; 1615 s = splhardusb(); 1616 DPRINTF(("uhci_run: setting run=%d\n", run)); 1617 cmd = UREAD2(sc, UHCI_CMD); 1618 if (run) 1619 cmd |= UHCI_CMD_RS; 1620 else 1621 cmd &= ~UHCI_CMD_RS; 1622 UHCICMD(sc, cmd); 1623 for(n = 0; n < 10; n++) { 1624 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1625 /* return when we've entered the state we want */ 1626 if (run == running) { 1627 splx(s); 1628 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1629 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1630 return (USBD_NORMAL_COMPLETION); 1631 } 1632 usb_delay_ms(&sc->sc_bus, 1); 1633 } 1634 splx(s); 1635 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1636 run ? "start" : "stop"); 1637 return (USBD_IOERROR); 1638 } 1639 1640 /* 1641 * Memory management routines. 1642 * uhci_alloc_std allocates TDs 1643 * uhci_alloc_sqh allocates QHs 1644 * These two routines do their own free list management, 1645 * partly for speed, partly because allocating DMAable memory 1646 * has page size granularaity so much memory would be wasted if 1647 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1648 */ 1649 1650 uhci_soft_td_t * 1651 uhci_alloc_std(uhci_softc_t *sc) 1652 { 1653 uhci_soft_td_t *std; 1654 usbd_status err; 1655 int i, offs; 1656 usb_dma_t dma; 1657 1658 if (sc->sc_freetds == NULL) { 1659 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1660 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1661 UHCI_TD_ALIGN, &dma); 1662 if (err) 1663 return (0); 1664 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1665 offs = i * UHCI_STD_SIZE; 1666 std = KERNADDR(&dma, offs); 1667 std->physaddr = DMAADDR(&dma, offs); 1668 std->link.std = sc->sc_freetds; 1669 sc->sc_freetds = std; 1670 } 1671 } 1672 std = sc->sc_freetds; 1673 sc->sc_freetds = std->link.std; 1674 memset(&std->td, 0, sizeof(uhci_td_t)); 1675 return std; 1676 } 1677 1678 void 1679 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1680 { 1681 #ifdef DIAGNOSTIC 1682 #define TD_IS_FREE 0x12345678 1683 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1684 printf("uhci_free_std: freeing free TD %p\n", std); 1685 return; 1686 } 1687 std->td.td_token = htole32(TD_IS_FREE); 1688 #endif 1689 std->link.std = sc->sc_freetds; 1690 sc->sc_freetds = std; 1691 } 1692 1693 uhci_soft_qh_t * 1694 uhci_alloc_sqh(uhci_softc_t *sc) 1695 { 1696 uhci_soft_qh_t *sqh; 1697 usbd_status err; 1698 int i, offs; 1699 usb_dma_t dma; 1700 1701 if (sc->sc_freeqhs == NULL) { 1702 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1703 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1704 UHCI_QH_ALIGN, &dma); 1705 if (err) 1706 return (0); 1707 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1708 offs = i * UHCI_SQH_SIZE; 1709 sqh = KERNADDR(&dma, offs); 1710 sqh->physaddr = DMAADDR(&dma, offs); 1711 sqh->hlink = sc->sc_freeqhs; 1712 sc->sc_freeqhs = sqh; 1713 } 1714 } 1715 sqh = sc->sc_freeqhs; 1716 sc->sc_freeqhs = sqh->hlink; 1717 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1718 return (sqh); 1719 } 1720 1721 void 1722 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1723 { 1724 sqh->hlink = sc->sc_freeqhs; 1725 sc->sc_freeqhs = sqh; 1726 } 1727 1728 void 1729 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1730 uhci_soft_td_t *stdend) 1731 { 1732 uhci_soft_td_t *p; 1733 1734 for (; std != stdend; std = p) { 1735 p = std->link.std; 1736 uhci_free_std(sc, std); 1737 } 1738 } 1739 1740 usbd_status 1741 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1742 int rd, u_int16_t flags, usb_dma_t *dma, 1743 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1744 { 1745 uhci_soft_td_t *p, *lastp; 1746 uhci_physaddr_t lastlink; 1747 int i, ntd, l, tog, maxp; 1748 u_int32_t status; 1749 int addr = upipe->pipe.device->address; 1750 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1751 1752 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1753 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1754 upipe->pipe.device->speed, flags)); 1755 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1756 if (maxp == 0) { 1757 printf("uhci_alloc_std_chain: maxp=0\n"); 1758 return (USBD_INVAL); 1759 } 1760 ntd = (len + maxp - 1) / maxp; 1761 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1762 ntd++; 1763 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1764 if (ntd == 0) { 1765 *sp = *ep = 0; 1766 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1767 return (USBD_NORMAL_COMPLETION); 1768 } 1769 tog = upipe->nexttoggle; 1770 if (ntd % 2 == 0) 1771 tog ^= 1; 1772 upipe->nexttoggle = tog ^ 1; 1773 lastp = NULL; 1774 lastlink = UHCI_PTR_T; 1775 ntd--; 1776 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1777 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1778 status |= UHCI_TD_LS; 1779 if (flags & USBD_SHORT_XFER_OK) 1780 status |= UHCI_TD_SPD; 1781 for (i = ntd; i >= 0; i--) { 1782 p = uhci_alloc_std(sc); 1783 if (p == NULL) { 1784 KASSERT(lastp != NULL); 1785 uhci_free_std_chain(sc, lastp, NULL); 1786 return (USBD_NOMEM); 1787 } 1788 p->link.std = lastp; 1789 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1790 lastp = p; 1791 lastlink = p->physaddr; 1792 p->td.td_status = htole32(status); 1793 if (i == ntd) { 1794 /* last TD */ 1795 l = len % maxp; 1796 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1797 l = maxp; 1798 *ep = p; 1799 } else 1800 l = maxp; 1801 p->td.td_token = 1802 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1803 UHCI_TD_OUT(l, endpt, addr, tog)); 1804 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1805 tog ^= 1; 1806 } 1807 *sp = lastp; 1808 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1809 upipe->nexttoggle)); 1810 return (USBD_NORMAL_COMPLETION); 1811 } 1812 1813 void 1814 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1815 { 1816 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1817 upipe->nexttoggle = 0; 1818 } 1819 1820 void 1821 uhci_noop(usbd_pipe_handle pipe) 1822 { 1823 } 1824 1825 usbd_status 1826 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1827 { 1828 usbd_status err; 1829 1830 /* Insert last in queue. */ 1831 err = usb_insert_transfer(xfer); 1832 if (err) 1833 return (err); 1834 1835 /* 1836 * Pipe isn't running (otherwise err would be USBD_INPROG), 1837 * so start it first. 1838 */ 1839 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1840 } 1841 1842 usbd_status 1843 uhci_device_bulk_start(usbd_xfer_handle xfer) 1844 { 1845 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1846 usbd_device_handle dev = upipe->pipe.device; 1847 uhci_softc_t *sc = dev->bus->hci_private; 1848 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1849 uhci_soft_td_t *data, *dataend; 1850 uhci_soft_qh_t *sqh; 1851 usbd_status err; 1852 int len, isread, endpt; 1853 int s; 1854 1855 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 1856 xfer, xfer->length, xfer->flags, ii)); 1857 1858 if (sc->sc_dying) 1859 return (USBD_IOERROR); 1860 1861 #ifdef DIAGNOSTIC 1862 if (xfer->rqflags & URQ_REQUEST) 1863 panic("uhci_device_bulk_transfer: a request"); 1864 #endif 1865 1866 len = xfer->length; 1867 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1868 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 1869 sqh = upipe->u.bulk.sqh; 1870 1871 upipe->u.bulk.isread = isread; 1872 upipe->u.bulk.length = len; 1873 1874 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 1875 &xfer->dmabuf, &data, &dataend); 1876 if (err) 1877 return (err); 1878 dataend->td.td_status |= htole32(UHCI_TD_IOC); 1879 1880 #ifdef UHCI_DEBUG 1881 if (uhcidebug > 8) { 1882 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 1883 uhci_dump_tds(data); 1884 } 1885 #endif 1886 1887 /* Set up interrupt info. */ 1888 ii->xfer = xfer; 1889 ii->stdstart = data; 1890 ii->stdend = dataend; 1891 #ifdef DIAGNOSTIC 1892 if (!ii->isdone) { 1893 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 1894 } 1895 ii->isdone = 0; 1896 #endif 1897 1898 sqh->elink = data; 1899 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 1900 1901 s = splusb(); 1902 uhci_add_bulk(sc, sqh); 1903 uhci_add_intr_info(sc, ii); 1904 1905 if (xfer->timeout && !sc->sc_bus.use_polling) { 1906 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1907 uhci_timeout, ii); 1908 } 1909 xfer->status = USBD_IN_PROGRESS; 1910 splx(s); 1911 1912 #ifdef UHCI_DEBUG 1913 if (uhcidebug > 10) { 1914 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 1915 uhci_dump_tds(data); 1916 } 1917 #endif 1918 1919 if (sc->sc_bus.use_polling) 1920 uhci_waitintr(sc, xfer); 1921 1922 return (USBD_IN_PROGRESS); 1923 } 1924 1925 /* Abort a device bulk request. */ 1926 void 1927 uhci_device_bulk_abort(usbd_xfer_handle xfer) 1928 { 1929 DPRINTF(("uhci_device_bulk_abort:\n")); 1930 uhci_abort_xfer(xfer, USBD_CANCELLED); 1931 } 1932 1933 /* 1934 * Abort a device request. 1935 * If this routine is called at splusb() it guarantees that the request 1936 * will be removed from the hardware scheduling and that the callback 1937 * for it will be called with USBD_CANCELLED status. 1938 * It's impossible to guarantee that the requested transfer will not 1939 * have happened since the hardware runs concurrently. 1940 * If the transaction has already happened we rely on the ordinary 1941 * interrupt processing to process it. 1942 */ 1943 void 1944 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1945 { 1946 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1947 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1948 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1949 uhci_soft_td_t *std; 1950 int s; 1951 int wake; 1952 1953 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 1954 1955 if (sc->sc_dying) { 1956 /* If we're dying, just do the software part. */ 1957 s = splusb(); 1958 xfer->status = status; /* make software ignore it */ 1959 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer); 1960 usb_transfer_complete(xfer); 1961 splx(s); 1962 return; 1963 } 1964 1965 if (xfer->device->bus->intr_context || !curproc) 1966 panic("uhci_abort_xfer: not in process context"); 1967 1968 /* 1969 * If an abort is already in progress then just wait for it to 1970 * complete and return. 1971 */ 1972 if (xfer->hcflags & UXFER_ABORTING) { 1973 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 1974 #ifdef DIAGNOSTIC 1975 if (status == USBD_TIMEOUT) 1976 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 1977 #endif 1978 /* Override the status which might be USBD_TIMEOUT. */ 1979 xfer->status = status; 1980 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 1981 xfer->hcflags |= UXFER_ABORTWAIT; 1982 while (xfer->hcflags & UXFER_ABORTING) 1983 tsleep(&xfer->hcflags, PZERO, "uhciaw", 0); 1984 return; 1985 } 1986 xfer->hcflags |= UXFER_ABORTING; 1987 1988 /* 1989 * Step 1: Make interrupt routine and hardware ignore xfer. 1990 */ 1991 s = splusb(); 1992 xfer->status = status; /* make software ignore it */ 1993 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii); 1994 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 1995 for (std = ii->stdstart; std != NULL; std = std->link.std) 1996 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1997 splx(s); 1998 1999 /* 2000 * Step 2: Wait until we know hardware has finished any possible 2001 * use of the xfer. Also make sure the soft interrupt routine 2002 * has run. 2003 */ 2004 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2005 s = splusb(); 2006 #ifdef USB_USE_SOFTINTR 2007 sc->sc_softwake = 1; 2008 #endif /* USB_USE_SOFTINTR */ 2009 usb_schedsoftintr(&sc->sc_bus); 2010 #ifdef USB_USE_SOFTINTR 2011 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2012 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 2013 #endif /* USB_USE_SOFTINTR */ 2014 splx(s); 2015 2016 /* 2017 * Step 3: Execute callback. 2018 */ 2019 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2020 s = splusb(); 2021 #ifdef DIAGNOSTIC 2022 ii->isdone = 1; 2023 #endif 2024 wake = xfer->hcflags & UXFER_ABORTWAIT; 2025 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2026 usb_transfer_complete(xfer); 2027 if (wake) 2028 wakeup(&xfer->hcflags); 2029 splx(s); 2030 } 2031 2032 /* Close a device bulk pipe. */ 2033 void 2034 uhci_device_bulk_close(usbd_pipe_handle pipe) 2035 { 2036 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2037 usbd_device_handle dev = upipe->pipe.device; 2038 uhci_softc_t *sc = dev->bus->hci_private; 2039 2040 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2041 } 2042 2043 usbd_status 2044 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2045 { 2046 usbd_status err; 2047 2048 /* Insert last in queue. */ 2049 err = usb_insert_transfer(xfer); 2050 if (err) 2051 return (err); 2052 2053 /* 2054 * Pipe isn't running (otherwise err would be USBD_INPROG), 2055 * so start it first. 2056 */ 2057 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2058 } 2059 2060 usbd_status 2061 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2062 { 2063 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2064 usbd_status err; 2065 2066 if (sc->sc_dying) 2067 return (USBD_IOERROR); 2068 2069 #ifdef DIAGNOSTIC 2070 if (!(xfer->rqflags & URQ_REQUEST)) 2071 panic("uhci_device_ctrl_transfer: not a request"); 2072 #endif 2073 2074 err = uhci_device_request(xfer); 2075 if (err) 2076 return (err); 2077 2078 if (sc->sc_bus.use_polling) 2079 uhci_waitintr(sc, xfer); 2080 return (USBD_IN_PROGRESS); 2081 } 2082 2083 usbd_status 2084 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2085 { 2086 usbd_status err; 2087 2088 /* Insert last in queue. */ 2089 err = usb_insert_transfer(xfer); 2090 if (err) 2091 return (err); 2092 2093 /* 2094 * Pipe isn't running (otherwise err would be USBD_INPROG), 2095 * so start it first. 2096 */ 2097 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2098 } 2099 2100 usbd_status 2101 uhci_device_intr_start(usbd_xfer_handle xfer) 2102 { 2103 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2104 usbd_device_handle dev = upipe->pipe.device; 2105 uhci_softc_t *sc = dev->bus->hci_private; 2106 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2107 uhci_soft_td_t *data, *dataend; 2108 uhci_soft_qh_t *sqh; 2109 usbd_status err; 2110 int isread, endpt; 2111 int i, s; 2112 2113 if (sc->sc_dying) 2114 return (USBD_IOERROR); 2115 2116 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2117 xfer, xfer->length, xfer->flags)); 2118 2119 #ifdef DIAGNOSTIC 2120 if (xfer->rqflags & URQ_REQUEST) 2121 panic("uhci_device_intr_transfer: a request"); 2122 #endif 2123 2124 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2125 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2126 2127 upipe->u.intr.isread = isread; 2128 2129 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2130 xfer->flags, &xfer->dmabuf, &data, 2131 &dataend); 2132 if (err) 2133 return (err); 2134 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2135 2136 #ifdef UHCI_DEBUG 2137 if (uhcidebug > 10) { 2138 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2139 uhci_dump_tds(data); 2140 uhci_dump_qh(upipe->u.intr.qhs[0]); 2141 } 2142 #endif 2143 2144 s = splusb(); 2145 /* Set up interrupt info. */ 2146 ii->xfer = xfer; 2147 ii->stdstart = data; 2148 ii->stdend = dataend; 2149 #ifdef DIAGNOSTIC 2150 if (!ii->isdone) { 2151 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2152 } 2153 ii->isdone = 0; 2154 #endif 2155 2156 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2157 upipe->u.intr.qhs[0])); 2158 for (i = 0; i < upipe->u.intr.npoll; i++) { 2159 sqh = upipe->u.intr.qhs[i]; 2160 sqh->elink = data; 2161 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2162 } 2163 uhci_add_intr_info(sc, ii); 2164 xfer->status = USBD_IN_PROGRESS; 2165 splx(s); 2166 2167 #ifdef UHCI_DEBUG 2168 if (uhcidebug > 10) { 2169 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2170 uhci_dump_tds(data); 2171 uhci_dump_qh(upipe->u.intr.qhs[0]); 2172 } 2173 #endif 2174 2175 return (USBD_IN_PROGRESS); 2176 } 2177 2178 /* Abort a device control request. */ 2179 void 2180 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2181 { 2182 DPRINTF(("uhci_device_ctrl_abort:\n")); 2183 uhci_abort_xfer(xfer, USBD_CANCELLED); 2184 } 2185 2186 /* Close a device control pipe. */ 2187 void 2188 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2189 { 2190 } 2191 2192 /* Abort a device interrupt request. */ 2193 void 2194 uhci_device_intr_abort(usbd_xfer_handle xfer) 2195 { 2196 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2197 if (xfer->pipe->intrxfer == xfer) { 2198 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2199 xfer->pipe->intrxfer = NULL; 2200 } 2201 uhci_abort_xfer(xfer, USBD_CANCELLED); 2202 } 2203 2204 /* Close a device interrupt pipe. */ 2205 void 2206 uhci_device_intr_close(usbd_pipe_handle pipe) 2207 { 2208 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2209 uhci_softc_t *sc = pipe->device->bus->hci_private; 2210 int i, npoll; 2211 int s; 2212 2213 /* Unlink descriptors from controller data structures. */ 2214 npoll = upipe->u.intr.npoll; 2215 s = splusb(); 2216 for (i = 0; i < npoll; i++) 2217 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2218 splx(s); 2219 2220 /* 2221 * We now have to wait for any activity on the physical 2222 * descriptors to stop. 2223 */ 2224 usb_delay_ms(&sc->sc_bus, 2); 2225 2226 for(i = 0; i < npoll; i++) 2227 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2228 free(upipe->u.intr.qhs, M_USBHC); 2229 2230 /* XXX free other resources */ 2231 } 2232 2233 usbd_status 2234 uhci_device_request(usbd_xfer_handle xfer) 2235 { 2236 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2237 usb_device_request_t *req = &xfer->request; 2238 usbd_device_handle dev = upipe->pipe.device; 2239 uhci_softc_t *sc = dev->bus->hci_private; 2240 int addr = dev->address; 2241 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2242 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2243 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2244 uhci_soft_qh_t *sqh; 2245 int len; 2246 u_int32_t ls; 2247 usbd_status err; 2248 int isread; 2249 int s; 2250 2251 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2252 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2253 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2254 UGETW(req->wIndex), UGETW(req->wLength), 2255 addr, endpt)); 2256 2257 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2258 isread = req->bmRequestType & UT_READ; 2259 len = UGETW(req->wLength); 2260 2261 setup = upipe->u.ctl.setup; 2262 stat = upipe->u.ctl.stat; 2263 sqh = upipe->u.ctl.sqh; 2264 2265 /* Set up data transaction */ 2266 if (len != 0) { 2267 upipe->nexttoggle = 1; 2268 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2269 &xfer->dmabuf, &data, &dataend); 2270 if (err) 2271 return (err); 2272 next = data; 2273 dataend->link.std = stat; 2274 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2275 } else { 2276 next = stat; 2277 } 2278 upipe->u.ctl.length = len; 2279 2280 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2281 2282 setup->link.std = next; 2283 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2284 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2285 UHCI_TD_ACTIVE); 2286 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2287 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2288 2289 stat->link.std = NULL; 2290 stat->td.td_link = htole32(UHCI_PTR_T); 2291 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2292 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2293 stat->td.td_token = 2294 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2295 UHCI_TD_IN (0, endpt, addr, 1)); 2296 stat->td.td_buffer = htole32(0); 2297 2298 #ifdef UHCI_DEBUG 2299 if (uhcidebug > 10) { 2300 DPRINTF(("uhci_device_request: before transfer\n")); 2301 uhci_dump_tds(setup); 2302 } 2303 #endif 2304 2305 /* Set up interrupt info. */ 2306 ii->xfer = xfer; 2307 ii->stdstart = setup; 2308 ii->stdend = stat; 2309 #ifdef DIAGNOSTIC 2310 if (!ii->isdone) { 2311 printf("uhci_device_request: not done, ii=%p\n", ii); 2312 } 2313 ii->isdone = 0; 2314 #endif 2315 2316 sqh->elink = setup; 2317 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2318 2319 s = splusb(); 2320 if (dev->speed == USB_SPEED_LOW) 2321 uhci_add_ls_ctrl(sc, sqh); 2322 else 2323 uhci_add_hs_ctrl(sc, sqh); 2324 uhci_add_intr_info(sc, ii); 2325 #ifdef UHCI_DEBUG 2326 if (uhcidebug > 12) { 2327 uhci_soft_td_t *std; 2328 uhci_soft_qh_t *xqh; 2329 uhci_soft_qh_t *sxqh; 2330 int maxqh = 0; 2331 uhci_physaddr_t link; 2332 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2333 for (std = sc->sc_vframes[0].htd, link = 0; 2334 (link & UHCI_PTR_QH) == 0; 2335 std = std->link.std) { 2336 link = le32toh(std->td.td_link); 2337 uhci_dump_td(std); 2338 } 2339 sxqh = (uhci_soft_qh_t *)std; 2340 uhci_dump_qh(sxqh); 2341 for (xqh = sxqh; 2342 xqh != NULL; 2343 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2344 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2345 uhci_dump_qh(xqh); 2346 } 2347 DPRINTF(("Enqueued QH:\n")); 2348 uhci_dump_qh(sqh); 2349 uhci_dump_tds(sqh->elink); 2350 } 2351 #endif 2352 if (xfer->timeout && !sc->sc_bus.use_polling) { 2353 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2354 uhci_timeout, ii); 2355 } 2356 xfer->status = USBD_IN_PROGRESS; 2357 splx(s); 2358 2359 return (USBD_NORMAL_COMPLETION); 2360 } 2361 2362 usbd_status 2363 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2364 { 2365 usbd_status err; 2366 2367 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2368 2369 /* Put it on our queue, */ 2370 err = usb_insert_transfer(xfer); 2371 2372 /* bail out on error, */ 2373 if (err && err != USBD_IN_PROGRESS) 2374 return (err); 2375 2376 /* XXX should check inuse here */ 2377 2378 /* insert into schedule, */ 2379 uhci_device_isoc_enter(xfer); 2380 2381 /* and start if the pipe wasn't running */ 2382 if (!err) 2383 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2384 2385 return (err); 2386 } 2387 2388 void 2389 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2390 { 2391 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2392 usbd_device_handle dev = upipe->pipe.device; 2393 uhci_softc_t *sc = dev->bus->hci_private; 2394 struct iso *iso = &upipe->u.iso; 2395 uhci_soft_td_t *std; 2396 u_int32_t buf, len, status; 2397 int s, i, next, nframes; 2398 2399 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2400 "nframes=%d\n", 2401 iso->inuse, iso->next, xfer, xfer->nframes)); 2402 2403 if (sc->sc_dying) 2404 return; 2405 2406 if (xfer->status == USBD_IN_PROGRESS) { 2407 /* This request has already been entered into the frame list */ 2408 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2409 /* XXX */ 2410 } 2411 2412 #ifdef DIAGNOSTIC 2413 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2414 printf("uhci_device_isoc_enter: overflow!\n"); 2415 #endif 2416 2417 next = iso->next; 2418 if (next == -1) { 2419 /* Not in use yet, schedule it a few frames ahead. */ 2420 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2421 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2422 } 2423 2424 xfer->status = USBD_IN_PROGRESS; 2425 UXFER(xfer)->curframe = next; 2426 2427 buf = DMAADDR(&xfer->dmabuf, 0); 2428 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2429 UHCI_TD_ACTIVE | 2430 UHCI_TD_IOS); 2431 nframes = xfer->nframes; 2432 s = splusb(); 2433 for (i = 0; i < nframes; i++) { 2434 std = iso->stds[next]; 2435 if (++next >= UHCI_VFRAMELIST_COUNT) 2436 next = 0; 2437 len = xfer->frlengths[i]; 2438 std->td.td_buffer = htole32(buf); 2439 if (i == nframes - 1) 2440 status |= UHCI_TD_IOC; 2441 std->td.td_status = htole32(status); 2442 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2443 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2444 #ifdef UHCI_DEBUG 2445 if (uhcidebug > 5) { 2446 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2447 uhci_dump_td(std); 2448 } 2449 #endif 2450 buf += len; 2451 } 2452 iso->next = next; 2453 iso->inuse += xfer->nframes; 2454 2455 splx(s); 2456 } 2457 2458 usbd_status 2459 uhci_device_isoc_start(usbd_xfer_handle xfer) 2460 { 2461 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2462 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2463 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2464 uhci_soft_td_t *end; 2465 int s, i; 2466 2467 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2468 2469 if (sc->sc_dying) 2470 return (USBD_IOERROR); 2471 2472 #ifdef DIAGNOSTIC 2473 if (xfer->status != USBD_IN_PROGRESS) 2474 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2475 #endif 2476 2477 /* Find the last TD */ 2478 i = UXFER(xfer)->curframe + xfer->nframes; 2479 if (i >= UHCI_VFRAMELIST_COUNT) 2480 i -= UHCI_VFRAMELIST_COUNT; 2481 end = upipe->u.iso.stds[i]; 2482 2483 #ifdef DIAGNOSTIC 2484 if (end == NULL) { 2485 printf("uhci_device_isoc_start: end == NULL\n"); 2486 return (USBD_INVAL); 2487 } 2488 #endif 2489 2490 s = splusb(); 2491 2492 /* Set up interrupt info. */ 2493 ii->xfer = xfer; 2494 ii->stdstart = end; 2495 ii->stdend = end; 2496 #ifdef DIAGNOSTIC 2497 if (!ii->isdone) 2498 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2499 ii->isdone = 0; 2500 #endif 2501 uhci_add_intr_info(sc, ii); 2502 2503 splx(s); 2504 2505 return (USBD_IN_PROGRESS); 2506 } 2507 2508 void 2509 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2510 { 2511 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2512 uhci_soft_td_t **stds = upipe->u.iso.stds; 2513 uhci_soft_td_t *std; 2514 int i, n, s, nframes, maxlen, len; 2515 2516 s = splusb(); 2517 2518 /* Transfer is already done. */ 2519 if (xfer->status != USBD_NOT_STARTED && 2520 xfer->status != USBD_IN_PROGRESS) { 2521 splx(s); 2522 return; 2523 } 2524 2525 /* Give xfer the requested abort code. */ 2526 xfer->status = USBD_CANCELLED; 2527 2528 /* make hardware ignore it, */ 2529 nframes = xfer->nframes; 2530 n = UXFER(xfer)->curframe; 2531 maxlen = 0; 2532 for (i = 0; i < nframes; i++) { 2533 std = stds[n]; 2534 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2535 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2536 if (len > maxlen) 2537 maxlen = len; 2538 if (++n >= UHCI_VFRAMELIST_COUNT) 2539 n = 0; 2540 } 2541 2542 /* and wait until we are sure the hardware has finished. */ 2543 delay(maxlen); 2544 2545 #ifdef DIAGNOSTIC 2546 UXFER(xfer)->iinfo.isdone = 1; 2547 #endif 2548 /* Run callback and remove from interrupt list. */ 2549 usb_transfer_complete(xfer); 2550 2551 splx(s); 2552 } 2553 2554 void 2555 uhci_device_isoc_close(usbd_pipe_handle pipe) 2556 { 2557 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2558 usbd_device_handle dev = upipe->pipe.device; 2559 uhci_softc_t *sc = dev->bus->hci_private; 2560 uhci_soft_td_t *std, *vstd; 2561 struct iso *iso; 2562 int i, s; 2563 2564 /* 2565 * Make sure all TDs are marked as inactive. 2566 * Wait for completion. 2567 * Unschedule. 2568 * Deallocate. 2569 */ 2570 iso = &upipe->u.iso; 2571 2572 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2573 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2574 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2575 2576 s = splusb(); 2577 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2578 std = iso->stds[i]; 2579 for (vstd = sc->sc_vframes[i].htd; 2580 vstd != NULL && vstd->link.std != std; 2581 vstd = vstd->link.std) 2582 ; 2583 if (vstd == NULL) { 2584 /*panic*/ 2585 printf("uhci_device_isoc_close: %p not found\n", std); 2586 splx(s); 2587 return; 2588 } 2589 vstd->link = std->link; 2590 vstd->td.td_link = std->td.td_link; 2591 uhci_free_std(sc, std); 2592 } 2593 splx(s); 2594 2595 free(iso->stds, M_USBHC); 2596 } 2597 2598 usbd_status 2599 uhci_setup_isoc(usbd_pipe_handle pipe) 2600 { 2601 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2602 usbd_device_handle dev = upipe->pipe.device; 2603 uhci_softc_t *sc = dev->bus->hci_private; 2604 int addr = upipe->pipe.device->address; 2605 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2606 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2607 uhci_soft_td_t *std, *vstd; 2608 u_int32_t token; 2609 struct iso *iso; 2610 int i, s; 2611 2612 iso = &upipe->u.iso; 2613 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2614 M_USBHC, M_WAITOK); 2615 2616 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2617 UHCI_TD_OUT(0, endpt, addr, 0); 2618 2619 /* Allocate the TDs and mark as inactive; */ 2620 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2621 std = uhci_alloc_std(sc); 2622 if (std == 0) 2623 goto bad; 2624 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2625 std->td.td_token = htole32(token); 2626 iso->stds[i] = std; 2627 } 2628 2629 /* Insert TDs into schedule. */ 2630 s = splusb(); 2631 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2632 std = iso->stds[i]; 2633 vstd = sc->sc_vframes[i].htd; 2634 std->link = vstd->link; 2635 std->td.td_link = vstd->td.td_link; 2636 vstd->link.std = std; 2637 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2638 } 2639 splx(s); 2640 2641 iso->next = -1; 2642 iso->inuse = 0; 2643 2644 return (USBD_NORMAL_COMPLETION); 2645 2646 bad: 2647 while (--i >= 0) 2648 uhci_free_std(sc, iso->stds[i]); 2649 free(iso->stds, M_USBHC); 2650 return (USBD_NOMEM); 2651 } 2652 2653 void 2654 uhci_device_isoc_done(usbd_xfer_handle xfer) 2655 { 2656 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2657 2658 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2659 xfer->actlen, xfer->busy_free)); 2660 2661 if (ii->xfer != xfer) 2662 /* Not on interrupt list, ignore it. */ 2663 return; 2664 2665 if (!uhci_active_intr_info(ii)) 2666 return; 2667 2668 #ifdef DIAGNOSTIC 2669 if (ii->stdend == NULL) { 2670 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2671 #ifdef UHCI_DEBUG 2672 uhci_dump_ii(ii); 2673 #endif 2674 return; 2675 } 2676 #endif 2677 2678 /* Turn off the interrupt since it is active even if the TD is not. */ 2679 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2680 2681 uhci_del_intr_info(ii); /* remove from active list */ 2682 } 2683 2684 void 2685 uhci_device_intr_done(usbd_xfer_handle xfer) 2686 { 2687 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2688 uhci_softc_t *sc = ii->sc; 2689 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2690 uhci_soft_qh_t *sqh; 2691 int i, npoll; 2692 2693 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2694 2695 npoll = upipe->u.intr.npoll; 2696 for(i = 0; i < npoll; i++) { 2697 sqh = upipe->u.intr.qhs[i]; 2698 sqh->elink = NULL; 2699 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2700 } 2701 uhci_free_std_chain(sc, ii->stdstart, NULL); 2702 2703 /* XXX Wasteful. */ 2704 if (xfer->pipe->repeat) { 2705 uhci_soft_td_t *data, *dataend; 2706 2707 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 2708 2709 /* This alloc cannot fail since we freed the chain above. */ 2710 uhci_alloc_std_chain(upipe, sc, xfer->length, 2711 upipe->u.intr.isread, xfer->flags, 2712 &xfer->dmabuf, &data, &dataend); 2713 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2714 2715 #ifdef UHCI_DEBUG 2716 if (uhcidebug > 10) { 2717 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2718 uhci_dump_tds(data); 2719 uhci_dump_qh(upipe->u.intr.qhs[0]); 2720 } 2721 #endif 2722 2723 ii->stdstart = data; 2724 ii->stdend = dataend; 2725 #ifdef DIAGNOSTIC 2726 if (!ii->isdone) { 2727 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 2728 } 2729 ii->isdone = 0; 2730 #endif 2731 for (i = 0; i < npoll; i++) { 2732 sqh = upipe->u.intr.qhs[i]; 2733 sqh->elink = data; 2734 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2735 } 2736 xfer->status = USBD_IN_PROGRESS; 2737 /* The ii is already on the examined list, just leave it. */ 2738 } else { 2739 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 2740 if (uhci_active_intr_info(ii)) 2741 uhci_del_intr_info(ii); 2742 } 2743 } 2744 2745 /* Deallocate request data structures */ 2746 void 2747 uhci_device_ctrl_done(usbd_xfer_handle xfer) 2748 { 2749 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2750 uhci_softc_t *sc = ii->sc; 2751 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2752 2753 #ifdef DIAGNOSTIC 2754 if (!(xfer->rqflags & URQ_REQUEST)) 2755 panic("uhci_device_ctrl_done: not a request"); 2756 #endif 2757 2758 if (!uhci_active_intr_info(ii)) 2759 return; 2760 2761 uhci_del_intr_info(ii); /* remove from active list */ 2762 2763 if (upipe->pipe.device->speed == USB_SPEED_LOW) 2764 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 2765 else 2766 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 2767 2768 if (upipe->u.ctl.length != 0) 2769 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 2770 2771 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 2772 } 2773 2774 /* Deallocate request data structures */ 2775 void 2776 uhci_device_bulk_done(usbd_xfer_handle xfer) 2777 { 2778 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2779 uhci_softc_t *sc = ii->sc; 2780 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2781 2782 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 2783 xfer, ii, sc, upipe)); 2784 2785 if (!uhci_active_intr_info(ii)) 2786 return; 2787 2788 uhci_del_intr_info(ii); /* remove from active list */ 2789 2790 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2791 2792 uhci_free_std_chain(sc, ii->stdstart, NULL); 2793 2794 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 2795 } 2796 2797 /* Add interrupt QH, called with vflock. */ 2798 void 2799 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2800 { 2801 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2802 uhci_soft_qh_t *eqh; 2803 2804 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2805 2806 eqh = vf->eqh; 2807 sqh->hlink = eqh->hlink; 2808 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2809 eqh->hlink = sqh; 2810 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 2811 vf->eqh = sqh; 2812 vf->bandwidth++; 2813 } 2814 2815 /* Remove interrupt QH. */ 2816 void 2817 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2818 { 2819 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2820 uhci_soft_qh_t *pqh; 2821 2822 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2823 2824 /* See comment in uhci_remove_ctrl() */ 2825 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 2826 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2827 delay(UHCI_QH_REMOVE_DELAY); 2828 } 2829 2830 pqh = uhci_find_prev_qh(vf->hqh, sqh); 2831 pqh->hlink = sqh->hlink; 2832 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2833 delay(UHCI_QH_REMOVE_DELAY); 2834 if (vf->eqh == sqh) 2835 vf->eqh = pqh; 2836 vf->bandwidth--; 2837 } 2838 2839 usbd_status 2840 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 2841 { 2842 uhci_soft_qh_t *sqh; 2843 int i, npoll, s; 2844 u_int bestbw, bw, bestoffs, offs; 2845 2846 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 2847 if (ival == 0) { 2848 printf("uhci_device_setintr: 0 interval\n"); 2849 return (USBD_INVAL); 2850 } 2851 2852 if (ival > UHCI_VFRAMELIST_COUNT) 2853 ival = UHCI_VFRAMELIST_COUNT; 2854 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2855 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 2856 2857 upipe->u.intr.npoll = npoll; 2858 upipe->u.intr.qhs = 2859 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 2860 2861 /* 2862 * Figure out which offset in the schedule that has most 2863 * bandwidth left over. 2864 */ 2865 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2866 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2867 for (bw = i = 0; i < npoll; i++) 2868 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2869 if (bw < bestbw) { 2870 bestbw = bw; 2871 bestoffs = offs; 2872 } 2873 } 2874 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2875 2876 for(i = 0; i < npoll; i++) { 2877 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2878 sqh->elink = NULL; 2879 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2880 sqh->pos = MOD(i * ival + bestoffs); 2881 } 2882 #undef MOD 2883 2884 s = splusb(); 2885 /* Enter QHs into the controller data structures. */ 2886 for(i = 0; i < npoll; i++) 2887 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 2888 splx(s); 2889 2890 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 2891 return (USBD_NORMAL_COMPLETION); 2892 } 2893 2894 /* Open a new pipe. */ 2895 usbd_status 2896 uhci_open(usbd_pipe_handle pipe) 2897 { 2898 uhci_softc_t *sc = pipe->device->bus->hci_private; 2899 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2900 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2901 usbd_status err; 2902 int ival; 2903 2904 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2905 pipe, pipe->device->address, 2906 ed->bEndpointAddress, sc->sc_addr)); 2907 2908 upipe->aborting = 0; 2909 upipe->nexttoggle = 0; 2910 2911 if (pipe->device->address == sc->sc_addr) { 2912 switch (ed->bEndpointAddress) { 2913 case USB_CONTROL_ENDPOINT: 2914 pipe->methods = &uhci_root_ctrl_methods; 2915 break; 2916 case UE_DIR_IN | UHCI_INTR_ENDPT: 2917 pipe->methods = &uhci_root_intr_methods; 2918 break; 2919 default: 2920 return (USBD_INVAL); 2921 } 2922 } else { 2923 switch (ed->bmAttributes & UE_XFERTYPE) { 2924 case UE_CONTROL: 2925 pipe->methods = &uhci_device_ctrl_methods; 2926 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2927 if (upipe->u.ctl.sqh == NULL) 2928 goto bad; 2929 upipe->u.ctl.setup = uhci_alloc_std(sc); 2930 if (upipe->u.ctl.setup == NULL) { 2931 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2932 goto bad; 2933 } 2934 upipe->u.ctl.stat = uhci_alloc_std(sc); 2935 if (upipe->u.ctl.stat == NULL) { 2936 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2937 uhci_free_std(sc, upipe->u.ctl.setup); 2938 goto bad; 2939 } 2940 err = usb_allocmem(&sc->sc_bus, 2941 sizeof(usb_device_request_t), 2942 0, &upipe->u.ctl.reqdma); 2943 if (err) { 2944 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2945 uhci_free_std(sc, upipe->u.ctl.setup); 2946 uhci_free_std(sc, upipe->u.ctl.stat); 2947 goto bad; 2948 } 2949 break; 2950 case UE_INTERRUPT: 2951 pipe->methods = &uhci_device_intr_methods; 2952 ival = pipe->interval; 2953 if (ival == USBD_DEFAULT_INTERVAL) 2954 ival = ed->bInterval; 2955 return (uhci_device_setintr(sc, upipe, ival)); 2956 case UE_ISOCHRONOUS: 2957 pipe->methods = &uhci_device_isoc_methods; 2958 return (uhci_setup_isoc(pipe)); 2959 case UE_BULK: 2960 pipe->methods = &uhci_device_bulk_methods; 2961 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2962 if (upipe->u.bulk.sqh == NULL) 2963 goto bad; 2964 break; 2965 } 2966 } 2967 return (USBD_NORMAL_COMPLETION); 2968 2969 bad: 2970 return (USBD_NOMEM); 2971 } 2972 2973 /* 2974 * Data structures and routines to emulate the root hub. 2975 */ 2976 usb_device_descriptor_t uhci_devd = { 2977 USB_DEVICE_DESCRIPTOR_SIZE, 2978 UDESC_DEVICE, /* type */ 2979 {0x00, 0x01}, /* USB version */ 2980 UDCLASS_HUB, /* class */ 2981 UDSUBCLASS_HUB, /* subclass */ 2982 UDPROTO_FSHUB, /* protocol */ 2983 64, /* max packet */ 2984 {0},{0},{0x00,0x01}, /* device id */ 2985 1,2,0, /* string indicies */ 2986 1 /* # of configurations */ 2987 }; 2988 2989 const usb_config_descriptor_t uhci_confd = { 2990 USB_CONFIG_DESCRIPTOR_SIZE, 2991 UDESC_CONFIG, 2992 {USB_CONFIG_DESCRIPTOR_SIZE + 2993 USB_INTERFACE_DESCRIPTOR_SIZE + 2994 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2995 1, 2996 1, 2997 0, 2998 UC_ATTR_MBO | UC_SELF_POWERED, 2999 0 /* max power */ 3000 }; 3001 3002 const usb_interface_descriptor_t uhci_ifcd = { 3003 USB_INTERFACE_DESCRIPTOR_SIZE, 3004 UDESC_INTERFACE, 3005 0, 3006 0, 3007 1, 3008 UICLASS_HUB, 3009 UISUBCLASS_HUB, 3010 UIPROTO_FSHUB, 3011 0 3012 }; 3013 3014 const usb_endpoint_descriptor_t uhci_endpd = { 3015 USB_ENDPOINT_DESCRIPTOR_SIZE, 3016 UDESC_ENDPOINT, 3017 UE_DIR_IN | UHCI_INTR_ENDPT, 3018 UE_INTERRUPT, 3019 {8}, 3020 255 3021 }; 3022 3023 const usb_hub_descriptor_t uhci_hubd_piix = { 3024 USB_HUB_DESCRIPTOR_SIZE, 3025 UDESC_HUB, 3026 2, 3027 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3028 50, /* power on to power good */ 3029 0, 3030 { 0x00 }, /* both ports are removable */ 3031 { 0 }, 3032 }; 3033 3034 /* 3035 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3036 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3037 * should not be used by the USB subsystem. As we cannot issue a 3038 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3039 * will be enabled as part of the reset. 3040 * 3041 * On the VT83C572, the port cannot be successfully enabled until the 3042 * outstanding "port enable change" and "connection status change" 3043 * events have been reset. 3044 */ 3045 Static usbd_status 3046 uhci_portreset(uhci_softc_t *sc, int index) 3047 { 3048 int lim, port, x; 3049 3050 if (index == 1) 3051 port = UHCI_PORTSC1; 3052 else if (index == 2) 3053 port = UHCI_PORTSC2; 3054 else 3055 return (USBD_IOERROR); 3056 3057 x = URWMASK(UREAD2(sc, port)); 3058 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3059 3060 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3061 3062 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3063 index, UREAD2(sc, port))); 3064 3065 x = URWMASK(UREAD2(sc, port)); 3066 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3067 3068 delay(100); 3069 3070 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3071 index, UREAD2(sc, port))); 3072 3073 x = URWMASK(UREAD2(sc, port)); 3074 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3075 3076 for (lim = 10; --lim > 0;) { 3077 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3078 3079 x = UREAD2(sc, port); 3080 3081 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3082 index, lim, x)); 3083 3084 if (!(x & UHCI_PORTSC_CCS)) { 3085 /* 3086 * No device is connected (or was disconnected 3087 * during reset). Consider the port reset. 3088 * The delay must be long enough to ensure on 3089 * the initial iteration that the device 3090 * connection will have been registered. 50ms 3091 * appears to be sufficient, but 20ms is not. 3092 */ 3093 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3094 index, lim)); 3095 break; 3096 } 3097 3098 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3099 /* 3100 * Port enabled changed and/or connection 3101 * status changed were set. Reset either or 3102 * both raised flags (by writing a 1 to that 3103 * bit), and wait again for state to settle. 3104 */ 3105 UWRITE2(sc, port, URWMASK(x) | 3106 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3107 continue; 3108 } 3109 3110 if (x & UHCI_PORTSC_PE) 3111 /* Port is enabled */ 3112 break; 3113 3114 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3115 } 3116 3117 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3118 index, UREAD2(sc, port))); 3119 3120 if (lim <= 0) { 3121 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3122 return (USBD_TIMEOUT); 3123 } 3124 3125 sc->sc_isreset = 1; 3126 return (USBD_NORMAL_COMPLETION); 3127 } 3128 3129 /* 3130 * Simulate a hardware hub by handling all the necessary requests. 3131 */ 3132 usbd_status 3133 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3134 { 3135 usbd_status err; 3136 3137 /* Insert last in queue. */ 3138 err = usb_insert_transfer(xfer); 3139 if (err) 3140 return (err); 3141 3142 /* 3143 * Pipe isn't running (otherwise err would be USBD_INPROG), 3144 * so start it first. 3145 */ 3146 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3147 } 3148 3149 usbd_status 3150 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3151 { 3152 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3153 usb_device_request_t *req; 3154 void *buf = NULL; 3155 int port, x; 3156 int s, len, value, index, status, change, l, totlen = 0; 3157 usb_port_status_t ps; 3158 usbd_status err; 3159 3160 if (sc->sc_dying) 3161 return (USBD_IOERROR); 3162 3163 #ifdef DIAGNOSTIC 3164 if (!(xfer->rqflags & URQ_REQUEST)) 3165 panic("uhci_root_ctrl_transfer: not a request"); 3166 #endif 3167 req = &xfer->request; 3168 3169 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3170 req->bmRequestType, req->bRequest)); 3171 3172 len = UGETW(req->wLength); 3173 value = UGETW(req->wValue); 3174 index = UGETW(req->wIndex); 3175 3176 if (len != 0) 3177 buf = KERNADDR(&xfer->dmabuf, 0); 3178 3179 #define C(x,y) ((x) | ((y) << 8)) 3180 switch(C(req->bRequest, req->bmRequestType)) { 3181 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3182 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3183 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3184 /* 3185 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3186 * for the integrated root hub. 3187 */ 3188 break; 3189 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3190 if (len > 0) { 3191 *(u_int8_t *)buf = sc->sc_conf; 3192 totlen = 1; 3193 } 3194 break; 3195 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3196 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3197 if (len == 0) 3198 break; 3199 switch(value >> 8) { 3200 case UDESC_DEVICE: 3201 if ((value & 0xff) != 0) { 3202 err = USBD_IOERROR; 3203 goto ret; 3204 } 3205 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3206 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3207 memcpy(buf, &uhci_devd, l); 3208 break; 3209 case UDESC_CONFIG: 3210 if ((value & 0xff) != 0) { 3211 err = USBD_IOERROR; 3212 goto ret; 3213 } 3214 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3215 memcpy(buf, &uhci_confd, l); 3216 buf = (char *)buf + l; 3217 len -= l; 3218 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3219 totlen += l; 3220 memcpy(buf, &uhci_ifcd, l); 3221 buf = (char *)buf + l; 3222 len -= l; 3223 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3224 totlen += l; 3225 memcpy(buf, &uhci_endpd, l); 3226 break; 3227 case UDESC_STRING: 3228 #define sd ((usb_string_descriptor_t *)buf) 3229 switch (value & 0xff) { 3230 case 0: /* Language table */ 3231 totlen = usb_makelangtbl(sd, len); 3232 break; 3233 case 1: /* Vendor */ 3234 totlen = usb_makestrdesc(sd, len, 3235 sc->sc_vendor); 3236 break; 3237 case 2: /* Product */ 3238 totlen = usb_makestrdesc(sd, len, 3239 "UHCI root hub"); 3240 break; 3241 } 3242 #undef sd 3243 break; 3244 default: 3245 err = USBD_IOERROR; 3246 goto ret; 3247 } 3248 break; 3249 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3250 if (len > 0) { 3251 *(u_int8_t *)buf = 0; 3252 totlen = 1; 3253 } 3254 break; 3255 case C(UR_GET_STATUS, UT_READ_DEVICE): 3256 if (len > 1) { 3257 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3258 totlen = 2; 3259 } 3260 break; 3261 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3262 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3263 if (len > 1) { 3264 USETW(((usb_status_t *)buf)->wStatus, 0); 3265 totlen = 2; 3266 } 3267 break; 3268 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3269 if (value >= USB_MAX_DEVICES) { 3270 err = USBD_IOERROR; 3271 goto ret; 3272 } 3273 sc->sc_addr = value; 3274 break; 3275 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3276 if (value != 0 && value != 1) { 3277 err = USBD_IOERROR; 3278 goto ret; 3279 } 3280 sc->sc_conf = value; 3281 break; 3282 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3283 break; 3284 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3285 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3286 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3287 err = USBD_IOERROR; 3288 goto ret; 3289 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3290 break; 3291 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3292 break; 3293 /* Hub requests */ 3294 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3295 break; 3296 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3297 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3298 "port=%d feature=%d\n", 3299 index, value)); 3300 if (index == 1) 3301 port = UHCI_PORTSC1; 3302 else if (index == 2) 3303 port = UHCI_PORTSC2; 3304 else { 3305 err = USBD_IOERROR; 3306 goto ret; 3307 } 3308 switch(value) { 3309 case UHF_PORT_ENABLE: 3310 x = URWMASK(UREAD2(sc, port)); 3311 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3312 break; 3313 case UHF_PORT_SUSPEND: 3314 x = URWMASK(UREAD2(sc, port)); 3315 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3316 break; 3317 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3318 /* see USB2 spec ch. 7.1.7.7 */ 3319 usb_delay_ms(&sc->sc_bus, 20); 3320 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3321 /* 10ms resume delay must be provided by caller */ 3322 break; 3323 case UHF_PORT_RESET: 3324 x = URWMASK(UREAD2(sc, port)); 3325 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3326 break; 3327 case UHF_C_PORT_CONNECTION: 3328 x = URWMASK(UREAD2(sc, port)); 3329 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3330 break; 3331 case UHF_C_PORT_ENABLE: 3332 x = URWMASK(UREAD2(sc, port)); 3333 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3334 break; 3335 case UHF_C_PORT_OVER_CURRENT: 3336 x = URWMASK(UREAD2(sc, port)); 3337 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3338 break; 3339 case UHF_C_PORT_RESET: 3340 sc->sc_isreset = 0; 3341 err = USBD_NORMAL_COMPLETION; 3342 goto ret; 3343 case UHF_PORT_CONNECTION: 3344 case UHF_PORT_OVER_CURRENT: 3345 case UHF_PORT_POWER: 3346 case UHF_PORT_LOW_SPEED: 3347 case UHF_C_PORT_SUSPEND: 3348 default: 3349 err = USBD_IOERROR; 3350 goto ret; 3351 } 3352 break; 3353 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3354 if (index == 1) 3355 port = UHCI_PORTSC1; 3356 else if (index == 2) 3357 port = UHCI_PORTSC2; 3358 else { 3359 err = USBD_IOERROR; 3360 goto ret; 3361 } 3362 if (len > 0) { 3363 *(u_int8_t *)buf = 3364 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3365 UHCI_PORTSC_LS_SHIFT; 3366 totlen = 1; 3367 } 3368 break; 3369 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3370 if (len == 0) 3371 break; 3372 if ((value & 0xff) != 0) { 3373 err = USBD_IOERROR; 3374 goto ret; 3375 } 3376 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3377 totlen = l; 3378 memcpy(buf, &uhci_hubd_piix, l); 3379 break; 3380 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3381 if (len != 4) { 3382 err = USBD_IOERROR; 3383 goto ret; 3384 } 3385 memset(buf, 0, len); 3386 totlen = len; 3387 break; 3388 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3389 if (index == 1) 3390 port = UHCI_PORTSC1; 3391 else if (index == 2) 3392 port = UHCI_PORTSC2; 3393 else { 3394 err = USBD_IOERROR; 3395 goto ret; 3396 } 3397 if (len != 4) { 3398 err = USBD_IOERROR; 3399 goto ret; 3400 } 3401 x = UREAD2(sc, port); 3402 status = change = 0; 3403 if (x & UHCI_PORTSC_CCS) 3404 status |= UPS_CURRENT_CONNECT_STATUS; 3405 if (x & UHCI_PORTSC_CSC) 3406 change |= UPS_C_CONNECT_STATUS; 3407 if (x & UHCI_PORTSC_PE) 3408 status |= UPS_PORT_ENABLED; 3409 if (x & UHCI_PORTSC_POEDC) 3410 change |= UPS_C_PORT_ENABLED; 3411 if (x & UHCI_PORTSC_OCI) 3412 status |= UPS_OVERCURRENT_INDICATOR; 3413 if (x & UHCI_PORTSC_OCIC) 3414 change |= UPS_C_OVERCURRENT_INDICATOR; 3415 if (x & UHCI_PORTSC_SUSP) 3416 status |= UPS_SUSPEND; 3417 if (x & UHCI_PORTSC_LSDA) 3418 status |= UPS_LOW_SPEED; 3419 status |= UPS_PORT_POWER; 3420 if (sc->sc_isreset) 3421 change |= UPS_C_PORT_RESET; 3422 USETW(ps.wPortStatus, status); 3423 USETW(ps.wPortChange, change); 3424 l = min(len, sizeof ps); 3425 memcpy(buf, &ps, l); 3426 totlen = l; 3427 break; 3428 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3429 err = USBD_IOERROR; 3430 goto ret; 3431 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3432 break; 3433 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3434 if (index == 1) 3435 port = UHCI_PORTSC1; 3436 else if (index == 2) 3437 port = UHCI_PORTSC2; 3438 else { 3439 err = USBD_IOERROR; 3440 goto ret; 3441 } 3442 switch(value) { 3443 case UHF_PORT_ENABLE: 3444 x = URWMASK(UREAD2(sc, port)); 3445 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3446 break; 3447 case UHF_PORT_SUSPEND: 3448 x = URWMASK(UREAD2(sc, port)); 3449 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3450 break; 3451 case UHF_PORT_RESET: 3452 err = uhci_portreset(sc, index); 3453 goto ret; 3454 case UHF_PORT_POWER: 3455 /* Pretend we turned on power */ 3456 err = USBD_NORMAL_COMPLETION; 3457 goto ret; 3458 case UHF_C_PORT_CONNECTION: 3459 case UHF_C_PORT_ENABLE: 3460 case UHF_C_PORT_OVER_CURRENT: 3461 case UHF_PORT_CONNECTION: 3462 case UHF_PORT_OVER_CURRENT: 3463 case UHF_PORT_LOW_SPEED: 3464 case UHF_C_PORT_SUSPEND: 3465 case UHF_C_PORT_RESET: 3466 default: 3467 err = USBD_IOERROR; 3468 goto ret; 3469 } 3470 break; 3471 default: 3472 err = USBD_IOERROR; 3473 goto ret; 3474 } 3475 xfer->actlen = totlen; 3476 err = USBD_NORMAL_COMPLETION; 3477 ret: 3478 xfer->status = err; 3479 s = splusb(); 3480 usb_transfer_complete(xfer); 3481 splx(s); 3482 return (USBD_IN_PROGRESS); 3483 } 3484 3485 /* Abort a root control request. */ 3486 void 3487 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3488 { 3489 /* Nothing to do, all transfers are synchronous. */ 3490 } 3491 3492 /* Close the root pipe. */ 3493 void 3494 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3495 { 3496 DPRINTF(("uhci_root_ctrl_close\n")); 3497 } 3498 3499 /* Abort a root interrupt request. */ 3500 void 3501 uhci_root_intr_abort(usbd_xfer_handle xfer) 3502 { 3503 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3504 3505 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer); 3506 sc->sc_intr_xfer = NULL; 3507 3508 if (xfer->pipe->intrxfer == xfer) { 3509 DPRINTF(("uhci_root_intr_abort: remove\n")); 3510 xfer->pipe->intrxfer = 0; 3511 } 3512 xfer->status = USBD_CANCELLED; 3513 #ifdef DIAGNOSTIC 3514 UXFER(xfer)->iinfo.isdone = 1; 3515 #endif 3516 usb_transfer_complete(xfer); 3517 } 3518 3519 usbd_status 3520 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3521 { 3522 usbd_status err; 3523 3524 /* Insert last in queue. */ 3525 err = usb_insert_transfer(xfer); 3526 if (err) 3527 return (err); 3528 3529 /* 3530 * Pipe isn't running (otherwise err would be USBD_INPROG), 3531 * start first 3532 */ 3533 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3534 } 3535 3536 /* Start a transfer on the root interrupt pipe */ 3537 usbd_status 3538 uhci_root_intr_start(usbd_xfer_handle xfer) 3539 { 3540 usbd_pipe_handle pipe = xfer->pipe; 3541 uhci_softc_t *sc = pipe->device->bus->hci_private; 3542 unsigned int ival; 3543 3544 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3545 xfer, xfer->length, xfer->flags)); 3546 3547 if (sc->sc_dying) 3548 return (USBD_IOERROR); 3549 3550 /* XXX temporary variable needed to avoid gcc3 warning */ 3551 ival = xfer->pipe->endpoint->edesc->bInterval; 3552 sc->sc_ival = mstohz(ival); 3553 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3554 sc->sc_intr_xfer = xfer; 3555 return (USBD_IN_PROGRESS); 3556 } 3557 3558 /* Close the root interrupt pipe. */ 3559 void 3560 uhci_root_intr_close(usbd_pipe_handle pipe) 3561 { 3562 uhci_softc_t *sc = pipe->device->bus->hci_private; 3563 3564 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer); 3565 sc->sc_intr_xfer = NULL; 3566 DPRINTF(("uhci_root_intr_close\n")); 3567 } 3568
Indexes created Tue Sep 30 20:09:53 GMT 2025