uhci.c revision 1.221.2.2
1 /* $NetBSD: uhci.c,v 1.221.2.2 2008/07/03 18:38:05 simonb Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm 39 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.221.2.2 2008/07/03 18:38:05 simonb Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #include <sys/select.h> 54 #include <sys/extent.h> 55 #include <uvm/uvm_extern.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #include <machine/bus_pio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) 61 #include <sys/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 #include <sys/bus.h> 67 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/uhcireg.h> 77 #include <dev/usb/uhcivar.h> 78 #include <dev/usb/usbroothub_subr.h> 79 80 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 81 /*#define UHCI_CTL_LOOP */ 82 83 #if defined(__FreeBSD__) 84 #include <machine/clock.h> 85 86 #define delay(d) DELAY(d) 87 #endif 88 89 #if defined(__OpenBSD__) 90 struct cfdriver uhci_cd = { 91 NULL, "uhci", DV_DULL 92 }; 93 #endif 94 95 #ifdef UHCI_DEBUG 96 uhci_softc_t *thesc; 97 #define DPRINTF(x) if (uhcidebug) printf x 98 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 99 int uhcidebug = 0; 100 int uhcinoloop = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The UHCI controller is little endian, so on big endian machines 111 * the data stored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct uhci_pipe { 124 struct usbd_pipe pipe; 125 int nexttoggle; 126 127 u_char aborting; 128 usbd_xfer_handle abortstart, abortend; 129 130 /* Info needed for different pipe kinds. */ 131 union { 132 /* Control pipe */ 133 struct { 134 uhci_soft_qh_t *sqh; 135 usb_dma_t reqdma; 136 uhci_soft_td_t *setup, *stat; 137 u_int length; 138 } ctl; 139 /* Interrupt pipe */ 140 struct { 141 int npoll; 142 int isread; 143 uhci_soft_qh_t **qhs; 144 } intr; 145 /* Bulk pipe */ 146 struct { 147 uhci_soft_qh_t *sqh; 148 u_int length; 149 int isread; 150 } bulk; 151 /* Iso pipe */ 152 struct iso { 153 uhci_soft_td_t **stds; 154 int next, inuse; 155 } iso; 156 } u; 157 }; 158 159 Static void uhci_globalreset(uhci_softc_t *); 160 Static usbd_status uhci_portreset(uhci_softc_t*, int); 161 Static void uhci_reset(uhci_softc_t *); 162 Static usbd_status uhci_run(uhci_softc_t *, int run); 163 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 164 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 165 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 166 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 167 #if 0 168 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 169 uhci_intr_info_t *); 170 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 171 #endif 172 173 Static void uhci_free_std_chain(uhci_softc_t *, 174 uhci_soft_td_t *, uhci_soft_td_t *); 175 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 176 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 177 uhci_soft_td_t **, uhci_soft_td_t **); 178 Static void uhci_poll_hub(void *); 179 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 180 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 181 Static void uhci_idone(uhci_intr_info_t *); 182 183 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 184 185 Static void uhci_timeout(void *); 186 Static void uhci_timeout_task(void *); 187 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 188 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 189 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 190 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 191 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 192 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 193 Static void uhci_add_loop(uhci_softc_t *sc); 194 Static void uhci_rem_loop(uhci_softc_t *sc); 195 196 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 197 Static void uhci_device_isoc_enter(usbd_xfer_handle); 198 199 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 200 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 201 202 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 203 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 204 205 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 206 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 207 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 208 Static void uhci_device_ctrl_close(usbd_pipe_handle); 209 Static void uhci_device_ctrl_done(usbd_xfer_handle); 210 211 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 212 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 213 Static void uhci_device_intr_abort(usbd_xfer_handle); 214 Static void uhci_device_intr_close(usbd_pipe_handle); 215 Static void uhci_device_intr_done(usbd_xfer_handle); 216 217 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 218 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 219 Static void uhci_device_bulk_abort(usbd_xfer_handle); 220 Static void uhci_device_bulk_close(usbd_pipe_handle); 221 Static void uhci_device_bulk_done(usbd_xfer_handle); 222 223 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 224 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 225 Static void uhci_device_isoc_abort(usbd_xfer_handle); 226 Static void uhci_device_isoc_close(usbd_pipe_handle); 227 Static void uhci_device_isoc_done(usbd_xfer_handle); 228 229 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 230 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 231 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 232 Static void uhci_root_ctrl_close(usbd_pipe_handle); 233 Static void uhci_root_ctrl_done(usbd_xfer_handle); 234 235 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 236 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 237 Static void uhci_root_intr_abort(usbd_xfer_handle); 238 Static void uhci_root_intr_close(usbd_pipe_handle); 239 Static void uhci_root_intr_done(usbd_xfer_handle); 240 241 Static usbd_status uhci_open(usbd_pipe_handle); 242 Static void uhci_poll(struct usbd_bus *); 243 Static void uhci_softintr(void *); 244 245 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 246 247 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 248 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 249 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 250 struct uhci_pipe *pipe, int ival); 251 252 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 253 Static void uhci_noop(usbd_pipe_handle pipe); 254 255 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 256 uhci_soft_qh_t *); 257 258 #ifdef UHCI_DEBUG 259 Static void uhci_dump_all(uhci_softc_t *); 260 Static void uhci_dumpregs(uhci_softc_t *); 261 Static void uhci_dump_qhs(uhci_soft_qh_t *); 262 Static void uhci_dump_qh(uhci_soft_qh_t *); 263 Static void uhci_dump_tds(uhci_soft_td_t *); 264 Static void uhci_dump_td(uhci_soft_td_t *); 265 Static void uhci_dump_ii(uhci_intr_info_t *ii); 266 void uhci_dump(void); 267 #endif 268 269 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 270 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 271 #define UWRITE1(sc, r, x) \ 272 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 273 } while (/*CONSTCOND*/0) 274 #define UWRITE2(sc, r, x) \ 275 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 276 } while (/*CONSTCOND*/0) 277 #define UWRITE4(sc, r, x) \ 278 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 279 } while (/*CONSTCOND*/0) 280 static __inline uint8_t 281 UREAD1(uhci_softc_t *sc, bus_size_t r) 282 { 283 284 UBARR(sc); 285 return bus_space_read_1(sc->iot, sc->ioh, r); 286 } 287 288 static __inline uint16_t 289 UREAD2(uhci_softc_t *sc, bus_size_t r) 290 { 291 292 UBARR(sc); 293 return bus_space_read_2(sc->iot, sc->ioh, r); 294 } 295 296 static __inline uint32_t 297 UREAD4(uhci_softc_t *sc, bus_size_t r) 298 { 299 300 UBARR(sc); 301 return bus_space_read_4(sc->iot, sc->ioh, r); 302 } 303 304 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 305 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 306 307 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 308 309 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 310 311 #define UHCI_INTR_ENDPT 1 312 313 const struct usbd_bus_methods uhci_bus_methods = { 314 uhci_open, 315 uhci_softintr, 316 uhci_poll, 317 uhci_allocm, 318 uhci_freem, 319 uhci_allocx, 320 uhci_freex, 321 }; 322 323 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 324 uhci_root_ctrl_transfer, 325 uhci_root_ctrl_start, 326 uhci_root_ctrl_abort, 327 uhci_root_ctrl_close, 328 uhci_noop, 329 uhci_root_ctrl_done, 330 }; 331 332 const struct usbd_pipe_methods uhci_root_intr_methods = { 333 uhci_root_intr_transfer, 334 uhci_root_intr_start, 335 uhci_root_intr_abort, 336 uhci_root_intr_close, 337 uhci_noop, 338 uhci_root_intr_done, 339 }; 340 341 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 342 uhci_device_ctrl_transfer, 343 uhci_device_ctrl_start, 344 uhci_device_ctrl_abort, 345 uhci_device_ctrl_close, 346 uhci_noop, 347 uhci_device_ctrl_done, 348 }; 349 350 const struct usbd_pipe_methods uhci_device_intr_methods = { 351 uhci_device_intr_transfer, 352 uhci_device_intr_start, 353 uhci_device_intr_abort, 354 uhci_device_intr_close, 355 uhci_device_clear_toggle, 356 uhci_device_intr_done, 357 }; 358 359 const struct usbd_pipe_methods uhci_device_bulk_methods = { 360 uhci_device_bulk_transfer, 361 uhci_device_bulk_start, 362 uhci_device_bulk_abort, 363 uhci_device_bulk_close, 364 uhci_device_clear_toggle, 365 uhci_device_bulk_done, 366 }; 367 368 const struct usbd_pipe_methods uhci_device_isoc_methods = { 369 uhci_device_isoc_transfer, 370 uhci_device_isoc_start, 371 uhci_device_isoc_abort, 372 uhci_device_isoc_close, 373 uhci_noop, 374 uhci_device_isoc_done, 375 }; 376 377 #define uhci_add_intr_info(sc, ii) \ 378 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 379 #define uhci_del_intr_info(ii) \ 380 do { \ 381 LIST_REMOVE((ii), list); \ 382 (ii)->list.le_prev = NULL; \ 383 } while (0) 384 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 385 386 Static inline uhci_soft_qh_t * 387 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 388 { 389 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 390 391 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 392 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 393 usb_syncmem(&pqh->dma, 394 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 395 sizeof(pqh->qh.qh_hlink), 396 BUS_DMASYNC_POSTWRITE); 397 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 398 printf("uhci_find_prev_qh: QH not found\n"); 399 return (NULL); 400 } 401 #endif 402 } 403 return (pqh); 404 } 405 406 void 407 uhci_globalreset(uhci_softc_t *sc) 408 { 409 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 410 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 411 UHCICMD(sc, 0); /* do nothing */ 412 } 413 414 usbd_status 415 uhci_init(uhci_softc_t *sc) 416 { 417 usbd_status err; 418 int i, j; 419 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 420 uhci_soft_td_t *std; 421 422 DPRINTFN(1,("uhci_init: start\n")); 423 424 #ifdef UHCI_DEBUG 425 thesc = sc; 426 427 if (uhcidebug > 2) 428 uhci_dumpregs(sc); 429 #endif 430 431 sc->sc_suspend = PWR_RESUME; 432 433 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 434 uhci_globalreset(sc); /* reset the controller */ 435 uhci_reset(sc); 436 437 #ifdef __NetBSD__ 438 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 439 USB_MEM_RESERVE); 440 #endif 441 442 /* Allocate and initialize real frame array. */ 443 err = usb_allocmem(&sc->sc_bus, 444 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 445 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 446 if (err) 447 return (err); 448 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 449 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 450 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 451 452 /* 453 * Allocate a TD, inactive, that hangs from the last QH. 454 * This is to avoid a bug in the PIIX that makes it run berserk 455 * otherwise. 456 */ 457 std = uhci_alloc_std(sc); 458 if (std == NULL) 459 return (USBD_NOMEM); 460 std->link.std = NULL; 461 std->td.td_link = htole32(UHCI_PTR_T); 462 std->td.td_status = htole32(0); /* inactive */ 463 std->td.td_token = htole32(0); 464 std->td.td_buffer = htole32(0); 465 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 466 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 467 468 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 469 lsqh = uhci_alloc_sqh(sc); 470 if (lsqh == NULL) 471 return (USBD_NOMEM); 472 lsqh->hlink = NULL; 473 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 474 lsqh->elink = std; 475 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 476 sc->sc_last_qh = lsqh; 477 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 478 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 479 480 /* Allocate the dummy QH where bulk traffic will be queued. */ 481 bsqh = uhci_alloc_sqh(sc); 482 if (bsqh == NULL) 483 return (USBD_NOMEM); 484 bsqh->hlink = lsqh; 485 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 486 bsqh->elink = NULL; 487 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 488 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 489 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 490 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 491 492 /* Allocate dummy QH where high speed control traffic will be queued. */ 493 chsqh = uhci_alloc_sqh(sc); 494 if (chsqh == NULL) 495 return (USBD_NOMEM); 496 chsqh->hlink = bsqh; 497 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 498 chsqh->elink = NULL; 499 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 500 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 501 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 502 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 503 504 /* Allocate dummy QH where control traffic will be queued. */ 505 clsqh = uhci_alloc_sqh(sc); 506 if (clsqh == NULL) 507 return (USBD_NOMEM); 508 clsqh->hlink = chsqh; 509 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 510 clsqh->elink = NULL; 511 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 512 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 513 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 514 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 515 516 /* 517 * Make all (virtual) frame list pointers point to the interrupt 518 * queue heads and the interrupt queue heads at the control 519 * queue head and point the physical frame list to the virtual. 520 */ 521 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 522 std = uhci_alloc_std(sc); 523 sqh = uhci_alloc_sqh(sc); 524 if (std == NULL || sqh == NULL) 525 return (USBD_NOMEM); 526 std->link.sqh = sqh; 527 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 528 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 529 std->td.td_token = htole32(0); 530 std->td.td_buffer = htole32(0); 531 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 532 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 533 sqh->hlink = clsqh; 534 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 535 sqh->elink = NULL; 536 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 537 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 538 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 539 sc->sc_vframes[i].htd = std; 540 sc->sc_vframes[i].etd = std; 541 sc->sc_vframes[i].hqh = sqh; 542 sc->sc_vframes[i].eqh = sqh; 543 for (j = i; 544 j < UHCI_FRAMELIST_COUNT; 545 j += UHCI_VFRAMELIST_COUNT) 546 sc->sc_pframes[j] = htole32(std->physaddr); 547 } 548 usb_syncmem(&sc->sc_dma, 0, 549 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 550 BUS_DMASYNC_PREWRITE); 551 552 553 LIST_INIT(&sc->sc_intrhead); 554 555 SIMPLEQ_INIT(&sc->sc_free_xfers); 556 557 usb_callout_init(sc->sc_poll_handle); 558 559 /* Set up the bus struct. */ 560 sc->sc_bus.methods = &uhci_bus_methods; 561 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 562 563 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 564 565 DPRINTFN(1,("uhci_init: enabling\n")); 566 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 567 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 568 569 return (uhci_run(sc, 1)); /* and here we go... */ 570 } 571 572 #if defined(__NetBSD__) || defined(__OpenBSD__) 573 int 574 uhci_activate(device_t self, enum devact act) 575 { 576 struct uhci_softc *sc = device_private(self); 577 int rv = 0; 578 579 switch (act) { 580 case DVACT_ACTIVATE: 581 return (EOPNOTSUPP); 582 583 case DVACT_DEACTIVATE: 584 sc->sc_dying = 1; 585 if (sc->sc_child != NULL) 586 rv = config_deactivate(sc->sc_child); 587 break; 588 } 589 return (rv); 590 } 591 592 void 593 uhci_childdet(device_t self, device_t child) 594 { 595 struct uhci_softc *sc = device_private(self); 596 597 KASSERT(sc->sc_child == child); 598 sc->sc_child = NULL; 599 } 600 601 int 602 uhci_detach(struct uhci_softc *sc, int flags) 603 { 604 usbd_xfer_handle xfer; 605 int rv = 0; 606 607 if (sc->sc_child != NULL) 608 rv = config_detach(sc->sc_child, flags); 609 610 if (rv != 0) 611 return (rv); 612 613 /* Free all xfers associated with this HC. */ 614 for (;;) { 615 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 616 if (xfer == NULL) 617 break; 618 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 619 free(xfer, M_USB); 620 } 621 622 /* XXX free other data structures XXX */ 623 624 return (rv); 625 } 626 #endif 627 628 usbd_status 629 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 630 { 631 struct uhci_softc *sc = bus->hci_private; 632 usbd_status status; 633 u_int32_t n; 634 635 /* 636 * XXX 637 * Since we are allocating a buffer we can assume that we will 638 * need TDs for it. Since we don't want to allocate those from 639 * an interrupt context, we allocate them here and free them again. 640 * This is no guarantee that we'll get the TDs next time... 641 */ 642 n = size / 8; 643 if (n > 16) { 644 u_int32_t i; 645 uhci_soft_td_t **stds; 646 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 647 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 648 M_WAITOK|M_ZERO); 649 for(i=0; i < n; i++) 650 stds[i] = uhci_alloc_std(sc); 651 for(i=0; i < n; i++) 652 if (stds[i] != NULL) 653 uhci_free_std(sc, stds[i]); 654 free(stds, M_TEMP); 655 } 656 657 658 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 659 #ifdef __NetBSD__ 660 if (status == USBD_NOMEM) 661 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 662 #endif 663 return status; 664 } 665 666 void 667 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 668 { 669 #ifdef __NetBSD__ 670 if (dma->block->flags & USB_DMA_RESERVE) { 671 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 672 dma); 673 return; 674 } 675 #endif 676 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 677 } 678 679 usbd_xfer_handle 680 uhci_allocx(struct usbd_bus *bus) 681 { 682 struct uhci_softc *sc = bus->hci_private; 683 usbd_xfer_handle xfer; 684 685 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 686 if (xfer != NULL) { 687 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 688 #ifdef DIAGNOSTIC 689 if (xfer->busy_free != XFER_FREE) { 690 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 691 xfer->busy_free); 692 } 693 #endif 694 } else { 695 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 696 } 697 if (xfer != NULL) { 698 memset(xfer, 0, sizeof (struct uhci_xfer)); 699 UXFER(xfer)->iinfo.sc = sc; 700 #ifdef DIAGNOSTIC 701 UXFER(xfer)->iinfo.isdone = 1; 702 xfer->busy_free = XFER_BUSY; 703 #endif 704 } 705 return (xfer); 706 } 707 708 void 709 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 710 { 711 struct uhci_softc *sc = bus->hci_private; 712 713 #ifdef DIAGNOSTIC 714 if (xfer->busy_free != XFER_BUSY) { 715 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 716 xfer->busy_free); 717 } 718 xfer->busy_free = XFER_FREE; 719 if (!UXFER(xfer)->iinfo.isdone) { 720 printf("uhci_freex: !isdone\n"); 721 } 722 #endif 723 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 724 } 725 726 /* 727 * Handle suspend/resume. 728 * 729 * We need to switch to polling mode here, because this routine is 730 * called from an interrupt context. This is all right since we 731 * are almost suspended anyway. 732 */ 733 bool 734 uhci_resume(device_t dv PMF_FN_ARGS) 735 { 736 uhci_softc_t *sc = device_private(dv); 737 int cmd; 738 int s; 739 740 s = splhardusb(); 741 742 cmd = UREAD2(sc, UHCI_CMD); 743 sc->sc_bus.use_polling++; 744 UWRITE2(sc, UHCI_INTR, 0); 745 uhci_globalreset(sc); 746 uhci_reset(sc); 747 if (cmd & UHCI_CMD_RS) 748 uhci_run(sc, 0); 749 750 /* restore saved state */ 751 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 752 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 753 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 754 755 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 756 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 757 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 758 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 759 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 760 UHCICMD(sc, UHCI_CMD_MAXP); 761 uhci_run(sc, 1); /* and start traffic again */ 762 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 763 sc->sc_bus.use_polling--; 764 if (sc->sc_intr_xfer != NULL) 765 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 766 sc->sc_intr_xfer); 767 #ifdef UHCI_DEBUG 768 if (uhcidebug > 2) 769 uhci_dumpregs(sc); 770 #endif 771 772 sc->sc_suspend = PWR_RESUME; 773 splx(s); 774 775 return true; 776 } 777 778 bool 779 uhci_suspend(device_t dv PMF_FN_ARGS) 780 { 781 uhci_softc_t *sc = device_private(dv); 782 int cmd; 783 int s; 784 785 s = splhardusb(); 786 787 cmd = UREAD2(sc, UHCI_CMD); 788 789 #ifdef UHCI_DEBUG 790 if (uhcidebug > 2) 791 uhci_dumpregs(sc); 792 #endif 793 if (sc->sc_intr_xfer != NULL) 794 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, 795 sc->sc_intr_xfer); 796 sc->sc_suspend = PWR_SUSPEND; 797 sc->sc_bus.use_polling++; 798 799 uhci_run(sc, 0); /* stop the controller */ 800 cmd &= ~UHCI_CMD_RS; 801 802 /* save some state if BIOS doesn't */ 803 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 804 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 805 806 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 807 808 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 809 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 810 sc->sc_bus.use_polling--; 811 812 splx(s); 813 814 return true; 815 } 816 817 #ifdef UHCI_DEBUG 818 Static void 819 uhci_dumpregs(uhci_softc_t *sc) 820 { 821 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 822 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 823 device_xname(sc->sc_dev), 824 UREAD2(sc, UHCI_CMD), 825 UREAD2(sc, UHCI_STS), 826 UREAD2(sc, UHCI_INTR), 827 UREAD2(sc, UHCI_FRNUM), 828 UREAD4(sc, UHCI_FLBASEADDR), 829 UREAD1(sc, UHCI_SOF), 830 UREAD2(sc, UHCI_PORTSC1), 831 UREAD2(sc, UHCI_PORTSC2))); 832 } 833 834 void 835 uhci_dump_td(uhci_soft_td_t *p) 836 { 837 char sbuf[128], sbuf2[128]; 838 839 840 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 841 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 842 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 843 "token=0x%08lx buffer=0x%08lx\n", 844 p, (long)p->physaddr, 845 (long)le32toh(p->td.td_link), 846 (long)le32toh(p->td.td_status), 847 (long)le32toh(p->td.td_token), 848 (long)le32toh(p->td.td_buffer))); 849 850 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF", 851 sbuf, sizeof(sbuf)); 852 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status), 853 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 854 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 855 sbuf2, sizeof(sbuf2)); 856 857 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 858 "D=%d,maxlen=%d\n", sbuf, sbuf2, 859 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 860 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 861 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 862 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 863 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 864 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 865 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 866 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 867 BUS_DMASYNC_PREREAD); 868 } 869 870 void 871 uhci_dump_qh(uhci_soft_qh_t *sqh) 872 { 873 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 874 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 875 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 876 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 877 le32toh(sqh->qh.qh_elink))); 878 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 879 } 880 881 882 #if 1 883 void 884 uhci_dump(void) 885 { 886 uhci_dump_all(thesc); 887 } 888 #endif 889 890 void 891 uhci_dump_all(uhci_softc_t *sc) 892 { 893 uhci_dumpregs(sc); 894 printf("intrs=%d\n", sc->sc_bus.no_intrs); 895 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 896 uhci_dump_qh(sc->sc_lctl_start); 897 } 898 899 900 void 901 uhci_dump_qhs(uhci_soft_qh_t *sqh) 902 { 903 uhci_dump_qh(sqh); 904 905 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 906 * Traverses sideways first, then down. 907 * 908 * QH1 909 * QH2 910 * No QH 911 * TD2.1 912 * TD2.2 913 * TD1.1 914 * etc. 915 * 916 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 917 */ 918 919 920 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 921 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 922 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 923 uhci_dump_qhs(sqh->hlink); 924 else 925 DPRINTF(("No QH\n")); 926 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 927 928 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 929 uhci_dump_tds(sqh->elink); 930 else 931 DPRINTF(("No TD\n")); 932 } 933 934 void 935 uhci_dump_tds(uhci_soft_td_t *std) 936 { 937 uhci_soft_td_t *td; 938 int stop; 939 940 for(td = std; td != NULL; td = td->link.std) { 941 uhci_dump_td(td); 942 943 /* Check whether the link pointer in this TD marks 944 * the link pointer as end of queue. This avoids 945 * printing the free list in case the queue/TD has 946 * already been moved there (seatbelt). 947 */ 948 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 949 sizeof(td->td.td_link), 950 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 951 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 952 le32toh(td->td.td_link) == 0); 953 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 954 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 955 if (stop) 956 break; 957 } 958 } 959 960 Static void 961 uhci_dump_ii(uhci_intr_info_t *ii) 962 { 963 usbd_pipe_handle pipe; 964 usb_endpoint_descriptor_t *ed; 965 usbd_device_handle dev; 966 967 #ifdef DIAGNOSTIC 968 #define DONE ii->isdone 969 #else 970 #define DONE 0 971 #endif 972 if (ii == NULL) { 973 printf("ii NULL\n"); 974 return; 975 } 976 if (ii->xfer == NULL) { 977 printf("ii %p: done=%d xfer=NULL\n", 978 ii, DONE); 979 return; 980 } 981 pipe = ii->xfer->pipe; 982 if (pipe == NULL) { 983 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 984 ii, DONE, ii->xfer); 985 return; 986 } 987 if (pipe->endpoint == NULL) { 988 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 989 ii, DONE, ii->xfer, pipe); 990 return; 991 } 992 if (pipe->device == NULL) { 993 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 994 ii, DONE, ii->xfer, pipe); 995 return; 996 } 997 ed = pipe->endpoint->edesc; 998 dev = pipe->device; 999 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 1000 ii, DONE, ii->xfer, dev, 1001 UGETW(dev->ddesc.idVendor), 1002 UGETW(dev->ddesc.idProduct), 1003 dev->address, pipe, 1004 ed->bEndpointAddress, ed->bmAttributes); 1005 #undef DONE 1006 } 1007 1008 void uhci_dump_iis(struct uhci_softc *sc); 1009 void 1010 uhci_dump_iis(struct uhci_softc *sc) 1011 { 1012 uhci_intr_info_t *ii; 1013 1014 printf("intr_info list:\n"); 1015 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 1016 uhci_dump_ii(ii); 1017 } 1018 1019 void iidump(void); 1020 void iidump(void) { uhci_dump_iis(thesc); } 1021 1022 #endif 1023 1024 /* 1025 * This routine is executed periodically and simulates interrupts 1026 * from the root controller interrupt pipe for port status change. 1027 */ 1028 void 1029 uhci_poll_hub(void *addr) 1030 { 1031 usbd_xfer_handle xfer = addr; 1032 usbd_pipe_handle pipe = xfer->pipe; 1033 uhci_softc_t *sc = pipe->device->bus->hci_private; 1034 int s; 1035 u_char *p; 1036 1037 DPRINTFN(20, ("uhci_poll_hub\n")); 1038 1039 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1040 1041 p = KERNADDR(&xfer->dmabuf, 0); 1042 p[0] = 0; 1043 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1044 p[0] |= 1<<1; 1045 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1046 p[0] |= 1<<2; 1047 if (p[0] == 0) 1048 /* No change, try again in a while */ 1049 return; 1050 1051 xfer->actlen = 1; 1052 xfer->status = USBD_NORMAL_COMPLETION; 1053 s = splusb(); 1054 xfer->device->bus->intr_context++; 1055 usb_transfer_complete(xfer); 1056 xfer->device->bus->intr_context--; 1057 splx(s); 1058 } 1059 1060 void 1061 uhci_root_intr_done(usbd_xfer_handle xfer) 1062 { 1063 } 1064 1065 void 1066 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1067 { 1068 } 1069 1070 /* 1071 * Let the last QH loop back to the high speed control transfer QH. 1072 * This is what intel calls "bandwidth reclamation" and improves 1073 * USB performance a lot for some devices. 1074 * If we are already looping, just count it. 1075 */ 1076 void 1077 uhci_add_loop(uhci_softc_t *sc) { 1078 #ifdef UHCI_DEBUG 1079 if (uhcinoloop) 1080 return; 1081 #endif 1082 if (++sc->sc_loops == 1) { 1083 DPRINTFN(5,("uhci_start_loop: add\n")); 1084 /* Note, we don't loop back the soft pointer. */ 1085 sc->sc_last_qh->qh.qh_hlink = 1086 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1087 usb_syncmem(&sc->sc_last_qh->dma, 1088 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1089 sizeof(sc->sc_last_qh->qh.qh_hlink), 1090 BUS_DMASYNC_PREWRITE); 1091 } 1092 } 1093 1094 void 1095 uhci_rem_loop(uhci_softc_t *sc) { 1096 #ifdef UHCI_DEBUG 1097 if (uhcinoloop) 1098 return; 1099 #endif 1100 if (--sc->sc_loops == 0) { 1101 DPRINTFN(5,("uhci_end_loop: remove\n")); 1102 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1103 usb_syncmem(&sc->sc_last_qh->dma, 1104 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1105 sizeof(sc->sc_last_qh->qh.qh_hlink), 1106 BUS_DMASYNC_PREWRITE); 1107 } 1108 } 1109 1110 /* Add high speed control QH, called at splusb(). */ 1111 void 1112 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1113 { 1114 uhci_soft_qh_t *eqh; 1115 1116 SPLUSBCHECK; 1117 1118 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1119 eqh = sc->sc_hctl_end; 1120 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1121 sizeof(eqh->qh.qh_hlink), 1122 BUS_DMASYNC_POSTWRITE); 1123 sqh->hlink = eqh->hlink; 1124 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1125 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1126 BUS_DMASYNC_PREWRITE); 1127 eqh->hlink = sqh; 1128 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1129 sc->sc_hctl_end = sqh; 1130 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1131 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1132 #ifdef UHCI_CTL_LOOP 1133 uhci_add_loop(sc); 1134 #endif 1135 } 1136 1137 /* Remove high speed control QH, called at splusb(). */ 1138 void 1139 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1140 { 1141 uhci_soft_qh_t *pqh; 1142 1143 SPLUSBCHECK; 1144 1145 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1146 #ifdef UHCI_CTL_LOOP 1147 uhci_rem_loop(sc); 1148 #endif 1149 /* 1150 * The T bit should be set in the elink of the QH so that the HC 1151 * doesn't follow the pointer. This condition may fail if the 1152 * the transferred packet was short so that the QH still points 1153 * at the last used TD. 1154 * In this case we set the T bit and wait a little for the HC 1155 * to stop looking at the TD. 1156 * Note that if the TD chain is large enough, the controller 1157 * may still be looking at the chain at the end of this function. 1158 * uhci_free_std_chain() will make sure the controller stops 1159 * looking at it quickly, but until then we should not change 1160 * sqh->hlink. 1161 */ 1162 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1163 sizeof(sqh->qh.qh_elink), 1164 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1165 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1166 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1167 usb_syncmem(&sqh->dma, 1168 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1169 sizeof(sqh->qh.qh_elink), 1170 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1171 delay(UHCI_QH_REMOVE_DELAY); 1172 } 1173 1174 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1175 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1176 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1177 pqh->hlink = sqh->hlink; 1178 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1179 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1180 sizeof(pqh->qh.qh_hlink), 1181 BUS_DMASYNC_PREWRITE); 1182 delay(UHCI_QH_REMOVE_DELAY); 1183 if (sc->sc_hctl_end == sqh) 1184 sc->sc_hctl_end = pqh; 1185 } 1186 1187 /* Add low speed control QH, called at splusb(). */ 1188 void 1189 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1190 { 1191 uhci_soft_qh_t *eqh; 1192 1193 SPLUSBCHECK; 1194 1195 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1196 eqh = sc->sc_lctl_end; 1197 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1198 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1199 sqh->hlink = eqh->hlink; 1200 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1201 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1202 BUS_DMASYNC_PREWRITE); 1203 eqh->hlink = sqh; 1204 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1205 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1206 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1207 sc->sc_lctl_end = sqh; 1208 } 1209 1210 /* Remove low speed control QH, called at splusb(). */ 1211 void 1212 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1213 { 1214 uhci_soft_qh_t *pqh; 1215 1216 SPLUSBCHECK; 1217 1218 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1219 /* See comment in uhci_remove_hs_ctrl() */ 1220 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1221 sizeof(sqh->qh.qh_elink), 1222 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1223 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1224 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1225 usb_syncmem(&sqh->dma, 1226 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1227 sizeof(sqh->qh.qh_elink), 1228 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1229 delay(UHCI_QH_REMOVE_DELAY); 1230 } 1231 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1232 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1233 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1234 pqh->hlink = sqh->hlink; 1235 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1236 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1237 sizeof(pqh->qh.qh_hlink), 1238 BUS_DMASYNC_PREWRITE); 1239 delay(UHCI_QH_REMOVE_DELAY); 1240 if (sc->sc_lctl_end == sqh) 1241 sc->sc_lctl_end = pqh; 1242 } 1243 1244 /* Add bulk QH, called at splusb(). */ 1245 void 1246 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1247 { 1248 uhci_soft_qh_t *eqh; 1249 1250 SPLUSBCHECK; 1251 1252 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1253 eqh = sc->sc_bulk_end; 1254 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1255 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1256 sqh->hlink = eqh->hlink; 1257 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1258 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1259 BUS_DMASYNC_PREWRITE); 1260 eqh->hlink = sqh; 1261 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1262 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1263 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1264 sc->sc_bulk_end = sqh; 1265 uhci_add_loop(sc); 1266 } 1267 1268 /* Remove bulk QH, called at splusb(). */ 1269 void 1270 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1271 { 1272 uhci_soft_qh_t *pqh; 1273 1274 SPLUSBCHECK; 1275 1276 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1277 uhci_rem_loop(sc); 1278 /* See comment in uhci_remove_hs_ctrl() */ 1279 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1280 sizeof(sqh->qh.qh_elink), 1281 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1282 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1283 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1284 usb_syncmem(&sqh->dma, 1285 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1286 sizeof(sqh->qh.qh_elink), 1287 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1288 delay(UHCI_QH_REMOVE_DELAY); 1289 } 1290 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1291 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1292 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1293 pqh->hlink = sqh->hlink; 1294 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1295 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1296 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1297 delay(UHCI_QH_REMOVE_DELAY); 1298 if (sc->sc_bulk_end == sqh) 1299 sc->sc_bulk_end = pqh; 1300 } 1301 1302 Static int uhci_intr1(uhci_softc_t *); 1303 1304 int 1305 uhci_intr(void *arg) 1306 { 1307 uhci_softc_t *sc = arg; 1308 1309 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1310 return (0); 1311 1312 if (sc->sc_bus.use_polling) { 1313 #ifdef DIAGNOSTIC 1314 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1315 #endif 1316 return (0); 1317 } 1318 1319 return (uhci_intr1(sc)); 1320 } 1321 1322 int 1323 uhci_intr1(uhci_softc_t *sc) 1324 { 1325 int status; 1326 int ack; 1327 1328 #ifdef UHCI_DEBUG 1329 if (uhcidebug > 15) { 1330 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1331 uhci_dumpregs(sc); 1332 } 1333 #endif 1334 1335 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1336 if (status == 0) /* The interrupt was not for us. */ 1337 return (0); 1338 1339 if (sc->sc_suspend != PWR_RESUME) { 1340 #ifdef DIAGNOSTIC 1341 printf("%s: interrupt while not operating ignored\n", 1342 device_xname(sc->sc_dev)); 1343 #endif 1344 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1345 return (0); 1346 } 1347 1348 ack = 0; 1349 if (status & UHCI_STS_USBINT) 1350 ack |= UHCI_STS_USBINT; 1351 if (status & UHCI_STS_USBEI) 1352 ack |= UHCI_STS_USBEI; 1353 if (status & UHCI_STS_RD) { 1354 ack |= UHCI_STS_RD; 1355 #ifdef UHCI_DEBUG 1356 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1357 #endif 1358 } 1359 if (status & UHCI_STS_HSE) { 1360 ack |= UHCI_STS_HSE; 1361 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1362 } 1363 if (status & UHCI_STS_HCPE) { 1364 ack |= UHCI_STS_HCPE; 1365 printf("%s: host controller process error\n", 1366 device_xname(sc->sc_dev)); 1367 } 1368 if (status & UHCI_STS_HCH) { 1369 /* no acknowledge needed */ 1370 if (!sc->sc_dying) { 1371 printf("%s: host controller halted\n", 1372 device_xname(sc->sc_dev)); 1373 #ifdef UHCI_DEBUG 1374 uhci_dump_all(sc); 1375 #endif 1376 } 1377 sc->sc_dying = 1; 1378 } 1379 1380 if (!ack) 1381 return (0); /* nothing to acknowledge */ 1382 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1383 1384 sc->sc_bus.no_intrs++; 1385 usb_schedsoftintr(&sc->sc_bus); 1386 1387 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1388 1389 return (1); 1390 } 1391 1392 void 1393 uhci_softintr(void *v) 1394 { 1395 struct usbd_bus *bus = v; 1396 uhci_softc_t *sc = bus->hci_private; 1397 uhci_intr_info_t *ii, *nextii; 1398 1399 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev), 1400 sc->sc_bus.intr_context)); 1401 1402 sc->sc_bus.intr_context++; 1403 1404 /* 1405 * Interrupts on UHCI really suck. When the host controller 1406 * interrupts because a transfer is completed there is no 1407 * way of knowing which transfer it was. You can scan down 1408 * the TDs and QHs of the previous frame to limit the search, 1409 * but that assumes that the interrupt was not delayed by more 1410 * than 1 ms, which may not always be true (e.g. after debug 1411 * output on a slow console). 1412 * We scan all interrupt descriptors to see if any have 1413 * completed. 1414 */ 1415 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1416 nextii = LIST_NEXT(ii, list); 1417 uhci_check_intr(sc, ii); 1418 } 1419 1420 #ifdef USB_USE_SOFTINTR 1421 if (sc->sc_softwake) { 1422 sc->sc_softwake = 0; 1423 wakeup(&sc->sc_softwake); 1424 } 1425 #endif /* USB_USE_SOFTINTR */ 1426 1427 sc->sc_bus.intr_context--; 1428 } 1429 1430 /* Check for an interrupt. */ 1431 void 1432 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1433 { 1434 uhci_soft_td_t *std, *lstd; 1435 u_int32_t status; 1436 1437 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1438 #ifdef DIAGNOSTIC 1439 if (ii == NULL) { 1440 printf("uhci_check_intr: no ii? %p\n", ii); 1441 return; 1442 } 1443 #endif 1444 if (ii->xfer->status == USBD_CANCELLED || 1445 ii->xfer->status == USBD_TIMEOUT) { 1446 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1447 return; 1448 } 1449 1450 if (ii->stdstart == NULL) 1451 return; 1452 lstd = ii->stdend; 1453 #ifdef DIAGNOSTIC 1454 if (lstd == NULL) { 1455 printf("uhci_check_intr: std==0\n"); 1456 return; 1457 } 1458 #endif 1459 /* 1460 * If the last TD is still active we need to check whether there 1461 * is an error somewhere in the middle, or whether there was a 1462 * short packet (SPD and not ACTIVE). 1463 */ 1464 usb_syncmem(&lstd->dma, 1465 lstd->offs + offsetof(uhci_td_t, td_status), 1466 sizeof(lstd->td.td_status), 1467 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1468 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1469 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1470 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1471 usb_syncmem(&std->dma, 1472 std->offs + offsetof(uhci_td_t, td_status), 1473 sizeof(std->td.td_status), 1474 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1475 status = le32toh(std->td.td_status); 1476 usb_syncmem(&std->dma, 1477 std->offs + offsetof(uhci_td_t, td_status), 1478 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1479 /* If there's an active TD the xfer isn't done. */ 1480 if (status & UHCI_TD_ACTIVE) 1481 break; 1482 /* Any kind of error makes the xfer done. */ 1483 if (status & UHCI_TD_STALLED) 1484 goto done; 1485 /* We want short packets, and it is short: it's done */ 1486 usb_syncmem(&std->dma, 1487 std->offs + offsetof(uhci_td_t, td_token), 1488 sizeof(std->td.td_token), 1489 BUS_DMASYNC_POSTWRITE); 1490 if ((status & UHCI_TD_SPD) && 1491 UHCI_TD_GET_ACTLEN(status) < 1492 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1493 goto done; 1494 } 1495 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1496 ii, ii->stdstart)); 1497 usb_syncmem(&lstd->dma, 1498 lstd->offs + offsetof(uhci_td_t, td_status), 1499 sizeof(lstd->td.td_status), 1500 BUS_DMASYNC_PREREAD); 1501 return; 1502 } 1503 done: 1504 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1505 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii); 1506 uhci_idone(ii); 1507 } 1508 1509 /* Called at splusb() */ 1510 void 1511 uhci_idone(uhci_intr_info_t *ii) 1512 { 1513 usbd_xfer_handle xfer = ii->xfer; 1514 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1515 uhci_soft_td_t *std; 1516 u_int32_t status = 0, nstatus; 1517 int actlen; 1518 1519 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1520 #ifdef DIAGNOSTIC 1521 { 1522 int s = splhigh(); 1523 if (ii->isdone) { 1524 splx(s); 1525 #ifdef UHCI_DEBUG 1526 printf("uhci_idone: ii is done!\n "); 1527 uhci_dump_ii(ii); 1528 #else 1529 printf("uhci_idone: ii=%p is done!\n", ii); 1530 #endif 1531 return; 1532 } 1533 ii->isdone = 1; 1534 splx(s); 1535 } 1536 #endif 1537 1538 if (xfer->nframes != 0) { 1539 /* Isoc transfer, do things differently. */ 1540 uhci_soft_td_t **stds = upipe->u.iso.stds; 1541 int i, n, nframes, len; 1542 1543 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1544 1545 nframes = xfer->nframes; 1546 actlen = 0; 1547 n = UXFER(xfer)->curframe; 1548 for (i = 0; i < nframes; i++) { 1549 std = stds[n]; 1550 #ifdef UHCI_DEBUG 1551 if (uhcidebug > 5) { 1552 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1553 uhci_dump_td(std); 1554 } 1555 #endif 1556 if (++n >= UHCI_VFRAMELIST_COUNT) 1557 n = 0; 1558 usb_syncmem(&std->dma, 1559 std->offs + offsetof(uhci_td_t, td_status), 1560 sizeof(std->td.td_status), 1561 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1562 status = le32toh(std->td.td_status); 1563 len = UHCI_TD_GET_ACTLEN(status); 1564 xfer->frlengths[i] = len; 1565 actlen += len; 1566 } 1567 upipe->u.iso.inuse -= nframes; 1568 xfer->actlen = actlen; 1569 xfer->status = USBD_NORMAL_COMPLETION; 1570 goto end; 1571 } 1572 1573 #ifdef UHCI_DEBUG 1574 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1575 ii, xfer, upipe)); 1576 if (uhcidebug > 10) 1577 uhci_dump_tds(ii->stdstart); 1578 #endif 1579 1580 /* The transfer is done, compute actual length and status. */ 1581 actlen = 0; 1582 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1583 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1584 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1585 nstatus = le32toh(std->td.td_status); 1586 if (nstatus & UHCI_TD_ACTIVE) 1587 break; 1588 1589 status = nstatus; 1590 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1591 UHCI_TD_PID_SETUP) 1592 actlen += UHCI_TD_GET_ACTLEN(status); 1593 else { 1594 /* 1595 * UHCI will report CRCTO in addition to a STALL or NAK 1596 * for a SETUP transaction. See section 3.2.2, "TD 1597 * CONTROL AND STATUS". 1598 */ 1599 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1600 status &= ~UHCI_TD_CRCTO; 1601 } 1602 } 1603 /* If there are left over TDs we need to update the toggle. */ 1604 if (std != NULL) 1605 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1606 1607 status &= UHCI_TD_ERROR; 1608 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1609 actlen, status)); 1610 xfer->actlen = actlen; 1611 if (status != 0) { 1612 #ifdef UHCI_DEBUG 1613 char sbuf[128]; 1614 1615 bitmask_snprintf((u_int32_t)status, 1616 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1617 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1618 sbuf, sizeof(sbuf)); 1619 1620 DPRINTFN((status == UHCI_TD_STALLED)*10, 1621 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1622 "status 0x%s\n", 1623 xfer->pipe->device->address, 1624 xfer->pipe->endpoint->edesc->bEndpointAddress, 1625 sbuf)); 1626 #endif 1627 1628 if (status == UHCI_TD_STALLED) 1629 xfer->status = USBD_STALLED; 1630 else 1631 xfer->status = USBD_IOERROR; /* more info XXX */ 1632 } else { 1633 xfer->status = USBD_NORMAL_COMPLETION; 1634 } 1635 1636 end: 1637 usb_transfer_complete(xfer); 1638 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1639 } 1640 1641 /* 1642 * Called when a request does not complete. 1643 */ 1644 void 1645 uhci_timeout(void *addr) 1646 { 1647 uhci_intr_info_t *ii = addr; 1648 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1649 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1650 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1651 1652 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1653 1654 if (sc->sc_dying) { 1655 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1656 return; 1657 } 1658 1659 /* Execute the abort in a process context. */ 1660 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1661 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1662 USB_TASKQ_HC); 1663 } 1664 1665 void 1666 uhci_timeout_task(void *addr) 1667 { 1668 usbd_xfer_handle xfer = addr; 1669 int s; 1670 1671 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1672 1673 s = splusb(); 1674 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1675 splx(s); 1676 } 1677 1678 /* 1679 * Wait here until controller claims to have an interrupt. 1680 * Then call uhci_intr and return. Use timeout to avoid waiting 1681 * too long. 1682 * Only used during boot when interrupts are not enabled yet. 1683 */ 1684 void 1685 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1686 { 1687 int timo = xfer->timeout; 1688 uhci_intr_info_t *ii; 1689 1690 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1691 1692 xfer->status = USBD_IN_PROGRESS; 1693 for (; timo >= 0; timo--) { 1694 usb_delay_ms(&sc->sc_bus, 1); 1695 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1696 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1697 uhci_intr1(sc); 1698 if (xfer->status != USBD_IN_PROGRESS) 1699 return; 1700 } 1701 } 1702 1703 /* Timeout */ 1704 DPRINTF(("uhci_waitintr: timeout\n")); 1705 for (ii = LIST_FIRST(&sc->sc_intrhead); 1706 ii != NULL && ii->xfer != xfer; 1707 ii = LIST_NEXT(ii, list)) 1708 ; 1709 #ifdef DIAGNOSTIC 1710 if (ii == NULL) 1711 panic("uhci_waitintr: lost intr_info"); 1712 #endif 1713 uhci_idone(ii); 1714 } 1715 1716 void 1717 uhci_poll(struct usbd_bus *bus) 1718 { 1719 uhci_softc_t *sc = bus->hci_private; 1720 1721 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1722 uhci_intr1(sc); 1723 } 1724 1725 void 1726 uhci_reset(uhci_softc_t *sc) 1727 { 1728 int n; 1729 1730 UHCICMD(sc, UHCI_CMD_HCRESET); 1731 /* The reset bit goes low when the controller is done. */ 1732 for (n = 0; n < UHCI_RESET_TIMEOUT && 1733 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1734 usb_delay_ms(&sc->sc_bus, 1); 1735 if (n >= UHCI_RESET_TIMEOUT) 1736 printf("%s: controller did not reset\n", 1737 device_xname(sc->sc_dev)); 1738 } 1739 1740 usbd_status 1741 uhci_run(uhci_softc_t *sc, int run) 1742 { 1743 int s, n, running; 1744 u_int16_t cmd; 1745 1746 run = run != 0; 1747 s = splhardusb(); 1748 DPRINTF(("uhci_run: setting run=%d\n", run)); 1749 cmd = UREAD2(sc, UHCI_CMD); 1750 if (run) 1751 cmd |= UHCI_CMD_RS; 1752 else 1753 cmd &= ~UHCI_CMD_RS; 1754 UHCICMD(sc, cmd); 1755 for(n = 0; n < 10; n++) { 1756 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1757 /* return when we've entered the state we want */ 1758 if (run == running) { 1759 splx(s); 1760 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1761 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1762 return (USBD_NORMAL_COMPLETION); 1763 } 1764 usb_delay_ms(&sc->sc_bus, 1); 1765 } 1766 splx(s); 1767 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1768 run ? "start" : "stop"); 1769 return (USBD_IOERROR); 1770 } 1771 1772 /* 1773 * Memory management routines. 1774 * uhci_alloc_std allocates TDs 1775 * uhci_alloc_sqh allocates QHs 1776 * These two routines do their own free list management, 1777 * partly for speed, partly because allocating DMAable memory 1778 * has page size granularaity so much memory would be wasted if 1779 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1780 */ 1781 1782 uhci_soft_td_t * 1783 uhci_alloc_std(uhci_softc_t *sc) 1784 { 1785 uhci_soft_td_t *std; 1786 usbd_status err; 1787 int i, offs; 1788 usb_dma_t dma; 1789 1790 if (sc->sc_freetds == NULL) { 1791 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1792 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1793 UHCI_TD_ALIGN, &dma); 1794 if (err) 1795 return (0); 1796 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1797 offs = i * UHCI_STD_SIZE; 1798 std = KERNADDR(&dma, offs); 1799 std->physaddr = DMAADDR(&dma, offs); 1800 std->dma = dma; 1801 std->offs = offs; 1802 std->link.std = sc->sc_freetds; 1803 sc->sc_freetds = std; 1804 } 1805 } 1806 std = sc->sc_freetds; 1807 sc->sc_freetds = std->link.std; 1808 memset(&std->td, 0, sizeof(uhci_td_t)); 1809 return std; 1810 } 1811 1812 void 1813 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1814 { 1815 #ifdef DIAGNOSTIC 1816 #define TD_IS_FREE 0x12345678 1817 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1818 printf("uhci_free_std: freeing free TD %p\n", std); 1819 return; 1820 } 1821 std->td.td_token = htole32(TD_IS_FREE); 1822 #endif 1823 std->link.std = sc->sc_freetds; 1824 sc->sc_freetds = std; 1825 } 1826 1827 uhci_soft_qh_t * 1828 uhci_alloc_sqh(uhci_softc_t *sc) 1829 { 1830 uhci_soft_qh_t *sqh; 1831 usbd_status err; 1832 int i, offs; 1833 usb_dma_t dma; 1834 1835 if (sc->sc_freeqhs == NULL) { 1836 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1837 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1838 UHCI_QH_ALIGN, &dma); 1839 if (err) 1840 return (0); 1841 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1842 offs = i * UHCI_SQH_SIZE; 1843 sqh = KERNADDR(&dma, offs); 1844 sqh->physaddr = DMAADDR(&dma, offs); 1845 sqh->dma = dma; 1846 sqh->offs = offs; 1847 sqh->hlink = sc->sc_freeqhs; 1848 sc->sc_freeqhs = sqh; 1849 } 1850 } 1851 sqh = sc->sc_freeqhs; 1852 sc->sc_freeqhs = sqh->hlink; 1853 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1854 return (sqh); 1855 } 1856 1857 void 1858 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1859 { 1860 sqh->hlink = sc->sc_freeqhs; 1861 sc->sc_freeqhs = sqh; 1862 } 1863 1864 void 1865 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1866 uhci_soft_td_t *stdend) 1867 { 1868 uhci_soft_td_t *p; 1869 1870 /* 1871 * to avoid race condition with the controller which may be looking 1872 * at this chain, we need to first invalidate all links, and 1873 * then wait for the controller to move to another queue 1874 */ 1875 for (p = std; p != stdend; p = p->link.std) { 1876 usb_syncmem(&p->dma, 1877 p->offs + offsetof(uhci_td_t, td_link), 1878 sizeof(p->td.td_link), 1879 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1880 if ((p->td.td_link & UHCI_PTR_T) == 0) { 1881 p->td.td_link = UHCI_PTR_T; 1882 usb_syncmem(&p->dma, 1883 p->offs + offsetof(uhci_td_t, td_link), 1884 sizeof(p->td.td_link), 1885 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1886 } 1887 } 1888 delay(UHCI_QH_REMOVE_DELAY); 1889 1890 for (; std != stdend; std = p) { 1891 p = std->link.std; 1892 uhci_free_std(sc, std); 1893 } 1894 } 1895 1896 usbd_status 1897 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1898 int rd, u_int16_t flags, usb_dma_t *dma, 1899 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1900 { 1901 uhci_soft_td_t *p, *lastp; 1902 uhci_physaddr_t lastlink; 1903 int i, ntd, l, tog, maxp; 1904 u_int32_t status; 1905 int addr = upipe->pipe.device->address; 1906 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1907 1908 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1909 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1910 upipe->pipe.device->speed, flags)); 1911 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1912 if (maxp == 0) { 1913 printf("uhci_alloc_std_chain: maxp=0\n"); 1914 return (USBD_INVAL); 1915 } 1916 ntd = (len + maxp - 1) / maxp; 1917 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1918 ntd++; 1919 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1920 if (ntd == 0) { 1921 *sp = *ep = 0; 1922 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1923 return (USBD_NORMAL_COMPLETION); 1924 } 1925 tog = upipe->nexttoggle; 1926 if (ntd % 2 == 0) 1927 tog ^= 1; 1928 upipe->nexttoggle = tog ^ 1; 1929 lastp = NULL; 1930 lastlink = UHCI_PTR_T; 1931 ntd--; 1932 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1933 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1934 status |= UHCI_TD_LS; 1935 if (flags & USBD_SHORT_XFER_OK) 1936 status |= UHCI_TD_SPD; 1937 usb_syncmem(dma, 0, len, 1938 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1939 for (i = ntd; i >= 0; i--) { 1940 p = uhci_alloc_std(sc); 1941 if (p == NULL) { 1942 KASSERT(lastp != NULL); 1943 uhci_free_std_chain(sc, lastp, NULL); 1944 return (USBD_NOMEM); 1945 } 1946 p->link.std = lastp; 1947 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1948 lastp = p; 1949 lastlink = p->physaddr; 1950 p->td.td_status = htole32(status); 1951 if (i == ntd) { 1952 /* last TD */ 1953 l = len % maxp; 1954 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1955 l = maxp; 1956 *ep = p; 1957 } else 1958 l = maxp; 1959 p->td.td_token = 1960 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1961 UHCI_TD_OUT(l, endpt, addr, tog)); 1962 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1963 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 1964 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1965 tog ^= 1; 1966 } 1967 *sp = lastp; 1968 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1969 upipe->nexttoggle)); 1970 return (USBD_NORMAL_COMPLETION); 1971 } 1972 1973 void 1974 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1975 { 1976 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1977 upipe->nexttoggle = 0; 1978 } 1979 1980 void 1981 uhci_noop(usbd_pipe_handle pipe) 1982 { 1983 } 1984 1985 usbd_status 1986 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1987 { 1988 usbd_status err; 1989 1990 /* Insert last in queue. */ 1991 err = usb_insert_transfer(xfer); 1992 if (err) 1993 return (err); 1994 1995 /* 1996 * Pipe isn't running (otherwise err would be USBD_INPROG), 1997 * so start it first. 1998 */ 1999 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2000 } 2001 2002 usbd_status 2003 uhci_device_bulk_start(usbd_xfer_handle xfer) 2004 { 2005 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2006 usbd_device_handle dev = upipe->pipe.device; 2007 uhci_softc_t *sc = dev->bus->hci_private; 2008 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2009 uhci_soft_td_t *data, *dataend; 2010 uhci_soft_qh_t *sqh; 2011 usbd_status err; 2012 int len, isread, endpt; 2013 int s; 2014 2015 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2016 xfer, xfer->length, xfer->flags, ii)); 2017 2018 if (sc->sc_dying) 2019 return (USBD_IOERROR); 2020 2021 #ifdef DIAGNOSTIC 2022 if (xfer->rqflags & URQ_REQUEST) 2023 panic("uhci_device_bulk_transfer: a request"); 2024 #endif 2025 2026 len = xfer->length; 2027 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2028 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2029 sqh = upipe->u.bulk.sqh; 2030 2031 upipe->u.bulk.isread = isread; 2032 upipe->u.bulk.length = len; 2033 2034 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2035 &xfer->dmabuf, &data, &dataend); 2036 if (err) 2037 return (err); 2038 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2039 usb_syncmem(&dataend->dma, 2040 dataend->offs + offsetof(uhci_td_t, td_status), 2041 sizeof(dataend->td.td_status), 2042 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2043 2044 2045 #ifdef UHCI_DEBUG 2046 if (uhcidebug > 8) { 2047 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2048 uhci_dump_tds(data); 2049 } 2050 #endif 2051 2052 /* Set up interrupt info. */ 2053 ii->xfer = xfer; 2054 ii->stdstart = data; 2055 ii->stdend = dataend; 2056 #ifdef DIAGNOSTIC 2057 if (!ii->isdone) { 2058 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2059 } 2060 ii->isdone = 0; 2061 #endif 2062 2063 sqh->elink = data; 2064 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2065 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2066 2067 s = splusb(); 2068 uhci_add_bulk(sc, sqh); 2069 uhci_add_intr_info(sc, ii); 2070 2071 if (xfer->timeout && !sc->sc_bus.use_polling) { 2072 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2073 uhci_timeout, ii); 2074 } 2075 xfer->status = USBD_IN_PROGRESS; 2076 splx(s); 2077 2078 #ifdef UHCI_DEBUG 2079 if (uhcidebug > 10) { 2080 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2081 uhci_dump_tds(data); 2082 } 2083 #endif 2084 2085 if (sc->sc_bus.use_polling) 2086 uhci_waitintr(sc, xfer); 2087 2088 return (USBD_IN_PROGRESS); 2089 } 2090 2091 /* Abort a device bulk request. */ 2092 void 2093 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2094 { 2095 DPRINTF(("uhci_device_bulk_abort:\n")); 2096 uhci_abort_xfer(xfer, USBD_CANCELLED); 2097 } 2098 2099 /* 2100 * Abort a device request. 2101 * If this routine is called at splusb() it guarantees that the request 2102 * will be removed from the hardware scheduling and that the callback 2103 * for it will be called with USBD_CANCELLED status. 2104 * It's impossible to guarantee that the requested transfer will not 2105 * have happened since the hardware runs concurrently. 2106 * If the transaction has already happened we rely on the ordinary 2107 * interrupt processing to process it. 2108 */ 2109 void 2110 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2111 { 2112 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2113 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2114 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2115 uhci_soft_td_t *std; 2116 int s; 2117 int wake; 2118 2119 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2120 2121 if (sc->sc_dying) { 2122 /* If we're dying, just do the software part. */ 2123 s = splusb(); 2124 xfer->status = status; /* make software ignore it */ 2125 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer); 2126 usb_transfer_complete(xfer); 2127 splx(s); 2128 return; 2129 } 2130 2131 if (xfer->device->bus->intr_context || !curproc) 2132 panic("uhci_abort_xfer: not in process context"); 2133 2134 /* 2135 * If an abort is already in progress then just wait for it to 2136 * complete and return. 2137 */ 2138 if (xfer->hcflags & UXFER_ABORTING) { 2139 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2140 #ifdef DIAGNOSTIC 2141 if (status == USBD_TIMEOUT) 2142 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2143 #endif 2144 /* Override the status which might be USBD_TIMEOUT. */ 2145 xfer->status = status; 2146 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2147 xfer->hcflags |= UXFER_ABORTWAIT; 2148 while (xfer->hcflags & UXFER_ABORTING) 2149 tsleep(&xfer->hcflags, PZERO, "uhciaw", 0); 2150 return; 2151 } 2152 xfer->hcflags |= UXFER_ABORTING; 2153 2154 /* 2155 * Step 1: Make interrupt routine and hardware ignore xfer. 2156 */ 2157 s = splusb(); 2158 xfer->status = status; /* make software ignore it */ 2159 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii); 2160 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2161 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2162 usb_syncmem(&std->dma, 2163 std->offs + offsetof(uhci_td_t, td_status), 2164 sizeof(std->td.td_status), 2165 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2166 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2167 usb_syncmem(&std->dma, 2168 std->offs + offsetof(uhci_td_t, td_status), 2169 sizeof(std->td.td_status), 2170 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2171 } 2172 splx(s); 2173 2174 /* 2175 * Step 2: Wait until we know hardware has finished any possible 2176 * use of the xfer. Also make sure the soft interrupt routine 2177 * has run. 2178 */ 2179 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2180 s = splusb(); 2181 #ifdef USB_USE_SOFTINTR 2182 sc->sc_softwake = 1; 2183 #endif /* USB_USE_SOFTINTR */ 2184 usb_schedsoftintr(&sc->sc_bus); 2185 #ifdef USB_USE_SOFTINTR 2186 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2187 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 2188 #endif /* USB_USE_SOFTINTR */ 2189 splx(s); 2190 2191 /* 2192 * Step 3: Execute callback. 2193 */ 2194 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2195 s = splusb(); 2196 #ifdef DIAGNOSTIC 2197 ii->isdone = 1; 2198 #endif 2199 wake = xfer->hcflags & UXFER_ABORTWAIT; 2200 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2201 usb_transfer_complete(xfer); 2202 if (wake) 2203 wakeup(&xfer->hcflags); 2204 splx(s); 2205 } 2206 2207 /* Close a device bulk pipe. */ 2208 void 2209 uhci_device_bulk_close(usbd_pipe_handle pipe) 2210 { 2211 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2212 usbd_device_handle dev = upipe->pipe.device; 2213 uhci_softc_t *sc = dev->bus->hci_private; 2214 2215 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2216 } 2217 2218 usbd_status 2219 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2220 { 2221 usbd_status err; 2222 2223 /* Insert last in queue. */ 2224 err = usb_insert_transfer(xfer); 2225 if (err) 2226 return (err); 2227 2228 /* 2229 * Pipe isn't running (otherwise err would be USBD_INPROG), 2230 * so start it first. 2231 */ 2232 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2233 } 2234 2235 usbd_status 2236 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2237 { 2238 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2239 usbd_status err; 2240 2241 if (sc->sc_dying) 2242 return (USBD_IOERROR); 2243 2244 #ifdef DIAGNOSTIC 2245 if (!(xfer->rqflags & URQ_REQUEST)) 2246 panic("uhci_device_ctrl_transfer: not a request"); 2247 #endif 2248 2249 err = uhci_device_request(xfer); 2250 if (err) 2251 return (err); 2252 2253 if (sc->sc_bus.use_polling) 2254 uhci_waitintr(sc, xfer); 2255 return (USBD_IN_PROGRESS); 2256 } 2257 2258 usbd_status 2259 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2260 { 2261 usbd_status err; 2262 2263 /* Insert last in queue. */ 2264 err = usb_insert_transfer(xfer); 2265 if (err) 2266 return (err); 2267 2268 /* 2269 * Pipe isn't running (otherwise err would be USBD_INPROG), 2270 * so start it first. 2271 */ 2272 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2273 } 2274 2275 usbd_status 2276 uhci_device_intr_start(usbd_xfer_handle xfer) 2277 { 2278 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2279 usbd_device_handle dev = upipe->pipe.device; 2280 uhci_softc_t *sc = dev->bus->hci_private; 2281 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2282 uhci_soft_td_t *data, *dataend; 2283 uhci_soft_qh_t *sqh; 2284 usbd_status err; 2285 int isread, endpt; 2286 int i, s; 2287 2288 if (sc->sc_dying) 2289 return (USBD_IOERROR); 2290 2291 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2292 xfer, xfer->length, xfer->flags)); 2293 2294 #ifdef DIAGNOSTIC 2295 if (xfer->rqflags & URQ_REQUEST) 2296 panic("uhci_device_intr_transfer: a request"); 2297 #endif 2298 2299 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2300 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2301 2302 upipe->u.intr.isread = isread; 2303 2304 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2305 xfer->flags, &xfer->dmabuf, &data, 2306 &dataend); 2307 if (err) 2308 return (err); 2309 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2310 usb_syncmem(&dataend->dma, 2311 dataend->offs + offsetof(uhci_td_t, td_status), 2312 sizeof(dataend->td.td_status), 2313 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2314 2315 #ifdef UHCI_DEBUG 2316 if (uhcidebug > 10) { 2317 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2318 uhci_dump_tds(data); 2319 uhci_dump_qh(upipe->u.intr.qhs[0]); 2320 } 2321 #endif 2322 2323 s = splusb(); 2324 /* Set up interrupt info. */ 2325 ii->xfer = xfer; 2326 ii->stdstart = data; 2327 ii->stdend = dataend; 2328 #ifdef DIAGNOSTIC 2329 if (!ii->isdone) { 2330 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2331 } 2332 ii->isdone = 0; 2333 #endif 2334 2335 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2336 upipe->u.intr.qhs[0])); 2337 for (i = 0; i < upipe->u.intr.npoll; i++) { 2338 sqh = upipe->u.intr.qhs[i]; 2339 sqh->elink = data; 2340 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2341 usb_syncmem(&sqh->dma, 2342 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2343 sizeof(sqh->qh.qh_elink), 2344 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2345 } 2346 uhci_add_intr_info(sc, ii); 2347 xfer->status = USBD_IN_PROGRESS; 2348 splx(s); 2349 2350 #ifdef UHCI_DEBUG 2351 if (uhcidebug > 10) { 2352 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2353 uhci_dump_tds(data); 2354 uhci_dump_qh(upipe->u.intr.qhs[0]); 2355 } 2356 #endif 2357 2358 return (USBD_IN_PROGRESS); 2359 } 2360 2361 /* Abort a device control request. */ 2362 void 2363 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2364 { 2365 DPRINTF(("uhci_device_ctrl_abort:\n")); 2366 uhci_abort_xfer(xfer, USBD_CANCELLED); 2367 } 2368 2369 /* Close a device control pipe. */ 2370 void 2371 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2372 { 2373 } 2374 2375 /* Abort a device interrupt request. */ 2376 void 2377 uhci_device_intr_abort(usbd_xfer_handle xfer) 2378 { 2379 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2380 if (xfer->pipe->intrxfer == xfer) { 2381 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2382 xfer->pipe->intrxfer = NULL; 2383 } 2384 uhci_abort_xfer(xfer, USBD_CANCELLED); 2385 } 2386 2387 /* Close a device interrupt pipe. */ 2388 void 2389 uhci_device_intr_close(usbd_pipe_handle pipe) 2390 { 2391 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2392 uhci_softc_t *sc = pipe->device->bus->hci_private; 2393 int i, npoll; 2394 int s; 2395 2396 /* Unlink descriptors from controller data structures. */ 2397 npoll = upipe->u.intr.npoll; 2398 s = splusb(); 2399 for (i = 0; i < npoll; i++) 2400 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2401 splx(s); 2402 2403 /* 2404 * We now have to wait for any activity on the physical 2405 * descriptors to stop. 2406 */ 2407 usb_delay_ms(&sc->sc_bus, 2); 2408 2409 for(i = 0; i < npoll; i++) 2410 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2411 free(upipe->u.intr.qhs, M_USBHC); 2412 2413 /* XXX free other resources */ 2414 } 2415 2416 usbd_status 2417 uhci_device_request(usbd_xfer_handle xfer) 2418 { 2419 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2420 usb_device_request_t *req = &xfer->request; 2421 usbd_device_handle dev = upipe->pipe.device; 2422 uhci_softc_t *sc = dev->bus->hci_private; 2423 int addr = dev->address; 2424 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2425 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2426 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2427 uhci_soft_qh_t *sqh; 2428 int len; 2429 u_int32_t ls; 2430 usbd_status err; 2431 int isread; 2432 int s; 2433 2434 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2435 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2436 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2437 UGETW(req->wIndex), UGETW(req->wLength), 2438 addr, endpt)); 2439 2440 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2441 isread = req->bmRequestType & UT_READ; 2442 len = UGETW(req->wLength); 2443 2444 setup = upipe->u.ctl.setup; 2445 stat = upipe->u.ctl.stat; 2446 sqh = upipe->u.ctl.sqh; 2447 2448 /* Set up data transaction */ 2449 if (len != 0) { 2450 upipe->nexttoggle = 1; 2451 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2452 &xfer->dmabuf, &data, &dataend); 2453 if (err) 2454 return (err); 2455 next = data; 2456 dataend->link.std = stat; 2457 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2458 usb_syncmem(&dataend->dma, 2459 dataend->offs + offsetof(uhci_td_t, td_link), 2460 sizeof(dataend->td.td_link), 2461 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2462 } else { 2463 next = stat; 2464 } 2465 upipe->u.ctl.length = len; 2466 2467 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2468 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2469 2470 setup->link.std = next; 2471 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2472 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2473 UHCI_TD_ACTIVE); 2474 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2475 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2476 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2477 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2478 2479 stat->link.std = NULL; 2480 stat->td.td_link = htole32(UHCI_PTR_T); 2481 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2482 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2483 stat->td.td_token = 2484 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2485 UHCI_TD_IN (0, endpt, addr, 1)); 2486 stat->td.td_buffer = htole32(0); 2487 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2488 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2489 2490 #ifdef UHCI_DEBUG 2491 if (uhcidebug > 10) { 2492 DPRINTF(("uhci_device_request: before transfer\n")); 2493 uhci_dump_tds(setup); 2494 } 2495 #endif 2496 2497 /* Set up interrupt info. */ 2498 ii->xfer = xfer; 2499 ii->stdstart = setup; 2500 ii->stdend = stat; 2501 #ifdef DIAGNOSTIC 2502 if (!ii->isdone) { 2503 printf("uhci_device_request: not done, ii=%p\n", ii); 2504 } 2505 ii->isdone = 0; 2506 #endif 2507 2508 sqh->elink = setup; 2509 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2510 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2511 2512 s = splusb(); 2513 if (dev->speed == USB_SPEED_LOW) 2514 uhci_add_ls_ctrl(sc, sqh); 2515 else 2516 uhci_add_hs_ctrl(sc, sqh); 2517 uhci_add_intr_info(sc, ii); 2518 #ifdef UHCI_DEBUG 2519 if (uhcidebug > 12) { 2520 uhci_soft_td_t *std; 2521 uhci_soft_qh_t *xqh; 2522 uhci_soft_qh_t *sxqh; 2523 int maxqh = 0; 2524 uhci_physaddr_t link; 2525 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2526 for (std = sc->sc_vframes[0].htd, link = 0; 2527 (link & UHCI_PTR_QH) == 0; 2528 std = std->link.std) { 2529 link = le32toh(std->td.td_link); 2530 uhci_dump_td(std); 2531 } 2532 sxqh = (uhci_soft_qh_t *)std; 2533 uhci_dump_qh(sxqh); 2534 for (xqh = sxqh; 2535 xqh != NULL; 2536 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2537 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2538 uhci_dump_qh(xqh); 2539 } 2540 DPRINTF(("Enqueued QH:\n")); 2541 uhci_dump_qh(sqh); 2542 uhci_dump_tds(sqh->elink); 2543 } 2544 #endif 2545 if (xfer->timeout && !sc->sc_bus.use_polling) { 2546 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2547 uhci_timeout, ii); 2548 } 2549 xfer->status = USBD_IN_PROGRESS; 2550 splx(s); 2551 2552 return (USBD_NORMAL_COMPLETION); 2553 } 2554 2555 usbd_status 2556 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2557 { 2558 usbd_status err; 2559 2560 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2561 2562 /* Put it on our queue, */ 2563 err = usb_insert_transfer(xfer); 2564 2565 /* bail out on error, */ 2566 if (err && err != USBD_IN_PROGRESS) 2567 return (err); 2568 2569 /* XXX should check inuse here */ 2570 2571 /* insert into schedule, */ 2572 uhci_device_isoc_enter(xfer); 2573 2574 /* and start if the pipe wasn't running */ 2575 if (!err) 2576 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2577 2578 return (err); 2579 } 2580 2581 void 2582 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2583 { 2584 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2585 usbd_device_handle dev = upipe->pipe.device; 2586 uhci_softc_t *sc = dev->bus->hci_private; 2587 struct iso *iso = &upipe->u.iso; 2588 uhci_soft_td_t *std; 2589 u_int32_t buf, len, status, offs; 2590 int s, i, next, nframes; 2591 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2592 2593 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2594 "nframes=%d\n", 2595 iso->inuse, iso->next, xfer, xfer->nframes)); 2596 2597 if (sc->sc_dying) 2598 return; 2599 2600 if (xfer->status == USBD_IN_PROGRESS) { 2601 /* This request has already been entered into the frame list */ 2602 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2603 /* XXX */ 2604 } 2605 2606 #ifdef DIAGNOSTIC 2607 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2608 printf("uhci_device_isoc_enter: overflow!\n"); 2609 #endif 2610 2611 next = iso->next; 2612 if (next == -1) { 2613 /* Not in use yet, schedule it a few frames ahead. */ 2614 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2615 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2616 } 2617 2618 xfer->status = USBD_IN_PROGRESS; 2619 UXFER(xfer)->curframe = next; 2620 2621 buf = DMAADDR(&xfer->dmabuf, 0); 2622 offs = 0; 2623 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2624 UHCI_TD_ACTIVE | 2625 UHCI_TD_IOS); 2626 nframes = xfer->nframes; 2627 s = splusb(); 2628 for (i = 0; i < nframes; i++) { 2629 std = iso->stds[next]; 2630 if (++next >= UHCI_VFRAMELIST_COUNT) 2631 next = 0; 2632 len = xfer->frlengths[i]; 2633 std->td.td_buffer = htole32(buf); 2634 usb_syncmem(&xfer->dmabuf, offs, len, 2635 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2636 if (i == nframes - 1) 2637 status |= UHCI_TD_IOC; 2638 std->td.td_status = htole32(status); 2639 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2640 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2641 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2642 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2643 #ifdef UHCI_DEBUG 2644 if (uhcidebug > 5) { 2645 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2646 uhci_dump_td(std); 2647 } 2648 #endif 2649 buf += len; 2650 offs += len; 2651 } 2652 iso->next = next; 2653 iso->inuse += xfer->nframes; 2654 2655 splx(s); 2656 } 2657 2658 usbd_status 2659 uhci_device_isoc_start(usbd_xfer_handle xfer) 2660 { 2661 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2662 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2663 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2664 uhci_soft_td_t *end; 2665 int s, i; 2666 2667 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2668 2669 if (sc->sc_dying) 2670 return (USBD_IOERROR); 2671 2672 #ifdef DIAGNOSTIC 2673 if (xfer->status != USBD_IN_PROGRESS) 2674 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2675 #endif 2676 2677 /* Find the last TD */ 2678 i = UXFER(xfer)->curframe + xfer->nframes; 2679 if (i >= UHCI_VFRAMELIST_COUNT) 2680 i -= UHCI_VFRAMELIST_COUNT; 2681 end = upipe->u.iso.stds[i]; 2682 2683 #ifdef DIAGNOSTIC 2684 if (end == NULL) { 2685 printf("uhci_device_isoc_start: end == NULL\n"); 2686 return (USBD_INVAL); 2687 } 2688 #endif 2689 2690 s = splusb(); 2691 2692 /* Set up interrupt info. */ 2693 ii->xfer = xfer; 2694 ii->stdstart = end; 2695 ii->stdend = end; 2696 #ifdef DIAGNOSTIC 2697 if (!ii->isdone) 2698 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2699 ii->isdone = 0; 2700 #endif 2701 uhci_add_intr_info(sc, ii); 2702 2703 splx(s); 2704 2705 return (USBD_IN_PROGRESS); 2706 } 2707 2708 void 2709 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2710 { 2711 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2712 uhci_soft_td_t **stds = upipe->u.iso.stds; 2713 uhci_soft_td_t *std; 2714 int i, n, s, nframes, maxlen, len; 2715 2716 s = splusb(); 2717 2718 /* Transfer is already done. */ 2719 if (xfer->status != USBD_NOT_STARTED && 2720 xfer->status != USBD_IN_PROGRESS) { 2721 splx(s); 2722 return; 2723 } 2724 2725 /* Give xfer the requested abort code. */ 2726 xfer->status = USBD_CANCELLED; 2727 2728 /* make hardware ignore it, */ 2729 nframes = xfer->nframes; 2730 n = UXFER(xfer)->curframe; 2731 maxlen = 0; 2732 for (i = 0; i < nframes; i++) { 2733 std = stds[n]; 2734 usb_syncmem(&std->dma, 2735 std->offs + offsetof(uhci_td_t, td_status), 2736 sizeof(std->td.td_status), 2737 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2738 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2739 usb_syncmem(&std->dma, 2740 std->offs + offsetof(uhci_td_t, td_status), 2741 sizeof(std->td.td_status), 2742 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2743 usb_syncmem(&std->dma, 2744 std->offs + offsetof(uhci_td_t, td_token), 2745 sizeof(std->td.td_token), 2746 BUS_DMASYNC_POSTWRITE); 2747 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2748 if (len > maxlen) 2749 maxlen = len; 2750 if (++n >= UHCI_VFRAMELIST_COUNT) 2751 n = 0; 2752 } 2753 2754 /* and wait until we are sure the hardware has finished. */ 2755 delay(maxlen); 2756 2757 #ifdef DIAGNOSTIC 2758 UXFER(xfer)->iinfo.isdone = 1; 2759 #endif 2760 /* Run callback and remove from interrupt list. */ 2761 usb_transfer_complete(xfer); 2762 2763 splx(s); 2764 } 2765 2766 void 2767 uhci_device_isoc_close(usbd_pipe_handle pipe) 2768 { 2769 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2770 usbd_device_handle dev = upipe->pipe.device; 2771 uhci_softc_t *sc = dev->bus->hci_private; 2772 uhci_soft_td_t *std, *vstd; 2773 struct iso *iso; 2774 int i, s; 2775 2776 /* 2777 * Make sure all TDs are marked as inactive. 2778 * Wait for completion. 2779 * Unschedule. 2780 * Deallocate. 2781 */ 2782 iso = &upipe->u.iso; 2783 2784 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2785 std = iso->stds[i]; 2786 usb_syncmem(&std->dma, 2787 std->offs + offsetof(uhci_td_t, td_status), 2788 sizeof(std->td.td_status), 2789 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2790 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2791 usb_syncmem(&std->dma, 2792 std->offs + offsetof(uhci_td_t, td_status), 2793 sizeof(std->td.td_status), 2794 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2795 } 2796 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2797 2798 s = splusb(); 2799 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2800 std = iso->stds[i]; 2801 for (vstd = sc->sc_vframes[i].htd; 2802 vstd != NULL && vstd->link.std != std; 2803 vstd = vstd->link.std) 2804 ; 2805 if (vstd == NULL) { 2806 /*panic*/ 2807 printf("uhci_device_isoc_close: %p not found\n", std); 2808 splx(s); 2809 return; 2810 } 2811 vstd->link = std->link; 2812 usb_syncmem(&std->dma, 2813 std->offs + offsetof(uhci_td_t, td_link), 2814 sizeof(std->td.td_link), 2815 BUS_DMASYNC_POSTWRITE); 2816 vstd->td.td_link = std->td.td_link; 2817 usb_syncmem(&vstd->dma, 2818 vstd->offs + offsetof(uhci_td_t, td_link), 2819 sizeof(vstd->td.td_link), 2820 BUS_DMASYNC_PREWRITE); 2821 uhci_free_std(sc, std); 2822 } 2823 splx(s); 2824 2825 free(iso->stds, M_USBHC); 2826 } 2827 2828 usbd_status 2829 uhci_setup_isoc(usbd_pipe_handle pipe) 2830 { 2831 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2832 usbd_device_handle dev = upipe->pipe.device; 2833 uhci_softc_t *sc = dev->bus->hci_private; 2834 int addr = upipe->pipe.device->address; 2835 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2836 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2837 uhci_soft_td_t *std, *vstd; 2838 u_int32_t token; 2839 struct iso *iso; 2840 int i, s; 2841 2842 iso = &upipe->u.iso; 2843 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2844 M_USBHC, M_WAITOK); 2845 2846 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2847 UHCI_TD_OUT(0, endpt, addr, 0); 2848 2849 /* Allocate the TDs and mark as inactive; */ 2850 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2851 std = uhci_alloc_std(sc); 2852 if (std == 0) 2853 goto bad; 2854 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2855 std->td.td_token = htole32(token); 2856 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2857 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2858 iso->stds[i] = std; 2859 } 2860 2861 /* Insert TDs into schedule. */ 2862 s = splusb(); 2863 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2864 std = iso->stds[i]; 2865 vstd = sc->sc_vframes[i].htd; 2866 usb_syncmem(&vstd->dma, 2867 vstd->offs + offsetof(uhci_td_t, td_link), 2868 sizeof(vstd->td.td_link), 2869 BUS_DMASYNC_POSTWRITE); 2870 std->link = vstd->link; 2871 std->td.td_link = vstd->td.td_link; 2872 usb_syncmem(&std->dma, 2873 std->offs + offsetof(uhci_td_t, td_link), 2874 sizeof(std->td.td_link), 2875 BUS_DMASYNC_PREWRITE); 2876 vstd->link.std = std; 2877 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2878 usb_syncmem(&vstd->dma, 2879 vstd->offs + offsetof(uhci_td_t, td_link), 2880 sizeof(vstd->td.td_link), 2881 BUS_DMASYNC_PREWRITE); 2882 } 2883 splx(s); 2884 2885 iso->next = -1; 2886 iso->inuse = 0; 2887 2888 return (USBD_NORMAL_COMPLETION); 2889 2890 bad: 2891 while (--i >= 0) 2892 uhci_free_std(sc, iso->stds[i]); 2893 free(iso->stds, M_USBHC); 2894 return (USBD_NOMEM); 2895 } 2896 2897 void 2898 uhci_device_isoc_done(usbd_xfer_handle xfer) 2899 { 2900 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2901 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2902 int i, offs; 2903 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2904 2905 2906 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2907 xfer->actlen, xfer->busy_free)); 2908 2909 if (ii->xfer != xfer) 2910 /* Not on interrupt list, ignore it. */ 2911 return; 2912 2913 if (!uhci_active_intr_info(ii)) 2914 return; 2915 2916 #ifdef DIAGNOSTIC 2917 if (ii->stdend == NULL) { 2918 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2919 #ifdef UHCI_DEBUG 2920 uhci_dump_ii(ii); 2921 #endif 2922 return; 2923 } 2924 #endif 2925 2926 /* Turn off the interrupt since it is active even if the TD is not. */ 2927 usb_syncmem(&ii->stdend->dma, 2928 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2929 sizeof(ii->stdend->td.td_status), 2930 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2931 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2932 usb_syncmem(&ii->stdend->dma, 2933 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2934 sizeof(ii->stdend->td.td_status), 2935 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2936 2937 uhci_del_intr_info(ii); /* remove from active list */ 2938 2939 offs = 0; 2940 for (i = 0; i < xfer->nframes; i++) { 2941 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i], 2942 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2943 offs += xfer->frlengths[i]; 2944 } 2945 } 2946 2947 void 2948 uhci_device_intr_done(usbd_xfer_handle xfer) 2949 { 2950 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2951 uhci_softc_t *sc = ii->sc; 2952 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2953 uhci_soft_qh_t *sqh; 2954 int i, npoll, isread; 2955 2956 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2957 2958 npoll = upipe->u.intr.npoll; 2959 for(i = 0; i < npoll; i++) { 2960 sqh = upipe->u.intr.qhs[i]; 2961 sqh->elink = NULL; 2962 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2963 usb_syncmem(&sqh->dma, 2964 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2965 sizeof(sqh->qh.qh_elink), 2966 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2967 } 2968 uhci_free_std_chain(sc, ii->stdstart, NULL); 2969 2970 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2971 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 2972 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2973 2974 /* XXX Wasteful. */ 2975 if (xfer->pipe->repeat) { 2976 uhci_soft_td_t *data, *dataend; 2977 2978 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 2979 2980 /* This alloc cannot fail since we freed the chain above. */ 2981 uhci_alloc_std_chain(upipe, sc, xfer->length, 2982 upipe->u.intr.isread, xfer->flags, 2983 &xfer->dmabuf, &data, &dataend); 2984 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2985 usb_syncmem(&dataend->dma, 2986 dataend->offs + offsetof(uhci_td_t, td_status), 2987 sizeof(dataend->td.td_status), 2988 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2989 2990 #ifdef UHCI_DEBUG 2991 if (uhcidebug > 10) { 2992 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2993 uhci_dump_tds(data); 2994 uhci_dump_qh(upipe->u.intr.qhs[0]); 2995 } 2996 #endif 2997 2998 ii->stdstart = data; 2999 ii->stdend = dataend; 3000 #ifdef DIAGNOSTIC 3001 if (!ii->isdone) { 3002 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3003 } 3004 ii->isdone = 0; 3005 #endif 3006 for (i = 0; i < npoll; i++) { 3007 sqh = upipe->u.intr.qhs[i]; 3008 sqh->elink = data; 3009 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3010 usb_syncmem(&sqh->dma, 3011 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3012 sizeof(sqh->qh.qh_elink), 3013 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3014 } 3015 xfer->status = USBD_IN_PROGRESS; 3016 /* The ii is already on the examined list, just leave it. */ 3017 } else { 3018 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3019 if (uhci_active_intr_info(ii)) 3020 uhci_del_intr_info(ii); 3021 } 3022 } 3023 3024 /* Deallocate request data structures */ 3025 void 3026 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3027 { 3028 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3029 uhci_softc_t *sc = ii->sc; 3030 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3031 int len = UGETW(xfer->request.wLength); 3032 int isread = (xfer->request.bmRequestType & UT_READ); 3033 3034 #ifdef DIAGNOSTIC 3035 if (!(xfer->rqflags & URQ_REQUEST)) 3036 panic("uhci_device_ctrl_done: not a request"); 3037 #endif 3038 3039 if (!uhci_active_intr_info(ii)) 3040 return; 3041 3042 uhci_del_intr_info(ii); /* remove from active list */ 3043 3044 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3045 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3046 else 3047 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3048 3049 if (upipe->u.ctl.length != 0) 3050 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3051 3052 if (len) { 3053 usb_syncmem(&xfer->dmabuf, 0, len, 3054 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3055 } 3056 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3057 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3058 3059 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3060 } 3061 3062 /* Deallocate request data structures */ 3063 void 3064 uhci_device_bulk_done(usbd_xfer_handle xfer) 3065 { 3066 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3067 uhci_softc_t *sc = ii->sc; 3068 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3069 3070 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3071 xfer, ii, sc, upipe)); 3072 3073 if (!uhci_active_intr_info(ii)) 3074 return; 3075 3076 uhci_del_intr_info(ii); /* remove from active list */ 3077 3078 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3079 3080 uhci_free_std_chain(sc, ii->stdstart, NULL); 3081 3082 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3083 } 3084 3085 /* Add interrupt QH, called with vflock. */ 3086 void 3087 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3088 { 3089 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3090 uhci_soft_qh_t *eqh; 3091 3092 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3093 3094 eqh = vf->eqh; 3095 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3096 sizeof(eqh->qh.qh_hlink), 3097 BUS_DMASYNC_POSTWRITE); 3098 sqh->hlink = eqh->hlink; 3099 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3100 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3101 sizeof(sqh->qh.qh_hlink), 3102 BUS_DMASYNC_PREWRITE); 3103 eqh->hlink = sqh; 3104 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3105 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3106 sizeof(eqh->qh.qh_hlink), 3107 BUS_DMASYNC_PREWRITE); 3108 vf->eqh = sqh; 3109 vf->bandwidth++; 3110 } 3111 3112 /* Remove interrupt QH. */ 3113 void 3114 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3115 { 3116 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3117 uhci_soft_qh_t *pqh; 3118 3119 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3120 3121 /* See comment in uhci_remove_ctrl() */ 3122 3123 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3124 sizeof(sqh->qh.qh_elink), 3125 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3126 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3127 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3128 usb_syncmem(&sqh->dma, 3129 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3130 sizeof(sqh->qh.qh_elink), 3131 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3132 delay(UHCI_QH_REMOVE_DELAY); 3133 } 3134 3135 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3136 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3137 sizeof(sqh->qh.qh_hlink), 3138 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3139 pqh->hlink = sqh->hlink; 3140 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3141 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3142 sizeof(pqh->qh.qh_hlink), 3143 BUS_DMASYNC_PREWRITE); 3144 delay(UHCI_QH_REMOVE_DELAY); 3145 if (vf->eqh == sqh) 3146 vf->eqh = pqh; 3147 vf->bandwidth--; 3148 } 3149 3150 usbd_status 3151 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3152 { 3153 uhci_soft_qh_t *sqh; 3154 int i, npoll, s; 3155 u_int bestbw, bw, bestoffs, offs; 3156 3157 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3158 if (ival == 0) { 3159 printf("uhci_device_setintr: 0 interval\n"); 3160 return (USBD_INVAL); 3161 } 3162 3163 if (ival > UHCI_VFRAMELIST_COUNT) 3164 ival = UHCI_VFRAMELIST_COUNT; 3165 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3166 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3167 3168 upipe->u.intr.npoll = npoll; 3169 upipe->u.intr.qhs = 3170 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 3171 3172 /* 3173 * Figure out which offset in the schedule that has most 3174 * bandwidth left over. 3175 */ 3176 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3177 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3178 for (bw = i = 0; i < npoll; i++) 3179 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3180 if (bw < bestbw) { 3181 bestbw = bw; 3182 bestoffs = offs; 3183 } 3184 } 3185 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3186 3187 for(i = 0; i < npoll; i++) { 3188 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3189 sqh->elink = NULL; 3190 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3191 usb_syncmem(&sqh->dma, 3192 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3193 sizeof(sqh->qh.qh_elink), 3194 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3195 sqh->pos = MOD(i * ival + bestoffs); 3196 } 3197 #undef MOD 3198 3199 s = splusb(); 3200 /* Enter QHs into the controller data structures. */ 3201 for(i = 0; i < npoll; i++) 3202 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3203 splx(s); 3204 3205 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3206 return (USBD_NORMAL_COMPLETION); 3207 } 3208 3209 /* Open a new pipe. */ 3210 usbd_status 3211 uhci_open(usbd_pipe_handle pipe) 3212 { 3213 uhci_softc_t *sc = pipe->device->bus->hci_private; 3214 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3215 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3216 usbd_status err; 3217 int ival; 3218 3219 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3220 pipe, pipe->device->address, 3221 ed->bEndpointAddress, sc->sc_addr)); 3222 3223 upipe->aborting = 0; 3224 upipe->nexttoggle = 0; 3225 3226 if (pipe->device->address == sc->sc_addr) { 3227 switch (ed->bEndpointAddress) { 3228 case USB_CONTROL_ENDPOINT: 3229 pipe->methods = &uhci_root_ctrl_methods; 3230 break; 3231 case UE_DIR_IN | UHCI_INTR_ENDPT: 3232 pipe->methods = &uhci_root_intr_methods; 3233 break; 3234 default: 3235 return (USBD_INVAL); 3236 } 3237 } else { 3238 switch (ed->bmAttributes & UE_XFERTYPE) { 3239 case UE_CONTROL: 3240 pipe->methods = &uhci_device_ctrl_methods; 3241 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3242 if (upipe->u.ctl.sqh == NULL) 3243 goto bad; 3244 upipe->u.ctl.setup = uhci_alloc_std(sc); 3245 if (upipe->u.ctl.setup == NULL) { 3246 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3247 goto bad; 3248 } 3249 upipe->u.ctl.stat = uhci_alloc_std(sc); 3250 if (upipe->u.ctl.stat == NULL) { 3251 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3252 uhci_free_std(sc, upipe->u.ctl.setup); 3253 goto bad; 3254 } 3255 err = usb_allocmem(&sc->sc_bus, 3256 sizeof(usb_device_request_t), 3257 0, &upipe->u.ctl.reqdma); 3258 if (err) { 3259 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3260 uhci_free_std(sc, upipe->u.ctl.setup); 3261 uhci_free_std(sc, upipe->u.ctl.stat); 3262 goto bad; 3263 } 3264 break; 3265 case UE_INTERRUPT: 3266 pipe->methods = &uhci_device_intr_methods; 3267 ival = pipe->interval; 3268 if (ival == USBD_DEFAULT_INTERVAL) 3269 ival = ed->bInterval; 3270 return (uhci_device_setintr(sc, upipe, ival)); 3271 case UE_ISOCHRONOUS: 3272 pipe->methods = &uhci_device_isoc_methods; 3273 return (uhci_setup_isoc(pipe)); 3274 case UE_BULK: 3275 pipe->methods = &uhci_device_bulk_methods; 3276 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3277 if (upipe->u.bulk.sqh == NULL) 3278 goto bad; 3279 break; 3280 } 3281 } 3282 return (USBD_NORMAL_COMPLETION); 3283 3284 bad: 3285 return (USBD_NOMEM); 3286 } 3287 3288 /* 3289 * Data structures and routines to emulate the root hub. 3290 */ 3291 usb_device_descriptor_t uhci_devd = { 3292 USB_DEVICE_DESCRIPTOR_SIZE, 3293 UDESC_DEVICE, /* type */ 3294 {0x00, 0x01}, /* USB version */ 3295 UDCLASS_HUB, /* class */ 3296 UDSUBCLASS_HUB, /* subclass */ 3297 UDPROTO_FSHUB, /* protocol */ 3298 64, /* max packet */ 3299 {0},{0},{0x00,0x01}, /* device id */ 3300 1,2,0, /* string indicies */ 3301 1 /* # of configurations */ 3302 }; 3303 3304 const usb_config_descriptor_t uhci_confd = { 3305 USB_CONFIG_DESCRIPTOR_SIZE, 3306 UDESC_CONFIG, 3307 {USB_CONFIG_DESCRIPTOR_SIZE + 3308 USB_INTERFACE_DESCRIPTOR_SIZE + 3309 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3310 1, 3311 1, 3312 0, 3313 UC_ATTR_MBO | UC_SELF_POWERED, 3314 0 /* max power */ 3315 }; 3316 3317 const usb_interface_descriptor_t uhci_ifcd = { 3318 USB_INTERFACE_DESCRIPTOR_SIZE, 3319 UDESC_INTERFACE, 3320 0, 3321 0, 3322 1, 3323 UICLASS_HUB, 3324 UISUBCLASS_HUB, 3325 UIPROTO_FSHUB, 3326 0 3327 }; 3328 3329 const usb_endpoint_descriptor_t uhci_endpd = { 3330 USB_ENDPOINT_DESCRIPTOR_SIZE, 3331 UDESC_ENDPOINT, 3332 UE_DIR_IN | UHCI_INTR_ENDPT, 3333 UE_INTERRUPT, 3334 {8}, 3335 255 3336 }; 3337 3338 const usb_hub_descriptor_t uhci_hubd_piix = { 3339 USB_HUB_DESCRIPTOR_SIZE, 3340 UDESC_HUB, 3341 2, 3342 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3343 50, /* power on to power good */ 3344 0, 3345 { 0x00 }, /* both ports are removable */ 3346 { 0 }, 3347 }; 3348 3349 /* 3350 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3351 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3352 * should not be used by the USB subsystem. As we cannot issue a 3353 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3354 * will be enabled as part of the reset. 3355 * 3356 * On the VT83C572, the port cannot be successfully enabled until the 3357 * outstanding "port enable change" and "connection status change" 3358 * events have been reset. 3359 */ 3360 Static usbd_status 3361 uhci_portreset(uhci_softc_t *sc, int index) 3362 { 3363 int lim, port, x; 3364 3365 if (index == 1) 3366 port = UHCI_PORTSC1; 3367 else if (index == 2) 3368 port = UHCI_PORTSC2; 3369 else 3370 return (USBD_IOERROR); 3371 3372 x = URWMASK(UREAD2(sc, port)); 3373 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3374 3375 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3376 3377 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3378 index, UREAD2(sc, port))); 3379 3380 x = URWMASK(UREAD2(sc, port)); 3381 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3382 3383 delay(100); 3384 3385 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3386 index, UREAD2(sc, port))); 3387 3388 x = URWMASK(UREAD2(sc, port)); 3389 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3390 3391 for (lim = 10; --lim > 0;) { 3392 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3393 3394 x = UREAD2(sc, port); 3395 3396 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3397 index, lim, x)); 3398 3399 if (!(x & UHCI_PORTSC_CCS)) { 3400 /* 3401 * No device is connected (or was disconnected 3402 * during reset). Consider the port reset. 3403 * The delay must be long enough to ensure on 3404 * the initial iteration that the device 3405 * connection will have been registered. 50ms 3406 * appears to be sufficient, but 20ms is not. 3407 */ 3408 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3409 index, lim)); 3410 break; 3411 } 3412 3413 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3414 /* 3415 * Port enabled changed and/or connection 3416 * status changed were set. Reset either or 3417 * both raised flags (by writing a 1 to that 3418 * bit), and wait again for state to settle. 3419 */ 3420 UWRITE2(sc, port, URWMASK(x) | 3421 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3422 continue; 3423 } 3424 3425 if (x & UHCI_PORTSC_PE) 3426 /* Port is enabled */ 3427 break; 3428 3429 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3430 } 3431 3432 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3433 index, UREAD2(sc, port))); 3434 3435 if (lim <= 0) { 3436 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3437 return (USBD_TIMEOUT); 3438 } 3439 3440 sc->sc_isreset = 1; 3441 return (USBD_NORMAL_COMPLETION); 3442 } 3443 3444 /* 3445 * Simulate a hardware hub by handling all the necessary requests. 3446 */ 3447 usbd_status 3448 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3449 { 3450 usbd_status err; 3451 3452 /* Insert last in queue. */ 3453 err = usb_insert_transfer(xfer); 3454 if (err) 3455 return (err); 3456 3457 /* 3458 * Pipe isn't running (otherwise err would be USBD_INPROG), 3459 * so start it first. 3460 */ 3461 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3462 } 3463 3464 usbd_status 3465 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3466 { 3467 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3468 usb_device_request_t *req; 3469 void *buf = NULL; 3470 int port, x; 3471 int s, len, value, index, status, change, l, totlen = 0; 3472 usb_port_status_t ps; 3473 usbd_status err; 3474 3475 if (sc->sc_dying) 3476 return (USBD_IOERROR); 3477 3478 #ifdef DIAGNOSTIC 3479 if (!(xfer->rqflags & URQ_REQUEST)) 3480 panic("uhci_root_ctrl_transfer: not a request"); 3481 #endif 3482 req = &xfer->request; 3483 3484 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3485 req->bmRequestType, req->bRequest)); 3486 3487 len = UGETW(req->wLength); 3488 value = UGETW(req->wValue); 3489 index = UGETW(req->wIndex); 3490 3491 if (len != 0) 3492 buf = KERNADDR(&xfer->dmabuf, 0); 3493 3494 #define C(x,y) ((x) | ((y) << 8)) 3495 switch(C(req->bRequest, req->bmRequestType)) { 3496 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3497 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3498 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3499 /* 3500 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3501 * for the integrated root hub. 3502 */ 3503 break; 3504 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3505 if (len > 0) { 3506 *(u_int8_t *)buf = sc->sc_conf; 3507 totlen = 1; 3508 } 3509 break; 3510 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3511 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3512 if (len == 0) 3513 break; 3514 switch(value >> 8) { 3515 case UDESC_DEVICE: 3516 if ((value & 0xff) != 0) { 3517 err = USBD_IOERROR; 3518 goto ret; 3519 } 3520 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3521 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3522 memcpy(buf, &uhci_devd, l); 3523 break; 3524 case UDESC_CONFIG: 3525 if ((value & 0xff) != 0) { 3526 err = USBD_IOERROR; 3527 goto ret; 3528 } 3529 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3530 memcpy(buf, &uhci_confd, l); 3531 buf = (char *)buf + l; 3532 len -= l; 3533 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3534 totlen += l; 3535 memcpy(buf, &uhci_ifcd, l); 3536 buf = (char *)buf + l; 3537 len -= l; 3538 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3539 totlen += l; 3540 memcpy(buf, &uhci_endpd, l); 3541 break; 3542 case UDESC_STRING: 3543 #define sd ((usb_string_descriptor_t *)buf) 3544 switch (value & 0xff) { 3545 case 0: /* Language table */ 3546 totlen = usb_makelangtbl(sd, len); 3547 break; 3548 case 1: /* Vendor */ 3549 totlen = usb_makestrdesc(sd, len, 3550 sc->sc_vendor); 3551 break; 3552 case 2: /* Product */ 3553 totlen = usb_makestrdesc(sd, len, 3554 "UHCI root hub"); 3555 break; 3556 } 3557 #undef sd 3558 break; 3559 default: 3560 err = USBD_IOERROR; 3561 goto ret; 3562 } 3563 break; 3564 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3565 if (len > 0) { 3566 *(u_int8_t *)buf = 0; 3567 totlen = 1; 3568 } 3569 break; 3570 case C(UR_GET_STATUS, UT_READ_DEVICE): 3571 if (len > 1) { 3572 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3573 totlen = 2; 3574 } 3575 break; 3576 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3577 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3578 if (len > 1) { 3579 USETW(((usb_status_t *)buf)->wStatus, 0); 3580 totlen = 2; 3581 } 3582 break; 3583 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3584 if (value >= USB_MAX_DEVICES) { 3585 err = USBD_IOERROR; 3586 goto ret; 3587 } 3588 sc->sc_addr = value; 3589 break; 3590 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3591 if (value != 0 && value != 1) { 3592 err = USBD_IOERROR; 3593 goto ret; 3594 } 3595 sc->sc_conf = value; 3596 break; 3597 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3598 break; 3599 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3600 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3601 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3602 err = USBD_IOERROR; 3603 goto ret; 3604 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3605 break; 3606 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3607 break; 3608 /* Hub requests */ 3609 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3610 break; 3611 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3612 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3613 "port=%d feature=%d\n", 3614 index, value)); 3615 if (index == 1) 3616 port = UHCI_PORTSC1; 3617 else if (index == 2) 3618 port = UHCI_PORTSC2; 3619 else { 3620 err = USBD_IOERROR; 3621 goto ret; 3622 } 3623 switch(value) { 3624 case UHF_PORT_ENABLE: 3625 x = URWMASK(UREAD2(sc, port)); 3626 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3627 break; 3628 case UHF_PORT_SUSPEND: 3629 x = URWMASK(UREAD2(sc, port)); 3630 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3631 break; 3632 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3633 /* see USB2 spec ch. 7.1.7.7 */ 3634 usb_delay_ms(&sc->sc_bus, 20); 3635 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3636 /* 10ms resume delay must be provided by caller */ 3637 break; 3638 case UHF_PORT_RESET: 3639 x = URWMASK(UREAD2(sc, port)); 3640 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3641 break; 3642 case UHF_C_PORT_CONNECTION: 3643 x = URWMASK(UREAD2(sc, port)); 3644 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3645 break; 3646 case UHF_C_PORT_ENABLE: 3647 x = URWMASK(UREAD2(sc, port)); 3648 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3649 break; 3650 case UHF_C_PORT_OVER_CURRENT: 3651 x = URWMASK(UREAD2(sc, port)); 3652 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3653 break; 3654 case UHF_C_PORT_RESET: 3655 sc->sc_isreset = 0; 3656 err = USBD_NORMAL_COMPLETION; 3657 goto ret; 3658 case UHF_PORT_CONNECTION: 3659 case UHF_PORT_OVER_CURRENT: 3660 case UHF_PORT_POWER: 3661 case UHF_PORT_LOW_SPEED: 3662 case UHF_C_PORT_SUSPEND: 3663 default: 3664 err = USBD_IOERROR; 3665 goto ret; 3666 } 3667 break; 3668 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3669 if (index == 1) 3670 port = UHCI_PORTSC1; 3671 else if (index == 2) 3672 port = UHCI_PORTSC2; 3673 else { 3674 err = USBD_IOERROR; 3675 goto ret; 3676 } 3677 if (len > 0) { 3678 *(u_int8_t *)buf = 3679 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3680 UHCI_PORTSC_LS_SHIFT; 3681 totlen = 1; 3682 } 3683 break; 3684 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3685 if (len == 0) 3686 break; 3687 if ((value & 0xff) != 0) { 3688 err = USBD_IOERROR; 3689 goto ret; 3690 } 3691 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3692 totlen = l; 3693 memcpy(buf, &uhci_hubd_piix, l); 3694 break; 3695 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3696 if (len != 4) { 3697 err = USBD_IOERROR; 3698 goto ret; 3699 } 3700 memset(buf, 0, len); 3701 totlen = len; 3702 break; 3703 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3704 if (index == 1) 3705 port = UHCI_PORTSC1; 3706 else if (index == 2) 3707 port = UHCI_PORTSC2; 3708 else { 3709 err = USBD_IOERROR; 3710 goto ret; 3711 } 3712 if (len != 4) { 3713 err = USBD_IOERROR; 3714 goto ret; 3715 } 3716 x = UREAD2(sc, port); 3717 status = change = 0; 3718 if (x & UHCI_PORTSC_CCS) 3719 status |= UPS_CURRENT_CONNECT_STATUS; 3720 if (x & UHCI_PORTSC_CSC) 3721 change |= UPS_C_CONNECT_STATUS; 3722 if (x & UHCI_PORTSC_PE) 3723 status |= UPS_PORT_ENABLED; 3724 if (x & UHCI_PORTSC_POEDC) 3725 change |= UPS_C_PORT_ENABLED; 3726 if (x & UHCI_PORTSC_OCI) 3727 status |= UPS_OVERCURRENT_INDICATOR; 3728 if (x & UHCI_PORTSC_OCIC) 3729 change |= UPS_C_OVERCURRENT_INDICATOR; 3730 if (x & UHCI_PORTSC_SUSP) 3731 status |= UPS_SUSPEND; 3732 if (x & UHCI_PORTSC_LSDA) 3733 status |= UPS_LOW_SPEED; 3734 status |= UPS_PORT_POWER; 3735 if (sc->sc_isreset) 3736 change |= UPS_C_PORT_RESET; 3737 USETW(ps.wPortStatus, status); 3738 USETW(ps.wPortChange, change); 3739 l = min(len, sizeof ps); 3740 memcpy(buf, &ps, l); 3741 totlen = l; 3742 break; 3743 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3744 err = USBD_IOERROR; 3745 goto ret; 3746 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3747 break; 3748 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3749 if (index == 1) 3750 port = UHCI_PORTSC1; 3751 else if (index == 2) 3752 port = UHCI_PORTSC2; 3753 else { 3754 err = USBD_IOERROR; 3755 goto ret; 3756 } 3757 switch(value) { 3758 case UHF_PORT_ENABLE: 3759 x = URWMASK(UREAD2(sc, port)); 3760 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3761 break; 3762 case UHF_PORT_SUSPEND: 3763 x = URWMASK(UREAD2(sc, port)); 3764 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3765 break; 3766 case UHF_PORT_RESET: 3767 err = uhci_portreset(sc, index); 3768 goto ret; 3769 case UHF_PORT_POWER: 3770 /* Pretend we turned on power */ 3771 err = USBD_NORMAL_COMPLETION; 3772 goto ret; 3773 case UHF_C_PORT_CONNECTION: 3774 case UHF_C_PORT_ENABLE: 3775 case UHF_C_PORT_OVER_CURRENT: 3776 case UHF_PORT_CONNECTION: 3777 case UHF_PORT_OVER_CURRENT: 3778 case UHF_PORT_LOW_SPEED: 3779 case UHF_C_PORT_SUSPEND: 3780 case UHF_C_PORT_RESET: 3781 default: 3782 err = USBD_IOERROR; 3783 goto ret; 3784 } 3785 break; 3786 default: 3787 err = USBD_IOERROR; 3788 goto ret; 3789 } 3790 xfer->actlen = totlen; 3791 err = USBD_NORMAL_COMPLETION; 3792 ret: 3793 xfer->status = err; 3794 s = splusb(); 3795 usb_transfer_complete(xfer); 3796 splx(s); 3797 return (USBD_IN_PROGRESS); 3798 } 3799 3800 /* Abort a root control request. */ 3801 void 3802 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3803 { 3804 /* Nothing to do, all transfers are synchronous. */ 3805 } 3806 3807 /* Close the root pipe. */ 3808 void 3809 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3810 { 3811 DPRINTF(("uhci_root_ctrl_close\n")); 3812 } 3813 3814 /* Abort a root interrupt request. */ 3815 void 3816 uhci_root_intr_abort(usbd_xfer_handle xfer) 3817 { 3818 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3819 3820 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer); 3821 sc->sc_intr_xfer = NULL; 3822 3823 if (xfer->pipe->intrxfer == xfer) { 3824 DPRINTF(("uhci_root_intr_abort: remove\n")); 3825 xfer->pipe->intrxfer = 0; 3826 } 3827 xfer->status = USBD_CANCELLED; 3828 #ifdef DIAGNOSTIC 3829 UXFER(xfer)->iinfo.isdone = 1; 3830 #endif 3831 usb_transfer_complete(xfer); 3832 } 3833 3834 usbd_status 3835 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3836 { 3837 usbd_status err; 3838 3839 /* Insert last in queue. */ 3840 err = usb_insert_transfer(xfer); 3841 if (err) 3842 return (err); 3843 3844 /* 3845 * Pipe isn't running (otherwise err would be USBD_INPROG), 3846 * start first 3847 */ 3848 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3849 } 3850 3851 /* Start a transfer on the root interrupt pipe */ 3852 usbd_status 3853 uhci_root_intr_start(usbd_xfer_handle xfer) 3854 { 3855 usbd_pipe_handle pipe = xfer->pipe; 3856 uhci_softc_t *sc = pipe->device->bus->hci_private; 3857 unsigned int ival; 3858 3859 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3860 xfer, xfer->length, xfer->flags)); 3861 3862 if (sc->sc_dying) 3863 return (USBD_IOERROR); 3864 3865 /* XXX temporary variable needed to avoid gcc3 warning */ 3866 ival = xfer->pipe->endpoint->edesc->bInterval; 3867 sc->sc_ival = mstohz(ival); 3868 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3869 sc->sc_intr_xfer = xfer; 3870 return (USBD_IN_PROGRESS); 3871 } 3872 3873 /* Close the root interrupt pipe. */ 3874 void 3875 uhci_root_intr_close(usbd_pipe_handle pipe) 3876 { 3877 uhci_softc_t *sc = pipe->device->bus->hci_private; 3878 3879 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer); 3880 sc->sc_intr_xfer = NULL; 3881 DPRINTF(("uhci_root_intr_close\n")); 3882 } 3883
Indexes created Tue Sep 30 20:09:53 GMT 2025