uhci.c revision 1.223.12.1
1 /* $NetBSD: uhci.c,v 1.223.12.1 2010/04/21 00:27:53 matt Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm 39 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.223.12.1 2010/04/21 00:27:53 matt Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #include <sys/select.h> 54 #include <sys/extent.h> 55 #include <uvm/uvm_extern.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #include <machine/bus_pio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) 61 #include <sys/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 #include <sys/bus.h> 67 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/uhcireg.h> 77 #include <dev/usb/uhcivar.h> 78 #include <dev/usb/usbroothub_subr.h> 79 80 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 81 /*#define UHCI_CTL_LOOP */ 82 83 #if defined(__FreeBSD__) 84 #include <machine/clock.h> 85 86 #define delay(d) DELAY(d) 87 #endif 88 89 #if defined(__OpenBSD__) 90 struct cfdriver uhci_cd = { 91 NULL, "uhci", DV_DULL 92 }; 93 #endif 94 95 #ifdef UHCI_DEBUG 96 uhci_softc_t *thesc; 97 #define DPRINTF(x) if (uhcidebug) printf x 98 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 99 int uhcidebug = 0; 100 int uhcinoloop = 0; 101 #ifndef __NetBSD__ 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The UHCI controller is little endian, so on big endian machines 111 * the data stored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct uhci_pipe { 124 struct usbd_pipe pipe; 125 int nexttoggle; 126 127 u_char aborting; 128 usbd_xfer_handle abortstart, abortend; 129 130 /* Info needed for different pipe kinds. */ 131 union { 132 /* Control pipe */ 133 struct { 134 uhci_soft_qh_t *sqh; 135 usb_dma_t reqdma; 136 uhci_soft_td_t *setup, *stat; 137 u_int length; 138 } ctl; 139 /* Interrupt pipe */ 140 struct { 141 int npoll; 142 int isread; 143 uhci_soft_qh_t **qhs; 144 } intr; 145 /* Bulk pipe */ 146 struct { 147 uhci_soft_qh_t *sqh; 148 u_int length; 149 int isread; 150 } bulk; 151 /* Iso pipe */ 152 struct iso { 153 uhci_soft_td_t **stds; 154 int next, inuse; 155 } iso; 156 } u; 157 }; 158 159 Static void uhci_globalreset(uhci_softc_t *); 160 Static usbd_status uhci_portreset(uhci_softc_t*, int); 161 Static void uhci_reset(uhci_softc_t *); 162 Static usbd_status uhci_run(uhci_softc_t *, int run); 163 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 164 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 165 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 166 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 167 #if 0 168 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 169 uhci_intr_info_t *); 170 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 171 #endif 172 173 Static void uhci_free_std_chain(uhci_softc_t *, 174 uhci_soft_td_t *, uhci_soft_td_t *); 175 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 176 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 177 uhci_soft_td_t **, uhci_soft_td_t **); 178 Static void uhci_poll_hub(void *); 179 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 180 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 181 Static void uhci_idone(uhci_intr_info_t *); 182 183 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 184 185 Static void uhci_timeout(void *); 186 Static void uhci_timeout_task(void *); 187 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 188 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 189 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 190 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 191 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 192 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 193 Static void uhci_add_loop(uhci_softc_t *sc); 194 Static void uhci_rem_loop(uhci_softc_t *sc); 195 196 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 197 Static void uhci_device_isoc_enter(usbd_xfer_handle); 198 199 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 200 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 201 202 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 203 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 204 205 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 206 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 207 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 208 Static void uhci_device_ctrl_close(usbd_pipe_handle); 209 Static void uhci_device_ctrl_done(usbd_xfer_handle); 210 211 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 212 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 213 Static void uhci_device_intr_abort(usbd_xfer_handle); 214 Static void uhci_device_intr_close(usbd_pipe_handle); 215 Static void uhci_device_intr_done(usbd_xfer_handle); 216 217 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 218 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 219 Static void uhci_device_bulk_abort(usbd_xfer_handle); 220 Static void uhci_device_bulk_close(usbd_pipe_handle); 221 Static void uhci_device_bulk_done(usbd_xfer_handle); 222 223 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 224 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 225 Static void uhci_device_isoc_abort(usbd_xfer_handle); 226 Static void uhci_device_isoc_close(usbd_pipe_handle); 227 Static void uhci_device_isoc_done(usbd_xfer_handle); 228 229 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 230 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 231 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 232 Static void uhci_root_ctrl_close(usbd_pipe_handle); 233 Static void uhci_root_ctrl_done(usbd_xfer_handle); 234 235 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 236 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 237 Static void uhci_root_intr_abort(usbd_xfer_handle); 238 Static void uhci_root_intr_close(usbd_pipe_handle); 239 Static void uhci_root_intr_done(usbd_xfer_handle); 240 241 Static usbd_status uhci_open(usbd_pipe_handle); 242 Static void uhci_poll(struct usbd_bus *); 243 Static void uhci_softintr(void *); 244 245 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 246 247 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 248 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 249 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 250 struct uhci_pipe *pipe, int ival); 251 252 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 253 Static void uhci_noop(usbd_pipe_handle pipe); 254 255 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 256 uhci_soft_qh_t *); 257 258 #ifdef UHCI_DEBUG 259 Static void uhci_dump_all(uhci_softc_t *); 260 Static void uhci_dumpregs(uhci_softc_t *); 261 Static void uhci_dump_qhs(uhci_soft_qh_t *); 262 Static void uhci_dump_qh(uhci_soft_qh_t *); 263 Static void uhci_dump_tds(uhci_soft_td_t *); 264 Static void uhci_dump_td(uhci_soft_td_t *); 265 Static void uhci_dump_ii(uhci_intr_info_t *ii); 266 void uhci_dump(void); 267 #endif 268 269 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 270 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 271 #define UWRITE1(sc, r, x) \ 272 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 273 } while (/*CONSTCOND*/0) 274 #define UWRITE2(sc, r, x) \ 275 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 276 } while (/*CONSTCOND*/0) 277 #define UWRITE4(sc, r, x) \ 278 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 279 } while (/*CONSTCOND*/0) 280 static __inline uint8_t 281 UREAD1(uhci_softc_t *sc, bus_size_t r) 282 { 283 284 UBARR(sc); 285 return bus_space_read_1(sc->iot, sc->ioh, r); 286 } 287 288 static __inline uint16_t 289 UREAD2(uhci_softc_t *sc, bus_size_t r) 290 { 291 292 UBARR(sc); 293 return bus_space_read_2(sc->iot, sc->ioh, r); 294 } 295 296 static __inline uint32_t 297 UREAD4(uhci_softc_t *sc, bus_size_t r) 298 { 299 300 UBARR(sc); 301 return bus_space_read_4(sc->iot, sc->ioh, r); 302 } 303 304 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 305 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 306 307 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 308 309 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 310 311 #define UHCI_INTR_ENDPT 1 312 313 const struct usbd_bus_methods uhci_bus_methods = { 314 uhci_open, 315 uhci_softintr, 316 uhci_poll, 317 uhci_allocm, 318 uhci_freem, 319 uhci_allocx, 320 uhci_freex, 321 }; 322 323 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 324 uhci_root_ctrl_transfer, 325 uhci_root_ctrl_start, 326 uhci_root_ctrl_abort, 327 uhci_root_ctrl_close, 328 uhci_noop, 329 uhci_root_ctrl_done, 330 }; 331 332 const struct usbd_pipe_methods uhci_root_intr_methods = { 333 uhci_root_intr_transfer, 334 uhci_root_intr_start, 335 uhci_root_intr_abort, 336 uhci_root_intr_close, 337 uhci_noop, 338 uhci_root_intr_done, 339 }; 340 341 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 342 uhci_device_ctrl_transfer, 343 uhci_device_ctrl_start, 344 uhci_device_ctrl_abort, 345 uhci_device_ctrl_close, 346 uhci_noop, 347 uhci_device_ctrl_done, 348 }; 349 350 const struct usbd_pipe_methods uhci_device_intr_methods = { 351 uhci_device_intr_transfer, 352 uhci_device_intr_start, 353 uhci_device_intr_abort, 354 uhci_device_intr_close, 355 uhci_device_clear_toggle, 356 uhci_device_intr_done, 357 }; 358 359 const struct usbd_pipe_methods uhci_device_bulk_methods = { 360 uhci_device_bulk_transfer, 361 uhci_device_bulk_start, 362 uhci_device_bulk_abort, 363 uhci_device_bulk_close, 364 uhci_device_clear_toggle, 365 uhci_device_bulk_done, 366 }; 367 368 const struct usbd_pipe_methods uhci_device_isoc_methods = { 369 uhci_device_isoc_transfer, 370 uhci_device_isoc_start, 371 uhci_device_isoc_abort, 372 uhci_device_isoc_close, 373 uhci_noop, 374 uhci_device_isoc_done, 375 }; 376 377 #define uhci_add_intr_info(sc, ii) \ 378 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 379 #define uhci_del_intr_info(ii) \ 380 do { \ 381 LIST_REMOVE((ii), list); \ 382 (ii)->list.le_prev = NULL; \ 383 } while (0) 384 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 385 386 Static inline uhci_soft_qh_t * 387 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 388 { 389 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 390 391 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 392 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 393 usb_syncmem(&pqh->dma, 394 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 395 sizeof(pqh->qh.qh_hlink), 396 BUS_DMASYNC_POSTWRITE); 397 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 398 printf("uhci_find_prev_qh: QH not found\n"); 399 return (NULL); 400 } 401 #endif 402 } 403 return (pqh); 404 } 405 406 void 407 uhci_globalreset(uhci_softc_t *sc) 408 { 409 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 410 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 411 UHCICMD(sc, 0); /* do nothing */ 412 } 413 414 usbd_status 415 uhci_init(uhci_softc_t *sc) 416 { 417 usbd_status err; 418 int i, j; 419 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 420 uhci_soft_td_t *std; 421 422 DPRINTFN(1,("uhci_init: start\n")); 423 424 #ifdef UHCI_DEBUG 425 thesc = sc; 426 427 if (uhcidebug > 2) 428 uhci_dumpregs(sc); 429 #endif 430 431 sc->sc_suspend = PWR_RESUME; 432 433 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 434 uhci_globalreset(sc); /* reset the controller */ 435 uhci_reset(sc); 436 437 #ifdef __NetBSD__ 438 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 439 USB_MEM_RESERVE); 440 #endif 441 442 /* Allocate and initialize real frame array. */ 443 err = usb_allocmem(&sc->sc_bus, 444 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 445 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 446 if (err) 447 return (err); 448 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 449 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 450 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 451 452 /* 453 * Allocate a TD, inactive, that hangs from the last QH. 454 * This is to avoid a bug in the PIIX that makes it run berserk 455 * otherwise. 456 */ 457 std = uhci_alloc_std(sc); 458 if (std == NULL) 459 return (USBD_NOMEM); 460 std->link.std = NULL; 461 std->td.td_link = htole32(UHCI_PTR_T); 462 std->td.td_status = htole32(0); /* inactive */ 463 std->td.td_token = htole32(0); 464 std->td.td_buffer = htole32(0); 465 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 466 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 467 468 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 469 lsqh = uhci_alloc_sqh(sc); 470 if (lsqh == NULL) 471 return (USBD_NOMEM); 472 lsqh->hlink = NULL; 473 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 474 lsqh->elink = std; 475 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 476 sc->sc_last_qh = lsqh; 477 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 478 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 479 480 /* Allocate the dummy QH where bulk traffic will be queued. */ 481 bsqh = uhci_alloc_sqh(sc); 482 if (bsqh == NULL) 483 return (USBD_NOMEM); 484 bsqh->hlink = lsqh; 485 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 486 bsqh->elink = NULL; 487 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 488 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 489 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 490 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 491 492 /* Allocate dummy QH where high speed control traffic will be queued. */ 493 chsqh = uhci_alloc_sqh(sc); 494 if (chsqh == NULL) 495 return (USBD_NOMEM); 496 chsqh->hlink = bsqh; 497 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 498 chsqh->elink = NULL; 499 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 500 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 501 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 502 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 503 504 /* Allocate dummy QH where control traffic will be queued. */ 505 clsqh = uhci_alloc_sqh(sc); 506 if (clsqh == NULL) 507 return (USBD_NOMEM); 508 clsqh->hlink = chsqh; 509 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 510 clsqh->elink = NULL; 511 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 512 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 513 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 514 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 515 516 /* 517 * Make all (virtual) frame list pointers point to the interrupt 518 * queue heads and the interrupt queue heads at the control 519 * queue head and point the physical frame list to the virtual. 520 */ 521 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 522 std = uhci_alloc_std(sc); 523 sqh = uhci_alloc_sqh(sc); 524 if (std == NULL || sqh == NULL) 525 return (USBD_NOMEM); 526 std->link.sqh = sqh; 527 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 528 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 529 std->td.td_token = htole32(0); 530 std->td.td_buffer = htole32(0); 531 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 532 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 533 sqh->hlink = clsqh; 534 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 535 sqh->elink = NULL; 536 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 537 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 538 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 539 sc->sc_vframes[i].htd = std; 540 sc->sc_vframes[i].etd = std; 541 sc->sc_vframes[i].hqh = sqh; 542 sc->sc_vframes[i].eqh = sqh; 543 for (j = i; 544 j < UHCI_FRAMELIST_COUNT; 545 j += UHCI_VFRAMELIST_COUNT) 546 sc->sc_pframes[j] = htole32(std->physaddr); 547 } 548 usb_syncmem(&sc->sc_dma, 0, 549 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 550 BUS_DMASYNC_PREWRITE); 551 552 553 LIST_INIT(&sc->sc_intrhead); 554 555 SIMPLEQ_INIT(&sc->sc_free_xfers); 556 557 usb_callout_init(sc->sc_poll_handle); 558 559 /* Set up the bus struct. */ 560 sc->sc_bus.methods = &uhci_bus_methods; 561 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 562 563 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 564 565 DPRINTFN(1,("uhci_init: enabling\n")); 566 567 err = uhci_run(sc, 1); /* and here we go... */ 568 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 569 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 570 return err; 571 } 572 573 #if defined(__NetBSD__) || defined(__OpenBSD__) 574 int 575 uhci_activate(device_t self, enum devact act) 576 { 577 struct uhci_softc *sc = device_private(self); 578 int rv = 0; 579 580 switch (act) { 581 case DVACT_ACTIVATE: 582 return (EOPNOTSUPP); 583 584 case DVACT_DEACTIVATE: 585 sc->sc_dying = 1; 586 if (sc->sc_child != NULL) 587 rv = config_deactivate(sc->sc_child); 588 break; 589 } 590 return (rv); 591 } 592 593 void 594 uhci_childdet(device_t self, device_t child) 595 { 596 struct uhci_softc *sc = device_private(self); 597 598 KASSERT(sc->sc_child == child); 599 sc->sc_child = NULL; 600 } 601 602 int 603 uhci_detach(struct uhci_softc *sc, int flags) 604 { 605 usbd_xfer_handle xfer; 606 int rv = 0; 607 608 if (sc->sc_child != NULL) 609 rv = config_detach(sc->sc_child, flags); 610 611 if (rv != 0) 612 return (rv); 613 614 /* Free all xfers associated with this HC. */ 615 for (;;) { 616 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 617 if (xfer == NULL) 618 break; 619 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 620 free(xfer, M_USB); 621 } 622 623 /* XXX free other data structures XXX */ 624 625 return (rv); 626 } 627 #endif 628 629 usbd_status 630 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 631 { 632 struct uhci_softc *sc = bus->hci_private; 633 usbd_status status; 634 u_int32_t n; 635 636 /* 637 * XXX 638 * Since we are allocating a buffer we can assume that we will 639 * need TDs for it. Since we don't want to allocate those from 640 * an interrupt context, we allocate them here and free them again. 641 * This is no guarantee that we'll get the TDs next time... 642 */ 643 n = size / 8; 644 if (n > 16) { 645 u_int32_t i; 646 uhci_soft_td_t **stds; 647 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 648 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 649 M_WAITOK|M_ZERO); 650 for(i=0; i < n; i++) 651 stds[i] = uhci_alloc_std(sc); 652 for(i=0; i < n; i++) 653 if (stds[i] != NULL) 654 uhci_free_std(sc, stds[i]); 655 free(stds, M_TEMP); 656 } 657 658 659 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 660 #ifdef __NetBSD__ 661 if (status == USBD_NOMEM) 662 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 663 #endif 664 return status; 665 } 666 667 void 668 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 669 { 670 #ifdef __NetBSD__ 671 if (dma->block->flags & USB_DMA_RESERVE) { 672 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 673 dma); 674 return; 675 } 676 #endif 677 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 678 } 679 680 usbd_xfer_handle 681 uhci_allocx(struct usbd_bus *bus) 682 { 683 struct uhci_softc *sc = bus->hci_private; 684 usbd_xfer_handle xfer; 685 686 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 687 if (xfer != NULL) { 688 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 689 #ifdef DIAGNOSTIC 690 if (xfer->busy_free != XFER_FREE) { 691 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 692 xfer->busy_free); 693 } 694 #endif 695 } else { 696 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 697 } 698 if (xfer != NULL) { 699 memset(xfer, 0, sizeof (struct uhci_xfer)); 700 UXFER(xfer)->iinfo.sc = sc; 701 #ifdef DIAGNOSTIC 702 UXFER(xfer)->iinfo.isdone = 1; 703 xfer->busy_free = XFER_BUSY; 704 #endif 705 } 706 return (xfer); 707 } 708 709 void 710 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 711 { 712 struct uhci_softc *sc = bus->hci_private; 713 714 #ifdef DIAGNOSTIC 715 if (xfer->busy_free != XFER_BUSY) { 716 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 717 xfer->busy_free); 718 } 719 xfer->busy_free = XFER_FREE; 720 if (!UXFER(xfer)->iinfo.isdone) { 721 printf("uhci_freex: !isdone\n"); 722 } 723 #endif 724 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 725 } 726 727 /* 728 * Handle suspend/resume. 729 * 730 * We need to switch to polling mode here, because this routine is 731 * called from an interrupt context. This is all right since we 732 * are almost suspended anyway. 733 */ 734 bool 735 uhci_resume(device_t dv PMF_FN_ARGS) 736 { 737 uhci_softc_t *sc = device_private(dv); 738 int cmd; 739 int s; 740 741 s = splhardusb(); 742 743 cmd = UREAD2(sc, UHCI_CMD); 744 sc->sc_bus.use_polling++; 745 UWRITE2(sc, UHCI_INTR, 0); 746 uhci_globalreset(sc); 747 uhci_reset(sc); 748 if (cmd & UHCI_CMD_RS) 749 uhci_run(sc, 0); 750 751 /* restore saved state */ 752 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 753 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 754 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 755 756 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 757 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 758 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 759 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 760 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 761 UHCICMD(sc, UHCI_CMD_MAXP); 762 uhci_run(sc, 1); /* and start traffic again */ 763 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 764 sc->sc_bus.use_polling--; 765 if (sc->sc_intr_xfer != NULL) 766 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 767 sc->sc_intr_xfer); 768 #ifdef UHCI_DEBUG 769 if (uhcidebug > 2) 770 uhci_dumpregs(sc); 771 #endif 772 773 sc->sc_suspend = PWR_RESUME; 774 splx(s); 775 776 return true; 777 } 778 779 bool 780 uhci_suspend(device_t dv PMF_FN_ARGS) 781 { 782 uhci_softc_t *sc = device_private(dv); 783 int cmd; 784 int s; 785 786 s = splhardusb(); 787 788 cmd = UREAD2(sc, UHCI_CMD); 789 790 #ifdef UHCI_DEBUG 791 if (uhcidebug > 2) 792 uhci_dumpregs(sc); 793 #endif 794 if (sc->sc_intr_xfer != NULL) 795 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, 796 sc->sc_intr_xfer); 797 sc->sc_suspend = PWR_SUSPEND; 798 sc->sc_bus.use_polling++; 799 800 uhci_run(sc, 0); /* stop the controller */ 801 cmd &= ~UHCI_CMD_RS; 802 803 /* save some state if BIOS doesn't */ 804 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 805 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 806 807 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 808 809 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 810 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 811 sc->sc_bus.use_polling--; 812 813 splx(s); 814 815 return true; 816 } 817 818 #ifdef UHCI_DEBUG 819 Static void 820 uhci_dumpregs(uhci_softc_t *sc) 821 { 822 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 823 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 824 device_xname(sc->sc_dev), 825 UREAD2(sc, UHCI_CMD), 826 UREAD2(sc, UHCI_STS), 827 UREAD2(sc, UHCI_INTR), 828 UREAD2(sc, UHCI_FRNUM), 829 UREAD4(sc, UHCI_FLBASEADDR), 830 UREAD1(sc, UHCI_SOF), 831 UREAD2(sc, UHCI_PORTSC1), 832 UREAD2(sc, UHCI_PORTSC2))); 833 } 834 835 void 836 uhci_dump_td(uhci_soft_td_t *p) 837 { 838 char sbuf[128], sbuf2[128]; 839 840 841 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 842 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 843 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 844 "token=0x%08lx buffer=0x%08lx\n", 845 p, (long)p->physaddr, 846 (long)le32toh(p->td.td_link), 847 (long)le32toh(p->td.td_status), 848 (long)le32toh(p->td.td_token), 849 (long)le32toh(p->td.td_buffer))); 850 851 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF", 852 sbuf, sizeof(sbuf)); 853 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status), 854 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 855 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 856 sbuf2, sizeof(sbuf2)); 857 858 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 859 "D=%d,maxlen=%d\n", sbuf, sbuf2, 860 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 861 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 862 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 863 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 864 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 865 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 866 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 867 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 868 BUS_DMASYNC_PREREAD); 869 } 870 871 void 872 uhci_dump_qh(uhci_soft_qh_t *sqh) 873 { 874 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 875 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 876 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 877 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 878 le32toh(sqh->qh.qh_elink))); 879 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 880 } 881 882 883 #if 1 884 void 885 uhci_dump(void) 886 { 887 uhci_dump_all(thesc); 888 } 889 #endif 890 891 void 892 uhci_dump_all(uhci_softc_t *sc) 893 { 894 uhci_dumpregs(sc); 895 printf("intrs=%d\n", sc->sc_bus.no_intrs); 896 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 897 uhci_dump_qh(sc->sc_lctl_start); 898 } 899 900 901 void 902 uhci_dump_qhs(uhci_soft_qh_t *sqh) 903 { 904 uhci_dump_qh(sqh); 905 906 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 907 * Traverses sideways first, then down. 908 * 909 * QH1 910 * QH2 911 * No QH 912 * TD2.1 913 * TD2.2 914 * TD1.1 915 * etc. 916 * 917 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 918 */ 919 920 921 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 922 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 923 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 924 uhci_dump_qhs(sqh->hlink); 925 else 926 DPRINTF(("No QH\n")); 927 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 928 929 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 930 uhci_dump_tds(sqh->elink); 931 else 932 DPRINTF(("No TD\n")); 933 } 934 935 void 936 uhci_dump_tds(uhci_soft_td_t *std) 937 { 938 uhci_soft_td_t *td; 939 int stop; 940 941 for(td = std; td != NULL; td = td->link.std) { 942 uhci_dump_td(td); 943 944 /* Check whether the link pointer in this TD marks 945 * the link pointer as end of queue. This avoids 946 * printing the free list in case the queue/TD has 947 * already been moved there (seatbelt). 948 */ 949 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 950 sizeof(td->td.td_link), 951 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 952 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 953 le32toh(td->td.td_link) == 0); 954 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 955 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 956 if (stop) 957 break; 958 } 959 } 960 961 Static void 962 uhci_dump_ii(uhci_intr_info_t *ii) 963 { 964 usbd_pipe_handle pipe; 965 usb_endpoint_descriptor_t *ed; 966 usbd_device_handle dev; 967 968 #ifdef DIAGNOSTIC 969 #define DONE ii->isdone 970 #else 971 #define DONE 0 972 #endif 973 if (ii == NULL) { 974 printf("ii NULL\n"); 975 return; 976 } 977 if (ii->xfer == NULL) { 978 printf("ii %p: done=%d xfer=NULL\n", 979 ii, DONE); 980 return; 981 } 982 pipe = ii->xfer->pipe; 983 if (pipe == NULL) { 984 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 985 ii, DONE, ii->xfer); 986 return; 987 } 988 if (pipe->endpoint == NULL) { 989 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 990 ii, DONE, ii->xfer, pipe); 991 return; 992 } 993 if (pipe->device == NULL) { 994 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 995 ii, DONE, ii->xfer, pipe); 996 return; 997 } 998 ed = pipe->endpoint->edesc; 999 dev = pipe->device; 1000 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 1001 ii, DONE, ii->xfer, dev, 1002 UGETW(dev->ddesc.idVendor), 1003 UGETW(dev->ddesc.idProduct), 1004 dev->address, pipe, 1005 ed->bEndpointAddress, ed->bmAttributes); 1006 #undef DONE 1007 } 1008 1009 void uhci_dump_iis(struct uhci_softc *sc); 1010 void 1011 uhci_dump_iis(struct uhci_softc *sc) 1012 { 1013 uhci_intr_info_t *ii; 1014 1015 printf("intr_info list:\n"); 1016 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 1017 uhci_dump_ii(ii); 1018 } 1019 1020 void iidump(void); 1021 void iidump(void) { uhci_dump_iis(thesc); } 1022 1023 #endif 1024 1025 /* 1026 * This routine is executed periodically and simulates interrupts 1027 * from the root controller interrupt pipe for port status change. 1028 */ 1029 void 1030 uhci_poll_hub(void *addr) 1031 { 1032 usbd_xfer_handle xfer = addr; 1033 usbd_pipe_handle pipe = xfer->pipe; 1034 uhci_softc_t *sc = pipe->device->bus->hci_private; 1035 int s; 1036 u_char *p; 1037 1038 DPRINTFN(20, ("uhci_poll_hub\n")); 1039 1040 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1041 1042 p = KERNADDR(&xfer->dmabuf, 0); 1043 p[0] = 0; 1044 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1045 p[0] |= 1<<1; 1046 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1047 p[0] |= 1<<2; 1048 if (p[0] == 0) 1049 /* No change, try again in a while */ 1050 return; 1051 1052 xfer->actlen = 1; 1053 xfer->status = USBD_NORMAL_COMPLETION; 1054 s = splusb(); 1055 xfer->device->bus->intr_context++; 1056 usb_transfer_complete(xfer); 1057 xfer->device->bus->intr_context--; 1058 splx(s); 1059 } 1060 1061 void 1062 uhci_root_intr_done(usbd_xfer_handle xfer) 1063 { 1064 } 1065 1066 void 1067 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1068 { 1069 } 1070 1071 /* 1072 * Let the last QH loop back to the high speed control transfer QH. 1073 * This is what intel calls "bandwidth reclamation" and improves 1074 * USB performance a lot for some devices. 1075 * If we are already looping, just count it. 1076 */ 1077 void 1078 uhci_add_loop(uhci_softc_t *sc) { 1079 #ifdef UHCI_DEBUG 1080 if (uhcinoloop) 1081 return; 1082 #endif 1083 if (++sc->sc_loops == 1) { 1084 DPRINTFN(5,("uhci_start_loop: add\n")); 1085 /* Note, we don't loop back the soft pointer. */ 1086 sc->sc_last_qh->qh.qh_hlink = 1087 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1088 usb_syncmem(&sc->sc_last_qh->dma, 1089 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1090 sizeof(sc->sc_last_qh->qh.qh_hlink), 1091 BUS_DMASYNC_PREWRITE); 1092 } 1093 } 1094 1095 void 1096 uhci_rem_loop(uhci_softc_t *sc) { 1097 #ifdef UHCI_DEBUG 1098 if (uhcinoloop) 1099 return; 1100 #endif 1101 if (--sc->sc_loops == 0) { 1102 DPRINTFN(5,("uhci_end_loop: remove\n")); 1103 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1104 usb_syncmem(&sc->sc_last_qh->dma, 1105 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1106 sizeof(sc->sc_last_qh->qh.qh_hlink), 1107 BUS_DMASYNC_PREWRITE); 1108 } 1109 } 1110 1111 /* Add high speed control QH, called at splusb(). */ 1112 void 1113 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1114 { 1115 uhci_soft_qh_t *eqh; 1116 1117 SPLUSBCHECK; 1118 1119 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1120 eqh = sc->sc_hctl_end; 1121 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1122 sizeof(eqh->qh.qh_hlink), 1123 BUS_DMASYNC_POSTWRITE); 1124 sqh->hlink = eqh->hlink; 1125 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1126 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1127 BUS_DMASYNC_PREWRITE); 1128 eqh->hlink = sqh; 1129 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1130 sc->sc_hctl_end = sqh; 1131 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1132 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1133 #ifdef UHCI_CTL_LOOP 1134 uhci_add_loop(sc); 1135 #endif 1136 } 1137 1138 /* Remove high speed control QH, called at splusb(). */ 1139 void 1140 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1141 { 1142 uhci_soft_qh_t *pqh; 1143 1144 SPLUSBCHECK; 1145 1146 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1147 #ifdef UHCI_CTL_LOOP 1148 uhci_rem_loop(sc); 1149 #endif 1150 /* 1151 * The T bit should be set in the elink of the QH so that the HC 1152 * doesn't follow the pointer. This condition may fail if the 1153 * the transferred packet was short so that the QH still points 1154 * at the last used TD. 1155 * In this case we set the T bit and wait a little for the HC 1156 * to stop looking at the TD. 1157 * Note that if the TD chain is large enough, the controller 1158 * may still be looking at the chain at the end of this function. 1159 * uhci_free_std_chain() will make sure the controller stops 1160 * looking at it quickly, but until then we should not change 1161 * sqh->hlink. 1162 */ 1163 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1164 sizeof(sqh->qh.qh_elink), 1165 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1166 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1167 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1168 usb_syncmem(&sqh->dma, 1169 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1170 sizeof(sqh->qh.qh_elink), 1171 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1172 delay(UHCI_QH_REMOVE_DELAY); 1173 } 1174 1175 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1176 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1177 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1178 pqh->hlink = sqh->hlink; 1179 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1180 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1181 sizeof(pqh->qh.qh_hlink), 1182 BUS_DMASYNC_PREWRITE); 1183 delay(UHCI_QH_REMOVE_DELAY); 1184 if (sc->sc_hctl_end == sqh) 1185 sc->sc_hctl_end = pqh; 1186 } 1187 1188 /* Add low speed control QH, called at splusb(). */ 1189 void 1190 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1191 { 1192 uhci_soft_qh_t *eqh; 1193 1194 SPLUSBCHECK; 1195 1196 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1197 eqh = sc->sc_lctl_end; 1198 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1199 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1200 sqh->hlink = eqh->hlink; 1201 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1202 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1203 BUS_DMASYNC_PREWRITE); 1204 eqh->hlink = sqh; 1205 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1206 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1207 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1208 sc->sc_lctl_end = sqh; 1209 } 1210 1211 /* Remove low speed control QH, called at splusb(). */ 1212 void 1213 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1214 { 1215 uhci_soft_qh_t *pqh; 1216 1217 SPLUSBCHECK; 1218 1219 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1220 /* See comment in uhci_remove_hs_ctrl() */ 1221 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1222 sizeof(sqh->qh.qh_elink), 1223 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1224 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1225 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1226 usb_syncmem(&sqh->dma, 1227 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1228 sizeof(sqh->qh.qh_elink), 1229 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1230 delay(UHCI_QH_REMOVE_DELAY); 1231 } 1232 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1233 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1234 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1235 pqh->hlink = sqh->hlink; 1236 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1237 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1238 sizeof(pqh->qh.qh_hlink), 1239 BUS_DMASYNC_PREWRITE); 1240 delay(UHCI_QH_REMOVE_DELAY); 1241 if (sc->sc_lctl_end == sqh) 1242 sc->sc_lctl_end = pqh; 1243 } 1244 1245 /* Add bulk QH, called at splusb(). */ 1246 void 1247 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1248 { 1249 uhci_soft_qh_t *eqh; 1250 1251 SPLUSBCHECK; 1252 1253 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1254 eqh = sc->sc_bulk_end; 1255 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1256 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1257 sqh->hlink = eqh->hlink; 1258 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1259 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1260 BUS_DMASYNC_PREWRITE); 1261 eqh->hlink = sqh; 1262 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1263 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1264 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1265 sc->sc_bulk_end = sqh; 1266 uhci_add_loop(sc); 1267 } 1268 1269 /* Remove bulk QH, called at splusb(). */ 1270 void 1271 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1272 { 1273 uhci_soft_qh_t *pqh; 1274 1275 SPLUSBCHECK; 1276 1277 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1278 uhci_rem_loop(sc); 1279 /* See comment in uhci_remove_hs_ctrl() */ 1280 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1281 sizeof(sqh->qh.qh_elink), 1282 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1283 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1284 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1285 usb_syncmem(&sqh->dma, 1286 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1287 sizeof(sqh->qh.qh_elink), 1288 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1289 delay(UHCI_QH_REMOVE_DELAY); 1290 } 1291 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1292 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1293 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1294 pqh->hlink = sqh->hlink; 1295 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1296 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1297 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1298 delay(UHCI_QH_REMOVE_DELAY); 1299 if (sc->sc_bulk_end == sqh) 1300 sc->sc_bulk_end = pqh; 1301 } 1302 1303 Static int uhci_intr1(uhci_softc_t *); 1304 1305 int 1306 uhci_intr(void *arg) 1307 { 1308 uhci_softc_t *sc = arg; 1309 1310 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1311 return (0); 1312 1313 if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) { 1314 #ifdef DIAGNOSTIC 1315 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1316 #endif 1317 return (0); 1318 } 1319 1320 return (uhci_intr1(sc)); 1321 } 1322 1323 int 1324 uhci_intr1(uhci_softc_t *sc) 1325 { 1326 int status; 1327 int ack; 1328 1329 #ifdef UHCI_DEBUG 1330 if (uhcidebug > 15) { 1331 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1332 uhci_dumpregs(sc); 1333 } 1334 #endif 1335 1336 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1337 if (status == 0) /* The interrupt was not for us. */ 1338 return (0); 1339 1340 if (sc->sc_suspend != PWR_RESUME) { 1341 #ifdef DIAGNOSTIC 1342 printf("%s: interrupt while not operating ignored\n", 1343 device_xname(sc->sc_dev)); 1344 #endif 1345 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1346 return (0); 1347 } 1348 1349 ack = 0; 1350 if (status & UHCI_STS_USBINT) 1351 ack |= UHCI_STS_USBINT; 1352 if (status & UHCI_STS_USBEI) 1353 ack |= UHCI_STS_USBEI; 1354 if (status & UHCI_STS_RD) { 1355 ack |= UHCI_STS_RD; 1356 #ifdef UHCI_DEBUG 1357 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1358 #endif 1359 } 1360 if (status & UHCI_STS_HSE) { 1361 ack |= UHCI_STS_HSE; 1362 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1363 } 1364 if (status & UHCI_STS_HCPE) { 1365 ack |= UHCI_STS_HCPE; 1366 printf("%s: host controller process error\n", 1367 device_xname(sc->sc_dev)); 1368 } 1369 if (status & UHCI_STS_HCH) { 1370 /* no acknowledge needed */ 1371 if (!sc->sc_dying) { 1372 printf("%s: host controller halted\n", 1373 device_xname(sc->sc_dev)); 1374 #ifdef UHCI_DEBUG 1375 uhci_dump_all(sc); 1376 #endif 1377 } 1378 sc->sc_dying = 1; 1379 } 1380 1381 if (!ack) 1382 return (0); /* nothing to acknowledge */ 1383 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1384 1385 sc->sc_bus.no_intrs++; 1386 usb_schedsoftintr(&sc->sc_bus); 1387 1388 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1389 1390 return (1); 1391 } 1392 1393 void 1394 uhci_softintr(void *v) 1395 { 1396 struct usbd_bus *bus = v; 1397 uhci_softc_t *sc = bus->hci_private; 1398 uhci_intr_info_t *ii, *nextii; 1399 1400 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev), 1401 sc->sc_bus.intr_context)); 1402 1403 sc->sc_bus.intr_context++; 1404 1405 /* 1406 * Interrupts on UHCI really suck. When the host controller 1407 * interrupts because a transfer is completed there is no 1408 * way of knowing which transfer it was. You can scan down 1409 * the TDs and QHs of the previous frame to limit the search, 1410 * but that assumes that the interrupt was not delayed by more 1411 * than 1 ms, which may not always be true (e.g. after debug 1412 * output on a slow console). 1413 * We scan all interrupt descriptors to see if any have 1414 * completed. 1415 */ 1416 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1417 nextii = LIST_NEXT(ii, list); 1418 uhci_check_intr(sc, ii); 1419 } 1420 1421 #ifdef USB_USE_SOFTINTR 1422 if (sc->sc_softwake) { 1423 sc->sc_softwake = 0; 1424 wakeup(&sc->sc_softwake); 1425 } 1426 #endif /* USB_USE_SOFTINTR */ 1427 1428 sc->sc_bus.intr_context--; 1429 } 1430 1431 /* Check for an interrupt. */ 1432 void 1433 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1434 { 1435 uhci_soft_td_t *std, *lstd; 1436 u_int32_t status; 1437 1438 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1439 #ifdef DIAGNOSTIC 1440 if (ii == NULL) { 1441 printf("uhci_check_intr: no ii? %p\n", ii); 1442 return; 1443 } 1444 #endif 1445 if (ii->xfer->status == USBD_CANCELLED || 1446 ii->xfer->status == USBD_TIMEOUT) { 1447 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1448 return; 1449 } 1450 1451 if (ii->stdstart == NULL) 1452 return; 1453 lstd = ii->stdend; 1454 #ifdef DIAGNOSTIC 1455 if (lstd == NULL) { 1456 printf("uhci_check_intr: std==0\n"); 1457 return; 1458 } 1459 #endif 1460 /* 1461 * If the last TD is still active we need to check whether there 1462 * is an error somewhere in the middle, or whether there was a 1463 * short packet (SPD and not ACTIVE). 1464 */ 1465 usb_syncmem(&lstd->dma, 1466 lstd->offs + offsetof(uhci_td_t, td_status), 1467 sizeof(lstd->td.td_status), 1468 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1469 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1470 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1471 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1472 usb_syncmem(&std->dma, 1473 std->offs + offsetof(uhci_td_t, td_status), 1474 sizeof(std->td.td_status), 1475 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1476 status = le32toh(std->td.td_status); 1477 usb_syncmem(&std->dma, 1478 std->offs + offsetof(uhci_td_t, td_status), 1479 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1480 /* If there's an active TD the xfer isn't done. */ 1481 if (status & UHCI_TD_ACTIVE) 1482 break; 1483 /* Any kind of error makes the xfer done. */ 1484 if (status & UHCI_TD_STALLED) 1485 goto done; 1486 /* We want short packets, and it is short: it's done */ 1487 usb_syncmem(&std->dma, 1488 std->offs + offsetof(uhci_td_t, td_token), 1489 sizeof(std->td.td_token), 1490 BUS_DMASYNC_POSTWRITE); 1491 if ((status & UHCI_TD_SPD) && 1492 UHCI_TD_GET_ACTLEN(status) < 1493 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1494 goto done; 1495 } 1496 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1497 ii, ii->stdstart)); 1498 usb_syncmem(&lstd->dma, 1499 lstd->offs + offsetof(uhci_td_t, td_status), 1500 sizeof(lstd->td.td_status), 1501 BUS_DMASYNC_PREREAD); 1502 return; 1503 } 1504 done: 1505 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1506 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii); 1507 uhci_idone(ii); 1508 } 1509 1510 /* Called at splusb() */ 1511 void 1512 uhci_idone(uhci_intr_info_t *ii) 1513 { 1514 usbd_xfer_handle xfer = ii->xfer; 1515 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1516 uhci_soft_td_t *std; 1517 u_int32_t status = 0, nstatus; 1518 int actlen; 1519 1520 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1521 #ifdef DIAGNOSTIC 1522 { 1523 int s = splhigh(); 1524 if (ii->isdone) { 1525 splx(s); 1526 #ifdef UHCI_DEBUG 1527 printf("uhci_idone: ii is done!\n "); 1528 uhci_dump_ii(ii); 1529 #else 1530 printf("uhci_idone: ii=%p is done!\n", ii); 1531 #endif 1532 return; 1533 } 1534 ii->isdone = 1; 1535 splx(s); 1536 } 1537 #endif 1538 1539 if (xfer->nframes != 0) { 1540 /* Isoc transfer, do things differently. */ 1541 uhci_soft_td_t **stds = upipe->u.iso.stds; 1542 int i, n, nframes, len; 1543 1544 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1545 1546 nframes = xfer->nframes; 1547 actlen = 0; 1548 n = UXFER(xfer)->curframe; 1549 for (i = 0; i < nframes; i++) { 1550 std = stds[n]; 1551 #ifdef UHCI_DEBUG 1552 if (uhcidebug > 5) { 1553 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1554 uhci_dump_td(std); 1555 } 1556 #endif 1557 if (++n >= UHCI_VFRAMELIST_COUNT) 1558 n = 0; 1559 usb_syncmem(&std->dma, 1560 std->offs + offsetof(uhci_td_t, td_status), 1561 sizeof(std->td.td_status), 1562 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1563 status = le32toh(std->td.td_status); 1564 len = UHCI_TD_GET_ACTLEN(status); 1565 xfer->frlengths[i] = len; 1566 actlen += len; 1567 } 1568 upipe->u.iso.inuse -= nframes; 1569 xfer->actlen = actlen; 1570 xfer->status = USBD_NORMAL_COMPLETION; 1571 goto end; 1572 } 1573 1574 #ifdef UHCI_DEBUG 1575 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1576 ii, xfer, upipe)); 1577 if (uhcidebug > 10) 1578 uhci_dump_tds(ii->stdstart); 1579 #endif 1580 1581 /* The transfer is done, compute actual length and status. */ 1582 actlen = 0; 1583 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1584 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1585 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1586 nstatus = le32toh(std->td.td_status); 1587 if (nstatus & UHCI_TD_ACTIVE) 1588 break; 1589 1590 status = nstatus; 1591 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1592 UHCI_TD_PID_SETUP) 1593 actlen += UHCI_TD_GET_ACTLEN(status); 1594 else { 1595 /* 1596 * UHCI will report CRCTO in addition to a STALL or NAK 1597 * for a SETUP transaction. See section 3.2.2, "TD 1598 * CONTROL AND STATUS". 1599 */ 1600 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1601 status &= ~UHCI_TD_CRCTO; 1602 } 1603 } 1604 /* If there are left over TDs we need to update the toggle. */ 1605 if (std != NULL) 1606 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1607 1608 status &= UHCI_TD_ERROR; 1609 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1610 actlen, status)); 1611 xfer->actlen = actlen; 1612 if (status != 0) { 1613 #ifdef UHCI_DEBUG 1614 char sbuf[128]; 1615 1616 bitmask_snprintf((u_int32_t)status, 1617 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1618 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1619 sbuf, sizeof(sbuf)); 1620 1621 DPRINTFN((status == UHCI_TD_STALLED)*10, 1622 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1623 "status 0x%s\n", 1624 xfer->pipe->device->address, 1625 xfer->pipe->endpoint->edesc->bEndpointAddress, 1626 sbuf)); 1627 #endif 1628 1629 if (status == UHCI_TD_STALLED) 1630 xfer->status = USBD_STALLED; 1631 else 1632 xfer->status = USBD_IOERROR; /* more info XXX */ 1633 } else { 1634 xfer->status = USBD_NORMAL_COMPLETION; 1635 } 1636 1637 end: 1638 usb_transfer_complete(xfer); 1639 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1640 } 1641 1642 /* 1643 * Called when a request does not complete. 1644 */ 1645 void 1646 uhci_timeout(void *addr) 1647 { 1648 uhci_intr_info_t *ii = addr; 1649 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1650 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1651 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1652 1653 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1654 1655 if (sc->sc_dying) { 1656 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1657 return; 1658 } 1659 1660 /* Execute the abort in a process context. */ 1661 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1662 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1663 USB_TASKQ_HC); 1664 } 1665 1666 void 1667 uhci_timeout_task(void *addr) 1668 { 1669 usbd_xfer_handle xfer = addr; 1670 int s; 1671 1672 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1673 1674 s = splusb(); 1675 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1676 splx(s); 1677 } 1678 1679 /* 1680 * Wait here until controller claims to have an interrupt. 1681 * Then call uhci_intr and return. Use timeout to avoid waiting 1682 * too long. 1683 * Only used during boot when interrupts are not enabled yet. 1684 */ 1685 void 1686 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1687 { 1688 int timo = xfer->timeout; 1689 uhci_intr_info_t *ii; 1690 1691 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1692 1693 xfer->status = USBD_IN_PROGRESS; 1694 for (; timo >= 0; timo--) { 1695 usb_delay_ms(&sc->sc_bus, 1); 1696 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1697 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1698 uhci_intr1(sc); 1699 if (xfer->status != USBD_IN_PROGRESS) 1700 return; 1701 } 1702 } 1703 1704 /* Timeout */ 1705 DPRINTF(("uhci_waitintr: timeout\n")); 1706 for (ii = LIST_FIRST(&sc->sc_intrhead); 1707 ii != NULL && ii->xfer != xfer; 1708 ii = LIST_NEXT(ii, list)) 1709 ; 1710 #ifdef DIAGNOSTIC 1711 if (ii == NULL) 1712 panic("uhci_waitintr: lost intr_info"); 1713 #endif 1714 uhci_idone(ii); 1715 } 1716 1717 void 1718 uhci_poll(struct usbd_bus *bus) 1719 { 1720 uhci_softc_t *sc = bus->hci_private; 1721 1722 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1723 uhci_intr1(sc); 1724 } 1725 1726 void 1727 uhci_reset(uhci_softc_t *sc) 1728 { 1729 int n; 1730 1731 UHCICMD(sc, UHCI_CMD_HCRESET); 1732 /* The reset bit goes low when the controller is done. */ 1733 for (n = 0; n < UHCI_RESET_TIMEOUT && 1734 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1735 usb_delay_ms(&sc->sc_bus, 1); 1736 if (n >= UHCI_RESET_TIMEOUT) 1737 printf("%s: controller did not reset\n", 1738 device_xname(sc->sc_dev)); 1739 } 1740 1741 usbd_status 1742 uhci_run(uhci_softc_t *sc, int run) 1743 { 1744 int s, n, running; 1745 u_int16_t cmd; 1746 1747 run = run != 0; 1748 s = splhardusb(); 1749 DPRINTF(("uhci_run: setting run=%d\n", run)); 1750 cmd = UREAD2(sc, UHCI_CMD); 1751 if (run) 1752 cmd |= UHCI_CMD_RS; 1753 else 1754 cmd &= ~UHCI_CMD_RS; 1755 UHCICMD(sc, cmd); 1756 for(n = 0; n < 10; n++) { 1757 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1758 /* return when we've entered the state we want */ 1759 if (run == running) { 1760 splx(s); 1761 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1762 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1763 return (USBD_NORMAL_COMPLETION); 1764 } 1765 usb_delay_ms(&sc->sc_bus, 1); 1766 } 1767 splx(s); 1768 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1769 run ? "start" : "stop"); 1770 return (USBD_IOERROR); 1771 } 1772 1773 /* 1774 * Memory management routines. 1775 * uhci_alloc_std allocates TDs 1776 * uhci_alloc_sqh allocates QHs 1777 * These two routines do their own free list management, 1778 * partly for speed, partly because allocating DMAable memory 1779 * has page size granularaity so much memory would be wasted if 1780 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1781 */ 1782 1783 uhci_soft_td_t * 1784 uhci_alloc_std(uhci_softc_t *sc) 1785 { 1786 uhci_soft_td_t *std; 1787 usbd_status err; 1788 int i, offs; 1789 usb_dma_t dma; 1790 1791 if (sc->sc_freetds == NULL) { 1792 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1793 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1794 UHCI_TD_ALIGN, &dma); 1795 if (err) 1796 return (0); 1797 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1798 offs = i * UHCI_STD_SIZE; 1799 std = KERNADDR(&dma, offs); 1800 std->physaddr = DMAADDR(&dma, offs); 1801 std->dma = dma; 1802 std->offs = offs; 1803 std->link.std = sc->sc_freetds; 1804 sc->sc_freetds = std; 1805 } 1806 } 1807 std = sc->sc_freetds; 1808 sc->sc_freetds = std->link.std; 1809 memset(&std->td, 0, sizeof(uhci_td_t)); 1810 return std; 1811 } 1812 1813 void 1814 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1815 { 1816 #ifdef DIAGNOSTIC 1817 #define TD_IS_FREE 0x12345678 1818 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1819 printf("uhci_free_std: freeing free TD %p\n", std); 1820 return; 1821 } 1822 std->td.td_token = htole32(TD_IS_FREE); 1823 #endif 1824 std->link.std = sc->sc_freetds; 1825 sc->sc_freetds = std; 1826 } 1827 1828 uhci_soft_qh_t * 1829 uhci_alloc_sqh(uhci_softc_t *sc) 1830 { 1831 uhci_soft_qh_t *sqh; 1832 usbd_status err; 1833 int i, offs; 1834 usb_dma_t dma; 1835 1836 if (sc->sc_freeqhs == NULL) { 1837 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1838 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1839 UHCI_QH_ALIGN, &dma); 1840 if (err) 1841 return (0); 1842 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1843 offs = i * UHCI_SQH_SIZE; 1844 sqh = KERNADDR(&dma, offs); 1845 sqh->physaddr = DMAADDR(&dma, offs); 1846 sqh->dma = dma; 1847 sqh->offs = offs; 1848 sqh->hlink = sc->sc_freeqhs; 1849 sc->sc_freeqhs = sqh; 1850 } 1851 } 1852 sqh = sc->sc_freeqhs; 1853 sc->sc_freeqhs = sqh->hlink; 1854 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1855 return (sqh); 1856 } 1857 1858 void 1859 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1860 { 1861 sqh->hlink = sc->sc_freeqhs; 1862 sc->sc_freeqhs = sqh; 1863 } 1864 1865 void 1866 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1867 uhci_soft_td_t *stdend) 1868 { 1869 uhci_soft_td_t *p; 1870 1871 /* 1872 * to avoid race condition with the controller which may be looking 1873 * at this chain, we need to first invalidate all links, and 1874 * then wait for the controller to move to another queue 1875 */ 1876 for (p = std; p != stdend; p = p->link.std) { 1877 usb_syncmem(&p->dma, 1878 p->offs + offsetof(uhci_td_t, td_link), 1879 sizeof(p->td.td_link), 1880 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1881 if ((p->td.td_link & UHCI_PTR_T) == 0) { 1882 p->td.td_link = UHCI_PTR_T; 1883 usb_syncmem(&p->dma, 1884 p->offs + offsetof(uhci_td_t, td_link), 1885 sizeof(p->td.td_link), 1886 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1887 } 1888 } 1889 delay(UHCI_QH_REMOVE_DELAY); 1890 1891 for (; std != stdend; std = p) { 1892 p = std->link.std; 1893 uhci_free_std(sc, std); 1894 } 1895 } 1896 1897 usbd_status 1898 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1899 int rd, u_int16_t flags, usb_dma_t *dma, 1900 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1901 { 1902 uhci_soft_td_t *p, *lastp; 1903 uhci_physaddr_t lastlink; 1904 int i, ntd, l, tog, maxp; 1905 u_int32_t status; 1906 int addr = upipe->pipe.device->address; 1907 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1908 1909 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1910 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1911 upipe->pipe.device->speed, flags)); 1912 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1913 if (maxp == 0) { 1914 printf("uhci_alloc_std_chain: maxp=0\n"); 1915 return (USBD_INVAL); 1916 } 1917 ntd = (len + maxp - 1) / maxp; 1918 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1919 ntd++; 1920 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1921 if (ntd == 0) { 1922 *sp = *ep = 0; 1923 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1924 return (USBD_NORMAL_COMPLETION); 1925 } 1926 tog = upipe->nexttoggle; 1927 if (ntd % 2 == 0) 1928 tog ^= 1; 1929 upipe->nexttoggle = tog ^ 1; 1930 lastp = NULL; 1931 lastlink = UHCI_PTR_T; 1932 ntd--; 1933 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1934 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1935 status |= UHCI_TD_LS; 1936 if (flags & USBD_SHORT_XFER_OK) 1937 status |= UHCI_TD_SPD; 1938 usb_syncmem(dma, 0, len, 1939 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1940 for (i = ntd; i >= 0; i--) { 1941 p = uhci_alloc_std(sc); 1942 if (p == NULL) { 1943 KASSERT(lastp != NULL); 1944 uhci_free_std_chain(sc, lastp, NULL); 1945 return (USBD_NOMEM); 1946 } 1947 p->link.std = lastp; 1948 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1949 lastp = p; 1950 lastlink = p->physaddr; 1951 p->td.td_status = htole32(status); 1952 if (i == ntd) { 1953 /* last TD */ 1954 l = len % maxp; 1955 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1956 l = maxp; 1957 *ep = p; 1958 } else 1959 l = maxp; 1960 p->td.td_token = 1961 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1962 UHCI_TD_OUT(l, endpt, addr, tog)); 1963 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1964 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 1965 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1966 tog ^= 1; 1967 } 1968 *sp = lastp; 1969 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1970 upipe->nexttoggle)); 1971 return (USBD_NORMAL_COMPLETION); 1972 } 1973 1974 void 1975 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1976 { 1977 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1978 upipe->nexttoggle = 0; 1979 } 1980 1981 void 1982 uhci_noop(usbd_pipe_handle pipe) 1983 { 1984 } 1985 1986 usbd_status 1987 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1988 { 1989 usbd_status err; 1990 1991 /* Insert last in queue. */ 1992 err = usb_insert_transfer(xfer); 1993 if (err) 1994 return (err); 1995 1996 /* 1997 * Pipe isn't running (otherwise err would be USBD_INPROG), 1998 * so start it first. 1999 */ 2000 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2001 } 2002 2003 usbd_status 2004 uhci_device_bulk_start(usbd_xfer_handle xfer) 2005 { 2006 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2007 usbd_device_handle dev = upipe->pipe.device; 2008 uhci_softc_t *sc = dev->bus->hci_private; 2009 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2010 uhci_soft_td_t *data, *dataend; 2011 uhci_soft_qh_t *sqh; 2012 usbd_status err; 2013 int len, isread, endpt; 2014 int s; 2015 2016 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2017 xfer, xfer->length, xfer->flags, ii)); 2018 2019 if (sc->sc_dying) 2020 return (USBD_IOERROR); 2021 2022 #ifdef DIAGNOSTIC 2023 if (xfer->rqflags & URQ_REQUEST) 2024 panic("uhci_device_bulk_transfer: a request"); 2025 #endif 2026 2027 len = xfer->length; 2028 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2029 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2030 sqh = upipe->u.bulk.sqh; 2031 2032 upipe->u.bulk.isread = isread; 2033 upipe->u.bulk.length = len; 2034 2035 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2036 &xfer->dmabuf, &data, &dataend); 2037 if (err) 2038 return (err); 2039 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2040 usb_syncmem(&dataend->dma, 2041 dataend->offs + offsetof(uhci_td_t, td_status), 2042 sizeof(dataend->td.td_status), 2043 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2044 2045 2046 #ifdef UHCI_DEBUG 2047 if (uhcidebug > 8) { 2048 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2049 uhci_dump_tds(data); 2050 } 2051 #endif 2052 2053 /* Set up interrupt info. */ 2054 ii->xfer = xfer; 2055 ii->stdstart = data; 2056 ii->stdend = dataend; 2057 #ifdef DIAGNOSTIC 2058 if (!ii->isdone) { 2059 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2060 } 2061 ii->isdone = 0; 2062 #endif 2063 2064 sqh->elink = data; 2065 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2066 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2067 2068 s = splusb(); 2069 uhci_add_bulk(sc, sqh); 2070 uhci_add_intr_info(sc, ii); 2071 2072 if (xfer->timeout && !sc->sc_bus.use_polling) { 2073 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2074 uhci_timeout, ii); 2075 } 2076 xfer->status = USBD_IN_PROGRESS; 2077 splx(s); 2078 2079 #ifdef UHCI_DEBUG 2080 if (uhcidebug > 10) { 2081 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2082 uhci_dump_tds(data); 2083 } 2084 #endif 2085 2086 if (sc->sc_bus.use_polling) 2087 uhci_waitintr(sc, xfer); 2088 2089 return (USBD_IN_PROGRESS); 2090 } 2091 2092 /* Abort a device bulk request. */ 2093 void 2094 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2095 { 2096 DPRINTF(("uhci_device_bulk_abort:\n")); 2097 uhci_abort_xfer(xfer, USBD_CANCELLED); 2098 } 2099 2100 /* 2101 * Abort a device request. 2102 * If this routine is called at splusb() it guarantees that the request 2103 * will be removed from the hardware scheduling and that the callback 2104 * for it will be called with USBD_CANCELLED status. 2105 * It's impossible to guarantee that the requested transfer will not 2106 * have happened since the hardware runs concurrently. 2107 * If the transaction has already happened we rely on the ordinary 2108 * interrupt processing to process it. 2109 */ 2110 void 2111 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2112 { 2113 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2114 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2115 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2116 uhci_soft_td_t *std; 2117 int s; 2118 int wake; 2119 2120 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2121 2122 if (sc->sc_dying) { 2123 /* If we're dying, just do the software part. */ 2124 s = splusb(); 2125 xfer->status = status; /* make software ignore it */ 2126 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer); 2127 usb_transfer_complete(xfer); 2128 splx(s); 2129 return; 2130 } 2131 2132 if (xfer->device->bus->intr_context || !curproc) 2133 panic("uhci_abort_xfer: not in process context"); 2134 2135 /* 2136 * If an abort is already in progress then just wait for it to 2137 * complete and return. 2138 */ 2139 if (xfer->hcflags & UXFER_ABORTING) { 2140 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2141 #ifdef DIAGNOSTIC 2142 if (status == USBD_TIMEOUT) 2143 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2144 #endif 2145 /* Override the status which might be USBD_TIMEOUT. */ 2146 xfer->status = status; 2147 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2148 xfer->hcflags |= UXFER_ABORTWAIT; 2149 while (xfer->hcflags & UXFER_ABORTING) 2150 tsleep(&xfer->hcflags, PZERO, "uhciaw", 0); 2151 return; 2152 } 2153 xfer->hcflags |= UXFER_ABORTING; 2154 2155 /* 2156 * Step 1: Make interrupt routine and hardware ignore xfer. 2157 */ 2158 s = splusb(); 2159 xfer->status = status; /* make software ignore it */ 2160 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii); 2161 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2162 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2163 usb_syncmem(&std->dma, 2164 std->offs + offsetof(uhci_td_t, td_status), 2165 sizeof(std->td.td_status), 2166 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2167 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2168 usb_syncmem(&std->dma, 2169 std->offs + offsetof(uhci_td_t, td_status), 2170 sizeof(std->td.td_status), 2171 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2172 } 2173 splx(s); 2174 2175 /* 2176 * Step 2: Wait until we know hardware has finished any possible 2177 * use of the xfer. Also make sure the soft interrupt routine 2178 * has run. 2179 */ 2180 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2181 s = splusb(); 2182 #ifdef USB_USE_SOFTINTR 2183 sc->sc_softwake = 1; 2184 #endif /* USB_USE_SOFTINTR */ 2185 usb_schedsoftintr(&sc->sc_bus); 2186 #ifdef USB_USE_SOFTINTR 2187 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2188 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 2189 #endif /* USB_USE_SOFTINTR */ 2190 splx(s); 2191 2192 /* 2193 * Step 3: Execute callback. 2194 */ 2195 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2196 s = splusb(); 2197 #ifdef DIAGNOSTIC 2198 ii->isdone = 1; 2199 #endif 2200 wake = xfer->hcflags & UXFER_ABORTWAIT; 2201 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2202 usb_transfer_complete(xfer); 2203 if (wake) 2204 wakeup(&xfer->hcflags); 2205 splx(s); 2206 } 2207 2208 /* Close a device bulk pipe. */ 2209 void 2210 uhci_device_bulk_close(usbd_pipe_handle pipe) 2211 { 2212 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2213 usbd_device_handle dev = upipe->pipe.device; 2214 uhci_softc_t *sc = dev->bus->hci_private; 2215 2216 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2217 } 2218 2219 usbd_status 2220 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2221 { 2222 usbd_status err; 2223 2224 /* Insert last in queue. */ 2225 err = usb_insert_transfer(xfer); 2226 if (err) 2227 return (err); 2228 2229 /* 2230 * Pipe isn't running (otherwise err would be USBD_INPROG), 2231 * so start it first. 2232 */ 2233 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2234 } 2235 2236 usbd_status 2237 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2238 { 2239 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2240 usbd_status err; 2241 2242 if (sc->sc_dying) 2243 return (USBD_IOERROR); 2244 2245 #ifdef DIAGNOSTIC 2246 if (!(xfer->rqflags & URQ_REQUEST)) 2247 panic("uhci_device_ctrl_transfer: not a request"); 2248 #endif 2249 2250 err = uhci_device_request(xfer); 2251 if (err) 2252 return (err); 2253 2254 if (sc->sc_bus.use_polling) 2255 uhci_waitintr(sc, xfer); 2256 return (USBD_IN_PROGRESS); 2257 } 2258 2259 usbd_status 2260 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2261 { 2262 usbd_status err; 2263 2264 /* Insert last in queue. */ 2265 err = usb_insert_transfer(xfer); 2266 if (err) 2267 return (err); 2268 2269 /* 2270 * Pipe isn't running (otherwise err would be USBD_INPROG), 2271 * so start it first. 2272 */ 2273 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2274 } 2275 2276 usbd_status 2277 uhci_device_intr_start(usbd_xfer_handle xfer) 2278 { 2279 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2280 usbd_device_handle dev = upipe->pipe.device; 2281 uhci_softc_t *sc = dev->bus->hci_private; 2282 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2283 uhci_soft_td_t *data, *dataend; 2284 uhci_soft_qh_t *sqh; 2285 usbd_status err; 2286 int isread, endpt; 2287 int i, s; 2288 2289 if (sc->sc_dying) 2290 return (USBD_IOERROR); 2291 2292 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2293 xfer, xfer->length, xfer->flags)); 2294 2295 #ifdef DIAGNOSTIC 2296 if (xfer->rqflags & URQ_REQUEST) 2297 panic("uhci_device_intr_transfer: a request"); 2298 #endif 2299 2300 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2301 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2302 2303 upipe->u.intr.isread = isread; 2304 2305 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2306 xfer->flags, &xfer->dmabuf, &data, 2307 &dataend); 2308 if (err) 2309 return (err); 2310 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2311 usb_syncmem(&dataend->dma, 2312 dataend->offs + offsetof(uhci_td_t, td_status), 2313 sizeof(dataend->td.td_status), 2314 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2315 2316 #ifdef UHCI_DEBUG 2317 if (uhcidebug > 10) { 2318 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2319 uhci_dump_tds(data); 2320 uhci_dump_qh(upipe->u.intr.qhs[0]); 2321 } 2322 #endif 2323 2324 s = splusb(); 2325 /* Set up interrupt info. */ 2326 ii->xfer = xfer; 2327 ii->stdstart = data; 2328 ii->stdend = dataend; 2329 #ifdef DIAGNOSTIC 2330 if (!ii->isdone) { 2331 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2332 } 2333 ii->isdone = 0; 2334 #endif 2335 2336 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2337 upipe->u.intr.qhs[0])); 2338 for (i = 0; i < upipe->u.intr.npoll; i++) { 2339 sqh = upipe->u.intr.qhs[i]; 2340 sqh->elink = data; 2341 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2342 usb_syncmem(&sqh->dma, 2343 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2344 sizeof(sqh->qh.qh_elink), 2345 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2346 } 2347 uhci_add_intr_info(sc, ii); 2348 xfer->status = USBD_IN_PROGRESS; 2349 splx(s); 2350 2351 #ifdef UHCI_DEBUG 2352 if (uhcidebug > 10) { 2353 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2354 uhci_dump_tds(data); 2355 uhci_dump_qh(upipe->u.intr.qhs[0]); 2356 } 2357 #endif 2358 2359 return (USBD_IN_PROGRESS); 2360 } 2361 2362 /* Abort a device control request. */ 2363 void 2364 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2365 { 2366 DPRINTF(("uhci_device_ctrl_abort:\n")); 2367 uhci_abort_xfer(xfer, USBD_CANCELLED); 2368 } 2369 2370 /* Close a device control pipe. */ 2371 void 2372 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2373 { 2374 } 2375 2376 /* Abort a device interrupt request. */ 2377 void 2378 uhci_device_intr_abort(usbd_xfer_handle xfer) 2379 { 2380 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2381 if (xfer->pipe->intrxfer == xfer) { 2382 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2383 xfer->pipe->intrxfer = NULL; 2384 } 2385 uhci_abort_xfer(xfer, USBD_CANCELLED); 2386 } 2387 2388 /* Close a device interrupt pipe. */ 2389 void 2390 uhci_device_intr_close(usbd_pipe_handle pipe) 2391 { 2392 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2393 uhci_softc_t *sc = pipe->device->bus->hci_private; 2394 int i, npoll; 2395 int s; 2396 2397 /* Unlink descriptors from controller data structures. */ 2398 npoll = upipe->u.intr.npoll; 2399 s = splusb(); 2400 for (i = 0; i < npoll; i++) 2401 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2402 splx(s); 2403 2404 /* 2405 * We now have to wait for any activity on the physical 2406 * descriptors to stop. 2407 */ 2408 usb_delay_ms(&sc->sc_bus, 2); 2409 2410 for(i = 0; i < npoll; i++) 2411 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2412 free(upipe->u.intr.qhs, M_USBHC); 2413 2414 /* XXX free other resources */ 2415 } 2416 2417 usbd_status 2418 uhci_device_request(usbd_xfer_handle xfer) 2419 { 2420 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2421 usb_device_request_t *req = &xfer->request; 2422 usbd_device_handle dev = upipe->pipe.device; 2423 uhci_softc_t *sc = dev->bus->hci_private; 2424 int addr = dev->address; 2425 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2426 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2427 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2428 uhci_soft_qh_t *sqh; 2429 int len; 2430 u_int32_t ls; 2431 usbd_status err; 2432 int isread; 2433 int s; 2434 2435 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2436 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2437 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2438 UGETW(req->wIndex), UGETW(req->wLength), 2439 addr, endpt)); 2440 2441 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2442 isread = req->bmRequestType & UT_READ; 2443 len = UGETW(req->wLength); 2444 2445 setup = upipe->u.ctl.setup; 2446 stat = upipe->u.ctl.stat; 2447 sqh = upipe->u.ctl.sqh; 2448 2449 /* Set up data transaction */ 2450 if (len != 0) { 2451 upipe->nexttoggle = 1; 2452 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2453 &xfer->dmabuf, &data, &dataend); 2454 if (err) 2455 return (err); 2456 next = data; 2457 dataend->link.std = stat; 2458 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2459 usb_syncmem(&dataend->dma, 2460 dataend->offs + offsetof(uhci_td_t, td_link), 2461 sizeof(dataend->td.td_link), 2462 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2463 } else { 2464 next = stat; 2465 } 2466 upipe->u.ctl.length = len; 2467 2468 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2469 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2470 2471 setup->link.std = next; 2472 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2473 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2474 UHCI_TD_ACTIVE); 2475 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2476 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2477 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2478 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2479 2480 stat->link.std = NULL; 2481 stat->td.td_link = htole32(UHCI_PTR_T); 2482 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2483 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2484 stat->td.td_token = 2485 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2486 UHCI_TD_IN (0, endpt, addr, 1)); 2487 stat->td.td_buffer = htole32(0); 2488 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2489 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2490 2491 #ifdef UHCI_DEBUG 2492 if (uhcidebug > 10) { 2493 DPRINTF(("uhci_device_request: before transfer\n")); 2494 uhci_dump_tds(setup); 2495 } 2496 #endif 2497 2498 /* Set up interrupt info. */ 2499 ii->xfer = xfer; 2500 ii->stdstart = setup; 2501 ii->stdend = stat; 2502 #ifdef DIAGNOSTIC 2503 if (!ii->isdone) { 2504 printf("uhci_device_request: not done, ii=%p\n", ii); 2505 } 2506 ii->isdone = 0; 2507 #endif 2508 2509 sqh->elink = setup; 2510 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2511 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2512 2513 s = splusb(); 2514 if (dev->speed == USB_SPEED_LOW) 2515 uhci_add_ls_ctrl(sc, sqh); 2516 else 2517 uhci_add_hs_ctrl(sc, sqh); 2518 uhci_add_intr_info(sc, ii); 2519 #ifdef UHCI_DEBUG 2520 if (uhcidebug > 12) { 2521 uhci_soft_td_t *std; 2522 uhci_soft_qh_t *xqh; 2523 uhci_soft_qh_t *sxqh; 2524 int maxqh = 0; 2525 uhci_physaddr_t link; 2526 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2527 for (std = sc->sc_vframes[0].htd, link = 0; 2528 (link & UHCI_PTR_QH) == 0; 2529 std = std->link.std) { 2530 link = le32toh(std->td.td_link); 2531 uhci_dump_td(std); 2532 } 2533 sxqh = (uhci_soft_qh_t *)std; 2534 uhci_dump_qh(sxqh); 2535 for (xqh = sxqh; 2536 xqh != NULL; 2537 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2538 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2539 uhci_dump_qh(xqh); 2540 } 2541 DPRINTF(("Enqueued QH:\n")); 2542 uhci_dump_qh(sqh); 2543 uhci_dump_tds(sqh->elink); 2544 } 2545 #endif 2546 if (xfer->timeout && !sc->sc_bus.use_polling) { 2547 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2548 uhci_timeout, ii); 2549 } 2550 xfer->status = USBD_IN_PROGRESS; 2551 splx(s); 2552 2553 return (USBD_NORMAL_COMPLETION); 2554 } 2555 2556 usbd_status 2557 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2558 { 2559 usbd_status err; 2560 2561 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2562 2563 /* Put it on our queue, */ 2564 err = usb_insert_transfer(xfer); 2565 2566 /* bail out on error, */ 2567 if (err && err != USBD_IN_PROGRESS) 2568 return (err); 2569 2570 /* XXX should check inuse here */ 2571 2572 /* insert into schedule, */ 2573 uhci_device_isoc_enter(xfer); 2574 2575 /* and start if the pipe wasn't running */ 2576 if (!err) 2577 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2578 2579 return (err); 2580 } 2581 2582 void 2583 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2584 { 2585 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2586 usbd_device_handle dev = upipe->pipe.device; 2587 uhci_softc_t *sc = dev->bus->hci_private; 2588 struct iso *iso = &upipe->u.iso; 2589 uhci_soft_td_t *std; 2590 u_int32_t buf, len, status, offs; 2591 int s, i, next, nframes; 2592 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2593 2594 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2595 "nframes=%d\n", 2596 iso->inuse, iso->next, xfer, xfer->nframes)); 2597 2598 if (sc->sc_dying) 2599 return; 2600 2601 if (xfer->status == USBD_IN_PROGRESS) { 2602 /* This request has already been entered into the frame list */ 2603 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2604 /* XXX */ 2605 } 2606 2607 #ifdef DIAGNOSTIC 2608 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2609 printf("uhci_device_isoc_enter: overflow!\n"); 2610 #endif 2611 2612 next = iso->next; 2613 if (next == -1) { 2614 /* Not in use yet, schedule it a few frames ahead. */ 2615 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2616 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2617 } 2618 2619 xfer->status = USBD_IN_PROGRESS; 2620 UXFER(xfer)->curframe = next; 2621 2622 buf = DMAADDR(&xfer->dmabuf, 0); 2623 offs = 0; 2624 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2625 UHCI_TD_ACTIVE | 2626 UHCI_TD_IOS); 2627 nframes = xfer->nframes; 2628 s = splusb(); 2629 for (i = 0; i < nframes; i++) { 2630 std = iso->stds[next]; 2631 if (++next >= UHCI_VFRAMELIST_COUNT) 2632 next = 0; 2633 len = xfer->frlengths[i]; 2634 std->td.td_buffer = htole32(buf); 2635 usb_syncmem(&xfer->dmabuf, offs, len, 2636 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2637 if (i == nframes - 1) 2638 status |= UHCI_TD_IOC; 2639 std->td.td_status = htole32(status); 2640 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2641 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2642 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2643 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2644 #ifdef UHCI_DEBUG 2645 if (uhcidebug > 5) { 2646 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2647 uhci_dump_td(std); 2648 } 2649 #endif 2650 buf += len; 2651 offs += len; 2652 } 2653 iso->next = next; 2654 iso->inuse += xfer->nframes; 2655 2656 splx(s); 2657 } 2658 2659 usbd_status 2660 uhci_device_isoc_start(usbd_xfer_handle xfer) 2661 { 2662 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2663 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2664 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2665 uhci_soft_td_t *end; 2666 int s, i; 2667 2668 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2669 2670 if (sc->sc_dying) 2671 return (USBD_IOERROR); 2672 2673 #ifdef DIAGNOSTIC 2674 if (xfer->status != USBD_IN_PROGRESS) 2675 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2676 #endif 2677 2678 /* Find the last TD */ 2679 i = UXFER(xfer)->curframe + xfer->nframes; 2680 if (i >= UHCI_VFRAMELIST_COUNT) 2681 i -= UHCI_VFRAMELIST_COUNT; 2682 end = upipe->u.iso.stds[i]; 2683 2684 #ifdef DIAGNOSTIC 2685 if (end == NULL) { 2686 printf("uhci_device_isoc_start: end == NULL\n"); 2687 return (USBD_INVAL); 2688 } 2689 #endif 2690 2691 s = splusb(); 2692 2693 /* Set up interrupt info. */ 2694 ii->xfer = xfer; 2695 ii->stdstart = end; 2696 ii->stdend = end; 2697 #ifdef DIAGNOSTIC 2698 if (!ii->isdone) 2699 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2700 ii->isdone = 0; 2701 #endif 2702 uhci_add_intr_info(sc, ii); 2703 2704 splx(s); 2705 2706 return (USBD_IN_PROGRESS); 2707 } 2708 2709 void 2710 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2711 { 2712 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2713 uhci_soft_td_t **stds = upipe->u.iso.stds; 2714 uhci_soft_td_t *std; 2715 int i, n, s, nframes, maxlen, len; 2716 2717 s = splusb(); 2718 2719 /* Transfer is already done. */ 2720 if (xfer->status != USBD_NOT_STARTED && 2721 xfer->status != USBD_IN_PROGRESS) { 2722 splx(s); 2723 return; 2724 } 2725 2726 /* Give xfer the requested abort code. */ 2727 xfer->status = USBD_CANCELLED; 2728 2729 /* make hardware ignore it, */ 2730 nframes = xfer->nframes; 2731 n = UXFER(xfer)->curframe; 2732 maxlen = 0; 2733 for (i = 0; i < nframes; i++) { 2734 std = stds[n]; 2735 usb_syncmem(&std->dma, 2736 std->offs + offsetof(uhci_td_t, td_status), 2737 sizeof(std->td.td_status), 2738 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2739 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2740 usb_syncmem(&std->dma, 2741 std->offs + offsetof(uhci_td_t, td_status), 2742 sizeof(std->td.td_status), 2743 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2744 usb_syncmem(&std->dma, 2745 std->offs + offsetof(uhci_td_t, td_token), 2746 sizeof(std->td.td_token), 2747 BUS_DMASYNC_POSTWRITE); 2748 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2749 if (len > maxlen) 2750 maxlen = len; 2751 if (++n >= UHCI_VFRAMELIST_COUNT) 2752 n = 0; 2753 } 2754 2755 /* and wait until we are sure the hardware has finished. */ 2756 delay(maxlen); 2757 2758 #ifdef DIAGNOSTIC 2759 UXFER(xfer)->iinfo.isdone = 1; 2760 #endif 2761 /* Run callback and remove from interrupt list. */ 2762 usb_transfer_complete(xfer); 2763 2764 splx(s); 2765 } 2766 2767 void 2768 uhci_device_isoc_close(usbd_pipe_handle pipe) 2769 { 2770 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2771 usbd_device_handle dev = upipe->pipe.device; 2772 uhci_softc_t *sc = dev->bus->hci_private; 2773 uhci_soft_td_t *std, *vstd; 2774 struct iso *iso; 2775 int i, s; 2776 2777 /* 2778 * Make sure all TDs are marked as inactive. 2779 * Wait for completion. 2780 * Unschedule. 2781 * Deallocate. 2782 */ 2783 iso = &upipe->u.iso; 2784 2785 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2786 std = iso->stds[i]; 2787 usb_syncmem(&std->dma, 2788 std->offs + offsetof(uhci_td_t, td_status), 2789 sizeof(std->td.td_status), 2790 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2791 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2792 usb_syncmem(&std->dma, 2793 std->offs + offsetof(uhci_td_t, td_status), 2794 sizeof(std->td.td_status), 2795 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2796 } 2797 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2798 2799 s = splusb(); 2800 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2801 std = iso->stds[i]; 2802 for (vstd = sc->sc_vframes[i].htd; 2803 vstd != NULL && vstd->link.std != std; 2804 vstd = vstd->link.std) 2805 ; 2806 if (vstd == NULL) { 2807 /*panic*/ 2808 printf("uhci_device_isoc_close: %p not found\n", std); 2809 splx(s); 2810 return; 2811 } 2812 vstd->link = std->link; 2813 usb_syncmem(&std->dma, 2814 std->offs + offsetof(uhci_td_t, td_link), 2815 sizeof(std->td.td_link), 2816 BUS_DMASYNC_POSTWRITE); 2817 vstd->td.td_link = std->td.td_link; 2818 usb_syncmem(&vstd->dma, 2819 vstd->offs + offsetof(uhci_td_t, td_link), 2820 sizeof(vstd->td.td_link), 2821 BUS_DMASYNC_PREWRITE); 2822 uhci_free_std(sc, std); 2823 } 2824 splx(s); 2825 2826 free(iso->stds, M_USBHC); 2827 } 2828 2829 usbd_status 2830 uhci_setup_isoc(usbd_pipe_handle pipe) 2831 { 2832 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2833 usbd_device_handle dev = upipe->pipe.device; 2834 uhci_softc_t *sc = dev->bus->hci_private; 2835 int addr = upipe->pipe.device->address; 2836 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2837 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2838 uhci_soft_td_t *std, *vstd; 2839 u_int32_t token; 2840 struct iso *iso; 2841 int i, s; 2842 2843 iso = &upipe->u.iso; 2844 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2845 M_USBHC, M_WAITOK); 2846 2847 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2848 UHCI_TD_OUT(0, endpt, addr, 0); 2849 2850 /* Allocate the TDs and mark as inactive; */ 2851 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2852 std = uhci_alloc_std(sc); 2853 if (std == 0) 2854 goto bad; 2855 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2856 std->td.td_token = htole32(token); 2857 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2858 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2859 iso->stds[i] = std; 2860 } 2861 2862 /* Insert TDs into schedule. */ 2863 s = splusb(); 2864 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2865 std = iso->stds[i]; 2866 vstd = sc->sc_vframes[i].htd; 2867 usb_syncmem(&vstd->dma, 2868 vstd->offs + offsetof(uhci_td_t, td_link), 2869 sizeof(vstd->td.td_link), 2870 BUS_DMASYNC_POSTWRITE); 2871 std->link = vstd->link; 2872 std->td.td_link = vstd->td.td_link; 2873 usb_syncmem(&std->dma, 2874 std->offs + offsetof(uhci_td_t, td_link), 2875 sizeof(std->td.td_link), 2876 BUS_DMASYNC_PREWRITE); 2877 vstd->link.std = std; 2878 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2879 usb_syncmem(&vstd->dma, 2880 vstd->offs + offsetof(uhci_td_t, td_link), 2881 sizeof(vstd->td.td_link), 2882 BUS_DMASYNC_PREWRITE); 2883 } 2884 splx(s); 2885 2886 iso->next = -1; 2887 iso->inuse = 0; 2888 2889 return (USBD_NORMAL_COMPLETION); 2890 2891 bad: 2892 while (--i >= 0) 2893 uhci_free_std(sc, iso->stds[i]); 2894 free(iso->stds, M_USBHC); 2895 return (USBD_NOMEM); 2896 } 2897 2898 void 2899 uhci_device_isoc_done(usbd_xfer_handle xfer) 2900 { 2901 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2902 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2903 int i, offs; 2904 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2905 2906 2907 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2908 xfer->actlen, xfer->busy_free)); 2909 2910 if (ii->xfer != xfer) 2911 /* Not on interrupt list, ignore it. */ 2912 return; 2913 2914 if (!uhci_active_intr_info(ii)) 2915 return; 2916 2917 #ifdef DIAGNOSTIC 2918 if (ii->stdend == NULL) { 2919 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2920 #ifdef UHCI_DEBUG 2921 uhci_dump_ii(ii); 2922 #endif 2923 return; 2924 } 2925 #endif 2926 2927 /* Turn off the interrupt since it is active even if the TD is not. */ 2928 usb_syncmem(&ii->stdend->dma, 2929 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2930 sizeof(ii->stdend->td.td_status), 2931 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2932 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2933 usb_syncmem(&ii->stdend->dma, 2934 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2935 sizeof(ii->stdend->td.td_status), 2936 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2937 2938 uhci_del_intr_info(ii); /* remove from active list */ 2939 2940 offs = 0; 2941 for (i = 0; i < xfer->nframes; i++) { 2942 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i], 2943 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2944 offs += xfer->frlengths[i]; 2945 } 2946 } 2947 2948 void 2949 uhci_device_intr_done(usbd_xfer_handle xfer) 2950 { 2951 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2952 uhci_softc_t *sc = ii->sc; 2953 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2954 uhci_soft_qh_t *sqh; 2955 int i, npoll, isread; 2956 2957 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2958 2959 npoll = upipe->u.intr.npoll; 2960 for(i = 0; i < npoll; i++) { 2961 sqh = upipe->u.intr.qhs[i]; 2962 sqh->elink = NULL; 2963 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2964 usb_syncmem(&sqh->dma, 2965 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2966 sizeof(sqh->qh.qh_elink), 2967 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2968 } 2969 uhci_free_std_chain(sc, ii->stdstart, NULL); 2970 2971 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2972 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 2973 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2974 2975 /* XXX Wasteful. */ 2976 if (xfer->pipe->repeat) { 2977 uhci_soft_td_t *data, *dataend; 2978 2979 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 2980 2981 /* This alloc cannot fail since we freed the chain above. */ 2982 uhci_alloc_std_chain(upipe, sc, xfer->length, 2983 upipe->u.intr.isread, xfer->flags, 2984 &xfer->dmabuf, &data, &dataend); 2985 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2986 usb_syncmem(&dataend->dma, 2987 dataend->offs + offsetof(uhci_td_t, td_status), 2988 sizeof(dataend->td.td_status), 2989 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2990 2991 #ifdef UHCI_DEBUG 2992 if (uhcidebug > 10) { 2993 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2994 uhci_dump_tds(data); 2995 uhci_dump_qh(upipe->u.intr.qhs[0]); 2996 } 2997 #endif 2998 2999 ii->stdstart = data; 3000 ii->stdend = dataend; 3001 #ifdef DIAGNOSTIC 3002 if (!ii->isdone) { 3003 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3004 } 3005 ii->isdone = 0; 3006 #endif 3007 for (i = 0; i < npoll; i++) { 3008 sqh = upipe->u.intr.qhs[i]; 3009 sqh->elink = data; 3010 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3011 usb_syncmem(&sqh->dma, 3012 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3013 sizeof(sqh->qh.qh_elink), 3014 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3015 } 3016 xfer->status = USBD_IN_PROGRESS; 3017 /* The ii is already on the examined list, just leave it. */ 3018 } else { 3019 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3020 if (uhci_active_intr_info(ii)) 3021 uhci_del_intr_info(ii); 3022 } 3023 } 3024 3025 /* Deallocate request data structures */ 3026 void 3027 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3028 { 3029 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3030 uhci_softc_t *sc = ii->sc; 3031 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3032 int len = UGETW(xfer->request.wLength); 3033 int isread = (xfer->request.bmRequestType & UT_READ); 3034 3035 #ifdef DIAGNOSTIC 3036 if (!(xfer->rqflags & URQ_REQUEST)) 3037 panic("uhci_device_ctrl_done: not a request"); 3038 #endif 3039 3040 if (!uhci_active_intr_info(ii)) 3041 return; 3042 3043 uhci_del_intr_info(ii); /* remove from active list */ 3044 3045 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3046 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3047 else 3048 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3049 3050 if (upipe->u.ctl.length != 0) 3051 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3052 3053 if (len) { 3054 usb_syncmem(&xfer->dmabuf, 0, len, 3055 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3056 } 3057 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3058 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3059 3060 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3061 } 3062 3063 /* Deallocate request data structures */ 3064 void 3065 uhci_device_bulk_done(usbd_xfer_handle xfer) 3066 { 3067 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3068 uhci_softc_t *sc = ii->sc; 3069 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3070 3071 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3072 xfer, ii, sc, upipe)); 3073 3074 if (!uhci_active_intr_info(ii)) 3075 return; 3076 3077 uhci_del_intr_info(ii); /* remove from active list */ 3078 3079 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3080 3081 uhci_free_std_chain(sc, ii->stdstart, NULL); 3082 3083 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3084 } 3085 3086 /* Add interrupt QH, called with vflock. */ 3087 void 3088 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3089 { 3090 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3091 uhci_soft_qh_t *eqh; 3092 3093 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3094 3095 eqh = vf->eqh; 3096 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3097 sizeof(eqh->qh.qh_hlink), 3098 BUS_DMASYNC_POSTWRITE); 3099 sqh->hlink = eqh->hlink; 3100 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3101 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3102 sizeof(sqh->qh.qh_hlink), 3103 BUS_DMASYNC_PREWRITE); 3104 eqh->hlink = sqh; 3105 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3106 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3107 sizeof(eqh->qh.qh_hlink), 3108 BUS_DMASYNC_PREWRITE); 3109 vf->eqh = sqh; 3110 vf->bandwidth++; 3111 } 3112 3113 /* Remove interrupt QH. */ 3114 void 3115 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3116 { 3117 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3118 uhci_soft_qh_t *pqh; 3119 3120 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3121 3122 /* See comment in uhci_remove_ctrl() */ 3123 3124 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3125 sizeof(sqh->qh.qh_elink), 3126 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3127 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3128 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3129 usb_syncmem(&sqh->dma, 3130 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3131 sizeof(sqh->qh.qh_elink), 3132 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3133 delay(UHCI_QH_REMOVE_DELAY); 3134 } 3135 3136 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3137 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3138 sizeof(sqh->qh.qh_hlink), 3139 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3140 pqh->hlink = sqh->hlink; 3141 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3142 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3143 sizeof(pqh->qh.qh_hlink), 3144 BUS_DMASYNC_PREWRITE); 3145 delay(UHCI_QH_REMOVE_DELAY); 3146 if (vf->eqh == sqh) 3147 vf->eqh = pqh; 3148 vf->bandwidth--; 3149 } 3150 3151 usbd_status 3152 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3153 { 3154 uhci_soft_qh_t *sqh; 3155 int i, npoll, s; 3156 u_int bestbw, bw, bestoffs, offs; 3157 3158 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3159 if (ival == 0) { 3160 printf("uhci_device_setintr: 0 interval\n"); 3161 return (USBD_INVAL); 3162 } 3163 3164 if (ival > UHCI_VFRAMELIST_COUNT) 3165 ival = UHCI_VFRAMELIST_COUNT; 3166 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3167 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3168 3169 upipe->u.intr.npoll = npoll; 3170 upipe->u.intr.qhs = 3171 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 3172 3173 /* 3174 * Figure out which offset in the schedule that has most 3175 * bandwidth left over. 3176 */ 3177 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3178 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3179 for (bw = i = 0; i < npoll; i++) 3180 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3181 if (bw < bestbw) { 3182 bestbw = bw; 3183 bestoffs = offs; 3184 } 3185 } 3186 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3187 3188 for(i = 0; i < npoll; i++) { 3189 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3190 sqh->elink = NULL; 3191 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3192 usb_syncmem(&sqh->dma, 3193 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3194 sizeof(sqh->qh.qh_elink), 3195 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3196 sqh->pos = MOD(i * ival + bestoffs); 3197 } 3198 #undef MOD 3199 3200 s = splusb(); 3201 /* Enter QHs into the controller data structures. */ 3202 for(i = 0; i < npoll; i++) 3203 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3204 splx(s); 3205 3206 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3207 return (USBD_NORMAL_COMPLETION); 3208 } 3209 3210 /* Open a new pipe. */ 3211 usbd_status 3212 uhci_open(usbd_pipe_handle pipe) 3213 { 3214 uhci_softc_t *sc = pipe->device->bus->hci_private; 3215 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3216 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3217 usbd_status err; 3218 int ival; 3219 3220 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3221 pipe, pipe->device->address, 3222 ed->bEndpointAddress, sc->sc_addr)); 3223 3224 upipe->aborting = 0; 3225 upipe->nexttoggle = 0; 3226 3227 if (pipe->device->address == sc->sc_addr) { 3228 switch (ed->bEndpointAddress) { 3229 case USB_CONTROL_ENDPOINT: 3230 pipe->methods = &uhci_root_ctrl_methods; 3231 break; 3232 case UE_DIR_IN | UHCI_INTR_ENDPT: 3233 pipe->methods = &uhci_root_intr_methods; 3234 break; 3235 default: 3236 return (USBD_INVAL); 3237 } 3238 } else { 3239 switch (ed->bmAttributes & UE_XFERTYPE) { 3240 case UE_CONTROL: 3241 pipe->methods = &uhci_device_ctrl_methods; 3242 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3243 if (upipe->u.ctl.sqh == NULL) 3244 goto bad; 3245 upipe->u.ctl.setup = uhci_alloc_std(sc); 3246 if (upipe->u.ctl.setup == NULL) { 3247 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3248 goto bad; 3249 } 3250 upipe->u.ctl.stat = uhci_alloc_std(sc); 3251 if (upipe->u.ctl.stat == NULL) { 3252 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3253 uhci_free_std(sc, upipe->u.ctl.setup); 3254 goto bad; 3255 } 3256 err = usb_allocmem(&sc->sc_bus, 3257 sizeof(usb_device_request_t), 3258 0, &upipe->u.ctl.reqdma); 3259 if (err) { 3260 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3261 uhci_free_std(sc, upipe->u.ctl.setup); 3262 uhci_free_std(sc, upipe->u.ctl.stat); 3263 goto bad; 3264 } 3265 break; 3266 case UE_INTERRUPT: 3267 pipe->methods = &uhci_device_intr_methods; 3268 ival = pipe->interval; 3269 if (ival == USBD_DEFAULT_INTERVAL) 3270 ival = ed->bInterval; 3271 return (uhci_device_setintr(sc, upipe, ival)); 3272 case UE_ISOCHRONOUS: 3273 pipe->methods = &uhci_device_isoc_methods; 3274 return (uhci_setup_isoc(pipe)); 3275 case UE_BULK: 3276 pipe->methods = &uhci_device_bulk_methods; 3277 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3278 if (upipe->u.bulk.sqh == NULL) 3279 goto bad; 3280 break; 3281 } 3282 } 3283 return (USBD_NORMAL_COMPLETION); 3284 3285 bad: 3286 return (USBD_NOMEM); 3287 } 3288 3289 /* 3290 * Data structures and routines to emulate the root hub. 3291 */ 3292 usb_device_descriptor_t uhci_devd = { 3293 USB_DEVICE_DESCRIPTOR_SIZE, 3294 UDESC_DEVICE, /* type */ 3295 {0x00, 0x01}, /* USB version */ 3296 UDCLASS_HUB, /* class */ 3297 UDSUBCLASS_HUB, /* subclass */ 3298 UDPROTO_FSHUB, /* protocol */ 3299 64, /* max packet */ 3300 {0},{0},{0x00,0x01}, /* device id */ 3301 1,2,0, /* string indicies */ 3302 1 /* # of configurations */ 3303 }; 3304 3305 const usb_config_descriptor_t uhci_confd = { 3306 USB_CONFIG_DESCRIPTOR_SIZE, 3307 UDESC_CONFIG, 3308 {USB_CONFIG_DESCRIPTOR_SIZE + 3309 USB_INTERFACE_DESCRIPTOR_SIZE + 3310 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3311 1, 3312 1, 3313 0, 3314 UC_ATTR_MBO | UC_SELF_POWERED, 3315 0 /* max power */ 3316 }; 3317 3318 const usb_interface_descriptor_t uhci_ifcd = { 3319 USB_INTERFACE_DESCRIPTOR_SIZE, 3320 UDESC_INTERFACE, 3321 0, 3322 0, 3323 1, 3324 UICLASS_HUB, 3325 UISUBCLASS_HUB, 3326 UIPROTO_FSHUB, 3327 0 3328 }; 3329 3330 const usb_endpoint_descriptor_t uhci_endpd = { 3331 USB_ENDPOINT_DESCRIPTOR_SIZE, 3332 UDESC_ENDPOINT, 3333 UE_DIR_IN | UHCI_INTR_ENDPT, 3334 UE_INTERRUPT, 3335 {8}, 3336 255 3337 }; 3338 3339 const usb_hub_descriptor_t uhci_hubd_piix = { 3340 USB_HUB_DESCRIPTOR_SIZE, 3341 UDESC_HUB, 3342 2, 3343 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3344 50, /* power on to power good */ 3345 0, 3346 { 0x00 }, /* both ports are removable */ 3347 { 0 }, 3348 }; 3349 3350 /* 3351 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3352 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3353 * should not be used by the USB subsystem. As we cannot issue a 3354 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3355 * will be enabled as part of the reset. 3356 * 3357 * On the VT83C572, the port cannot be successfully enabled until the 3358 * outstanding "port enable change" and "connection status change" 3359 * events have been reset. 3360 */ 3361 Static usbd_status 3362 uhci_portreset(uhci_softc_t *sc, int index) 3363 { 3364 int lim, port, x; 3365 3366 if (index == 1) 3367 port = UHCI_PORTSC1; 3368 else if (index == 2) 3369 port = UHCI_PORTSC2; 3370 else 3371 return (USBD_IOERROR); 3372 3373 x = URWMASK(UREAD2(sc, port)); 3374 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3375 3376 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3377 3378 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3379 index, UREAD2(sc, port))); 3380 3381 x = URWMASK(UREAD2(sc, port)); 3382 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3383 3384 delay(100); 3385 3386 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3387 index, UREAD2(sc, port))); 3388 3389 x = URWMASK(UREAD2(sc, port)); 3390 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3391 3392 for (lim = 10; --lim > 0;) { 3393 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3394 3395 x = UREAD2(sc, port); 3396 3397 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3398 index, lim, x)); 3399 3400 if (!(x & UHCI_PORTSC_CCS)) { 3401 /* 3402 * No device is connected (or was disconnected 3403 * during reset). Consider the port reset. 3404 * The delay must be long enough to ensure on 3405 * the initial iteration that the device 3406 * connection will have been registered. 50ms 3407 * appears to be sufficient, but 20ms is not. 3408 */ 3409 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3410 index, lim)); 3411 break; 3412 } 3413 3414 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3415 /* 3416 * Port enabled changed and/or connection 3417 * status changed were set. Reset either or 3418 * both raised flags (by writing a 1 to that 3419 * bit), and wait again for state to settle. 3420 */ 3421 UWRITE2(sc, port, URWMASK(x) | 3422 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3423 continue; 3424 } 3425 3426 if (x & UHCI_PORTSC_PE) 3427 /* Port is enabled */ 3428 break; 3429 3430 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3431 } 3432 3433 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3434 index, UREAD2(sc, port))); 3435 3436 if (lim <= 0) { 3437 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3438 return (USBD_TIMEOUT); 3439 } 3440 3441 sc->sc_isreset = 1; 3442 return (USBD_NORMAL_COMPLETION); 3443 } 3444 3445 /* 3446 * Simulate a hardware hub by handling all the necessary requests. 3447 */ 3448 usbd_status 3449 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3450 { 3451 usbd_status err; 3452 3453 /* Insert last in queue. */ 3454 err = usb_insert_transfer(xfer); 3455 if (err) 3456 return (err); 3457 3458 /* 3459 * Pipe isn't running (otherwise err would be USBD_INPROG), 3460 * so start it first. 3461 */ 3462 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3463 } 3464 3465 usbd_status 3466 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3467 { 3468 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3469 usb_device_request_t *req; 3470 void *buf = NULL; 3471 int port, x; 3472 int s, len, value, index, status, change, l, totlen = 0; 3473 usb_port_status_t ps; 3474 usbd_status err; 3475 3476 if (sc->sc_dying) 3477 return (USBD_IOERROR); 3478 3479 #ifdef DIAGNOSTIC 3480 if (!(xfer->rqflags & URQ_REQUEST)) 3481 panic("uhci_root_ctrl_transfer: not a request"); 3482 #endif 3483 req = &xfer->request; 3484 3485 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3486 req->bmRequestType, req->bRequest)); 3487 3488 len = UGETW(req->wLength); 3489 value = UGETW(req->wValue); 3490 index = UGETW(req->wIndex); 3491 3492 if (len != 0) 3493 buf = KERNADDR(&xfer->dmabuf, 0); 3494 3495 #define C(x,y) ((x) | ((y) << 8)) 3496 switch(C(req->bRequest, req->bmRequestType)) { 3497 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3498 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3499 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3500 /* 3501 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3502 * for the integrated root hub. 3503 */ 3504 break; 3505 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3506 if (len > 0) { 3507 *(u_int8_t *)buf = sc->sc_conf; 3508 totlen = 1; 3509 } 3510 break; 3511 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3512 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3513 if (len == 0) 3514 break; 3515 switch(value >> 8) { 3516 case UDESC_DEVICE: 3517 if ((value & 0xff) != 0) { 3518 err = USBD_IOERROR; 3519 goto ret; 3520 } 3521 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3522 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3523 memcpy(buf, &uhci_devd, l); 3524 break; 3525 case UDESC_CONFIG: 3526 if ((value & 0xff) != 0) { 3527 err = USBD_IOERROR; 3528 goto ret; 3529 } 3530 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3531 memcpy(buf, &uhci_confd, l); 3532 buf = (char *)buf + l; 3533 len -= l; 3534 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3535 totlen += l; 3536 memcpy(buf, &uhci_ifcd, l); 3537 buf = (char *)buf + l; 3538 len -= l; 3539 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3540 totlen += l; 3541 memcpy(buf, &uhci_endpd, l); 3542 break; 3543 case UDESC_STRING: 3544 #define sd ((usb_string_descriptor_t *)buf) 3545 switch (value & 0xff) { 3546 case 0: /* Language table */ 3547 totlen = usb_makelangtbl(sd, len); 3548 break; 3549 case 1: /* Vendor */ 3550 totlen = usb_makestrdesc(sd, len, 3551 sc->sc_vendor); 3552 break; 3553 case 2: /* Product */ 3554 totlen = usb_makestrdesc(sd, len, 3555 "UHCI root hub"); 3556 break; 3557 } 3558 #undef sd 3559 break; 3560 default: 3561 err = USBD_IOERROR; 3562 goto ret; 3563 } 3564 break; 3565 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3566 if (len > 0) { 3567 *(u_int8_t *)buf = 0; 3568 totlen = 1; 3569 } 3570 break; 3571 case C(UR_GET_STATUS, UT_READ_DEVICE): 3572 if (len > 1) { 3573 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3574 totlen = 2; 3575 } 3576 break; 3577 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3578 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3579 if (len > 1) { 3580 USETW(((usb_status_t *)buf)->wStatus, 0); 3581 totlen = 2; 3582 } 3583 break; 3584 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3585 if (value >= USB_MAX_DEVICES) { 3586 err = USBD_IOERROR; 3587 goto ret; 3588 } 3589 sc->sc_addr = value; 3590 break; 3591 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3592 if (value != 0 && value != 1) { 3593 err = USBD_IOERROR; 3594 goto ret; 3595 } 3596 sc->sc_conf = value; 3597 break; 3598 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3599 break; 3600 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3601 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3602 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3603 err = USBD_IOERROR; 3604 goto ret; 3605 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3606 break; 3607 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3608 break; 3609 /* Hub requests */ 3610 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3611 break; 3612 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3613 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3614 "port=%d feature=%d\n", 3615 index, value)); 3616 if (index == 1) 3617 port = UHCI_PORTSC1; 3618 else if (index == 2) 3619 port = UHCI_PORTSC2; 3620 else { 3621 err = USBD_IOERROR; 3622 goto ret; 3623 } 3624 switch(value) { 3625 case UHF_PORT_ENABLE: 3626 x = URWMASK(UREAD2(sc, port)); 3627 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3628 break; 3629 case UHF_PORT_SUSPEND: 3630 x = URWMASK(UREAD2(sc, port)); 3631 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3632 break; 3633 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3634 /* see USB2 spec ch. 7.1.7.7 */ 3635 usb_delay_ms(&sc->sc_bus, 20); 3636 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3637 /* 10ms resume delay must be provided by caller */ 3638 break; 3639 case UHF_PORT_RESET: 3640 x = URWMASK(UREAD2(sc, port)); 3641 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3642 break; 3643 case UHF_C_PORT_CONNECTION: 3644 x = URWMASK(UREAD2(sc, port)); 3645 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3646 break; 3647 case UHF_C_PORT_ENABLE: 3648 x = URWMASK(UREAD2(sc, port)); 3649 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3650 break; 3651 case UHF_C_PORT_OVER_CURRENT: 3652 x = URWMASK(UREAD2(sc, port)); 3653 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3654 break; 3655 case UHF_C_PORT_RESET: 3656 sc->sc_isreset = 0; 3657 err = USBD_NORMAL_COMPLETION; 3658 goto ret; 3659 case UHF_PORT_CONNECTION: 3660 case UHF_PORT_OVER_CURRENT: 3661 case UHF_PORT_POWER: 3662 case UHF_PORT_LOW_SPEED: 3663 case UHF_C_PORT_SUSPEND: 3664 default: 3665 err = USBD_IOERROR; 3666 goto ret; 3667 } 3668 break; 3669 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3670 if (index == 1) 3671 port = UHCI_PORTSC1; 3672 else if (index == 2) 3673 port = UHCI_PORTSC2; 3674 else { 3675 err = USBD_IOERROR; 3676 goto ret; 3677 } 3678 if (len > 0) { 3679 *(u_int8_t *)buf = 3680 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3681 UHCI_PORTSC_LS_SHIFT; 3682 totlen = 1; 3683 } 3684 break; 3685 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3686 if (len == 0) 3687 break; 3688 if ((value & 0xff) != 0) { 3689 err = USBD_IOERROR; 3690 goto ret; 3691 } 3692 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3693 totlen = l; 3694 memcpy(buf, &uhci_hubd_piix, l); 3695 break; 3696 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3697 if (len != 4) { 3698 err = USBD_IOERROR; 3699 goto ret; 3700 } 3701 memset(buf, 0, len); 3702 totlen = len; 3703 break; 3704 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3705 if (index == 1) 3706 port = UHCI_PORTSC1; 3707 else if (index == 2) 3708 port = UHCI_PORTSC2; 3709 else { 3710 err = USBD_IOERROR; 3711 goto ret; 3712 } 3713 if (len != 4) { 3714 err = USBD_IOERROR; 3715 goto ret; 3716 } 3717 x = UREAD2(sc, port); 3718 status = change = 0; 3719 if (x & UHCI_PORTSC_CCS) 3720 status |= UPS_CURRENT_CONNECT_STATUS; 3721 if (x & UHCI_PORTSC_CSC) 3722 change |= UPS_C_CONNECT_STATUS; 3723 if (x & UHCI_PORTSC_PE) 3724 status |= UPS_PORT_ENABLED; 3725 if (x & UHCI_PORTSC_POEDC) 3726 change |= UPS_C_PORT_ENABLED; 3727 if (x & UHCI_PORTSC_OCI) 3728 status |= UPS_OVERCURRENT_INDICATOR; 3729 if (x & UHCI_PORTSC_OCIC) 3730 change |= UPS_C_OVERCURRENT_INDICATOR; 3731 if (x & UHCI_PORTSC_SUSP) 3732 status |= UPS_SUSPEND; 3733 if (x & UHCI_PORTSC_LSDA) 3734 status |= UPS_LOW_SPEED; 3735 status |= UPS_PORT_POWER; 3736 if (sc->sc_isreset) 3737 change |= UPS_C_PORT_RESET; 3738 USETW(ps.wPortStatus, status); 3739 USETW(ps.wPortChange, change); 3740 l = min(len, sizeof ps); 3741 memcpy(buf, &ps, l); 3742 totlen = l; 3743 break; 3744 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3745 err = USBD_IOERROR; 3746 goto ret; 3747 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3748 break; 3749 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3750 if (index == 1) 3751 port = UHCI_PORTSC1; 3752 else if (index == 2) 3753 port = UHCI_PORTSC2; 3754 else { 3755 err = USBD_IOERROR; 3756 goto ret; 3757 } 3758 switch(value) { 3759 case UHF_PORT_ENABLE: 3760 x = URWMASK(UREAD2(sc, port)); 3761 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3762 break; 3763 case UHF_PORT_SUSPEND: 3764 x = URWMASK(UREAD2(sc, port)); 3765 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3766 break; 3767 case UHF_PORT_RESET: 3768 err = uhci_portreset(sc, index); 3769 goto ret; 3770 case UHF_PORT_POWER: 3771 /* Pretend we turned on power */ 3772 err = USBD_NORMAL_COMPLETION; 3773 goto ret; 3774 case UHF_C_PORT_CONNECTION: 3775 case UHF_C_PORT_ENABLE: 3776 case UHF_C_PORT_OVER_CURRENT: 3777 case UHF_PORT_CONNECTION: 3778 case UHF_PORT_OVER_CURRENT: 3779 case UHF_PORT_LOW_SPEED: 3780 case UHF_C_PORT_SUSPEND: 3781 case UHF_C_PORT_RESET: 3782 default: 3783 err = USBD_IOERROR; 3784 goto ret; 3785 } 3786 break; 3787 default: 3788 err = USBD_IOERROR; 3789 goto ret; 3790 } 3791 xfer->actlen = totlen; 3792 err = USBD_NORMAL_COMPLETION; 3793 ret: 3794 xfer->status = err; 3795 s = splusb(); 3796 usb_transfer_complete(xfer); 3797 splx(s); 3798 return (USBD_IN_PROGRESS); 3799 } 3800 3801 /* Abort a root control request. */ 3802 void 3803 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3804 { 3805 /* Nothing to do, all transfers are synchronous. */ 3806 } 3807 3808 /* Close the root pipe. */ 3809 void 3810 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3811 { 3812 DPRINTF(("uhci_root_ctrl_close\n")); 3813 } 3814 3815 /* Abort a root interrupt request. */ 3816 void 3817 uhci_root_intr_abort(usbd_xfer_handle xfer) 3818 { 3819 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3820 3821 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer); 3822 sc->sc_intr_xfer = NULL; 3823 3824 if (xfer->pipe->intrxfer == xfer) { 3825 DPRINTF(("uhci_root_intr_abort: remove\n")); 3826 xfer->pipe->intrxfer = 0; 3827 } 3828 xfer->status = USBD_CANCELLED; 3829 #ifdef DIAGNOSTIC 3830 UXFER(xfer)->iinfo.isdone = 1; 3831 #endif 3832 usb_transfer_complete(xfer); 3833 } 3834 3835 usbd_status 3836 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3837 { 3838 usbd_status err; 3839 3840 /* Insert last in queue. */ 3841 err = usb_insert_transfer(xfer); 3842 if (err) 3843 return (err); 3844 3845 /* 3846 * Pipe isn't running (otherwise err would be USBD_INPROG), 3847 * start first 3848 */ 3849 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3850 } 3851 3852 /* Start a transfer on the root interrupt pipe */ 3853 usbd_status 3854 uhci_root_intr_start(usbd_xfer_handle xfer) 3855 { 3856 usbd_pipe_handle pipe = xfer->pipe; 3857 uhci_softc_t *sc = pipe->device->bus->hci_private; 3858 unsigned int ival; 3859 3860 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3861 xfer, xfer->length, xfer->flags)); 3862 3863 if (sc->sc_dying) 3864 return (USBD_IOERROR); 3865 3866 /* XXX temporary variable needed to avoid gcc3 warning */ 3867 ival = xfer->pipe->endpoint->edesc->bInterval; 3868 sc->sc_ival = mstohz(ival); 3869 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3870 sc->sc_intr_xfer = xfer; 3871 return (USBD_IN_PROGRESS); 3872 } 3873 3874 /* Close the root interrupt pipe. */ 3875 void 3876 uhci_root_intr_close(usbd_pipe_handle pipe) 3877 { 3878 uhci_softc_t *sc = pipe->device->bus->hci_private; 3879 3880 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer); 3881 sc->sc_intr_xfer = NULL; 3882 DPRINTF(("uhci_root_intr_close\n")); 3883 } 3884
Indexes created Tue Sep 30 17:09:57 GMT 2025