uhci.c revision 1.224
1 /* $NetBSD: uhci.c,v 1.224 2008/12/16 22:35:36 christos Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm 39 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.224 2008/12/16 22:35:36 christos Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #include <sys/select.h> 54 #include <sys/extent.h> 55 #include <uvm/uvm_extern.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #include <machine/bus_pio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) 61 #include <sys/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 #include <sys/bus.h> 67 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/uhcireg.h> 77 #include <dev/usb/uhcivar.h> 78 #include <dev/usb/usbroothub_subr.h> 79 80 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 81 /*#define UHCI_CTL_LOOP */ 82 83 #if defined(__FreeBSD__) 84 #include <machine/clock.h> 85 86 #define delay(d) DELAY(d) 87 #endif 88 89 #if defined(__OpenBSD__) 90 struct cfdriver uhci_cd = { 91 NULL, "uhci", DV_DULL 92 }; 93 #endif 94 95 #ifdef UHCI_DEBUG 96 uhci_softc_t *thesc; 97 #define DPRINTF(x) if (uhcidebug) printf x 98 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 99 int uhcidebug = 0; 100 int uhcinoloop = 0; 101 #ifndef __NetBSD__ 102 #define snprintb((q), (f), "%b", q,f,b,l) snprintf((b), (l)) 103 #endif 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 /* 110 * The UHCI controller is little endian, so on big endian machines 111 * the data stored in memory needs to be swapped. 112 */ 113 #if defined(__FreeBSD__) || defined(__OpenBSD__) 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define htole32(x) (bswap32(x)) 116 #define le32toh(x) (bswap32(x)) 117 #else 118 #define htole32(x) (x) 119 #define le32toh(x) (x) 120 #endif 121 #endif 122 123 struct uhci_pipe { 124 struct usbd_pipe pipe; 125 int nexttoggle; 126 127 u_char aborting; 128 usbd_xfer_handle abortstart, abortend; 129 130 /* Info needed for different pipe kinds. */ 131 union { 132 /* Control pipe */ 133 struct { 134 uhci_soft_qh_t *sqh; 135 usb_dma_t reqdma; 136 uhci_soft_td_t *setup, *stat; 137 u_int length; 138 } ctl; 139 /* Interrupt pipe */ 140 struct { 141 int npoll; 142 int isread; 143 uhci_soft_qh_t **qhs; 144 } intr; 145 /* Bulk pipe */ 146 struct { 147 uhci_soft_qh_t *sqh; 148 u_int length; 149 int isread; 150 } bulk; 151 /* Iso pipe */ 152 struct iso { 153 uhci_soft_td_t **stds; 154 int next, inuse; 155 } iso; 156 } u; 157 }; 158 159 Static void uhci_globalreset(uhci_softc_t *); 160 Static usbd_status uhci_portreset(uhci_softc_t*, int); 161 Static void uhci_reset(uhci_softc_t *); 162 Static usbd_status uhci_run(uhci_softc_t *, int run); 163 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 164 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 165 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 166 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 167 #if 0 168 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 169 uhci_intr_info_t *); 170 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 171 #endif 172 173 Static void uhci_free_std_chain(uhci_softc_t *, 174 uhci_soft_td_t *, uhci_soft_td_t *); 175 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 176 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 177 uhci_soft_td_t **, uhci_soft_td_t **); 178 Static void uhci_poll_hub(void *); 179 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 180 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 181 Static void uhci_idone(uhci_intr_info_t *); 182 183 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 184 185 Static void uhci_timeout(void *); 186 Static void uhci_timeout_task(void *); 187 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 188 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 189 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 190 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 191 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 192 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 193 Static void uhci_add_loop(uhci_softc_t *sc); 194 Static void uhci_rem_loop(uhci_softc_t *sc); 195 196 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 197 Static void uhci_device_isoc_enter(usbd_xfer_handle); 198 199 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 200 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 201 202 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 203 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 204 205 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 206 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 207 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 208 Static void uhci_device_ctrl_close(usbd_pipe_handle); 209 Static void uhci_device_ctrl_done(usbd_xfer_handle); 210 211 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 212 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 213 Static void uhci_device_intr_abort(usbd_xfer_handle); 214 Static void uhci_device_intr_close(usbd_pipe_handle); 215 Static void uhci_device_intr_done(usbd_xfer_handle); 216 217 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 218 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 219 Static void uhci_device_bulk_abort(usbd_xfer_handle); 220 Static void uhci_device_bulk_close(usbd_pipe_handle); 221 Static void uhci_device_bulk_done(usbd_xfer_handle); 222 223 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 224 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 225 Static void uhci_device_isoc_abort(usbd_xfer_handle); 226 Static void uhci_device_isoc_close(usbd_pipe_handle); 227 Static void uhci_device_isoc_done(usbd_xfer_handle); 228 229 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 230 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 231 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 232 Static void uhci_root_ctrl_close(usbd_pipe_handle); 233 Static void uhci_root_ctrl_done(usbd_xfer_handle); 234 235 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 236 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 237 Static void uhci_root_intr_abort(usbd_xfer_handle); 238 Static void uhci_root_intr_close(usbd_pipe_handle); 239 Static void uhci_root_intr_done(usbd_xfer_handle); 240 241 Static usbd_status uhci_open(usbd_pipe_handle); 242 Static void uhci_poll(struct usbd_bus *); 243 Static void uhci_softintr(void *); 244 245 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 246 247 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 248 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 249 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 250 struct uhci_pipe *pipe, int ival); 251 252 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 253 Static void uhci_noop(usbd_pipe_handle pipe); 254 255 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 256 uhci_soft_qh_t *); 257 258 #ifdef UHCI_DEBUG 259 Static void uhci_dump_all(uhci_softc_t *); 260 Static void uhci_dumpregs(uhci_softc_t *); 261 Static void uhci_dump_qhs(uhci_soft_qh_t *); 262 Static void uhci_dump_qh(uhci_soft_qh_t *); 263 Static void uhci_dump_tds(uhci_soft_td_t *); 264 Static void uhci_dump_td(uhci_soft_td_t *); 265 Static void uhci_dump_ii(uhci_intr_info_t *ii); 266 void uhci_dump(void); 267 #endif 268 269 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 270 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 271 #define UWRITE1(sc, r, x) \ 272 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 273 } while (/*CONSTCOND*/0) 274 #define UWRITE2(sc, r, x) \ 275 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 276 } while (/*CONSTCOND*/0) 277 #define UWRITE4(sc, r, x) \ 278 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 279 } while (/*CONSTCOND*/0) 280 static __inline uint8_t 281 UREAD1(uhci_softc_t *sc, bus_size_t r) 282 { 283 284 UBARR(sc); 285 return bus_space_read_1(sc->iot, sc->ioh, r); 286 } 287 288 static __inline uint16_t 289 UREAD2(uhci_softc_t *sc, bus_size_t r) 290 { 291 292 UBARR(sc); 293 return bus_space_read_2(sc->iot, sc->ioh, r); 294 } 295 296 static __inline uint32_t 297 UREAD4(uhci_softc_t *sc, bus_size_t r) 298 { 299 300 UBARR(sc); 301 return bus_space_read_4(sc->iot, sc->ioh, r); 302 } 303 304 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 305 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 306 307 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 308 309 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 310 311 #define UHCI_INTR_ENDPT 1 312 313 const struct usbd_bus_methods uhci_bus_methods = { 314 uhci_open, 315 uhci_softintr, 316 uhci_poll, 317 uhci_allocm, 318 uhci_freem, 319 uhci_allocx, 320 uhci_freex, 321 }; 322 323 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 324 uhci_root_ctrl_transfer, 325 uhci_root_ctrl_start, 326 uhci_root_ctrl_abort, 327 uhci_root_ctrl_close, 328 uhci_noop, 329 uhci_root_ctrl_done, 330 }; 331 332 const struct usbd_pipe_methods uhci_root_intr_methods = { 333 uhci_root_intr_transfer, 334 uhci_root_intr_start, 335 uhci_root_intr_abort, 336 uhci_root_intr_close, 337 uhci_noop, 338 uhci_root_intr_done, 339 }; 340 341 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 342 uhci_device_ctrl_transfer, 343 uhci_device_ctrl_start, 344 uhci_device_ctrl_abort, 345 uhci_device_ctrl_close, 346 uhci_noop, 347 uhci_device_ctrl_done, 348 }; 349 350 const struct usbd_pipe_methods uhci_device_intr_methods = { 351 uhci_device_intr_transfer, 352 uhci_device_intr_start, 353 uhci_device_intr_abort, 354 uhci_device_intr_close, 355 uhci_device_clear_toggle, 356 uhci_device_intr_done, 357 }; 358 359 const struct usbd_pipe_methods uhci_device_bulk_methods = { 360 uhci_device_bulk_transfer, 361 uhci_device_bulk_start, 362 uhci_device_bulk_abort, 363 uhci_device_bulk_close, 364 uhci_device_clear_toggle, 365 uhci_device_bulk_done, 366 }; 367 368 const struct usbd_pipe_methods uhci_device_isoc_methods = { 369 uhci_device_isoc_transfer, 370 uhci_device_isoc_start, 371 uhci_device_isoc_abort, 372 uhci_device_isoc_close, 373 uhci_noop, 374 uhci_device_isoc_done, 375 }; 376 377 #define uhci_add_intr_info(sc, ii) \ 378 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 379 #define uhci_del_intr_info(ii) \ 380 do { \ 381 LIST_REMOVE((ii), list); \ 382 (ii)->list.le_prev = NULL; \ 383 } while (0) 384 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 385 386 Static inline uhci_soft_qh_t * 387 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 388 { 389 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 390 391 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 392 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 393 usb_syncmem(&pqh->dma, 394 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 395 sizeof(pqh->qh.qh_hlink), 396 BUS_DMASYNC_POSTWRITE); 397 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 398 printf("uhci_find_prev_qh: QH not found\n"); 399 return (NULL); 400 } 401 #endif 402 } 403 return (pqh); 404 } 405 406 void 407 uhci_globalreset(uhci_softc_t *sc) 408 { 409 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 410 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 411 UHCICMD(sc, 0); /* do nothing */ 412 } 413 414 usbd_status 415 uhci_init(uhci_softc_t *sc) 416 { 417 usbd_status err; 418 int i, j; 419 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 420 uhci_soft_td_t *std; 421 422 DPRINTFN(1,("uhci_init: start\n")); 423 424 #ifdef UHCI_DEBUG 425 thesc = sc; 426 427 if (uhcidebug > 2) 428 uhci_dumpregs(sc); 429 #endif 430 431 sc->sc_suspend = PWR_RESUME; 432 433 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 434 uhci_globalreset(sc); /* reset the controller */ 435 uhci_reset(sc); 436 437 #ifdef __NetBSD__ 438 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 439 USB_MEM_RESERVE); 440 #endif 441 442 /* Allocate and initialize real frame array. */ 443 err = usb_allocmem(&sc->sc_bus, 444 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 445 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 446 if (err) 447 return (err); 448 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 449 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 450 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 451 452 /* 453 * Allocate a TD, inactive, that hangs from the last QH. 454 * This is to avoid a bug in the PIIX that makes it run berserk 455 * otherwise. 456 */ 457 std = uhci_alloc_std(sc); 458 if (std == NULL) 459 return (USBD_NOMEM); 460 std->link.std = NULL; 461 std->td.td_link = htole32(UHCI_PTR_T); 462 std->td.td_status = htole32(0); /* inactive */ 463 std->td.td_token = htole32(0); 464 std->td.td_buffer = htole32(0); 465 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 466 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 467 468 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 469 lsqh = uhci_alloc_sqh(sc); 470 if (lsqh == NULL) 471 return (USBD_NOMEM); 472 lsqh->hlink = NULL; 473 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 474 lsqh->elink = std; 475 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 476 sc->sc_last_qh = lsqh; 477 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 478 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 479 480 /* Allocate the dummy QH where bulk traffic will be queued. */ 481 bsqh = uhci_alloc_sqh(sc); 482 if (bsqh == NULL) 483 return (USBD_NOMEM); 484 bsqh->hlink = lsqh; 485 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 486 bsqh->elink = NULL; 487 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 488 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 489 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 490 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 491 492 /* Allocate dummy QH where high speed control traffic will be queued. */ 493 chsqh = uhci_alloc_sqh(sc); 494 if (chsqh == NULL) 495 return (USBD_NOMEM); 496 chsqh->hlink = bsqh; 497 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 498 chsqh->elink = NULL; 499 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 500 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 501 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 502 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 503 504 /* Allocate dummy QH where control traffic will be queued. */ 505 clsqh = uhci_alloc_sqh(sc); 506 if (clsqh == NULL) 507 return (USBD_NOMEM); 508 clsqh->hlink = chsqh; 509 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 510 clsqh->elink = NULL; 511 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 512 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 513 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 514 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 515 516 /* 517 * Make all (virtual) frame list pointers point to the interrupt 518 * queue heads and the interrupt queue heads at the control 519 * queue head and point the physical frame list to the virtual. 520 */ 521 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 522 std = uhci_alloc_std(sc); 523 sqh = uhci_alloc_sqh(sc); 524 if (std == NULL || sqh == NULL) 525 return (USBD_NOMEM); 526 std->link.sqh = sqh; 527 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 528 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 529 std->td.td_token = htole32(0); 530 std->td.td_buffer = htole32(0); 531 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 532 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 533 sqh->hlink = clsqh; 534 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 535 sqh->elink = NULL; 536 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 537 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 538 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 539 sc->sc_vframes[i].htd = std; 540 sc->sc_vframes[i].etd = std; 541 sc->sc_vframes[i].hqh = sqh; 542 sc->sc_vframes[i].eqh = sqh; 543 for (j = i; 544 j < UHCI_FRAMELIST_COUNT; 545 j += UHCI_VFRAMELIST_COUNT) 546 sc->sc_pframes[j] = htole32(std->physaddr); 547 } 548 usb_syncmem(&sc->sc_dma, 0, 549 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 550 BUS_DMASYNC_PREWRITE); 551 552 553 LIST_INIT(&sc->sc_intrhead); 554 555 SIMPLEQ_INIT(&sc->sc_free_xfers); 556 557 usb_callout_init(sc->sc_poll_handle); 558 559 /* Set up the bus struct. */ 560 sc->sc_bus.methods = &uhci_bus_methods; 561 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 562 563 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 564 565 DPRINTFN(1,("uhci_init: enabling\n")); 566 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 567 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 568 569 return (uhci_run(sc, 1)); /* and here we go... */ 570 } 571 572 #if defined(__NetBSD__) || defined(__OpenBSD__) 573 int 574 uhci_activate(device_t self, enum devact act) 575 { 576 struct uhci_softc *sc = device_private(self); 577 int rv = 0; 578 579 switch (act) { 580 case DVACT_ACTIVATE: 581 return (EOPNOTSUPP); 582 583 case DVACT_DEACTIVATE: 584 sc->sc_dying = 1; 585 if (sc->sc_child != NULL) 586 rv = config_deactivate(sc->sc_child); 587 break; 588 } 589 return (rv); 590 } 591 592 void 593 uhci_childdet(device_t self, device_t child) 594 { 595 struct uhci_softc *sc = device_private(self); 596 597 KASSERT(sc->sc_child == child); 598 sc->sc_child = NULL; 599 } 600 601 int 602 uhci_detach(struct uhci_softc *sc, int flags) 603 { 604 usbd_xfer_handle xfer; 605 int rv = 0; 606 607 if (sc->sc_child != NULL) 608 rv = config_detach(sc->sc_child, flags); 609 610 if (rv != 0) 611 return (rv); 612 613 /* Free all xfers associated with this HC. */ 614 for (;;) { 615 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 616 if (xfer == NULL) 617 break; 618 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 619 free(xfer, M_USB); 620 } 621 622 /* XXX free other data structures XXX */ 623 624 return (rv); 625 } 626 #endif 627 628 usbd_status 629 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 630 { 631 struct uhci_softc *sc = bus->hci_private; 632 usbd_status status; 633 u_int32_t n; 634 635 /* 636 * XXX 637 * Since we are allocating a buffer we can assume that we will 638 * need TDs for it. Since we don't want to allocate those from 639 * an interrupt context, we allocate them here and free them again. 640 * This is no guarantee that we'll get the TDs next time... 641 */ 642 n = size / 8; 643 if (n > 16) { 644 u_int32_t i; 645 uhci_soft_td_t **stds; 646 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 647 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 648 M_WAITOK|M_ZERO); 649 for(i=0; i < n; i++) 650 stds[i] = uhci_alloc_std(sc); 651 for(i=0; i < n; i++) 652 if (stds[i] != NULL) 653 uhci_free_std(sc, stds[i]); 654 free(stds, M_TEMP); 655 } 656 657 658 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 659 #ifdef __NetBSD__ 660 if (status == USBD_NOMEM) 661 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 662 #endif 663 return status; 664 } 665 666 void 667 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 668 { 669 #ifdef __NetBSD__ 670 if (dma->block->flags & USB_DMA_RESERVE) { 671 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 672 dma); 673 return; 674 } 675 #endif 676 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 677 } 678 679 usbd_xfer_handle 680 uhci_allocx(struct usbd_bus *bus) 681 { 682 struct uhci_softc *sc = bus->hci_private; 683 usbd_xfer_handle xfer; 684 685 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 686 if (xfer != NULL) { 687 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 688 #ifdef DIAGNOSTIC 689 if (xfer->busy_free != XFER_FREE) { 690 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 691 xfer->busy_free); 692 } 693 #endif 694 } else { 695 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 696 } 697 if (xfer != NULL) { 698 memset(xfer, 0, sizeof (struct uhci_xfer)); 699 UXFER(xfer)->iinfo.sc = sc; 700 #ifdef DIAGNOSTIC 701 UXFER(xfer)->iinfo.isdone = 1; 702 xfer->busy_free = XFER_BUSY; 703 #endif 704 } 705 return (xfer); 706 } 707 708 void 709 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 710 { 711 struct uhci_softc *sc = bus->hci_private; 712 713 #ifdef DIAGNOSTIC 714 if (xfer->busy_free != XFER_BUSY) { 715 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 716 xfer->busy_free); 717 } 718 xfer->busy_free = XFER_FREE; 719 if (!UXFER(xfer)->iinfo.isdone) { 720 printf("uhci_freex: !isdone\n"); 721 } 722 #endif 723 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 724 } 725 726 /* 727 * Handle suspend/resume. 728 * 729 * We need to switch to polling mode here, because this routine is 730 * called from an interrupt context. This is all right since we 731 * are almost suspended anyway. 732 */ 733 bool 734 uhci_resume(device_t dv PMF_FN_ARGS) 735 { 736 uhci_softc_t *sc = device_private(dv); 737 int cmd; 738 int s; 739 740 s = splhardusb(); 741 742 cmd = UREAD2(sc, UHCI_CMD); 743 sc->sc_bus.use_polling++; 744 UWRITE2(sc, UHCI_INTR, 0); 745 uhci_globalreset(sc); 746 uhci_reset(sc); 747 if (cmd & UHCI_CMD_RS) 748 uhci_run(sc, 0); 749 750 /* restore saved state */ 751 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 752 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 753 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 754 755 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 756 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 757 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 758 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 759 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 760 UHCICMD(sc, UHCI_CMD_MAXP); 761 uhci_run(sc, 1); /* and start traffic again */ 762 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 763 sc->sc_bus.use_polling--; 764 if (sc->sc_intr_xfer != NULL) 765 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 766 sc->sc_intr_xfer); 767 #ifdef UHCI_DEBUG 768 if (uhcidebug > 2) 769 uhci_dumpregs(sc); 770 #endif 771 772 sc->sc_suspend = PWR_RESUME; 773 splx(s); 774 775 return true; 776 } 777 778 bool 779 uhci_suspend(device_t dv PMF_FN_ARGS) 780 { 781 uhci_softc_t *sc = device_private(dv); 782 int cmd; 783 int s; 784 785 s = splhardusb(); 786 787 cmd = UREAD2(sc, UHCI_CMD); 788 789 #ifdef UHCI_DEBUG 790 if (uhcidebug > 2) 791 uhci_dumpregs(sc); 792 #endif 793 if (sc->sc_intr_xfer != NULL) 794 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, 795 sc->sc_intr_xfer); 796 sc->sc_suspend = PWR_SUSPEND; 797 sc->sc_bus.use_polling++; 798 799 uhci_run(sc, 0); /* stop the controller */ 800 cmd &= ~UHCI_CMD_RS; 801 802 /* save some state if BIOS doesn't */ 803 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 804 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 805 806 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 807 808 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 809 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 810 sc->sc_bus.use_polling--; 811 812 splx(s); 813 814 return true; 815 } 816 817 #ifdef UHCI_DEBUG 818 Static void 819 uhci_dumpregs(uhci_softc_t *sc) 820 { 821 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 822 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 823 device_xname(sc->sc_dev), 824 UREAD2(sc, UHCI_CMD), 825 UREAD2(sc, UHCI_STS), 826 UREAD2(sc, UHCI_INTR), 827 UREAD2(sc, UHCI_FRNUM), 828 UREAD4(sc, UHCI_FLBASEADDR), 829 UREAD1(sc, UHCI_SOF), 830 UREAD2(sc, UHCI_PORTSC1), 831 UREAD2(sc, UHCI_PORTSC2))); 832 } 833 834 void 835 uhci_dump_td(uhci_soft_td_t *p) 836 { 837 char sbuf[128], sbuf2[128]; 838 839 840 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 841 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 842 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 843 "token=0x%08lx buffer=0x%08lx\n", 844 p, (long)p->physaddr, 845 (long)le32toh(p->td.td_link), 846 (long)le32toh(p->td.td_status), 847 (long)le32toh(p->td.td_token), 848 (long)le32toh(p->td.td_buffer))); 849 850 snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF", 851 (u_int32_t)le32toh(p->td.td_link)); 852 snprintb(sbuf2, sizeof(sbuf2), 853 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 854 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 855 (u_int32_t)le32toh(p->td.td_status)); 856 857 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 858 "D=%d,maxlen=%d\n", sbuf, sbuf2, 859 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 860 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 861 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 862 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 863 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 864 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 865 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 866 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 867 BUS_DMASYNC_PREREAD); 868 } 869 870 void 871 uhci_dump_qh(uhci_soft_qh_t *sqh) 872 { 873 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 874 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 875 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 876 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 877 le32toh(sqh->qh.qh_elink))); 878 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 879 } 880 881 882 #if 1 883 void 884 uhci_dump(void) 885 { 886 uhci_dump_all(thesc); 887 } 888 #endif 889 890 void 891 uhci_dump_all(uhci_softc_t *sc) 892 { 893 uhci_dumpregs(sc); 894 printf("intrs=%d\n", sc->sc_bus.no_intrs); 895 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 896 uhci_dump_qh(sc->sc_lctl_start); 897 } 898 899 900 void 901 uhci_dump_qhs(uhci_soft_qh_t *sqh) 902 { 903 uhci_dump_qh(sqh); 904 905 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 906 * Traverses sideways first, then down. 907 * 908 * QH1 909 * QH2 910 * No QH 911 * TD2.1 912 * TD2.2 913 * TD1.1 914 * etc. 915 * 916 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 917 */ 918 919 920 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 921 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 922 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 923 uhci_dump_qhs(sqh->hlink); 924 else 925 DPRINTF(("No QH\n")); 926 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 927 928 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 929 uhci_dump_tds(sqh->elink); 930 else 931 DPRINTF(("No TD\n")); 932 } 933 934 void 935 uhci_dump_tds(uhci_soft_td_t *std) 936 { 937 uhci_soft_td_t *td; 938 int stop; 939 940 for(td = std; td != NULL; td = td->link.std) { 941 uhci_dump_td(td); 942 943 /* Check whether the link pointer in this TD marks 944 * the link pointer as end of queue. This avoids 945 * printing the free list in case the queue/TD has 946 * already been moved there (seatbelt). 947 */ 948 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 949 sizeof(td->td.td_link), 950 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 951 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 952 le32toh(td->td.td_link) == 0); 953 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 954 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 955 if (stop) 956 break; 957 } 958 } 959 960 Static void 961 uhci_dump_ii(uhci_intr_info_t *ii) 962 { 963 usbd_pipe_handle pipe; 964 usb_endpoint_descriptor_t *ed; 965 usbd_device_handle dev; 966 967 #ifdef DIAGNOSTIC 968 #define DONE ii->isdone 969 #else 970 #define DONE 0 971 #endif 972 if (ii == NULL) { 973 printf("ii NULL\n"); 974 return; 975 } 976 if (ii->xfer == NULL) { 977 printf("ii %p: done=%d xfer=NULL\n", 978 ii, DONE); 979 return; 980 } 981 pipe = ii->xfer->pipe; 982 if (pipe == NULL) { 983 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 984 ii, DONE, ii->xfer); 985 return; 986 } 987 if (pipe->endpoint == NULL) { 988 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 989 ii, DONE, ii->xfer, pipe); 990 return; 991 } 992 if (pipe->device == NULL) { 993 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 994 ii, DONE, ii->xfer, pipe); 995 return; 996 } 997 ed = pipe->endpoint->edesc; 998 dev = pipe->device; 999 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 1000 ii, DONE, ii->xfer, dev, 1001 UGETW(dev->ddesc.idVendor), 1002 UGETW(dev->ddesc.idProduct), 1003 dev->address, pipe, 1004 ed->bEndpointAddress, ed->bmAttributes); 1005 #undef DONE 1006 } 1007 1008 void uhci_dump_iis(struct uhci_softc *sc); 1009 void 1010 uhci_dump_iis(struct uhci_softc *sc) 1011 { 1012 uhci_intr_info_t *ii; 1013 1014 printf("intr_info list:\n"); 1015 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 1016 uhci_dump_ii(ii); 1017 } 1018 1019 void iidump(void); 1020 void iidump(void) { uhci_dump_iis(thesc); } 1021 1022 #endif 1023 1024 /* 1025 * This routine is executed periodically and simulates interrupts 1026 * from the root controller interrupt pipe for port status change. 1027 */ 1028 void 1029 uhci_poll_hub(void *addr) 1030 { 1031 usbd_xfer_handle xfer = addr; 1032 usbd_pipe_handle pipe = xfer->pipe; 1033 uhci_softc_t *sc = pipe->device->bus->hci_private; 1034 int s; 1035 u_char *p; 1036 1037 DPRINTFN(20, ("uhci_poll_hub\n")); 1038 1039 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1040 1041 p = KERNADDR(&xfer->dmabuf, 0); 1042 p[0] = 0; 1043 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1044 p[0] |= 1<<1; 1045 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1046 p[0] |= 1<<2; 1047 if (p[0] == 0) 1048 /* No change, try again in a while */ 1049 return; 1050 1051 xfer->actlen = 1; 1052 xfer->status = USBD_NORMAL_COMPLETION; 1053 s = splusb(); 1054 xfer->device->bus->intr_context++; 1055 usb_transfer_complete(xfer); 1056 xfer->device->bus->intr_context--; 1057 splx(s); 1058 } 1059 1060 void 1061 uhci_root_intr_done(usbd_xfer_handle xfer) 1062 { 1063 } 1064 1065 void 1066 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1067 { 1068 } 1069 1070 /* 1071 * Let the last QH loop back to the high speed control transfer QH. 1072 * This is what intel calls "bandwidth reclamation" and improves 1073 * USB performance a lot for some devices. 1074 * If we are already looping, just count it. 1075 */ 1076 void 1077 uhci_add_loop(uhci_softc_t *sc) { 1078 #ifdef UHCI_DEBUG 1079 if (uhcinoloop) 1080 return; 1081 #endif 1082 if (++sc->sc_loops == 1) { 1083 DPRINTFN(5,("uhci_start_loop: add\n")); 1084 /* Note, we don't loop back the soft pointer. */ 1085 sc->sc_last_qh->qh.qh_hlink = 1086 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1087 usb_syncmem(&sc->sc_last_qh->dma, 1088 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1089 sizeof(sc->sc_last_qh->qh.qh_hlink), 1090 BUS_DMASYNC_PREWRITE); 1091 } 1092 } 1093 1094 void 1095 uhci_rem_loop(uhci_softc_t *sc) { 1096 #ifdef UHCI_DEBUG 1097 if (uhcinoloop) 1098 return; 1099 #endif 1100 if (--sc->sc_loops == 0) { 1101 DPRINTFN(5,("uhci_end_loop: remove\n")); 1102 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1103 usb_syncmem(&sc->sc_last_qh->dma, 1104 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1105 sizeof(sc->sc_last_qh->qh.qh_hlink), 1106 BUS_DMASYNC_PREWRITE); 1107 } 1108 } 1109 1110 /* Add high speed control QH, called at splusb(). */ 1111 void 1112 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1113 { 1114 uhci_soft_qh_t *eqh; 1115 1116 SPLUSBCHECK; 1117 1118 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1119 eqh = sc->sc_hctl_end; 1120 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1121 sizeof(eqh->qh.qh_hlink), 1122 BUS_DMASYNC_POSTWRITE); 1123 sqh->hlink = eqh->hlink; 1124 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1125 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1126 BUS_DMASYNC_PREWRITE); 1127 eqh->hlink = sqh; 1128 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1129 sc->sc_hctl_end = sqh; 1130 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1131 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1132 #ifdef UHCI_CTL_LOOP 1133 uhci_add_loop(sc); 1134 #endif 1135 } 1136 1137 /* Remove high speed control QH, called at splusb(). */ 1138 void 1139 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1140 { 1141 uhci_soft_qh_t *pqh; 1142 1143 SPLUSBCHECK; 1144 1145 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1146 #ifdef UHCI_CTL_LOOP 1147 uhci_rem_loop(sc); 1148 #endif 1149 /* 1150 * The T bit should be set in the elink of the QH so that the HC 1151 * doesn't follow the pointer. This condition may fail if the 1152 * the transferred packet was short so that the QH still points 1153 * at the last used TD. 1154 * In this case we set the T bit and wait a little for the HC 1155 * to stop looking at the TD. 1156 * Note that if the TD chain is large enough, the controller 1157 * may still be looking at the chain at the end of this function. 1158 * uhci_free_std_chain() will make sure the controller stops 1159 * looking at it quickly, but until then we should not change 1160 * sqh->hlink. 1161 */ 1162 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1163 sizeof(sqh->qh.qh_elink), 1164 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1165 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1166 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1167 usb_syncmem(&sqh->dma, 1168 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1169 sizeof(sqh->qh.qh_elink), 1170 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1171 delay(UHCI_QH_REMOVE_DELAY); 1172 } 1173 1174 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1175 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1176 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1177 pqh->hlink = sqh->hlink; 1178 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1179 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1180 sizeof(pqh->qh.qh_hlink), 1181 BUS_DMASYNC_PREWRITE); 1182 delay(UHCI_QH_REMOVE_DELAY); 1183 if (sc->sc_hctl_end == sqh) 1184 sc->sc_hctl_end = pqh; 1185 } 1186 1187 /* Add low speed control QH, called at splusb(). */ 1188 void 1189 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1190 { 1191 uhci_soft_qh_t *eqh; 1192 1193 SPLUSBCHECK; 1194 1195 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1196 eqh = sc->sc_lctl_end; 1197 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1198 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1199 sqh->hlink = eqh->hlink; 1200 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1201 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1202 BUS_DMASYNC_PREWRITE); 1203 eqh->hlink = sqh; 1204 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1205 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1206 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1207 sc->sc_lctl_end = sqh; 1208 } 1209 1210 /* Remove low speed control QH, called at splusb(). */ 1211 void 1212 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1213 { 1214 uhci_soft_qh_t *pqh; 1215 1216 SPLUSBCHECK; 1217 1218 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1219 /* See comment in uhci_remove_hs_ctrl() */ 1220 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1221 sizeof(sqh->qh.qh_elink), 1222 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1223 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1224 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1225 usb_syncmem(&sqh->dma, 1226 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1227 sizeof(sqh->qh.qh_elink), 1228 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1229 delay(UHCI_QH_REMOVE_DELAY); 1230 } 1231 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1232 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1233 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1234 pqh->hlink = sqh->hlink; 1235 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1236 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1237 sizeof(pqh->qh.qh_hlink), 1238 BUS_DMASYNC_PREWRITE); 1239 delay(UHCI_QH_REMOVE_DELAY); 1240 if (sc->sc_lctl_end == sqh) 1241 sc->sc_lctl_end = pqh; 1242 } 1243 1244 /* Add bulk QH, called at splusb(). */ 1245 void 1246 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1247 { 1248 uhci_soft_qh_t *eqh; 1249 1250 SPLUSBCHECK; 1251 1252 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1253 eqh = sc->sc_bulk_end; 1254 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1255 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1256 sqh->hlink = eqh->hlink; 1257 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1258 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1259 BUS_DMASYNC_PREWRITE); 1260 eqh->hlink = sqh; 1261 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1262 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1263 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1264 sc->sc_bulk_end = sqh; 1265 uhci_add_loop(sc); 1266 } 1267 1268 /* Remove bulk QH, called at splusb(). */ 1269 void 1270 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1271 { 1272 uhci_soft_qh_t *pqh; 1273 1274 SPLUSBCHECK; 1275 1276 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1277 uhci_rem_loop(sc); 1278 /* See comment in uhci_remove_hs_ctrl() */ 1279 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1280 sizeof(sqh->qh.qh_elink), 1281 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1282 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1283 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1284 usb_syncmem(&sqh->dma, 1285 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1286 sizeof(sqh->qh.qh_elink), 1287 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1288 delay(UHCI_QH_REMOVE_DELAY); 1289 } 1290 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1291 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1292 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1293 pqh->hlink = sqh->hlink; 1294 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1295 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1296 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1297 delay(UHCI_QH_REMOVE_DELAY); 1298 if (sc->sc_bulk_end == sqh) 1299 sc->sc_bulk_end = pqh; 1300 } 1301 1302 Static int uhci_intr1(uhci_softc_t *); 1303 1304 int 1305 uhci_intr(void *arg) 1306 { 1307 uhci_softc_t *sc = arg; 1308 1309 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1310 return (0); 1311 1312 if (sc->sc_bus.use_polling) { 1313 #ifdef DIAGNOSTIC 1314 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1315 #endif 1316 return (0); 1317 } 1318 1319 return (uhci_intr1(sc)); 1320 } 1321 1322 int 1323 uhci_intr1(uhci_softc_t *sc) 1324 { 1325 int status; 1326 int ack; 1327 1328 #ifdef UHCI_DEBUG 1329 if (uhcidebug > 15) { 1330 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1331 uhci_dumpregs(sc); 1332 } 1333 #endif 1334 1335 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1336 if (status == 0) /* The interrupt was not for us. */ 1337 return (0); 1338 1339 if (sc->sc_suspend != PWR_RESUME) { 1340 #ifdef DIAGNOSTIC 1341 printf("%s: interrupt while not operating ignored\n", 1342 device_xname(sc->sc_dev)); 1343 #endif 1344 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1345 return (0); 1346 } 1347 1348 ack = 0; 1349 if (status & UHCI_STS_USBINT) 1350 ack |= UHCI_STS_USBINT; 1351 if (status & UHCI_STS_USBEI) 1352 ack |= UHCI_STS_USBEI; 1353 if (status & UHCI_STS_RD) { 1354 ack |= UHCI_STS_RD; 1355 #ifdef UHCI_DEBUG 1356 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1357 #endif 1358 } 1359 if (status & UHCI_STS_HSE) { 1360 ack |= UHCI_STS_HSE; 1361 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1362 } 1363 if (status & UHCI_STS_HCPE) { 1364 ack |= UHCI_STS_HCPE; 1365 printf("%s: host controller process error\n", 1366 device_xname(sc->sc_dev)); 1367 } 1368 if (status & UHCI_STS_HCH) { 1369 /* no acknowledge needed */ 1370 if (!sc->sc_dying) { 1371 printf("%s: host controller halted\n", 1372 device_xname(sc->sc_dev)); 1373 #ifdef UHCI_DEBUG 1374 uhci_dump_all(sc); 1375 #endif 1376 } 1377 sc->sc_dying = 1; 1378 } 1379 1380 if (!ack) 1381 return (0); /* nothing to acknowledge */ 1382 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1383 1384 sc->sc_bus.no_intrs++; 1385 usb_schedsoftintr(&sc->sc_bus); 1386 1387 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1388 1389 return (1); 1390 } 1391 1392 void 1393 uhci_softintr(void *v) 1394 { 1395 struct usbd_bus *bus = v; 1396 uhci_softc_t *sc = bus->hci_private; 1397 uhci_intr_info_t *ii, *nextii; 1398 1399 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev), 1400 sc->sc_bus.intr_context)); 1401 1402 sc->sc_bus.intr_context++; 1403 1404 /* 1405 * Interrupts on UHCI really suck. When the host controller 1406 * interrupts because a transfer is completed there is no 1407 * way of knowing which transfer it was. You can scan down 1408 * the TDs and QHs of the previous frame to limit the search, 1409 * but that assumes that the interrupt was not delayed by more 1410 * than 1 ms, which may not always be true (e.g. after debug 1411 * output on a slow console). 1412 * We scan all interrupt descriptors to see if any have 1413 * completed. 1414 */ 1415 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1416 nextii = LIST_NEXT(ii, list); 1417 uhci_check_intr(sc, ii); 1418 } 1419 1420 #ifdef USB_USE_SOFTINTR 1421 if (sc->sc_softwake) { 1422 sc->sc_softwake = 0; 1423 wakeup(&sc->sc_softwake); 1424 } 1425 #endif /* USB_USE_SOFTINTR */ 1426 1427 sc->sc_bus.intr_context--; 1428 } 1429 1430 /* Check for an interrupt. */ 1431 void 1432 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1433 { 1434 uhci_soft_td_t *std, *lstd; 1435 u_int32_t status; 1436 1437 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1438 #ifdef DIAGNOSTIC 1439 if (ii == NULL) { 1440 printf("uhci_check_intr: no ii? %p\n", ii); 1441 return; 1442 } 1443 #endif 1444 if (ii->xfer->status == USBD_CANCELLED || 1445 ii->xfer->status == USBD_TIMEOUT) { 1446 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1447 return; 1448 } 1449 1450 if (ii->stdstart == NULL) 1451 return; 1452 lstd = ii->stdend; 1453 #ifdef DIAGNOSTIC 1454 if (lstd == NULL) { 1455 printf("uhci_check_intr: std==0\n"); 1456 return; 1457 } 1458 #endif 1459 /* 1460 * If the last TD is still active we need to check whether there 1461 * is an error somewhere in the middle, or whether there was a 1462 * short packet (SPD and not ACTIVE). 1463 */ 1464 usb_syncmem(&lstd->dma, 1465 lstd->offs + offsetof(uhci_td_t, td_status), 1466 sizeof(lstd->td.td_status), 1467 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1468 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1469 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1470 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1471 usb_syncmem(&std->dma, 1472 std->offs + offsetof(uhci_td_t, td_status), 1473 sizeof(std->td.td_status), 1474 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1475 status = le32toh(std->td.td_status); 1476 usb_syncmem(&std->dma, 1477 std->offs + offsetof(uhci_td_t, td_status), 1478 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1479 /* If there's an active TD the xfer isn't done. */ 1480 if (status & UHCI_TD_ACTIVE) 1481 break; 1482 /* Any kind of error makes the xfer done. */ 1483 if (status & UHCI_TD_STALLED) 1484 goto done; 1485 /* We want short packets, and it is short: it's done */ 1486 usb_syncmem(&std->dma, 1487 std->offs + offsetof(uhci_td_t, td_token), 1488 sizeof(std->td.td_token), 1489 BUS_DMASYNC_POSTWRITE); 1490 if ((status & UHCI_TD_SPD) && 1491 UHCI_TD_GET_ACTLEN(status) < 1492 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1493 goto done; 1494 } 1495 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1496 ii, ii->stdstart)); 1497 usb_syncmem(&lstd->dma, 1498 lstd->offs + offsetof(uhci_td_t, td_status), 1499 sizeof(lstd->td.td_status), 1500 BUS_DMASYNC_PREREAD); 1501 return; 1502 } 1503 done: 1504 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1505 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii); 1506 uhci_idone(ii); 1507 } 1508 1509 /* Called at splusb() */ 1510 void 1511 uhci_idone(uhci_intr_info_t *ii) 1512 { 1513 usbd_xfer_handle xfer = ii->xfer; 1514 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1515 uhci_soft_td_t *std; 1516 u_int32_t status = 0, nstatus; 1517 int actlen; 1518 1519 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1520 #ifdef DIAGNOSTIC 1521 { 1522 int s = splhigh(); 1523 if (ii->isdone) { 1524 splx(s); 1525 #ifdef UHCI_DEBUG 1526 printf("uhci_idone: ii is done!\n "); 1527 uhci_dump_ii(ii); 1528 #else 1529 printf("uhci_idone: ii=%p is done!\n", ii); 1530 #endif 1531 return; 1532 } 1533 ii->isdone = 1; 1534 splx(s); 1535 } 1536 #endif 1537 1538 if (xfer->nframes != 0) { 1539 /* Isoc transfer, do things differently. */ 1540 uhci_soft_td_t **stds = upipe->u.iso.stds; 1541 int i, n, nframes, len; 1542 1543 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1544 1545 nframes = xfer->nframes; 1546 actlen = 0; 1547 n = UXFER(xfer)->curframe; 1548 for (i = 0; i < nframes; i++) { 1549 std = stds[n]; 1550 #ifdef UHCI_DEBUG 1551 if (uhcidebug > 5) { 1552 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1553 uhci_dump_td(std); 1554 } 1555 #endif 1556 if (++n >= UHCI_VFRAMELIST_COUNT) 1557 n = 0; 1558 usb_syncmem(&std->dma, 1559 std->offs + offsetof(uhci_td_t, td_status), 1560 sizeof(std->td.td_status), 1561 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1562 status = le32toh(std->td.td_status); 1563 len = UHCI_TD_GET_ACTLEN(status); 1564 xfer->frlengths[i] = len; 1565 actlen += len; 1566 } 1567 upipe->u.iso.inuse -= nframes; 1568 xfer->actlen = actlen; 1569 xfer->status = USBD_NORMAL_COMPLETION; 1570 goto end; 1571 } 1572 1573 #ifdef UHCI_DEBUG 1574 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1575 ii, xfer, upipe)); 1576 if (uhcidebug > 10) 1577 uhci_dump_tds(ii->stdstart); 1578 #endif 1579 1580 /* The transfer is done, compute actual length and status. */ 1581 actlen = 0; 1582 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1583 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1584 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1585 nstatus = le32toh(std->td.td_status); 1586 if (nstatus & UHCI_TD_ACTIVE) 1587 break; 1588 1589 status = nstatus; 1590 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1591 UHCI_TD_PID_SETUP) 1592 actlen += UHCI_TD_GET_ACTLEN(status); 1593 else { 1594 /* 1595 * UHCI will report CRCTO in addition to a STALL or NAK 1596 * for a SETUP transaction. See section 3.2.2, "TD 1597 * CONTROL AND STATUS". 1598 */ 1599 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1600 status &= ~UHCI_TD_CRCTO; 1601 } 1602 } 1603 /* If there are left over TDs we need to update the toggle. */ 1604 if (std != NULL) 1605 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1606 1607 status &= UHCI_TD_ERROR; 1608 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1609 actlen, status)); 1610 xfer->actlen = actlen; 1611 if (status != 0) { 1612 #ifdef UHCI_DEBUG 1613 char sbuf[128]; 1614 1615 snprintb(sbuf, sizeof(sbuf), 1616 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1617 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status); 1618 1619 DPRINTFN((status == UHCI_TD_STALLED)*10, 1620 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1621 "status 0x%s\n", 1622 xfer->pipe->device->address, 1623 xfer->pipe->endpoint->edesc->bEndpointAddress, 1624 sbuf)); 1625 #endif 1626 1627 if (status == UHCI_TD_STALLED) 1628 xfer->status = USBD_STALLED; 1629 else 1630 xfer->status = USBD_IOERROR; /* more info XXX */ 1631 } else { 1632 xfer->status = USBD_NORMAL_COMPLETION; 1633 } 1634 1635 end: 1636 usb_transfer_complete(xfer); 1637 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1638 } 1639 1640 /* 1641 * Called when a request does not complete. 1642 */ 1643 void 1644 uhci_timeout(void *addr) 1645 { 1646 uhci_intr_info_t *ii = addr; 1647 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1648 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1649 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1650 1651 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1652 1653 if (sc->sc_dying) { 1654 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1655 return; 1656 } 1657 1658 /* Execute the abort in a process context. */ 1659 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1660 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1661 USB_TASKQ_HC); 1662 } 1663 1664 void 1665 uhci_timeout_task(void *addr) 1666 { 1667 usbd_xfer_handle xfer = addr; 1668 int s; 1669 1670 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1671 1672 s = splusb(); 1673 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1674 splx(s); 1675 } 1676 1677 /* 1678 * Wait here until controller claims to have an interrupt. 1679 * Then call uhci_intr and return. Use timeout to avoid waiting 1680 * too long. 1681 * Only used during boot when interrupts are not enabled yet. 1682 */ 1683 void 1684 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1685 { 1686 int timo = xfer->timeout; 1687 uhci_intr_info_t *ii; 1688 1689 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1690 1691 xfer->status = USBD_IN_PROGRESS; 1692 for (; timo >= 0; timo--) { 1693 usb_delay_ms(&sc->sc_bus, 1); 1694 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1695 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1696 uhci_intr1(sc); 1697 if (xfer->status != USBD_IN_PROGRESS) 1698 return; 1699 } 1700 } 1701 1702 /* Timeout */ 1703 DPRINTF(("uhci_waitintr: timeout\n")); 1704 for (ii = LIST_FIRST(&sc->sc_intrhead); 1705 ii != NULL && ii->xfer != xfer; 1706 ii = LIST_NEXT(ii, list)) 1707 ; 1708 #ifdef DIAGNOSTIC 1709 if (ii == NULL) 1710 panic("uhci_waitintr: lost intr_info"); 1711 #endif 1712 uhci_idone(ii); 1713 } 1714 1715 void 1716 uhci_poll(struct usbd_bus *bus) 1717 { 1718 uhci_softc_t *sc = bus->hci_private; 1719 1720 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1721 uhci_intr1(sc); 1722 } 1723 1724 void 1725 uhci_reset(uhci_softc_t *sc) 1726 { 1727 int n; 1728 1729 UHCICMD(sc, UHCI_CMD_HCRESET); 1730 /* The reset bit goes low when the controller is done. */ 1731 for (n = 0; n < UHCI_RESET_TIMEOUT && 1732 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1733 usb_delay_ms(&sc->sc_bus, 1); 1734 if (n >= UHCI_RESET_TIMEOUT) 1735 printf("%s: controller did not reset\n", 1736 device_xname(sc->sc_dev)); 1737 } 1738 1739 usbd_status 1740 uhci_run(uhci_softc_t *sc, int run) 1741 { 1742 int s, n, running; 1743 u_int16_t cmd; 1744 1745 run = run != 0; 1746 s = splhardusb(); 1747 DPRINTF(("uhci_run: setting run=%d\n", run)); 1748 cmd = UREAD2(sc, UHCI_CMD); 1749 if (run) 1750 cmd |= UHCI_CMD_RS; 1751 else 1752 cmd &= ~UHCI_CMD_RS; 1753 UHCICMD(sc, cmd); 1754 for(n = 0; n < 10; n++) { 1755 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1756 /* return when we've entered the state we want */ 1757 if (run == running) { 1758 splx(s); 1759 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1760 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1761 return (USBD_NORMAL_COMPLETION); 1762 } 1763 usb_delay_ms(&sc->sc_bus, 1); 1764 } 1765 splx(s); 1766 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1767 run ? "start" : "stop"); 1768 return (USBD_IOERROR); 1769 } 1770 1771 /* 1772 * Memory management routines. 1773 * uhci_alloc_std allocates TDs 1774 * uhci_alloc_sqh allocates QHs 1775 * These two routines do their own free list management, 1776 * partly for speed, partly because allocating DMAable memory 1777 * has page size granularaity so much memory would be wasted if 1778 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1779 */ 1780 1781 uhci_soft_td_t * 1782 uhci_alloc_std(uhci_softc_t *sc) 1783 { 1784 uhci_soft_td_t *std; 1785 usbd_status err; 1786 int i, offs; 1787 usb_dma_t dma; 1788 1789 if (sc->sc_freetds == NULL) { 1790 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1791 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1792 UHCI_TD_ALIGN, &dma); 1793 if (err) 1794 return (0); 1795 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1796 offs = i * UHCI_STD_SIZE; 1797 std = KERNADDR(&dma, offs); 1798 std->physaddr = DMAADDR(&dma, offs); 1799 std->dma = dma; 1800 std->offs = offs; 1801 std->link.std = sc->sc_freetds; 1802 sc->sc_freetds = std; 1803 } 1804 } 1805 std = sc->sc_freetds; 1806 sc->sc_freetds = std->link.std; 1807 memset(&std->td, 0, sizeof(uhci_td_t)); 1808 return std; 1809 } 1810 1811 void 1812 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1813 { 1814 #ifdef DIAGNOSTIC 1815 #define TD_IS_FREE 0x12345678 1816 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1817 printf("uhci_free_std: freeing free TD %p\n", std); 1818 return; 1819 } 1820 std->td.td_token = htole32(TD_IS_FREE); 1821 #endif 1822 std->link.std = sc->sc_freetds; 1823 sc->sc_freetds = std; 1824 } 1825 1826 uhci_soft_qh_t * 1827 uhci_alloc_sqh(uhci_softc_t *sc) 1828 { 1829 uhci_soft_qh_t *sqh; 1830 usbd_status err; 1831 int i, offs; 1832 usb_dma_t dma; 1833 1834 if (sc->sc_freeqhs == NULL) { 1835 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1836 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1837 UHCI_QH_ALIGN, &dma); 1838 if (err) 1839 return (0); 1840 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1841 offs = i * UHCI_SQH_SIZE; 1842 sqh = KERNADDR(&dma, offs); 1843 sqh->physaddr = DMAADDR(&dma, offs); 1844 sqh->dma = dma; 1845 sqh->offs = offs; 1846 sqh->hlink = sc->sc_freeqhs; 1847 sc->sc_freeqhs = sqh; 1848 } 1849 } 1850 sqh = sc->sc_freeqhs; 1851 sc->sc_freeqhs = sqh->hlink; 1852 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1853 return (sqh); 1854 } 1855 1856 void 1857 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1858 { 1859 sqh->hlink = sc->sc_freeqhs; 1860 sc->sc_freeqhs = sqh; 1861 } 1862 1863 void 1864 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1865 uhci_soft_td_t *stdend) 1866 { 1867 uhci_soft_td_t *p; 1868 1869 /* 1870 * to avoid race condition with the controller which may be looking 1871 * at this chain, we need to first invalidate all links, and 1872 * then wait for the controller to move to another queue 1873 */ 1874 for (p = std; p != stdend; p = p->link.std) { 1875 usb_syncmem(&p->dma, 1876 p->offs + offsetof(uhci_td_t, td_link), 1877 sizeof(p->td.td_link), 1878 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1879 if ((p->td.td_link & UHCI_PTR_T) == 0) { 1880 p->td.td_link = UHCI_PTR_T; 1881 usb_syncmem(&p->dma, 1882 p->offs + offsetof(uhci_td_t, td_link), 1883 sizeof(p->td.td_link), 1884 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1885 } 1886 } 1887 delay(UHCI_QH_REMOVE_DELAY); 1888 1889 for (; std != stdend; std = p) { 1890 p = std->link.std; 1891 uhci_free_std(sc, std); 1892 } 1893 } 1894 1895 usbd_status 1896 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1897 int rd, u_int16_t flags, usb_dma_t *dma, 1898 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1899 { 1900 uhci_soft_td_t *p, *lastp; 1901 uhci_physaddr_t lastlink; 1902 int i, ntd, l, tog, maxp; 1903 u_int32_t status; 1904 int addr = upipe->pipe.device->address; 1905 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1906 1907 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1908 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1909 upipe->pipe.device->speed, flags)); 1910 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1911 if (maxp == 0) { 1912 printf("uhci_alloc_std_chain: maxp=0\n"); 1913 return (USBD_INVAL); 1914 } 1915 ntd = (len + maxp - 1) / maxp; 1916 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1917 ntd++; 1918 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1919 if (ntd == 0) { 1920 *sp = *ep = 0; 1921 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1922 return (USBD_NORMAL_COMPLETION); 1923 } 1924 tog = upipe->nexttoggle; 1925 if (ntd % 2 == 0) 1926 tog ^= 1; 1927 upipe->nexttoggle = tog ^ 1; 1928 lastp = NULL; 1929 lastlink = UHCI_PTR_T; 1930 ntd--; 1931 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1932 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1933 status |= UHCI_TD_LS; 1934 if (flags & USBD_SHORT_XFER_OK) 1935 status |= UHCI_TD_SPD; 1936 usb_syncmem(dma, 0, len, 1937 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1938 for (i = ntd; i >= 0; i--) { 1939 p = uhci_alloc_std(sc); 1940 if (p == NULL) { 1941 KASSERT(lastp != NULL); 1942 uhci_free_std_chain(sc, lastp, NULL); 1943 return (USBD_NOMEM); 1944 } 1945 p->link.std = lastp; 1946 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1947 lastp = p; 1948 lastlink = p->physaddr; 1949 p->td.td_status = htole32(status); 1950 if (i == ntd) { 1951 /* last TD */ 1952 l = len % maxp; 1953 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1954 l = maxp; 1955 *ep = p; 1956 } else 1957 l = maxp; 1958 p->td.td_token = 1959 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1960 UHCI_TD_OUT(l, endpt, addr, tog)); 1961 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1962 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 1963 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1964 tog ^= 1; 1965 } 1966 *sp = lastp; 1967 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1968 upipe->nexttoggle)); 1969 return (USBD_NORMAL_COMPLETION); 1970 } 1971 1972 void 1973 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1974 { 1975 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1976 upipe->nexttoggle = 0; 1977 } 1978 1979 void 1980 uhci_noop(usbd_pipe_handle pipe) 1981 { 1982 } 1983 1984 usbd_status 1985 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1986 { 1987 usbd_status err; 1988 1989 /* Insert last in queue. */ 1990 err = usb_insert_transfer(xfer); 1991 if (err) 1992 return (err); 1993 1994 /* 1995 * Pipe isn't running (otherwise err would be USBD_INPROG), 1996 * so start it first. 1997 */ 1998 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1999 } 2000 2001 usbd_status 2002 uhci_device_bulk_start(usbd_xfer_handle xfer) 2003 { 2004 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2005 usbd_device_handle dev = upipe->pipe.device; 2006 uhci_softc_t *sc = dev->bus->hci_private; 2007 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2008 uhci_soft_td_t *data, *dataend; 2009 uhci_soft_qh_t *sqh; 2010 usbd_status err; 2011 int len, isread, endpt; 2012 int s; 2013 2014 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2015 xfer, xfer->length, xfer->flags, ii)); 2016 2017 if (sc->sc_dying) 2018 return (USBD_IOERROR); 2019 2020 #ifdef DIAGNOSTIC 2021 if (xfer->rqflags & URQ_REQUEST) 2022 panic("uhci_device_bulk_transfer: a request"); 2023 #endif 2024 2025 len = xfer->length; 2026 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2027 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2028 sqh = upipe->u.bulk.sqh; 2029 2030 upipe->u.bulk.isread = isread; 2031 upipe->u.bulk.length = len; 2032 2033 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2034 &xfer->dmabuf, &data, &dataend); 2035 if (err) 2036 return (err); 2037 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2038 usb_syncmem(&dataend->dma, 2039 dataend->offs + offsetof(uhci_td_t, td_status), 2040 sizeof(dataend->td.td_status), 2041 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2042 2043 2044 #ifdef UHCI_DEBUG 2045 if (uhcidebug > 8) { 2046 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2047 uhci_dump_tds(data); 2048 } 2049 #endif 2050 2051 /* Set up interrupt info. */ 2052 ii->xfer = xfer; 2053 ii->stdstart = data; 2054 ii->stdend = dataend; 2055 #ifdef DIAGNOSTIC 2056 if (!ii->isdone) { 2057 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2058 } 2059 ii->isdone = 0; 2060 #endif 2061 2062 sqh->elink = data; 2063 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2064 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2065 2066 s = splusb(); 2067 uhci_add_bulk(sc, sqh); 2068 uhci_add_intr_info(sc, ii); 2069 2070 if (xfer->timeout && !sc->sc_bus.use_polling) { 2071 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2072 uhci_timeout, ii); 2073 } 2074 xfer->status = USBD_IN_PROGRESS; 2075 splx(s); 2076 2077 #ifdef UHCI_DEBUG 2078 if (uhcidebug > 10) { 2079 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2080 uhci_dump_tds(data); 2081 } 2082 #endif 2083 2084 if (sc->sc_bus.use_polling) 2085 uhci_waitintr(sc, xfer); 2086 2087 return (USBD_IN_PROGRESS); 2088 } 2089 2090 /* Abort a device bulk request. */ 2091 void 2092 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2093 { 2094 DPRINTF(("uhci_device_bulk_abort:\n")); 2095 uhci_abort_xfer(xfer, USBD_CANCELLED); 2096 } 2097 2098 /* 2099 * Abort a device request. 2100 * If this routine is called at splusb() it guarantees that the request 2101 * will be removed from the hardware scheduling and that the callback 2102 * for it will be called with USBD_CANCELLED status. 2103 * It's impossible to guarantee that the requested transfer will not 2104 * have happened since the hardware runs concurrently. 2105 * If the transaction has already happened we rely on the ordinary 2106 * interrupt processing to process it. 2107 */ 2108 void 2109 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2110 { 2111 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2112 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2113 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2114 uhci_soft_td_t *std; 2115 int s; 2116 int wake; 2117 2118 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2119 2120 if (sc->sc_dying) { 2121 /* If we're dying, just do the software part. */ 2122 s = splusb(); 2123 xfer->status = status; /* make software ignore it */ 2124 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer); 2125 usb_transfer_complete(xfer); 2126 splx(s); 2127 return; 2128 } 2129 2130 if (xfer->device->bus->intr_context || !curproc) 2131 panic("uhci_abort_xfer: not in process context"); 2132 2133 /* 2134 * If an abort is already in progress then just wait for it to 2135 * complete and return. 2136 */ 2137 if (xfer->hcflags & UXFER_ABORTING) { 2138 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2139 #ifdef DIAGNOSTIC 2140 if (status == USBD_TIMEOUT) 2141 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2142 #endif 2143 /* Override the status which might be USBD_TIMEOUT. */ 2144 xfer->status = status; 2145 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2146 xfer->hcflags |= UXFER_ABORTWAIT; 2147 while (xfer->hcflags & UXFER_ABORTING) 2148 tsleep(&xfer->hcflags, PZERO, "uhciaw", 0); 2149 return; 2150 } 2151 xfer->hcflags |= UXFER_ABORTING; 2152 2153 /* 2154 * Step 1: Make interrupt routine and hardware ignore xfer. 2155 */ 2156 s = splusb(); 2157 xfer->status = status; /* make software ignore it */ 2158 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii); 2159 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2160 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2161 usb_syncmem(&std->dma, 2162 std->offs + offsetof(uhci_td_t, td_status), 2163 sizeof(std->td.td_status), 2164 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2165 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2166 usb_syncmem(&std->dma, 2167 std->offs + offsetof(uhci_td_t, td_status), 2168 sizeof(std->td.td_status), 2169 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2170 } 2171 splx(s); 2172 2173 /* 2174 * Step 2: Wait until we know hardware has finished any possible 2175 * use of the xfer. Also make sure the soft interrupt routine 2176 * has run. 2177 */ 2178 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2179 s = splusb(); 2180 #ifdef USB_USE_SOFTINTR 2181 sc->sc_softwake = 1; 2182 #endif /* USB_USE_SOFTINTR */ 2183 usb_schedsoftintr(&sc->sc_bus); 2184 #ifdef USB_USE_SOFTINTR 2185 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2186 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 2187 #endif /* USB_USE_SOFTINTR */ 2188 splx(s); 2189 2190 /* 2191 * Step 3: Execute callback. 2192 */ 2193 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2194 s = splusb(); 2195 #ifdef DIAGNOSTIC 2196 ii->isdone = 1; 2197 #endif 2198 wake = xfer->hcflags & UXFER_ABORTWAIT; 2199 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2200 usb_transfer_complete(xfer); 2201 if (wake) 2202 wakeup(&xfer->hcflags); 2203 splx(s); 2204 } 2205 2206 /* Close a device bulk pipe. */ 2207 void 2208 uhci_device_bulk_close(usbd_pipe_handle pipe) 2209 { 2210 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2211 usbd_device_handle dev = upipe->pipe.device; 2212 uhci_softc_t *sc = dev->bus->hci_private; 2213 2214 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2215 } 2216 2217 usbd_status 2218 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2219 { 2220 usbd_status err; 2221 2222 /* Insert last in queue. */ 2223 err = usb_insert_transfer(xfer); 2224 if (err) 2225 return (err); 2226 2227 /* 2228 * Pipe isn't running (otherwise err would be USBD_INPROG), 2229 * so start it first. 2230 */ 2231 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2232 } 2233 2234 usbd_status 2235 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2236 { 2237 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2238 usbd_status err; 2239 2240 if (sc->sc_dying) 2241 return (USBD_IOERROR); 2242 2243 #ifdef DIAGNOSTIC 2244 if (!(xfer->rqflags & URQ_REQUEST)) 2245 panic("uhci_device_ctrl_transfer: not a request"); 2246 #endif 2247 2248 err = uhci_device_request(xfer); 2249 if (err) 2250 return (err); 2251 2252 if (sc->sc_bus.use_polling) 2253 uhci_waitintr(sc, xfer); 2254 return (USBD_IN_PROGRESS); 2255 } 2256 2257 usbd_status 2258 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2259 { 2260 usbd_status err; 2261 2262 /* Insert last in queue. */ 2263 err = usb_insert_transfer(xfer); 2264 if (err) 2265 return (err); 2266 2267 /* 2268 * Pipe isn't running (otherwise err would be USBD_INPROG), 2269 * so start it first. 2270 */ 2271 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2272 } 2273 2274 usbd_status 2275 uhci_device_intr_start(usbd_xfer_handle xfer) 2276 { 2277 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2278 usbd_device_handle dev = upipe->pipe.device; 2279 uhci_softc_t *sc = dev->bus->hci_private; 2280 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2281 uhci_soft_td_t *data, *dataend; 2282 uhci_soft_qh_t *sqh; 2283 usbd_status err; 2284 int isread, endpt; 2285 int i, s; 2286 2287 if (sc->sc_dying) 2288 return (USBD_IOERROR); 2289 2290 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2291 xfer, xfer->length, xfer->flags)); 2292 2293 #ifdef DIAGNOSTIC 2294 if (xfer->rqflags & URQ_REQUEST) 2295 panic("uhci_device_intr_transfer: a request"); 2296 #endif 2297 2298 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2299 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2300 2301 upipe->u.intr.isread = isread; 2302 2303 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2304 xfer->flags, &xfer->dmabuf, &data, 2305 &dataend); 2306 if (err) 2307 return (err); 2308 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2309 usb_syncmem(&dataend->dma, 2310 dataend->offs + offsetof(uhci_td_t, td_status), 2311 sizeof(dataend->td.td_status), 2312 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2313 2314 #ifdef UHCI_DEBUG 2315 if (uhcidebug > 10) { 2316 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2317 uhci_dump_tds(data); 2318 uhci_dump_qh(upipe->u.intr.qhs[0]); 2319 } 2320 #endif 2321 2322 s = splusb(); 2323 /* Set up interrupt info. */ 2324 ii->xfer = xfer; 2325 ii->stdstart = data; 2326 ii->stdend = dataend; 2327 #ifdef DIAGNOSTIC 2328 if (!ii->isdone) { 2329 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2330 } 2331 ii->isdone = 0; 2332 #endif 2333 2334 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2335 upipe->u.intr.qhs[0])); 2336 for (i = 0; i < upipe->u.intr.npoll; i++) { 2337 sqh = upipe->u.intr.qhs[i]; 2338 sqh->elink = data; 2339 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2340 usb_syncmem(&sqh->dma, 2341 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2342 sizeof(sqh->qh.qh_elink), 2343 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2344 } 2345 uhci_add_intr_info(sc, ii); 2346 xfer->status = USBD_IN_PROGRESS; 2347 splx(s); 2348 2349 #ifdef UHCI_DEBUG 2350 if (uhcidebug > 10) { 2351 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2352 uhci_dump_tds(data); 2353 uhci_dump_qh(upipe->u.intr.qhs[0]); 2354 } 2355 #endif 2356 2357 return (USBD_IN_PROGRESS); 2358 } 2359 2360 /* Abort a device control request. */ 2361 void 2362 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2363 { 2364 DPRINTF(("uhci_device_ctrl_abort:\n")); 2365 uhci_abort_xfer(xfer, USBD_CANCELLED); 2366 } 2367 2368 /* Close a device control pipe. */ 2369 void 2370 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2371 { 2372 } 2373 2374 /* Abort a device interrupt request. */ 2375 void 2376 uhci_device_intr_abort(usbd_xfer_handle xfer) 2377 { 2378 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2379 if (xfer->pipe->intrxfer == xfer) { 2380 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2381 xfer->pipe->intrxfer = NULL; 2382 } 2383 uhci_abort_xfer(xfer, USBD_CANCELLED); 2384 } 2385 2386 /* Close a device interrupt pipe. */ 2387 void 2388 uhci_device_intr_close(usbd_pipe_handle pipe) 2389 { 2390 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2391 uhci_softc_t *sc = pipe->device->bus->hci_private; 2392 int i, npoll; 2393 int s; 2394 2395 /* Unlink descriptors from controller data structures. */ 2396 npoll = upipe->u.intr.npoll; 2397 s = splusb(); 2398 for (i = 0; i < npoll; i++) 2399 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2400 splx(s); 2401 2402 /* 2403 * We now have to wait for any activity on the physical 2404 * descriptors to stop. 2405 */ 2406 usb_delay_ms(&sc->sc_bus, 2); 2407 2408 for(i = 0; i < npoll; i++) 2409 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2410 free(upipe->u.intr.qhs, M_USBHC); 2411 2412 /* XXX free other resources */ 2413 } 2414 2415 usbd_status 2416 uhci_device_request(usbd_xfer_handle xfer) 2417 { 2418 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2419 usb_device_request_t *req = &xfer->request; 2420 usbd_device_handle dev = upipe->pipe.device; 2421 uhci_softc_t *sc = dev->bus->hci_private; 2422 int addr = dev->address; 2423 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2424 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2425 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2426 uhci_soft_qh_t *sqh; 2427 int len; 2428 u_int32_t ls; 2429 usbd_status err; 2430 int isread; 2431 int s; 2432 2433 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2434 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2435 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2436 UGETW(req->wIndex), UGETW(req->wLength), 2437 addr, endpt)); 2438 2439 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2440 isread = req->bmRequestType & UT_READ; 2441 len = UGETW(req->wLength); 2442 2443 setup = upipe->u.ctl.setup; 2444 stat = upipe->u.ctl.stat; 2445 sqh = upipe->u.ctl.sqh; 2446 2447 /* Set up data transaction */ 2448 if (len != 0) { 2449 upipe->nexttoggle = 1; 2450 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2451 &xfer->dmabuf, &data, &dataend); 2452 if (err) 2453 return (err); 2454 next = data; 2455 dataend->link.std = stat; 2456 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2457 usb_syncmem(&dataend->dma, 2458 dataend->offs + offsetof(uhci_td_t, td_link), 2459 sizeof(dataend->td.td_link), 2460 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2461 } else { 2462 next = stat; 2463 } 2464 upipe->u.ctl.length = len; 2465 2466 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2467 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2468 2469 setup->link.std = next; 2470 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2471 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2472 UHCI_TD_ACTIVE); 2473 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2474 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2475 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2476 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2477 2478 stat->link.std = NULL; 2479 stat->td.td_link = htole32(UHCI_PTR_T); 2480 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2481 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2482 stat->td.td_token = 2483 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2484 UHCI_TD_IN (0, endpt, addr, 1)); 2485 stat->td.td_buffer = htole32(0); 2486 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2487 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2488 2489 #ifdef UHCI_DEBUG 2490 if (uhcidebug > 10) { 2491 DPRINTF(("uhci_device_request: before transfer\n")); 2492 uhci_dump_tds(setup); 2493 } 2494 #endif 2495 2496 /* Set up interrupt info. */ 2497 ii->xfer = xfer; 2498 ii->stdstart = setup; 2499 ii->stdend = stat; 2500 #ifdef DIAGNOSTIC 2501 if (!ii->isdone) { 2502 printf("uhci_device_request: not done, ii=%p\n", ii); 2503 } 2504 ii->isdone = 0; 2505 #endif 2506 2507 sqh->elink = setup; 2508 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2509 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2510 2511 s = splusb(); 2512 if (dev->speed == USB_SPEED_LOW) 2513 uhci_add_ls_ctrl(sc, sqh); 2514 else 2515 uhci_add_hs_ctrl(sc, sqh); 2516 uhci_add_intr_info(sc, ii); 2517 #ifdef UHCI_DEBUG 2518 if (uhcidebug > 12) { 2519 uhci_soft_td_t *std; 2520 uhci_soft_qh_t *xqh; 2521 uhci_soft_qh_t *sxqh; 2522 int maxqh = 0; 2523 uhci_physaddr_t link; 2524 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2525 for (std = sc->sc_vframes[0].htd, link = 0; 2526 (link & UHCI_PTR_QH) == 0; 2527 std = std->link.std) { 2528 link = le32toh(std->td.td_link); 2529 uhci_dump_td(std); 2530 } 2531 sxqh = (uhci_soft_qh_t *)std; 2532 uhci_dump_qh(sxqh); 2533 for (xqh = sxqh; 2534 xqh != NULL; 2535 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2536 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2537 uhci_dump_qh(xqh); 2538 } 2539 DPRINTF(("Enqueued QH:\n")); 2540 uhci_dump_qh(sqh); 2541 uhci_dump_tds(sqh->elink); 2542 } 2543 #endif 2544 if (xfer->timeout && !sc->sc_bus.use_polling) { 2545 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2546 uhci_timeout, ii); 2547 } 2548 xfer->status = USBD_IN_PROGRESS; 2549 splx(s); 2550 2551 return (USBD_NORMAL_COMPLETION); 2552 } 2553 2554 usbd_status 2555 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2556 { 2557 usbd_status err; 2558 2559 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2560 2561 /* Put it on our queue, */ 2562 err = usb_insert_transfer(xfer); 2563 2564 /* bail out on error, */ 2565 if (err && err != USBD_IN_PROGRESS) 2566 return (err); 2567 2568 /* XXX should check inuse here */ 2569 2570 /* insert into schedule, */ 2571 uhci_device_isoc_enter(xfer); 2572 2573 /* and start if the pipe wasn't running */ 2574 if (!err) 2575 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2576 2577 return (err); 2578 } 2579 2580 void 2581 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2582 { 2583 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2584 usbd_device_handle dev = upipe->pipe.device; 2585 uhci_softc_t *sc = dev->bus->hci_private; 2586 struct iso *iso = &upipe->u.iso; 2587 uhci_soft_td_t *std; 2588 u_int32_t buf, len, status, offs; 2589 int s, i, next, nframes; 2590 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2591 2592 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2593 "nframes=%d\n", 2594 iso->inuse, iso->next, xfer, xfer->nframes)); 2595 2596 if (sc->sc_dying) 2597 return; 2598 2599 if (xfer->status == USBD_IN_PROGRESS) { 2600 /* This request has already been entered into the frame list */ 2601 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2602 /* XXX */ 2603 } 2604 2605 #ifdef DIAGNOSTIC 2606 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2607 printf("uhci_device_isoc_enter: overflow!\n"); 2608 #endif 2609 2610 next = iso->next; 2611 if (next == -1) { 2612 /* Not in use yet, schedule it a few frames ahead. */ 2613 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2614 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2615 } 2616 2617 xfer->status = USBD_IN_PROGRESS; 2618 UXFER(xfer)->curframe = next; 2619 2620 buf = DMAADDR(&xfer->dmabuf, 0); 2621 offs = 0; 2622 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2623 UHCI_TD_ACTIVE | 2624 UHCI_TD_IOS); 2625 nframes = xfer->nframes; 2626 s = splusb(); 2627 for (i = 0; i < nframes; i++) { 2628 std = iso->stds[next]; 2629 if (++next >= UHCI_VFRAMELIST_COUNT) 2630 next = 0; 2631 len = xfer->frlengths[i]; 2632 std->td.td_buffer = htole32(buf); 2633 usb_syncmem(&xfer->dmabuf, offs, len, 2634 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2635 if (i == nframes - 1) 2636 status |= UHCI_TD_IOC; 2637 std->td.td_status = htole32(status); 2638 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2639 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2640 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2641 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2642 #ifdef UHCI_DEBUG 2643 if (uhcidebug > 5) { 2644 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2645 uhci_dump_td(std); 2646 } 2647 #endif 2648 buf += len; 2649 offs += len; 2650 } 2651 iso->next = next; 2652 iso->inuse += xfer->nframes; 2653 2654 splx(s); 2655 } 2656 2657 usbd_status 2658 uhci_device_isoc_start(usbd_xfer_handle xfer) 2659 { 2660 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2661 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2662 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2663 uhci_soft_td_t *end; 2664 int s, i; 2665 2666 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2667 2668 if (sc->sc_dying) 2669 return (USBD_IOERROR); 2670 2671 #ifdef DIAGNOSTIC 2672 if (xfer->status != USBD_IN_PROGRESS) 2673 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2674 #endif 2675 2676 /* Find the last TD */ 2677 i = UXFER(xfer)->curframe + xfer->nframes; 2678 if (i >= UHCI_VFRAMELIST_COUNT) 2679 i -= UHCI_VFRAMELIST_COUNT; 2680 end = upipe->u.iso.stds[i]; 2681 2682 #ifdef DIAGNOSTIC 2683 if (end == NULL) { 2684 printf("uhci_device_isoc_start: end == NULL\n"); 2685 return (USBD_INVAL); 2686 } 2687 #endif 2688 2689 s = splusb(); 2690 2691 /* Set up interrupt info. */ 2692 ii->xfer = xfer; 2693 ii->stdstart = end; 2694 ii->stdend = end; 2695 #ifdef DIAGNOSTIC 2696 if (!ii->isdone) 2697 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2698 ii->isdone = 0; 2699 #endif 2700 uhci_add_intr_info(sc, ii); 2701 2702 splx(s); 2703 2704 return (USBD_IN_PROGRESS); 2705 } 2706 2707 void 2708 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2709 { 2710 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2711 uhci_soft_td_t **stds = upipe->u.iso.stds; 2712 uhci_soft_td_t *std; 2713 int i, n, s, nframes, maxlen, len; 2714 2715 s = splusb(); 2716 2717 /* Transfer is already done. */ 2718 if (xfer->status != USBD_NOT_STARTED && 2719 xfer->status != USBD_IN_PROGRESS) { 2720 splx(s); 2721 return; 2722 } 2723 2724 /* Give xfer the requested abort code. */ 2725 xfer->status = USBD_CANCELLED; 2726 2727 /* make hardware ignore it, */ 2728 nframes = xfer->nframes; 2729 n = UXFER(xfer)->curframe; 2730 maxlen = 0; 2731 for (i = 0; i < nframes; i++) { 2732 std = stds[n]; 2733 usb_syncmem(&std->dma, 2734 std->offs + offsetof(uhci_td_t, td_status), 2735 sizeof(std->td.td_status), 2736 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2737 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2738 usb_syncmem(&std->dma, 2739 std->offs + offsetof(uhci_td_t, td_status), 2740 sizeof(std->td.td_status), 2741 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2742 usb_syncmem(&std->dma, 2743 std->offs + offsetof(uhci_td_t, td_token), 2744 sizeof(std->td.td_token), 2745 BUS_DMASYNC_POSTWRITE); 2746 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2747 if (len > maxlen) 2748 maxlen = len; 2749 if (++n >= UHCI_VFRAMELIST_COUNT) 2750 n = 0; 2751 } 2752 2753 /* and wait until we are sure the hardware has finished. */ 2754 delay(maxlen); 2755 2756 #ifdef DIAGNOSTIC 2757 UXFER(xfer)->iinfo.isdone = 1; 2758 #endif 2759 /* Run callback and remove from interrupt list. */ 2760 usb_transfer_complete(xfer); 2761 2762 splx(s); 2763 } 2764 2765 void 2766 uhci_device_isoc_close(usbd_pipe_handle pipe) 2767 { 2768 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2769 usbd_device_handle dev = upipe->pipe.device; 2770 uhci_softc_t *sc = dev->bus->hci_private; 2771 uhci_soft_td_t *std, *vstd; 2772 struct iso *iso; 2773 int i, s; 2774 2775 /* 2776 * Make sure all TDs are marked as inactive. 2777 * Wait for completion. 2778 * Unschedule. 2779 * Deallocate. 2780 */ 2781 iso = &upipe->u.iso; 2782 2783 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2784 std = iso->stds[i]; 2785 usb_syncmem(&std->dma, 2786 std->offs + offsetof(uhci_td_t, td_status), 2787 sizeof(std->td.td_status), 2788 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2789 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2790 usb_syncmem(&std->dma, 2791 std->offs + offsetof(uhci_td_t, td_status), 2792 sizeof(std->td.td_status), 2793 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2794 } 2795 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2796 2797 s = splusb(); 2798 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2799 std = iso->stds[i]; 2800 for (vstd = sc->sc_vframes[i].htd; 2801 vstd != NULL && vstd->link.std != std; 2802 vstd = vstd->link.std) 2803 ; 2804 if (vstd == NULL) { 2805 /*panic*/ 2806 printf("uhci_device_isoc_close: %p not found\n", std); 2807 splx(s); 2808 return; 2809 } 2810 vstd->link = std->link; 2811 usb_syncmem(&std->dma, 2812 std->offs + offsetof(uhci_td_t, td_link), 2813 sizeof(std->td.td_link), 2814 BUS_DMASYNC_POSTWRITE); 2815 vstd->td.td_link = std->td.td_link; 2816 usb_syncmem(&vstd->dma, 2817 vstd->offs + offsetof(uhci_td_t, td_link), 2818 sizeof(vstd->td.td_link), 2819 BUS_DMASYNC_PREWRITE); 2820 uhci_free_std(sc, std); 2821 } 2822 splx(s); 2823 2824 free(iso->stds, M_USBHC); 2825 } 2826 2827 usbd_status 2828 uhci_setup_isoc(usbd_pipe_handle pipe) 2829 { 2830 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2831 usbd_device_handle dev = upipe->pipe.device; 2832 uhci_softc_t *sc = dev->bus->hci_private; 2833 int addr = upipe->pipe.device->address; 2834 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2835 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2836 uhci_soft_td_t *std, *vstd; 2837 u_int32_t token; 2838 struct iso *iso; 2839 int i, s; 2840 2841 iso = &upipe->u.iso; 2842 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2843 M_USBHC, M_WAITOK); 2844 2845 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2846 UHCI_TD_OUT(0, endpt, addr, 0); 2847 2848 /* Allocate the TDs and mark as inactive; */ 2849 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2850 std = uhci_alloc_std(sc); 2851 if (std == 0) 2852 goto bad; 2853 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2854 std->td.td_token = htole32(token); 2855 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2856 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2857 iso->stds[i] = std; 2858 } 2859 2860 /* Insert TDs into schedule. */ 2861 s = splusb(); 2862 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2863 std = iso->stds[i]; 2864 vstd = sc->sc_vframes[i].htd; 2865 usb_syncmem(&vstd->dma, 2866 vstd->offs + offsetof(uhci_td_t, td_link), 2867 sizeof(vstd->td.td_link), 2868 BUS_DMASYNC_POSTWRITE); 2869 std->link = vstd->link; 2870 std->td.td_link = vstd->td.td_link; 2871 usb_syncmem(&std->dma, 2872 std->offs + offsetof(uhci_td_t, td_link), 2873 sizeof(std->td.td_link), 2874 BUS_DMASYNC_PREWRITE); 2875 vstd->link.std = std; 2876 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2877 usb_syncmem(&vstd->dma, 2878 vstd->offs + offsetof(uhci_td_t, td_link), 2879 sizeof(vstd->td.td_link), 2880 BUS_DMASYNC_PREWRITE); 2881 } 2882 splx(s); 2883 2884 iso->next = -1; 2885 iso->inuse = 0; 2886 2887 return (USBD_NORMAL_COMPLETION); 2888 2889 bad: 2890 while (--i >= 0) 2891 uhci_free_std(sc, iso->stds[i]); 2892 free(iso->stds, M_USBHC); 2893 return (USBD_NOMEM); 2894 } 2895 2896 void 2897 uhci_device_isoc_done(usbd_xfer_handle xfer) 2898 { 2899 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2900 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2901 int i, offs; 2902 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2903 2904 2905 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2906 xfer->actlen, xfer->busy_free)); 2907 2908 if (ii->xfer != xfer) 2909 /* Not on interrupt list, ignore it. */ 2910 return; 2911 2912 if (!uhci_active_intr_info(ii)) 2913 return; 2914 2915 #ifdef DIAGNOSTIC 2916 if (ii->stdend == NULL) { 2917 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2918 #ifdef UHCI_DEBUG 2919 uhci_dump_ii(ii); 2920 #endif 2921 return; 2922 } 2923 #endif 2924 2925 /* Turn off the interrupt since it is active even if the TD is not. */ 2926 usb_syncmem(&ii->stdend->dma, 2927 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2928 sizeof(ii->stdend->td.td_status), 2929 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2930 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2931 usb_syncmem(&ii->stdend->dma, 2932 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2933 sizeof(ii->stdend->td.td_status), 2934 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2935 2936 uhci_del_intr_info(ii); /* remove from active list */ 2937 2938 offs = 0; 2939 for (i = 0; i < xfer->nframes; i++) { 2940 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i], 2941 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2942 offs += xfer->frlengths[i]; 2943 } 2944 } 2945 2946 void 2947 uhci_device_intr_done(usbd_xfer_handle xfer) 2948 { 2949 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2950 uhci_softc_t *sc = ii->sc; 2951 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2952 uhci_soft_qh_t *sqh; 2953 int i, npoll, isread; 2954 2955 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2956 2957 npoll = upipe->u.intr.npoll; 2958 for(i = 0; i < npoll; i++) { 2959 sqh = upipe->u.intr.qhs[i]; 2960 sqh->elink = NULL; 2961 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2962 usb_syncmem(&sqh->dma, 2963 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2964 sizeof(sqh->qh.qh_elink), 2965 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2966 } 2967 uhci_free_std_chain(sc, ii->stdstart, NULL); 2968 2969 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2970 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 2971 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2972 2973 /* XXX Wasteful. */ 2974 if (xfer->pipe->repeat) { 2975 uhci_soft_td_t *data, *dataend; 2976 2977 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 2978 2979 /* This alloc cannot fail since we freed the chain above. */ 2980 uhci_alloc_std_chain(upipe, sc, xfer->length, 2981 upipe->u.intr.isread, xfer->flags, 2982 &xfer->dmabuf, &data, &dataend); 2983 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2984 usb_syncmem(&dataend->dma, 2985 dataend->offs + offsetof(uhci_td_t, td_status), 2986 sizeof(dataend->td.td_status), 2987 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2988 2989 #ifdef UHCI_DEBUG 2990 if (uhcidebug > 10) { 2991 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2992 uhci_dump_tds(data); 2993 uhci_dump_qh(upipe->u.intr.qhs[0]); 2994 } 2995 #endif 2996 2997 ii->stdstart = data; 2998 ii->stdend = dataend; 2999 #ifdef DIAGNOSTIC 3000 if (!ii->isdone) { 3001 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3002 } 3003 ii->isdone = 0; 3004 #endif 3005 for (i = 0; i < npoll; i++) { 3006 sqh = upipe->u.intr.qhs[i]; 3007 sqh->elink = data; 3008 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3009 usb_syncmem(&sqh->dma, 3010 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3011 sizeof(sqh->qh.qh_elink), 3012 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3013 } 3014 xfer->status = USBD_IN_PROGRESS; 3015 /* The ii is already on the examined list, just leave it. */ 3016 } else { 3017 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3018 if (uhci_active_intr_info(ii)) 3019 uhci_del_intr_info(ii); 3020 } 3021 } 3022 3023 /* Deallocate request data structures */ 3024 void 3025 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3026 { 3027 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3028 uhci_softc_t *sc = ii->sc; 3029 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3030 int len = UGETW(xfer->request.wLength); 3031 int isread = (xfer->request.bmRequestType & UT_READ); 3032 3033 #ifdef DIAGNOSTIC 3034 if (!(xfer->rqflags & URQ_REQUEST)) 3035 panic("uhci_device_ctrl_done: not a request"); 3036 #endif 3037 3038 if (!uhci_active_intr_info(ii)) 3039 return; 3040 3041 uhci_del_intr_info(ii); /* remove from active list */ 3042 3043 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3044 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3045 else 3046 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3047 3048 if (upipe->u.ctl.length != 0) 3049 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3050 3051 if (len) { 3052 usb_syncmem(&xfer->dmabuf, 0, len, 3053 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3054 } 3055 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3056 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3057 3058 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3059 } 3060 3061 /* Deallocate request data structures */ 3062 void 3063 uhci_device_bulk_done(usbd_xfer_handle xfer) 3064 { 3065 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3066 uhci_softc_t *sc = ii->sc; 3067 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3068 3069 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3070 xfer, ii, sc, upipe)); 3071 3072 if (!uhci_active_intr_info(ii)) 3073 return; 3074 3075 uhci_del_intr_info(ii); /* remove from active list */ 3076 3077 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3078 3079 uhci_free_std_chain(sc, ii->stdstart, NULL); 3080 3081 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3082 } 3083 3084 /* Add interrupt QH, called with vflock. */ 3085 void 3086 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3087 { 3088 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3089 uhci_soft_qh_t *eqh; 3090 3091 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3092 3093 eqh = vf->eqh; 3094 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3095 sizeof(eqh->qh.qh_hlink), 3096 BUS_DMASYNC_POSTWRITE); 3097 sqh->hlink = eqh->hlink; 3098 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3099 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3100 sizeof(sqh->qh.qh_hlink), 3101 BUS_DMASYNC_PREWRITE); 3102 eqh->hlink = sqh; 3103 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3104 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3105 sizeof(eqh->qh.qh_hlink), 3106 BUS_DMASYNC_PREWRITE); 3107 vf->eqh = sqh; 3108 vf->bandwidth++; 3109 } 3110 3111 /* Remove interrupt QH. */ 3112 void 3113 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3114 { 3115 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3116 uhci_soft_qh_t *pqh; 3117 3118 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3119 3120 /* See comment in uhci_remove_ctrl() */ 3121 3122 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3123 sizeof(sqh->qh.qh_elink), 3124 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3125 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3126 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3127 usb_syncmem(&sqh->dma, 3128 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3129 sizeof(sqh->qh.qh_elink), 3130 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3131 delay(UHCI_QH_REMOVE_DELAY); 3132 } 3133 3134 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3135 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3136 sizeof(sqh->qh.qh_hlink), 3137 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3138 pqh->hlink = sqh->hlink; 3139 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3140 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3141 sizeof(pqh->qh.qh_hlink), 3142 BUS_DMASYNC_PREWRITE); 3143 delay(UHCI_QH_REMOVE_DELAY); 3144 if (vf->eqh == sqh) 3145 vf->eqh = pqh; 3146 vf->bandwidth--; 3147 } 3148 3149 usbd_status 3150 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3151 { 3152 uhci_soft_qh_t *sqh; 3153 int i, npoll, s; 3154 u_int bestbw, bw, bestoffs, offs; 3155 3156 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3157 if (ival == 0) { 3158 printf("uhci_device_setintr: 0 interval\n"); 3159 return (USBD_INVAL); 3160 } 3161 3162 if (ival > UHCI_VFRAMELIST_COUNT) 3163 ival = UHCI_VFRAMELIST_COUNT; 3164 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3165 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3166 3167 upipe->u.intr.npoll = npoll; 3168 upipe->u.intr.qhs = 3169 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 3170 3171 /* 3172 * Figure out which offset in the schedule that has most 3173 * bandwidth left over. 3174 */ 3175 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3176 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3177 for (bw = i = 0; i < npoll; i++) 3178 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3179 if (bw < bestbw) { 3180 bestbw = bw; 3181 bestoffs = offs; 3182 } 3183 } 3184 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3185 3186 for(i = 0; i < npoll; i++) { 3187 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3188 sqh->elink = NULL; 3189 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3190 usb_syncmem(&sqh->dma, 3191 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3192 sizeof(sqh->qh.qh_elink), 3193 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3194 sqh->pos = MOD(i * ival + bestoffs); 3195 } 3196 #undef MOD 3197 3198 s = splusb(); 3199 /* Enter QHs into the controller data structures. */ 3200 for(i = 0; i < npoll; i++) 3201 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3202 splx(s); 3203 3204 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3205 return (USBD_NORMAL_COMPLETION); 3206 } 3207 3208 /* Open a new pipe. */ 3209 usbd_status 3210 uhci_open(usbd_pipe_handle pipe) 3211 { 3212 uhci_softc_t *sc = pipe->device->bus->hci_private; 3213 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3214 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3215 usbd_status err; 3216 int ival; 3217 3218 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3219 pipe, pipe->device->address, 3220 ed->bEndpointAddress, sc->sc_addr)); 3221 3222 upipe->aborting = 0; 3223 upipe->nexttoggle = 0; 3224 3225 if (pipe->device->address == sc->sc_addr) { 3226 switch (ed->bEndpointAddress) { 3227 case USB_CONTROL_ENDPOINT: 3228 pipe->methods = &uhci_root_ctrl_methods; 3229 break; 3230 case UE_DIR_IN | UHCI_INTR_ENDPT: 3231 pipe->methods = &uhci_root_intr_methods; 3232 break; 3233 default: 3234 return (USBD_INVAL); 3235 } 3236 } else { 3237 switch (ed->bmAttributes & UE_XFERTYPE) { 3238 case UE_CONTROL: 3239 pipe->methods = &uhci_device_ctrl_methods; 3240 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3241 if (upipe->u.ctl.sqh == NULL) 3242 goto bad; 3243 upipe->u.ctl.setup = uhci_alloc_std(sc); 3244 if (upipe->u.ctl.setup == NULL) { 3245 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3246 goto bad; 3247 } 3248 upipe->u.ctl.stat = uhci_alloc_std(sc); 3249 if (upipe->u.ctl.stat == NULL) { 3250 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3251 uhci_free_std(sc, upipe->u.ctl.setup); 3252 goto bad; 3253 } 3254 err = usb_allocmem(&sc->sc_bus, 3255 sizeof(usb_device_request_t), 3256 0, &upipe->u.ctl.reqdma); 3257 if (err) { 3258 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3259 uhci_free_std(sc, upipe->u.ctl.setup); 3260 uhci_free_std(sc, upipe->u.ctl.stat); 3261 goto bad; 3262 } 3263 break; 3264 case UE_INTERRUPT: 3265 pipe->methods = &uhci_device_intr_methods; 3266 ival = pipe->interval; 3267 if (ival == USBD_DEFAULT_INTERVAL) 3268 ival = ed->bInterval; 3269 return (uhci_device_setintr(sc, upipe, ival)); 3270 case UE_ISOCHRONOUS: 3271 pipe->methods = &uhci_device_isoc_methods; 3272 return (uhci_setup_isoc(pipe)); 3273 case UE_BULK: 3274 pipe->methods = &uhci_device_bulk_methods; 3275 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3276 if (upipe->u.bulk.sqh == NULL) 3277 goto bad; 3278 break; 3279 } 3280 } 3281 return (USBD_NORMAL_COMPLETION); 3282 3283 bad: 3284 return (USBD_NOMEM); 3285 } 3286 3287 /* 3288 * Data structures and routines to emulate the root hub. 3289 */ 3290 usb_device_descriptor_t uhci_devd = { 3291 USB_DEVICE_DESCRIPTOR_SIZE, 3292 UDESC_DEVICE, /* type */ 3293 {0x00, 0x01}, /* USB version */ 3294 UDCLASS_HUB, /* class */ 3295 UDSUBCLASS_HUB, /* subclass */ 3296 UDPROTO_FSHUB, /* protocol */ 3297 64, /* max packet */ 3298 {0},{0},{0x00,0x01}, /* device id */ 3299 1,2,0, /* string indicies */ 3300 1 /* # of configurations */ 3301 }; 3302 3303 const usb_config_descriptor_t uhci_confd = { 3304 USB_CONFIG_DESCRIPTOR_SIZE, 3305 UDESC_CONFIG, 3306 {USB_CONFIG_DESCRIPTOR_SIZE + 3307 USB_INTERFACE_DESCRIPTOR_SIZE + 3308 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3309 1, 3310 1, 3311 0, 3312 UC_ATTR_MBO | UC_SELF_POWERED, 3313 0 /* max power */ 3314 }; 3315 3316 const usb_interface_descriptor_t uhci_ifcd = { 3317 USB_INTERFACE_DESCRIPTOR_SIZE, 3318 UDESC_INTERFACE, 3319 0, 3320 0, 3321 1, 3322 UICLASS_HUB, 3323 UISUBCLASS_HUB, 3324 UIPROTO_FSHUB, 3325 0 3326 }; 3327 3328 const usb_endpoint_descriptor_t uhci_endpd = { 3329 USB_ENDPOINT_DESCRIPTOR_SIZE, 3330 UDESC_ENDPOINT, 3331 UE_DIR_IN | UHCI_INTR_ENDPT, 3332 UE_INTERRUPT, 3333 {8}, 3334 255 3335 }; 3336 3337 const usb_hub_descriptor_t uhci_hubd_piix = { 3338 USB_HUB_DESCRIPTOR_SIZE, 3339 UDESC_HUB, 3340 2, 3341 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3342 50, /* power on to power good */ 3343 0, 3344 { 0x00 }, /* both ports are removable */ 3345 { 0 }, 3346 }; 3347 3348 /* 3349 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3350 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3351 * should not be used by the USB subsystem. As we cannot issue a 3352 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3353 * will be enabled as part of the reset. 3354 * 3355 * On the VT83C572, the port cannot be successfully enabled until the 3356 * outstanding "port enable change" and "connection status change" 3357 * events have been reset. 3358 */ 3359 Static usbd_status 3360 uhci_portreset(uhci_softc_t *sc, int index) 3361 { 3362 int lim, port, x; 3363 3364 if (index == 1) 3365 port = UHCI_PORTSC1; 3366 else if (index == 2) 3367 port = UHCI_PORTSC2; 3368 else 3369 return (USBD_IOERROR); 3370 3371 x = URWMASK(UREAD2(sc, port)); 3372 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3373 3374 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3375 3376 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3377 index, UREAD2(sc, port))); 3378 3379 x = URWMASK(UREAD2(sc, port)); 3380 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3381 3382 delay(100); 3383 3384 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3385 index, UREAD2(sc, port))); 3386 3387 x = URWMASK(UREAD2(sc, port)); 3388 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3389 3390 for (lim = 10; --lim > 0;) { 3391 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3392 3393 x = UREAD2(sc, port); 3394 3395 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3396 index, lim, x)); 3397 3398 if (!(x & UHCI_PORTSC_CCS)) { 3399 /* 3400 * No device is connected (or was disconnected 3401 * during reset). Consider the port reset. 3402 * The delay must be long enough to ensure on 3403 * the initial iteration that the device 3404 * connection will have been registered. 50ms 3405 * appears to be sufficient, but 20ms is not. 3406 */ 3407 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3408 index, lim)); 3409 break; 3410 } 3411 3412 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3413 /* 3414 * Port enabled changed and/or connection 3415 * status changed were set. Reset either or 3416 * both raised flags (by writing a 1 to that 3417 * bit), and wait again for state to settle. 3418 */ 3419 UWRITE2(sc, port, URWMASK(x) | 3420 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3421 continue; 3422 } 3423 3424 if (x & UHCI_PORTSC_PE) 3425 /* Port is enabled */ 3426 break; 3427 3428 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3429 } 3430 3431 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3432 index, UREAD2(sc, port))); 3433 3434 if (lim <= 0) { 3435 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3436 return (USBD_TIMEOUT); 3437 } 3438 3439 sc->sc_isreset = 1; 3440 return (USBD_NORMAL_COMPLETION); 3441 } 3442 3443 /* 3444 * Simulate a hardware hub by handling all the necessary requests. 3445 */ 3446 usbd_status 3447 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3448 { 3449 usbd_status err; 3450 3451 /* Insert last in queue. */ 3452 err = usb_insert_transfer(xfer); 3453 if (err) 3454 return (err); 3455 3456 /* 3457 * Pipe isn't running (otherwise err would be USBD_INPROG), 3458 * so start it first. 3459 */ 3460 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3461 } 3462 3463 usbd_status 3464 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3465 { 3466 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3467 usb_device_request_t *req; 3468 void *buf = NULL; 3469 int port, x; 3470 int s, len, value, index, status, change, l, totlen = 0; 3471 usb_port_status_t ps; 3472 usbd_status err; 3473 3474 if (sc->sc_dying) 3475 return (USBD_IOERROR); 3476 3477 #ifdef DIAGNOSTIC 3478 if (!(xfer->rqflags & URQ_REQUEST)) 3479 panic("uhci_root_ctrl_transfer: not a request"); 3480 #endif 3481 req = &xfer->request; 3482 3483 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3484 req->bmRequestType, req->bRequest)); 3485 3486 len = UGETW(req->wLength); 3487 value = UGETW(req->wValue); 3488 index = UGETW(req->wIndex); 3489 3490 if (len != 0) 3491 buf = KERNADDR(&xfer->dmabuf, 0); 3492 3493 #define C(x,y) ((x) | ((y) << 8)) 3494 switch(C(req->bRequest, req->bmRequestType)) { 3495 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3496 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3497 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3498 /* 3499 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3500 * for the integrated root hub. 3501 */ 3502 break; 3503 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3504 if (len > 0) { 3505 *(u_int8_t *)buf = sc->sc_conf; 3506 totlen = 1; 3507 } 3508 break; 3509 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3510 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3511 if (len == 0) 3512 break; 3513 switch(value >> 8) { 3514 case UDESC_DEVICE: 3515 if ((value & 0xff) != 0) { 3516 err = USBD_IOERROR; 3517 goto ret; 3518 } 3519 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3520 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3521 memcpy(buf, &uhci_devd, l); 3522 break; 3523 case UDESC_CONFIG: 3524 if ((value & 0xff) != 0) { 3525 err = USBD_IOERROR; 3526 goto ret; 3527 } 3528 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3529 memcpy(buf, &uhci_confd, l); 3530 buf = (char *)buf + l; 3531 len -= l; 3532 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3533 totlen += l; 3534 memcpy(buf, &uhci_ifcd, l); 3535 buf = (char *)buf + l; 3536 len -= l; 3537 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3538 totlen += l; 3539 memcpy(buf, &uhci_endpd, l); 3540 break; 3541 case UDESC_STRING: 3542 #define sd ((usb_string_descriptor_t *)buf) 3543 switch (value & 0xff) { 3544 case 0: /* Language table */ 3545 totlen = usb_makelangtbl(sd, len); 3546 break; 3547 case 1: /* Vendor */ 3548 totlen = usb_makestrdesc(sd, len, 3549 sc->sc_vendor); 3550 break; 3551 case 2: /* Product */ 3552 totlen = usb_makestrdesc(sd, len, 3553 "UHCI root hub"); 3554 break; 3555 } 3556 #undef sd 3557 break; 3558 default: 3559 err = USBD_IOERROR; 3560 goto ret; 3561 } 3562 break; 3563 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3564 if (len > 0) { 3565 *(u_int8_t *)buf = 0; 3566 totlen = 1; 3567 } 3568 break; 3569 case C(UR_GET_STATUS, UT_READ_DEVICE): 3570 if (len > 1) { 3571 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3572 totlen = 2; 3573 } 3574 break; 3575 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3576 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3577 if (len > 1) { 3578 USETW(((usb_status_t *)buf)->wStatus, 0); 3579 totlen = 2; 3580 } 3581 break; 3582 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3583 if (value >= USB_MAX_DEVICES) { 3584 err = USBD_IOERROR; 3585 goto ret; 3586 } 3587 sc->sc_addr = value; 3588 break; 3589 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3590 if (value != 0 && value != 1) { 3591 err = USBD_IOERROR; 3592 goto ret; 3593 } 3594 sc->sc_conf = value; 3595 break; 3596 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3597 break; 3598 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3599 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3600 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3601 err = USBD_IOERROR; 3602 goto ret; 3603 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3604 break; 3605 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3606 break; 3607 /* Hub requests */ 3608 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3609 break; 3610 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3611 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3612 "port=%d feature=%d\n", 3613 index, value)); 3614 if (index == 1) 3615 port = UHCI_PORTSC1; 3616 else if (index == 2) 3617 port = UHCI_PORTSC2; 3618 else { 3619 err = USBD_IOERROR; 3620 goto ret; 3621 } 3622 switch(value) { 3623 case UHF_PORT_ENABLE: 3624 x = URWMASK(UREAD2(sc, port)); 3625 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3626 break; 3627 case UHF_PORT_SUSPEND: 3628 x = URWMASK(UREAD2(sc, port)); 3629 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3630 break; 3631 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3632 /* see USB2 spec ch. 7.1.7.7 */ 3633 usb_delay_ms(&sc->sc_bus, 20); 3634 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3635 /* 10ms resume delay must be provided by caller */ 3636 break; 3637 case UHF_PORT_RESET: 3638 x = URWMASK(UREAD2(sc, port)); 3639 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3640 break; 3641 case UHF_C_PORT_CONNECTION: 3642 x = URWMASK(UREAD2(sc, port)); 3643 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3644 break; 3645 case UHF_C_PORT_ENABLE: 3646 x = URWMASK(UREAD2(sc, port)); 3647 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3648 break; 3649 case UHF_C_PORT_OVER_CURRENT: 3650 x = URWMASK(UREAD2(sc, port)); 3651 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3652 break; 3653 case UHF_C_PORT_RESET: 3654 sc->sc_isreset = 0; 3655 err = USBD_NORMAL_COMPLETION; 3656 goto ret; 3657 case UHF_PORT_CONNECTION: 3658 case UHF_PORT_OVER_CURRENT: 3659 case UHF_PORT_POWER: 3660 case UHF_PORT_LOW_SPEED: 3661 case UHF_C_PORT_SUSPEND: 3662 default: 3663 err = USBD_IOERROR; 3664 goto ret; 3665 } 3666 break; 3667 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3668 if (index == 1) 3669 port = UHCI_PORTSC1; 3670 else if (index == 2) 3671 port = UHCI_PORTSC2; 3672 else { 3673 err = USBD_IOERROR; 3674 goto ret; 3675 } 3676 if (len > 0) { 3677 *(u_int8_t *)buf = 3678 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3679 UHCI_PORTSC_LS_SHIFT; 3680 totlen = 1; 3681 } 3682 break; 3683 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3684 if (len == 0) 3685 break; 3686 if ((value & 0xff) != 0) { 3687 err = USBD_IOERROR; 3688 goto ret; 3689 } 3690 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3691 totlen = l; 3692 memcpy(buf, &uhci_hubd_piix, l); 3693 break; 3694 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3695 if (len != 4) { 3696 err = USBD_IOERROR; 3697 goto ret; 3698 } 3699 memset(buf, 0, len); 3700 totlen = len; 3701 break; 3702 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3703 if (index == 1) 3704 port = UHCI_PORTSC1; 3705 else if (index == 2) 3706 port = UHCI_PORTSC2; 3707 else { 3708 err = USBD_IOERROR; 3709 goto ret; 3710 } 3711 if (len != 4) { 3712 err = USBD_IOERROR; 3713 goto ret; 3714 } 3715 x = UREAD2(sc, port); 3716 status = change = 0; 3717 if (x & UHCI_PORTSC_CCS) 3718 status |= UPS_CURRENT_CONNECT_STATUS; 3719 if (x & UHCI_PORTSC_CSC) 3720 change |= UPS_C_CONNECT_STATUS; 3721 if (x & UHCI_PORTSC_PE) 3722 status |= UPS_PORT_ENABLED; 3723 if (x & UHCI_PORTSC_POEDC) 3724 change |= UPS_C_PORT_ENABLED; 3725 if (x & UHCI_PORTSC_OCI) 3726 status |= UPS_OVERCURRENT_INDICATOR; 3727 if (x & UHCI_PORTSC_OCIC) 3728 change |= UPS_C_OVERCURRENT_INDICATOR; 3729 if (x & UHCI_PORTSC_SUSP) 3730 status |= UPS_SUSPEND; 3731 if (x & UHCI_PORTSC_LSDA) 3732 status |= UPS_LOW_SPEED; 3733 status |= UPS_PORT_POWER; 3734 if (sc->sc_isreset) 3735 change |= UPS_C_PORT_RESET; 3736 USETW(ps.wPortStatus, status); 3737 USETW(ps.wPortChange, change); 3738 l = min(len, sizeof ps); 3739 memcpy(buf, &ps, l); 3740 totlen = l; 3741 break; 3742 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3743 err = USBD_IOERROR; 3744 goto ret; 3745 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3746 break; 3747 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3748 if (index == 1) 3749 port = UHCI_PORTSC1; 3750 else if (index == 2) 3751 port = UHCI_PORTSC2; 3752 else { 3753 err = USBD_IOERROR; 3754 goto ret; 3755 } 3756 switch(value) { 3757 case UHF_PORT_ENABLE: 3758 x = URWMASK(UREAD2(sc, port)); 3759 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3760 break; 3761 case UHF_PORT_SUSPEND: 3762 x = URWMASK(UREAD2(sc, port)); 3763 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3764 break; 3765 case UHF_PORT_RESET: 3766 err = uhci_portreset(sc, index); 3767 goto ret; 3768 case UHF_PORT_POWER: 3769 /* Pretend we turned on power */ 3770 err = USBD_NORMAL_COMPLETION; 3771 goto ret; 3772 case UHF_C_PORT_CONNECTION: 3773 case UHF_C_PORT_ENABLE: 3774 case UHF_C_PORT_OVER_CURRENT: 3775 case UHF_PORT_CONNECTION: 3776 case UHF_PORT_OVER_CURRENT: 3777 case UHF_PORT_LOW_SPEED: 3778 case UHF_C_PORT_SUSPEND: 3779 case UHF_C_PORT_RESET: 3780 default: 3781 err = USBD_IOERROR; 3782 goto ret; 3783 } 3784 break; 3785 default: 3786 err = USBD_IOERROR; 3787 goto ret; 3788 } 3789 xfer->actlen = totlen; 3790 err = USBD_NORMAL_COMPLETION; 3791 ret: 3792 xfer->status = err; 3793 s = splusb(); 3794 usb_transfer_complete(xfer); 3795 splx(s); 3796 return (USBD_IN_PROGRESS); 3797 } 3798 3799 /* Abort a root control request. */ 3800 void 3801 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3802 { 3803 /* Nothing to do, all transfers are synchronous. */ 3804 } 3805 3806 /* Close the root pipe. */ 3807 void 3808 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3809 { 3810 DPRINTF(("uhci_root_ctrl_close\n")); 3811 } 3812 3813 /* Abort a root interrupt request. */ 3814 void 3815 uhci_root_intr_abort(usbd_xfer_handle xfer) 3816 { 3817 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3818 3819 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer); 3820 sc->sc_intr_xfer = NULL; 3821 3822 if (xfer->pipe->intrxfer == xfer) { 3823 DPRINTF(("uhci_root_intr_abort: remove\n")); 3824 xfer->pipe->intrxfer = 0; 3825 } 3826 xfer->status = USBD_CANCELLED; 3827 #ifdef DIAGNOSTIC 3828 UXFER(xfer)->iinfo.isdone = 1; 3829 #endif 3830 usb_transfer_complete(xfer); 3831 } 3832 3833 usbd_status 3834 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3835 { 3836 usbd_status err; 3837 3838 /* Insert last in queue. */ 3839 err = usb_insert_transfer(xfer); 3840 if (err) 3841 return (err); 3842 3843 /* 3844 * Pipe isn't running (otherwise err would be USBD_INPROG), 3845 * start first 3846 */ 3847 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3848 } 3849 3850 /* Start a transfer on the root interrupt pipe */ 3851 usbd_status 3852 uhci_root_intr_start(usbd_xfer_handle xfer) 3853 { 3854 usbd_pipe_handle pipe = xfer->pipe; 3855 uhci_softc_t *sc = pipe->device->bus->hci_private; 3856 unsigned int ival; 3857 3858 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3859 xfer, xfer->length, xfer->flags)); 3860 3861 if (sc->sc_dying) 3862 return (USBD_IOERROR); 3863 3864 /* XXX temporary variable needed to avoid gcc3 warning */ 3865 ival = xfer->pipe->endpoint->edesc->bInterval; 3866 sc->sc_ival = mstohz(ival); 3867 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3868 sc->sc_intr_xfer = xfer; 3869 return (USBD_IN_PROGRESS); 3870 } 3871 3872 /* Close the root interrupt pipe. */ 3873 void 3874 uhci_root_intr_close(usbd_pipe_handle pipe) 3875 { 3876 uhci_softc_t *sc = pipe->device->bus->hci_private; 3877 3878 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer); 3879 sc->sc_intr_xfer = NULL; 3880 DPRINTF(("uhci_root_intr_close\n")); 3881 } 3882
Indexes created Thu Sep 25 02:09:54 GMT 2025