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uhci.c revision 1.240.6.1
      1 /*	$NetBSD: uhci.c,v 1.240.6.1 2011/12/04 13:23:17 jmcneill Exp $	*/
      2 /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
      3 
      4 /*
      5  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
      6  * All rights reserved.
      7  *
      8  * This code is derived from software contributed to The NetBSD Foundation
      9  * by Lennart Augustsson (lennart (at) augustsson.net) at
     10  * Carlstedt Research & Technology.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * USB Universal Host Controller driver.
     36  * Handles e.g. PIIX3 and PIIX4.
     37  *
     38  * UHCI spec: http://www.intel.com/technology/usb/spec.htm
     39  * USB spec: http://www.usb.org/developers/docs/
     40  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     41  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     42  */
     43 
     44 #include <sys/cdefs.h>
     45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.240.6.1 2011/12/04 13:23:17 jmcneill Exp $");
     46 
     47 #include "opt_usb.h"
     48 
     49 #include <sys/param.h>
     50 #include <sys/systm.h>
     51 #include <sys/kernel.h>
     52 #include <sys/malloc.h>
     53 #include <sys/device.h>
     54 #include <sys/select.h>
     55 #include <sys/extent.h>
     56 #include <sys/proc.h>
     57 #include <sys/queue.h>
     58 #include <sys/bus.h>
     59 
     60 #include <machine/endian.h>
     61 
     62 #include <dev/usb/usb.h>
     63 #include <dev/usb/usbdi.h>
     64 #include <dev/usb/usbdivar.h>
     65 #include <dev/usb/usb_mem.h>
     66 #include <dev/usb/usb_quirks.h>
     67 
     68 #include <dev/usb/uhcireg.h>
     69 #include <dev/usb/uhcivar.h>
     70 #include <dev/usb/usbroothub_subr.h>
     71 
     72 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     73 /*#define UHCI_CTL_LOOP */
     74 
     75 
     76 
     77 #ifdef UHCI_DEBUG
     78 uhci_softc_t *thesc;
     79 #define DPRINTF(x)	if (uhcidebug) printf x
     80 #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
     81 int uhcidebug = 0;
     82 int uhcinoloop = 0;
     83 #else
     84 #define DPRINTF(x)
     85 #define DPRINTFN(n,x)
     86 #endif
     87 
     88 /*
     89  * The UHCI controller is little endian, so on big endian machines
     90  * the data stored in memory needs to be swapped.
     91  */
     92 
     93 struct uhci_pipe {
     94 	struct usbd_pipe pipe;
     95 	int nexttoggle;
     96 
     97 	u_char aborting;
     98 	usbd_xfer_handle abortstart, abortend;
     99 
    100 	/* Info needed for different pipe kinds. */
    101 	union {
    102 		/* Control pipe */
    103 		struct {
    104 			uhci_soft_qh_t *sqh;
    105 			usb_dma_t reqdma;
    106 			uhci_soft_td_t *setup, *stat;
    107 			u_int length;
    108 		} ctl;
    109 		/* Interrupt pipe */
    110 		struct {
    111 			int npoll;
    112 			int isread;
    113 			uhci_soft_qh_t **qhs;
    114 		} intr;
    115 		/* Bulk pipe */
    116 		struct {
    117 			uhci_soft_qh_t *sqh;
    118 			u_int length;
    119 			int isread;
    120 		} bulk;
    121 		/* Iso pipe */
    122 		struct iso {
    123 			uhci_soft_td_t **stds;
    124 			int next, inuse;
    125 		} iso;
    126 	} u;
    127 };
    128 
    129 Static void		uhci_globalreset(uhci_softc_t *);
    130 Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    131 Static void		uhci_reset(uhci_softc_t *);
    132 Static usbd_status	uhci_run(uhci_softc_t *, int run);
    133 Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    134 Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    135 Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    136 Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    137 #if 0
    138 Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    139 					 uhci_intr_info_t *);
    140 Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    141 #endif
    142 
    143 Static void		uhci_free_std_chain(uhci_softc_t *,
    144 					    uhci_soft_td_t *, uhci_soft_td_t *);
    145 Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    146 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
    147 			    uhci_soft_td_t **, uhci_soft_td_t **);
    148 Static void		uhci_poll_hub(void *);
    149 Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    150 Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    151 Static void		uhci_idone(uhci_intr_info_t *);
    152 
    153 Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    154 
    155 Static void		uhci_timeout(void *);
    156 Static void		uhci_timeout_task(void *);
    157 Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    158 Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    159 Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    160 Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    161 Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    162 Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    163 Static void		uhci_add_loop(uhci_softc_t *sc);
    164 Static void		uhci_rem_loop(uhci_softc_t *sc);
    165 
    166 Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    167 Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    168 
    169 Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    170 Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
    171 
    172 Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    173 Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    174 
    175 Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    176 Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    177 Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    178 Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    179 Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    180 
    181 Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    182 Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    183 Static void		uhci_device_intr_abort(usbd_xfer_handle);
    184 Static void		uhci_device_intr_close(usbd_pipe_handle);
    185 Static void		uhci_device_intr_done(usbd_xfer_handle);
    186 
    187 Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    188 Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    189 Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    190 Static void		uhci_device_bulk_close(usbd_pipe_handle);
    191 Static void		uhci_device_bulk_done(usbd_xfer_handle);
    192 
    193 Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    194 Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    195 Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    196 Static void		uhci_device_isoc_close(usbd_pipe_handle);
    197 Static void		uhci_device_isoc_done(usbd_xfer_handle);
    198 
    199 Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    200 Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    201 Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    202 Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    203 Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    204 
    205 Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    206 Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    207 Static void		uhci_root_intr_abort(usbd_xfer_handle);
    208 Static void		uhci_root_intr_close(usbd_pipe_handle);
    209 Static void		uhci_root_intr_done(usbd_xfer_handle);
    210 
    211 Static usbd_status	uhci_open(usbd_pipe_handle);
    212 Static void		uhci_poll(struct usbd_bus *);
    213 Static void		uhci_softintr(void *);
    214 
    215 Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    216 
    217 Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    218 Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    219 Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    220 			    struct uhci_pipe *pipe, int ival);
    221 
    222 Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    223 Static void		uhci_noop(usbd_pipe_handle pipe);
    224 
    225 static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    226 						    uhci_soft_qh_t *);
    227 
    228 #ifdef UHCI_DEBUG
    229 Static void		uhci_dump_all(uhci_softc_t *);
    230 Static void		uhci_dumpregs(uhci_softc_t *);
    231 Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    232 Static void		uhci_dump_qh(uhci_soft_qh_t *);
    233 Static void		uhci_dump_tds(uhci_soft_td_t *);
    234 Static void		uhci_dump_td(uhci_soft_td_t *);
    235 Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    236 void			uhci_dump(void);
    237 #endif
    238 
    239 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    240 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    241 #define UWRITE1(sc, r, x) \
    242  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    243  } while (/*CONSTCOND*/0)
    244 #define UWRITE2(sc, r, x) \
    245  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    246  } while (/*CONSTCOND*/0)
    247 #define UWRITE4(sc, r, x) \
    248  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    249  } while (/*CONSTCOND*/0)
    250 static __inline uint8_t
    251 UREAD1(uhci_softc_t *sc, bus_size_t r)
    252 {
    253 
    254 	UBARR(sc);
    255 	return bus_space_read_1(sc->iot, sc->ioh, r);
    256 }
    257 
    258 static __inline uint16_t
    259 UREAD2(uhci_softc_t *sc, bus_size_t r)
    260 {
    261 
    262 	UBARR(sc);
    263 	return bus_space_read_2(sc->iot, sc->ioh, r);
    264 }
    265 
    266 static __inline uint32_t
    267 UREAD4(uhci_softc_t *sc, bus_size_t r)
    268 {
    269 
    270 	UBARR(sc);
    271 	return bus_space_read_4(sc->iot, sc->ioh, r);
    272 }
    273 
    274 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    275 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    276 
    277 #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    278 
    279 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    280 
    281 #define UHCI_INTR_ENDPT 1
    282 
    283 const struct usbd_bus_methods uhci_bus_methods = {
    284 	uhci_open,
    285 	uhci_softintr,
    286 	uhci_poll,
    287 	uhci_allocm,
    288 	uhci_freem,
    289 	uhci_allocx,
    290 	uhci_freex,
    291 	NULL, /* uhci_get_locks */
    292 };
    293 
    294 const struct usbd_pipe_methods uhci_root_ctrl_methods = {
    295 	uhci_root_ctrl_transfer,
    296 	uhci_root_ctrl_start,
    297 	uhci_root_ctrl_abort,
    298 	uhci_root_ctrl_close,
    299 	uhci_noop,
    300 	uhci_root_ctrl_done,
    301 };
    302 
    303 const struct usbd_pipe_methods uhci_root_intr_methods = {
    304 	uhci_root_intr_transfer,
    305 	uhci_root_intr_start,
    306 	uhci_root_intr_abort,
    307 	uhci_root_intr_close,
    308 	uhci_noop,
    309 	uhci_root_intr_done,
    310 };
    311 
    312 const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    313 	uhci_device_ctrl_transfer,
    314 	uhci_device_ctrl_start,
    315 	uhci_device_ctrl_abort,
    316 	uhci_device_ctrl_close,
    317 	uhci_noop,
    318 	uhci_device_ctrl_done,
    319 };
    320 
    321 const struct usbd_pipe_methods uhci_device_intr_methods = {
    322 	uhci_device_intr_transfer,
    323 	uhci_device_intr_start,
    324 	uhci_device_intr_abort,
    325 	uhci_device_intr_close,
    326 	uhci_device_clear_toggle,
    327 	uhci_device_intr_done,
    328 };
    329 
    330 const struct usbd_pipe_methods uhci_device_bulk_methods = {
    331 	uhci_device_bulk_transfer,
    332 	uhci_device_bulk_start,
    333 	uhci_device_bulk_abort,
    334 	uhci_device_bulk_close,
    335 	uhci_device_clear_toggle,
    336 	uhci_device_bulk_done,
    337 };
    338 
    339 const struct usbd_pipe_methods uhci_device_isoc_methods = {
    340 	uhci_device_isoc_transfer,
    341 	uhci_device_isoc_start,
    342 	uhci_device_isoc_abort,
    343 	uhci_device_isoc_close,
    344 	uhci_noop,
    345 	uhci_device_isoc_done,
    346 };
    347 
    348 #define uhci_add_intr_info(sc, ii) \
    349 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    350 #define uhci_del_intr_info(ii) \
    351 	do { \
    352 		LIST_REMOVE((ii), list); \
    353 		(ii)->list.le_prev = NULL; \
    354 	} while (0)
    355 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    356 
    357 static inline uhci_soft_qh_t *
    358 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    359 {
    360 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    361 
    362 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    363 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    364 		usb_syncmem(&pqh->dma,
    365 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    366 		    sizeof(pqh->qh.qh_hlink),
    367 		    BUS_DMASYNC_POSTWRITE);
    368 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    369 			printf("uhci_find_prev_qh: QH not found\n");
    370 			return (NULL);
    371 		}
    372 #endif
    373 	}
    374 	return (pqh);
    375 }
    376 
    377 void
    378 uhci_globalreset(uhci_softc_t *sc)
    379 {
    380 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    381 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    382 	UHCICMD(sc, 0);			/* do nothing */
    383 }
    384 
    385 usbd_status
    386 uhci_init(uhci_softc_t *sc)
    387 {
    388 	usbd_status err;
    389 	int i, j;
    390 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    391 	uhci_soft_td_t *std;
    392 
    393 	DPRINTFN(1,("uhci_init: start\n"));
    394 
    395 #ifdef UHCI_DEBUG
    396 	thesc = sc;
    397 
    398 	if (uhcidebug > 2)
    399 		uhci_dumpregs(sc);
    400 #endif
    401 
    402 	sc->sc_suspend = PWR_RESUME;
    403 
    404 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    405 	uhci_globalreset(sc);			/* reset the controller */
    406 	uhci_reset(sc);
    407 
    408 	usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    409 	    USB_MEM_RESERVE);
    410 
    411 	/* Allocate and initialize real frame array. */
    412 	err = usb_allocmem(&sc->sc_bus,
    413 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    414 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    415 	if (err)
    416 		return (err);
    417 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    418 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    419 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    420 
    421 	/*
    422 	 * Allocate a TD, inactive, that hangs from the last QH.
    423 	 * This is to avoid a bug in the PIIX that makes it run berserk
    424 	 * otherwise.
    425 	 */
    426 	std = uhci_alloc_std(sc);
    427 	if (std == NULL)
    428 		return (USBD_NOMEM);
    429 	std->link.std = NULL;
    430 	std->td.td_link = htole32(UHCI_PTR_T);
    431 	std->td.td_status = htole32(0); /* inactive */
    432 	std->td.td_token = htole32(0);
    433 	std->td.td_buffer = htole32(0);
    434 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    435 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    436 
    437 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    438 	lsqh = uhci_alloc_sqh(sc);
    439 	if (lsqh == NULL)
    440 		return (USBD_NOMEM);
    441 	lsqh->hlink = NULL;
    442 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    443 	lsqh->elink = std;
    444 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    445 	sc->sc_last_qh = lsqh;
    446 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    447 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    448 
    449 	/* Allocate the dummy QH where bulk traffic will be queued. */
    450 	bsqh = uhci_alloc_sqh(sc);
    451 	if (bsqh == NULL)
    452 		return (USBD_NOMEM);
    453 	bsqh->hlink = lsqh;
    454 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    455 	bsqh->elink = NULL;
    456 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    457 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    458 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    459 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    460 
    461 	/* Allocate dummy QH where high speed control traffic will be queued. */
    462 	chsqh = uhci_alloc_sqh(sc);
    463 	if (chsqh == NULL)
    464 		return (USBD_NOMEM);
    465 	chsqh->hlink = bsqh;
    466 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    467 	chsqh->elink = NULL;
    468 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    469 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    470 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    471 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    472 
    473 	/* Allocate dummy QH where control traffic will be queued. */
    474 	clsqh = uhci_alloc_sqh(sc);
    475 	if (clsqh == NULL)
    476 		return (USBD_NOMEM);
    477 	clsqh->hlink = chsqh;
    478 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    479 	clsqh->elink = NULL;
    480 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    481 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    482 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    483 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    484 
    485 	/*
    486 	 * Make all (virtual) frame list pointers point to the interrupt
    487 	 * queue heads and the interrupt queue heads at the control
    488 	 * queue head and point the physical frame list to the virtual.
    489 	 */
    490 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    491 		std = uhci_alloc_std(sc);
    492 		sqh = uhci_alloc_sqh(sc);
    493 		if (std == NULL || sqh == NULL)
    494 			return (USBD_NOMEM);
    495 		std->link.sqh = sqh;
    496 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    497 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    498 		std->td.td_token = htole32(0);
    499 		std->td.td_buffer = htole32(0);
    500 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    501 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    502 		sqh->hlink = clsqh;
    503 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    504 		sqh->elink = NULL;
    505 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    506 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    507 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    508 		sc->sc_vframes[i].htd = std;
    509 		sc->sc_vframes[i].etd = std;
    510 		sc->sc_vframes[i].hqh = sqh;
    511 		sc->sc_vframes[i].eqh = sqh;
    512 		for (j = i;
    513 		     j < UHCI_FRAMELIST_COUNT;
    514 		     j += UHCI_VFRAMELIST_COUNT)
    515 			sc->sc_pframes[j] = htole32(std->physaddr);
    516 	}
    517 	usb_syncmem(&sc->sc_dma, 0,
    518 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    519 	    BUS_DMASYNC_PREWRITE);
    520 
    521 
    522 	LIST_INIT(&sc->sc_intrhead);
    523 
    524 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    525 
    526 	callout_init(&sc->sc_poll_handle, 0);
    527 
    528 	/* Set up the bus struct. */
    529 	sc->sc_bus.methods = &uhci_bus_methods;
    530 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    531 
    532 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    533 
    534 	DPRINTFN(1,("uhci_init: enabling\n"));
    535 
    536 	err =  uhci_run(sc, 1);		/* and here we go... */
    537 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    538 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    539 	return err;
    540 }
    541 
    542 int
    543 uhci_activate(device_t self, enum devact act)
    544 {
    545 	struct uhci_softc *sc = device_private(self);
    546 
    547 	switch (act) {
    548 	case DVACT_DEACTIVATE:
    549 		sc->sc_dying = 1;
    550 		return 0;
    551 	default:
    552 		return EOPNOTSUPP;
    553 	}
    554 }
    555 
    556 void
    557 uhci_childdet(device_t self, device_t child)
    558 {
    559 	struct uhci_softc *sc = device_private(self);
    560 
    561 	KASSERT(sc->sc_child == child);
    562 	sc->sc_child = NULL;
    563 }
    564 
    565 int
    566 uhci_detach(struct uhci_softc *sc, int flags)
    567 {
    568 	usbd_xfer_handle xfer;
    569 	int rv = 0;
    570 
    571 	if (sc->sc_child != NULL)
    572 		rv = config_detach(sc->sc_child, flags);
    573 
    574 	if (rv != 0)
    575 		return (rv);
    576 
    577 	/* Free all xfers associated with this HC. */
    578 	for (;;) {
    579 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    580 		if (xfer == NULL)
    581 			break;
    582 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    583 		free(xfer, M_USB);
    584 	}
    585 
    586 	callout_halt(&sc->sc_poll_handle, NULL);
    587 	callout_destroy(&sc->sc_poll_handle);
    588 
    589 	/* XXX free other data structures XXX */
    590 
    591 	return (rv);
    592 }
    593 
    594 usbd_status
    595 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    596 {
    597 	struct uhci_softc *sc = bus->hci_private;
    598 	usbd_status status;
    599 	u_int32_t n;
    600 
    601 	/*
    602 	 * XXX
    603 	 * Since we are allocating a buffer we can assume that we will
    604 	 * need TDs for it.  Since we don't want to allocate those from
    605 	 * an interrupt context, we allocate them here and free them again.
    606 	 * This is no guarantee that we'll get the TDs next time...
    607 	 */
    608 	n = size / 8;
    609 	if (n > 16) {
    610 		u_int32_t i;
    611 		uhci_soft_td_t **stds;
    612 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
    613 		stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
    614 		    M_WAITOK|M_ZERO);
    615 		for(i=0; i < n; i++)
    616 			stds[i] = uhci_alloc_std(sc);
    617 		for(i=0; i < n; i++)
    618 			if (stds[i] != NULL)
    619 				uhci_free_std(sc, stds[i]);
    620 		free(stds, M_TEMP);
    621 	}
    622 
    623 
    624 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
    625 	if (status == USBD_NOMEM)
    626 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
    627 	return status;
    628 }
    629 
    630 void
    631 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    632 {
    633 	if (dma->block->flags & USB_DMA_RESERVE) {
    634 		usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
    635 		    dma);
    636 		return;
    637 	}
    638 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
    639 }
    640 
    641 usbd_xfer_handle
    642 uhci_allocx(struct usbd_bus *bus)
    643 {
    644 	struct uhci_softc *sc = bus->hci_private;
    645 	usbd_xfer_handle xfer;
    646 
    647 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    648 	if (xfer != NULL) {
    649 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    650 #ifdef DIAGNOSTIC
    651 		if (xfer->busy_free != XFER_FREE) {
    652 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    653 			       xfer->busy_free);
    654 		}
    655 #endif
    656 	} else {
    657 		xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
    658 	}
    659 	if (xfer != NULL) {
    660 		memset(xfer, 0, sizeof (struct uhci_xfer));
    661 		UXFER(xfer)->iinfo.sc = sc;
    662 #ifdef DIAGNOSTIC
    663 		UXFER(xfer)->iinfo.isdone = 1;
    664 		xfer->busy_free = XFER_BUSY;
    665 #endif
    666 	}
    667 	return (xfer);
    668 }
    669 
    670 void
    671 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    672 {
    673 	struct uhci_softc *sc = bus->hci_private;
    674 
    675 #ifdef DIAGNOSTIC
    676 	if (xfer->busy_free != XFER_BUSY) {
    677 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    678 		       xfer->busy_free);
    679 	}
    680 	xfer->busy_free = XFER_FREE;
    681 	if (!UXFER(xfer)->iinfo.isdone) {
    682 		printf("uhci_freex: !isdone\n");
    683 	}
    684 #endif
    685 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    686 }
    687 
    688 /*
    689  * Handle suspend/resume.
    690  *
    691  * We need to switch to polling mode here, because this routine is
    692  * called from an interrupt context.  This is all right since we
    693  * are almost suspended anyway.
    694  */
    695 bool
    696 uhci_resume(device_t dv, const pmf_qual_t *qual)
    697 {
    698 	uhci_softc_t *sc = device_private(dv);
    699 	int cmd;
    700 	int s;
    701 
    702 	s = splhardusb();
    703 
    704 	cmd = UREAD2(sc, UHCI_CMD);
    705 	sc->sc_bus.use_polling++;
    706 	UWRITE2(sc, UHCI_INTR, 0);
    707 	uhci_globalreset(sc);
    708 	uhci_reset(sc);
    709 	if (cmd & UHCI_CMD_RS)
    710 		uhci_run(sc, 0);
    711 
    712 	/* restore saved state */
    713 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    714 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    715 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    716 
    717 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
    718 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    719 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    720 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
    721 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
    722 	UHCICMD(sc, UHCI_CMD_MAXP);
    723 	uhci_run(sc, 1); /* and start traffic again */
    724 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    725 	sc->sc_bus.use_polling--;
    726 	if (sc->sc_intr_xfer != NULL)
    727 		callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
    728 		    sc->sc_intr_xfer);
    729 #ifdef UHCI_DEBUG
    730 	if (uhcidebug > 2)
    731 		uhci_dumpregs(sc);
    732 #endif
    733 
    734 	sc->sc_suspend = PWR_RESUME;
    735 	splx(s);
    736 
    737 	return true;
    738 }
    739 
    740 bool
    741 uhci_suspend(device_t dv, const pmf_qual_t *qual)
    742 {
    743 	uhci_softc_t *sc = device_private(dv);
    744 	int cmd;
    745 	int s;
    746 
    747 	s = splhardusb();
    748 
    749 	cmd = UREAD2(sc, UHCI_CMD);
    750 
    751 #ifdef UHCI_DEBUG
    752 	if (uhcidebug > 2)
    753 		uhci_dumpregs(sc);
    754 #endif
    755 	if (sc->sc_intr_xfer != NULL)
    756 		callout_stop(&sc->sc_poll_handle);
    757 	sc->sc_suspend = PWR_SUSPEND;
    758 	sc->sc_bus.use_polling++;
    759 
    760 	uhci_run(sc, 0); /* stop the controller */
    761 	cmd &= ~UHCI_CMD_RS;
    762 
    763 	/* save some state if BIOS doesn't */
    764 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    765 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    766 
    767 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    768 
    769 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
    770 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    771 	sc->sc_bus.use_polling--;
    772 
    773 	splx(s);
    774 
    775 	return true;
    776 }
    777 
    778 #ifdef UHCI_DEBUG
    779 Static void
    780 uhci_dumpregs(uhci_softc_t *sc)
    781 {
    782 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    783 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    784 		     device_xname(sc->sc_dev),
    785 		     UREAD2(sc, UHCI_CMD),
    786 		     UREAD2(sc, UHCI_STS),
    787 		     UREAD2(sc, UHCI_INTR),
    788 		     UREAD2(sc, UHCI_FRNUM),
    789 		     UREAD4(sc, UHCI_FLBASEADDR),
    790 		     UREAD1(sc, UHCI_SOF),
    791 		     UREAD2(sc, UHCI_PORTSC1),
    792 		     UREAD2(sc, UHCI_PORTSC2)));
    793 }
    794 
    795 void
    796 uhci_dump_td(uhci_soft_td_t *p)
    797 {
    798 	char sbuf[128], sbuf2[128];
    799 
    800 
    801 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    802 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    803 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    804 		     "token=0x%08lx buffer=0x%08lx\n",
    805 		     p, (long)p->physaddr,
    806 		     (long)le32toh(p->td.td_link),
    807 		     (long)le32toh(p->td.td_status),
    808 		     (long)le32toh(p->td.td_token),
    809 		     (long)le32toh(p->td.td_buffer)));
    810 
    811 	snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF",
    812 	    (u_int32_t)le32toh(p->td.td_link));
    813 	snprintb(sbuf2, sizeof(sbuf2),
    814 	    "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    815 	    "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    816 	    (u_int32_t)le32toh(p->td.td_status));
    817 
    818 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    819 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    820 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    821 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    822 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    823 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    824 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    825 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    826 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    827 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    828 	    BUS_DMASYNC_PREREAD);
    829 }
    830 
    831 void
    832 uhci_dump_qh(uhci_soft_qh_t *sqh)
    833 {
    834 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    835 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    836 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    837 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    838 	    le32toh(sqh->qh.qh_elink)));
    839 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    840 }
    841 
    842 
    843 #if 1
    844 void
    845 uhci_dump(void)
    846 {
    847 	uhci_dump_all(thesc);
    848 }
    849 #endif
    850 
    851 void
    852 uhci_dump_all(uhci_softc_t *sc)
    853 {
    854 	uhci_dumpregs(sc);
    855 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
    856 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    857 	uhci_dump_qh(sc->sc_lctl_start);
    858 }
    859 
    860 
    861 void
    862 uhci_dump_qhs(uhci_soft_qh_t *sqh)
    863 {
    864 	uhci_dump_qh(sqh);
    865 
    866 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    867 	 * Traverses sideways first, then down.
    868 	 *
    869 	 * QH1
    870 	 * QH2
    871 	 * No QH
    872 	 * TD2.1
    873 	 * TD2.2
    874 	 * TD1.1
    875 	 * etc.
    876 	 *
    877 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    878 	 */
    879 
    880 
    881 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    882 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    883 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    884 		uhci_dump_qhs(sqh->hlink);
    885 	else
    886 		DPRINTF(("No QH\n"));
    887 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    888 
    889 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    890 		uhci_dump_tds(sqh->elink);
    891 	else
    892 		DPRINTF(("No TD\n"));
    893 }
    894 
    895 void
    896 uhci_dump_tds(uhci_soft_td_t *std)
    897 {
    898 	uhci_soft_td_t *td;
    899 	int stop;
    900 
    901 	for(td = std; td != NULL; td = td->link.std) {
    902 		uhci_dump_td(td);
    903 
    904 		/* Check whether the link pointer in this TD marks
    905 		 * the link pointer as end of queue. This avoids
    906 		 * printing the free list in case the queue/TD has
    907 		 * already been moved there (seatbelt).
    908 		 */
    909 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    910 		    sizeof(td->td.td_link),
    911 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    912 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    913 			le32toh(td->td.td_link) == 0);
    914 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    915 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    916 		if (stop)
    917 			break;
    918 	}
    919 }
    920 
    921 Static void
    922 uhci_dump_ii(uhci_intr_info_t *ii)
    923 {
    924 	usbd_pipe_handle pipe;
    925 	usb_endpoint_descriptor_t *ed;
    926 	usbd_device_handle dev;
    927 
    928 #ifdef DIAGNOSTIC
    929 #define DONE ii->isdone
    930 #else
    931 #define DONE 0
    932 #endif
    933         if (ii == NULL) {
    934                 printf("ii NULL\n");
    935                 return;
    936         }
    937         if (ii->xfer == NULL) {
    938 		printf("ii %p: done=%d xfer=NULL\n",
    939 		       ii, DONE);
    940                 return;
    941         }
    942         pipe = ii->xfer->pipe;
    943         if (pipe == NULL) {
    944 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    945 		       ii, DONE, ii->xfer);
    946                 return;
    947 	}
    948         if (pipe->endpoint == NULL) {
    949 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
    950 		       ii, DONE, ii->xfer, pipe);
    951                 return;
    952 	}
    953         if (pipe->device == NULL) {
    954 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
    955 		       ii, DONE, ii->xfer, pipe);
    956                 return;
    957 	}
    958         ed = pipe->endpoint->edesc;
    959         dev = pipe->device;
    960 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    961 	       ii, DONE, ii->xfer, dev,
    962 	       UGETW(dev->ddesc.idVendor),
    963 	       UGETW(dev->ddesc.idProduct),
    964 	       dev->address, pipe,
    965 	       ed->bEndpointAddress, ed->bmAttributes);
    966 #undef DONE
    967 }
    968 
    969 void uhci_dump_iis(struct uhci_softc *sc);
    970 void
    971 uhci_dump_iis(struct uhci_softc *sc)
    972 {
    973 	uhci_intr_info_t *ii;
    974 
    975 	printf("intr_info list:\n");
    976 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
    977 		uhci_dump_ii(ii);
    978 }
    979 
    980 void iidump(void);
    981 void iidump(void) { uhci_dump_iis(thesc); }
    982 
    983 #endif
    984 
    985 /*
    986  * This routine is executed periodically and simulates interrupts
    987  * from the root controller interrupt pipe for port status change.
    988  */
    989 void
    990 uhci_poll_hub(void *addr)
    991 {
    992 	usbd_xfer_handle xfer = addr;
    993 	usbd_pipe_handle pipe = xfer->pipe;
    994 	uhci_softc_t *sc;
    995 	int s;
    996 	u_char *p;
    997 
    998 	DPRINTFN(20, ("uhci_poll_hub\n"));
    999 
   1000 	if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL))
   1001 		return;	/* device has detached */
   1002 	sc = pipe->device->bus->hci_private;
   1003 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1004 
   1005 	p = KERNADDR(&xfer->dmabuf, 0);
   1006 	p[0] = 0;
   1007 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1008 		p[0] |= 1<<1;
   1009 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1010 		p[0] |= 1<<2;
   1011 	if (p[0] == 0)
   1012 		/* No change, try again in a while */
   1013 		return;
   1014 
   1015 	xfer->actlen = 1;
   1016 	xfer->status = USBD_NORMAL_COMPLETION;
   1017 	s = splusb();
   1018 	xfer->device->bus->intr_context++;
   1019 	usb_transfer_complete(xfer);
   1020 	xfer->device->bus->intr_context--;
   1021 	splx(s);
   1022 }
   1023 
   1024 void
   1025 uhci_root_intr_done(usbd_xfer_handle xfer)
   1026 {
   1027 }
   1028 
   1029 void
   1030 uhci_root_ctrl_done(usbd_xfer_handle xfer)
   1031 {
   1032 }
   1033 
   1034 /*
   1035  * Let the last QH loop back to the high speed control transfer QH.
   1036  * This is what intel calls "bandwidth reclamation" and improves
   1037  * USB performance a lot for some devices.
   1038  * If we are already looping, just count it.
   1039  */
   1040 void
   1041 uhci_add_loop(uhci_softc_t *sc) {
   1042 #ifdef UHCI_DEBUG
   1043 	if (uhcinoloop)
   1044 		return;
   1045 #endif
   1046 	if (++sc->sc_loops == 1) {
   1047 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1048 		/* Note, we don't loop back the soft pointer. */
   1049 		sc->sc_last_qh->qh.qh_hlink =
   1050 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1051 		usb_syncmem(&sc->sc_last_qh->dma,
   1052 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1053 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1054 		    BUS_DMASYNC_PREWRITE);
   1055 	}
   1056 }
   1057 
   1058 void
   1059 uhci_rem_loop(uhci_softc_t *sc) {
   1060 #ifdef UHCI_DEBUG
   1061 	if (uhcinoloop)
   1062 		return;
   1063 #endif
   1064 	if (--sc->sc_loops == 0) {
   1065 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1066 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1067 		usb_syncmem(&sc->sc_last_qh->dma,
   1068 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1069 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1070 		    BUS_DMASYNC_PREWRITE);
   1071 	}
   1072 }
   1073 
   1074 /* Add high speed control QH, called at splusb(). */
   1075 void
   1076 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1077 {
   1078 	uhci_soft_qh_t *eqh;
   1079 
   1080 	SPLUSBCHECK;
   1081 
   1082 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1083 	eqh = sc->sc_hctl_end;
   1084 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1085 	    sizeof(eqh->qh.qh_hlink),
   1086 	    BUS_DMASYNC_POSTWRITE);
   1087 	sqh->hlink       = eqh->hlink;
   1088 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1089 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1090 	    BUS_DMASYNC_PREWRITE);
   1091 	eqh->hlink       = sqh;
   1092 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1093 	sc->sc_hctl_end = sqh;
   1094 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1095 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1096 #ifdef UHCI_CTL_LOOP
   1097 	uhci_add_loop(sc);
   1098 #endif
   1099 }
   1100 
   1101 /* Remove high speed control QH, called at splusb(). */
   1102 void
   1103 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1104 {
   1105 	uhci_soft_qh_t *pqh;
   1106 
   1107 	SPLUSBCHECK;
   1108 
   1109 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1110 #ifdef UHCI_CTL_LOOP
   1111 	uhci_rem_loop(sc);
   1112 #endif
   1113 	/*
   1114 	 * The T bit should be set in the elink of the QH so that the HC
   1115 	 * doesn't follow the pointer.  This condition may fail if the
   1116 	 * the transferred packet was short so that the QH still points
   1117 	 * at the last used TD.
   1118 	 * In this case we set the T bit and wait a little for the HC
   1119 	 * to stop looking at the TD.
   1120 	 * Note that if the TD chain is large enough, the controller
   1121 	 * may still be looking at the chain at the end of this function.
   1122 	 * uhci_free_std_chain() will make sure the controller stops
   1123 	 * looking at it quickly, but until then we should not change
   1124 	 * sqh->hlink.
   1125 	 */
   1126 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1127 	    sizeof(sqh->qh.qh_elink),
   1128 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1129 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1130 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1131 		usb_syncmem(&sqh->dma,
   1132 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1133 		    sizeof(sqh->qh.qh_elink),
   1134 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1135 		delay(UHCI_QH_REMOVE_DELAY);
   1136 	}
   1137 
   1138 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1139 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1140 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1141 	pqh->hlink = sqh->hlink;
   1142 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1143 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1144 	    sizeof(pqh->qh.qh_hlink),
   1145 	    BUS_DMASYNC_PREWRITE);
   1146 	delay(UHCI_QH_REMOVE_DELAY);
   1147 	if (sc->sc_hctl_end == sqh)
   1148 		sc->sc_hctl_end = pqh;
   1149 }
   1150 
   1151 /* Add low speed control QH, called at splusb(). */
   1152 void
   1153 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1154 {
   1155 	uhci_soft_qh_t *eqh;
   1156 
   1157 	SPLUSBCHECK;
   1158 
   1159 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1160 	eqh = sc->sc_lctl_end;
   1161 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1162 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1163 	sqh->hlink = eqh->hlink;
   1164 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1165 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1166 	    BUS_DMASYNC_PREWRITE);
   1167 	eqh->hlink = sqh;
   1168 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1169 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1170 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1171 	sc->sc_lctl_end = sqh;
   1172 }
   1173 
   1174 /* Remove low speed control QH, called at splusb(). */
   1175 void
   1176 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1177 {
   1178 	uhci_soft_qh_t *pqh;
   1179 
   1180 	SPLUSBCHECK;
   1181 
   1182 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1183 	/* See comment in uhci_remove_hs_ctrl() */
   1184 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1185 	    sizeof(sqh->qh.qh_elink),
   1186 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1187 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1188 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1189 		usb_syncmem(&sqh->dma,
   1190 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1191 		    sizeof(sqh->qh.qh_elink),
   1192 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1193 		delay(UHCI_QH_REMOVE_DELAY);
   1194 	}
   1195 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1196 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1197 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1198 	pqh->hlink = sqh->hlink;
   1199 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1200 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1201 	    sizeof(pqh->qh.qh_hlink),
   1202 	    BUS_DMASYNC_PREWRITE);
   1203 	delay(UHCI_QH_REMOVE_DELAY);
   1204 	if (sc->sc_lctl_end == sqh)
   1205 		sc->sc_lctl_end = pqh;
   1206 }
   1207 
   1208 /* Add bulk QH, called at splusb(). */
   1209 void
   1210 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1211 {
   1212 	uhci_soft_qh_t *eqh;
   1213 
   1214 	SPLUSBCHECK;
   1215 
   1216 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1217 	eqh = sc->sc_bulk_end;
   1218 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1219 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1220 	sqh->hlink = eqh->hlink;
   1221 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1222 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1223 	    BUS_DMASYNC_PREWRITE);
   1224 	eqh->hlink = sqh;
   1225 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1226 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1227 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1228 	sc->sc_bulk_end = sqh;
   1229 	uhci_add_loop(sc);
   1230 }
   1231 
   1232 /* Remove bulk QH, called at splusb(). */
   1233 void
   1234 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1235 {
   1236 	uhci_soft_qh_t *pqh;
   1237 
   1238 	SPLUSBCHECK;
   1239 
   1240 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1241 	uhci_rem_loop(sc);
   1242 	/* See comment in uhci_remove_hs_ctrl() */
   1243 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1244 	    sizeof(sqh->qh.qh_elink),
   1245 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1246 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1247 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1248 		usb_syncmem(&sqh->dma,
   1249 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1250 		    sizeof(sqh->qh.qh_elink),
   1251 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1252 		delay(UHCI_QH_REMOVE_DELAY);
   1253 	}
   1254 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1255 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1256 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1257 	pqh->hlink       = sqh->hlink;
   1258 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1259 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1260 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1261 	delay(UHCI_QH_REMOVE_DELAY);
   1262 	if (sc->sc_bulk_end == sqh)
   1263 		sc->sc_bulk_end = pqh;
   1264 }
   1265 
   1266 Static int uhci_intr1(uhci_softc_t *);
   1267 
   1268 int
   1269 uhci_intr(void *arg)
   1270 {
   1271 	uhci_softc_t *sc = arg;
   1272 
   1273 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1274 		return (0);
   1275 
   1276 	if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) {
   1277 #ifdef DIAGNOSTIC
   1278 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
   1279 #endif
   1280 		return (0);
   1281 	}
   1282 
   1283 	return (uhci_intr1(sc));
   1284 }
   1285 
   1286 int
   1287 uhci_intr1(uhci_softc_t *sc)
   1288 {
   1289 	int status;
   1290 	int ack;
   1291 
   1292 #ifdef UHCI_DEBUG
   1293 	if (uhcidebug > 15) {
   1294 		DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
   1295 		uhci_dumpregs(sc);
   1296 	}
   1297 #endif
   1298 
   1299 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1300 	if (status == 0)	/* The interrupt was not for us. */
   1301 		return (0);
   1302 
   1303 	if (sc->sc_suspend != PWR_RESUME) {
   1304 #ifdef DIAGNOSTIC
   1305 		printf("%s: interrupt while not operating ignored\n",
   1306 		       device_xname(sc->sc_dev));
   1307 #endif
   1308 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1309 		return (0);
   1310 	}
   1311 
   1312 	ack = 0;
   1313 	if (status & UHCI_STS_USBINT)
   1314 		ack |= UHCI_STS_USBINT;
   1315 	if (status & UHCI_STS_USBEI)
   1316 		ack |= UHCI_STS_USBEI;
   1317 	if (status & UHCI_STS_RD) {
   1318 		ack |= UHCI_STS_RD;
   1319 #ifdef UHCI_DEBUG
   1320 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1321 #endif
   1322 	}
   1323 	if (status & UHCI_STS_HSE) {
   1324 		ack |= UHCI_STS_HSE;
   1325 		printf("%s: host system error\n", device_xname(sc->sc_dev));
   1326 	}
   1327 	if (status & UHCI_STS_HCPE) {
   1328 		ack |= UHCI_STS_HCPE;
   1329 		printf("%s: host controller process error\n",
   1330 		       device_xname(sc->sc_dev));
   1331 	}
   1332 
   1333 	/* When HCHalted=1 and Run/Stop=0 , it is normal */
   1334 	if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) {
   1335 		/* no acknowledge needed */
   1336 		if (!sc->sc_dying) {
   1337 			printf("%s: host controller halted\n",
   1338 			    device_xname(sc->sc_dev));
   1339 #ifdef UHCI_DEBUG
   1340 			uhci_dump_all(sc);
   1341 #endif
   1342 		}
   1343 		sc->sc_dying = 1;
   1344 	}
   1345 
   1346 	if (!ack)
   1347 		return (0);	/* nothing to acknowledge */
   1348 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1349 
   1350 	sc->sc_bus.no_intrs++;
   1351 	usb_schedsoftintr(&sc->sc_bus);
   1352 
   1353 	DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
   1354 
   1355 	return (1);
   1356 }
   1357 
   1358 void
   1359 uhci_softintr(void *v)
   1360 {
   1361 	struct usbd_bus *bus = v;
   1362 	uhci_softc_t *sc = bus->hci_private;
   1363 	uhci_intr_info_t *ii, *nextii;
   1364 
   1365 	DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev),
   1366 		     sc->sc_bus.intr_context));
   1367 
   1368 	sc->sc_bus.intr_context++;
   1369 
   1370 	/*
   1371 	 * Interrupts on UHCI really suck.  When the host controller
   1372 	 * interrupts because a transfer is completed there is no
   1373 	 * way of knowing which transfer it was.  You can scan down
   1374 	 * the TDs and QHs of the previous frame to limit the search,
   1375 	 * but that assumes that the interrupt was not delayed by more
   1376 	 * than 1 ms, which may not always be true (e.g. after debug
   1377 	 * output on a slow console).
   1378 	 * We scan all interrupt descriptors to see if any have
   1379 	 * completed.
   1380 	 */
   1381 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1382 		nextii = LIST_NEXT(ii, list);
   1383 		uhci_check_intr(sc, ii);
   1384 	}
   1385 
   1386 #ifdef USB_USE_SOFTINTR
   1387 	if (sc->sc_softwake) {
   1388 		sc->sc_softwake = 0;
   1389 		wakeup(&sc->sc_softwake);
   1390 	}
   1391 #endif /* USB_USE_SOFTINTR */
   1392 
   1393 	sc->sc_bus.intr_context--;
   1394 }
   1395 
   1396 /* Check for an interrupt. */
   1397 void
   1398 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1399 {
   1400 	uhci_soft_td_t *std, *lstd;
   1401 	u_int32_t status;
   1402 
   1403 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1404 #ifdef DIAGNOSTIC
   1405 	if (ii == NULL) {
   1406 		printf("uhci_check_intr: no ii? %p\n", ii);
   1407 		return;
   1408 	}
   1409 #endif
   1410 	if (ii->xfer->status == USBD_CANCELLED ||
   1411 	    ii->xfer->status == USBD_TIMEOUT) {
   1412 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1413 		return;
   1414 	}
   1415 
   1416 	if (ii->stdstart == NULL)
   1417 		return;
   1418 	lstd = ii->stdend;
   1419 #ifdef DIAGNOSTIC
   1420 	if (lstd == NULL) {
   1421 		printf("uhci_check_intr: std==0\n");
   1422 		return;
   1423 	}
   1424 #endif
   1425 	/*
   1426 	 * If the last TD is still active we need to check whether there
   1427 	 * is an error somewhere in the middle, or whether there was a
   1428 	 * short packet (SPD and not ACTIVE).
   1429 	 */
   1430 	usb_syncmem(&lstd->dma,
   1431 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1432 	    sizeof(lstd->td.td_status),
   1433 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1434 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1435 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1436 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1437 			usb_syncmem(&std->dma,
   1438 			    std->offs + offsetof(uhci_td_t, td_status),
   1439 			    sizeof(std->td.td_status),
   1440 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1441 			status = le32toh(std->td.td_status);
   1442 			usb_syncmem(&std->dma,
   1443 			    std->offs + offsetof(uhci_td_t, td_status),
   1444 			    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1445 			/* If there's an active TD the xfer isn't done. */
   1446 			if (status & UHCI_TD_ACTIVE)
   1447 				break;
   1448 			/* Any kind of error makes the xfer done. */
   1449 			if (status & UHCI_TD_STALLED)
   1450 				goto done;
   1451 			/* We want short packets, and it is short: it's done */
   1452 			usb_syncmem(&std->dma,
   1453 			    std->offs + offsetof(uhci_td_t, td_token),
   1454 			    sizeof(std->td.td_token),
   1455 			    BUS_DMASYNC_POSTWRITE);
   1456 			if ((status & UHCI_TD_SPD) &&
   1457 			      UHCI_TD_GET_ACTLEN(status) <
   1458 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1459 				goto done;
   1460 		}
   1461 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1462 			      ii, ii->stdstart));
   1463 		usb_syncmem(&lstd->dma,
   1464 		    lstd->offs + offsetof(uhci_td_t, td_status),
   1465 		    sizeof(lstd->td.td_status),
   1466 		    BUS_DMASYNC_PREREAD);
   1467 		return;
   1468 	}
   1469  done:
   1470 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1471 	callout_stop(&ii->xfer->timeout_handle);
   1472 	uhci_idone(ii);
   1473 }
   1474 
   1475 /* Called at splusb() */
   1476 void
   1477 uhci_idone(uhci_intr_info_t *ii)
   1478 {
   1479 	usbd_xfer_handle xfer = ii->xfer;
   1480 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1481 	uhci_soft_td_t *std;
   1482 	u_int32_t status = 0, nstatus;
   1483 	int actlen;
   1484 
   1485 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1486 #ifdef DIAGNOSTIC
   1487 	{
   1488 		int s = splhigh();
   1489 		if (ii->isdone) {
   1490 			splx(s);
   1491 #ifdef UHCI_DEBUG
   1492 			printf("uhci_idone: ii is done!\n   ");
   1493 			uhci_dump_ii(ii);
   1494 #else
   1495 			printf("uhci_idone: ii=%p is done!\n", ii);
   1496 #endif
   1497 			return;
   1498 		}
   1499 		ii->isdone = 1;
   1500 		splx(s);
   1501 	}
   1502 #endif
   1503 
   1504 	if (xfer->nframes != 0) {
   1505 		/* Isoc transfer, do things differently. */
   1506 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1507 		int i, n, nframes, len;
   1508 
   1509 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1510 
   1511 		nframes = xfer->nframes;
   1512 		actlen = 0;
   1513 		n = UXFER(xfer)->curframe;
   1514 		for (i = 0; i < nframes; i++) {
   1515 			std = stds[n];
   1516 #ifdef UHCI_DEBUG
   1517 			if (uhcidebug > 5) {
   1518 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1519 				uhci_dump_td(std);
   1520 			}
   1521 #endif
   1522 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1523 				n = 0;
   1524 			usb_syncmem(&std->dma,
   1525 			    std->offs + offsetof(uhci_td_t, td_status),
   1526 			    sizeof(std->td.td_status),
   1527 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1528 			status = le32toh(std->td.td_status);
   1529 			len = UHCI_TD_GET_ACTLEN(status);
   1530 			xfer->frlengths[i] = len;
   1531 			actlen += len;
   1532 		}
   1533 		upipe->u.iso.inuse -= nframes;
   1534 		xfer->actlen = actlen;
   1535 		xfer->status = USBD_NORMAL_COMPLETION;
   1536 		goto end;
   1537 	}
   1538 
   1539 #ifdef UHCI_DEBUG
   1540 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1541 		      ii, xfer, upipe));
   1542 	if (uhcidebug > 10)
   1543 		uhci_dump_tds(ii->stdstart);
   1544 #endif
   1545 
   1546 	/* The transfer is done, compute actual length and status. */
   1547 	actlen = 0;
   1548 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1549 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1550 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1551 		nstatus = le32toh(std->td.td_status);
   1552 		if (nstatus & UHCI_TD_ACTIVE)
   1553 			break;
   1554 
   1555 		status = nstatus;
   1556 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1557 			UHCI_TD_PID_SETUP)
   1558 			actlen += UHCI_TD_GET_ACTLEN(status);
   1559 		else {
   1560 			/*
   1561 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1562 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1563 			 * CONTROL AND STATUS".
   1564 			 */
   1565 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1566 				status &= ~UHCI_TD_CRCTO;
   1567 		}
   1568 	}
   1569 	/* If there are left over TDs we need to update the toggle. */
   1570 	if (std != NULL)
   1571 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1572 
   1573 	status &= UHCI_TD_ERROR;
   1574 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1575 		      actlen, status));
   1576 	xfer->actlen = actlen;
   1577 	if (status != 0) {
   1578 #ifdef UHCI_DEBUG
   1579 		char sbuf[128];
   1580 
   1581 		snprintb(sbuf, sizeof(sbuf),
   1582 		    "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1583 		    "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status);
   1584 
   1585 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1586 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1587 			  "status 0x%s\n",
   1588 			  xfer->pipe->device->address,
   1589 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1590 			  sbuf));
   1591 #endif
   1592 
   1593 		if (status == UHCI_TD_STALLED)
   1594 			xfer->status = USBD_STALLED;
   1595 		else
   1596 			xfer->status = USBD_IOERROR; /* more info XXX */
   1597 	} else {
   1598 		xfer->status = USBD_NORMAL_COMPLETION;
   1599 	}
   1600 
   1601  end:
   1602 	usb_transfer_complete(xfer);
   1603 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1604 }
   1605 
   1606 /*
   1607  * Called when a request does not complete.
   1608  */
   1609 void
   1610 uhci_timeout(void *addr)
   1611 {
   1612 	uhci_intr_info_t *ii = addr;
   1613 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1614 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1615 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   1616 
   1617 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1618 
   1619 	if (sc->sc_dying) {
   1620 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1621 		return;
   1622 	}
   1623 
   1624 	/* Execute the abort in a process context. */
   1625 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
   1626 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
   1627 	    USB_TASKQ_HC);
   1628 }
   1629 
   1630 void
   1631 uhci_timeout_task(void *addr)
   1632 {
   1633 	usbd_xfer_handle xfer = addr;
   1634 	int s;
   1635 
   1636 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1637 
   1638 	s = splusb();
   1639 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1640 	splx(s);
   1641 }
   1642 
   1643 /*
   1644  * Wait here until controller claims to have an interrupt.
   1645  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1646  * too long.
   1647  * Only used during boot when interrupts are not enabled yet.
   1648  */
   1649 void
   1650 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1651 {
   1652 	int timo = xfer->timeout;
   1653 	uhci_intr_info_t *ii;
   1654 
   1655 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1656 
   1657 	xfer->status = USBD_IN_PROGRESS;
   1658 	for (; timo >= 0; timo--) {
   1659 		usb_delay_ms(&sc->sc_bus, 1);
   1660 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1661 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1662 			uhci_intr1(sc);
   1663 			if (xfer->status != USBD_IN_PROGRESS)
   1664 				return;
   1665 		}
   1666 	}
   1667 
   1668 	/* Timeout */
   1669 	DPRINTF(("uhci_waitintr: timeout\n"));
   1670 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1671 	     ii != NULL && ii->xfer != xfer;
   1672 	     ii = LIST_NEXT(ii, list))
   1673 		;
   1674 #ifdef DIAGNOSTIC
   1675 	if (ii == NULL)
   1676 		panic("uhci_waitintr: lost intr_info");
   1677 #endif
   1678 	uhci_idone(ii);
   1679 }
   1680 
   1681 void
   1682 uhci_poll(struct usbd_bus *bus)
   1683 {
   1684 	uhci_softc_t *sc = bus->hci_private;
   1685 
   1686 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
   1687 		uhci_intr1(sc);
   1688 }
   1689 
   1690 void
   1691 uhci_reset(uhci_softc_t *sc)
   1692 {
   1693 	int n;
   1694 
   1695 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1696 	/* The reset bit goes low when the controller is done. */
   1697 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1698 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1699 		usb_delay_ms(&sc->sc_bus, 1);
   1700 	if (n >= UHCI_RESET_TIMEOUT)
   1701 		printf("%s: controller did not reset\n",
   1702 		       device_xname(sc->sc_dev));
   1703 }
   1704 
   1705 usbd_status
   1706 uhci_run(uhci_softc_t *sc, int run)
   1707 {
   1708 	int s, n, running;
   1709 	u_int16_t cmd;
   1710 
   1711 	run = run != 0;
   1712 	s = splhardusb();
   1713 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1714 	cmd = UREAD2(sc, UHCI_CMD);
   1715 	if (run)
   1716 		cmd |= UHCI_CMD_RS;
   1717 	else
   1718 		cmd &= ~UHCI_CMD_RS;
   1719 	UHCICMD(sc, cmd);
   1720 	for(n = 0; n < 10; n++) {
   1721 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1722 		/* return when we've entered the state we want */
   1723 		if (run == running) {
   1724 			splx(s);
   1725 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1726 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1727 			return (USBD_NORMAL_COMPLETION);
   1728 		}
   1729 		usb_delay_ms(&sc->sc_bus, 1);
   1730 	}
   1731 	splx(s);
   1732 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
   1733 	       run ? "start" : "stop");
   1734 	return (USBD_IOERROR);
   1735 }
   1736 
   1737 /*
   1738  * Memory management routines.
   1739  *  uhci_alloc_std allocates TDs
   1740  *  uhci_alloc_sqh allocates QHs
   1741  * These two routines do their own free list management,
   1742  * partly for speed, partly because allocating DMAable memory
   1743  * has page size granularaity so much memory would be wasted if
   1744  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1745  */
   1746 
   1747 uhci_soft_td_t *
   1748 uhci_alloc_std(uhci_softc_t *sc)
   1749 {
   1750 	uhci_soft_td_t *std;
   1751 	usbd_status err;
   1752 	int i, offs;
   1753 	usb_dma_t dma;
   1754 
   1755 	if (sc->sc_freetds == NULL) {
   1756 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1757 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1758 			  UHCI_TD_ALIGN, &dma);
   1759 		if (err)
   1760 			return (0);
   1761 		for(i = 0; i < UHCI_STD_CHUNK; i++) {
   1762 			offs = i * UHCI_STD_SIZE;
   1763 			std = KERNADDR(&dma, offs);
   1764 			std->physaddr = DMAADDR(&dma, offs);
   1765 			std->dma = dma;
   1766 			std->offs = offs;
   1767 			std->link.std = sc->sc_freetds;
   1768 			sc->sc_freetds = std;
   1769 		}
   1770 	}
   1771 	std = sc->sc_freetds;
   1772 	sc->sc_freetds = std->link.std;
   1773 	memset(&std->td, 0, sizeof(uhci_td_t));
   1774 	return std;
   1775 }
   1776 
   1777 void
   1778 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1779 {
   1780 #ifdef DIAGNOSTIC
   1781 #define TD_IS_FREE 0x12345678
   1782 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1783 		printf("uhci_free_std: freeing free TD %p\n", std);
   1784 		return;
   1785 	}
   1786 	std->td.td_token = htole32(TD_IS_FREE);
   1787 #endif
   1788 	std->link.std = sc->sc_freetds;
   1789 	sc->sc_freetds = std;
   1790 }
   1791 
   1792 uhci_soft_qh_t *
   1793 uhci_alloc_sqh(uhci_softc_t *sc)
   1794 {
   1795 	uhci_soft_qh_t *sqh;
   1796 	usbd_status err;
   1797 	int i, offs;
   1798 	usb_dma_t dma;
   1799 
   1800 	if (sc->sc_freeqhs == NULL) {
   1801 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1802 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1803 			  UHCI_QH_ALIGN, &dma);
   1804 		if (err)
   1805 			return (0);
   1806 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1807 			offs = i * UHCI_SQH_SIZE;
   1808 			sqh = KERNADDR(&dma, offs);
   1809 			sqh->physaddr = DMAADDR(&dma, offs);
   1810 			sqh->dma = dma;
   1811 			sqh->offs = offs;
   1812 			sqh->hlink = sc->sc_freeqhs;
   1813 			sc->sc_freeqhs = sqh;
   1814 		}
   1815 	}
   1816 	sqh = sc->sc_freeqhs;
   1817 	sc->sc_freeqhs = sqh->hlink;
   1818 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1819 	return (sqh);
   1820 }
   1821 
   1822 void
   1823 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1824 {
   1825 	sqh->hlink = sc->sc_freeqhs;
   1826 	sc->sc_freeqhs = sqh;
   1827 }
   1828 
   1829 void
   1830 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1831 		    uhci_soft_td_t *stdend)
   1832 {
   1833 	uhci_soft_td_t *p;
   1834 
   1835 	/*
   1836 	 * to avoid race condition with the controller which may be looking
   1837 	 * at this chain, we need to first invalidate all links, and
   1838 	 * then wait for the controller to move to another queue
   1839 	 */
   1840 	for (p = std; p != stdend; p = p->link.std) {
   1841 		usb_syncmem(&p->dma,
   1842 		    p->offs + offsetof(uhci_td_t, td_link),
   1843 		    sizeof(p->td.td_link),
   1844 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1845 		if ((p->td.td_link & UHCI_PTR_T) == 0) {
   1846 			p->td.td_link = UHCI_PTR_T;
   1847 			usb_syncmem(&p->dma,
   1848 			    p->offs + offsetof(uhci_td_t, td_link),
   1849 			    sizeof(p->td.td_link),
   1850 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1851 		}
   1852 	}
   1853 	delay(UHCI_QH_REMOVE_DELAY);
   1854 
   1855 	for (; std != stdend; std = p) {
   1856 		p = std->link.std;
   1857 		uhci_free_std(sc, std);
   1858 	}
   1859 }
   1860 
   1861 usbd_status
   1862 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1863 		     int rd, u_int16_t flags, usb_dma_t *dma,
   1864 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1865 {
   1866 	uhci_soft_td_t *p, *lastp;
   1867 	uhci_physaddr_t lastlink;
   1868 	int i, ntd, l, tog, maxp;
   1869 	u_int32_t status;
   1870 	int addr = upipe->pipe.device->address;
   1871 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1872 
   1873 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1874 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1875 		      upipe->pipe.device->speed, flags));
   1876 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1877 	if (maxp == 0) {
   1878 		printf("uhci_alloc_std_chain: maxp=0\n");
   1879 		return (USBD_INVAL);
   1880 	}
   1881 	ntd = (len + maxp - 1) / maxp;
   1882 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1883 		ntd++;
   1884 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1885 	if (ntd == 0) {
   1886 		*sp = *ep = 0;
   1887 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1888 		return (USBD_NORMAL_COMPLETION);
   1889 	}
   1890 	tog = upipe->nexttoggle;
   1891 	if (ntd % 2 == 0)
   1892 		tog ^= 1;
   1893 	upipe->nexttoggle = tog ^ 1;
   1894 	lastp = NULL;
   1895 	lastlink = UHCI_PTR_T;
   1896 	ntd--;
   1897 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1898 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   1899 		status |= UHCI_TD_LS;
   1900 	if (flags & USBD_SHORT_XFER_OK)
   1901 		status |= UHCI_TD_SPD;
   1902 	usb_syncmem(dma, 0, len,
   1903 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1904 	for (i = ntd; i >= 0; i--) {
   1905 		p = uhci_alloc_std(sc);
   1906 		if (p == NULL) {
   1907 			KASSERT(lastp != NULL);
   1908 			uhci_free_std_chain(sc, lastp, NULL);
   1909 			return (USBD_NOMEM);
   1910 		}
   1911 		p->link.std = lastp;
   1912 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1913 		lastp = p;
   1914 		lastlink = p->physaddr;
   1915 		p->td.td_status = htole32(status);
   1916 		if (i == ntd) {
   1917 			/* last TD */
   1918 			l = len % maxp;
   1919 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1920 				l = maxp;
   1921 			*ep = p;
   1922 		} else
   1923 			l = maxp;
   1924 		p->td.td_token =
   1925 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1926 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1927 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1928 		usb_syncmem(&p->dma, p->offs, sizeof(p->td),
   1929 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1930 		tog ^= 1;
   1931 	}
   1932 	*sp = lastp;
   1933 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1934 		      upipe->nexttoggle));
   1935 	return (USBD_NORMAL_COMPLETION);
   1936 }
   1937 
   1938 void
   1939 uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1940 {
   1941 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1942 	upipe->nexttoggle = 0;
   1943 }
   1944 
   1945 void
   1946 uhci_noop(usbd_pipe_handle pipe)
   1947 {
   1948 }
   1949 
   1950 usbd_status
   1951 uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   1952 {
   1953 	usbd_status err;
   1954 
   1955 	/* Insert last in queue. */
   1956 	err = usb_insert_transfer(xfer);
   1957 	if (err)
   1958 		return (err);
   1959 
   1960 	/*
   1961 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1962 	 * so start it first.
   1963 	 */
   1964 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1965 }
   1966 
   1967 usbd_status
   1968 uhci_device_bulk_start(usbd_xfer_handle xfer)
   1969 {
   1970 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1971 	usbd_device_handle dev = upipe->pipe.device;
   1972 	uhci_softc_t *sc = dev->bus->hci_private;
   1973 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   1974 	uhci_soft_td_t *data, *dataend;
   1975 	uhci_soft_qh_t *sqh;
   1976 	usbd_status err;
   1977 	int len, isread, endpt;
   1978 	int s;
   1979 
   1980 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
   1981 		     xfer, xfer->length, xfer->flags, ii));
   1982 
   1983 	if (sc->sc_dying)
   1984 		return (USBD_IOERROR);
   1985 
   1986 #ifdef DIAGNOSTIC
   1987 	if (xfer->rqflags & URQ_REQUEST)
   1988 		panic("uhci_device_bulk_transfer: a request");
   1989 #endif
   1990 
   1991 	len = xfer->length;
   1992 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1993 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   1994 	sqh = upipe->u.bulk.sqh;
   1995 
   1996 	upipe->u.bulk.isread = isread;
   1997 	upipe->u.bulk.length = len;
   1998 
   1999 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2000 				   &xfer->dmabuf, &data, &dataend);
   2001 	if (err)
   2002 		return (err);
   2003 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2004 	usb_syncmem(&dataend->dma,
   2005 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2006 	    sizeof(dataend->td.td_status),
   2007 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2008 
   2009 
   2010 #ifdef UHCI_DEBUG
   2011 	if (uhcidebug > 8) {
   2012 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   2013 		uhci_dump_tds(data);
   2014 	}
   2015 #endif
   2016 
   2017 	/* Set up interrupt info. */
   2018 	ii->xfer = xfer;
   2019 	ii->stdstart = data;
   2020 	ii->stdend = dataend;
   2021 #ifdef DIAGNOSTIC
   2022 	if (!ii->isdone) {
   2023 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   2024 	}
   2025 	ii->isdone = 0;
   2026 #endif
   2027 
   2028 	sqh->elink = data;
   2029 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2030 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2031 
   2032 	s = splusb();
   2033 	uhci_add_bulk(sc, sqh);
   2034 	uhci_add_intr_info(sc, ii);
   2035 
   2036 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2037 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   2038 			    uhci_timeout, ii);
   2039 	}
   2040 	xfer->status = USBD_IN_PROGRESS;
   2041 	splx(s);
   2042 
   2043 #ifdef UHCI_DEBUG
   2044 	if (uhcidebug > 10) {
   2045 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   2046 		uhci_dump_tds(data);
   2047 	}
   2048 #endif
   2049 
   2050 	if (sc->sc_bus.use_polling)
   2051 		uhci_waitintr(sc, xfer);
   2052 
   2053 	return (USBD_IN_PROGRESS);
   2054 }
   2055 
   2056 /* Abort a device bulk request. */
   2057 void
   2058 uhci_device_bulk_abort(usbd_xfer_handle xfer)
   2059 {
   2060 	DPRINTF(("uhci_device_bulk_abort:\n"));
   2061 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2062 }
   2063 
   2064 /*
   2065  * Abort a device request.
   2066  * If this routine is called at splusb() it guarantees that the request
   2067  * will be removed from the hardware scheduling and that the callback
   2068  * for it will be called with USBD_CANCELLED status.
   2069  * It's impossible to guarantee that the requested transfer will not
   2070  * have happened since the hardware runs concurrently.
   2071  * If the transaction has already happened we rely on the ordinary
   2072  * interrupt processing to process it.
   2073  */
   2074 void
   2075 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2076 {
   2077 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2078 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2079 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2080 	uhci_soft_td_t *std;
   2081 	int s;
   2082 	int wake;
   2083 
   2084 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   2085 
   2086 	if (sc->sc_dying) {
   2087 		/* If we're dying, just do the software part. */
   2088 		s = splusb();
   2089 		xfer->status = status;	/* make software ignore it */
   2090 		callout_stop(&xfer->timeout_handle);
   2091 		usb_transfer_complete(xfer);
   2092 		splx(s);
   2093 		return;
   2094 	}
   2095 
   2096 	if (xfer->device->bus->intr_context || !curproc)
   2097 		panic("uhci_abort_xfer: not in process context");
   2098 
   2099 	/*
   2100 	 * If an abort is already in progress then just wait for it to
   2101 	 * complete and return.
   2102 	 */
   2103 	if (xfer->hcflags & UXFER_ABORTING) {
   2104 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
   2105 #ifdef DIAGNOSTIC
   2106 		if (status == USBD_TIMEOUT)
   2107 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2108 #endif
   2109 		/* Override the status which might be USBD_TIMEOUT. */
   2110 		xfer->status = status;
   2111 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
   2112 		xfer->hcflags |= UXFER_ABORTWAIT;
   2113 		while (xfer->hcflags & UXFER_ABORTING)
   2114 			tsleep(&xfer->hcflags, PZERO, "uhciaw", 0);
   2115 		return;
   2116 	}
   2117 	xfer->hcflags |= UXFER_ABORTING;
   2118 
   2119 	/*
   2120 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2121 	 */
   2122 	s = splusb();
   2123 	xfer->status = status;	/* make software ignore it */
   2124 	callout_stop(&xfer->timeout_handle);
   2125 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   2126 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   2127 		usb_syncmem(&std->dma,
   2128 		    std->offs + offsetof(uhci_td_t, td_status),
   2129 		    sizeof(std->td.td_status),
   2130 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2131 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2132 		usb_syncmem(&std->dma,
   2133 		    std->offs + offsetof(uhci_td_t, td_status),
   2134 		    sizeof(std->td.td_status),
   2135 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2136 	}
   2137 	splx(s);
   2138 
   2139 	/*
   2140 	 * Step 2: Wait until we know hardware has finished any possible
   2141 	 * use of the xfer.  Also make sure the soft interrupt routine
   2142 	 * has run.
   2143 	 */
   2144 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
   2145 	s = splusb();
   2146 #ifdef USB_USE_SOFTINTR
   2147 	sc->sc_softwake = 1;
   2148 #endif /* USB_USE_SOFTINTR */
   2149 	usb_schedsoftintr(&sc->sc_bus);
   2150 #ifdef USB_USE_SOFTINTR
   2151 	DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
   2152 	tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
   2153 #endif /* USB_USE_SOFTINTR */
   2154 	splx(s);
   2155 
   2156 	/*
   2157 	 * Step 3: Execute callback.
   2158 	 */
   2159 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   2160 	s = splusb();
   2161 #ifdef DIAGNOSTIC
   2162 	ii->isdone = 1;
   2163 #endif
   2164 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2165 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2166 	usb_transfer_complete(xfer);
   2167 	if (wake)
   2168 		wakeup(&xfer->hcflags);
   2169 	splx(s);
   2170 }
   2171 
   2172 /* Close a device bulk pipe. */
   2173 void
   2174 uhci_device_bulk_close(usbd_pipe_handle pipe)
   2175 {
   2176 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2177 	usbd_device_handle dev = upipe->pipe.device;
   2178 	uhci_softc_t *sc = dev->bus->hci_private;
   2179 
   2180 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2181 
   2182 	pipe->endpoint->datatoggle = upipe->nexttoggle;
   2183 }
   2184 
   2185 usbd_status
   2186 uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2187 {
   2188 	usbd_status err;
   2189 
   2190 	/* Insert last in queue. */
   2191 	err = usb_insert_transfer(xfer);
   2192 	if (err)
   2193 		return (err);
   2194 
   2195 	/*
   2196 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2197 	 * so start it first.
   2198 	 */
   2199 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2200 }
   2201 
   2202 usbd_status
   2203 uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2204 {
   2205 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2206 	usbd_status err;
   2207 
   2208 	if (sc->sc_dying)
   2209 		return (USBD_IOERROR);
   2210 
   2211 #ifdef DIAGNOSTIC
   2212 	if (!(xfer->rqflags & URQ_REQUEST))
   2213 		panic("uhci_device_ctrl_transfer: not a request");
   2214 #endif
   2215 
   2216 	err = uhci_device_request(xfer);
   2217 	if (err)
   2218 		return (err);
   2219 
   2220 	if (sc->sc_bus.use_polling)
   2221 		uhci_waitintr(sc, xfer);
   2222 	return (USBD_IN_PROGRESS);
   2223 }
   2224 
   2225 usbd_status
   2226 uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2227 {
   2228 	usbd_status err;
   2229 
   2230 	/* Insert last in queue. */
   2231 	err = usb_insert_transfer(xfer);
   2232 	if (err)
   2233 		return (err);
   2234 
   2235 	/*
   2236 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2237 	 * so start it first.
   2238 	 */
   2239 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2240 }
   2241 
   2242 usbd_status
   2243 uhci_device_intr_start(usbd_xfer_handle xfer)
   2244 {
   2245 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2246 	usbd_device_handle dev = upipe->pipe.device;
   2247 	uhci_softc_t *sc = dev->bus->hci_private;
   2248 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2249 	uhci_soft_td_t *data, *dataend;
   2250 	uhci_soft_qh_t *sqh;
   2251 	usbd_status err;
   2252 	int isread, endpt;
   2253 	int i, s;
   2254 
   2255 	if (sc->sc_dying)
   2256 		return (USBD_IOERROR);
   2257 
   2258 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2259 		    xfer, xfer->length, xfer->flags));
   2260 
   2261 #ifdef DIAGNOSTIC
   2262 	if (xfer->rqflags & URQ_REQUEST)
   2263 		panic("uhci_device_intr_transfer: a request");
   2264 #endif
   2265 
   2266 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2267 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2268 
   2269 	upipe->u.intr.isread = isread;
   2270 
   2271 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
   2272 				   xfer->flags, &xfer->dmabuf, &data,
   2273 				   &dataend);
   2274 	if (err)
   2275 		return (err);
   2276 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2277 	usb_syncmem(&dataend->dma,
   2278 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2279 	    sizeof(dataend->td.td_status),
   2280 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2281 
   2282 #ifdef UHCI_DEBUG
   2283 	if (uhcidebug > 10) {
   2284 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2285 		uhci_dump_tds(data);
   2286 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2287 	}
   2288 #endif
   2289 
   2290 	s = splusb();
   2291 	/* Set up interrupt info. */
   2292 	ii->xfer = xfer;
   2293 	ii->stdstart = data;
   2294 	ii->stdend = dataend;
   2295 #ifdef DIAGNOSTIC
   2296 	if (!ii->isdone) {
   2297 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2298 	}
   2299 	ii->isdone = 0;
   2300 #endif
   2301 
   2302 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2303 		     upipe->u.intr.qhs[0]));
   2304 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2305 		sqh = upipe->u.intr.qhs[i];
   2306 		sqh->elink = data;
   2307 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2308 		usb_syncmem(&sqh->dma,
   2309 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2310 		    sizeof(sqh->qh.qh_elink),
   2311 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2312 	}
   2313 	uhci_add_intr_info(sc, ii);
   2314 	xfer->status = USBD_IN_PROGRESS;
   2315 	splx(s);
   2316 
   2317 #ifdef UHCI_DEBUG
   2318 	if (uhcidebug > 10) {
   2319 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2320 		uhci_dump_tds(data);
   2321 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2322 	}
   2323 #endif
   2324 
   2325 	return (USBD_IN_PROGRESS);
   2326 }
   2327 
   2328 /* Abort a device control request. */
   2329 void
   2330 uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2331 {
   2332 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2333 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2334 }
   2335 
   2336 /* Close a device control pipe. */
   2337 void
   2338 uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2339 {
   2340 }
   2341 
   2342 /* Abort a device interrupt request. */
   2343 void
   2344 uhci_device_intr_abort(usbd_xfer_handle xfer)
   2345 {
   2346 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2347 	if (xfer->pipe->intrxfer == xfer) {
   2348 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2349 		xfer->pipe->intrxfer = NULL;
   2350 	}
   2351 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2352 }
   2353 
   2354 /* Close a device interrupt pipe. */
   2355 void
   2356 uhci_device_intr_close(usbd_pipe_handle pipe)
   2357 {
   2358 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2359 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   2360 	int i, npoll;
   2361 	int s;
   2362 
   2363 	/* Unlink descriptors from controller data structures. */
   2364 	npoll = upipe->u.intr.npoll;
   2365 	s = splusb();
   2366 	for (i = 0; i < npoll; i++)
   2367 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2368 	splx(s);
   2369 
   2370 	/*
   2371 	 * We now have to wait for any activity on the physical
   2372 	 * descriptors to stop.
   2373 	 */
   2374 	usb_delay_ms(&sc->sc_bus, 2);
   2375 
   2376 	for(i = 0; i < npoll; i++)
   2377 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2378 	free(upipe->u.intr.qhs, M_USBHC);
   2379 
   2380 	/* XXX free other resources */
   2381 }
   2382 
   2383 usbd_status
   2384 uhci_device_request(usbd_xfer_handle xfer)
   2385 {
   2386 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2387 	usb_device_request_t *req = &xfer->request;
   2388 	usbd_device_handle dev = upipe->pipe.device;
   2389 	uhci_softc_t *sc = dev->bus->hci_private;
   2390 	int addr = dev->address;
   2391 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2392 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2393 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2394 	uhci_soft_qh_t *sqh;
   2395 	int len;
   2396 	u_int32_t ls;
   2397 	usbd_status err;
   2398 	int isread;
   2399 	int s;
   2400 
   2401 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2402 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2403 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2404 		    UGETW(req->wIndex), UGETW(req->wLength),
   2405 		    addr, endpt));
   2406 
   2407 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2408 	isread = req->bmRequestType & UT_READ;
   2409 	len = UGETW(req->wLength);
   2410 
   2411 	setup = upipe->u.ctl.setup;
   2412 	stat = upipe->u.ctl.stat;
   2413 	sqh = upipe->u.ctl.sqh;
   2414 
   2415 	/* Set up data transaction */
   2416 	if (len != 0) {
   2417 		upipe->nexttoggle = 1;
   2418 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2419 					   &xfer->dmabuf, &data, &dataend);
   2420 		if (err)
   2421 			return (err);
   2422 		next = data;
   2423 		dataend->link.std = stat;
   2424 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2425 		usb_syncmem(&dataend->dma,
   2426 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2427 		    sizeof(dataend->td.td_link),
   2428 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2429 	} else {
   2430 		next = stat;
   2431 	}
   2432 	upipe->u.ctl.length = len;
   2433 
   2434 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2435 	usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   2436 
   2437 	setup->link.std = next;
   2438 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2439 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2440 		UHCI_TD_ACTIVE);
   2441 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2442 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2443 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2444 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2445 
   2446 	stat->link.std = NULL;
   2447 	stat->td.td_link = htole32(UHCI_PTR_T);
   2448 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2449 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2450 	stat->td.td_token =
   2451 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2452 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2453 	stat->td.td_buffer = htole32(0);
   2454 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2455 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2456 
   2457 #ifdef UHCI_DEBUG
   2458 	if (uhcidebug > 10) {
   2459 		DPRINTF(("uhci_device_request: before transfer\n"));
   2460 		uhci_dump_tds(setup);
   2461 	}
   2462 #endif
   2463 
   2464 	/* Set up interrupt info. */
   2465 	ii->xfer = xfer;
   2466 	ii->stdstart = setup;
   2467 	ii->stdend = stat;
   2468 #ifdef DIAGNOSTIC
   2469 	if (!ii->isdone) {
   2470 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2471 	}
   2472 	ii->isdone = 0;
   2473 #endif
   2474 
   2475 	sqh->elink = setup;
   2476 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2477 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2478 
   2479 	s = splusb();
   2480 	if (dev->speed == USB_SPEED_LOW)
   2481 		uhci_add_ls_ctrl(sc, sqh);
   2482 	else
   2483 		uhci_add_hs_ctrl(sc, sqh);
   2484 	uhci_add_intr_info(sc, ii);
   2485 #ifdef UHCI_DEBUG
   2486 	if (uhcidebug > 12) {
   2487 		uhci_soft_td_t *std;
   2488 		uhci_soft_qh_t *xqh;
   2489 		uhci_soft_qh_t *sxqh;
   2490 		int maxqh = 0;
   2491 		uhci_physaddr_t link;
   2492 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2493 		for (std = sc->sc_vframes[0].htd, link = 0;
   2494 		     (link & UHCI_PTR_QH) == 0;
   2495 		     std = std->link.std) {
   2496 			link = le32toh(std->td.td_link);
   2497 			uhci_dump_td(std);
   2498 		}
   2499 		sxqh = (uhci_soft_qh_t *)std;
   2500 		uhci_dump_qh(sxqh);
   2501 		for (xqh = sxqh;
   2502 		     xqh != NULL;
   2503 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2504                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2505 			uhci_dump_qh(xqh);
   2506 		}
   2507 		DPRINTF(("Enqueued QH:\n"));
   2508 		uhci_dump_qh(sqh);
   2509 		uhci_dump_tds(sqh->elink);
   2510 	}
   2511 #endif
   2512 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2513 		callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
   2514 			    uhci_timeout, ii);
   2515 	}
   2516 	xfer->status = USBD_IN_PROGRESS;
   2517 	splx(s);
   2518 
   2519 	return (USBD_NORMAL_COMPLETION);
   2520 }
   2521 
   2522 usbd_status
   2523 uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2524 {
   2525 	usbd_status err;
   2526 
   2527 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2528 
   2529 	/* Put it on our queue, */
   2530 	err = usb_insert_transfer(xfer);
   2531 
   2532 	/* bail out on error, */
   2533 	if (err && err != USBD_IN_PROGRESS)
   2534 		return (err);
   2535 
   2536 	/* XXX should check inuse here */
   2537 
   2538 	/* insert into schedule, */
   2539 	uhci_device_isoc_enter(xfer);
   2540 
   2541 	/* and start if the pipe wasn't running */
   2542 	if (!err)
   2543 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2544 
   2545 	return (err);
   2546 }
   2547 
   2548 void
   2549 uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2550 {
   2551 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2552 	usbd_device_handle dev = upipe->pipe.device;
   2553 	uhci_softc_t *sc = dev->bus->hci_private;
   2554 	struct iso *iso = &upipe->u.iso;
   2555 	uhci_soft_td_t *std;
   2556 	u_int32_t buf, len, status, offs;
   2557 	int s, i, next, nframes;
   2558 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2559 
   2560 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2561 		    "nframes=%d\n",
   2562 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2563 
   2564 	if (sc->sc_dying)
   2565 		return;
   2566 
   2567 	if (xfer->status == USBD_IN_PROGRESS) {
   2568 		/* This request has already been entered into the frame list */
   2569 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2570 		/* XXX */
   2571 	}
   2572 
   2573 #ifdef DIAGNOSTIC
   2574 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2575 		printf("uhci_device_isoc_enter: overflow!\n");
   2576 #endif
   2577 
   2578 	next = iso->next;
   2579 	if (next == -1) {
   2580 		/* Not in use yet, schedule it a few frames ahead. */
   2581 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2582 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2583 	}
   2584 
   2585 	xfer->status = USBD_IN_PROGRESS;
   2586 	UXFER(xfer)->curframe = next;
   2587 
   2588 	buf = DMAADDR(&xfer->dmabuf, 0);
   2589 	offs = 0;
   2590 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2591 				     UHCI_TD_ACTIVE |
   2592 				     UHCI_TD_IOS);
   2593 	nframes = xfer->nframes;
   2594 	s = splusb();
   2595 	for (i = 0; i < nframes; i++) {
   2596 		std = iso->stds[next];
   2597 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2598 			next = 0;
   2599 		len = xfer->frlengths[i];
   2600 		std->td.td_buffer = htole32(buf);
   2601 		usb_syncmem(&xfer->dmabuf, offs, len,
   2602 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2603 		if (i == nframes - 1)
   2604 			status |= UHCI_TD_IOC;
   2605 		std->td.td_status = htole32(status);
   2606 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2607 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2608 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2609 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2610 #ifdef UHCI_DEBUG
   2611 		if (uhcidebug > 5) {
   2612 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2613 			uhci_dump_td(std);
   2614 		}
   2615 #endif
   2616 		buf += len;
   2617 		offs += len;
   2618 	}
   2619 	iso->next = next;
   2620 	iso->inuse += xfer->nframes;
   2621 
   2622 	splx(s);
   2623 }
   2624 
   2625 usbd_status
   2626 uhci_device_isoc_start(usbd_xfer_handle xfer)
   2627 {
   2628 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2629 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2630 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2631 	uhci_soft_td_t *end;
   2632 	int s, i;
   2633 
   2634 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2635 
   2636 	if (sc->sc_dying)
   2637 		return (USBD_IOERROR);
   2638 
   2639 #ifdef DIAGNOSTIC
   2640 	if (xfer->status != USBD_IN_PROGRESS)
   2641 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2642 #endif
   2643 
   2644 	/* Find the last TD */
   2645 	i = UXFER(xfer)->curframe + xfer->nframes;
   2646 	if (i >= UHCI_VFRAMELIST_COUNT)
   2647 		i -= UHCI_VFRAMELIST_COUNT;
   2648 	end = upipe->u.iso.stds[i];
   2649 
   2650 #ifdef DIAGNOSTIC
   2651 	if (end == NULL) {
   2652 		printf("uhci_device_isoc_start: end == NULL\n");
   2653 		return (USBD_INVAL);
   2654 	}
   2655 #endif
   2656 
   2657 	s = splusb();
   2658 
   2659 	/* Set up interrupt info. */
   2660 	ii->xfer = xfer;
   2661 	ii->stdstart = end;
   2662 	ii->stdend = end;
   2663 #ifdef DIAGNOSTIC
   2664 	if (!ii->isdone)
   2665 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2666 	ii->isdone = 0;
   2667 #endif
   2668 	uhci_add_intr_info(sc, ii);
   2669 
   2670 	splx(s);
   2671 
   2672 	return (USBD_IN_PROGRESS);
   2673 }
   2674 
   2675 void
   2676 uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2677 {
   2678 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2679 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2680 	uhci_soft_td_t *std;
   2681 	int i, n, s, nframes, maxlen, len;
   2682 
   2683 	s = splusb();
   2684 
   2685 	/* Transfer is already done. */
   2686 	if (xfer->status != USBD_NOT_STARTED &&
   2687 	    xfer->status != USBD_IN_PROGRESS) {
   2688 		splx(s);
   2689 		return;
   2690 	}
   2691 
   2692 	/* Give xfer the requested abort code. */
   2693 	xfer->status = USBD_CANCELLED;
   2694 
   2695 	/* make hardware ignore it, */
   2696 	nframes = xfer->nframes;
   2697 	n = UXFER(xfer)->curframe;
   2698 	maxlen = 0;
   2699 	for (i = 0; i < nframes; i++) {
   2700 		std = stds[n];
   2701 		usb_syncmem(&std->dma,
   2702 		    std->offs + offsetof(uhci_td_t, td_status),
   2703 		    sizeof(std->td.td_status),
   2704 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2705 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2706 		usb_syncmem(&std->dma,
   2707 		    std->offs + offsetof(uhci_td_t, td_status),
   2708 		    sizeof(std->td.td_status),
   2709 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2710 		usb_syncmem(&std->dma,
   2711 		    std->offs + offsetof(uhci_td_t, td_token),
   2712 		    sizeof(std->td.td_token),
   2713 		    BUS_DMASYNC_POSTWRITE);
   2714 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2715 		if (len > maxlen)
   2716 			maxlen = len;
   2717 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2718 			n = 0;
   2719 	}
   2720 
   2721 	/* and wait until we are sure the hardware has finished. */
   2722 	delay(maxlen);
   2723 
   2724 #ifdef DIAGNOSTIC
   2725 	UXFER(xfer)->iinfo.isdone = 1;
   2726 #endif
   2727 	/* Run callback and remove from interrupt list. */
   2728 	usb_transfer_complete(xfer);
   2729 
   2730 	splx(s);
   2731 }
   2732 
   2733 void
   2734 uhci_device_isoc_close(usbd_pipe_handle pipe)
   2735 {
   2736 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2737 	usbd_device_handle dev = upipe->pipe.device;
   2738 	uhci_softc_t *sc = dev->bus->hci_private;
   2739 	uhci_soft_td_t *std, *vstd;
   2740 	struct iso *iso;
   2741 	int i, s;
   2742 
   2743 	/*
   2744 	 * Make sure all TDs are marked as inactive.
   2745 	 * Wait for completion.
   2746 	 * Unschedule.
   2747 	 * Deallocate.
   2748 	 */
   2749 	iso = &upipe->u.iso;
   2750 
   2751 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2752 		std = iso->stds[i];
   2753 		usb_syncmem(&std->dma,
   2754 		    std->offs + offsetof(uhci_td_t, td_status),
   2755 		    sizeof(std->td.td_status),
   2756 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2757 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2758 		usb_syncmem(&std->dma,
   2759 		    std->offs + offsetof(uhci_td_t, td_status),
   2760 		    sizeof(std->td.td_status),
   2761 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2762 	}
   2763 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
   2764 
   2765 	s = splusb();
   2766 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2767 		std = iso->stds[i];
   2768 		for (vstd = sc->sc_vframes[i].htd;
   2769 		     vstd != NULL && vstd->link.std != std;
   2770 		     vstd = vstd->link.std)
   2771 			;
   2772 		if (vstd == NULL) {
   2773 			/*panic*/
   2774 			printf("uhci_device_isoc_close: %p not found\n", std);
   2775 			splx(s);
   2776 			return;
   2777 		}
   2778 		vstd->link = std->link;
   2779 		usb_syncmem(&std->dma,
   2780 		    std->offs + offsetof(uhci_td_t, td_link),
   2781 		    sizeof(std->td.td_link),
   2782 		    BUS_DMASYNC_POSTWRITE);
   2783 		vstd->td.td_link = std->td.td_link;
   2784 		usb_syncmem(&vstd->dma,
   2785 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2786 		    sizeof(vstd->td.td_link),
   2787 		    BUS_DMASYNC_PREWRITE);
   2788 		uhci_free_std(sc, std);
   2789 	}
   2790 	splx(s);
   2791 
   2792 	free(iso->stds, M_USBHC);
   2793 }
   2794 
   2795 usbd_status
   2796 uhci_setup_isoc(usbd_pipe_handle pipe)
   2797 {
   2798 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2799 	usbd_device_handle dev = upipe->pipe.device;
   2800 	uhci_softc_t *sc = dev->bus->hci_private;
   2801 	int addr = upipe->pipe.device->address;
   2802 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2803 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2804 	uhci_soft_td_t *std, *vstd;
   2805 	u_int32_t token;
   2806 	struct iso *iso;
   2807 	int i, s;
   2808 
   2809 	iso = &upipe->u.iso;
   2810 	iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
   2811 			   M_USBHC, M_WAITOK);
   2812 
   2813 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2814 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2815 
   2816 	/* Allocate the TDs and mark as inactive; */
   2817 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2818 		std = uhci_alloc_std(sc);
   2819 		if (std == 0)
   2820 			goto bad;
   2821 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2822 		std->td.td_token = htole32(token);
   2823 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2824 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2825 		iso->stds[i] = std;
   2826 	}
   2827 
   2828 	/* Insert TDs into schedule. */
   2829 	s = splusb();
   2830 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2831 		std = iso->stds[i];
   2832 		vstd = sc->sc_vframes[i].htd;
   2833 		usb_syncmem(&vstd->dma,
   2834 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2835 		    sizeof(vstd->td.td_link),
   2836 		    BUS_DMASYNC_POSTWRITE);
   2837 		std->link = vstd->link;
   2838 		std->td.td_link = vstd->td.td_link;
   2839 		usb_syncmem(&std->dma,
   2840 		    std->offs + offsetof(uhci_td_t, td_link),
   2841 		    sizeof(std->td.td_link),
   2842 		    BUS_DMASYNC_PREWRITE);
   2843 		vstd->link.std = std;
   2844 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2845 		usb_syncmem(&vstd->dma,
   2846 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2847 		    sizeof(vstd->td.td_link),
   2848 		    BUS_DMASYNC_PREWRITE);
   2849 	}
   2850 	splx(s);
   2851 
   2852 	iso->next = -1;
   2853 	iso->inuse = 0;
   2854 
   2855 	return (USBD_NORMAL_COMPLETION);
   2856 
   2857  bad:
   2858 	while (--i >= 0)
   2859 		uhci_free_std(sc, iso->stds[i]);
   2860 	free(iso->stds, M_USBHC);
   2861 	return (USBD_NOMEM);
   2862 }
   2863 
   2864 void
   2865 uhci_device_isoc_done(usbd_xfer_handle xfer)
   2866 {
   2867 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2868 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2869 	int i, offs;
   2870 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2871 
   2872 
   2873 	DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
   2874 			xfer->actlen, xfer->busy_free));
   2875 
   2876 	if (ii->xfer != xfer)
   2877 		/* Not on interrupt list, ignore it. */
   2878 		return;
   2879 
   2880 	if (!uhci_active_intr_info(ii))
   2881 		return;
   2882 
   2883 #ifdef DIAGNOSTIC
   2884         if (ii->stdend == NULL) {
   2885                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2886 #ifdef UHCI_DEBUG
   2887 		uhci_dump_ii(ii);
   2888 #endif
   2889 		return;
   2890 	}
   2891 #endif
   2892 
   2893 	/* Turn off the interrupt since it is active even if the TD is not. */
   2894 	usb_syncmem(&ii->stdend->dma,
   2895 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2896 	    sizeof(ii->stdend->td.td_status),
   2897 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2898 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2899 	usb_syncmem(&ii->stdend->dma,
   2900 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2901 	    sizeof(ii->stdend->td.td_status),
   2902 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2903 
   2904 	uhci_del_intr_info(ii);	/* remove from active list */
   2905 
   2906 	offs = 0;
   2907 	for (i = 0; i < xfer->nframes; i++) {
   2908 		usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i],
   2909 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2910 		offs += xfer->frlengths[i];
   2911 	}
   2912 }
   2913 
   2914 void
   2915 uhci_device_intr_done(usbd_xfer_handle xfer)
   2916 {
   2917 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2918 	uhci_softc_t *sc = ii->sc;
   2919 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2920 	uhci_soft_qh_t *sqh;
   2921 	int i, npoll, isread;
   2922 
   2923 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
   2924 
   2925 	npoll = upipe->u.intr.npoll;
   2926 	for(i = 0; i < npoll; i++) {
   2927 		sqh = upipe->u.intr.qhs[i];
   2928 		sqh->elink = NULL;
   2929 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2930 		usb_syncmem(&sqh->dma,
   2931 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2932 		    sizeof(sqh->qh.qh_elink),
   2933 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2934 	}
   2935 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2936 
   2937 	isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2938 	usb_syncmem(&xfer->dmabuf, 0, xfer->length,
   2939 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2940 
   2941 	/* XXX Wasteful. */
   2942 	if (xfer->pipe->repeat) {
   2943 		uhci_soft_td_t *data, *dataend;
   2944 
   2945 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   2946 
   2947 		/* This alloc cannot fail since we freed the chain above. */
   2948 		uhci_alloc_std_chain(upipe, sc, xfer->length,
   2949 				     upipe->u.intr.isread, xfer->flags,
   2950 				     &xfer->dmabuf, &data, &dataend);
   2951 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2952 		usb_syncmem(&dataend->dma,
   2953 		    dataend->offs + offsetof(uhci_td_t, td_status),
   2954 		    sizeof(dataend->td.td_status),
   2955 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2956 
   2957 #ifdef UHCI_DEBUG
   2958 		if (uhcidebug > 10) {
   2959 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   2960 			uhci_dump_tds(data);
   2961 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   2962 		}
   2963 #endif
   2964 
   2965 		ii->stdstart = data;
   2966 		ii->stdend = dataend;
   2967 #ifdef DIAGNOSTIC
   2968 		if (!ii->isdone) {
   2969 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   2970 		}
   2971 		ii->isdone = 0;
   2972 #endif
   2973 		for (i = 0; i < npoll; i++) {
   2974 			sqh = upipe->u.intr.qhs[i];
   2975 			sqh->elink = data;
   2976 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2977 			usb_syncmem(&sqh->dma,
   2978 			    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2979 			    sizeof(sqh->qh.qh_elink),
   2980 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2981 		}
   2982 		xfer->status = USBD_IN_PROGRESS;
   2983 		/* The ii is already on the examined list, just leave it. */
   2984 	} else {
   2985 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   2986 		if (uhci_active_intr_info(ii))
   2987 			uhci_del_intr_info(ii);
   2988 	}
   2989 }
   2990 
   2991 /* Deallocate request data structures */
   2992 void
   2993 uhci_device_ctrl_done(usbd_xfer_handle xfer)
   2994 {
   2995 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2996 	uhci_softc_t *sc = ii->sc;
   2997 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2998 	int len = UGETW(xfer->request.wLength);
   2999 	int isread = (xfer->request.bmRequestType & UT_READ);
   3000 
   3001 #ifdef DIAGNOSTIC
   3002 	if (!(xfer->rqflags & URQ_REQUEST))
   3003 		panic("uhci_device_ctrl_done: not a request");
   3004 #endif
   3005 
   3006 	if (!uhci_active_intr_info(ii))
   3007 		return;
   3008 
   3009 	uhci_del_intr_info(ii);	/* remove from active list */
   3010 
   3011 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   3012 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   3013 	else
   3014 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   3015 
   3016 	if (upipe->u.ctl.length != 0)
   3017 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   3018 
   3019 	if (len) {
   3020 		usb_syncmem(&xfer->dmabuf, 0, len,
   3021 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3022 	}
   3023 	usb_syncmem(&upipe->u.ctl.reqdma, 0,
   3024 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3025 
   3026 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
   3027 }
   3028 
   3029 /* Deallocate request data structures */
   3030 void
   3031 uhci_device_bulk_done(usbd_xfer_handle xfer)
   3032 {
   3033 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3034 	uhci_softc_t *sc = ii->sc;
   3035 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3036 
   3037 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
   3038 		    xfer, ii, sc, upipe));
   3039 
   3040 	if (!uhci_active_intr_info(ii))
   3041 		return;
   3042 
   3043 	uhci_del_intr_info(ii);	/* remove from active list */
   3044 
   3045 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   3046 
   3047 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3048 
   3049 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
   3050 }
   3051 
   3052 /* Add interrupt QH, called with vflock. */
   3053 void
   3054 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3055 {
   3056 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3057 	uhci_soft_qh_t *eqh;
   3058 
   3059 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3060 
   3061 	eqh = vf->eqh;
   3062 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3063 	    sizeof(eqh->qh.qh_hlink),
   3064 	    BUS_DMASYNC_POSTWRITE);
   3065 	sqh->hlink       = eqh->hlink;
   3066 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3067 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3068 	    sizeof(sqh->qh.qh_hlink),
   3069 	    BUS_DMASYNC_PREWRITE);
   3070 	eqh->hlink       = sqh;
   3071 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3072 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3073 	    sizeof(eqh->qh.qh_hlink),
   3074 	    BUS_DMASYNC_PREWRITE);
   3075 	vf->eqh = sqh;
   3076 	vf->bandwidth++;
   3077 }
   3078 
   3079 /* Remove interrupt QH. */
   3080 void
   3081 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3082 {
   3083 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3084 	uhci_soft_qh_t *pqh;
   3085 
   3086 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3087 
   3088 	/* See comment in uhci_remove_ctrl() */
   3089 
   3090 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3091 	    sizeof(sqh->qh.qh_elink),
   3092 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3093 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3094 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3095 		usb_syncmem(&sqh->dma,
   3096 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3097 		    sizeof(sqh->qh.qh_elink),
   3098 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3099 		delay(UHCI_QH_REMOVE_DELAY);
   3100 	}
   3101 
   3102 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3103 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3104 	    sizeof(sqh->qh.qh_hlink),
   3105 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3106 	pqh->hlink       = sqh->hlink;
   3107 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3108 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3109 	    sizeof(pqh->qh.qh_hlink),
   3110 	    BUS_DMASYNC_PREWRITE);
   3111 	delay(UHCI_QH_REMOVE_DELAY);
   3112 	if (vf->eqh == sqh)
   3113 		vf->eqh = pqh;
   3114 	vf->bandwidth--;
   3115 }
   3116 
   3117 usbd_status
   3118 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3119 {
   3120 	uhci_soft_qh_t *sqh;
   3121 	int i, npoll, s;
   3122 	u_int bestbw, bw, bestoffs, offs;
   3123 
   3124 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
   3125 	if (ival == 0) {
   3126 		printf("uhci_device_setintr: 0 interval\n");
   3127 		return (USBD_INVAL);
   3128 	}
   3129 
   3130 	if (ival > UHCI_VFRAMELIST_COUNT)
   3131 		ival = UHCI_VFRAMELIST_COUNT;
   3132 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3133 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
   3134 
   3135 	upipe->u.intr.npoll = npoll;
   3136 	upipe->u.intr.qhs =
   3137 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
   3138 
   3139 	/*
   3140 	 * Figure out which offset in the schedule that has most
   3141 	 * bandwidth left over.
   3142 	 */
   3143 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3144 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3145 		for (bw = i = 0; i < npoll; i++)
   3146 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3147 		if (bw < bestbw) {
   3148 			bestbw = bw;
   3149 			bestoffs = offs;
   3150 		}
   3151 	}
   3152 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   3153 
   3154 	for(i = 0; i < npoll; i++) {
   3155 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3156 		sqh->elink = NULL;
   3157 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3158 		usb_syncmem(&sqh->dma,
   3159 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3160 		    sizeof(sqh->qh.qh_elink),
   3161 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3162 		sqh->pos = MOD(i * ival + bestoffs);
   3163 	}
   3164 #undef MOD
   3165 
   3166 	s = splusb();
   3167 	/* Enter QHs into the controller data structures. */
   3168 	for(i = 0; i < npoll; i++)
   3169 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   3170 	splx(s);
   3171 
   3172 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
   3173 	return (USBD_NORMAL_COMPLETION);
   3174 }
   3175 
   3176 /* Open a new pipe. */
   3177 usbd_status
   3178 uhci_open(usbd_pipe_handle pipe)
   3179 {
   3180 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3181 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3182 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   3183 	usbd_status err;
   3184 	int ival;
   3185 
   3186 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   3187 		     pipe, pipe->device->address,
   3188 		     ed->bEndpointAddress, sc->sc_addr));
   3189 
   3190 	upipe->aborting = 0;
   3191 	/* toggle state needed for bulk endpoints */
   3192 	upipe->nexttoggle = pipe->endpoint->datatoggle;
   3193 
   3194 	if (pipe->device->address == sc->sc_addr) {
   3195 		switch (ed->bEndpointAddress) {
   3196 		case USB_CONTROL_ENDPOINT:
   3197 			pipe->methods = &uhci_root_ctrl_methods;
   3198 			break;
   3199 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   3200 			pipe->methods = &uhci_root_intr_methods;
   3201 			break;
   3202 		default:
   3203 			return (USBD_INVAL);
   3204 		}
   3205 	} else {
   3206 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3207 		case UE_CONTROL:
   3208 			pipe->methods = &uhci_device_ctrl_methods;
   3209 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   3210 			if (upipe->u.ctl.sqh == NULL)
   3211 				goto bad;
   3212 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   3213 			if (upipe->u.ctl.setup == NULL) {
   3214 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3215 				goto bad;
   3216 			}
   3217 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   3218 			if (upipe->u.ctl.stat == NULL) {
   3219 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3220 				uhci_free_std(sc, upipe->u.ctl.setup);
   3221 				goto bad;
   3222 			}
   3223 			err = usb_allocmem(&sc->sc_bus,
   3224 				  sizeof(usb_device_request_t),
   3225 				  0, &upipe->u.ctl.reqdma);
   3226 			if (err) {
   3227 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3228 				uhci_free_std(sc, upipe->u.ctl.setup);
   3229 				uhci_free_std(sc, upipe->u.ctl.stat);
   3230 				goto bad;
   3231 			}
   3232 			break;
   3233 		case UE_INTERRUPT:
   3234 			pipe->methods = &uhci_device_intr_methods;
   3235 			ival = pipe->interval;
   3236 			if (ival == USBD_DEFAULT_INTERVAL)
   3237 				ival = ed->bInterval;
   3238 			return (uhci_device_setintr(sc, upipe, ival));
   3239 		case UE_ISOCHRONOUS:
   3240 			pipe->methods = &uhci_device_isoc_methods;
   3241 			return (uhci_setup_isoc(pipe));
   3242 		case UE_BULK:
   3243 			pipe->methods = &uhci_device_bulk_methods;
   3244 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   3245 			if (upipe->u.bulk.sqh == NULL)
   3246 				goto bad;
   3247 			break;
   3248 		}
   3249 	}
   3250 	return (USBD_NORMAL_COMPLETION);
   3251 
   3252  bad:
   3253 	return (USBD_NOMEM);
   3254 }
   3255 
   3256 /*
   3257  * Data structures and routines to emulate the root hub.
   3258  */
   3259 usb_device_descriptor_t uhci_devd = {
   3260 	USB_DEVICE_DESCRIPTOR_SIZE,
   3261 	UDESC_DEVICE,		/* type */
   3262 	{0x00, 0x01},		/* USB version */
   3263 	UDCLASS_HUB,		/* class */
   3264 	UDSUBCLASS_HUB,		/* subclass */
   3265 	UDPROTO_FSHUB,		/* protocol */
   3266 	64,			/* max packet */
   3267 	{0},{0},{0x00,0x01},	/* device id */
   3268 	1,2,0,			/* string indicies */
   3269 	1			/* # of configurations */
   3270 };
   3271 
   3272 const usb_config_descriptor_t uhci_confd = {
   3273 	USB_CONFIG_DESCRIPTOR_SIZE,
   3274 	UDESC_CONFIG,
   3275 	{USB_CONFIG_DESCRIPTOR_SIZE +
   3276 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   3277 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   3278 	1,
   3279 	1,
   3280 	0,
   3281 	UC_ATTR_MBO | UC_SELF_POWERED,
   3282 	0			/* max power */
   3283 };
   3284 
   3285 const usb_interface_descriptor_t uhci_ifcd = {
   3286 	USB_INTERFACE_DESCRIPTOR_SIZE,
   3287 	UDESC_INTERFACE,
   3288 	0,
   3289 	0,
   3290 	1,
   3291 	UICLASS_HUB,
   3292 	UISUBCLASS_HUB,
   3293 	UIPROTO_FSHUB,
   3294 	0
   3295 };
   3296 
   3297 const usb_endpoint_descriptor_t uhci_endpd = {
   3298 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   3299 	UDESC_ENDPOINT,
   3300 	UE_DIR_IN | UHCI_INTR_ENDPT,
   3301 	UE_INTERRUPT,
   3302 	{8},
   3303 	255
   3304 };
   3305 
   3306 const usb_hub_descriptor_t uhci_hubd_piix = {
   3307 	USB_HUB_DESCRIPTOR_SIZE,
   3308 	UDESC_HUB,
   3309 	2,
   3310 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   3311 	50,			/* power on to power good */
   3312 	0,
   3313 	{ 0x00 },		/* both ports are removable */
   3314 	{ 0 },
   3315 };
   3316 
   3317 /*
   3318  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3319  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3320  * should not be used by the USB subsystem.  As we cannot issue a
   3321  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3322  * will be enabled as part of the reset.
   3323  *
   3324  * On the VT83C572, the port cannot be successfully enabled until the
   3325  * outstanding "port enable change" and "connection status change"
   3326  * events have been reset.
   3327  */
   3328 Static usbd_status
   3329 uhci_portreset(uhci_softc_t *sc, int index)
   3330 {
   3331 	int lim, port, x;
   3332 
   3333 	if (index == 1)
   3334 		port = UHCI_PORTSC1;
   3335 	else if (index == 2)
   3336 		port = UHCI_PORTSC2;
   3337 	else
   3338 		return (USBD_IOERROR);
   3339 
   3340 	x = URWMASK(UREAD2(sc, port));
   3341 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3342 
   3343 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3344 
   3345 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   3346 		    index, UREAD2(sc, port)));
   3347 
   3348 	x = URWMASK(UREAD2(sc, port));
   3349 	UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
   3350 
   3351 	delay(100);
   3352 
   3353 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3354 		    index, UREAD2(sc, port)));
   3355 
   3356 	x = URWMASK(UREAD2(sc, port));
   3357 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3358 
   3359 	for (lim = 10; --lim > 0;) {
   3360 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3361 
   3362 		x = UREAD2(sc, port);
   3363 
   3364 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3365 			    index, lim, x));
   3366 
   3367 		if (!(x & UHCI_PORTSC_CCS)) {
   3368 			/*
   3369 			 * No device is connected (or was disconnected
   3370 			 * during reset).  Consider the port reset.
   3371 			 * The delay must be long enough to ensure on
   3372 			 * the initial iteration that the device
   3373 			 * connection will have been registered.  50ms
   3374 			 * appears to be sufficient, but 20ms is not.
   3375 			 */
   3376 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3377 				    index, lim));
   3378 			break;
   3379 		}
   3380 
   3381 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3382 			/*
   3383 			 * Port enabled changed and/or connection
   3384 			 * status changed were set.  Reset either or
   3385 			 * both raised flags (by writing a 1 to that
   3386 			 * bit), and wait again for state to settle.
   3387 			 */
   3388 			UWRITE2(sc, port, URWMASK(x) |
   3389 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3390 			continue;
   3391 		}
   3392 
   3393 		if (x & UHCI_PORTSC_PE)
   3394 			/* Port is enabled */
   3395 			break;
   3396 
   3397 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3398 	}
   3399 
   3400 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3401 		    index, UREAD2(sc, port)));
   3402 
   3403 	if (lim <= 0) {
   3404 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3405 		return (USBD_TIMEOUT);
   3406 	}
   3407 
   3408 	sc->sc_isreset = 1;
   3409 	return (USBD_NORMAL_COMPLETION);
   3410 }
   3411 
   3412 /*
   3413  * Simulate a hardware hub by handling all the necessary requests.
   3414  */
   3415 usbd_status
   3416 uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3417 {
   3418 	usbd_status err;
   3419 
   3420 	/* Insert last in queue. */
   3421 	err = usb_insert_transfer(xfer);
   3422 	if (err)
   3423 		return (err);
   3424 
   3425 	/*
   3426 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3427 	 * so start it first.
   3428 	 */
   3429 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3430 }
   3431 
   3432 usbd_status
   3433 uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3434 {
   3435 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3436 	usb_device_request_t *req;
   3437 	void *buf = NULL;
   3438 	int port, x;
   3439 	int s, len, value, index, status, change, l, totlen = 0;
   3440 	usb_port_status_t ps;
   3441 	usbd_status err;
   3442 
   3443 	if (sc->sc_dying)
   3444 		return (USBD_IOERROR);
   3445 
   3446 #ifdef DIAGNOSTIC
   3447 	if (!(xfer->rqflags & URQ_REQUEST))
   3448 		panic("uhci_root_ctrl_transfer: not a request");
   3449 #endif
   3450 	req = &xfer->request;
   3451 
   3452 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3453 		    req->bmRequestType, req->bRequest));
   3454 
   3455 	len = UGETW(req->wLength);
   3456 	value = UGETW(req->wValue);
   3457 	index = UGETW(req->wIndex);
   3458 
   3459 	if (len != 0)
   3460 		buf = KERNADDR(&xfer->dmabuf, 0);
   3461 
   3462 #define C(x,y) ((x) | ((y) << 8))
   3463 	switch(C(req->bRequest, req->bmRequestType)) {
   3464 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3465 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3466 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3467 		/*
   3468 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3469 		 * for the integrated root hub.
   3470 		 */
   3471 		break;
   3472 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3473 		if (len > 0) {
   3474 			*(u_int8_t *)buf = sc->sc_conf;
   3475 			totlen = 1;
   3476 		}
   3477 		break;
   3478 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3479 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3480 		if (len == 0)
   3481 			break;
   3482 		switch(value >> 8) {
   3483 		case UDESC_DEVICE:
   3484 			if ((value & 0xff) != 0) {
   3485 				err = USBD_IOERROR;
   3486 				goto ret;
   3487 			}
   3488 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3489 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3490 			memcpy(buf, &uhci_devd, l);
   3491 			break;
   3492 		case UDESC_CONFIG:
   3493 			if ((value & 0xff) != 0) {
   3494 				err = USBD_IOERROR;
   3495 				goto ret;
   3496 			}
   3497 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3498 			memcpy(buf, &uhci_confd, l);
   3499 			buf = (char *)buf + l;
   3500 			len -= l;
   3501 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3502 			totlen += l;
   3503 			memcpy(buf, &uhci_ifcd, l);
   3504 			buf = (char *)buf + l;
   3505 			len -= l;
   3506 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3507 			totlen += l;
   3508 			memcpy(buf, &uhci_endpd, l);
   3509 			break;
   3510 		case UDESC_STRING:
   3511 #define sd ((usb_string_descriptor_t *)buf)
   3512 			switch (value & 0xff) {
   3513 			case 0: /* Language table */
   3514 				totlen = usb_makelangtbl(sd, len);
   3515 				break;
   3516 			case 1: /* Vendor */
   3517 				totlen = usb_makestrdesc(sd, len,
   3518 							 sc->sc_vendor);
   3519 				break;
   3520 			case 2: /* Product */
   3521 				totlen = usb_makestrdesc(sd, len,
   3522 							 "UHCI root hub");
   3523 				break;
   3524 			}
   3525 #undef sd
   3526 			break;
   3527 		default:
   3528 			err = USBD_IOERROR;
   3529 			goto ret;
   3530 		}
   3531 		break;
   3532 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3533 		if (len > 0) {
   3534 			*(u_int8_t *)buf = 0;
   3535 			totlen = 1;
   3536 		}
   3537 		break;
   3538 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3539 		if (len > 1) {
   3540 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3541 			totlen = 2;
   3542 		}
   3543 		break;
   3544 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3545 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3546 		if (len > 1) {
   3547 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3548 			totlen = 2;
   3549 		}
   3550 		break;
   3551 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3552 		if (value >= USB_MAX_DEVICES) {
   3553 			err = USBD_IOERROR;
   3554 			goto ret;
   3555 		}
   3556 		sc->sc_addr = value;
   3557 		break;
   3558 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3559 		if (value != 0 && value != 1) {
   3560 			err = USBD_IOERROR;
   3561 			goto ret;
   3562 		}
   3563 		sc->sc_conf = value;
   3564 		break;
   3565 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3566 		break;
   3567 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3568 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3569 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3570 		err = USBD_IOERROR;
   3571 		goto ret;
   3572 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3573 		break;
   3574 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3575 		break;
   3576 	/* Hub requests */
   3577 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3578 		break;
   3579 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3580 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3581 			     "port=%d feature=%d\n",
   3582 			     index, value));
   3583 		if (index == 1)
   3584 			port = UHCI_PORTSC1;
   3585 		else if (index == 2)
   3586 			port = UHCI_PORTSC2;
   3587 		else {
   3588 			err = USBD_IOERROR;
   3589 			goto ret;
   3590 		}
   3591 		switch(value) {
   3592 		case UHF_PORT_ENABLE:
   3593 			x = URWMASK(UREAD2(sc, port));
   3594 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3595 			break;
   3596 		case UHF_PORT_SUSPEND:
   3597 			x = URWMASK(UREAD2(sc, port));
   3598 			if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
   3599 				break;
   3600 			UWRITE2(sc, port, x | UHCI_PORTSC_RD);
   3601 			/* see USB2 spec ch. 7.1.7.7 */
   3602 			usb_delay_ms(&sc->sc_bus, 20);
   3603 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3604 			/* 10ms resume delay must be provided by caller */
   3605 			break;
   3606 		case UHF_PORT_RESET:
   3607 			x = URWMASK(UREAD2(sc, port));
   3608 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3609 			break;
   3610 		case UHF_C_PORT_CONNECTION:
   3611 			x = URWMASK(UREAD2(sc, port));
   3612 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3613 			break;
   3614 		case UHF_C_PORT_ENABLE:
   3615 			x = URWMASK(UREAD2(sc, port));
   3616 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3617 			break;
   3618 		case UHF_C_PORT_OVER_CURRENT:
   3619 			x = URWMASK(UREAD2(sc, port));
   3620 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3621 			break;
   3622 		case UHF_C_PORT_RESET:
   3623 			sc->sc_isreset = 0;
   3624 			err = USBD_NORMAL_COMPLETION;
   3625 			goto ret;
   3626 		case UHF_PORT_CONNECTION:
   3627 		case UHF_PORT_OVER_CURRENT:
   3628 		case UHF_PORT_POWER:
   3629 		case UHF_PORT_LOW_SPEED:
   3630 		case UHF_C_PORT_SUSPEND:
   3631 		default:
   3632 			err = USBD_IOERROR;
   3633 			goto ret;
   3634 		}
   3635 		break;
   3636 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3637 		if (index == 1)
   3638 			port = UHCI_PORTSC1;
   3639 		else if (index == 2)
   3640 			port = UHCI_PORTSC2;
   3641 		else {
   3642 			err = USBD_IOERROR;
   3643 			goto ret;
   3644 		}
   3645 		if (len > 0) {
   3646 			*(u_int8_t *)buf =
   3647 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3648 				UHCI_PORTSC_LS_SHIFT;
   3649 			totlen = 1;
   3650 		}
   3651 		break;
   3652 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3653 		if (len == 0)
   3654 			break;
   3655 		if ((value & 0xff) != 0) {
   3656 			err = USBD_IOERROR;
   3657 			goto ret;
   3658 		}
   3659 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3660 		totlen = l;
   3661 		memcpy(buf, &uhci_hubd_piix, l);
   3662 		break;
   3663 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3664 		if (len != 4) {
   3665 			err = USBD_IOERROR;
   3666 			goto ret;
   3667 		}
   3668 		memset(buf, 0, len);
   3669 		totlen = len;
   3670 		break;
   3671 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3672 		if (index == 1)
   3673 			port = UHCI_PORTSC1;
   3674 		else if (index == 2)
   3675 			port = UHCI_PORTSC2;
   3676 		else {
   3677 			err = USBD_IOERROR;
   3678 			goto ret;
   3679 		}
   3680 		if (len != 4) {
   3681 			err = USBD_IOERROR;
   3682 			goto ret;
   3683 		}
   3684 		x = UREAD2(sc, port);
   3685 		status = change = 0;
   3686 		if (x & UHCI_PORTSC_CCS)
   3687 			status |= UPS_CURRENT_CONNECT_STATUS;
   3688 		if (x & UHCI_PORTSC_CSC)
   3689 			change |= UPS_C_CONNECT_STATUS;
   3690 		if (x & UHCI_PORTSC_PE)
   3691 			status |= UPS_PORT_ENABLED;
   3692 		if (x & UHCI_PORTSC_POEDC)
   3693 			change |= UPS_C_PORT_ENABLED;
   3694 		if (x & UHCI_PORTSC_OCI)
   3695 			status |= UPS_OVERCURRENT_INDICATOR;
   3696 		if (x & UHCI_PORTSC_OCIC)
   3697 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3698 		if (x & UHCI_PORTSC_SUSP)
   3699 			status |= UPS_SUSPEND;
   3700 		if (x & UHCI_PORTSC_LSDA)
   3701 			status |= UPS_LOW_SPEED;
   3702 		status |= UPS_PORT_POWER;
   3703 		if (sc->sc_isreset)
   3704 			change |= UPS_C_PORT_RESET;
   3705 		USETW(ps.wPortStatus, status);
   3706 		USETW(ps.wPortChange, change);
   3707 		l = min(len, sizeof ps);
   3708 		memcpy(buf, &ps, l);
   3709 		totlen = l;
   3710 		break;
   3711 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3712 		err = USBD_IOERROR;
   3713 		goto ret;
   3714 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3715 		break;
   3716 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3717 		if (index == 1)
   3718 			port = UHCI_PORTSC1;
   3719 		else if (index == 2)
   3720 			port = UHCI_PORTSC2;
   3721 		else {
   3722 			err = USBD_IOERROR;
   3723 			goto ret;
   3724 		}
   3725 		switch(value) {
   3726 		case UHF_PORT_ENABLE:
   3727 			x = URWMASK(UREAD2(sc, port));
   3728 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3729 			break;
   3730 		case UHF_PORT_SUSPEND:
   3731 			x = URWMASK(UREAD2(sc, port));
   3732 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3733 			break;
   3734 		case UHF_PORT_RESET:
   3735 			err = uhci_portreset(sc, index);
   3736 			goto ret;
   3737 		case UHF_PORT_POWER:
   3738 			/* Pretend we turned on power */
   3739 			err = USBD_NORMAL_COMPLETION;
   3740 			goto ret;
   3741 		case UHF_C_PORT_CONNECTION:
   3742 		case UHF_C_PORT_ENABLE:
   3743 		case UHF_C_PORT_OVER_CURRENT:
   3744 		case UHF_PORT_CONNECTION:
   3745 		case UHF_PORT_OVER_CURRENT:
   3746 		case UHF_PORT_LOW_SPEED:
   3747 		case UHF_C_PORT_SUSPEND:
   3748 		case UHF_C_PORT_RESET:
   3749 		default:
   3750 			err = USBD_IOERROR;
   3751 			goto ret;
   3752 		}
   3753 		break;
   3754 	default:
   3755 		err = USBD_IOERROR;
   3756 		goto ret;
   3757 	}
   3758 	xfer->actlen = totlen;
   3759 	err = USBD_NORMAL_COMPLETION;
   3760  ret:
   3761 	xfer->status = err;
   3762 	s = splusb();
   3763 	usb_transfer_complete(xfer);
   3764 	splx(s);
   3765 	return (USBD_IN_PROGRESS);
   3766 }
   3767 
   3768 /* Abort a root control request. */
   3769 void
   3770 uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3771 {
   3772 	/* Nothing to do, all transfers are synchronous. */
   3773 }
   3774 
   3775 /* Close the root pipe. */
   3776 void
   3777 uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3778 {
   3779 	DPRINTF(("uhci_root_ctrl_close\n"));
   3780 }
   3781 
   3782 /* Abort a root interrupt request. */
   3783 void
   3784 uhci_root_intr_abort(usbd_xfer_handle xfer)
   3785 {
   3786 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3787 
   3788 	callout_stop(&sc->sc_poll_handle);
   3789 	sc->sc_intr_xfer = NULL;
   3790 
   3791 	if (xfer->pipe->intrxfer == xfer) {
   3792 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   3793 		xfer->pipe->intrxfer = 0;
   3794 	}
   3795 	xfer->status = USBD_CANCELLED;
   3796 #ifdef DIAGNOSTIC
   3797 	UXFER(xfer)->iinfo.isdone = 1;
   3798 #endif
   3799 	usb_transfer_complete(xfer);
   3800 }
   3801 
   3802 usbd_status
   3803 uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3804 {
   3805 	usbd_status err;
   3806 
   3807 	/* Insert last in queue. */
   3808 	err = usb_insert_transfer(xfer);
   3809 	if (err)
   3810 		return (err);
   3811 
   3812 	/*
   3813 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3814 	 * start first
   3815 	 */
   3816 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3817 }
   3818 
   3819 /* Start a transfer on the root interrupt pipe */
   3820 usbd_status
   3821 uhci_root_intr_start(usbd_xfer_handle xfer)
   3822 {
   3823 	usbd_pipe_handle pipe = xfer->pipe;
   3824 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3825 	unsigned int ival;
   3826 
   3827 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
   3828 		     xfer, xfer->length, xfer->flags));
   3829 
   3830 	if (sc->sc_dying)
   3831 		return (USBD_IOERROR);
   3832 
   3833 	/* XXX temporary variable needed to avoid gcc3 warning */
   3834 	ival = xfer->pipe->endpoint->edesc->bInterval;
   3835 	sc->sc_ival = mstohz(ival);
   3836 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3837 	sc->sc_intr_xfer = xfer;
   3838 	return (USBD_IN_PROGRESS);
   3839 }
   3840 
   3841 /* Close the root interrupt pipe. */
   3842 void
   3843 uhci_root_intr_close(usbd_pipe_handle pipe)
   3844 {
   3845 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3846 
   3847 	callout_stop(&sc->sc_poll_handle);
   3848 	sc->sc_intr_xfer = NULL;
   3849 	DPRINTF(("uhci_root_intr_close\n"));
   3850 }
   3851