uhci.c revision 1.240.6.15
1 /* $NetBSD: uhci.c,v 1.240.6.15 2012/02/26 05:05:44 mrg Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 11 * and Matthew R. Green (mrg (at) eterna.com.au). 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * USB Universal Host Controller driver. 37 * Handles e.g. PIIX3 and PIIX4. 38 * 39 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 40 * USB spec: http://www.usb.org/developers/docs/ 41 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 42 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.240.6.15 2012/02/26 05:05:44 mrg Exp $"); 47 48 #include "opt_usb.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/device.h> 55 #include <sys/select.h> 56 #include <sys/extent.h> 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/bus.h> 60 #include <sys/cpu.h> 61 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/uhcireg.h> 71 #include <dev/usb/uhcivar.h> 72 #include <dev/usb/usbroothub_subr.h> 73 74 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 75 /*#define UHCI_CTL_LOOP */ 76 77 78 79 #ifdef UHCI_DEBUG 80 uhci_softc_t *thesc; 81 #define DPRINTF(x) if (uhcidebug) printf x 82 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 83 int uhcidebug = 0; 84 int uhcinoloop = 0; 85 #else 86 #define DPRINTF(x) 87 #define DPRINTFN(n,x) 88 #endif 89 90 /* 91 * The UHCI controller is little endian, so on big endian machines 92 * the data stored in memory needs to be swapped. 93 */ 94 95 struct uhci_pipe { 96 struct usbd_pipe pipe; 97 int nexttoggle; 98 99 u_char aborting; 100 usbd_xfer_handle abortstart, abortend; 101 102 /* Info needed for different pipe kinds. */ 103 union { 104 /* Control pipe */ 105 struct { 106 uhci_soft_qh_t *sqh; 107 usb_dma_t reqdma; 108 uhci_soft_td_t *setup, *stat; 109 u_int length; 110 } ctl; 111 /* Interrupt pipe */ 112 struct { 113 int npoll; 114 int isread; 115 uhci_soft_qh_t **qhs; 116 } intr; 117 /* Bulk pipe */ 118 struct { 119 uhci_soft_qh_t *sqh; 120 u_int length; 121 int isread; 122 } bulk; 123 /* Iso pipe */ 124 struct iso { 125 uhci_soft_td_t **stds; 126 int next, inuse; 127 } iso; 128 } u; 129 }; 130 131 Static void uhci_globalreset(uhci_softc_t *); 132 Static usbd_status uhci_portreset(uhci_softc_t*, int); 133 Static void uhci_reset(uhci_softc_t *); 134 Static usbd_status uhci_run(uhci_softc_t *, int run); 135 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 136 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 137 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 138 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 139 #if 0 140 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 141 uhci_intr_info_t *); 142 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 143 #endif 144 145 Static void uhci_free_std_chain(uhci_softc_t *, 146 uhci_soft_td_t *, uhci_soft_td_t *); 147 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 148 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 149 uhci_soft_td_t **, uhci_soft_td_t **); 150 Static void uhci_poll_hub(void *); 151 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 152 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 153 Static void uhci_idone(uhci_intr_info_t *); 154 155 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 156 157 Static void uhci_timeout(void *); 158 Static void uhci_timeout_task(void *); 159 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 160 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 161 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 162 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 163 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 164 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 165 Static void uhci_add_loop(uhci_softc_t *sc); 166 Static void uhci_rem_loop(uhci_softc_t *sc); 167 168 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 169 Static void uhci_device_isoc_enter(usbd_xfer_handle); 170 171 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 172 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 173 174 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 175 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 176 Static void uhci_get_lock(struct usbd_bus *, kmutex_t **); 177 178 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 179 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 180 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 181 Static void uhci_device_ctrl_close(usbd_pipe_handle); 182 Static void uhci_device_ctrl_done(usbd_xfer_handle); 183 184 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 185 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 186 Static void uhci_device_intr_abort(usbd_xfer_handle); 187 Static void uhci_device_intr_close(usbd_pipe_handle); 188 Static void uhci_device_intr_done(usbd_xfer_handle); 189 190 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 191 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 192 Static void uhci_device_bulk_abort(usbd_xfer_handle); 193 Static void uhci_device_bulk_close(usbd_pipe_handle); 194 Static void uhci_device_bulk_done(usbd_xfer_handle); 195 196 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 197 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 198 Static void uhci_device_isoc_abort(usbd_xfer_handle); 199 Static void uhci_device_isoc_close(usbd_pipe_handle); 200 Static void uhci_device_isoc_done(usbd_xfer_handle); 201 202 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 203 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 204 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 205 Static void uhci_root_ctrl_close(usbd_pipe_handle); 206 Static void uhci_root_ctrl_done(usbd_xfer_handle); 207 208 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 209 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 210 Static void uhci_root_intr_abort(usbd_xfer_handle); 211 Static void uhci_root_intr_close(usbd_pipe_handle); 212 Static void uhci_root_intr_done(usbd_xfer_handle); 213 214 Static usbd_status uhci_open(usbd_pipe_handle); 215 Static void uhci_poll(struct usbd_bus *); 216 Static void uhci_softintr(void *); 217 218 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 219 220 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 221 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 222 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 223 struct uhci_pipe *pipe, int ival); 224 225 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 226 Static void uhci_noop(usbd_pipe_handle pipe); 227 228 static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 229 uhci_soft_qh_t *); 230 231 #ifdef UHCI_DEBUG 232 Static void uhci_dump_all(uhci_softc_t *); 233 Static void uhci_dumpregs(uhci_softc_t *); 234 Static void uhci_dump_qhs(uhci_soft_qh_t *); 235 Static void uhci_dump_qh(uhci_soft_qh_t *); 236 Static void uhci_dump_tds(uhci_soft_td_t *); 237 Static void uhci_dump_td(uhci_soft_td_t *); 238 Static void uhci_dump_ii(uhci_intr_info_t *ii); 239 void uhci_dump(void); 240 #endif 241 242 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 243 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 244 #define UWRITE1(sc, r, x) \ 245 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 246 } while (/*CONSTCOND*/0) 247 #define UWRITE2(sc, r, x) \ 248 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 249 } while (/*CONSTCOND*/0) 250 #define UWRITE4(sc, r, x) \ 251 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 252 } while (/*CONSTCOND*/0) 253 static __inline uint8_t 254 UREAD1(uhci_softc_t *sc, bus_size_t r) 255 { 256 257 UBARR(sc); 258 return bus_space_read_1(sc->iot, sc->ioh, r); 259 } 260 261 static __inline uint16_t 262 UREAD2(uhci_softc_t *sc, bus_size_t r) 263 { 264 265 UBARR(sc); 266 return bus_space_read_2(sc->iot, sc->ioh, r); 267 } 268 269 static __inline uint32_t 270 UREAD4(uhci_softc_t *sc, bus_size_t r) 271 { 272 273 UBARR(sc); 274 return bus_space_read_4(sc->iot, sc->ioh, r); 275 } 276 277 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 278 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 279 280 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 281 282 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 283 284 #define UHCI_INTR_ENDPT 1 285 286 const struct usbd_bus_methods uhci_bus_methods = { 287 .open_pipe = uhci_open, 288 .soft_intr = uhci_softintr, 289 .do_poll = uhci_poll, 290 .allocm = uhci_allocm, 291 .freem = uhci_freem, 292 .allocx = uhci_allocx, 293 .freex = uhci_freex, 294 .get_lock = uhci_get_lock, 295 }; 296 297 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 298 .transfer = uhci_root_ctrl_transfer, 299 .start = uhci_root_ctrl_start, 300 .abort = uhci_root_ctrl_abort, 301 .close = uhci_root_ctrl_close, 302 .cleartoggle = uhci_noop, 303 .done = uhci_root_ctrl_done, 304 }; 305 306 const struct usbd_pipe_methods uhci_root_intr_methods = { 307 .transfer = uhci_root_intr_transfer, 308 .start = uhci_root_intr_start, 309 .abort = uhci_root_intr_abort, 310 .close = uhci_root_intr_close, 311 .cleartoggle = uhci_noop, 312 .done = uhci_root_intr_done, 313 }; 314 315 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 316 .transfer = uhci_device_ctrl_transfer, 317 .start = uhci_device_ctrl_start, 318 .abort = uhci_device_ctrl_abort, 319 .close = uhci_device_ctrl_close, 320 .cleartoggle = uhci_noop, 321 .done = uhci_device_ctrl_done, 322 }; 323 324 const struct usbd_pipe_methods uhci_device_intr_methods = { 325 .transfer = uhci_device_intr_transfer, 326 .start = uhci_device_intr_start, 327 .abort = uhci_device_intr_abort, 328 .close = uhci_device_intr_close, 329 .cleartoggle = uhci_device_clear_toggle, 330 .done = uhci_device_intr_done, 331 }; 332 333 const struct usbd_pipe_methods uhci_device_bulk_methods = { 334 .transfer = uhci_device_bulk_transfer, 335 .start = uhci_device_bulk_start, 336 .abort = uhci_device_bulk_abort, 337 .close = uhci_device_bulk_close, 338 .cleartoggle = uhci_device_clear_toggle, 339 .done = uhci_device_bulk_done, 340 }; 341 342 const struct usbd_pipe_methods uhci_device_isoc_methods = { 343 .transfer = uhci_device_isoc_transfer, 344 .start = uhci_device_isoc_start, 345 .abort = uhci_device_isoc_abort, 346 .close = uhci_device_isoc_close, 347 .cleartoggle = uhci_noop, 348 .done = uhci_device_isoc_done, 349 }; 350 351 #define uhci_add_intr_info(sc, ii) \ 352 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 353 #define uhci_del_intr_info(ii) \ 354 do { \ 355 LIST_REMOVE((ii), list); \ 356 (ii)->list.le_prev = NULL; \ 357 } while (0) 358 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 359 360 static inline uhci_soft_qh_t * 361 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 362 { 363 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 364 365 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 366 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 367 usb_syncmem(&pqh->dma, 368 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 369 sizeof(pqh->qh.qh_hlink), 370 BUS_DMASYNC_POSTWRITE); 371 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 372 printf("uhci_find_prev_qh: QH not found\n"); 373 return (NULL); 374 } 375 #endif 376 } 377 return (pqh); 378 } 379 380 void 381 uhci_globalreset(uhci_softc_t *sc) 382 { 383 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 384 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 385 UHCICMD(sc, 0); /* do nothing */ 386 } 387 388 usbd_status 389 uhci_init(uhci_softc_t *sc) 390 { 391 usbd_status err; 392 int i, j; 393 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 394 uhci_soft_td_t *std; 395 396 DPRINTFN(1,("uhci_init: start\n")); 397 398 #ifdef UHCI_DEBUG 399 thesc = sc; 400 401 if (uhcidebug > 2) 402 uhci_dumpregs(sc); 403 #endif 404 405 sc->sc_suspend = PWR_RESUME; 406 407 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 408 uhci_globalreset(sc); /* reset the controller */ 409 uhci_reset(sc); 410 411 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 412 USB_MEM_RESERVE); 413 414 /* Allocate and initialize real frame array. */ 415 err = usb_allocmem(&sc->sc_bus, 416 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 417 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 418 if (err) 419 return (err); 420 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 421 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 422 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 423 424 /* 425 * Allocate a TD, inactive, that hangs from the last QH. 426 * This is to avoid a bug in the PIIX that makes it run berserk 427 * otherwise. 428 */ 429 std = uhci_alloc_std(sc); 430 if (std == NULL) 431 return (USBD_NOMEM); 432 std->link.std = NULL; 433 std->td.td_link = htole32(UHCI_PTR_T); 434 std->td.td_status = htole32(0); /* inactive */ 435 std->td.td_token = htole32(0); 436 std->td.td_buffer = htole32(0); 437 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 438 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 439 440 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 441 lsqh = uhci_alloc_sqh(sc); 442 if (lsqh == NULL) 443 return (USBD_NOMEM); 444 lsqh->hlink = NULL; 445 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 446 lsqh->elink = std; 447 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 448 sc->sc_last_qh = lsqh; 449 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 450 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 451 452 /* Allocate the dummy QH where bulk traffic will be queued. */ 453 bsqh = uhci_alloc_sqh(sc); 454 if (bsqh == NULL) 455 return (USBD_NOMEM); 456 bsqh->hlink = lsqh; 457 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 458 bsqh->elink = NULL; 459 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 460 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 461 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 462 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 463 464 /* Allocate dummy QH where high speed control traffic will be queued. */ 465 chsqh = uhci_alloc_sqh(sc); 466 if (chsqh == NULL) 467 return (USBD_NOMEM); 468 chsqh->hlink = bsqh; 469 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 470 chsqh->elink = NULL; 471 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 472 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 473 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 474 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 475 476 /* Allocate dummy QH where control traffic will be queued. */ 477 clsqh = uhci_alloc_sqh(sc); 478 if (clsqh == NULL) 479 return (USBD_NOMEM); 480 clsqh->hlink = chsqh; 481 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 482 clsqh->elink = NULL; 483 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 484 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 485 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 486 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 487 488 /* 489 * Make all (virtual) frame list pointers point to the interrupt 490 * queue heads and the interrupt queue heads at the control 491 * queue head and point the physical frame list to the virtual. 492 */ 493 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 494 std = uhci_alloc_std(sc); 495 sqh = uhci_alloc_sqh(sc); 496 if (std == NULL || sqh == NULL) 497 return (USBD_NOMEM); 498 std->link.sqh = sqh; 499 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 500 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 501 std->td.td_token = htole32(0); 502 std->td.td_buffer = htole32(0); 503 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 504 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 505 sqh->hlink = clsqh; 506 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 507 sqh->elink = NULL; 508 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 509 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 510 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 511 sc->sc_vframes[i].htd = std; 512 sc->sc_vframes[i].etd = std; 513 sc->sc_vframes[i].hqh = sqh; 514 sc->sc_vframes[i].eqh = sqh; 515 for (j = i; 516 j < UHCI_FRAMELIST_COUNT; 517 j += UHCI_VFRAMELIST_COUNT) 518 sc->sc_pframes[j] = htole32(std->physaddr); 519 } 520 usb_syncmem(&sc->sc_dma, 0, 521 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 522 BUS_DMASYNC_PREWRITE); 523 524 525 LIST_INIT(&sc->sc_intrhead); 526 527 SIMPLEQ_INIT(&sc->sc_free_xfers); 528 529 callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE); 530 531 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 532 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 533 cv_init(&sc->sc_softwake_cv, "uhciab"); 534 535 /* Set up the bus struct. */ 536 sc->sc_bus.methods = &uhci_bus_methods; 537 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 538 539 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 540 541 DPRINTFN(1,("uhci_init: enabling\n")); 542 543 err = uhci_run(sc, 1); /* and here we go... */ 544 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 545 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 546 return err; 547 } 548 549 int 550 uhci_activate(device_t self, enum devact act) 551 { 552 struct uhci_softc *sc = device_private(self); 553 554 switch (act) { 555 case DVACT_DEACTIVATE: 556 sc->sc_dying = 1; 557 return 0; 558 default: 559 return EOPNOTSUPP; 560 } 561 } 562 563 void 564 uhci_childdet(device_t self, device_t child) 565 { 566 struct uhci_softc *sc = device_private(self); 567 568 KASSERT(sc->sc_child == child); 569 sc->sc_child = NULL; 570 } 571 572 int 573 uhci_detach(struct uhci_softc *sc, int flags) 574 { 575 usbd_xfer_handle xfer; 576 int rv = 0; 577 578 if (sc->sc_child != NULL) 579 rv = config_detach(sc->sc_child, flags); 580 581 if (rv != 0) 582 return (rv); 583 584 /* Free all xfers associated with this HC. */ 585 for (;;) { 586 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 587 if (xfer == NULL) 588 break; 589 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 590 kmem_free(xfer, sizeof(struct uhci_xfer)); 591 } 592 593 callout_halt(&sc->sc_poll_handle, NULL); 594 callout_destroy(&sc->sc_poll_handle); 595 596 cv_destroy(&sc->sc_softwake_cv); 597 598 mutex_destroy(&sc->sc_lock); 599 mutex_destroy(&sc->sc_intr_lock); 600 601 /* XXX free other data structures XXX */ 602 603 return (rv); 604 } 605 606 usbd_status 607 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 608 { 609 struct uhci_softc *sc = bus->hci_private; 610 usbd_status status; 611 u_int32_t n; 612 613 /* 614 * XXX 615 * Since we are allocating a buffer we can assume that we will 616 * need TDs for it. Since we don't want to allocate those from 617 * an interrupt context, we allocate them here and free them again. 618 * This is no guarantee that we'll get the TDs next time... 619 */ 620 n = size / 8; 621 if (n > 16) { 622 u_int32_t i; 623 uhci_soft_td_t **stds; 624 625 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 626 stds = kmem_alloc(sizeof(uhci_soft_td_t *) * n, KM_SLEEP); 627 if (!stds) 628 return USBD_NOMEM; 629 for(i = 0; i < n; i++) 630 stds[i] = uhci_alloc_std(sc); 631 for(i = 0; i < n; i++) 632 if (stds[i] != NULL) 633 uhci_free_std(sc, stds[i]); 634 kmem_free(stds, sizeof(uhci_soft_td_t *) * n); 635 } 636 637 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 638 if (status == USBD_NOMEM) 639 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 640 return status; 641 } 642 643 void 644 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 645 { 646 if (dma->block->flags & USB_DMA_RESERVE) { 647 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 648 dma); 649 return; 650 } 651 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 652 } 653 654 usbd_xfer_handle 655 uhci_allocx(struct usbd_bus *bus) 656 { 657 struct uhci_softc *sc = bus->hci_private; 658 usbd_xfer_handle xfer; 659 660 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 661 if (xfer != NULL) { 662 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 663 #ifdef DIAGNOSTIC 664 if (xfer->busy_free != XFER_FREE) { 665 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 666 xfer->busy_free); 667 } 668 #endif 669 } else { 670 xfer = kmem_alloc(sizeof(struct uhci_xfer), KM_SLEEP); 671 } 672 if (xfer != NULL) { 673 memset(xfer, 0, sizeof (struct uhci_xfer)); 674 UXFER(xfer)->iinfo.sc = sc; 675 #ifdef DIAGNOSTIC 676 UXFER(xfer)->iinfo.isdone = 1; 677 xfer->busy_free = XFER_BUSY; 678 #endif 679 } 680 return (xfer); 681 } 682 683 void 684 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 685 { 686 struct uhci_softc *sc = bus->hci_private; 687 688 #ifdef DIAGNOSTIC 689 if (xfer->busy_free != XFER_BUSY) { 690 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 691 xfer->busy_free); 692 } 693 xfer->busy_free = XFER_FREE; 694 if (!UXFER(xfer)->iinfo.isdone) { 695 printf("uhci_freex: !isdone\n"); 696 } 697 #endif 698 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 699 } 700 701 Static void 702 uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 703 { 704 struct uhci_softc *sc = bus->hci_private; 705 706 *lock = &sc->sc_lock; 707 } 708 709 710 /* 711 * Handle suspend/resume. 712 * 713 * We need to switch to polling mode here, because this routine is 714 * called from an interrupt context. This is all right since we 715 * are almost suspended anyway. 716 */ 717 bool 718 uhci_resume(device_t dv, const pmf_qual_t *qual) 719 { 720 uhci_softc_t *sc = device_private(dv); 721 int cmd; 722 723 mutex_spin_enter(&sc->sc_intr_lock); 724 725 cmd = UREAD2(sc, UHCI_CMD); 726 sc->sc_bus.use_polling++; 727 UWRITE2(sc, UHCI_INTR, 0); 728 uhci_globalreset(sc); 729 uhci_reset(sc); 730 if (cmd & UHCI_CMD_RS) 731 uhci_run(sc, 0); 732 733 /* restore saved state */ 734 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 735 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 736 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 737 738 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 739 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 740 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 741 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 742 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 743 UHCICMD(sc, UHCI_CMD_MAXP); 744 uhci_run(sc, 1); /* and start traffic again */ 745 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 746 sc->sc_bus.use_polling--; 747 if (sc->sc_intr_xfer != NULL) 748 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 749 sc->sc_intr_xfer); 750 #ifdef UHCI_DEBUG 751 if (uhcidebug > 2) 752 uhci_dumpregs(sc); 753 #endif 754 755 sc->sc_suspend = PWR_RESUME; 756 mutex_spin_exit(&sc->sc_intr_lock); 757 758 return true; 759 } 760 761 bool 762 uhci_suspend(device_t dv, const pmf_qual_t *qual) 763 { 764 uhci_softc_t *sc = device_private(dv); 765 int cmd; 766 767 mutex_spin_enter(&sc->sc_intr_lock); 768 769 cmd = UREAD2(sc, UHCI_CMD); 770 771 #ifdef UHCI_DEBUG 772 if (uhcidebug > 2) 773 uhci_dumpregs(sc); 774 #endif 775 if (sc->sc_intr_xfer != NULL) 776 callout_stop(&sc->sc_poll_handle); 777 sc->sc_suspend = PWR_SUSPEND; 778 sc->sc_bus.use_polling++; 779 780 uhci_run(sc, 0); /* stop the controller */ 781 cmd &= ~UHCI_CMD_RS; 782 783 /* save some state if BIOS doesn't */ 784 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 785 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 786 787 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 788 789 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 790 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 791 sc->sc_bus.use_polling--; 792 793 mutex_spin_exit(&sc->sc_intr_lock); 794 795 return true; 796 } 797 798 #ifdef UHCI_DEBUG 799 Static void 800 uhci_dumpregs(uhci_softc_t *sc) 801 { 802 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 803 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 804 device_xname(sc->sc_dev), 805 UREAD2(sc, UHCI_CMD), 806 UREAD2(sc, UHCI_STS), 807 UREAD2(sc, UHCI_INTR), 808 UREAD2(sc, UHCI_FRNUM), 809 UREAD4(sc, UHCI_FLBASEADDR), 810 UREAD1(sc, UHCI_SOF), 811 UREAD2(sc, UHCI_PORTSC1), 812 UREAD2(sc, UHCI_PORTSC2))); 813 } 814 815 void 816 uhci_dump_td(uhci_soft_td_t *p) 817 { 818 char sbuf[128], sbuf2[128]; 819 820 821 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 822 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 823 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 824 "token=0x%08lx buffer=0x%08lx\n", 825 p, (long)p->physaddr, 826 (long)le32toh(p->td.td_link), 827 (long)le32toh(p->td.td_status), 828 (long)le32toh(p->td.td_token), 829 (long)le32toh(p->td.td_buffer))); 830 831 snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF", 832 (u_int32_t)le32toh(p->td.td_link)); 833 snprintb(sbuf2, sizeof(sbuf2), 834 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 835 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 836 (u_int32_t)le32toh(p->td.td_status)); 837 838 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 839 "D=%d,maxlen=%d\n", sbuf, sbuf2, 840 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 841 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 842 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 843 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 844 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 845 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 846 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 847 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 848 BUS_DMASYNC_PREREAD); 849 } 850 851 void 852 uhci_dump_qh(uhci_soft_qh_t *sqh) 853 { 854 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 855 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 856 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 857 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 858 le32toh(sqh->qh.qh_elink))); 859 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 860 } 861 862 863 #if 1 864 void 865 uhci_dump(void) 866 { 867 uhci_dump_all(thesc); 868 } 869 #endif 870 871 void 872 uhci_dump_all(uhci_softc_t *sc) 873 { 874 uhci_dumpregs(sc); 875 printf("intrs=%d\n", sc->sc_bus.no_intrs); 876 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 877 uhci_dump_qh(sc->sc_lctl_start); 878 } 879 880 881 void 882 uhci_dump_qhs(uhci_soft_qh_t *sqh) 883 { 884 uhci_dump_qh(sqh); 885 886 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 887 * Traverses sideways first, then down. 888 * 889 * QH1 890 * QH2 891 * No QH 892 * TD2.1 893 * TD2.2 894 * TD1.1 895 * etc. 896 * 897 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 898 */ 899 900 901 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 902 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 903 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 904 uhci_dump_qhs(sqh->hlink); 905 else 906 DPRINTF(("No QH\n")); 907 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 908 909 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 910 uhci_dump_tds(sqh->elink); 911 else 912 DPRINTF(("No TD\n")); 913 } 914 915 void 916 uhci_dump_tds(uhci_soft_td_t *std) 917 { 918 uhci_soft_td_t *td; 919 int stop; 920 921 for(td = std; td != NULL; td = td->link.std) { 922 uhci_dump_td(td); 923 924 /* Check whether the link pointer in this TD marks 925 * the link pointer as end of queue. This avoids 926 * printing the free list in case the queue/TD has 927 * already been moved there (seatbelt). 928 */ 929 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 930 sizeof(td->td.td_link), 931 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 932 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 933 le32toh(td->td.td_link) == 0); 934 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 935 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 936 if (stop) 937 break; 938 } 939 } 940 941 Static void 942 uhci_dump_ii(uhci_intr_info_t *ii) 943 { 944 usbd_pipe_handle pipe; 945 usb_endpoint_descriptor_t *ed; 946 usbd_device_handle dev; 947 948 #ifdef DIAGNOSTIC 949 #define DONE ii->isdone 950 #else 951 #define DONE 0 952 #endif 953 if (ii == NULL) { 954 printf("ii NULL\n"); 955 return; 956 } 957 if (ii->xfer == NULL) { 958 printf("ii %p: done=%d xfer=NULL\n", 959 ii, DONE); 960 return; 961 } 962 pipe = ii->xfer->pipe; 963 if (pipe == NULL) { 964 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 965 ii, DONE, ii->xfer); 966 return; 967 } 968 if (pipe->endpoint == NULL) { 969 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 970 ii, DONE, ii->xfer, pipe); 971 return; 972 } 973 if (pipe->device == NULL) { 974 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 975 ii, DONE, ii->xfer, pipe); 976 return; 977 } 978 ed = pipe->endpoint->edesc; 979 dev = pipe->device; 980 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 981 ii, DONE, ii->xfer, dev, 982 UGETW(dev->ddesc.idVendor), 983 UGETW(dev->ddesc.idProduct), 984 dev->address, pipe, 985 ed->bEndpointAddress, ed->bmAttributes); 986 #undef DONE 987 } 988 989 void uhci_dump_iis(struct uhci_softc *sc); 990 void 991 uhci_dump_iis(struct uhci_softc *sc) 992 { 993 uhci_intr_info_t *ii; 994 995 printf("intr_info list:\n"); 996 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 997 uhci_dump_ii(ii); 998 } 999 1000 void iidump(void); 1001 void iidump(void) { uhci_dump_iis(thesc); } 1002 1003 #endif 1004 1005 /* 1006 * This routine is executed periodically and simulates interrupts 1007 * from the root controller interrupt pipe for port status change. 1008 */ 1009 void 1010 uhci_poll_hub(void *addr) 1011 { 1012 usbd_xfer_handle xfer = addr; 1013 usbd_pipe_handle pipe = xfer->pipe; 1014 uhci_softc_t *sc; 1015 u_char *p; 1016 1017 DPRINTFN(20, ("uhci_poll_hub\n")); 1018 1019 if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL)) 1020 return; /* device has detached */ 1021 sc = pipe->device->bus->hci_private; 1022 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1023 1024 p = KERNADDR(&xfer->dmabuf, 0); 1025 p[0] = 0; 1026 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1027 p[0] |= 1<<1; 1028 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1029 p[0] |= 1<<2; 1030 if (p[0] == 0) 1031 /* No change, try again in a while */ 1032 return; 1033 1034 xfer->actlen = 1; 1035 xfer->status = USBD_NORMAL_COMPLETION; 1036 mutex_enter(&sc->sc_lock); 1037 usb_transfer_complete(xfer); 1038 mutex_exit(&sc->sc_lock); 1039 } 1040 1041 void 1042 uhci_root_intr_done(usbd_xfer_handle xfer) 1043 { 1044 } 1045 1046 void 1047 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1048 { 1049 } 1050 1051 /* 1052 * Let the last QH loop back to the high speed control transfer QH. 1053 * This is what intel calls "bandwidth reclamation" and improves 1054 * USB performance a lot for some devices. 1055 * If we are already looping, just count it. 1056 */ 1057 void 1058 uhci_add_loop(uhci_softc_t *sc) { 1059 #ifdef UHCI_DEBUG 1060 if (uhcinoloop) 1061 return; 1062 #endif 1063 if (++sc->sc_loops == 1) { 1064 DPRINTFN(5,("uhci_start_loop: add\n")); 1065 /* Note, we don't loop back the soft pointer. */ 1066 sc->sc_last_qh->qh.qh_hlink = 1067 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1068 usb_syncmem(&sc->sc_last_qh->dma, 1069 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1070 sizeof(sc->sc_last_qh->qh.qh_hlink), 1071 BUS_DMASYNC_PREWRITE); 1072 } 1073 } 1074 1075 void 1076 uhci_rem_loop(uhci_softc_t *sc) { 1077 #ifdef UHCI_DEBUG 1078 if (uhcinoloop) 1079 return; 1080 #endif 1081 if (--sc->sc_loops == 0) { 1082 DPRINTFN(5,("uhci_end_loop: remove\n")); 1083 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1084 usb_syncmem(&sc->sc_last_qh->dma, 1085 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1086 sizeof(sc->sc_last_qh->qh.qh_hlink), 1087 BUS_DMASYNC_PREWRITE); 1088 } 1089 } 1090 1091 /* Add high speed control QH, called with lock held. */ 1092 void 1093 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1094 { 1095 uhci_soft_qh_t *eqh; 1096 1097 KASSERT(mutex_owned(&sc->sc_lock)); 1098 1099 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1100 eqh = sc->sc_hctl_end; 1101 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1102 sizeof(eqh->qh.qh_hlink), 1103 BUS_DMASYNC_POSTWRITE); 1104 sqh->hlink = eqh->hlink; 1105 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1106 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1107 BUS_DMASYNC_PREWRITE); 1108 eqh->hlink = sqh; 1109 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1110 sc->sc_hctl_end = sqh; 1111 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1112 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1113 #ifdef UHCI_CTL_LOOP 1114 uhci_add_loop(sc); 1115 #endif 1116 } 1117 1118 /* Remove high speed control QH, called with lock held. */ 1119 void 1120 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1121 { 1122 uhci_soft_qh_t *pqh; 1123 1124 KASSERT(mutex_owned(&sc->sc_lock)); 1125 1126 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1127 #ifdef UHCI_CTL_LOOP 1128 uhci_rem_loop(sc); 1129 #endif 1130 /* 1131 * The T bit should be set in the elink of the QH so that the HC 1132 * doesn't follow the pointer. This condition may fail if the 1133 * the transferred packet was short so that the QH still points 1134 * at the last used TD. 1135 * In this case we set the T bit and wait a little for the HC 1136 * to stop looking at the TD. 1137 * Note that if the TD chain is large enough, the controller 1138 * may still be looking at the chain at the end of this function. 1139 * uhci_free_std_chain() will make sure the controller stops 1140 * looking at it quickly, but until then we should not change 1141 * sqh->hlink. 1142 */ 1143 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1144 sizeof(sqh->qh.qh_elink), 1145 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1146 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1147 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1148 usb_syncmem(&sqh->dma, 1149 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1150 sizeof(sqh->qh.qh_elink), 1151 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1152 delay(UHCI_QH_REMOVE_DELAY); 1153 } 1154 1155 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1156 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1157 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1158 pqh->hlink = sqh->hlink; 1159 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1160 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1161 sizeof(pqh->qh.qh_hlink), 1162 BUS_DMASYNC_PREWRITE); 1163 delay(UHCI_QH_REMOVE_DELAY); 1164 if (sc->sc_hctl_end == sqh) 1165 sc->sc_hctl_end = pqh; 1166 } 1167 1168 /* Add low speed control QH, called with lock held. */ 1169 void 1170 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1171 { 1172 uhci_soft_qh_t *eqh; 1173 1174 KASSERT(mutex_owned(&sc->sc_lock)); 1175 1176 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1177 eqh = sc->sc_lctl_end; 1178 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1179 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1180 sqh->hlink = eqh->hlink; 1181 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1182 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1183 BUS_DMASYNC_PREWRITE); 1184 eqh->hlink = sqh; 1185 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1186 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1187 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1188 sc->sc_lctl_end = sqh; 1189 } 1190 1191 /* Remove low speed control QH, called with lock held. */ 1192 void 1193 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1194 { 1195 uhci_soft_qh_t *pqh; 1196 1197 KASSERT(mutex_owned(&sc->sc_lock)); 1198 1199 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1200 /* See comment in uhci_remove_hs_ctrl() */ 1201 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1202 sizeof(sqh->qh.qh_elink), 1203 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1204 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1205 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1206 usb_syncmem(&sqh->dma, 1207 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1208 sizeof(sqh->qh.qh_elink), 1209 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1210 delay(UHCI_QH_REMOVE_DELAY); 1211 } 1212 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1213 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1214 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1215 pqh->hlink = sqh->hlink; 1216 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1217 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1218 sizeof(pqh->qh.qh_hlink), 1219 BUS_DMASYNC_PREWRITE); 1220 delay(UHCI_QH_REMOVE_DELAY); 1221 if (sc->sc_lctl_end == sqh) 1222 sc->sc_lctl_end = pqh; 1223 } 1224 1225 /* Add bulk QH, called with lock held. */ 1226 void 1227 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1228 { 1229 uhci_soft_qh_t *eqh; 1230 1231 KASSERT(mutex_owned(&sc->sc_lock)); 1232 1233 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1234 eqh = sc->sc_bulk_end; 1235 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1236 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1237 sqh->hlink = eqh->hlink; 1238 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1239 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1240 BUS_DMASYNC_PREWRITE); 1241 eqh->hlink = sqh; 1242 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1243 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1244 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1245 sc->sc_bulk_end = sqh; 1246 uhci_add_loop(sc); 1247 } 1248 1249 /* Remove bulk QH, called with lock held. */ 1250 void 1251 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1252 { 1253 uhci_soft_qh_t *pqh; 1254 1255 KASSERT(mutex_owned(&sc->sc_lock)); 1256 1257 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1258 uhci_rem_loop(sc); 1259 /* See comment in uhci_remove_hs_ctrl() */ 1260 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1261 sizeof(sqh->qh.qh_elink), 1262 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1263 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1264 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1265 usb_syncmem(&sqh->dma, 1266 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1267 sizeof(sqh->qh.qh_elink), 1268 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1269 delay(UHCI_QH_REMOVE_DELAY); 1270 } 1271 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1272 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1273 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1274 pqh->hlink = sqh->hlink; 1275 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1276 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1277 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1278 delay(UHCI_QH_REMOVE_DELAY); 1279 if (sc->sc_bulk_end == sqh) 1280 sc->sc_bulk_end = pqh; 1281 } 1282 1283 Static int uhci_intr1(uhci_softc_t *); 1284 1285 int 1286 uhci_intr(void *arg) 1287 { 1288 uhci_softc_t *sc = arg; 1289 int ret = 0; 1290 1291 mutex_spin_enter(&sc->sc_intr_lock); 1292 1293 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1294 goto done; 1295 1296 if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) { 1297 #ifdef DIAGNOSTIC 1298 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1299 #endif 1300 goto done; 1301 } 1302 1303 ret = uhci_intr1(sc); 1304 1305 done: 1306 mutex_spin_exit(&sc->sc_intr_lock); 1307 return ret; 1308 } 1309 1310 int 1311 uhci_intr1(uhci_softc_t *sc) 1312 { 1313 int status; 1314 int ack; 1315 1316 #ifdef UHCI_DEBUG 1317 if (uhcidebug > 15) { 1318 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1319 uhci_dumpregs(sc); 1320 } 1321 #endif 1322 1323 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1324 1325 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1326 if (status == 0) /* The interrupt was not for us. */ 1327 return (0); 1328 1329 if (sc->sc_suspend != PWR_RESUME) { 1330 #ifdef DIAGNOSTIC 1331 printf("%s: interrupt while not operating ignored\n", 1332 device_xname(sc->sc_dev)); 1333 #endif 1334 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1335 return (0); 1336 } 1337 1338 ack = 0; 1339 if (status & UHCI_STS_USBINT) 1340 ack |= UHCI_STS_USBINT; 1341 if (status & UHCI_STS_USBEI) 1342 ack |= UHCI_STS_USBEI; 1343 if (status & UHCI_STS_RD) { 1344 ack |= UHCI_STS_RD; 1345 #ifdef UHCI_DEBUG 1346 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1347 #endif 1348 } 1349 if (status & UHCI_STS_HSE) { 1350 ack |= UHCI_STS_HSE; 1351 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1352 } 1353 if (status & UHCI_STS_HCPE) { 1354 ack |= UHCI_STS_HCPE; 1355 printf("%s: host controller process error\n", 1356 device_xname(sc->sc_dev)); 1357 } 1358 1359 /* When HCHalted=1 and Run/Stop=0 , it is normal */ 1360 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) { 1361 /* no acknowledge needed */ 1362 if (!sc->sc_dying) { 1363 printf("%s: host controller halted\n", 1364 device_xname(sc->sc_dev)); 1365 #ifdef UHCI_DEBUG 1366 uhci_dump_all(sc); 1367 #endif 1368 } 1369 sc->sc_dying = 1; 1370 } 1371 1372 if (!ack) 1373 return (0); /* nothing to acknowledge */ 1374 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1375 1376 sc->sc_bus.no_intrs++; 1377 usb_schedsoftintr(&sc->sc_bus); 1378 1379 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1380 1381 return (1); 1382 } 1383 1384 void 1385 uhci_softintr(void *v) 1386 { 1387 struct usbd_bus *bus = v; 1388 uhci_softc_t *sc = bus->hci_private; 1389 uhci_intr_info_t *ii, *nextii; 1390 1391 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1392 1393 DPRINTFN(10,("%s: uhci_softintr\n", device_xname(sc->sc_dev))); 1394 1395 /* 1396 * Interrupts on UHCI really suck. When the host controller 1397 * interrupts because a transfer is completed there is no 1398 * way of knowing which transfer it was. You can scan down 1399 * the TDs and QHs of the previous frame to limit the search, 1400 * but that assumes that the interrupt was not delayed by more 1401 * than 1 ms, which may not always be true (e.g. after debug 1402 * output on a slow console). 1403 * We scan all interrupt descriptors to see if any have 1404 * completed. 1405 */ 1406 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1407 nextii = LIST_NEXT(ii, list); 1408 uhci_check_intr(sc, ii); 1409 } 1410 1411 if (sc->sc_softwake) { 1412 sc->sc_softwake = 0; 1413 cv_broadcast(&sc->sc_softwake_cv); 1414 } 1415 } 1416 1417 /* Check for an interrupt. */ 1418 void 1419 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1420 { 1421 uhci_soft_td_t *std, *lstd; 1422 u_int32_t status; 1423 1424 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1425 #ifdef DIAGNOSTIC 1426 if (ii == NULL) { 1427 printf("uhci_check_intr: no ii? %p\n", ii); 1428 return; 1429 } 1430 #endif 1431 if (ii->xfer->status == USBD_CANCELLED || 1432 ii->xfer->status == USBD_TIMEOUT) { 1433 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1434 return; 1435 } 1436 1437 if (ii->stdstart == NULL) 1438 return; 1439 lstd = ii->stdend; 1440 #ifdef DIAGNOSTIC 1441 if (lstd == NULL) { 1442 printf("uhci_check_intr: std==0\n"); 1443 return; 1444 } 1445 #endif 1446 /* 1447 * If the last TD is still active we need to check whether there 1448 * is an error somewhere in the middle, or whether there was a 1449 * short packet (SPD and not ACTIVE). 1450 */ 1451 usb_syncmem(&lstd->dma, 1452 lstd->offs + offsetof(uhci_td_t, td_status), 1453 sizeof(lstd->td.td_status), 1454 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1455 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1456 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1457 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1458 usb_syncmem(&std->dma, 1459 std->offs + offsetof(uhci_td_t, td_status), 1460 sizeof(std->td.td_status), 1461 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1462 status = le32toh(std->td.td_status); 1463 usb_syncmem(&std->dma, 1464 std->offs + offsetof(uhci_td_t, td_status), 1465 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1466 /* If there's an active TD the xfer isn't done. */ 1467 if (status & UHCI_TD_ACTIVE) 1468 break; 1469 /* Any kind of error makes the xfer done. */ 1470 if (status & UHCI_TD_STALLED) 1471 goto done; 1472 /* We want short packets, and it is short: it's done */ 1473 usb_syncmem(&std->dma, 1474 std->offs + offsetof(uhci_td_t, td_token), 1475 sizeof(std->td.td_token), 1476 BUS_DMASYNC_POSTWRITE); 1477 if ((status & UHCI_TD_SPD) && 1478 UHCI_TD_GET_ACTLEN(status) < 1479 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1480 goto done; 1481 } 1482 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1483 ii, ii->stdstart)); 1484 usb_syncmem(&lstd->dma, 1485 lstd->offs + offsetof(uhci_td_t, td_status), 1486 sizeof(lstd->td.td_status), 1487 BUS_DMASYNC_PREREAD); 1488 return; 1489 } 1490 done: 1491 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1492 callout_stop(&ii->xfer->timeout_handle); 1493 uhci_idone(ii); 1494 } 1495 1496 /* Called with USB lock held. */ 1497 void 1498 uhci_idone(uhci_intr_info_t *ii) 1499 { 1500 usbd_xfer_handle xfer = ii->xfer; 1501 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1502 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1503 uhci_soft_td_t *std; 1504 u_int32_t status = 0, nstatus; 1505 int actlen; 1506 1507 KASSERT(mutex_owned(&sc->sc_lock)); 1508 1509 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1510 #ifdef DIAGNOSTIC 1511 { 1512 /* XXX SMP? */ 1513 int s = splhigh(); 1514 if (ii->isdone) { 1515 splx(s); 1516 #ifdef UHCI_DEBUG 1517 printf("uhci_idone: ii is done!\n "); 1518 uhci_dump_ii(ii); 1519 #else 1520 printf("uhci_idone: ii=%p is done!\n", ii); 1521 #endif 1522 return; 1523 } 1524 ii->isdone = 1; 1525 splx(s); 1526 } 1527 #endif 1528 1529 if (xfer->nframes != 0) { 1530 /* Isoc transfer, do things differently. */ 1531 uhci_soft_td_t **stds = upipe->u.iso.stds; 1532 int i, n, nframes, len; 1533 1534 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1535 1536 nframes = xfer->nframes; 1537 actlen = 0; 1538 n = UXFER(xfer)->curframe; 1539 for (i = 0; i < nframes; i++) { 1540 std = stds[n]; 1541 #ifdef UHCI_DEBUG 1542 if (uhcidebug > 5) { 1543 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1544 uhci_dump_td(std); 1545 } 1546 #endif 1547 if (++n >= UHCI_VFRAMELIST_COUNT) 1548 n = 0; 1549 usb_syncmem(&std->dma, 1550 std->offs + offsetof(uhci_td_t, td_status), 1551 sizeof(std->td.td_status), 1552 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1553 status = le32toh(std->td.td_status); 1554 len = UHCI_TD_GET_ACTLEN(status); 1555 xfer->frlengths[i] = len; 1556 actlen += len; 1557 } 1558 upipe->u.iso.inuse -= nframes; 1559 xfer->actlen = actlen; 1560 xfer->status = USBD_NORMAL_COMPLETION; 1561 goto end; 1562 } 1563 1564 #ifdef UHCI_DEBUG 1565 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1566 ii, xfer, upipe)); 1567 if (uhcidebug > 10) 1568 uhci_dump_tds(ii->stdstart); 1569 #endif 1570 1571 /* The transfer is done, compute actual length and status. */ 1572 actlen = 0; 1573 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1574 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1575 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1576 nstatus = le32toh(std->td.td_status); 1577 if (nstatus & UHCI_TD_ACTIVE) 1578 break; 1579 1580 status = nstatus; 1581 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1582 UHCI_TD_PID_SETUP) 1583 actlen += UHCI_TD_GET_ACTLEN(status); 1584 else { 1585 /* 1586 * UHCI will report CRCTO in addition to a STALL or NAK 1587 * for a SETUP transaction. See section 3.2.2, "TD 1588 * CONTROL AND STATUS". 1589 */ 1590 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1591 status &= ~UHCI_TD_CRCTO; 1592 } 1593 } 1594 /* If there are left over TDs we need to update the toggle. */ 1595 if (std != NULL) 1596 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1597 1598 status &= UHCI_TD_ERROR; 1599 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1600 actlen, status)); 1601 xfer->actlen = actlen; 1602 if (status != 0) { 1603 #ifdef UHCI_DEBUG 1604 char sbuf[128]; 1605 1606 snprintb(sbuf, sizeof(sbuf), 1607 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1608 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status); 1609 1610 DPRINTFN((status == UHCI_TD_STALLED)*10, 1611 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1612 "status 0x%s\n", 1613 xfer->pipe->device->address, 1614 xfer->pipe->endpoint->edesc->bEndpointAddress, 1615 sbuf)); 1616 #endif 1617 1618 if (status == UHCI_TD_STALLED) 1619 xfer->status = USBD_STALLED; 1620 else 1621 xfer->status = USBD_IOERROR; /* more info XXX */ 1622 } else { 1623 xfer->status = USBD_NORMAL_COMPLETION; 1624 } 1625 1626 end: 1627 usb_transfer_complete(xfer); 1628 KASSERT(mutex_owned(&sc->sc_lock)); 1629 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1630 } 1631 1632 /* 1633 * Called when a request does not complete. 1634 */ 1635 void 1636 uhci_timeout(void *addr) 1637 { 1638 uhci_intr_info_t *ii = addr; 1639 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1640 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1641 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1642 1643 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1644 1645 if (sc->sc_dying) { 1646 mutex_enter(&sc->sc_lock); 1647 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1648 mutex_exit(&sc->sc_lock); 1649 return; 1650 } 1651 1652 /* Execute the abort in a process context. */ 1653 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1654 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1655 USB_TASKQ_HC); 1656 } 1657 1658 void 1659 uhci_timeout_task(void *addr) 1660 { 1661 usbd_xfer_handle xfer = addr; 1662 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1663 1664 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1665 1666 mutex_enter(&sc->sc_lock); 1667 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1668 mutex_exit(&sc->sc_lock); 1669 } 1670 1671 /* 1672 * Wait here until controller claims to have an interrupt. 1673 * Then call uhci_intr and return. Use timeout to avoid waiting 1674 * too long. 1675 * Only used during boot when interrupts are not enabled yet. 1676 */ 1677 void 1678 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1679 { 1680 int timo = xfer->timeout; 1681 uhci_intr_info_t *ii; 1682 1683 mutex_enter(&sc->sc_lock); 1684 1685 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1686 1687 xfer->status = USBD_IN_PROGRESS; 1688 for (; timo >= 0; timo--) { 1689 usb_delay_ms(&sc->sc_bus, 1); 1690 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1691 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1692 mutex_spin_enter(&sc->sc_intr_lock); 1693 uhci_intr1(sc); 1694 mutex_spin_exit(&sc->sc_intr_lock); 1695 if (xfer->status != USBD_IN_PROGRESS) 1696 goto done; 1697 } 1698 } 1699 1700 /* Timeout */ 1701 DPRINTF(("uhci_waitintr: timeout\n")); 1702 for (ii = LIST_FIRST(&sc->sc_intrhead); 1703 ii != NULL && ii->xfer != xfer; 1704 ii = LIST_NEXT(ii, list)) 1705 ; 1706 #ifdef DIAGNOSTIC 1707 if (ii == NULL) 1708 panic("uhci_waitintr: lost intr_info"); 1709 #endif 1710 uhci_idone(ii); 1711 1712 done: 1713 mutex_exit(&sc->sc_lock); 1714 } 1715 1716 void 1717 uhci_poll(struct usbd_bus *bus) 1718 { 1719 uhci_softc_t *sc = bus->hci_private; 1720 1721 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1722 mutex_spin_enter(&sc->sc_intr_lock); 1723 uhci_intr1(sc); 1724 mutex_spin_exit(&sc->sc_intr_lock); 1725 } 1726 } 1727 1728 void 1729 uhci_reset(uhci_softc_t *sc) 1730 { 1731 int n; 1732 1733 UHCICMD(sc, UHCI_CMD_HCRESET); 1734 /* The reset bit goes low when the controller is done. */ 1735 for (n = 0; n < UHCI_RESET_TIMEOUT && 1736 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1737 usb_delay_ms(&sc->sc_bus, 1); 1738 if (n >= UHCI_RESET_TIMEOUT) 1739 printf("%s: controller did not reset\n", 1740 device_xname(sc->sc_dev)); 1741 } 1742 1743 usbd_status 1744 uhci_run(uhci_softc_t *sc, int run) 1745 { 1746 int n, running; 1747 u_int16_t cmd; 1748 1749 run = run != 0; 1750 mutex_spin_enter(&sc->sc_intr_lock); 1751 DPRINTF(("uhci_run: setting run=%d\n", run)); 1752 cmd = UREAD2(sc, UHCI_CMD); 1753 if (run) 1754 cmd |= UHCI_CMD_RS; 1755 else 1756 cmd &= ~UHCI_CMD_RS; 1757 UHCICMD(sc, cmd); 1758 for(n = 0; n < 10; n++) { 1759 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1760 /* return when we've entered the state we want */ 1761 if (run == running) { 1762 mutex_spin_exit(&sc->sc_intr_lock); 1763 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1764 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1765 return (USBD_NORMAL_COMPLETION); 1766 } 1767 usb_delay_ms(&sc->sc_bus, 1); 1768 } 1769 mutex_spin_exit(&sc->sc_intr_lock); 1770 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1771 run ? "start" : "stop"); 1772 return (USBD_IOERROR); 1773 } 1774 1775 /* 1776 * Memory management routines. 1777 * uhci_alloc_std allocates TDs 1778 * uhci_alloc_sqh allocates QHs 1779 * These two routines do their own free list management, 1780 * partly for speed, partly because allocating DMAable memory 1781 * has page size granularaity so much memory would be wasted if 1782 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1783 */ 1784 1785 uhci_soft_td_t * 1786 uhci_alloc_std(uhci_softc_t *sc) 1787 { 1788 uhci_soft_td_t *std; 1789 usbd_status err; 1790 int i, offs; 1791 usb_dma_t dma; 1792 1793 if (sc->sc_freetds == NULL) { 1794 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1795 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1796 UHCI_TD_ALIGN, &dma); 1797 if (err) 1798 return (0); 1799 for (i = 0; i < UHCI_STD_CHUNK; i++) { 1800 offs = i * UHCI_STD_SIZE; 1801 std = KERNADDR(&dma, offs); 1802 std->physaddr = DMAADDR(&dma, offs); 1803 std->dma = dma; 1804 std->offs = offs; 1805 std->link.std = sc->sc_freetds; 1806 sc->sc_freetds = std; 1807 } 1808 } 1809 std = sc->sc_freetds; 1810 sc->sc_freetds = std->link.std; 1811 memset(&std->td, 0, sizeof(uhci_td_t)); 1812 return std; 1813 } 1814 1815 void 1816 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1817 { 1818 #ifdef DIAGNOSTIC 1819 #define TD_IS_FREE 0x12345678 1820 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1821 printf("uhci_free_std: freeing free TD %p\n", std); 1822 return; 1823 } 1824 std->td.td_token = htole32(TD_IS_FREE); 1825 #endif 1826 std->link.std = sc->sc_freetds; 1827 sc->sc_freetds = std; 1828 } 1829 1830 uhci_soft_qh_t * 1831 uhci_alloc_sqh(uhci_softc_t *sc) 1832 { 1833 uhci_soft_qh_t *sqh; 1834 usbd_status err; 1835 int i, offs; 1836 usb_dma_t dma; 1837 1838 if (sc->sc_freeqhs == NULL) { 1839 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1840 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1841 UHCI_QH_ALIGN, &dma); 1842 if (err) 1843 return (0); 1844 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1845 offs = i * UHCI_SQH_SIZE; 1846 sqh = KERNADDR(&dma, offs); 1847 sqh->physaddr = DMAADDR(&dma, offs); 1848 sqh->dma = dma; 1849 sqh->offs = offs; 1850 sqh->hlink = sc->sc_freeqhs; 1851 sc->sc_freeqhs = sqh; 1852 } 1853 } 1854 sqh = sc->sc_freeqhs; 1855 sc->sc_freeqhs = sqh->hlink; 1856 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1857 return (sqh); 1858 } 1859 1860 void 1861 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1862 { 1863 sqh->hlink = sc->sc_freeqhs; 1864 sc->sc_freeqhs = sqh; 1865 } 1866 1867 void 1868 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1869 uhci_soft_td_t *stdend) 1870 { 1871 uhci_soft_td_t *p; 1872 1873 /* 1874 * to avoid race condition with the controller which may be looking 1875 * at this chain, we need to first invalidate all links, and 1876 * then wait for the controller to move to another queue 1877 */ 1878 for (p = std; p != stdend; p = p->link.std) { 1879 usb_syncmem(&p->dma, 1880 p->offs + offsetof(uhci_td_t, td_link), 1881 sizeof(p->td.td_link), 1882 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1883 if ((p->td.td_link & UHCI_PTR_T) == 0) { 1884 p->td.td_link = UHCI_PTR_T; 1885 usb_syncmem(&p->dma, 1886 p->offs + offsetof(uhci_td_t, td_link), 1887 sizeof(p->td.td_link), 1888 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1889 } 1890 } 1891 delay(UHCI_QH_REMOVE_DELAY); 1892 1893 for (; std != stdend; std = p) { 1894 p = std->link.std; 1895 uhci_free_std(sc, std); 1896 } 1897 } 1898 1899 usbd_status 1900 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1901 int rd, u_int16_t flags, usb_dma_t *dma, 1902 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1903 { 1904 uhci_soft_td_t *p, *lastp; 1905 uhci_physaddr_t lastlink; 1906 int i, ntd, l, tog, maxp; 1907 u_int32_t status; 1908 int addr = upipe->pipe.device->address; 1909 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1910 1911 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1912 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1913 upipe->pipe.device->speed, flags)); 1914 1915 KASSERT(mutex_owned(&sc->sc_lock)); 1916 1917 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1918 if (maxp == 0) { 1919 printf("uhci_alloc_std_chain: maxp=0\n"); 1920 return (USBD_INVAL); 1921 } 1922 ntd = (len + maxp - 1) / maxp; 1923 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1924 ntd++; 1925 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1926 if (ntd == 0) { 1927 *sp = *ep = 0; 1928 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1929 return (USBD_NORMAL_COMPLETION); 1930 } 1931 tog = upipe->nexttoggle; 1932 if (ntd % 2 == 0) 1933 tog ^= 1; 1934 upipe->nexttoggle = tog ^ 1; 1935 lastp = NULL; 1936 lastlink = UHCI_PTR_T; 1937 ntd--; 1938 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1939 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1940 status |= UHCI_TD_LS; 1941 if (flags & USBD_SHORT_XFER_OK) 1942 status |= UHCI_TD_SPD; 1943 usb_syncmem(dma, 0, len, 1944 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1945 for (i = ntd; i >= 0; i--) { 1946 p = uhci_alloc_std(sc); 1947 if (p == NULL) { 1948 KASSERT(lastp != NULL); 1949 uhci_free_std_chain(sc, lastp, NULL); 1950 return (USBD_NOMEM); 1951 } 1952 p->link.std = lastp; 1953 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1954 lastp = p; 1955 lastlink = p->physaddr; 1956 p->td.td_status = htole32(status); 1957 if (i == ntd) { 1958 /* last TD */ 1959 l = len % maxp; 1960 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1961 l = maxp; 1962 *ep = p; 1963 } else 1964 l = maxp; 1965 p->td.td_token = 1966 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1967 UHCI_TD_OUT(l, endpt, addr, tog)); 1968 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1969 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 1970 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1971 tog ^= 1; 1972 } 1973 *sp = lastp; 1974 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1975 upipe->nexttoggle)); 1976 return (USBD_NORMAL_COMPLETION); 1977 } 1978 1979 void 1980 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1981 { 1982 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1983 upipe->nexttoggle = 0; 1984 } 1985 1986 void 1987 uhci_noop(usbd_pipe_handle pipe) 1988 { 1989 } 1990 1991 usbd_status 1992 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1993 { 1994 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1995 usbd_status err; 1996 1997 /* Insert last in queue. */ 1998 mutex_enter(&sc->sc_lock); 1999 err = usb_insert_transfer(xfer); 2000 mutex_exit(&sc->sc_lock); 2001 if (err) 2002 return (err); 2003 2004 /* 2005 * Pipe isn't running (otherwise err would be USBD_INPROG), 2006 * so start it first. 2007 */ 2008 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2009 } 2010 2011 usbd_status 2012 uhci_device_bulk_start(usbd_xfer_handle xfer) 2013 { 2014 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2015 usbd_device_handle dev = upipe->pipe.device; 2016 uhci_softc_t *sc = dev->bus->hci_private; 2017 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2018 uhci_soft_td_t *data, *dataend; 2019 uhci_soft_qh_t *sqh; 2020 usbd_status err; 2021 int len, isread, endpt; 2022 2023 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2024 xfer, xfer->length, xfer->flags, ii)); 2025 2026 if (sc->sc_dying) 2027 return (USBD_IOERROR); 2028 2029 #ifdef DIAGNOSTIC 2030 if (xfer->rqflags & URQ_REQUEST) 2031 panic("uhci_device_bulk_transfer: a request"); 2032 #endif 2033 2034 mutex_enter(&sc->sc_lock); 2035 2036 len = xfer->length; 2037 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2038 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2039 sqh = upipe->u.bulk.sqh; 2040 2041 upipe->u.bulk.isread = isread; 2042 upipe->u.bulk.length = len; 2043 2044 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2045 &xfer->dmabuf, &data, &dataend); 2046 if (err) { 2047 mutex_exit(&sc->sc_lock); 2048 return (err); 2049 } 2050 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2051 usb_syncmem(&dataend->dma, 2052 dataend->offs + offsetof(uhci_td_t, td_status), 2053 sizeof(dataend->td.td_status), 2054 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2055 2056 2057 #ifdef UHCI_DEBUG 2058 if (uhcidebug > 8) { 2059 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2060 uhci_dump_tds(data); 2061 } 2062 #endif 2063 2064 /* Set up interrupt info. */ 2065 ii->xfer = xfer; 2066 ii->stdstart = data; 2067 ii->stdend = dataend; 2068 #ifdef DIAGNOSTIC 2069 if (!ii->isdone) { 2070 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2071 } 2072 ii->isdone = 0; 2073 #endif 2074 2075 sqh->elink = data; 2076 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2077 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2078 2079 uhci_add_bulk(sc, sqh); 2080 uhci_add_intr_info(sc, ii); 2081 2082 if (xfer->timeout && !sc->sc_bus.use_polling) { 2083 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2084 uhci_timeout, ii); 2085 } 2086 xfer->status = USBD_IN_PROGRESS; 2087 2088 #ifdef UHCI_DEBUG 2089 if (uhcidebug > 10) { 2090 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2091 uhci_dump_tds(data); 2092 } 2093 #endif 2094 2095 if (sc->sc_bus.use_polling) 2096 uhci_waitintr(sc, xfer); 2097 2098 mutex_exit(&sc->sc_lock); 2099 return (USBD_IN_PROGRESS); 2100 } 2101 2102 /* Abort a device bulk request. */ 2103 void 2104 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2105 { 2106 #ifdef DIAGNOSTIC 2107 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2108 #endif 2109 2110 KASSERT(mutex_owned(&sc->sc_lock)); 2111 2112 DPRINTF(("uhci_device_bulk_abort:\n")); 2113 uhci_abort_xfer(xfer, USBD_CANCELLED); 2114 } 2115 2116 /* 2117 * Abort a device request. 2118 * If this routine is called at splusb() it guarantees that the request 2119 * will be removed from the hardware scheduling and that the callback 2120 * for it will be called with USBD_CANCELLED status. 2121 * It's impossible to guarantee that the requested transfer will not 2122 * have happened since the hardware runs concurrently. 2123 * If the transaction has already happened we rely on the ordinary 2124 * interrupt processing to process it. 2125 * XXX This is most probably wrong. 2126 * XXXMRG this doesn't make sense anymore. 2127 */ 2128 void 2129 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2130 { 2131 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2132 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2133 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2134 uhci_soft_td_t *std; 2135 int wake; 2136 2137 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2138 2139 KASSERT(mutex_owned(&sc->sc_lock)); 2140 2141 if (sc->sc_dying) { 2142 /* If we're dying, just do the software part. */ 2143 xfer->status = status; /* make software ignore it */ 2144 callout_stop(&xfer->timeout_handle); 2145 usb_transfer_complete(xfer); 2146 return; 2147 } 2148 2149 if (cpu_intr_p() || cpu_softintr_p()) 2150 panic("uhci_abort_xfer: not in process context"); 2151 2152 /* 2153 * If an abort is already in progress then just wait for it to 2154 * complete and return. 2155 */ 2156 if (xfer->hcflags & UXFER_ABORTING) { 2157 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2158 #ifdef DIAGNOSTIC 2159 if (status == USBD_TIMEOUT) 2160 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2161 #endif 2162 /* Override the status which might be USBD_TIMEOUT. */ 2163 xfer->status = status; 2164 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2165 xfer->hcflags |= UXFER_ABORTWAIT; 2166 while (xfer->hcflags & UXFER_ABORTING) 2167 cv_wait(&xfer->hccv, &sc->sc_lock); 2168 goto done; 2169 } 2170 xfer->hcflags |= UXFER_ABORTING; 2171 2172 /* 2173 * Step 1: Make interrupt routine and hardware ignore xfer. 2174 */ 2175 xfer->status = status; /* make software ignore it */ 2176 callout_stop(&xfer->timeout_handle); 2177 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2178 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2179 usb_syncmem(&std->dma, 2180 std->offs + offsetof(uhci_td_t, td_status), 2181 sizeof(std->td.td_status), 2182 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2183 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2184 usb_syncmem(&std->dma, 2185 std->offs + offsetof(uhci_td_t, td_status), 2186 sizeof(std->td.td_status), 2187 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2188 } 2189 2190 /* 2191 * Step 2: Wait until we know hardware has finished any possible 2192 * use of the xfer. Also make sure the soft interrupt routine 2193 * has run. 2194 */ 2195 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2196 sc->sc_softwake = 1; 2197 usb_schedsoftintr(&sc->sc_bus); 2198 DPRINTFN(1,("uhci_abort_xfer: cv_wait\n")); 2199 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2200 2201 /* 2202 * Step 3: Execute callback. 2203 */ 2204 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2205 #ifdef DIAGNOSTIC 2206 ii->isdone = 1; 2207 #endif 2208 wake = xfer->hcflags & UXFER_ABORTWAIT; 2209 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2210 usb_transfer_complete(xfer); 2211 if (wake) 2212 cv_broadcast(&xfer->hccv); 2213 done: 2214 KASSERT(mutex_owned(&sc->sc_lock)); 2215 } 2216 2217 /* Close a device bulk pipe. */ 2218 void 2219 uhci_device_bulk_close(usbd_pipe_handle pipe) 2220 { 2221 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2222 usbd_device_handle dev = upipe->pipe.device; 2223 uhci_softc_t *sc = dev->bus->hci_private; 2224 2225 KASSERT(mutex_owned(&sc->sc_lock)); 2226 2227 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2228 2229 pipe->endpoint->datatoggle = upipe->nexttoggle; 2230 } 2231 2232 usbd_status 2233 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2234 { 2235 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2236 usbd_status err; 2237 2238 /* Insert last in queue. */ 2239 mutex_enter(&sc->sc_lock); 2240 err = usb_insert_transfer(xfer); 2241 mutex_exit(&sc->sc_lock); 2242 if (err) 2243 return (err); 2244 2245 /* 2246 * Pipe isn't running (otherwise err would be USBD_INPROG), 2247 * so start it first. 2248 */ 2249 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2250 } 2251 2252 usbd_status 2253 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2254 { 2255 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2256 usbd_status err; 2257 2258 if (sc->sc_dying) 2259 return (USBD_IOERROR); 2260 2261 #ifdef DIAGNOSTIC 2262 if (!(xfer->rqflags & URQ_REQUEST)) 2263 panic("uhci_device_ctrl_transfer: not a request"); 2264 #endif 2265 2266 mutex_enter(&sc->sc_lock); 2267 err = uhci_device_request(xfer); 2268 mutex_exit(&sc->sc_lock); 2269 if (err) 2270 return (err); 2271 2272 if (sc->sc_bus.use_polling) 2273 uhci_waitintr(sc, xfer); 2274 return (USBD_IN_PROGRESS); 2275 } 2276 2277 usbd_status 2278 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2279 { 2280 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2281 usbd_status err; 2282 2283 /* Insert last in queue. */ 2284 mutex_enter(&sc->sc_lock); 2285 err = usb_insert_transfer(xfer); 2286 mutex_exit(&sc->sc_lock); 2287 if (err) 2288 return (err); 2289 2290 /* 2291 * Pipe isn't running (otherwise err would be USBD_INPROG), 2292 * so start it first. 2293 */ 2294 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2295 } 2296 2297 usbd_status 2298 uhci_device_intr_start(usbd_xfer_handle xfer) 2299 { 2300 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2301 usbd_device_handle dev = upipe->pipe.device; 2302 uhci_softc_t *sc = dev->bus->hci_private; 2303 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2304 uhci_soft_td_t *data, *dataend; 2305 uhci_soft_qh_t *sqh; 2306 usbd_status err; 2307 int isread, endpt; 2308 int i; 2309 2310 if (sc->sc_dying) 2311 return (USBD_IOERROR); 2312 2313 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2314 xfer, xfer->length, xfer->flags)); 2315 2316 #ifdef DIAGNOSTIC 2317 if (xfer->rqflags & URQ_REQUEST) 2318 panic("uhci_device_intr_transfer: a request"); 2319 #endif 2320 2321 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2322 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2323 2324 upipe->u.intr.isread = isread; 2325 2326 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2327 xfer->flags, &xfer->dmabuf, &data, 2328 &dataend); 2329 if (err) 2330 return (err); 2331 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2332 usb_syncmem(&dataend->dma, 2333 dataend->offs + offsetof(uhci_td_t, td_status), 2334 sizeof(dataend->td.td_status), 2335 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2336 2337 #ifdef UHCI_DEBUG 2338 if (uhcidebug > 10) { 2339 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2340 uhci_dump_tds(data); 2341 uhci_dump_qh(upipe->u.intr.qhs[0]); 2342 } 2343 #endif 2344 2345 mutex_enter(&sc->sc_lock); 2346 /* Set up interrupt info. */ 2347 ii->xfer = xfer; 2348 ii->stdstart = data; 2349 ii->stdend = dataend; 2350 #ifdef DIAGNOSTIC 2351 if (!ii->isdone) { 2352 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2353 } 2354 ii->isdone = 0; 2355 #endif 2356 2357 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2358 upipe->u.intr.qhs[0])); 2359 for (i = 0; i < upipe->u.intr.npoll; i++) { 2360 sqh = upipe->u.intr.qhs[i]; 2361 sqh->elink = data; 2362 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2363 usb_syncmem(&sqh->dma, 2364 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2365 sizeof(sqh->qh.qh_elink), 2366 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2367 } 2368 uhci_add_intr_info(sc, ii); 2369 xfer->status = USBD_IN_PROGRESS; 2370 mutex_exit(&sc->sc_lock); 2371 2372 #ifdef UHCI_DEBUG 2373 if (uhcidebug > 10) { 2374 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2375 uhci_dump_tds(data); 2376 uhci_dump_qh(upipe->u.intr.qhs[0]); 2377 } 2378 #endif 2379 2380 return (USBD_IN_PROGRESS); 2381 } 2382 2383 /* Abort a device control request. */ 2384 void 2385 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2386 { 2387 #ifdef DIAGNOSTIC 2388 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2389 #endif 2390 2391 KASSERT(mutex_owned(&sc->sc_lock)); 2392 2393 DPRINTF(("uhci_device_ctrl_abort:\n")); 2394 uhci_abort_xfer(xfer, USBD_CANCELLED); 2395 } 2396 2397 /* Close a device control pipe. */ 2398 void 2399 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2400 { 2401 } 2402 2403 /* Abort a device interrupt request. */ 2404 void 2405 uhci_device_intr_abort(usbd_xfer_handle xfer) 2406 { 2407 #ifdef DIAGNOSTIC 2408 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2409 #endif 2410 2411 KASSERT(mutex_owned(&sc->sc_lock)); 2412 2413 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2414 if (xfer->pipe->intrxfer == xfer) { 2415 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2416 xfer->pipe->intrxfer = NULL; 2417 } 2418 uhci_abort_xfer(xfer, USBD_CANCELLED); 2419 } 2420 2421 /* Close a device interrupt pipe. */ 2422 void 2423 uhci_device_intr_close(usbd_pipe_handle pipe) 2424 { 2425 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2426 uhci_softc_t *sc = pipe->device->bus->hci_private; 2427 int i, npoll; 2428 2429 KASSERT(mutex_owned(&sc->sc_lock)); 2430 2431 /* Unlink descriptors from controller data structures. */ 2432 npoll = upipe->u.intr.npoll; 2433 for (i = 0; i < npoll; i++) 2434 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2435 2436 /* 2437 * We now have to wait for any activity on the physical 2438 * descriptors to stop. 2439 */ 2440 usb_delay_ms(&sc->sc_bus, 2); 2441 2442 for(i = 0; i < npoll; i++) 2443 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2444 kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *)); 2445 2446 /* XXX free other resources */ 2447 } 2448 2449 usbd_status 2450 uhci_device_request(usbd_xfer_handle xfer) 2451 { 2452 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2453 usb_device_request_t *req = &xfer->request; 2454 usbd_device_handle dev = upipe->pipe.device; 2455 uhci_softc_t *sc = dev->bus->hci_private; 2456 int addr = dev->address; 2457 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2458 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2459 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2460 uhci_soft_qh_t *sqh; 2461 int len; 2462 u_int32_t ls; 2463 usbd_status err; 2464 int isread; 2465 2466 KASSERT(mutex_owned(&sc->sc_lock)); 2467 2468 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2469 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2470 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2471 UGETW(req->wIndex), UGETW(req->wLength), 2472 addr, endpt)); 2473 2474 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2475 isread = req->bmRequestType & UT_READ; 2476 len = UGETW(req->wLength); 2477 2478 setup = upipe->u.ctl.setup; 2479 stat = upipe->u.ctl.stat; 2480 sqh = upipe->u.ctl.sqh; 2481 2482 /* Set up data transaction */ 2483 if (len != 0) { 2484 upipe->nexttoggle = 1; 2485 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2486 &xfer->dmabuf, &data, &dataend); 2487 if (err) 2488 return (err); 2489 next = data; 2490 dataend->link.std = stat; 2491 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2492 usb_syncmem(&dataend->dma, 2493 dataend->offs + offsetof(uhci_td_t, td_link), 2494 sizeof(dataend->td.td_link), 2495 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2496 } else { 2497 next = stat; 2498 } 2499 upipe->u.ctl.length = len; 2500 2501 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2502 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2503 2504 setup->link.std = next; 2505 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2506 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2507 UHCI_TD_ACTIVE); 2508 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2509 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2510 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2511 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2512 2513 stat->link.std = NULL; 2514 stat->td.td_link = htole32(UHCI_PTR_T); 2515 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2516 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2517 stat->td.td_token = 2518 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2519 UHCI_TD_IN (0, endpt, addr, 1)); 2520 stat->td.td_buffer = htole32(0); 2521 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2522 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2523 2524 #ifdef UHCI_DEBUG 2525 if (uhcidebug > 10) { 2526 DPRINTF(("uhci_device_request: before transfer\n")); 2527 uhci_dump_tds(setup); 2528 } 2529 #endif 2530 2531 /* Set up interrupt info. */ 2532 ii->xfer = xfer; 2533 ii->stdstart = setup; 2534 ii->stdend = stat; 2535 #ifdef DIAGNOSTIC 2536 if (!ii->isdone) { 2537 printf("uhci_device_request: not done, ii=%p\n", ii); 2538 } 2539 ii->isdone = 0; 2540 #endif 2541 2542 sqh->elink = setup; 2543 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2544 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2545 2546 if (dev->speed == USB_SPEED_LOW) 2547 uhci_add_ls_ctrl(sc, sqh); 2548 else 2549 uhci_add_hs_ctrl(sc, sqh); 2550 uhci_add_intr_info(sc, ii); 2551 #ifdef UHCI_DEBUG 2552 if (uhcidebug > 12) { 2553 uhci_soft_td_t *std; 2554 uhci_soft_qh_t *xqh; 2555 uhci_soft_qh_t *sxqh; 2556 int maxqh = 0; 2557 uhci_physaddr_t link; 2558 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2559 for (std = sc->sc_vframes[0].htd, link = 0; 2560 (link & UHCI_PTR_QH) == 0; 2561 std = std->link.std) { 2562 link = le32toh(std->td.td_link); 2563 uhci_dump_td(std); 2564 } 2565 sxqh = (uhci_soft_qh_t *)std; 2566 uhci_dump_qh(sxqh); 2567 for (xqh = sxqh; 2568 xqh != NULL; 2569 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2570 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2571 uhci_dump_qh(xqh); 2572 } 2573 DPRINTF(("Enqueued QH:\n")); 2574 uhci_dump_qh(sqh); 2575 uhci_dump_tds(sqh->elink); 2576 } 2577 #endif 2578 if (xfer->timeout && !sc->sc_bus.use_polling) { 2579 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2580 uhci_timeout, ii); 2581 } 2582 xfer->status = USBD_IN_PROGRESS; 2583 2584 return (USBD_NORMAL_COMPLETION); 2585 } 2586 2587 usbd_status 2588 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2589 { 2590 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2591 usbd_status err; 2592 2593 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2594 2595 /* Put it on our queue, */ 2596 mutex_enter(&sc->sc_lock); 2597 err = usb_insert_transfer(xfer); 2598 mutex_exit(&sc->sc_lock); 2599 2600 /* bail out on error, */ 2601 if (err && err != USBD_IN_PROGRESS) 2602 return (err); 2603 2604 /* XXX should check inuse here */ 2605 2606 /* insert into schedule, */ 2607 uhci_device_isoc_enter(xfer); 2608 2609 /* and start if the pipe wasn't running */ 2610 if (!err) 2611 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2612 2613 return (err); 2614 } 2615 2616 void 2617 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2618 { 2619 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2620 usbd_device_handle dev = upipe->pipe.device; 2621 uhci_softc_t *sc = dev->bus->hci_private; 2622 struct iso *iso = &upipe->u.iso; 2623 uhci_soft_td_t *std; 2624 u_int32_t buf, len, status, offs; 2625 int i, next, nframes; 2626 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2627 2628 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2629 "nframes=%d\n", 2630 iso->inuse, iso->next, xfer, xfer->nframes)); 2631 2632 if (sc->sc_dying) 2633 return; 2634 2635 if (xfer->status == USBD_IN_PROGRESS) { 2636 /* This request has already been entered into the frame list */ 2637 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2638 /* XXX */ 2639 } 2640 2641 #ifdef DIAGNOSTIC 2642 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2643 printf("uhci_device_isoc_enter: overflow!\n"); 2644 #endif 2645 2646 next = iso->next; 2647 if (next == -1) { 2648 /* Not in use yet, schedule it a few frames ahead. */ 2649 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2650 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2651 } 2652 2653 xfer->status = USBD_IN_PROGRESS; 2654 UXFER(xfer)->curframe = next; 2655 2656 buf = DMAADDR(&xfer->dmabuf, 0); 2657 offs = 0; 2658 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2659 UHCI_TD_ACTIVE | 2660 UHCI_TD_IOS); 2661 nframes = xfer->nframes; 2662 mutex_enter(&sc->sc_lock); 2663 for (i = 0; i < nframes; i++) { 2664 std = iso->stds[next]; 2665 if (++next >= UHCI_VFRAMELIST_COUNT) 2666 next = 0; 2667 len = xfer->frlengths[i]; 2668 std->td.td_buffer = htole32(buf); 2669 usb_syncmem(&xfer->dmabuf, offs, len, 2670 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2671 if (i == nframes - 1) 2672 status |= UHCI_TD_IOC; 2673 std->td.td_status = htole32(status); 2674 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2675 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2676 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2677 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2678 #ifdef UHCI_DEBUG 2679 if (uhcidebug > 5) { 2680 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2681 uhci_dump_td(std); 2682 } 2683 #endif 2684 buf += len; 2685 offs += len; 2686 } 2687 iso->next = next; 2688 iso->inuse += xfer->nframes; 2689 2690 mutex_exit(&sc->sc_lock); 2691 } 2692 2693 usbd_status 2694 uhci_device_isoc_start(usbd_xfer_handle xfer) 2695 { 2696 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2697 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2698 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2699 uhci_soft_td_t *end; 2700 int i; 2701 2702 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2703 2704 mutex_enter(&sc->sc_lock); 2705 2706 if (sc->sc_dying) { 2707 mutex_exit(&sc->sc_lock); 2708 return (USBD_IOERROR); 2709 } 2710 2711 #ifdef DIAGNOSTIC 2712 if (xfer->status != USBD_IN_PROGRESS) 2713 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2714 #endif 2715 2716 /* Find the last TD */ 2717 i = UXFER(xfer)->curframe + xfer->nframes; 2718 if (i >= UHCI_VFRAMELIST_COUNT) 2719 i -= UHCI_VFRAMELIST_COUNT; 2720 end = upipe->u.iso.stds[i]; 2721 2722 #ifdef DIAGNOSTIC 2723 if (end == NULL) { 2724 printf("uhci_device_isoc_start: end == NULL\n"); 2725 return (USBD_INVAL); 2726 } 2727 #endif 2728 2729 /* Set up interrupt info. */ 2730 ii->xfer = xfer; 2731 ii->stdstart = end; 2732 ii->stdend = end; 2733 #ifdef DIAGNOSTIC 2734 if (!ii->isdone) 2735 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2736 ii->isdone = 0; 2737 #endif 2738 uhci_add_intr_info(sc, ii); 2739 2740 mutex_exit(&sc->sc_lock); 2741 2742 return (USBD_IN_PROGRESS); 2743 } 2744 2745 void 2746 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2747 { 2748 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2749 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2750 uhci_soft_td_t **stds = upipe->u.iso.stds; 2751 uhci_soft_td_t *std; 2752 int i, n, nframes, maxlen, len; 2753 2754 KASSERT(mutex_owned(&sc->sc_lock)); 2755 2756 /* Transfer is already done. */ 2757 if (xfer->status != USBD_NOT_STARTED && 2758 xfer->status != USBD_IN_PROGRESS) { 2759 return; 2760 } 2761 2762 /* Give xfer the requested abort code. */ 2763 xfer->status = USBD_CANCELLED; 2764 2765 /* make hardware ignore it, */ 2766 nframes = xfer->nframes; 2767 n = UXFER(xfer)->curframe; 2768 maxlen = 0; 2769 for (i = 0; i < nframes; i++) { 2770 std = stds[n]; 2771 usb_syncmem(&std->dma, 2772 std->offs + offsetof(uhci_td_t, td_status), 2773 sizeof(std->td.td_status), 2774 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2775 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2776 usb_syncmem(&std->dma, 2777 std->offs + offsetof(uhci_td_t, td_status), 2778 sizeof(std->td.td_status), 2779 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2780 usb_syncmem(&std->dma, 2781 std->offs + offsetof(uhci_td_t, td_token), 2782 sizeof(std->td.td_token), 2783 BUS_DMASYNC_POSTWRITE); 2784 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2785 if (len > maxlen) 2786 maxlen = len; 2787 if (++n >= UHCI_VFRAMELIST_COUNT) 2788 n = 0; 2789 } 2790 2791 /* and wait until we are sure the hardware has finished. */ 2792 delay(maxlen); 2793 2794 #ifdef DIAGNOSTIC 2795 UXFER(xfer)->iinfo.isdone = 1; 2796 #endif 2797 /* Run callback and remove from interrupt list. */ 2798 usb_transfer_complete(xfer); 2799 2800 KASSERT(mutex_owned(&sc->sc_lock)); 2801 } 2802 2803 void 2804 uhci_device_isoc_close(usbd_pipe_handle pipe) 2805 { 2806 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2807 usbd_device_handle dev = upipe->pipe.device; 2808 uhci_softc_t *sc = dev->bus->hci_private; 2809 uhci_soft_td_t *std, *vstd; 2810 struct iso *iso; 2811 int i; 2812 2813 KASSERT(mutex_owned(&sc->sc_lock)); 2814 2815 /* 2816 * Make sure all TDs are marked as inactive. 2817 * Wait for completion. 2818 * Unschedule. 2819 * Deallocate. 2820 */ 2821 iso = &upipe->u.iso; 2822 2823 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2824 std = iso->stds[i]; 2825 usb_syncmem(&std->dma, 2826 std->offs + offsetof(uhci_td_t, td_status), 2827 sizeof(std->td.td_status), 2828 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2829 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2830 usb_syncmem(&std->dma, 2831 std->offs + offsetof(uhci_td_t, td_status), 2832 sizeof(std->td.td_status), 2833 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2834 } 2835 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2836 2837 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2838 std = iso->stds[i]; 2839 for (vstd = sc->sc_vframes[i].htd; 2840 vstd != NULL && vstd->link.std != std; 2841 vstd = vstd->link.std) 2842 ; 2843 if (vstd == NULL) { 2844 /*panic*/ 2845 printf("uhci_device_isoc_close: %p not found\n", std); 2846 mutex_exit(&sc->sc_lock); 2847 return; 2848 } 2849 vstd->link = std->link; 2850 usb_syncmem(&std->dma, 2851 std->offs + offsetof(uhci_td_t, td_link), 2852 sizeof(std->td.td_link), 2853 BUS_DMASYNC_POSTWRITE); 2854 vstd->td.td_link = std->td.td_link; 2855 usb_syncmem(&vstd->dma, 2856 vstd->offs + offsetof(uhci_td_t, td_link), 2857 sizeof(vstd->td.td_link), 2858 BUS_DMASYNC_PREWRITE); 2859 uhci_free_std(sc, std); 2860 } 2861 2862 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2863 } 2864 2865 usbd_status 2866 uhci_setup_isoc(usbd_pipe_handle pipe) 2867 { 2868 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2869 usbd_device_handle dev = upipe->pipe.device; 2870 uhci_softc_t *sc = dev->bus->hci_private; 2871 int addr = upipe->pipe.device->address; 2872 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2873 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2874 uhci_soft_td_t *std, *vstd; 2875 u_int32_t token; 2876 struct iso *iso; 2877 int i; 2878 2879 iso = &upipe->u.iso; 2880 iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT * 2881 sizeof (uhci_soft_td_t *), 2882 KM_SLEEP); 2883 if (iso->stds == NULL) 2884 return USBD_NOMEM; 2885 2886 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2887 UHCI_TD_OUT(0, endpt, addr, 0); 2888 2889 mutex_enter(&sc->sc_lock); 2890 2891 /* Allocate the TDs and mark as inactive; */ 2892 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2893 std = uhci_alloc_std(sc); 2894 if (std == 0) 2895 goto bad; 2896 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2897 std->td.td_token = htole32(token); 2898 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2899 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2900 iso->stds[i] = std; 2901 } 2902 2903 /* Insert TDs into schedule. */ 2904 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2905 std = iso->stds[i]; 2906 vstd = sc->sc_vframes[i].htd; 2907 usb_syncmem(&vstd->dma, 2908 vstd->offs + offsetof(uhci_td_t, td_link), 2909 sizeof(vstd->td.td_link), 2910 BUS_DMASYNC_POSTWRITE); 2911 std->link = vstd->link; 2912 std->td.td_link = vstd->td.td_link; 2913 usb_syncmem(&std->dma, 2914 std->offs + offsetof(uhci_td_t, td_link), 2915 sizeof(std->td.td_link), 2916 BUS_DMASYNC_PREWRITE); 2917 vstd->link.std = std; 2918 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2919 usb_syncmem(&vstd->dma, 2920 vstd->offs + offsetof(uhci_td_t, td_link), 2921 sizeof(vstd->td.td_link), 2922 BUS_DMASYNC_PREWRITE); 2923 } 2924 mutex_exit(&sc->sc_lock); 2925 2926 iso->next = -1; 2927 iso->inuse = 0; 2928 2929 return (USBD_NORMAL_COMPLETION); 2930 2931 bad: 2932 while (--i >= 0) 2933 uhci_free_std(sc, iso->stds[i]); 2934 mutex_exit(&sc->sc_lock); 2935 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2936 return (USBD_NOMEM); 2937 } 2938 2939 void 2940 uhci_device_isoc_done(usbd_xfer_handle xfer) 2941 { 2942 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2943 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2944 int i, offs; 2945 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2946 2947 2948 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2949 xfer->actlen, xfer->busy_free)); 2950 2951 if (ii->xfer != xfer) 2952 /* Not on interrupt list, ignore it. */ 2953 return; 2954 2955 if (!uhci_active_intr_info(ii)) 2956 return; 2957 2958 #ifdef DIAGNOSTIC 2959 if (ii->stdend == NULL) { 2960 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2961 #ifdef UHCI_DEBUG 2962 uhci_dump_ii(ii); 2963 #endif 2964 return; 2965 } 2966 #endif 2967 2968 /* Turn off the interrupt since it is active even if the TD is not. */ 2969 usb_syncmem(&ii->stdend->dma, 2970 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2971 sizeof(ii->stdend->td.td_status), 2972 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2973 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2974 usb_syncmem(&ii->stdend->dma, 2975 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2976 sizeof(ii->stdend->td.td_status), 2977 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2978 2979 uhci_del_intr_info(ii); /* remove from active list */ 2980 2981 offs = 0; 2982 for (i = 0; i < xfer->nframes; i++) { 2983 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i], 2984 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2985 offs += xfer->frlengths[i]; 2986 } 2987 } 2988 2989 void 2990 uhci_device_intr_done(usbd_xfer_handle xfer) 2991 { 2992 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2993 uhci_softc_t *sc = ii->sc; 2994 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2995 uhci_soft_qh_t *sqh; 2996 int i, npoll, isread; 2997 2998 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2999 3000 KASSERT(mutex_owned(&sc->sc_lock)); 3001 3002 npoll = upipe->u.intr.npoll; 3003 for(i = 0; i < npoll; i++) { 3004 sqh = upipe->u.intr.qhs[i]; 3005 sqh->elink = NULL; 3006 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3007 usb_syncmem(&sqh->dma, 3008 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3009 sizeof(sqh->qh.qh_elink), 3010 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3011 } 3012 uhci_free_std_chain(sc, ii->stdstart, NULL); 3013 3014 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 3015 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 3016 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3017 3018 /* XXX Wasteful. */ 3019 if (xfer->pipe->repeat) { 3020 uhci_soft_td_t *data, *dataend; 3021 3022 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 3023 3024 /* This alloc cannot fail since we freed the chain above. */ 3025 uhci_alloc_std_chain(upipe, sc, xfer->length, 3026 upipe->u.intr.isread, xfer->flags, 3027 &xfer->dmabuf, &data, &dataend); 3028 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3029 usb_syncmem(&dataend->dma, 3030 dataend->offs + offsetof(uhci_td_t, td_status), 3031 sizeof(dataend->td.td_status), 3032 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3033 3034 #ifdef UHCI_DEBUG 3035 if (uhcidebug > 10) { 3036 DPRINTF(("uhci_device_intr_done: data(1)\n")); 3037 uhci_dump_tds(data); 3038 uhci_dump_qh(upipe->u.intr.qhs[0]); 3039 } 3040 #endif 3041 3042 ii->stdstart = data; 3043 ii->stdend = dataend; 3044 #ifdef DIAGNOSTIC 3045 if (!ii->isdone) { 3046 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3047 } 3048 ii->isdone = 0; 3049 #endif 3050 for (i = 0; i < npoll; i++) { 3051 sqh = upipe->u.intr.qhs[i]; 3052 sqh->elink = data; 3053 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3054 usb_syncmem(&sqh->dma, 3055 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3056 sizeof(sqh->qh.qh_elink), 3057 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3058 } 3059 xfer->status = USBD_IN_PROGRESS; 3060 /* The ii is already on the examined list, just leave it. */ 3061 } else { 3062 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3063 if (uhci_active_intr_info(ii)) 3064 uhci_del_intr_info(ii); 3065 } 3066 } 3067 3068 /* Deallocate request data structures */ 3069 void 3070 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3071 { 3072 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3073 uhci_softc_t *sc = ii->sc; 3074 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3075 int len = UGETW(xfer->request.wLength); 3076 int isread = (xfer->request.bmRequestType & UT_READ); 3077 3078 KASSERT(mutex_owned(&sc->sc_lock)); 3079 3080 #ifdef DIAGNOSTIC 3081 if (!(xfer->rqflags & URQ_REQUEST)) 3082 panic("uhci_device_ctrl_done: not a request"); 3083 #endif 3084 3085 if (!uhci_active_intr_info(ii)) 3086 return; 3087 3088 uhci_del_intr_info(ii); /* remove from active list */ 3089 3090 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3091 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3092 else 3093 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3094 3095 if (upipe->u.ctl.length != 0) 3096 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3097 3098 if (len) { 3099 usb_syncmem(&xfer->dmabuf, 0, len, 3100 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3101 } 3102 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3103 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3104 3105 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3106 } 3107 3108 /* Deallocate request data structures */ 3109 void 3110 uhci_device_bulk_done(usbd_xfer_handle xfer) 3111 { 3112 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3113 uhci_softc_t *sc = ii->sc; 3114 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3115 3116 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3117 xfer, ii, sc, upipe)); 3118 3119 KASSERT(mutex_owned(&sc->sc_lock)); 3120 3121 if (!uhci_active_intr_info(ii)) 3122 return; 3123 3124 uhci_del_intr_info(ii); /* remove from active list */ 3125 3126 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3127 3128 uhci_free_std_chain(sc, ii->stdstart, NULL); 3129 3130 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3131 } 3132 3133 /* Add interrupt QH, called with vflock. */ 3134 void 3135 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3136 { 3137 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3138 uhci_soft_qh_t *eqh; 3139 3140 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3141 3142 eqh = vf->eqh; 3143 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3144 sizeof(eqh->qh.qh_hlink), 3145 BUS_DMASYNC_POSTWRITE); 3146 sqh->hlink = eqh->hlink; 3147 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3148 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3149 sizeof(sqh->qh.qh_hlink), 3150 BUS_DMASYNC_PREWRITE); 3151 eqh->hlink = sqh; 3152 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3153 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3154 sizeof(eqh->qh.qh_hlink), 3155 BUS_DMASYNC_PREWRITE); 3156 vf->eqh = sqh; 3157 vf->bandwidth++; 3158 } 3159 3160 /* Remove interrupt QH. */ 3161 void 3162 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3163 { 3164 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3165 uhci_soft_qh_t *pqh; 3166 3167 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3168 3169 /* See comment in uhci_remove_ctrl() */ 3170 3171 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3172 sizeof(sqh->qh.qh_elink), 3173 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3174 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3175 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3176 usb_syncmem(&sqh->dma, 3177 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3178 sizeof(sqh->qh.qh_elink), 3179 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3180 delay(UHCI_QH_REMOVE_DELAY); 3181 } 3182 3183 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3184 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3185 sizeof(sqh->qh.qh_hlink), 3186 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3187 pqh->hlink = sqh->hlink; 3188 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3189 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3190 sizeof(pqh->qh.qh_hlink), 3191 BUS_DMASYNC_PREWRITE); 3192 delay(UHCI_QH_REMOVE_DELAY); 3193 if (vf->eqh == sqh) 3194 vf->eqh = pqh; 3195 vf->bandwidth--; 3196 } 3197 3198 usbd_status 3199 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3200 { 3201 uhci_soft_qh_t *sqh; 3202 int i, npoll; 3203 u_int bestbw, bw, bestoffs, offs; 3204 3205 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3206 if (ival == 0) { 3207 printf("uhci_device_setintr: 0 interval\n"); 3208 return (USBD_INVAL); 3209 } 3210 3211 if (ival > UHCI_VFRAMELIST_COUNT) 3212 ival = UHCI_VFRAMELIST_COUNT; 3213 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3214 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3215 3216 upipe->u.intr.npoll = npoll; 3217 upipe->u.intr.qhs = 3218 kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP); 3219 if (upipe->u.intr.qhs == NULL) 3220 return USBD_NOMEM; 3221 3222 /* 3223 * Figure out which offset in the schedule that has most 3224 * bandwidth left over. 3225 */ 3226 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3227 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3228 for (bw = i = 0; i < npoll; i++) 3229 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3230 if (bw < bestbw) { 3231 bestbw = bw; 3232 bestoffs = offs; 3233 } 3234 } 3235 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3236 3237 mutex_enter(&sc->sc_lock); 3238 for(i = 0; i < npoll; i++) { 3239 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3240 sqh->elink = NULL; 3241 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3242 usb_syncmem(&sqh->dma, 3243 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3244 sizeof(sqh->qh.qh_elink), 3245 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3246 sqh->pos = MOD(i * ival + bestoffs); 3247 } 3248 #undef MOD 3249 3250 /* Enter QHs into the controller data structures. */ 3251 for(i = 0; i < npoll; i++) 3252 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3253 mutex_exit(&sc->sc_lock); 3254 3255 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3256 return (USBD_NORMAL_COMPLETION); 3257 } 3258 3259 /* Open a new pipe. */ 3260 usbd_status 3261 uhci_open(usbd_pipe_handle pipe) 3262 { 3263 uhci_softc_t *sc = pipe->device->bus->hci_private; 3264 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3265 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3266 usbd_status err = USBD_NOMEM; 3267 int ival; 3268 3269 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3270 pipe, pipe->device->address, 3271 ed->bEndpointAddress, sc->sc_addr)); 3272 3273 if (sc->sc_dying) 3274 return USBD_IOERROR; 3275 3276 upipe->aborting = 0; 3277 /* toggle state needed for bulk endpoints */ 3278 upipe->nexttoggle = pipe->endpoint->datatoggle; 3279 3280 if (pipe->device->address == sc->sc_addr) { 3281 switch (ed->bEndpointAddress) { 3282 case USB_CONTROL_ENDPOINT: 3283 pipe->methods = &uhci_root_ctrl_methods; 3284 break; 3285 case UE_DIR_IN | UHCI_INTR_ENDPT: 3286 pipe->methods = &uhci_root_intr_methods; 3287 break; 3288 default: 3289 return (USBD_INVAL); 3290 } 3291 } else { 3292 switch (ed->bmAttributes & UE_XFERTYPE) { 3293 case UE_CONTROL: 3294 pipe->methods = &uhci_device_ctrl_methods; 3295 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3296 if (upipe->u.ctl.sqh == NULL) 3297 goto bad; 3298 upipe->u.ctl.setup = uhci_alloc_std(sc); 3299 if (upipe->u.ctl.setup == NULL) { 3300 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3301 goto bad; 3302 } 3303 upipe->u.ctl.stat = uhci_alloc_std(sc); 3304 if (upipe->u.ctl.stat == NULL) { 3305 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3306 uhci_free_std(sc, upipe->u.ctl.setup); 3307 goto bad; 3308 } 3309 err = usb_allocmem(&sc->sc_bus, 3310 sizeof(usb_device_request_t), 3311 0, &upipe->u.ctl.reqdma); 3312 if (err) { 3313 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3314 uhci_free_std(sc, upipe->u.ctl.setup); 3315 uhci_free_std(sc, upipe->u.ctl.stat); 3316 goto bad; 3317 } 3318 break; 3319 case UE_INTERRUPT: 3320 pipe->methods = &uhci_device_intr_methods; 3321 ival = pipe->interval; 3322 if (ival == USBD_DEFAULT_INTERVAL) 3323 ival = ed->bInterval; 3324 return (uhci_device_setintr(sc, upipe, ival)); 3325 case UE_ISOCHRONOUS: 3326 pipe->methods = &uhci_device_isoc_methods; 3327 return (uhci_setup_isoc(pipe)); 3328 case UE_BULK: 3329 pipe->methods = &uhci_device_bulk_methods; 3330 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3331 if (upipe->u.bulk.sqh == NULL) 3332 goto bad; 3333 break; 3334 } 3335 } 3336 return (USBD_NORMAL_COMPLETION); 3337 3338 bad: 3339 return USBD_NOMEM; 3340 } 3341 3342 /* 3343 * Data structures and routines to emulate the root hub. 3344 */ 3345 usb_device_descriptor_t uhci_devd = { 3346 USB_DEVICE_DESCRIPTOR_SIZE, 3347 UDESC_DEVICE, /* type */ 3348 {0x00, 0x01}, /* USB version */ 3349 UDCLASS_HUB, /* class */ 3350 UDSUBCLASS_HUB, /* subclass */ 3351 UDPROTO_FSHUB, /* protocol */ 3352 64, /* max packet */ 3353 {0},{0},{0x00,0x01}, /* device id */ 3354 1,2,0, /* string indicies */ 3355 1 /* # of configurations */ 3356 }; 3357 3358 const usb_config_descriptor_t uhci_confd = { 3359 USB_CONFIG_DESCRIPTOR_SIZE, 3360 UDESC_CONFIG, 3361 {USB_CONFIG_DESCRIPTOR_SIZE + 3362 USB_INTERFACE_DESCRIPTOR_SIZE + 3363 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3364 1, 3365 1, 3366 0, 3367 UC_ATTR_MBO | UC_SELF_POWERED, 3368 0 /* max power */ 3369 }; 3370 3371 const usb_interface_descriptor_t uhci_ifcd = { 3372 USB_INTERFACE_DESCRIPTOR_SIZE, 3373 UDESC_INTERFACE, 3374 0, 3375 0, 3376 1, 3377 UICLASS_HUB, 3378 UISUBCLASS_HUB, 3379 UIPROTO_FSHUB, 3380 0 3381 }; 3382 3383 const usb_endpoint_descriptor_t uhci_endpd = { 3384 USB_ENDPOINT_DESCRIPTOR_SIZE, 3385 UDESC_ENDPOINT, 3386 UE_DIR_IN | UHCI_INTR_ENDPT, 3387 UE_INTERRUPT, 3388 {8}, 3389 255 3390 }; 3391 3392 const usb_hub_descriptor_t uhci_hubd_piix = { 3393 USB_HUB_DESCRIPTOR_SIZE, 3394 UDESC_HUB, 3395 2, 3396 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3397 50, /* power on to power good */ 3398 0, 3399 { 0x00 }, /* both ports are removable */ 3400 { 0 }, 3401 }; 3402 3403 /* 3404 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3405 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3406 * should not be used by the USB subsystem. As we cannot issue a 3407 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3408 * will be enabled as part of the reset. 3409 * 3410 * On the VT83C572, the port cannot be successfully enabled until the 3411 * outstanding "port enable change" and "connection status change" 3412 * events have been reset. 3413 */ 3414 Static usbd_status 3415 uhci_portreset(uhci_softc_t *sc, int index) 3416 { 3417 int lim, port, x; 3418 3419 if (index == 1) 3420 port = UHCI_PORTSC1; 3421 else if (index == 2) 3422 port = UHCI_PORTSC2; 3423 else 3424 return (USBD_IOERROR); 3425 3426 x = URWMASK(UREAD2(sc, port)); 3427 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3428 3429 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3430 3431 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3432 index, UREAD2(sc, port))); 3433 3434 x = URWMASK(UREAD2(sc, port)); 3435 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3436 3437 delay(100); 3438 3439 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3440 index, UREAD2(sc, port))); 3441 3442 x = URWMASK(UREAD2(sc, port)); 3443 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3444 3445 for (lim = 10; --lim > 0;) { 3446 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3447 3448 x = UREAD2(sc, port); 3449 3450 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3451 index, lim, x)); 3452 3453 if (!(x & UHCI_PORTSC_CCS)) { 3454 /* 3455 * No device is connected (or was disconnected 3456 * during reset). Consider the port reset. 3457 * The delay must be long enough to ensure on 3458 * the initial iteration that the device 3459 * connection will have been registered. 50ms 3460 * appears to be sufficient, but 20ms is not. 3461 */ 3462 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3463 index, lim)); 3464 break; 3465 } 3466 3467 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3468 /* 3469 * Port enabled changed and/or connection 3470 * status changed were set. Reset either or 3471 * both raised flags (by writing a 1 to that 3472 * bit), and wait again for state to settle. 3473 */ 3474 UWRITE2(sc, port, URWMASK(x) | 3475 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3476 continue; 3477 } 3478 3479 if (x & UHCI_PORTSC_PE) 3480 /* Port is enabled */ 3481 break; 3482 3483 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3484 } 3485 3486 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3487 index, UREAD2(sc, port))); 3488 3489 if (lim <= 0) { 3490 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3491 return (USBD_TIMEOUT); 3492 } 3493 3494 sc->sc_isreset = 1; 3495 return (USBD_NORMAL_COMPLETION); 3496 } 3497 3498 /* 3499 * Simulate a hardware hub by handling all the necessary requests. 3500 */ 3501 usbd_status 3502 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3503 { 3504 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3505 usbd_status err; 3506 3507 /* Insert last in queue. */ 3508 mutex_enter(&sc->sc_lock); 3509 err = usb_insert_transfer(xfer); 3510 mutex_exit(&sc->sc_lock); 3511 if (err) 3512 return (err); 3513 3514 /* 3515 * Pipe isn't running (otherwise err would be USBD_INPROG), 3516 * so start it first. 3517 */ 3518 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3519 } 3520 3521 usbd_status 3522 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3523 { 3524 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3525 usb_device_request_t *req; 3526 void *buf = NULL; 3527 int port, x; 3528 int len, value, index, status, change, l, totlen = 0; 3529 usb_port_status_t ps; 3530 usbd_status err; 3531 3532 if (sc->sc_dying) 3533 return (USBD_IOERROR); 3534 3535 #ifdef DIAGNOSTIC 3536 if (!(xfer->rqflags & URQ_REQUEST)) 3537 panic("uhci_root_ctrl_start: not a request"); 3538 #endif 3539 req = &xfer->request; 3540 3541 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3542 req->bmRequestType, req->bRequest)); 3543 3544 len = UGETW(req->wLength); 3545 value = UGETW(req->wValue); 3546 index = UGETW(req->wIndex); 3547 3548 if (len != 0) 3549 buf = KERNADDR(&xfer->dmabuf, 0); 3550 3551 #define C(x,y) ((x) | ((y) << 8)) 3552 switch(C(req->bRequest, req->bmRequestType)) { 3553 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3554 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3555 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3556 /* 3557 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3558 * for the integrated root hub. 3559 */ 3560 break; 3561 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3562 if (len > 0) { 3563 *(u_int8_t *)buf = sc->sc_conf; 3564 totlen = 1; 3565 } 3566 break; 3567 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3568 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3569 if (len == 0) 3570 break; 3571 switch(value >> 8) { 3572 case UDESC_DEVICE: 3573 if ((value & 0xff) != 0) { 3574 err = USBD_IOERROR; 3575 goto ret; 3576 } 3577 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3578 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3579 memcpy(buf, &uhci_devd, l); 3580 break; 3581 case UDESC_CONFIG: 3582 if ((value & 0xff) != 0) { 3583 err = USBD_IOERROR; 3584 goto ret; 3585 } 3586 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3587 memcpy(buf, &uhci_confd, l); 3588 buf = (char *)buf + l; 3589 len -= l; 3590 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3591 totlen += l; 3592 memcpy(buf, &uhci_ifcd, l); 3593 buf = (char *)buf + l; 3594 len -= l; 3595 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3596 totlen += l; 3597 memcpy(buf, &uhci_endpd, l); 3598 break; 3599 case UDESC_STRING: 3600 #define sd ((usb_string_descriptor_t *)buf) 3601 switch (value & 0xff) { 3602 case 0: /* Language table */ 3603 totlen = usb_makelangtbl(sd, len); 3604 break; 3605 case 1: /* Vendor */ 3606 totlen = usb_makestrdesc(sd, len, 3607 sc->sc_vendor); 3608 break; 3609 case 2: /* Product */ 3610 totlen = usb_makestrdesc(sd, len, 3611 "UHCI root hub"); 3612 break; 3613 } 3614 #undef sd 3615 break; 3616 default: 3617 err = USBD_IOERROR; 3618 goto ret; 3619 } 3620 break; 3621 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3622 if (len > 0) { 3623 *(u_int8_t *)buf = 0; 3624 totlen = 1; 3625 } 3626 break; 3627 case C(UR_GET_STATUS, UT_READ_DEVICE): 3628 if (len > 1) { 3629 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3630 totlen = 2; 3631 } 3632 break; 3633 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3634 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3635 if (len > 1) { 3636 USETW(((usb_status_t *)buf)->wStatus, 0); 3637 totlen = 2; 3638 } 3639 break; 3640 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3641 if (value >= USB_MAX_DEVICES) { 3642 err = USBD_IOERROR; 3643 goto ret; 3644 } 3645 sc->sc_addr = value; 3646 break; 3647 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3648 if (value != 0 && value != 1) { 3649 err = USBD_IOERROR; 3650 goto ret; 3651 } 3652 sc->sc_conf = value; 3653 break; 3654 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3655 break; 3656 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3657 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3658 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3659 err = USBD_IOERROR; 3660 goto ret; 3661 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3662 break; 3663 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3664 break; 3665 /* Hub requests */ 3666 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3667 break; 3668 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3669 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3670 "port=%d feature=%d\n", 3671 index, value)); 3672 if (index == 1) 3673 port = UHCI_PORTSC1; 3674 else if (index == 2) 3675 port = UHCI_PORTSC2; 3676 else { 3677 err = USBD_IOERROR; 3678 goto ret; 3679 } 3680 switch(value) { 3681 case UHF_PORT_ENABLE: 3682 x = URWMASK(UREAD2(sc, port)); 3683 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3684 break; 3685 case UHF_PORT_SUSPEND: 3686 x = URWMASK(UREAD2(sc, port)); 3687 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3688 break; 3689 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3690 /* see USB2 spec ch. 7.1.7.7 */ 3691 usb_delay_ms(&sc->sc_bus, 20); 3692 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3693 /* 10ms resume delay must be provided by caller */ 3694 break; 3695 case UHF_PORT_RESET: 3696 x = URWMASK(UREAD2(sc, port)); 3697 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3698 break; 3699 case UHF_C_PORT_CONNECTION: 3700 x = URWMASK(UREAD2(sc, port)); 3701 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3702 break; 3703 case UHF_C_PORT_ENABLE: 3704 x = URWMASK(UREAD2(sc, port)); 3705 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3706 break; 3707 case UHF_C_PORT_OVER_CURRENT: 3708 x = URWMASK(UREAD2(sc, port)); 3709 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3710 break; 3711 case UHF_C_PORT_RESET: 3712 sc->sc_isreset = 0; 3713 err = USBD_NORMAL_COMPLETION; 3714 goto ret; 3715 case UHF_PORT_CONNECTION: 3716 case UHF_PORT_OVER_CURRENT: 3717 case UHF_PORT_POWER: 3718 case UHF_PORT_LOW_SPEED: 3719 case UHF_C_PORT_SUSPEND: 3720 default: 3721 err = USBD_IOERROR; 3722 goto ret; 3723 } 3724 break; 3725 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3726 if (index == 1) 3727 port = UHCI_PORTSC1; 3728 else if (index == 2) 3729 port = UHCI_PORTSC2; 3730 else { 3731 err = USBD_IOERROR; 3732 goto ret; 3733 } 3734 if (len > 0) { 3735 *(u_int8_t *)buf = 3736 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3737 UHCI_PORTSC_LS_SHIFT; 3738 totlen = 1; 3739 } 3740 break; 3741 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3742 if (len == 0) 3743 break; 3744 if ((value & 0xff) != 0) { 3745 err = USBD_IOERROR; 3746 goto ret; 3747 } 3748 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3749 totlen = l; 3750 memcpy(buf, &uhci_hubd_piix, l); 3751 break; 3752 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3753 if (len != 4) { 3754 err = USBD_IOERROR; 3755 goto ret; 3756 } 3757 memset(buf, 0, len); 3758 totlen = len; 3759 break; 3760 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3761 if (index == 1) 3762 port = UHCI_PORTSC1; 3763 else if (index == 2) 3764 port = UHCI_PORTSC2; 3765 else { 3766 err = USBD_IOERROR; 3767 goto ret; 3768 } 3769 if (len != 4) { 3770 err = USBD_IOERROR; 3771 goto ret; 3772 } 3773 x = UREAD2(sc, port); 3774 status = change = 0; 3775 if (x & UHCI_PORTSC_CCS) 3776 status |= UPS_CURRENT_CONNECT_STATUS; 3777 if (x & UHCI_PORTSC_CSC) 3778 change |= UPS_C_CONNECT_STATUS; 3779 if (x & UHCI_PORTSC_PE) 3780 status |= UPS_PORT_ENABLED; 3781 if (x & UHCI_PORTSC_POEDC) 3782 change |= UPS_C_PORT_ENABLED; 3783 if (x & UHCI_PORTSC_OCI) 3784 status |= UPS_OVERCURRENT_INDICATOR; 3785 if (x & UHCI_PORTSC_OCIC) 3786 change |= UPS_C_OVERCURRENT_INDICATOR; 3787 if (x & UHCI_PORTSC_SUSP) 3788 status |= UPS_SUSPEND; 3789 if (x & UHCI_PORTSC_LSDA) 3790 status |= UPS_LOW_SPEED; 3791 status |= UPS_PORT_POWER; 3792 if (sc->sc_isreset) 3793 change |= UPS_C_PORT_RESET; 3794 USETW(ps.wPortStatus, status); 3795 USETW(ps.wPortChange, change); 3796 l = min(len, sizeof ps); 3797 memcpy(buf, &ps, l); 3798 totlen = l; 3799 break; 3800 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3801 err = USBD_IOERROR; 3802 goto ret; 3803 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3804 break; 3805 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3806 if (index == 1) 3807 port = UHCI_PORTSC1; 3808 else if (index == 2) 3809 port = UHCI_PORTSC2; 3810 else { 3811 err = USBD_IOERROR; 3812 goto ret; 3813 } 3814 switch(value) { 3815 case UHF_PORT_ENABLE: 3816 x = URWMASK(UREAD2(sc, port)); 3817 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3818 break; 3819 case UHF_PORT_SUSPEND: 3820 x = URWMASK(UREAD2(sc, port)); 3821 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3822 break; 3823 case UHF_PORT_RESET: 3824 err = uhci_portreset(sc, index); 3825 goto ret; 3826 case UHF_PORT_POWER: 3827 /* Pretend we turned on power */ 3828 err = USBD_NORMAL_COMPLETION; 3829 goto ret; 3830 case UHF_C_PORT_CONNECTION: 3831 case UHF_C_PORT_ENABLE: 3832 case UHF_C_PORT_OVER_CURRENT: 3833 case UHF_PORT_CONNECTION: 3834 case UHF_PORT_OVER_CURRENT: 3835 case UHF_PORT_LOW_SPEED: 3836 case UHF_C_PORT_SUSPEND: 3837 case UHF_C_PORT_RESET: 3838 default: 3839 err = USBD_IOERROR; 3840 goto ret; 3841 } 3842 break; 3843 default: 3844 err = USBD_IOERROR; 3845 goto ret; 3846 } 3847 xfer->actlen = totlen; 3848 err = USBD_NORMAL_COMPLETION; 3849 ret: 3850 xfer->status = err; 3851 mutex_enter(&sc->sc_lock); 3852 usb_transfer_complete(xfer); 3853 mutex_exit(&sc->sc_lock); 3854 return (USBD_IN_PROGRESS); 3855 } 3856 3857 /* Abort a root control request. */ 3858 void 3859 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3860 { 3861 /* Nothing to do, all transfers are synchronous. */ 3862 } 3863 3864 /* Close the root pipe. */ 3865 void 3866 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3867 { 3868 DPRINTF(("uhci_root_ctrl_close\n")); 3869 } 3870 3871 /* Abort a root interrupt request. */ 3872 void 3873 uhci_root_intr_abort(usbd_xfer_handle xfer) 3874 { 3875 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3876 3877 KASSERT(mutex_owned(&sc->sc_lock)); 3878 3879 callout_stop(&sc->sc_poll_handle); 3880 sc->sc_intr_xfer = NULL; 3881 3882 if (xfer->pipe->intrxfer == xfer) { 3883 DPRINTF(("uhci_root_intr_abort: remove\n")); 3884 xfer->pipe->intrxfer = 0; 3885 } 3886 xfer->status = USBD_CANCELLED; 3887 #ifdef DIAGNOSTIC 3888 UXFER(xfer)->iinfo.isdone = 1; 3889 #endif 3890 usb_transfer_complete(xfer); 3891 } 3892 3893 usbd_status 3894 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3895 { 3896 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3897 usbd_status err; 3898 3899 /* Insert last in queue. */ 3900 mutex_enter(&sc->sc_lock); 3901 err = usb_insert_transfer(xfer); 3902 mutex_exit(&sc->sc_lock); 3903 if (err) 3904 return (err); 3905 3906 /* 3907 * Pipe isn't running (otherwise err would be USBD_INPROG), 3908 * start first 3909 */ 3910 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3911 } 3912 3913 /* Start a transfer on the root interrupt pipe */ 3914 usbd_status 3915 uhci_root_intr_start(usbd_xfer_handle xfer) 3916 { 3917 usbd_pipe_handle pipe = xfer->pipe; 3918 uhci_softc_t *sc = pipe->device->bus->hci_private; 3919 unsigned int ival; 3920 3921 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3922 xfer, xfer->length, xfer->flags)); 3923 3924 if (sc->sc_dying) 3925 return (USBD_IOERROR); 3926 3927 /* XXX temporary variable needed to avoid gcc3 warning */ 3928 ival = xfer->pipe->endpoint->edesc->bInterval; 3929 sc->sc_ival = mstohz(ival); 3930 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3931 sc->sc_intr_xfer = xfer; 3932 return (USBD_IN_PROGRESS); 3933 } 3934 3935 /* Close the root interrupt pipe. */ 3936 void 3937 uhci_root_intr_close(usbd_pipe_handle pipe) 3938 { 3939 uhci_softc_t *sc = pipe->device->bus->hci_private; 3940 3941 KASSERT(mutex_owned(&sc->sc_lock)); 3942 3943 callout_stop(&sc->sc_poll_handle); 3944 sc->sc_intr_xfer = NULL; 3945 DPRINTF(("uhci_root_intr_close\n")); 3946 } 3947
Indexes created Tue Sep 30 17:09:57 GMT 2025