uhci.c revision 1.240.6.18
1 /* $NetBSD: uhci.c,v 1.240.6.18 2012/03/11 01:52:28 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 39 * USB spec: http://www.usb.org/developers/docs/ 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.240.6.18 2012/03/11 01:52:28 mrg Exp $"); 46 47 #include "opt_usb.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/kernel.h> 52 #include <sys/kmem.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #include <sys/extent.h> 56 #include <sys/proc.h> 57 #include <sys/queue.h> 58 #include <sys/bus.h> 59 #include <sys/cpu.h> 60 61 #include <machine/endian.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdivar.h> 66 #include <dev/usb/usb_mem.h> 67 #include <dev/usb/usb_quirks.h> 68 69 #include <dev/usb/uhcireg.h> 70 #include <dev/usb/uhcivar.h> 71 #include <dev/usb/usbroothub_subr.h> 72 73 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 74 /*#define UHCI_CTL_LOOP */ 75 76 77 78 #ifdef UHCI_DEBUG 79 uhci_softc_t *thesc; 80 #define DPRINTF(x) if (uhcidebug) printf x 81 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 82 int uhcidebug = 0; 83 int uhcinoloop = 0; 84 #else 85 #define DPRINTF(x) 86 #define DPRINTFN(n,x) 87 #endif 88 89 /* 90 * The UHCI controller is little endian, so on big endian machines 91 * the data stored in memory needs to be swapped. 92 */ 93 94 struct uhci_pipe { 95 struct usbd_pipe pipe; 96 int nexttoggle; 97 98 u_char aborting; 99 usbd_xfer_handle abortstart, abortend; 100 101 /* Info needed for different pipe kinds. */ 102 union { 103 /* Control pipe */ 104 struct { 105 uhci_soft_qh_t *sqh; 106 usb_dma_t reqdma; 107 uhci_soft_td_t *setup, *stat; 108 u_int length; 109 } ctl; 110 /* Interrupt pipe */ 111 struct { 112 int npoll; 113 int isread; 114 uhci_soft_qh_t **qhs; 115 } intr; 116 /* Bulk pipe */ 117 struct { 118 uhci_soft_qh_t *sqh; 119 u_int length; 120 int isread; 121 } bulk; 122 /* Iso pipe */ 123 struct iso { 124 uhci_soft_td_t **stds; 125 int next, inuse; 126 } iso; 127 } u; 128 }; 129 130 Static void uhci_globalreset(uhci_softc_t *); 131 Static usbd_status uhci_portreset(uhci_softc_t*, int); 132 Static void uhci_reset(uhci_softc_t *); 133 Static usbd_status uhci_run(uhci_softc_t *, int run); 134 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 135 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 136 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 137 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 138 #if 0 139 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 140 uhci_intr_info_t *); 141 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 142 #endif 143 144 Static void uhci_free_std_chain(uhci_softc_t *, 145 uhci_soft_td_t *, uhci_soft_td_t *); 146 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 147 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 148 uhci_soft_td_t **, uhci_soft_td_t **); 149 Static void uhci_poll_hub(void *); 150 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 151 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 152 Static void uhci_idone(uhci_intr_info_t *); 153 154 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 155 156 Static void uhci_timeout(void *); 157 Static void uhci_timeout_task(void *); 158 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 159 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 160 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 161 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 162 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 163 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 164 Static void uhci_add_loop(uhci_softc_t *sc); 165 Static void uhci_rem_loop(uhci_softc_t *sc); 166 167 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 168 Static void uhci_device_isoc_enter(usbd_xfer_handle); 169 170 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 171 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 172 173 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 174 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 175 Static void uhci_get_lock(struct usbd_bus *, kmutex_t **); 176 177 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 178 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 179 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 180 Static void uhci_device_ctrl_close(usbd_pipe_handle); 181 Static void uhci_device_ctrl_done(usbd_xfer_handle); 182 183 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 184 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 185 Static void uhci_device_intr_abort(usbd_xfer_handle); 186 Static void uhci_device_intr_close(usbd_pipe_handle); 187 Static void uhci_device_intr_done(usbd_xfer_handle); 188 189 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 190 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 191 Static void uhci_device_bulk_abort(usbd_xfer_handle); 192 Static void uhci_device_bulk_close(usbd_pipe_handle); 193 Static void uhci_device_bulk_done(usbd_xfer_handle); 194 195 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 196 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 197 Static void uhci_device_isoc_abort(usbd_xfer_handle); 198 Static void uhci_device_isoc_close(usbd_pipe_handle); 199 Static void uhci_device_isoc_done(usbd_xfer_handle); 200 201 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 202 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 203 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 204 Static void uhci_root_ctrl_close(usbd_pipe_handle); 205 Static void uhci_root_ctrl_done(usbd_xfer_handle); 206 207 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 208 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 209 Static void uhci_root_intr_abort(usbd_xfer_handle); 210 Static void uhci_root_intr_close(usbd_pipe_handle); 211 Static void uhci_root_intr_done(usbd_xfer_handle); 212 213 Static usbd_status uhci_open(usbd_pipe_handle); 214 Static void uhci_poll(struct usbd_bus *); 215 Static void uhci_softintr(void *); 216 217 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 218 219 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 220 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 221 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 222 struct uhci_pipe *pipe, int ival); 223 224 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 225 Static void uhci_noop(usbd_pipe_handle pipe); 226 227 static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 228 uhci_soft_qh_t *); 229 230 #ifdef UHCI_DEBUG 231 Static void uhci_dump_all(uhci_softc_t *); 232 Static void uhci_dumpregs(uhci_softc_t *); 233 Static void uhci_dump_qhs(uhci_soft_qh_t *); 234 Static void uhci_dump_qh(uhci_soft_qh_t *); 235 Static void uhci_dump_tds(uhci_soft_td_t *); 236 Static void uhci_dump_td(uhci_soft_td_t *); 237 Static void uhci_dump_ii(uhci_intr_info_t *ii); 238 void uhci_dump(void); 239 #endif 240 241 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 242 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 243 #define UWRITE1(sc, r, x) \ 244 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 245 } while (/*CONSTCOND*/0) 246 #define UWRITE2(sc, r, x) \ 247 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 248 } while (/*CONSTCOND*/0) 249 #define UWRITE4(sc, r, x) \ 250 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 251 } while (/*CONSTCOND*/0) 252 static __inline uint8_t 253 UREAD1(uhci_softc_t *sc, bus_size_t r) 254 { 255 256 UBARR(sc); 257 return bus_space_read_1(sc->iot, sc->ioh, r); 258 } 259 260 static __inline uint16_t 261 UREAD2(uhci_softc_t *sc, bus_size_t r) 262 { 263 264 UBARR(sc); 265 return bus_space_read_2(sc->iot, sc->ioh, r); 266 } 267 268 static __inline uint32_t 269 UREAD4(uhci_softc_t *sc, bus_size_t r) 270 { 271 272 UBARR(sc); 273 return bus_space_read_4(sc->iot, sc->ioh, r); 274 } 275 276 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 277 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 278 279 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 280 281 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 282 283 #define UHCI_INTR_ENDPT 1 284 285 const struct usbd_bus_methods uhci_bus_methods = { 286 .open_pipe = uhci_open, 287 .soft_intr = uhci_softintr, 288 .do_poll = uhci_poll, 289 .allocm = uhci_allocm, 290 .freem = uhci_freem, 291 .allocx = uhci_allocx, 292 .freex = uhci_freex, 293 .get_lock = uhci_get_lock, 294 }; 295 296 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 297 .transfer = uhci_root_ctrl_transfer, 298 .start = uhci_root_ctrl_start, 299 .abort = uhci_root_ctrl_abort, 300 .close = uhci_root_ctrl_close, 301 .cleartoggle = uhci_noop, 302 .done = uhci_root_ctrl_done, 303 }; 304 305 const struct usbd_pipe_methods uhci_root_intr_methods = { 306 .transfer = uhci_root_intr_transfer, 307 .start = uhci_root_intr_start, 308 .abort = uhci_root_intr_abort, 309 .close = uhci_root_intr_close, 310 .cleartoggle = uhci_noop, 311 .done = uhci_root_intr_done, 312 }; 313 314 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 315 .transfer = uhci_device_ctrl_transfer, 316 .start = uhci_device_ctrl_start, 317 .abort = uhci_device_ctrl_abort, 318 .close = uhci_device_ctrl_close, 319 .cleartoggle = uhci_noop, 320 .done = uhci_device_ctrl_done, 321 }; 322 323 const struct usbd_pipe_methods uhci_device_intr_methods = { 324 .transfer = uhci_device_intr_transfer, 325 .start = uhci_device_intr_start, 326 .abort = uhci_device_intr_abort, 327 .close = uhci_device_intr_close, 328 .cleartoggle = uhci_device_clear_toggle, 329 .done = uhci_device_intr_done, 330 }; 331 332 const struct usbd_pipe_methods uhci_device_bulk_methods = { 333 .transfer = uhci_device_bulk_transfer, 334 .start = uhci_device_bulk_start, 335 .abort = uhci_device_bulk_abort, 336 .close = uhci_device_bulk_close, 337 .cleartoggle = uhci_device_clear_toggle, 338 .done = uhci_device_bulk_done, 339 }; 340 341 const struct usbd_pipe_methods uhci_device_isoc_methods = { 342 .transfer = uhci_device_isoc_transfer, 343 .start = uhci_device_isoc_start, 344 .abort = uhci_device_isoc_abort, 345 .close = uhci_device_isoc_close, 346 .cleartoggle = uhci_noop, 347 .done = uhci_device_isoc_done, 348 }; 349 350 #define uhci_add_intr_info(sc, ii) \ 351 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 352 #define uhci_del_intr_info(ii) \ 353 do { \ 354 LIST_REMOVE((ii), list); \ 355 (ii)->list.le_prev = NULL; \ 356 } while (0) 357 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 358 359 static inline uhci_soft_qh_t * 360 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 361 { 362 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 363 364 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 365 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 366 usb_syncmem(&pqh->dma, 367 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 368 sizeof(pqh->qh.qh_hlink), 369 BUS_DMASYNC_POSTWRITE); 370 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 371 printf("uhci_find_prev_qh: QH not found\n"); 372 return (NULL); 373 } 374 #endif 375 } 376 return (pqh); 377 } 378 379 void 380 uhci_globalreset(uhci_softc_t *sc) 381 { 382 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 383 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 384 UHCICMD(sc, 0); /* do nothing */ 385 } 386 387 usbd_status 388 uhci_init(uhci_softc_t *sc) 389 { 390 usbd_status err; 391 int i, j; 392 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 393 uhci_soft_td_t *std; 394 395 DPRINTFN(1,("uhci_init: start\n")); 396 397 #ifdef UHCI_DEBUG 398 thesc = sc; 399 400 if (uhcidebug > 2) 401 uhci_dumpregs(sc); 402 #endif 403 404 sc->sc_suspend = PWR_RESUME; 405 406 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 407 uhci_globalreset(sc); /* reset the controller */ 408 uhci_reset(sc); 409 410 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 411 USB_MEM_RESERVE); 412 413 /* Allocate and initialize real frame array. */ 414 err = usb_allocmem(&sc->sc_bus, 415 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 416 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 417 if (err) 418 return (err); 419 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 420 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 421 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 422 423 /* 424 * Allocate a TD, inactive, that hangs from the last QH. 425 * This is to avoid a bug in the PIIX that makes it run berserk 426 * otherwise. 427 */ 428 std = uhci_alloc_std(sc); 429 if (std == NULL) 430 return (USBD_NOMEM); 431 std->link.std = NULL; 432 std->td.td_link = htole32(UHCI_PTR_T); 433 std->td.td_status = htole32(0); /* inactive */ 434 std->td.td_token = htole32(0); 435 std->td.td_buffer = htole32(0); 436 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 437 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 438 439 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 440 lsqh = uhci_alloc_sqh(sc); 441 if (lsqh == NULL) 442 return (USBD_NOMEM); 443 lsqh->hlink = NULL; 444 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 445 lsqh->elink = std; 446 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 447 sc->sc_last_qh = lsqh; 448 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 449 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 450 451 /* Allocate the dummy QH where bulk traffic will be queued. */ 452 bsqh = uhci_alloc_sqh(sc); 453 if (bsqh == NULL) 454 return (USBD_NOMEM); 455 bsqh->hlink = lsqh; 456 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 457 bsqh->elink = NULL; 458 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 459 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 460 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 461 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 462 463 /* Allocate dummy QH where high speed control traffic will be queued. */ 464 chsqh = uhci_alloc_sqh(sc); 465 if (chsqh == NULL) 466 return (USBD_NOMEM); 467 chsqh->hlink = bsqh; 468 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 469 chsqh->elink = NULL; 470 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 471 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 472 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 473 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 474 475 /* Allocate dummy QH where control traffic will be queued. */ 476 clsqh = uhci_alloc_sqh(sc); 477 if (clsqh == NULL) 478 return (USBD_NOMEM); 479 clsqh->hlink = chsqh; 480 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 481 clsqh->elink = NULL; 482 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 483 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 484 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 485 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 486 487 /* 488 * Make all (virtual) frame list pointers point to the interrupt 489 * queue heads and the interrupt queue heads at the control 490 * queue head and point the physical frame list to the virtual. 491 */ 492 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 493 std = uhci_alloc_std(sc); 494 sqh = uhci_alloc_sqh(sc); 495 if (std == NULL || sqh == NULL) 496 return (USBD_NOMEM); 497 std->link.sqh = sqh; 498 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 499 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 500 std->td.td_token = htole32(0); 501 std->td.td_buffer = htole32(0); 502 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 503 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 504 sqh->hlink = clsqh; 505 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 506 sqh->elink = NULL; 507 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 508 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 509 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 510 sc->sc_vframes[i].htd = std; 511 sc->sc_vframes[i].etd = std; 512 sc->sc_vframes[i].hqh = sqh; 513 sc->sc_vframes[i].eqh = sqh; 514 for (j = i; 515 j < UHCI_FRAMELIST_COUNT; 516 j += UHCI_VFRAMELIST_COUNT) 517 sc->sc_pframes[j] = htole32(std->physaddr); 518 } 519 usb_syncmem(&sc->sc_dma, 0, 520 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 521 BUS_DMASYNC_PREWRITE); 522 523 524 LIST_INIT(&sc->sc_intrhead); 525 526 SIMPLEQ_INIT(&sc->sc_free_xfers); 527 528 callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE); 529 530 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 531 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 532 cv_init(&sc->sc_softwake_cv, "uhciab"); 533 534 /* Set up the bus struct. */ 535 sc->sc_bus.methods = &uhci_bus_methods; 536 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 537 538 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 539 540 DPRINTFN(1,("uhci_init: enabling\n")); 541 542 err = uhci_run(sc, 1); /* and here we go... */ 543 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 544 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 545 return err; 546 } 547 548 int 549 uhci_activate(device_t self, enum devact act) 550 { 551 struct uhci_softc *sc = device_private(self); 552 553 switch (act) { 554 case DVACT_DEACTIVATE: 555 sc->sc_dying = 1; 556 return 0; 557 default: 558 return EOPNOTSUPP; 559 } 560 } 561 562 void 563 uhci_childdet(device_t self, device_t child) 564 { 565 struct uhci_softc *sc = device_private(self); 566 567 KASSERT(sc->sc_child == child); 568 sc->sc_child = NULL; 569 } 570 571 int 572 uhci_detach(struct uhci_softc *sc, int flags) 573 { 574 usbd_xfer_handle xfer; 575 int rv = 0; 576 577 if (sc->sc_child != NULL) 578 rv = config_detach(sc->sc_child, flags); 579 580 if (rv != 0) 581 return (rv); 582 583 /* Free all xfers associated with this HC. */ 584 for (;;) { 585 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 586 if (xfer == NULL) 587 break; 588 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 589 kmem_free(xfer, sizeof(struct uhci_xfer)); 590 } 591 592 callout_halt(&sc->sc_poll_handle, NULL); 593 callout_destroy(&sc->sc_poll_handle); 594 595 cv_destroy(&sc->sc_softwake_cv); 596 597 mutex_destroy(&sc->sc_lock); 598 mutex_destroy(&sc->sc_intr_lock); 599 600 /* XXX free other data structures XXX */ 601 602 return (rv); 603 } 604 605 usbd_status 606 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 607 { 608 struct uhci_softc *sc = bus->hci_private; 609 usbd_status status; 610 u_int32_t n; 611 612 /* 613 * XXX 614 * Since we are allocating a buffer we can assume that we will 615 * need TDs for it. Since we don't want to allocate those from 616 * an interrupt context, we allocate them here and free them again. 617 * This is no guarantee that we'll get the TDs next time... 618 */ 619 n = size / 8; 620 if (n > 16) { 621 u_int32_t i; 622 uhci_soft_td_t **stds; 623 624 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 625 stds = kmem_alloc(sizeof(uhci_soft_td_t *) * n, KM_SLEEP); 626 if (!stds) 627 return USBD_NOMEM; 628 for(i = 0; i < n; i++) 629 stds[i] = uhci_alloc_std(sc); 630 for(i = 0; i < n; i++) 631 if (stds[i] != NULL) 632 uhci_free_std(sc, stds[i]); 633 kmem_free(stds, sizeof(uhci_soft_td_t *) * n); 634 } 635 636 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 637 if (status == USBD_NOMEM) 638 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 639 return status; 640 } 641 642 void 643 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 644 { 645 if (dma->block->flags & USB_DMA_RESERVE) { 646 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 647 dma); 648 return; 649 } 650 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 651 } 652 653 usbd_xfer_handle 654 uhci_allocx(struct usbd_bus *bus) 655 { 656 struct uhci_softc *sc = bus->hci_private; 657 usbd_xfer_handle xfer; 658 659 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 660 if (xfer != NULL) { 661 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 662 #ifdef DIAGNOSTIC 663 if (xfer->busy_free != XFER_FREE) { 664 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 665 xfer->busy_free); 666 } 667 #endif 668 } else { 669 xfer = kmem_alloc(sizeof(struct uhci_xfer), KM_SLEEP); 670 } 671 if (xfer != NULL) { 672 memset(xfer, 0, sizeof (struct uhci_xfer)); 673 UXFER(xfer)->iinfo.sc = sc; 674 #ifdef DIAGNOSTIC 675 UXFER(xfer)->iinfo.isdone = 1; 676 xfer->busy_free = XFER_BUSY; 677 #endif 678 } 679 return (xfer); 680 } 681 682 void 683 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 684 { 685 struct uhci_softc *sc = bus->hci_private; 686 687 #ifdef DIAGNOSTIC 688 if (xfer->busy_free != XFER_BUSY) { 689 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 690 xfer->busy_free); 691 } 692 xfer->busy_free = XFER_FREE; 693 if (!UXFER(xfer)->iinfo.isdone) { 694 printf("uhci_freex: !isdone\n"); 695 } 696 #endif 697 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 698 } 699 700 Static void 701 uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 702 { 703 struct uhci_softc *sc = bus->hci_private; 704 705 *lock = &sc->sc_lock; 706 } 707 708 709 /* 710 * Handle suspend/resume. 711 * 712 * We need to switch to polling mode here, because this routine is 713 * called from an interrupt context. This is all right since we 714 * are almost suspended anyway. 715 */ 716 bool 717 uhci_resume(device_t dv, const pmf_qual_t *qual) 718 { 719 uhci_softc_t *sc = device_private(dv); 720 int cmd; 721 722 mutex_spin_enter(&sc->sc_intr_lock); 723 724 cmd = UREAD2(sc, UHCI_CMD); 725 sc->sc_bus.use_polling++; 726 UWRITE2(sc, UHCI_INTR, 0); 727 uhci_globalreset(sc); 728 uhci_reset(sc); 729 if (cmd & UHCI_CMD_RS) 730 uhci_run(sc, 0); 731 732 /* restore saved state */ 733 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 734 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 735 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 736 737 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 738 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock); 739 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 740 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 741 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 742 UHCICMD(sc, UHCI_CMD_MAXP); 743 uhci_run(sc, 1); /* and start traffic again */ 744 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock); 745 sc->sc_bus.use_polling--; 746 if (sc->sc_intr_xfer != NULL) 747 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 748 sc->sc_intr_xfer); 749 #ifdef UHCI_DEBUG 750 if (uhcidebug > 2) 751 uhci_dumpregs(sc); 752 #endif 753 754 sc->sc_suspend = PWR_RESUME; 755 mutex_spin_exit(&sc->sc_intr_lock); 756 757 return true; 758 } 759 760 bool 761 uhci_suspend(device_t dv, const pmf_qual_t *qual) 762 { 763 uhci_softc_t *sc = device_private(dv); 764 int cmd; 765 766 mutex_spin_enter(&sc->sc_intr_lock); 767 768 cmd = UREAD2(sc, UHCI_CMD); 769 770 #ifdef UHCI_DEBUG 771 if (uhcidebug > 2) 772 uhci_dumpregs(sc); 773 #endif 774 if (sc->sc_intr_xfer != NULL) 775 callout_stop(&sc->sc_poll_handle); 776 sc->sc_suspend = PWR_SUSPEND; 777 sc->sc_bus.use_polling++; 778 779 uhci_run(sc, 0); /* stop the controller */ 780 cmd &= ~UHCI_CMD_RS; 781 782 /* save some state if BIOS doesn't */ 783 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 784 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 785 786 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 787 788 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 789 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock); 790 sc->sc_bus.use_polling--; 791 792 mutex_spin_exit(&sc->sc_intr_lock); 793 794 return true; 795 } 796 797 #ifdef UHCI_DEBUG 798 Static void 799 uhci_dumpregs(uhci_softc_t *sc) 800 { 801 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 802 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 803 device_xname(sc->sc_dev), 804 UREAD2(sc, UHCI_CMD), 805 UREAD2(sc, UHCI_STS), 806 UREAD2(sc, UHCI_INTR), 807 UREAD2(sc, UHCI_FRNUM), 808 UREAD4(sc, UHCI_FLBASEADDR), 809 UREAD1(sc, UHCI_SOF), 810 UREAD2(sc, UHCI_PORTSC1), 811 UREAD2(sc, UHCI_PORTSC2))); 812 } 813 814 void 815 uhci_dump_td(uhci_soft_td_t *p) 816 { 817 char sbuf[128], sbuf2[128]; 818 819 820 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 821 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 822 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 823 "token=0x%08lx buffer=0x%08lx\n", 824 p, (long)p->physaddr, 825 (long)le32toh(p->td.td_link), 826 (long)le32toh(p->td.td_status), 827 (long)le32toh(p->td.td_token), 828 (long)le32toh(p->td.td_buffer))); 829 830 snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF", 831 (u_int32_t)le32toh(p->td.td_link)); 832 snprintb(sbuf2, sizeof(sbuf2), 833 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 834 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 835 (u_int32_t)le32toh(p->td.td_status)); 836 837 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 838 "D=%d,maxlen=%d\n", sbuf, sbuf2, 839 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 840 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 841 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 842 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 843 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 844 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 845 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 846 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 847 BUS_DMASYNC_PREREAD); 848 } 849 850 void 851 uhci_dump_qh(uhci_soft_qh_t *sqh) 852 { 853 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 854 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 855 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 856 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 857 le32toh(sqh->qh.qh_elink))); 858 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 859 } 860 861 862 #if 1 863 void 864 uhci_dump(void) 865 { 866 uhci_dump_all(thesc); 867 } 868 #endif 869 870 void 871 uhci_dump_all(uhci_softc_t *sc) 872 { 873 uhci_dumpregs(sc); 874 printf("intrs=%d\n", sc->sc_bus.no_intrs); 875 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 876 uhci_dump_qh(sc->sc_lctl_start); 877 } 878 879 880 void 881 uhci_dump_qhs(uhci_soft_qh_t *sqh) 882 { 883 uhci_dump_qh(sqh); 884 885 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 886 * Traverses sideways first, then down. 887 * 888 * QH1 889 * QH2 890 * No QH 891 * TD2.1 892 * TD2.2 893 * TD1.1 894 * etc. 895 * 896 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 897 */ 898 899 900 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 901 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 902 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 903 uhci_dump_qhs(sqh->hlink); 904 else 905 DPRINTF(("No QH\n")); 906 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 907 908 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 909 uhci_dump_tds(sqh->elink); 910 else 911 DPRINTF(("No TD\n")); 912 } 913 914 void 915 uhci_dump_tds(uhci_soft_td_t *std) 916 { 917 uhci_soft_td_t *td; 918 int stop; 919 920 for(td = std; td != NULL; td = td->link.std) { 921 uhci_dump_td(td); 922 923 /* Check whether the link pointer in this TD marks 924 * the link pointer as end of queue. This avoids 925 * printing the free list in case the queue/TD has 926 * already been moved there (seatbelt). 927 */ 928 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 929 sizeof(td->td.td_link), 930 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 931 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 932 le32toh(td->td.td_link) == 0); 933 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 934 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 935 if (stop) 936 break; 937 } 938 } 939 940 Static void 941 uhci_dump_ii(uhci_intr_info_t *ii) 942 { 943 usbd_pipe_handle pipe; 944 usb_endpoint_descriptor_t *ed; 945 usbd_device_handle dev; 946 947 #ifdef DIAGNOSTIC 948 #define DONE ii->isdone 949 #else 950 #define DONE 0 951 #endif 952 if (ii == NULL) { 953 printf("ii NULL\n"); 954 return; 955 } 956 if (ii->xfer == NULL) { 957 printf("ii %p: done=%d xfer=NULL\n", 958 ii, DONE); 959 return; 960 } 961 pipe = ii->xfer->pipe; 962 if (pipe == NULL) { 963 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 964 ii, DONE, ii->xfer); 965 return; 966 } 967 if (pipe->endpoint == NULL) { 968 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 969 ii, DONE, ii->xfer, pipe); 970 return; 971 } 972 if (pipe->device == NULL) { 973 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 974 ii, DONE, ii->xfer, pipe); 975 return; 976 } 977 ed = pipe->endpoint->edesc; 978 dev = pipe->device; 979 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 980 ii, DONE, ii->xfer, dev, 981 UGETW(dev->ddesc.idVendor), 982 UGETW(dev->ddesc.idProduct), 983 dev->address, pipe, 984 ed->bEndpointAddress, ed->bmAttributes); 985 #undef DONE 986 } 987 988 void uhci_dump_iis(struct uhci_softc *sc); 989 void 990 uhci_dump_iis(struct uhci_softc *sc) 991 { 992 uhci_intr_info_t *ii; 993 994 printf("intr_info list:\n"); 995 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 996 uhci_dump_ii(ii); 997 } 998 999 void iidump(void); 1000 void iidump(void) { uhci_dump_iis(thesc); } 1001 1002 #endif 1003 1004 /* 1005 * This routine is executed periodically and simulates interrupts 1006 * from the root controller interrupt pipe for port status change. 1007 */ 1008 void 1009 uhci_poll_hub(void *addr) 1010 { 1011 usbd_xfer_handle xfer = addr; 1012 usbd_pipe_handle pipe = xfer->pipe; 1013 uhci_softc_t *sc; 1014 u_char *p; 1015 1016 DPRINTFN(20, ("uhci_poll_hub\n")); 1017 1018 if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL)) 1019 return; /* device has detached */ 1020 sc = pipe->device->bus->hci_private; 1021 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1022 1023 p = KERNADDR(&xfer->dmabuf, 0); 1024 p[0] = 0; 1025 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1026 p[0] |= 1<<1; 1027 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1028 p[0] |= 1<<2; 1029 if (p[0] == 0) 1030 /* No change, try again in a while */ 1031 return; 1032 1033 xfer->actlen = 1; 1034 xfer->status = USBD_NORMAL_COMPLETION; 1035 mutex_enter(&sc->sc_lock); 1036 usb_transfer_complete(xfer); 1037 mutex_exit(&sc->sc_lock); 1038 } 1039 1040 void 1041 uhci_root_intr_done(usbd_xfer_handle xfer) 1042 { 1043 } 1044 1045 void 1046 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1047 { 1048 } 1049 1050 /* 1051 * Let the last QH loop back to the high speed control transfer QH. 1052 * This is what intel calls "bandwidth reclamation" and improves 1053 * USB performance a lot for some devices. 1054 * If we are already looping, just count it. 1055 */ 1056 void 1057 uhci_add_loop(uhci_softc_t *sc) { 1058 #ifdef UHCI_DEBUG 1059 if (uhcinoloop) 1060 return; 1061 #endif 1062 if (++sc->sc_loops == 1) { 1063 DPRINTFN(5,("uhci_start_loop: add\n")); 1064 /* Note, we don't loop back the soft pointer. */ 1065 sc->sc_last_qh->qh.qh_hlink = 1066 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1067 usb_syncmem(&sc->sc_last_qh->dma, 1068 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1069 sizeof(sc->sc_last_qh->qh.qh_hlink), 1070 BUS_DMASYNC_PREWRITE); 1071 } 1072 } 1073 1074 void 1075 uhci_rem_loop(uhci_softc_t *sc) { 1076 #ifdef UHCI_DEBUG 1077 if (uhcinoloop) 1078 return; 1079 #endif 1080 if (--sc->sc_loops == 0) { 1081 DPRINTFN(5,("uhci_end_loop: remove\n")); 1082 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1083 usb_syncmem(&sc->sc_last_qh->dma, 1084 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1085 sizeof(sc->sc_last_qh->qh.qh_hlink), 1086 BUS_DMASYNC_PREWRITE); 1087 } 1088 } 1089 1090 /* Add high speed control QH, called with lock held. */ 1091 void 1092 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1093 { 1094 uhci_soft_qh_t *eqh; 1095 1096 KASSERT(mutex_owned(&sc->sc_lock)); 1097 1098 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1099 eqh = sc->sc_hctl_end; 1100 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1101 sizeof(eqh->qh.qh_hlink), 1102 BUS_DMASYNC_POSTWRITE); 1103 sqh->hlink = eqh->hlink; 1104 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1105 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1106 BUS_DMASYNC_PREWRITE); 1107 eqh->hlink = sqh; 1108 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1109 sc->sc_hctl_end = sqh; 1110 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1111 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1112 #ifdef UHCI_CTL_LOOP 1113 uhci_add_loop(sc); 1114 #endif 1115 } 1116 1117 /* Remove high speed control QH, called with lock held. */ 1118 void 1119 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1120 { 1121 uhci_soft_qh_t *pqh; 1122 1123 KASSERT(mutex_owned(&sc->sc_lock)); 1124 1125 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1126 #ifdef UHCI_CTL_LOOP 1127 uhci_rem_loop(sc); 1128 #endif 1129 /* 1130 * The T bit should be set in the elink of the QH so that the HC 1131 * doesn't follow the pointer. This condition may fail if the 1132 * the transferred packet was short so that the QH still points 1133 * at the last used TD. 1134 * In this case we set the T bit and wait a little for the HC 1135 * to stop looking at the TD. 1136 * Note that if the TD chain is large enough, the controller 1137 * may still be looking at the chain at the end of this function. 1138 * uhci_free_std_chain() will make sure the controller stops 1139 * looking at it quickly, but until then we should not change 1140 * sqh->hlink. 1141 */ 1142 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1143 sizeof(sqh->qh.qh_elink), 1144 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1145 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1146 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1147 usb_syncmem(&sqh->dma, 1148 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1149 sizeof(sqh->qh.qh_elink), 1150 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1151 delay(UHCI_QH_REMOVE_DELAY); 1152 } 1153 1154 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1155 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1156 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1157 pqh->hlink = sqh->hlink; 1158 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1159 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1160 sizeof(pqh->qh.qh_hlink), 1161 BUS_DMASYNC_PREWRITE); 1162 delay(UHCI_QH_REMOVE_DELAY); 1163 if (sc->sc_hctl_end == sqh) 1164 sc->sc_hctl_end = pqh; 1165 } 1166 1167 /* Add low speed control QH, called with lock held. */ 1168 void 1169 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1170 { 1171 uhci_soft_qh_t *eqh; 1172 1173 KASSERT(mutex_owned(&sc->sc_lock)); 1174 1175 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1176 eqh = sc->sc_lctl_end; 1177 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1178 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1179 sqh->hlink = eqh->hlink; 1180 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1181 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1182 BUS_DMASYNC_PREWRITE); 1183 eqh->hlink = sqh; 1184 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1185 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1186 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1187 sc->sc_lctl_end = sqh; 1188 } 1189 1190 /* Remove low speed control QH, called with lock held. */ 1191 void 1192 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1193 { 1194 uhci_soft_qh_t *pqh; 1195 1196 KASSERT(mutex_owned(&sc->sc_lock)); 1197 1198 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1199 /* See comment in uhci_remove_hs_ctrl() */ 1200 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1201 sizeof(sqh->qh.qh_elink), 1202 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1203 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1204 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1205 usb_syncmem(&sqh->dma, 1206 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1207 sizeof(sqh->qh.qh_elink), 1208 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1209 delay(UHCI_QH_REMOVE_DELAY); 1210 } 1211 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1212 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1213 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1214 pqh->hlink = sqh->hlink; 1215 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1216 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1217 sizeof(pqh->qh.qh_hlink), 1218 BUS_DMASYNC_PREWRITE); 1219 delay(UHCI_QH_REMOVE_DELAY); 1220 if (sc->sc_lctl_end == sqh) 1221 sc->sc_lctl_end = pqh; 1222 } 1223 1224 /* Add bulk QH, called with lock held. */ 1225 void 1226 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1227 { 1228 uhci_soft_qh_t *eqh; 1229 1230 KASSERT(mutex_owned(&sc->sc_lock)); 1231 1232 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1233 eqh = sc->sc_bulk_end; 1234 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1235 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1236 sqh->hlink = eqh->hlink; 1237 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1238 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1239 BUS_DMASYNC_PREWRITE); 1240 eqh->hlink = sqh; 1241 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1242 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1243 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1244 sc->sc_bulk_end = sqh; 1245 uhci_add_loop(sc); 1246 } 1247 1248 /* Remove bulk QH, called with lock held. */ 1249 void 1250 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1251 { 1252 uhci_soft_qh_t *pqh; 1253 1254 KASSERT(mutex_owned(&sc->sc_lock)); 1255 1256 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1257 uhci_rem_loop(sc); 1258 /* See comment in uhci_remove_hs_ctrl() */ 1259 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1260 sizeof(sqh->qh.qh_elink), 1261 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1262 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1263 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1264 usb_syncmem(&sqh->dma, 1265 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1266 sizeof(sqh->qh.qh_elink), 1267 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1268 delay(UHCI_QH_REMOVE_DELAY); 1269 } 1270 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1271 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1272 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1273 pqh->hlink = sqh->hlink; 1274 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1275 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1276 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1277 delay(UHCI_QH_REMOVE_DELAY); 1278 if (sc->sc_bulk_end == sqh) 1279 sc->sc_bulk_end = pqh; 1280 } 1281 1282 Static int uhci_intr1(uhci_softc_t *); 1283 1284 int 1285 uhci_intr(void *arg) 1286 { 1287 uhci_softc_t *sc = arg; 1288 int ret = 0; 1289 1290 mutex_spin_enter(&sc->sc_intr_lock); 1291 1292 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1293 goto done; 1294 1295 if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) { 1296 #ifdef DIAGNOSTIC 1297 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1298 #endif 1299 goto done; 1300 } 1301 1302 ret = uhci_intr1(sc); 1303 1304 done: 1305 mutex_spin_exit(&sc->sc_intr_lock); 1306 return ret; 1307 } 1308 1309 int 1310 uhci_intr1(uhci_softc_t *sc) 1311 { 1312 int status; 1313 int ack; 1314 1315 #ifdef UHCI_DEBUG 1316 if (uhcidebug > 15) { 1317 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1318 uhci_dumpregs(sc); 1319 } 1320 #endif 1321 1322 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1323 1324 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1325 if (status == 0) /* The interrupt was not for us. */ 1326 return (0); 1327 1328 if (sc->sc_suspend != PWR_RESUME) { 1329 #ifdef DIAGNOSTIC 1330 printf("%s: interrupt while not operating ignored\n", 1331 device_xname(sc->sc_dev)); 1332 #endif 1333 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1334 return (0); 1335 } 1336 1337 ack = 0; 1338 if (status & UHCI_STS_USBINT) 1339 ack |= UHCI_STS_USBINT; 1340 if (status & UHCI_STS_USBEI) 1341 ack |= UHCI_STS_USBEI; 1342 if (status & UHCI_STS_RD) { 1343 ack |= UHCI_STS_RD; 1344 #ifdef UHCI_DEBUG 1345 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1346 #endif 1347 } 1348 if (status & UHCI_STS_HSE) { 1349 ack |= UHCI_STS_HSE; 1350 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1351 } 1352 if (status & UHCI_STS_HCPE) { 1353 ack |= UHCI_STS_HCPE; 1354 printf("%s: host controller process error\n", 1355 device_xname(sc->sc_dev)); 1356 } 1357 1358 /* When HCHalted=1 and Run/Stop=0 , it is normal */ 1359 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) { 1360 /* no acknowledge needed */ 1361 if (!sc->sc_dying) { 1362 printf("%s: host controller halted\n", 1363 device_xname(sc->sc_dev)); 1364 #ifdef UHCI_DEBUG 1365 uhci_dump_all(sc); 1366 #endif 1367 } 1368 sc->sc_dying = 1; 1369 } 1370 1371 if (!ack) 1372 return (0); /* nothing to acknowledge */ 1373 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1374 1375 sc->sc_bus.no_intrs++; 1376 usb_schedsoftintr(&sc->sc_bus); 1377 1378 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1379 1380 return (1); 1381 } 1382 1383 void 1384 uhci_softintr(void *v) 1385 { 1386 struct usbd_bus *bus = v; 1387 uhci_softc_t *sc = bus->hci_private; 1388 uhci_intr_info_t *ii, *nextii; 1389 1390 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1391 1392 DPRINTFN(10,("%s: uhci_softintr\n", device_xname(sc->sc_dev))); 1393 1394 /* 1395 * Interrupts on UHCI really suck. When the host controller 1396 * interrupts because a transfer is completed there is no 1397 * way of knowing which transfer it was. You can scan down 1398 * the TDs and QHs of the previous frame to limit the search, 1399 * but that assumes that the interrupt was not delayed by more 1400 * than 1 ms, which may not always be true (e.g. after debug 1401 * output on a slow console). 1402 * We scan all interrupt descriptors to see if any have 1403 * completed. 1404 */ 1405 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1406 nextii = LIST_NEXT(ii, list); 1407 uhci_check_intr(sc, ii); 1408 } 1409 1410 if (sc->sc_softwake) { 1411 sc->sc_softwake = 0; 1412 cv_broadcast(&sc->sc_softwake_cv); 1413 } 1414 } 1415 1416 /* Check for an interrupt. */ 1417 void 1418 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1419 { 1420 uhci_soft_td_t *std, *lstd; 1421 u_int32_t status; 1422 1423 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1424 #ifdef DIAGNOSTIC 1425 if (ii == NULL) { 1426 printf("uhci_check_intr: no ii? %p\n", ii); 1427 return; 1428 } 1429 #endif 1430 if (ii->xfer->status == USBD_CANCELLED || 1431 ii->xfer->status == USBD_TIMEOUT) { 1432 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1433 return; 1434 } 1435 1436 if (ii->stdstart == NULL) 1437 return; 1438 lstd = ii->stdend; 1439 #ifdef DIAGNOSTIC 1440 if (lstd == NULL) { 1441 printf("uhci_check_intr: std==0\n"); 1442 return; 1443 } 1444 #endif 1445 /* 1446 * If the last TD is still active we need to check whether there 1447 * is an error somewhere in the middle, or whether there was a 1448 * short packet (SPD and not ACTIVE). 1449 */ 1450 usb_syncmem(&lstd->dma, 1451 lstd->offs + offsetof(uhci_td_t, td_status), 1452 sizeof(lstd->td.td_status), 1453 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1454 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1455 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1456 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1457 usb_syncmem(&std->dma, 1458 std->offs + offsetof(uhci_td_t, td_status), 1459 sizeof(std->td.td_status), 1460 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1461 status = le32toh(std->td.td_status); 1462 usb_syncmem(&std->dma, 1463 std->offs + offsetof(uhci_td_t, td_status), 1464 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1465 /* If there's an active TD the xfer isn't done. */ 1466 if (status & UHCI_TD_ACTIVE) 1467 break; 1468 /* Any kind of error makes the xfer done. */ 1469 if (status & UHCI_TD_STALLED) 1470 goto done; 1471 /* We want short packets, and it is short: it's done */ 1472 usb_syncmem(&std->dma, 1473 std->offs + offsetof(uhci_td_t, td_token), 1474 sizeof(std->td.td_token), 1475 BUS_DMASYNC_POSTWRITE); 1476 if ((status & UHCI_TD_SPD) && 1477 UHCI_TD_GET_ACTLEN(status) < 1478 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1479 goto done; 1480 } 1481 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1482 ii, ii->stdstart)); 1483 usb_syncmem(&lstd->dma, 1484 lstd->offs + offsetof(uhci_td_t, td_status), 1485 sizeof(lstd->td.td_status), 1486 BUS_DMASYNC_PREREAD); 1487 return; 1488 } 1489 done: 1490 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1491 callout_stop(&ii->xfer->timeout_handle); 1492 uhci_idone(ii); 1493 } 1494 1495 /* Called with USB lock held. */ 1496 void 1497 uhci_idone(uhci_intr_info_t *ii) 1498 { 1499 usbd_xfer_handle xfer = ii->xfer; 1500 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1501 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1502 uhci_soft_td_t *std; 1503 u_int32_t status = 0, nstatus; 1504 int actlen; 1505 1506 KASSERT(mutex_owned(&sc->sc_lock)); 1507 1508 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1509 #ifdef DIAGNOSTIC 1510 { 1511 /* XXX SMP? */ 1512 int s = splhigh(); 1513 if (ii->isdone) { 1514 splx(s); 1515 #ifdef UHCI_DEBUG 1516 printf("uhci_idone: ii is done!\n "); 1517 uhci_dump_ii(ii); 1518 #else 1519 printf("uhci_idone: ii=%p is done!\n", ii); 1520 #endif 1521 return; 1522 } 1523 ii->isdone = 1; 1524 splx(s); 1525 } 1526 #endif 1527 1528 if (xfer->nframes != 0) { 1529 /* Isoc transfer, do things differently. */ 1530 uhci_soft_td_t **stds = upipe->u.iso.stds; 1531 int i, n, nframes, len; 1532 1533 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1534 1535 nframes = xfer->nframes; 1536 actlen = 0; 1537 n = UXFER(xfer)->curframe; 1538 for (i = 0; i < nframes; i++) { 1539 std = stds[n]; 1540 #ifdef UHCI_DEBUG 1541 if (uhcidebug > 5) { 1542 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1543 uhci_dump_td(std); 1544 } 1545 #endif 1546 if (++n >= UHCI_VFRAMELIST_COUNT) 1547 n = 0; 1548 usb_syncmem(&std->dma, 1549 std->offs + offsetof(uhci_td_t, td_status), 1550 sizeof(std->td.td_status), 1551 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1552 status = le32toh(std->td.td_status); 1553 len = UHCI_TD_GET_ACTLEN(status); 1554 xfer->frlengths[i] = len; 1555 actlen += len; 1556 } 1557 upipe->u.iso.inuse -= nframes; 1558 xfer->actlen = actlen; 1559 xfer->status = USBD_NORMAL_COMPLETION; 1560 goto end; 1561 } 1562 1563 #ifdef UHCI_DEBUG 1564 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1565 ii, xfer, upipe)); 1566 if (uhcidebug > 10) 1567 uhci_dump_tds(ii->stdstart); 1568 #endif 1569 1570 /* The transfer is done, compute actual length and status. */ 1571 actlen = 0; 1572 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1573 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1574 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1575 nstatus = le32toh(std->td.td_status); 1576 if (nstatus & UHCI_TD_ACTIVE) 1577 break; 1578 1579 status = nstatus; 1580 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1581 UHCI_TD_PID_SETUP) 1582 actlen += UHCI_TD_GET_ACTLEN(status); 1583 else { 1584 /* 1585 * UHCI will report CRCTO in addition to a STALL or NAK 1586 * for a SETUP transaction. See section 3.2.2, "TD 1587 * CONTROL AND STATUS". 1588 */ 1589 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1590 status &= ~UHCI_TD_CRCTO; 1591 } 1592 } 1593 /* If there are left over TDs we need to update the toggle. */ 1594 if (std != NULL) 1595 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1596 1597 status &= UHCI_TD_ERROR; 1598 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1599 actlen, status)); 1600 xfer->actlen = actlen; 1601 if (status != 0) { 1602 #ifdef UHCI_DEBUG 1603 char sbuf[128]; 1604 1605 snprintb(sbuf, sizeof(sbuf), 1606 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1607 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status); 1608 1609 DPRINTFN((status == UHCI_TD_STALLED)*10, 1610 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1611 "status 0x%s\n", 1612 xfer->pipe->device->address, 1613 xfer->pipe->endpoint->edesc->bEndpointAddress, 1614 sbuf)); 1615 #endif 1616 1617 if (status == UHCI_TD_STALLED) 1618 xfer->status = USBD_STALLED; 1619 else 1620 xfer->status = USBD_IOERROR; /* more info XXX */ 1621 } else { 1622 xfer->status = USBD_NORMAL_COMPLETION; 1623 } 1624 1625 end: 1626 usb_transfer_complete(xfer); 1627 KASSERT(mutex_owned(&sc->sc_lock)); 1628 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1629 } 1630 1631 /* 1632 * Called when a request does not complete. 1633 */ 1634 void 1635 uhci_timeout(void *addr) 1636 { 1637 uhci_intr_info_t *ii = addr; 1638 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1639 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1640 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1641 1642 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1643 1644 if (sc->sc_dying) { 1645 mutex_enter(&sc->sc_lock); 1646 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1647 mutex_exit(&sc->sc_lock); 1648 return; 1649 } 1650 1651 /* Execute the abort in a process context. */ 1652 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1653 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1654 USB_TASKQ_HC); 1655 } 1656 1657 void 1658 uhci_timeout_task(void *addr) 1659 { 1660 usbd_xfer_handle xfer = addr; 1661 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1662 1663 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1664 1665 mutex_enter(&sc->sc_lock); 1666 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1667 mutex_exit(&sc->sc_lock); 1668 } 1669 1670 /* 1671 * Wait here until controller claims to have an interrupt. 1672 * Then call uhci_intr and return. Use timeout to avoid waiting 1673 * too long. 1674 * Only used during boot when interrupts are not enabled yet. 1675 */ 1676 void 1677 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1678 { 1679 int timo = xfer->timeout; 1680 uhci_intr_info_t *ii; 1681 1682 mutex_enter(&sc->sc_lock); 1683 1684 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1685 1686 xfer->status = USBD_IN_PROGRESS; 1687 for (; timo >= 0; timo--) { 1688 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_lock); 1689 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1690 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1691 mutex_spin_enter(&sc->sc_intr_lock); 1692 uhci_intr1(sc); 1693 mutex_spin_exit(&sc->sc_intr_lock); 1694 if (xfer->status != USBD_IN_PROGRESS) 1695 goto done; 1696 } 1697 } 1698 1699 /* Timeout */ 1700 DPRINTF(("uhci_waitintr: timeout\n")); 1701 for (ii = LIST_FIRST(&sc->sc_intrhead); 1702 ii != NULL && ii->xfer != xfer; 1703 ii = LIST_NEXT(ii, list)) 1704 ; 1705 #ifdef DIAGNOSTIC 1706 if (ii == NULL) 1707 panic("uhci_waitintr: lost intr_info"); 1708 #endif 1709 uhci_idone(ii); 1710 1711 done: 1712 mutex_exit(&sc->sc_lock); 1713 } 1714 1715 void 1716 uhci_poll(struct usbd_bus *bus) 1717 { 1718 uhci_softc_t *sc = bus->hci_private; 1719 1720 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1721 mutex_spin_enter(&sc->sc_intr_lock); 1722 uhci_intr1(sc); 1723 mutex_spin_exit(&sc->sc_intr_lock); 1724 } 1725 } 1726 1727 void 1728 uhci_reset(uhci_softc_t *sc) 1729 { 1730 int n; 1731 1732 UHCICMD(sc, UHCI_CMD_HCRESET); 1733 /* The reset bit goes low when the controller is done. */ 1734 for (n = 0; n < UHCI_RESET_TIMEOUT && 1735 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1736 usb_delay_ms(&sc->sc_bus, 1); 1737 if (n >= UHCI_RESET_TIMEOUT) 1738 printf("%s: controller did not reset\n", 1739 device_xname(sc->sc_dev)); 1740 } 1741 1742 usbd_status 1743 uhci_run(uhci_softc_t *sc, int run) 1744 { 1745 int n, running; 1746 u_int16_t cmd; 1747 1748 run = run != 0; 1749 mutex_spin_enter(&sc->sc_intr_lock); 1750 DPRINTF(("uhci_run: setting run=%d\n", run)); 1751 cmd = UREAD2(sc, UHCI_CMD); 1752 if (run) 1753 cmd |= UHCI_CMD_RS; 1754 else 1755 cmd &= ~UHCI_CMD_RS; 1756 UHCICMD(sc, cmd); 1757 for(n = 0; n < 10; n++) { 1758 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1759 /* return when we've entered the state we want */ 1760 if (run == running) { 1761 mutex_spin_exit(&sc->sc_intr_lock); 1762 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1763 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1764 return (USBD_NORMAL_COMPLETION); 1765 } 1766 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock); 1767 } 1768 mutex_spin_exit(&sc->sc_intr_lock); 1769 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1770 run ? "start" : "stop"); 1771 return (USBD_IOERROR); 1772 } 1773 1774 /* 1775 * Memory management routines. 1776 * uhci_alloc_std allocates TDs 1777 * uhci_alloc_sqh allocates QHs 1778 * These two routines do their own free list management, 1779 * partly for speed, partly because allocating DMAable memory 1780 * has page size granularaity so much memory would be wasted if 1781 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1782 */ 1783 1784 uhci_soft_td_t * 1785 uhci_alloc_std(uhci_softc_t *sc) 1786 { 1787 uhci_soft_td_t *std; 1788 usbd_status err; 1789 int i, offs; 1790 usb_dma_t dma; 1791 1792 if (sc->sc_freetds == NULL) { 1793 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1794 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1795 UHCI_TD_ALIGN, &dma); 1796 if (err) 1797 return (0); 1798 for (i = 0; i < UHCI_STD_CHUNK; i++) { 1799 offs = i * UHCI_STD_SIZE; 1800 std = KERNADDR(&dma, offs); 1801 std->physaddr = DMAADDR(&dma, offs); 1802 std->dma = dma; 1803 std->offs = offs; 1804 std->link.std = sc->sc_freetds; 1805 sc->sc_freetds = std; 1806 } 1807 } 1808 std = sc->sc_freetds; 1809 sc->sc_freetds = std->link.std; 1810 memset(&std->td, 0, sizeof(uhci_td_t)); 1811 return std; 1812 } 1813 1814 void 1815 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1816 { 1817 #ifdef DIAGNOSTIC 1818 #define TD_IS_FREE 0x12345678 1819 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1820 printf("uhci_free_std: freeing free TD %p\n", std); 1821 return; 1822 } 1823 std->td.td_token = htole32(TD_IS_FREE); 1824 #endif 1825 std->link.std = sc->sc_freetds; 1826 sc->sc_freetds = std; 1827 } 1828 1829 uhci_soft_qh_t * 1830 uhci_alloc_sqh(uhci_softc_t *sc) 1831 { 1832 uhci_soft_qh_t *sqh; 1833 usbd_status err; 1834 int i, offs; 1835 usb_dma_t dma; 1836 1837 if (sc->sc_freeqhs == NULL) { 1838 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1839 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1840 UHCI_QH_ALIGN, &dma); 1841 if (err) 1842 return (0); 1843 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1844 offs = i * UHCI_SQH_SIZE; 1845 sqh = KERNADDR(&dma, offs); 1846 sqh->physaddr = DMAADDR(&dma, offs); 1847 sqh->dma = dma; 1848 sqh->offs = offs; 1849 sqh->hlink = sc->sc_freeqhs; 1850 sc->sc_freeqhs = sqh; 1851 } 1852 } 1853 sqh = sc->sc_freeqhs; 1854 sc->sc_freeqhs = sqh->hlink; 1855 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1856 return (sqh); 1857 } 1858 1859 void 1860 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1861 { 1862 sqh->hlink = sc->sc_freeqhs; 1863 sc->sc_freeqhs = sqh; 1864 } 1865 1866 void 1867 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1868 uhci_soft_td_t *stdend) 1869 { 1870 uhci_soft_td_t *p; 1871 1872 /* 1873 * to avoid race condition with the controller which may be looking 1874 * at this chain, we need to first invalidate all links, and 1875 * then wait for the controller to move to another queue 1876 */ 1877 for (p = std; p != stdend; p = p->link.std) { 1878 usb_syncmem(&p->dma, 1879 p->offs + offsetof(uhci_td_t, td_link), 1880 sizeof(p->td.td_link), 1881 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1882 if ((p->td.td_link & UHCI_PTR_T) == 0) { 1883 p->td.td_link = UHCI_PTR_T; 1884 usb_syncmem(&p->dma, 1885 p->offs + offsetof(uhci_td_t, td_link), 1886 sizeof(p->td.td_link), 1887 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1888 } 1889 } 1890 delay(UHCI_QH_REMOVE_DELAY); 1891 1892 for (; std != stdend; std = p) { 1893 p = std->link.std; 1894 uhci_free_std(sc, std); 1895 } 1896 } 1897 1898 usbd_status 1899 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1900 int rd, u_int16_t flags, usb_dma_t *dma, 1901 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1902 { 1903 uhci_soft_td_t *p, *lastp; 1904 uhci_physaddr_t lastlink; 1905 int i, ntd, l, tog, maxp; 1906 u_int32_t status; 1907 int addr = upipe->pipe.device->address; 1908 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1909 1910 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1911 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1912 upipe->pipe.device->speed, flags)); 1913 1914 KASSERT(mutex_owned(&sc->sc_lock)); 1915 1916 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1917 if (maxp == 0) { 1918 printf("uhci_alloc_std_chain: maxp=0\n"); 1919 return (USBD_INVAL); 1920 } 1921 ntd = (len + maxp - 1) / maxp; 1922 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1923 ntd++; 1924 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1925 if (ntd == 0) { 1926 *sp = *ep = 0; 1927 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1928 return (USBD_NORMAL_COMPLETION); 1929 } 1930 tog = upipe->nexttoggle; 1931 if (ntd % 2 == 0) 1932 tog ^= 1; 1933 upipe->nexttoggle = tog ^ 1; 1934 lastp = NULL; 1935 lastlink = UHCI_PTR_T; 1936 ntd--; 1937 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1938 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1939 status |= UHCI_TD_LS; 1940 if (flags & USBD_SHORT_XFER_OK) 1941 status |= UHCI_TD_SPD; 1942 usb_syncmem(dma, 0, len, 1943 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1944 for (i = ntd; i >= 0; i--) { 1945 p = uhci_alloc_std(sc); 1946 if (p == NULL) { 1947 KASSERT(lastp != NULL); 1948 uhci_free_std_chain(sc, lastp, NULL); 1949 return (USBD_NOMEM); 1950 } 1951 p->link.std = lastp; 1952 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1953 lastp = p; 1954 lastlink = p->physaddr; 1955 p->td.td_status = htole32(status); 1956 if (i == ntd) { 1957 /* last TD */ 1958 l = len % maxp; 1959 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1960 l = maxp; 1961 *ep = p; 1962 } else 1963 l = maxp; 1964 p->td.td_token = 1965 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1966 UHCI_TD_OUT(l, endpt, addr, tog)); 1967 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1968 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 1969 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1970 tog ^= 1; 1971 } 1972 *sp = lastp; 1973 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1974 upipe->nexttoggle)); 1975 return (USBD_NORMAL_COMPLETION); 1976 } 1977 1978 void 1979 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1980 { 1981 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1982 upipe->nexttoggle = 0; 1983 } 1984 1985 void 1986 uhci_noop(usbd_pipe_handle pipe) 1987 { 1988 } 1989 1990 usbd_status 1991 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1992 { 1993 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1994 usbd_status err; 1995 1996 /* Insert last in queue. */ 1997 mutex_enter(&sc->sc_lock); 1998 err = usb_insert_transfer(xfer); 1999 mutex_exit(&sc->sc_lock); 2000 if (err) 2001 return (err); 2002 2003 /* 2004 * Pipe isn't running (otherwise err would be USBD_INPROG), 2005 * so start it first. 2006 */ 2007 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2008 } 2009 2010 usbd_status 2011 uhci_device_bulk_start(usbd_xfer_handle xfer) 2012 { 2013 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2014 usbd_device_handle dev = upipe->pipe.device; 2015 uhci_softc_t *sc = dev->bus->hci_private; 2016 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2017 uhci_soft_td_t *data, *dataend; 2018 uhci_soft_qh_t *sqh; 2019 usbd_status err; 2020 int len, isread, endpt; 2021 2022 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2023 xfer, xfer->length, xfer->flags, ii)); 2024 2025 if (sc->sc_dying) 2026 return (USBD_IOERROR); 2027 2028 #ifdef DIAGNOSTIC 2029 if (xfer->rqflags & URQ_REQUEST) 2030 panic("uhci_device_bulk_transfer: a request"); 2031 #endif 2032 2033 mutex_enter(&sc->sc_lock); 2034 2035 len = xfer->length; 2036 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2037 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2038 sqh = upipe->u.bulk.sqh; 2039 2040 upipe->u.bulk.isread = isread; 2041 upipe->u.bulk.length = len; 2042 2043 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2044 &xfer->dmabuf, &data, &dataend); 2045 if (err) { 2046 mutex_exit(&sc->sc_lock); 2047 return (err); 2048 } 2049 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2050 usb_syncmem(&dataend->dma, 2051 dataend->offs + offsetof(uhci_td_t, td_status), 2052 sizeof(dataend->td.td_status), 2053 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2054 2055 2056 #ifdef UHCI_DEBUG 2057 if (uhcidebug > 8) { 2058 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2059 uhci_dump_tds(data); 2060 } 2061 #endif 2062 2063 /* Set up interrupt info. */ 2064 ii->xfer = xfer; 2065 ii->stdstart = data; 2066 ii->stdend = dataend; 2067 #ifdef DIAGNOSTIC 2068 if (!ii->isdone) { 2069 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2070 } 2071 ii->isdone = 0; 2072 #endif 2073 2074 sqh->elink = data; 2075 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2076 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2077 2078 uhci_add_bulk(sc, sqh); 2079 uhci_add_intr_info(sc, ii); 2080 2081 if (xfer->timeout && !sc->sc_bus.use_polling) { 2082 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2083 uhci_timeout, ii); 2084 } 2085 xfer->status = USBD_IN_PROGRESS; 2086 2087 #ifdef UHCI_DEBUG 2088 if (uhcidebug > 10) { 2089 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2090 uhci_dump_tds(data); 2091 } 2092 #endif 2093 2094 if (sc->sc_bus.use_polling) 2095 uhci_waitintr(sc, xfer); 2096 2097 mutex_exit(&sc->sc_lock); 2098 return (USBD_IN_PROGRESS); 2099 } 2100 2101 /* Abort a device bulk request. */ 2102 void 2103 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2104 { 2105 #ifdef DIAGNOSTIC 2106 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2107 #endif 2108 2109 KASSERT(mutex_owned(&sc->sc_lock)); 2110 2111 DPRINTF(("uhci_device_bulk_abort:\n")); 2112 uhci_abort_xfer(xfer, USBD_CANCELLED); 2113 } 2114 2115 /* 2116 * Abort a device request. 2117 * If this routine is called at splusb() it guarantees that the request 2118 * will be removed from the hardware scheduling and that the callback 2119 * for it will be called with USBD_CANCELLED status. 2120 * It's impossible to guarantee that the requested transfer will not 2121 * have happened since the hardware runs concurrently. 2122 * If the transaction has already happened we rely on the ordinary 2123 * interrupt processing to process it. 2124 * XXX This is most probably wrong. 2125 * XXXMRG this doesn't make sense anymore. 2126 */ 2127 void 2128 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2129 { 2130 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2131 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2132 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2133 uhci_soft_td_t *std; 2134 int wake; 2135 2136 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2137 2138 KASSERT(mutex_owned(&sc->sc_lock)); 2139 2140 if (sc->sc_dying) { 2141 /* If we're dying, just do the software part. */ 2142 xfer->status = status; /* make software ignore it */ 2143 callout_stop(&xfer->timeout_handle); 2144 usb_transfer_complete(xfer); 2145 return; 2146 } 2147 2148 if (cpu_intr_p() || cpu_softintr_p()) 2149 panic("uhci_abort_xfer: not in process context"); 2150 2151 /* 2152 * If an abort is already in progress then just wait for it to 2153 * complete and return. 2154 */ 2155 if (xfer->hcflags & UXFER_ABORTING) { 2156 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2157 #ifdef DIAGNOSTIC 2158 if (status == USBD_TIMEOUT) 2159 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2160 #endif 2161 /* Override the status which might be USBD_TIMEOUT. */ 2162 xfer->status = status; 2163 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2164 xfer->hcflags |= UXFER_ABORTWAIT; 2165 while (xfer->hcflags & UXFER_ABORTING) 2166 cv_wait(&xfer->hccv, &sc->sc_lock); 2167 goto done; 2168 } 2169 xfer->hcflags |= UXFER_ABORTING; 2170 2171 /* 2172 * Step 1: Make interrupt routine and hardware ignore xfer. 2173 */ 2174 xfer->status = status; /* make software ignore it */ 2175 callout_stop(&xfer->timeout_handle); 2176 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2177 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2178 usb_syncmem(&std->dma, 2179 std->offs + offsetof(uhci_td_t, td_status), 2180 sizeof(std->td.td_status), 2181 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2182 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2183 usb_syncmem(&std->dma, 2184 std->offs + offsetof(uhci_td_t, td_status), 2185 sizeof(std->td.td_status), 2186 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2187 } 2188 2189 /* 2190 * Step 2: Wait until we know hardware has finished any possible 2191 * use of the xfer. Also make sure the soft interrupt routine 2192 * has run. 2193 */ 2194 /* Hardware finishes in 1ms */ 2195 usb_delay_ms_locked(upipe->pipe.device->bus, 2, &sc->sc_lock); 2196 sc->sc_softwake = 1; 2197 usb_schedsoftintr(&sc->sc_bus); 2198 DPRINTFN(1,("uhci_abort_xfer: cv_wait\n")); 2199 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2200 2201 /* 2202 * Step 3: Execute callback. 2203 */ 2204 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2205 #ifdef DIAGNOSTIC 2206 ii->isdone = 1; 2207 #endif 2208 wake = xfer->hcflags & UXFER_ABORTWAIT; 2209 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2210 usb_transfer_complete(xfer); 2211 if (wake) 2212 cv_broadcast(&xfer->hccv); 2213 done: 2214 KASSERT(mutex_owned(&sc->sc_lock)); 2215 } 2216 2217 /* Close a device bulk pipe. */ 2218 void 2219 uhci_device_bulk_close(usbd_pipe_handle pipe) 2220 { 2221 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2222 usbd_device_handle dev = upipe->pipe.device; 2223 uhci_softc_t *sc = dev->bus->hci_private; 2224 2225 KASSERT(mutex_owned(&sc->sc_lock)); 2226 2227 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2228 2229 pipe->endpoint->datatoggle = upipe->nexttoggle; 2230 } 2231 2232 usbd_status 2233 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2234 { 2235 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2236 usbd_status err; 2237 2238 /* Insert last in queue. */ 2239 mutex_enter(&sc->sc_lock); 2240 err = usb_insert_transfer(xfer); 2241 mutex_exit(&sc->sc_lock); 2242 if (err) 2243 return (err); 2244 2245 /* 2246 * Pipe isn't running (otherwise err would be USBD_INPROG), 2247 * so start it first. 2248 */ 2249 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2250 } 2251 2252 usbd_status 2253 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2254 { 2255 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2256 usbd_status err; 2257 2258 if (sc->sc_dying) 2259 return (USBD_IOERROR); 2260 2261 #ifdef DIAGNOSTIC 2262 if (!(xfer->rqflags & URQ_REQUEST)) 2263 panic("uhci_device_ctrl_transfer: not a request"); 2264 #endif 2265 2266 mutex_enter(&sc->sc_lock); 2267 err = uhci_device_request(xfer); 2268 mutex_exit(&sc->sc_lock); 2269 if (err) 2270 return (err); 2271 2272 if (sc->sc_bus.use_polling) 2273 uhci_waitintr(sc, xfer); 2274 return (USBD_IN_PROGRESS); 2275 } 2276 2277 usbd_status 2278 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2279 { 2280 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2281 usbd_status err; 2282 2283 /* Insert last in queue. */ 2284 mutex_enter(&sc->sc_lock); 2285 err = usb_insert_transfer(xfer); 2286 mutex_exit(&sc->sc_lock); 2287 if (err) 2288 return (err); 2289 2290 /* 2291 * Pipe isn't running (otherwise err would be USBD_INPROG), 2292 * so start it first. 2293 */ 2294 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2295 } 2296 2297 usbd_status 2298 uhci_device_intr_start(usbd_xfer_handle xfer) 2299 { 2300 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2301 usbd_device_handle dev = upipe->pipe.device; 2302 uhci_softc_t *sc = dev->bus->hci_private; 2303 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2304 uhci_soft_td_t *data, *dataend; 2305 uhci_soft_qh_t *sqh; 2306 usbd_status err; 2307 int isread, endpt; 2308 int i; 2309 2310 if (sc->sc_dying) 2311 return (USBD_IOERROR); 2312 2313 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2314 xfer, xfer->length, xfer->flags)); 2315 2316 #ifdef DIAGNOSTIC 2317 if (xfer->rqflags & URQ_REQUEST) 2318 panic("uhci_device_intr_transfer: a request"); 2319 #endif 2320 2321 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2322 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2323 2324 upipe->u.intr.isread = isread; 2325 2326 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2327 xfer->flags, &xfer->dmabuf, &data, 2328 &dataend); 2329 if (err) 2330 return (err); 2331 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2332 usb_syncmem(&dataend->dma, 2333 dataend->offs + offsetof(uhci_td_t, td_status), 2334 sizeof(dataend->td.td_status), 2335 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2336 2337 #ifdef UHCI_DEBUG 2338 if (uhcidebug > 10) { 2339 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2340 uhci_dump_tds(data); 2341 uhci_dump_qh(upipe->u.intr.qhs[0]); 2342 } 2343 #endif 2344 2345 mutex_enter(&sc->sc_lock); 2346 /* Set up interrupt info. */ 2347 ii->xfer = xfer; 2348 ii->stdstart = data; 2349 ii->stdend = dataend; 2350 #ifdef DIAGNOSTIC 2351 if (!ii->isdone) { 2352 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2353 } 2354 ii->isdone = 0; 2355 #endif 2356 2357 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2358 upipe->u.intr.qhs[0])); 2359 for (i = 0; i < upipe->u.intr.npoll; i++) { 2360 sqh = upipe->u.intr.qhs[i]; 2361 sqh->elink = data; 2362 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2363 usb_syncmem(&sqh->dma, 2364 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2365 sizeof(sqh->qh.qh_elink), 2366 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2367 } 2368 uhci_add_intr_info(sc, ii); 2369 xfer->status = USBD_IN_PROGRESS; 2370 mutex_exit(&sc->sc_lock); 2371 2372 #ifdef UHCI_DEBUG 2373 if (uhcidebug > 10) { 2374 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2375 uhci_dump_tds(data); 2376 uhci_dump_qh(upipe->u.intr.qhs[0]); 2377 } 2378 #endif 2379 2380 return (USBD_IN_PROGRESS); 2381 } 2382 2383 /* Abort a device control request. */ 2384 void 2385 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2386 { 2387 #ifdef DIAGNOSTIC 2388 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2389 #endif 2390 2391 KASSERT(mutex_owned(&sc->sc_lock)); 2392 2393 DPRINTF(("uhci_device_ctrl_abort:\n")); 2394 uhci_abort_xfer(xfer, USBD_CANCELLED); 2395 } 2396 2397 /* Close a device control pipe. */ 2398 void 2399 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2400 { 2401 } 2402 2403 /* Abort a device interrupt request. */ 2404 void 2405 uhci_device_intr_abort(usbd_xfer_handle xfer) 2406 { 2407 #ifdef DIAGNOSTIC 2408 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2409 #endif 2410 2411 KASSERT(mutex_owned(&sc->sc_lock)); 2412 2413 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2414 if (xfer->pipe->intrxfer == xfer) { 2415 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2416 xfer->pipe->intrxfer = NULL; 2417 } 2418 uhci_abort_xfer(xfer, USBD_CANCELLED); 2419 } 2420 2421 /* Close a device interrupt pipe. */ 2422 void 2423 uhci_device_intr_close(usbd_pipe_handle pipe) 2424 { 2425 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2426 uhci_softc_t *sc = pipe->device->bus->hci_private; 2427 int i, npoll; 2428 2429 KASSERT(mutex_owned(&sc->sc_lock)); 2430 2431 /* Unlink descriptors from controller data structures. */ 2432 npoll = upipe->u.intr.npoll; 2433 for (i = 0; i < npoll; i++) 2434 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2435 2436 /* 2437 * We now have to wait for any activity on the physical 2438 * descriptors to stop. 2439 */ 2440 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2441 2442 for(i = 0; i < npoll; i++) 2443 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2444 kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *)); 2445 2446 /* XXX free other resources */ 2447 } 2448 2449 usbd_status 2450 uhci_device_request(usbd_xfer_handle xfer) 2451 { 2452 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2453 usb_device_request_t *req = &xfer->request; 2454 usbd_device_handle dev = upipe->pipe.device; 2455 uhci_softc_t *sc = dev->bus->hci_private; 2456 int addr = dev->address; 2457 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2458 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2459 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2460 uhci_soft_qh_t *sqh; 2461 int len; 2462 u_int32_t ls; 2463 usbd_status err; 2464 int isread; 2465 2466 KASSERT(mutex_owned(&sc->sc_lock)); 2467 2468 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2469 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2470 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2471 UGETW(req->wIndex), UGETW(req->wLength), 2472 addr, endpt)); 2473 2474 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2475 isread = req->bmRequestType & UT_READ; 2476 len = UGETW(req->wLength); 2477 2478 setup = upipe->u.ctl.setup; 2479 stat = upipe->u.ctl.stat; 2480 sqh = upipe->u.ctl.sqh; 2481 2482 /* Set up data transaction */ 2483 if (len != 0) { 2484 upipe->nexttoggle = 1; 2485 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2486 &xfer->dmabuf, &data, &dataend); 2487 if (err) 2488 return (err); 2489 next = data; 2490 dataend->link.std = stat; 2491 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2492 usb_syncmem(&dataend->dma, 2493 dataend->offs + offsetof(uhci_td_t, td_link), 2494 sizeof(dataend->td.td_link), 2495 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2496 } else { 2497 next = stat; 2498 } 2499 upipe->u.ctl.length = len; 2500 2501 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2502 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2503 2504 setup->link.std = next; 2505 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2506 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2507 UHCI_TD_ACTIVE); 2508 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2509 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2510 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2511 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2512 2513 stat->link.std = NULL; 2514 stat->td.td_link = htole32(UHCI_PTR_T); 2515 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2516 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2517 stat->td.td_token = 2518 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2519 UHCI_TD_IN (0, endpt, addr, 1)); 2520 stat->td.td_buffer = htole32(0); 2521 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2522 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2523 2524 #ifdef UHCI_DEBUG 2525 if (uhcidebug > 10) { 2526 DPRINTF(("uhci_device_request: before transfer\n")); 2527 uhci_dump_tds(setup); 2528 } 2529 #endif 2530 2531 /* Set up interrupt info. */ 2532 ii->xfer = xfer; 2533 ii->stdstart = setup; 2534 ii->stdend = stat; 2535 #ifdef DIAGNOSTIC 2536 if (!ii->isdone) { 2537 printf("uhci_device_request: not done, ii=%p\n", ii); 2538 } 2539 ii->isdone = 0; 2540 #endif 2541 2542 sqh->elink = setup; 2543 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2544 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2545 2546 if (dev->speed == USB_SPEED_LOW) 2547 uhci_add_ls_ctrl(sc, sqh); 2548 else 2549 uhci_add_hs_ctrl(sc, sqh); 2550 uhci_add_intr_info(sc, ii); 2551 #ifdef UHCI_DEBUG 2552 if (uhcidebug > 12) { 2553 uhci_soft_td_t *std; 2554 uhci_soft_qh_t *xqh; 2555 uhci_soft_qh_t *sxqh; 2556 int maxqh = 0; 2557 uhci_physaddr_t link; 2558 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2559 for (std = sc->sc_vframes[0].htd, link = 0; 2560 (link & UHCI_PTR_QH) == 0; 2561 std = std->link.std) { 2562 link = le32toh(std->td.td_link); 2563 uhci_dump_td(std); 2564 } 2565 sxqh = (uhci_soft_qh_t *)std; 2566 uhci_dump_qh(sxqh); 2567 for (xqh = sxqh; 2568 xqh != NULL; 2569 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2570 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2571 uhci_dump_qh(xqh); 2572 } 2573 DPRINTF(("Enqueued QH:\n")); 2574 uhci_dump_qh(sqh); 2575 uhci_dump_tds(sqh->elink); 2576 } 2577 #endif 2578 if (xfer->timeout && !sc->sc_bus.use_polling) { 2579 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2580 uhci_timeout, ii); 2581 } 2582 xfer->status = USBD_IN_PROGRESS; 2583 2584 return (USBD_NORMAL_COMPLETION); 2585 } 2586 2587 usbd_status 2588 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2589 { 2590 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2591 usbd_status err; 2592 2593 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2594 2595 /* Put it on our queue, */ 2596 mutex_enter(&sc->sc_lock); 2597 err = usb_insert_transfer(xfer); 2598 mutex_exit(&sc->sc_lock); 2599 2600 /* bail out on error, */ 2601 if (err && err != USBD_IN_PROGRESS) 2602 return (err); 2603 2604 /* XXX should check inuse here */ 2605 2606 /* insert into schedule, */ 2607 uhci_device_isoc_enter(xfer); 2608 2609 /* and start if the pipe wasn't running */ 2610 if (!err) 2611 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2612 2613 return (err); 2614 } 2615 2616 void 2617 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2618 { 2619 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2620 usbd_device_handle dev = upipe->pipe.device; 2621 uhci_softc_t *sc = dev->bus->hci_private; 2622 struct iso *iso = &upipe->u.iso; 2623 uhci_soft_td_t *std; 2624 u_int32_t buf, len, status, offs; 2625 int i, next, nframes; 2626 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2627 2628 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2629 "nframes=%d\n", 2630 iso->inuse, iso->next, xfer, xfer->nframes)); 2631 2632 if (sc->sc_dying) 2633 return; 2634 2635 if (xfer->status == USBD_IN_PROGRESS) { 2636 /* This request has already been entered into the frame list */ 2637 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2638 /* XXX */ 2639 } 2640 2641 #ifdef DIAGNOSTIC 2642 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2643 printf("uhci_device_isoc_enter: overflow!\n"); 2644 #endif 2645 2646 next = iso->next; 2647 if (next == -1) { 2648 /* Not in use yet, schedule it a few frames ahead. */ 2649 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2650 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2651 } 2652 2653 xfer->status = USBD_IN_PROGRESS; 2654 UXFER(xfer)->curframe = next; 2655 2656 buf = DMAADDR(&xfer->dmabuf, 0); 2657 offs = 0; 2658 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2659 UHCI_TD_ACTIVE | 2660 UHCI_TD_IOS); 2661 nframes = xfer->nframes; 2662 mutex_enter(&sc->sc_lock); 2663 for (i = 0; i < nframes; i++) { 2664 std = iso->stds[next]; 2665 if (++next >= UHCI_VFRAMELIST_COUNT) 2666 next = 0; 2667 len = xfer->frlengths[i]; 2668 std->td.td_buffer = htole32(buf); 2669 usb_syncmem(&xfer->dmabuf, offs, len, 2670 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2671 if (i == nframes - 1) 2672 status |= UHCI_TD_IOC; 2673 std->td.td_status = htole32(status); 2674 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2675 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2676 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2677 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2678 #ifdef UHCI_DEBUG 2679 if (uhcidebug > 5) { 2680 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2681 uhci_dump_td(std); 2682 } 2683 #endif 2684 buf += len; 2685 offs += len; 2686 } 2687 iso->next = next; 2688 iso->inuse += xfer->nframes; 2689 2690 mutex_exit(&sc->sc_lock); 2691 } 2692 2693 usbd_status 2694 uhci_device_isoc_start(usbd_xfer_handle xfer) 2695 { 2696 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2697 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2698 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2699 uhci_soft_td_t *end; 2700 int i; 2701 2702 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2703 2704 mutex_enter(&sc->sc_lock); 2705 2706 if (sc->sc_dying) { 2707 mutex_exit(&sc->sc_lock); 2708 return (USBD_IOERROR); 2709 } 2710 2711 #ifdef DIAGNOSTIC 2712 if (xfer->status != USBD_IN_PROGRESS) 2713 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2714 #endif 2715 2716 /* Find the last TD */ 2717 i = UXFER(xfer)->curframe + xfer->nframes; 2718 if (i >= UHCI_VFRAMELIST_COUNT) 2719 i -= UHCI_VFRAMELIST_COUNT; 2720 end = upipe->u.iso.stds[i]; 2721 2722 #ifdef DIAGNOSTIC 2723 if (end == NULL) { 2724 printf("uhci_device_isoc_start: end == NULL\n"); 2725 return (USBD_INVAL); 2726 } 2727 #endif 2728 2729 /* Set up interrupt info. */ 2730 ii->xfer = xfer; 2731 ii->stdstart = end; 2732 ii->stdend = end; 2733 #ifdef DIAGNOSTIC 2734 if (!ii->isdone) 2735 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2736 ii->isdone = 0; 2737 #endif 2738 uhci_add_intr_info(sc, ii); 2739 2740 mutex_exit(&sc->sc_lock); 2741 2742 return (USBD_IN_PROGRESS); 2743 } 2744 2745 void 2746 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2747 { 2748 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2749 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2750 uhci_soft_td_t **stds = upipe->u.iso.stds; 2751 uhci_soft_td_t *std; 2752 int i, n, nframes, maxlen, len; 2753 2754 KASSERT(mutex_owned(&sc->sc_lock)); 2755 2756 /* Transfer is already done. */ 2757 if (xfer->status != USBD_NOT_STARTED && 2758 xfer->status != USBD_IN_PROGRESS) { 2759 return; 2760 } 2761 2762 /* Give xfer the requested abort code. */ 2763 xfer->status = USBD_CANCELLED; 2764 2765 /* make hardware ignore it, */ 2766 nframes = xfer->nframes; 2767 n = UXFER(xfer)->curframe; 2768 maxlen = 0; 2769 for (i = 0; i < nframes; i++) { 2770 std = stds[n]; 2771 usb_syncmem(&std->dma, 2772 std->offs + offsetof(uhci_td_t, td_status), 2773 sizeof(std->td.td_status), 2774 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2775 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2776 usb_syncmem(&std->dma, 2777 std->offs + offsetof(uhci_td_t, td_status), 2778 sizeof(std->td.td_status), 2779 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2780 usb_syncmem(&std->dma, 2781 std->offs + offsetof(uhci_td_t, td_token), 2782 sizeof(std->td.td_token), 2783 BUS_DMASYNC_POSTWRITE); 2784 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2785 if (len > maxlen) 2786 maxlen = len; 2787 if (++n >= UHCI_VFRAMELIST_COUNT) 2788 n = 0; 2789 } 2790 2791 /* and wait until we are sure the hardware has finished. */ 2792 delay(maxlen); 2793 2794 #ifdef DIAGNOSTIC 2795 UXFER(xfer)->iinfo.isdone = 1; 2796 #endif 2797 /* Run callback and remove from interrupt list. */ 2798 usb_transfer_complete(xfer); 2799 2800 KASSERT(mutex_owned(&sc->sc_lock)); 2801 } 2802 2803 void 2804 uhci_device_isoc_close(usbd_pipe_handle pipe) 2805 { 2806 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2807 usbd_device_handle dev = upipe->pipe.device; 2808 uhci_softc_t *sc = dev->bus->hci_private; 2809 uhci_soft_td_t *std, *vstd; 2810 struct iso *iso; 2811 int i; 2812 2813 KASSERT(mutex_owned(&sc->sc_lock)); 2814 2815 /* 2816 * Make sure all TDs are marked as inactive. 2817 * Wait for completion. 2818 * Unschedule. 2819 * Deallocate. 2820 */ 2821 iso = &upipe->u.iso; 2822 2823 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2824 std = iso->stds[i]; 2825 usb_syncmem(&std->dma, 2826 std->offs + offsetof(uhci_td_t, td_status), 2827 sizeof(std->td.td_status), 2828 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2829 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2830 usb_syncmem(&std->dma, 2831 std->offs + offsetof(uhci_td_t, td_status), 2832 sizeof(std->td.td_status), 2833 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2834 } 2835 /* wait for completion */ 2836 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2837 2838 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2839 std = iso->stds[i]; 2840 for (vstd = sc->sc_vframes[i].htd; 2841 vstd != NULL && vstd->link.std != std; 2842 vstd = vstd->link.std) 2843 ; 2844 if (vstd == NULL) { 2845 /*panic*/ 2846 printf("uhci_device_isoc_close: %p not found\n", std); 2847 mutex_exit(&sc->sc_lock); 2848 return; 2849 } 2850 vstd->link = std->link; 2851 usb_syncmem(&std->dma, 2852 std->offs + offsetof(uhci_td_t, td_link), 2853 sizeof(std->td.td_link), 2854 BUS_DMASYNC_POSTWRITE); 2855 vstd->td.td_link = std->td.td_link; 2856 usb_syncmem(&vstd->dma, 2857 vstd->offs + offsetof(uhci_td_t, td_link), 2858 sizeof(vstd->td.td_link), 2859 BUS_DMASYNC_PREWRITE); 2860 uhci_free_std(sc, std); 2861 } 2862 2863 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2864 } 2865 2866 usbd_status 2867 uhci_setup_isoc(usbd_pipe_handle pipe) 2868 { 2869 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2870 usbd_device_handle dev = upipe->pipe.device; 2871 uhci_softc_t *sc = dev->bus->hci_private; 2872 int addr = upipe->pipe.device->address; 2873 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2874 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2875 uhci_soft_td_t *std, *vstd; 2876 u_int32_t token; 2877 struct iso *iso; 2878 int i; 2879 2880 iso = &upipe->u.iso; 2881 iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT * 2882 sizeof (uhci_soft_td_t *), 2883 KM_SLEEP); 2884 if (iso->stds == NULL) 2885 return USBD_NOMEM; 2886 2887 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2888 UHCI_TD_OUT(0, endpt, addr, 0); 2889 2890 mutex_enter(&sc->sc_lock); 2891 2892 /* Allocate the TDs and mark as inactive; */ 2893 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2894 std = uhci_alloc_std(sc); 2895 if (std == 0) 2896 goto bad; 2897 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2898 std->td.td_token = htole32(token); 2899 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2900 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2901 iso->stds[i] = std; 2902 } 2903 2904 /* Insert TDs into schedule. */ 2905 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2906 std = iso->stds[i]; 2907 vstd = sc->sc_vframes[i].htd; 2908 usb_syncmem(&vstd->dma, 2909 vstd->offs + offsetof(uhci_td_t, td_link), 2910 sizeof(vstd->td.td_link), 2911 BUS_DMASYNC_POSTWRITE); 2912 std->link = vstd->link; 2913 std->td.td_link = vstd->td.td_link; 2914 usb_syncmem(&std->dma, 2915 std->offs + offsetof(uhci_td_t, td_link), 2916 sizeof(std->td.td_link), 2917 BUS_DMASYNC_PREWRITE); 2918 vstd->link.std = std; 2919 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2920 usb_syncmem(&vstd->dma, 2921 vstd->offs + offsetof(uhci_td_t, td_link), 2922 sizeof(vstd->td.td_link), 2923 BUS_DMASYNC_PREWRITE); 2924 } 2925 mutex_exit(&sc->sc_lock); 2926 2927 iso->next = -1; 2928 iso->inuse = 0; 2929 2930 return (USBD_NORMAL_COMPLETION); 2931 2932 bad: 2933 while (--i >= 0) 2934 uhci_free_std(sc, iso->stds[i]); 2935 mutex_exit(&sc->sc_lock); 2936 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2937 return (USBD_NOMEM); 2938 } 2939 2940 void 2941 uhci_device_isoc_done(usbd_xfer_handle xfer) 2942 { 2943 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2944 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2945 int i, offs; 2946 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2947 2948 2949 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2950 xfer->actlen, xfer->busy_free)); 2951 2952 if (ii->xfer != xfer) 2953 /* Not on interrupt list, ignore it. */ 2954 return; 2955 2956 if (!uhci_active_intr_info(ii)) 2957 return; 2958 2959 #ifdef DIAGNOSTIC 2960 if (ii->stdend == NULL) { 2961 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2962 #ifdef UHCI_DEBUG 2963 uhci_dump_ii(ii); 2964 #endif 2965 return; 2966 } 2967 #endif 2968 2969 /* Turn off the interrupt since it is active even if the TD is not. */ 2970 usb_syncmem(&ii->stdend->dma, 2971 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2972 sizeof(ii->stdend->td.td_status), 2973 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2974 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2975 usb_syncmem(&ii->stdend->dma, 2976 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2977 sizeof(ii->stdend->td.td_status), 2978 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2979 2980 uhci_del_intr_info(ii); /* remove from active list */ 2981 2982 offs = 0; 2983 for (i = 0; i < xfer->nframes; i++) { 2984 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i], 2985 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2986 offs += xfer->frlengths[i]; 2987 } 2988 } 2989 2990 void 2991 uhci_device_intr_done(usbd_xfer_handle xfer) 2992 { 2993 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2994 uhci_softc_t *sc = ii->sc; 2995 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2996 uhci_soft_qh_t *sqh; 2997 int i, npoll, isread; 2998 2999 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 3000 3001 KASSERT(mutex_owned(&sc->sc_lock)); 3002 3003 npoll = upipe->u.intr.npoll; 3004 for(i = 0; i < npoll; i++) { 3005 sqh = upipe->u.intr.qhs[i]; 3006 sqh->elink = NULL; 3007 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3008 usb_syncmem(&sqh->dma, 3009 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3010 sizeof(sqh->qh.qh_elink), 3011 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3012 } 3013 uhci_free_std_chain(sc, ii->stdstart, NULL); 3014 3015 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 3016 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 3017 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3018 3019 /* XXX Wasteful. */ 3020 if (xfer->pipe->repeat) { 3021 uhci_soft_td_t *data, *dataend; 3022 3023 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 3024 3025 /* This alloc cannot fail since we freed the chain above. */ 3026 uhci_alloc_std_chain(upipe, sc, xfer->length, 3027 upipe->u.intr.isread, xfer->flags, 3028 &xfer->dmabuf, &data, &dataend); 3029 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3030 usb_syncmem(&dataend->dma, 3031 dataend->offs + offsetof(uhci_td_t, td_status), 3032 sizeof(dataend->td.td_status), 3033 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3034 3035 #ifdef UHCI_DEBUG 3036 if (uhcidebug > 10) { 3037 DPRINTF(("uhci_device_intr_done: data(1)\n")); 3038 uhci_dump_tds(data); 3039 uhci_dump_qh(upipe->u.intr.qhs[0]); 3040 } 3041 #endif 3042 3043 ii->stdstart = data; 3044 ii->stdend = dataend; 3045 #ifdef DIAGNOSTIC 3046 if (!ii->isdone) { 3047 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3048 } 3049 ii->isdone = 0; 3050 #endif 3051 for (i = 0; i < npoll; i++) { 3052 sqh = upipe->u.intr.qhs[i]; 3053 sqh->elink = data; 3054 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3055 usb_syncmem(&sqh->dma, 3056 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3057 sizeof(sqh->qh.qh_elink), 3058 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3059 } 3060 xfer->status = USBD_IN_PROGRESS; 3061 /* The ii is already on the examined list, just leave it. */ 3062 } else { 3063 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3064 if (uhci_active_intr_info(ii)) 3065 uhci_del_intr_info(ii); 3066 } 3067 } 3068 3069 /* Deallocate request data structures */ 3070 void 3071 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3072 { 3073 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3074 uhci_softc_t *sc = ii->sc; 3075 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3076 int len = UGETW(xfer->request.wLength); 3077 int isread = (xfer->request.bmRequestType & UT_READ); 3078 3079 KASSERT(mutex_owned(&sc->sc_lock)); 3080 3081 #ifdef DIAGNOSTIC 3082 if (!(xfer->rqflags & URQ_REQUEST)) 3083 panic("uhci_device_ctrl_done: not a request"); 3084 #endif 3085 3086 if (!uhci_active_intr_info(ii)) 3087 return; 3088 3089 uhci_del_intr_info(ii); /* remove from active list */ 3090 3091 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3092 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3093 else 3094 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3095 3096 if (upipe->u.ctl.length != 0) 3097 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3098 3099 if (len) { 3100 usb_syncmem(&xfer->dmabuf, 0, len, 3101 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3102 } 3103 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3104 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3105 3106 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3107 } 3108 3109 /* Deallocate request data structures */ 3110 void 3111 uhci_device_bulk_done(usbd_xfer_handle xfer) 3112 { 3113 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3114 uhci_softc_t *sc = ii->sc; 3115 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3116 3117 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3118 xfer, ii, sc, upipe)); 3119 3120 KASSERT(mutex_owned(&sc->sc_lock)); 3121 3122 if (!uhci_active_intr_info(ii)) 3123 return; 3124 3125 uhci_del_intr_info(ii); /* remove from active list */ 3126 3127 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3128 3129 uhci_free_std_chain(sc, ii->stdstart, NULL); 3130 3131 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3132 } 3133 3134 /* Add interrupt QH, called with vflock. */ 3135 void 3136 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3137 { 3138 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3139 uhci_soft_qh_t *eqh; 3140 3141 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3142 3143 eqh = vf->eqh; 3144 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3145 sizeof(eqh->qh.qh_hlink), 3146 BUS_DMASYNC_POSTWRITE); 3147 sqh->hlink = eqh->hlink; 3148 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3149 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3150 sizeof(sqh->qh.qh_hlink), 3151 BUS_DMASYNC_PREWRITE); 3152 eqh->hlink = sqh; 3153 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3154 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3155 sizeof(eqh->qh.qh_hlink), 3156 BUS_DMASYNC_PREWRITE); 3157 vf->eqh = sqh; 3158 vf->bandwidth++; 3159 } 3160 3161 /* Remove interrupt QH. */ 3162 void 3163 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3164 { 3165 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3166 uhci_soft_qh_t *pqh; 3167 3168 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3169 3170 /* See comment in uhci_remove_ctrl() */ 3171 3172 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3173 sizeof(sqh->qh.qh_elink), 3174 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3175 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3176 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3177 usb_syncmem(&sqh->dma, 3178 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3179 sizeof(sqh->qh.qh_elink), 3180 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3181 delay(UHCI_QH_REMOVE_DELAY); 3182 } 3183 3184 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3185 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3186 sizeof(sqh->qh.qh_hlink), 3187 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3188 pqh->hlink = sqh->hlink; 3189 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3190 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3191 sizeof(pqh->qh.qh_hlink), 3192 BUS_DMASYNC_PREWRITE); 3193 delay(UHCI_QH_REMOVE_DELAY); 3194 if (vf->eqh == sqh) 3195 vf->eqh = pqh; 3196 vf->bandwidth--; 3197 } 3198 3199 usbd_status 3200 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3201 { 3202 uhci_soft_qh_t *sqh; 3203 int i, npoll; 3204 u_int bestbw, bw, bestoffs, offs; 3205 3206 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3207 if (ival == 0) { 3208 printf("uhci_device_setintr: 0 interval\n"); 3209 return (USBD_INVAL); 3210 } 3211 3212 if (ival > UHCI_VFRAMELIST_COUNT) 3213 ival = UHCI_VFRAMELIST_COUNT; 3214 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3215 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3216 3217 upipe->u.intr.npoll = npoll; 3218 upipe->u.intr.qhs = 3219 kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP); 3220 if (upipe->u.intr.qhs == NULL) 3221 return USBD_NOMEM; 3222 3223 /* 3224 * Figure out which offset in the schedule that has most 3225 * bandwidth left over. 3226 */ 3227 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3228 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3229 for (bw = i = 0; i < npoll; i++) 3230 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3231 if (bw < bestbw) { 3232 bestbw = bw; 3233 bestoffs = offs; 3234 } 3235 } 3236 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3237 3238 mutex_enter(&sc->sc_lock); 3239 for(i = 0; i < npoll; i++) { 3240 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3241 sqh->elink = NULL; 3242 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3243 usb_syncmem(&sqh->dma, 3244 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3245 sizeof(sqh->qh.qh_elink), 3246 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3247 sqh->pos = MOD(i * ival + bestoffs); 3248 } 3249 #undef MOD 3250 3251 /* Enter QHs into the controller data structures. */ 3252 for(i = 0; i < npoll; i++) 3253 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3254 mutex_exit(&sc->sc_lock); 3255 3256 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3257 return (USBD_NORMAL_COMPLETION); 3258 } 3259 3260 /* Open a new pipe. */ 3261 usbd_status 3262 uhci_open(usbd_pipe_handle pipe) 3263 { 3264 uhci_softc_t *sc = pipe->device->bus->hci_private; 3265 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3266 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3267 usbd_status err = USBD_NOMEM; 3268 int ival; 3269 3270 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3271 pipe, pipe->device->address, 3272 ed->bEndpointAddress, sc->sc_addr)); 3273 3274 if (sc->sc_dying) 3275 return USBD_IOERROR; 3276 3277 upipe->aborting = 0; 3278 /* toggle state needed for bulk endpoints */ 3279 upipe->nexttoggle = pipe->endpoint->datatoggle; 3280 3281 if (pipe->device->address == sc->sc_addr) { 3282 switch (ed->bEndpointAddress) { 3283 case USB_CONTROL_ENDPOINT: 3284 pipe->methods = &uhci_root_ctrl_methods; 3285 break; 3286 case UE_DIR_IN | UHCI_INTR_ENDPT: 3287 pipe->methods = &uhci_root_intr_methods; 3288 break; 3289 default: 3290 return (USBD_INVAL); 3291 } 3292 } else { 3293 switch (ed->bmAttributes & UE_XFERTYPE) { 3294 case UE_CONTROL: 3295 pipe->methods = &uhci_device_ctrl_methods; 3296 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3297 if (upipe->u.ctl.sqh == NULL) 3298 goto bad; 3299 upipe->u.ctl.setup = uhci_alloc_std(sc); 3300 if (upipe->u.ctl.setup == NULL) { 3301 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3302 goto bad; 3303 } 3304 upipe->u.ctl.stat = uhci_alloc_std(sc); 3305 if (upipe->u.ctl.stat == NULL) { 3306 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3307 uhci_free_std(sc, upipe->u.ctl.setup); 3308 goto bad; 3309 } 3310 err = usb_allocmem(&sc->sc_bus, 3311 sizeof(usb_device_request_t), 3312 0, &upipe->u.ctl.reqdma); 3313 if (err) { 3314 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3315 uhci_free_std(sc, upipe->u.ctl.setup); 3316 uhci_free_std(sc, upipe->u.ctl.stat); 3317 goto bad; 3318 } 3319 break; 3320 case UE_INTERRUPT: 3321 pipe->methods = &uhci_device_intr_methods; 3322 ival = pipe->interval; 3323 if (ival == USBD_DEFAULT_INTERVAL) 3324 ival = ed->bInterval; 3325 return (uhci_device_setintr(sc, upipe, ival)); 3326 case UE_ISOCHRONOUS: 3327 pipe->methods = &uhci_device_isoc_methods; 3328 return (uhci_setup_isoc(pipe)); 3329 case UE_BULK: 3330 pipe->methods = &uhci_device_bulk_methods; 3331 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3332 if (upipe->u.bulk.sqh == NULL) 3333 goto bad; 3334 break; 3335 } 3336 } 3337 return (USBD_NORMAL_COMPLETION); 3338 3339 bad: 3340 return USBD_NOMEM; 3341 } 3342 3343 /* 3344 * Data structures and routines to emulate the root hub. 3345 */ 3346 usb_device_descriptor_t uhci_devd = { 3347 USB_DEVICE_DESCRIPTOR_SIZE, 3348 UDESC_DEVICE, /* type */ 3349 {0x00, 0x01}, /* USB version */ 3350 UDCLASS_HUB, /* class */ 3351 UDSUBCLASS_HUB, /* subclass */ 3352 UDPROTO_FSHUB, /* protocol */ 3353 64, /* max packet */ 3354 {0},{0},{0x00,0x01}, /* device id */ 3355 1,2,0, /* string indicies */ 3356 1 /* # of configurations */ 3357 }; 3358 3359 const usb_config_descriptor_t uhci_confd = { 3360 USB_CONFIG_DESCRIPTOR_SIZE, 3361 UDESC_CONFIG, 3362 {USB_CONFIG_DESCRIPTOR_SIZE + 3363 USB_INTERFACE_DESCRIPTOR_SIZE + 3364 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3365 1, 3366 1, 3367 0, 3368 UC_ATTR_MBO | UC_SELF_POWERED, 3369 0 /* max power */ 3370 }; 3371 3372 const usb_interface_descriptor_t uhci_ifcd = { 3373 USB_INTERFACE_DESCRIPTOR_SIZE, 3374 UDESC_INTERFACE, 3375 0, 3376 0, 3377 1, 3378 UICLASS_HUB, 3379 UISUBCLASS_HUB, 3380 UIPROTO_FSHUB, 3381 0 3382 }; 3383 3384 const usb_endpoint_descriptor_t uhci_endpd = { 3385 USB_ENDPOINT_DESCRIPTOR_SIZE, 3386 UDESC_ENDPOINT, 3387 UE_DIR_IN | UHCI_INTR_ENDPT, 3388 UE_INTERRUPT, 3389 {8}, 3390 255 3391 }; 3392 3393 const usb_hub_descriptor_t uhci_hubd_piix = { 3394 USB_HUB_DESCRIPTOR_SIZE, 3395 UDESC_HUB, 3396 2, 3397 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3398 50, /* power on to power good */ 3399 0, 3400 { 0x00 }, /* both ports are removable */ 3401 { 0 }, 3402 }; 3403 3404 /* 3405 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3406 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3407 * should not be used by the USB subsystem. As we cannot issue a 3408 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3409 * will be enabled as part of the reset. 3410 * 3411 * On the VT83C572, the port cannot be successfully enabled until the 3412 * outstanding "port enable change" and "connection status change" 3413 * events have been reset. 3414 */ 3415 Static usbd_status 3416 uhci_portreset(uhci_softc_t *sc, int index) 3417 { 3418 int lim, port, x; 3419 3420 if (index == 1) 3421 port = UHCI_PORTSC1; 3422 else if (index == 2) 3423 port = UHCI_PORTSC2; 3424 else 3425 return (USBD_IOERROR); 3426 3427 x = URWMASK(UREAD2(sc, port)); 3428 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3429 3430 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3431 3432 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3433 index, UREAD2(sc, port))); 3434 3435 x = URWMASK(UREAD2(sc, port)); 3436 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3437 3438 delay(100); 3439 3440 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3441 index, UREAD2(sc, port))); 3442 3443 x = URWMASK(UREAD2(sc, port)); 3444 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3445 3446 for (lim = 10; --lim > 0;) { 3447 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3448 3449 x = UREAD2(sc, port); 3450 3451 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3452 index, lim, x)); 3453 3454 if (!(x & UHCI_PORTSC_CCS)) { 3455 /* 3456 * No device is connected (or was disconnected 3457 * during reset). Consider the port reset. 3458 * The delay must be long enough to ensure on 3459 * the initial iteration that the device 3460 * connection will have been registered. 50ms 3461 * appears to be sufficient, but 20ms is not. 3462 */ 3463 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3464 index, lim)); 3465 break; 3466 } 3467 3468 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3469 /* 3470 * Port enabled changed and/or connection 3471 * status changed were set. Reset either or 3472 * both raised flags (by writing a 1 to that 3473 * bit), and wait again for state to settle. 3474 */ 3475 UWRITE2(sc, port, URWMASK(x) | 3476 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3477 continue; 3478 } 3479 3480 if (x & UHCI_PORTSC_PE) 3481 /* Port is enabled */ 3482 break; 3483 3484 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3485 } 3486 3487 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3488 index, UREAD2(sc, port))); 3489 3490 if (lim <= 0) { 3491 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3492 return (USBD_TIMEOUT); 3493 } 3494 3495 sc->sc_isreset = 1; 3496 return (USBD_NORMAL_COMPLETION); 3497 } 3498 3499 /* 3500 * Simulate a hardware hub by handling all the necessary requests. 3501 */ 3502 usbd_status 3503 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3504 { 3505 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3506 usbd_status err; 3507 3508 /* Insert last in queue. */ 3509 mutex_enter(&sc->sc_lock); 3510 err = usb_insert_transfer(xfer); 3511 mutex_exit(&sc->sc_lock); 3512 if (err) 3513 return (err); 3514 3515 /* 3516 * Pipe isn't running (otherwise err would be USBD_INPROG), 3517 * so start it first. 3518 */ 3519 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3520 } 3521 3522 usbd_status 3523 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3524 { 3525 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3526 usb_device_request_t *req; 3527 void *buf = NULL; 3528 int port, x; 3529 int len, value, index, status, change, l, totlen = 0; 3530 usb_port_status_t ps; 3531 usbd_status err; 3532 3533 if (sc->sc_dying) 3534 return (USBD_IOERROR); 3535 3536 #ifdef DIAGNOSTIC 3537 if (!(xfer->rqflags & URQ_REQUEST)) 3538 panic("uhci_root_ctrl_start: not a request"); 3539 #endif 3540 req = &xfer->request; 3541 3542 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3543 req->bmRequestType, req->bRequest)); 3544 3545 len = UGETW(req->wLength); 3546 value = UGETW(req->wValue); 3547 index = UGETW(req->wIndex); 3548 3549 if (len != 0) 3550 buf = KERNADDR(&xfer->dmabuf, 0); 3551 3552 #define C(x,y) ((x) | ((y) << 8)) 3553 switch(C(req->bRequest, req->bmRequestType)) { 3554 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3555 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3556 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3557 /* 3558 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3559 * for the integrated root hub. 3560 */ 3561 break; 3562 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3563 if (len > 0) { 3564 *(u_int8_t *)buf = sc->sc_conf; 3565 totlen = 1; 3566 } 3567 break; 3568 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3569 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3570 if (len == 0) 3571 break; 3572 switch(value >> 8) { 3573 case UDESC_DEVICE: 3574 if ((value & 0xff) != 0) { 3575 err = USBD_IOERROR; 3576 goto ret; 3577 } 3578 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3579 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3580 memcpy(buf, &uhci_devd, l); 3581 break; 3582 case UDESC_CONFIG: 3583 if ((value & 0xff) != 0) { 3584 err = USBD_IOERROR; 3585 goto ret; 3586 } 3587 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3588 memcpy(buf, &uhci_confd, l); 3589 buf = (char *)buf + l; 3590 len -= l; 3591 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3592 totlen += l; 3593 memcpy(buf, &uhci_ifcd, l); 3594 buf = (char *)buf + l; 3595 len -= l; 3596 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3597 totlen += l; 3598 memcpy(buf, &uhci_endpd, l); 3599 break; 3600 case UDESC_STRING: 3601 #define sd ((usb_string_descriptor_t *)buf) 3602 switch (value & 0xff) { 3603 case 0: /* Language table */ 3604 totlen = usb_makelangtbl(sd, len); 3605 break; 3606 case 1: /* Vendor */ 3607 totlen = usb_makestrdesc(sd, len, 3608 sc->sc_vendor); 3609 break; 3610 case 2: /* Product */ 3611 totlen = usb_makestrdesc(sd, len, 3612 "UHCI root hub"); 3613 break; 3614 } 3615 #undef sd 3616 break; 3617 default: 3618 err = USBD_IOERROR; 3619 goto ret; 3620 } 3621 break; 3622 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3623 if (len > 0) { 3624 *(u_int8_t *)buf = 0; 3625 totlen = 1; 3626 } 3627 break; 3628 case C(UR_GET_STATUS, UT_READ_DEVICE): 3629 if (len > 1) { 3630 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3631 totlen = 2; 3632 } 3633 break; 3634 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3635 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3636 if (len > 1) { 3637 USETW(((usb_status_t *)buf)->wStatus, 0); 3638 totlen = 2; 3639 } 3640 break; 3641 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3642 if (value >= USB_MAX_DEVICES) { 3643 err = USBD_IOERROR; 3644 goto ret; 3645 } 3646 sc->sc_addr = value; 3647 break; 3648 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3649 if (value != 0 && value != 1) { 3650 err = USBD_IOERROR; 3651 goto ret; 3652 } 3653 sc->sc_conf = value; 3654 break; 3655 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3656 break; 3657 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3658 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3659 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3660 err = USBD_IOERROR; 3661 goto ret; 3662 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3663 break; 3664 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3665 break; 3666 /* Hub requests */ 3667 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3668 break; 3669 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3670 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3671 "port=%d feature=%d\n", 3672 index, value)); 3673 if (index == 1) 3674 port = UHCI_PORTSC1; 3675 else if (index == 2) 3676 port = UHCI_PORTSC2; 3677 else { 3678 err = USBD_IOERROR; 3679 goto ret; 3680 } 3681 switch(value) { 3682 case UHF_PORT_ENABLE: 3683 x = URWMASK(UREAD2(sc, port)); 3684 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3685 break; 3686 case UHF_PORT_SUSPEND: 3687 x = URWMASK(UREAD2(sc, port)); 3688 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3689 break; 3690 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3691 /* see USB2 spec ch. 7.1.7.7 */ 3692 usb_delay_ms(&sc->sc_bus, 20); 3693 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3694 /* 10ms resume delay must be provided by caller */ 3695 break; 3696 case UHF_PORT_RESET: 3697 x = URWMASK(UREAD2(sc, port)); 3698 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3699 break; 3700 case UHF_C_PORT_CONNECTION: 3701 x = URWMASK(UREAD2(sc, port)); 3702 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3703 break; 3704 case UHF_C_PORT_ENABLE: 3705 x = URWMASK(UREAD2(sc, port)); 3706 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3707 break; 3708 case UHF_C_PORT_OVER_CURRENT: 3709 x = URWMASK(UREAD2(sc, port)); 3710 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3711 break; 3712 case UHF_C_PORT_RESET: 3713 sc->sc_isreset = 0; 3714 err = USBD_NORMAL_COMPLETION; 3715 goto ret; 3716 case UHF_PORT_CONNECTION: 3717 case UHF_PORT_OVER_CURRENT: 3718 case UHF_PORT_POWER: 3719 case UHF_PORT_LOW_SPEED: 3720 case UHF_C_PORT_SUSPEND: 3721 default: 3722 err = USBD_IOERROR; 3723 goto ret; 3724 } 3725 break; 3726 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3727 if (index == 1) 3728 port = UHCI_PORTSC1; 3729 else if (index == 2) 3730 port = UHCI_PORTSC2; 3731 else { 3732 err = USBD_IOERROR; 3733 goto ret; 3734 } 3735 if (len > 0) { 3736 *(u_int8_t *)buf = 3737 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3738 UHCI_PORTSC_LS_SHIFT; 3739 totlen = 1; 3740 } 3741 break; 3742 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3743 if (len == 0) 3744 break; 3745 if ((value & 0xff) != 0) { 3746 err = USBD_IOERROR; 3747 goto ret; 3748 } 3749 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3750 totlen = l; 3751 memcpy(buf, &uhci_hubd_piix, l); 3752 break; 3753 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3754 if (len != 4) { 3755 err = USBD_IOERROR; 3756 goto ret; 3757 } 3758 memset(buf, 0, len); 3759 totlen = len; 3760 break; 3761 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3762 if (index == 1) 3763 port = UHCI_PORTSC1; 3764 else if (index == 2) 3765 port = UHCI_PORTSC2; 3766 else { 3767 err = USBD_IOERROR; 3768 goto ret; 3769 } 3770 if (len != 4) { 3771 err = USBD_IOERROR; 3772 goto ret; 3773 } 3774 x = UREAD2(sc, port); 3775 status = change = 0; 3776 if (x & UHCI_PORTSC_CCS) 3777 status |= UPS_CURRENT_CONNECT_STATUS; 3778 if (x & UHCI_PORTSC_CSC) 3779 change |= UPS_C_CONNECT_STATUS; 3780 if (x & UHCI_PORTSC_PE) 3781 status |= UPS_PORT_ENABLED; 3782 if (x & UHCI_PORTSC_POEDC) 3783 change |= UPS_C_PORT_ENABLED; 3784 if (x & UHCI_PORTSC_OCI) 3785 status |= UPS_OVERCURRENT_INDICATOR; 3786 if (x & UHCI_PORTSC_OCIC) 3787 change |= UPS_C_OVERCURRENT_INDICATOR; 3788 if (x & UHCI_PORTSC_SUSP) 3789 status |= UPS_SUSPEND; 3790 if (x & UHCI_PORTSC_LSDA) 3791 status |= UPS_LOW_SPEED; 3792 status |= UPS_PORT_POWER; 3793 if (sc->sc_isreset) 3794 change |= UPS_C_PORT_RESET; 3795 USETW(ps.wPortStatus, status); 3796 USETW(ps.wPortChange, change); 3797 l = min(len, sizeof ps); 3798 memcpy(buf, &ps, l); 3799 totlen = l; 3800 break; 3801 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3802 err = USBD_IOERROR; 3803 goto ret; 3804 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3805 break; 3806 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3807 if (index == 1) 3808 port = UHCI_PORTSC1; 3809 else if (index == 2) 3810 port = UHCI_PORTSC2; 3811 else { 3812 err = USBD_IOERROR; 3813 goto ret; 3814 } 3815 switch(value) { 3816 case UHF_PORT_ENABLE: 3817 x = URWMASK(UREAD2(sc, port)); 3818 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3819 break; 3820 case UHF_PORT_SUSPEND: 3821 x = URWMASK(UREAD2(sc, port)); 3822 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3823 break; 3824 case UHF_PORT_RESET: 3825 err = uhci_portreset(sc, index); 3826 goto ret; 3827 case UHF_PORT_POWER: 3828 /* Pretend we turned on power */ 3829 err = USBD_NORMAL_COMPLETION; 3830 goto ret; 3831 case UHF_C_PORT_CONNECTION: 3832 case UHF_C_PORT_ENABLE: 3833 case UHF_C_PORT_OVER_CURRENT: 3834 case UHF_PORT_CONNECTION: 3835 case UHF_PORT_OVER_CURRENT: 3836 case UHF_PORT_LOW_SPEED: 3837 case UHF_C_PORT_SUSPEND: 3838 case UHF_C_PORT_RESET: 3839 default: 3840 err = USBD_IOERROR; 3841 goto ret; 3842 } 3843 break; 3844 default: 3845 err = USBD_IOERROR; 3846 goto ret; 3847 } 3848 xfer->actlen = totlen; 3849 err = USBD_NORMAL_COMPLETION; 3850 ret: 3851 xfer->status = err; 3852 mutex_enter(&sc->sc_lock); 3853 usb_transfer_complete(xfer); 3854 mutex_exit(&sc->sc_lock); 3855 return (USBD_IN_PROGRESS); 3856 } 3857 3858 /* Abort a root control request. */ 3859 void 3860 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3861 { 3862 /* Nothing to do, all transfers are synchronous. */ 3863 } 3864 3865 /* Close the root pipe. */ 3866 void 3867 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3868 { 3869 DPRINTF(("uhci_root_ctrl_close\n")); 3870 } 3871 3872 /* Abort a root interrupt request. */ 3873 void 3874 uhci_root_intr_abort(usbd_xfer_handle xfer) 3875 { 3876 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3877 3878 KASSERT(mutex_owned(&sc->sc_lock)); 3879 3880 callout_stop(&sc->sc_poll_handle); 3881 sc->sc_intr_xfer = NULL; 3882 3883 if (xfer->pipe->intrxfer == xfer) { 3884 DPRINTF(("uhci_root_intr_abort: remove\n")); 3885 xfer->pipe->intrxfer = 0; 3886 } 3887 xfer->status = USBD_CANCELLED; 3888 #ifdef DIAGNOSTIC 3889 UXFER(xfer)->iinfo.isdone = 1; 3890 #endif 3891 usb_transfer_complete(xfer); 3892 } 3893 3894 usbd_status 3895 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3896 { 3897 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3898 usbd_status err; 3899 3900 /* Insert last in queue. */ 3901 mutex_enter(&sc->sc_lock); 3902 err = usb_insert_transfer(xfer); 3903 mutex_exit(&sc->sc_lock); 3904 if (err) 3905 return (err); 3906 3907 /* 3908 * Pipe isn't running (otherwise err would be USBD_INPROG), 3909 * start first 3910 */ 3911 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3912 } 3913 3914 /* Start a transfer on the root interrupt pipe */ 3915 usbd_status 3916 uhci_root_intr_start(usbd_xfer_handle xfer) 3917 { 3918 usbd_pipe_handle pipe = xfer->pipe; 3919 uhci_softc_t *sc = pipe->device->bus->hci_private; 3920 unsigned int ival; 3921 3922 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3923 xfer, xfer->length, xfer->flags)); 3924 3925 if (sc->sc_dying) 3926 return (USBD_IOERROR); 3927 3928 /* XXX temporary variable needed to avoid gcc3 warning */ 3929 ival = xfer->pipe->endpoint->edesc->bInterval; 3930 sc->sc_ival = mstohz(ival); 3931 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3932 sc->sc_intr_xfer = xfer; 3933 return (USBD_IN_PROGRESS); 3934 } 3935 3936 /* Close the root interrupt pipe. */ 3937 void 3938 uhci_root_intr_close(usbd_pipe_handle pipe) 3939 { 3940 uhci_softc_t *sc = pipe->device->bus->hci_private; 3941 3942 KASSERT(mutex_owned(&sc->sc_lock)); 3943 3944 callout_stop(&sc->sc_poll_handle); 3945 sc->sc_intr_xfer = NULL; 3946 DPRINTF(("uhci_root_intr_close\n")); 3947 } 3948
Indexes created Tue Sep 30 17:09:57 GMT 2025