uhci.c revision 1.240.6.2
1 /* $NetBSD: uhci.c,v 1.240.6.2 2011/12/06 05:06:50 mrg Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2004, 2011 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 11 * and Matthew R. Green. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * USB Universal Host Controller driver. 37 * Handles e.g. PIIX3 and PIIX4. 38 * 39 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 40 * USB spec: http://www.usb.org/developers/docs/ 41 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 42 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.240.6.2 2011/12/06 05:06:50 mrg Exp $"); 47 48 #include "opt_usb.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/device.h> 55 #include <sys/select.h> 56 #include <sys/extent.h> 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/bus.h> 60 61 #include <machine/endian.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdivar.h> 66 #include <dev/usb/usb_mem.h> 67 #include <dev/usb/usb_quirks.h> 68 69 #include <dev/usb/uhcireg.h> 70 #include <dev/usb/uhcivar.h> 71 #include <dev/usb/usbroothub_subr.h> 72 73 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 74 /*#define UHCI_CTL_LOOP */ 75 76 77 78 #ifdef UHCI_DEBUG 79 uhci_softc_t *thesc; 80 #define DPRINTF(x) if (uhcidebug) printf x 81 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 82 int uhcidebug = 0; 83 int uhcinoloop = 0; 84 #else 85 #define DPRINTF(x) 86 #define DPRINTFN(n,x) 87 #endif 88 89 /* 90 * The UHCI controller is little endian, so on big endian machines 91 * the data stored in memory needs to be swapped. 92 */ 93 94 struct uhci_pipe { 95 struct usbd_pipe pipe; 96 int nexttoggle; 97 98 u_char aborting; 99 usbd_xfer_handle abortstart, abortend; 100 101 /* Info needed for different pipe kinds. */ 102 union { 103 /* Control pipe */ 104 struct { 105 uhci_soft_qh_t *sqh; 106 usb_dma_t reqdma; 107 uhci_soft_td_t *setup, *stat; 108 u_int length; 109 } ctl; 110 /* Interrupt pipe */ 111 struct { 112 int npoll; 113 int isread; 114 uhci_soft_qh_t **qhs; 115 } intr; 116 /* Bulk pipe */ 117 struct { 118 uhci_soft_qh_t *sqh; 119 u_int length; 120 int isread; 121 } bulk; 122 /* Iso pipe */ 123 struct iso { 124 uhci_soft_td_t **stds; 125 int next, inuse; 126 } iso; 127 } u; 128 }; 129 130 Static void uhci_globalreset(uhci_softc_t *); 131 Static usbd_status uhci_portreset(uhci_softc_t*, int); 132 Static void uhci_reset(uhci_softc_t *); 133 Static usbd_status uhci_run(uhci_softc_t *, int run); 134 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 135 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 136 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 137 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 138 #if 0 139 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 140 uhci_intr_info_t *); 141 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 142 #endif 143 144 Static void uhci_free_std_chain(uhci_softc_t *, 145 uhci_soft_td_t *, uhci_soft_td_t *); 146 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 147 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 148 uhci_soft_td_t **, uhci_soft_td_t **); 149 Static void uhci_poll_hub(void *); 150 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 151 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 152 Static void uhci_idone(uhci_intr_info_t *); 153 154 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 155 156 Static void uhci_timeout(void *); 157 Static void uhci_timeout_task(void *); 158 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 159 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 160 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 161 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 162 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 163 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 164 Static void uhci_add_loop(uhci_softc_t *sc); 165 Static void uhci_rem_loop(uhci_softc_t *sc); 166 167 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 168 Static void uhci_device_isoc_enter(usbd_xfer_handle); 169 170 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 171 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 172 173 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 174 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 175 Static void uhci_get_locks(struct usbd_bus *, kmutex_t **, 176 kmutex_t **); 177 178 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 179 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 180 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 181 Static void uhci_device_ctrl_close(usbd_pipe_handle); 182 Static void uhci_device_ctrl_done(usbd_xfer_handle); 183 184 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 185 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 186 Static void uhci_device_intr_abort(usbd_xfer_handle); 187 Static void uhci_device_intr_close(usbd_pipe_handle); 188 Static void uhci_device_intr_done(usbd_xfer_handle); 189 190 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 191 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 192 Static void uhci_device_bulk_abort(usbd_xfer_handle); 193 Static void uhci_device_bulk_close(usbd_pipe_handle); 194 Static void uhci_device_bulk_done(usbd_xfer_handle); 195 196 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 197 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 198 Static void uhci_device_isoc_abort(usbd_xfer_handle); 199 Static void uhci_device_isoc_close(usbd_pipe_handle); 200 Static void uhci_device_isoc_done(usbd_xfer_handle); 201 202 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 203 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 204 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 205 Static void uhci_root_ctrl_close(usbd_pipe_handle); 206 Static void uhci_root_ctrl_done(usbd_xfer_handle); 207 208 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 209 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 210 Static void uhci_root_intr_abort(usbd_xfer_handle); 211 Static void uhci_root_intr_close(usbd_pipe_handle); 212 Static void uhci_root_intr_done(usbd_xfer_handle); 213 214 Static usbd_status uhci_open(usbd_pipe_handle); 215 Static void uhci_poll(struct usbd_bus *); 216 Static void uhci_softintr(void *); 217 218 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 219 220 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 221 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 222 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 223 struct uhci_pipe *pipe, int ival); 224 225 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 226 Static void uhci_noop(usbd_pipe_handle pipe); 227 228 static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 229 uhci_soft_qh_t *); 230 231 #ifdef UHCI_DEBUG 232 Static void uhci_dump_all(uhci_softc_t *); 233 Static void uhci_dumpregs(uhci_softc_t *); 234 Static void uhci_dump_qhs(uhci_soft_qh_t *); 235 Static void uhci_dump_qh(uhci_soft_qh_t *); 236 Static void uhci_dump_tds(uhci_soft_td_t *); 237 Static void uhci_dump_td(uhci_soft_td_t *); 238 Static void uhci_dump_ii(uhci_intr_info_t *ii); 239 void uhci_dump(void); 240 #endif 241 242 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 243 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 244 #define UWRITE1(sc, r, x) \ 245 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 246 } while (/*CONSTCOND*/0) 247 #define UWRITE2(sc, r, x) \ 248 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 249 } while (/*CONSTCOND*/0) 250 #define UWRITE4(sc, r, x) \ 251 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 252 } while (/*CONSTCOND*/0) 253 static __inline uint8_t 254 UREAD1(uhci_softc_t *sc, bus_size_t r) 255 { 256 257 UBARR(sc); 258 return bus_space_read_1(sc->iot, sc->ioh, r); 259 } 260 261 static __inline uint16_t 262 UREAD2(uhci_softc_t *sc, bus_size_t r) 263 { 264 265 UBARR(sc); 266 return bus_space_read_2(sc->iot, sc->ioh, r); 267 } 268 269 static __inline uint32_t 270 UREAD4(uhci_softc_t *sc, bus_size_t r) 271 { 272 273 UBARR(sc); 274 return bus_space_read_4(sc->iot, sc->ioh, r); 275 } 276 277 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 278 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 279 280 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 281 282 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 283 284 #define UHCI_INTR_ENDPT 1 285 286 const struct usbd_bus_methods uhci_bus_methods = { 287 uhci_open, 288 uhci_softintr, 289 uhci_poll, 290 uhci_allocm, 291 uhci_freem, 292 uhci_allocx, 293 uhci_freex, 294 uhci_get_locks, 295 }; 296 297 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 298 uhci_root_ctrl_transfer, 299 uhci_root_ctrl_start, 300 uhci_root_ctrl_abort, 301 uhci_root_ctrl_close, 302 uhci_noop, 303 uhci_root_ctrl_done, 304 }; 305 306 const struct usbd_pipe_methods uhci_root_intr_methods = { 307 uhci_root_intr_transfer, 308 uhci_root_intr_start, 309 uhci_root_intr_abort, 310 uhci_root_intr_close, 311 uhci_noop, 312 uhci_root_intr_done, 313 }; 314 315 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 316 uhci_device_ctrl_transfer, 317 uhci_device_ctrl_start, 318 uhci_device_ctrl_abort, 319 uhci_device_ctrl_close, 320 uhci_noop, 321 uhci_device_ctrl_done, 322 }; 323 324 const struct usbd_pipe_methods uhci_device_intr_methods = { 325 uhci_device_intr_transfer, 326 uhci_device_intr_start, 327 uhci_device_intr_abort, 328 uhci_device_intr_close, 329 uhci_device_clear_toggle, 330 uhci_device_intr_done, 331 }; 332 333 const struct usbd_pipe_methods uhci_device_bulk_methods = { 334 uhci_device_bulk_transfer, 335 uhci_device_bulk_start, 336 uhci_device_bulk_abort, 337 uhci_device_bulk_close, 338 uhci_device_clear_toggle, 339 uhci_device_bulk_done, 340 }; 341 342 const struct usbd_pipe_methods uhci_device_isoc_methods = { 343 uhci_device_isoc_transfer, 344 uhci_device_isoc_start, 345 uhci_device_isoc_abort, 346 uhci_device_isoc_close, 347 uhci_noop, 348 uhci_device_isoc_done, 349 }; 350 351 #define uhci_add_intr_info(sc, ii) \ 352 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 353 #define uhci_del_intr_info(ii) \ 354 do { \ 355 LIST_REMOVE((ii), list); \ 356 (ii)->list.le_prev = NULL; \ 357 } while (0) 358 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 359 360 static inline uhci_soft_qh_t * 361 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 362 { 363 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 364 365 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 366 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 367 usb_syncmem(&pqh->dma, 368 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 369 sizeof(pqh->qh.qh_hlink), 370 BUS_DMASYNC_POSTWRITE); 371 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 372 printf("uhci_find_prev_qh: QH not found\n"); 373 return (NULL); 374 } 375 #endif 376 } 377 return (pqh); 378 } 379 380 void 381 uhci_globalreset(uhci_softc_t *sc) 382 { 383 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 384 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 385 UHCICMD(sc, 0); /* do nothing */ 386 } 387 388 usbd_status 389 uhci_init(uhci_softc_t *sc) 390 { 391 usbd_status err; 392 int i, j; 393 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 394 uhci_soft_td_t *std; 395 396 DPRINTFN(1,("uhci_init: start\n")); 397 398 #ifdef UHCI_DEBUG 399 thesc = sc; 400 401 if (uhcidebug > 2) 402 uhci_dumpregs(sc); 403 #endif 404 405 sc->sc_suspend = PWR_RESUME; 406 407 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 408 uhci_globalreset(sc); /* reset the controller */ 409 uhci_reset(sc); 410 411 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 412 USB_MEM_RESERVE); 413 414 /* Allocate and initialize real frame array. */ 415 err = usb_allocmem(&sc->sc_bus, 416 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 417 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 418 if (err) 419 return (err); 420 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 421 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 422 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 423 424 /* 425 * Allocate a TD, inactive, that hangs from the last QH. 426 * This is to avoid a bug in the PIIX that makes it run berserk 427 * otherwise. 428 */ 429 std = uhci_alloc_std(sc); 430 if (std == NULL) 431 return (USBD_NOMEM); 432 std->link.std = NULL; 433 std->td.td_link = htole32(UHCI_PTR_T); 434 std->td.td_status = htole32(0); /* inactive */ 435 std->td.td_token = htole32(0); 436 std->td.td_buffer = htole32(0); 437 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 438 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 439 440 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 441 lsqh = uhci_alloc_sqh(sc); 442 if (lsqh == NULL) 443 return (USBD_NOMEM); 444 lsqh->hlink = NULL; 445 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 446 lsqh->elink = std; 447 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 448 sc->sc_last_qh = lsqh; 449 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 450 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 451 452 /* Allocate the dummy QH where bulk traffic will be queued. */ 453 bsqh = uhci_alloc_sqh(sc); 454 if (bsqh == NULL) 455 return (USBD_NOMEM); 456 bsqh->hlink = lsqh; 457 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 458 bsqh->elink = NULL; 459 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 460 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 461 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 462 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 463 464 /* Allocate dummy QH where high speed control traffic will be queued. */ 465 chsqh = uhci_alloc_sqh(sc); 466 if (chsqh == NULL) 467 return (USBD_NOMEM); 468 chsqh->hlink = bsqh; 469 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 470 chsqh->elink = NULL; 471 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 472 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 473 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 474 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 475 476 /* Allocate dummy QH where control traffic will be queued. */ 477 clsqh = uhci_alloc_sqh(sc); 478 if (clsqh == NULL) 479 return (USBD_NOMEM); 480 clsqh->hlink = chsqh; 481 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 482 clsqh->elink = NULL; 483 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 484 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 485 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 486 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 487 488 /* 489 * Make all (virtual) frame list pointers point to the interrupt 490 * queue heads and the interrupt queue heads at the control 491 * queue head and point the physical frame list to the virtual. 492 */ 493 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 494 std = uhci_alloc_std(sc); 495 sqh = uhci_alloc_sqh(sc); 496 if (std == NULL || sqh == NULL) 497 return (USBD_NOMEM); 498 std->link.sqh = sqh; 499 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 500 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 501 std->td.td_token = htole32(0); 502 std->td.td_buffer = htole32(0); 503 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 504 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 505 sqh->hlink = clsqh; 506 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 507 sqh->elink = NULL; 508 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 509 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 510 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 511 sc->sc_vframes[i].htd = std; 512 sc->sc_vframes[i].etd = std; 513 sc->sc_vframes[i].hqh = sqh; 514 sc->sc_vframes[i].eqh = sqh; 515 for (j = i; 516 j < UHCI_FRAMELIST_COUNT; 517 j += UHCI_VFRAMELIST_COUNT) 518 sc->sc_pframes[j] = htole32(std->physaddr); 519 } 520 usb_syncmem(&sc->sc_dma, 0, 521 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 522 BUS_DMASYNC_PREWRITE); 523 524 525 LIST_INIT(&sc->sc_intrhead); 526 527 SIMPLEQ_INIT(&sc->sc_free_xfers); 528 529 callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE); 530 531 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 532 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 533 cv_init(&sc->sc_softwake_cv, "uhciab"); 534 535 /* Set up the bus struct. */ 536 sc->sc_bus.methods = &uhci_bus_methods; 537 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 538 539 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 540 541 DPRINTFN(1,("uhci_init: enabling\n")); 542 543 err = uhci_run(sc, 1); /* and here we go... */ 544 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 545 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 546 return err; 547 } 548 549 int 550 uhci_activate(device_t self, enum devact act) 551 { 552 struct uhci_softc *sc = device_private(self); 553 554 switch (act) { 555 case DVACT_DEACTIVATE: 556 sc->sc_dying = 1; 557 return 0; 558 default: 559 return EOPNOTSUPP; 560 } 561 } 562 563 void 564 uhci_childdet(device_t self, device_t child) 565 { 566 struct uhci_softc *sc = device_private(self); 567 568 KASSERT(sc->sc_child == child); 569 sc->sc_child = NULL; 570 } 571 572 int 573 uhci_detach(struct uhci_softc *sc, int flags) 574 { 575 usbd_xfer_handle xfer; 576 int rv = 0; 577 578 if (sc->sc_child != NULL) 579 rv = config_detach(sc->sc_child, flags); 580 581 if (rv != 0) 582 return (rv); 583 584 /* Free all xfers associated with this HC. */ 585 for (;;) { 586 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 587 if (xfer == NULL) 588 break; 589 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 590 kmem_free(xfer, sizeof(struct uhci_xfer)); 591 } 592 593 callout_halt(&sc->sc_poll_handle, NULL); 594 callout_destroy(&sc->sc_poll_handle); 595 596 cv_destroy(&sc->sc_softwake_cv); 597 598 mutex_destroy(&sc->sc_lock); 599 mutex_destroy(&sc->sc_intr_lock); 600 601 /* XXX free other data structures XXX */ 602 603 return (rv); 604 } 605 606 usbd_status 607 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 608 { 609 struct uhci_softc *sc = bus->hci_private; 610 usbd_status status; 611 u_int32_t n; 612 613 /* 614 * XXX 615 * Since we are allocating a buffer we can assume that we will 616 * need TDs for it. Since we don't want to allocate those from 617 * an interrupt context, we allocate them here and free them again. 618 * This is no guarantee that we'll get the TDs next time... 619 */ 620 n = size / 8; 621 if (n > 16) { 622 u_int32_t i; 623 uhci_soft_td_t **stds; 624 625 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 626 stds = kmem_alloc(sizeof(uhci_soft_td_t *) * n, KM_SLEEP); 627 if (!stds) 628 return USBD_NOMEM; 629 for(i = 0; i < n; i++) 630 stds[i] = uhci_alloc_std(sc); 631 for(i = 0; i < n; i++) 632 if (stds[i] != NULL) 633 uhci_free_std(sc, stds[i]); 634 kmem_free(stds, sizeof(uhci_soft_td_t *) * n); 635 } 636 637 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 638 if (status == USBD_NOMEM) 639 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 640 return status; 641 } 642 643 void 644 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 645 { 646 if (dma->block->flags & USB_DMA_RESERVE) { 647 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 648 dma); 649 return; 650 } 651 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 652 } 653 654 usbd_xfer_handle 655 uhci_allocx(struct usbd_bus *bus) 656 { 657 struct uhci_softc *sc = bus->hci_private; 658 usbd_xfer_handle xfer; 659 660 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 661 if (xfer != NULL) { 662 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 663 #ifdef DIAGNOSTIC 664 if (xfer->busy_free != XFER_FREE) { 665 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 666 xfer->busy_free); 667 } 668 #endif 669 } else { 670 xfer = kmem_alloc(sizeof(struct uhci_xfer), KM_SLEEP); 671 } 672 if (xfer != NULL) { 673 memset(xfer, 0, sizeof (struct uhci_xfer)); 674 UXFER(xfer)->iinfo.sc = sc; 675 #ifdef DIAGNOSTIC 676 UXFER(xfer)->iinfo.isdone = 1; 677 xfer->busy_free = XFER_BUSY; 678 #endif 679 } 680 return (xfer); 681 } 682 683 void 684 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 685 { 686 struct uhci_softc *sc = bus->hci_private; 687 688 #ifdef DIAGNOSTIC 689 if (xfer->busy_free != XFER_BUSY) { 690 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 691 xfer->busy_free); 692 } 693 xfer->busy_free = XFER_FREE; 694 if (!UXFER(xfer)->iinfo.isdone) { 695 printf("uhci_freex: !isdone\n"); 696 } 697 #endif 698 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 699 } 700 701 Static void 702 uhci_get_locks(struct usbd_bus *bus, kmutex_t **intr, kmutex_t **thread) 703 { 704 struct uhci_softc *sc = bus->hci_private; 705 706 *intr = &sc->sc_intr_lock; 707 *thread = &sc->sc_lock; 708 } 709 710 711 /* 712 * Handle suspend/resume. 713 * 714 * We need to switch to polling mode here, because this routine is 715 * called from an interrupt context. This is all right since we 716 * are almost suspended anyway. 717 */ 718 bool 719 uhci_resume(device_t dv, const pmf_qual_t *qual) 720 { 721 uhci_softc_t *sc = device_private(dv); 722 int cmd; 723 724 mutex_spin_enter(&sc->sc_intr_lock); 725 726 cmd = UREAD2(sc, UHCI_CMD); 727 sc->sc_bus.use_polling++; 728 UWRITE2(sc, UHCI_INTR, 0); 729 uhci_globalreset(sc); 730 uhci_reset(sc); 731 if (cmd & UHCI_CMD_RS) 732 uhci_run(sc, 0); 733 734 /* restore saved state */ 735 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 736 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 737 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 738 739 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 740 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 741 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 742 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 743 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 744 UHCICMD(sc, UHCI_CMD_MAXP); 745 uhci_run(sc, 1); /* and start traffic again */ 746 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 747 sc->sc_bus.use_polling--; 748 if (sc->sc_intr_xfer != NULL) 749 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 750 sc->sc_intr_xfer); 751 #ifdef UHCI_DEBUG 752 if (uhcidebug > 2) 753 uhci_dumpregs(sc); 754 #endif 755 756 sc->sc_suspend = PWR_RESUME; 757 mutex_spin_exit(&sc->sc_intr_lock); 758 759 return true; 760 } 761 762 bool 763 uhci_suspend(device_t dv, const pmf_qual_t *qual) 764 { 765 uhci_softc_t *sc = device_private(dv); 766 int cmd; 767 768 mutex_spin_enter(&sc->sc_intr_lock); 769 770 cmd = UREAD2(sc, UHCI_CMD); 771 772 #ifdef UHCI_DEBUG 773 if (uhcidebug > 2) 774 uhci_dumpregs(sc); 775 #endif 776 if (sc->sc_intr_xfer != NULL) 777 callout_stop(&sc->sc_poll_handle); 778 sc->sc_suspend = PWR_SUSPEND; 779 sc->sc_bus.use_polling++; 780 781 uhci_run(sc, 0); /* stop the controller */ 782 cmd &= ~UHCI_CMD_RS; 783 784 /* save some state if BIOS doesn't */ 785 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 786 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 787 788 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 789 790 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 791 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 792 sc->sc_bus.use_polling--; 793 794 mutex_spin_exit(&sc->sc_intr_lock); 795 796 return true; 797 } 798 799 #ifdef UHCI_DEBUG 800 Static void 801 uhci_dumpregs(uhci_softc_t *sc) 802 { 803 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 804 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 805 device_xname(sc->sc_dev), 806 UREAD2(sc, UHCI_CMD), 807 UREAD2(sc, UHCI_STS), 808 UREAD2(sc, UHCI_INTR), 809 UREAD2(sc, UHCI_FRNUM), 810 UREAD4(sc, UHCI_FLBASEADDR), 811 UREAD1(sc, UHCI_SOF), 812 UREAD2(sc, UHCI_PORTSC1), 813 UREAD2(sc, UHCI_PORTSC2))); 814 } 815 816 void 817 uhci_dump_td(uhci_soft_td_t *p) 818 { 819 char sbuf[128], sbuf2[128]; 820 821 822 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 823 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 824 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 825 "token=0x%08lx buffer=0x%08lx\n", 826 p, (long)p->physaddr, 827 (long)le32toh(p->td.td_link), 828 (long)le32toh(p->td.td_status), 829 (long)le32toh(p->td.td_token), 830 (long)le32toh(p->td.td_buffer))); 831 832 snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF", 833 (u_int32_t)le32toh(p->td.td_link)); 834 snprintb(sbuf2, sizeof(sbuf2), 835 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 836 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 837 (u_int32_t)le32toh(p->td.td_status)); 838 839 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 840 "D=%d,maxlen=%d\n", sbuf, sbuf2, 841 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 842 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 843 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 844 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 845 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 846 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 847 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 848 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 849 BUS_DMASYNC_PREREAD); 850 } 851 852 void 853 uhci_dump_qh(uhci_soft_qh_t *sqh) 854 { 855 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 856 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 857 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 858 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 859 le32toh(sqh->qh.qh_elink))); 860 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 861 } 862 863 864 #if 1 865 void 866 uhci_dump(void) 867 { 868 uhci_dump_all(thesc); 869 } 870 #endif 871 872 void 873 uhci_dump_all(uhci_softc_t *sc) 874 { 875 uhci_dumpregs(sc); 876 printf("intrs=%d\n", sc->sc_bus.no_intrs); 877 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 878 uhci_dump_qh(sc->sc_lctl_start); 879 } 880 881 882 void 883 uhci_dump_qhs(uhci_soft_qh_t *sqh) 884 { 885 uhci_dump_qh(sqh); 886 887 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 888 * Traverses sideways first, then down. 889 * 890 * QH1 891 * QH2 892 * No QH 893 * TD2.1 894 * TD2.2 895 * TD1.1 896 * etc. 897 * 898 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 899 */ 900 901 902 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 903 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 904 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 905 uhci_dump_qhs(sqh->hlink); 906 else 907 DPRINTF(("No QH\n")); 908 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 909 910 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 911 uhci_dump_tds(sqh->elink); 912 else 913 DPRINTF(("No TD\n")); 914 } 915 916 void 917 uhci_dump_tds(uhci_soft_td_t *std) 918 { 919 uhci_soft_td_t *td; 920 int stop; 921 922 for(td = std; td != NULL; td = td->link.std) { 923 uhci_dump_td(td); 924 925 /* Check whether the link pointer in this TD marks 926 * the link pointer as end of queue. This avoids 927 * printing the free list in case the queue/TD has 928 * already been moved there (seatbelt). 929 */ 930 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 931 sizeof(td->td.td_link), 932 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 933 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 934 le32toh(td->td.td_link) == 0); 935 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 936 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 937 if (stop) 938 break; 939 } 940 } 941 942 Static void 943 uhci_dump_ii(uhci_intr_info_t *ii) 944 { 945 usbd_pipe_handle pipe; 946 usb_endpoint_descriptor_t *ed; 947 usbd_device_handle dev; 948 949 #ifdef DIAGNOSTIC 950 #define DONE ii->isdone 951 #else 952 #define DONE 0 953 #endif 954 if (ii == NULL) { 955 printf("ii NULL\n"); 956 return; 957 } 958 if (ii->xfer == NULL) { 959 printf("ii %p: done=%d xfer=NULL\n", 960 ii, DONE); 961 return; 962 } 963 pipe = ii->xfer->pipe; 964 if (pipe == NULL) { 965 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 966 ii, DONE, ii->xfer); 967 return; 968 } 969 if (pipe->endpoint == NULL) { 970 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 971 ii, DONE, ii->xfer, pipe); 972 return; 973 } 974 if (pipe->device == NULL) { 975 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 976 ii, DONE, ii->xfer, pipe); 977 return; 978 } 979 ed = pipe->endpoint->edesc; 980 dev = pipe->device; 981 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 982 ii, DONE, ii->xfer, dev, 983 UGETW(dev->ddesc.idVendor), 984 UGETW(dev->ddesc.idProduct), 985 dev->address, pipe, 986 ed->bEndpointAddress, ed->bmAttributes); 987 #undef DONE 988 } 989 990 void uhci_dump_iis(struct uhci_softc *sc); 991 void 992 uhci_dump_iis(struct uhci_softc *sc) 993 { 994 uhci_intr_info_t *ii; 995 996 printf("intr_info list:\n"); 997 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 998 uhci_dump_ii(ii); 999 } 1000 1001 void iidump(void); 1002 void iidump(void) { uhci_dump_iis(thesc); } 1003 1004 #endif 1005 1006 /* 1007 * This routine is executed periodically and simulates interrupts 1008 * from the root controller interrupt pipe for port status change. 1009 */ 1010 void 1011 uhci_poll_hub(void *addr) 1012 { 1013 usbd_xfer_handle xfer = addr; 1014 usbd_pipe_handle pipe = xfer->pipe; 1015 uhci_softc_t *sc; 1016 u_char *p; 1017 1018 DPRINTFN(20, ("uhci_poll_hub\n")); 1019 1020 if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL)) 1021 return; /* device has detached */ 1022 sc = pipe->device->bus->hci_private; 1023 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1024 1025 p = KERNADDR(&xfer->dmabuf, 0); 1026 p[0] = 0; 1027 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1028 p[0] |= 1<<1; 1029 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1030 p[0] |= 1<<2; 1031 if (p[0] == 0) 1032 /* No change, try again in a while */ 1033 return; 1034 1035 xfer->actlen = 1; 1036 xfer->status = USBD_NORMAL_COMPLETION; 1037 mutex_enter(&sc->sc_lock); 1038 xfer->device->bus->intr_context++; 1039 usb_transfer_complete(xfer); 1040 xfer->device->bus->intr_context--; 1041 mutex_exit(&sc->sc_lock); 1042 } 1043 1044 void 1045 uhci_root_intr_done(usbd_xfer_handle xfer) 1046 { 1047 } 1048 1049 void 1050 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1051 { 1052 } 1053 1054 /* 1055 * Let the last QH loop back to the high speed control transfer QH. 1056 * This is what intel calls "bandwidth reclamation" and improves 1057 * USB performance a lot for some devices. 1058 * If we are already looping, just count it. 1059 */ 1060 void 1061 uhci_add_loop(uhci_softc_t *sc) { 1062 #ifdef UHCI_DEBUG 1063 if (uhcinoloop) 1064 return; 1065 #endif 1066 if (++sc->sc_loops == 1) { 1067 DPRINTFN(5,("uhci_start_loop: add\n")); 1068 /* Note, we don't loop back the soft pointer. */ 1069 sc->sc_last_qh->qh.qh_hlink = 1070 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1071 usb_syncmem(&sc->sc_last_qh->dma, 1072 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1073 sizeof(sc->sc_last_qh->qh.qh_hlink), 1074 BUS_DMASYNC_PREWRITE); 1075 } 1076 } 1077 1078 void 1079 uhci_rem_loop(uhci_softc_t *sc) { 1080 #ifdef UHCI_DEBUG 1081 if (uhcinoloop) 1082 return; 1083 #endif 1084 if (--sc->sc_loops == 0) { 1085 DPRINTFN(5,("uhci_end_loop: remove\n")); 1086 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1087 usb_syncmem(&sc->sc_last_qh->dma, 1088 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1089 sizeof(sc->sc_last_qh->qh.qh_hlink), 1090 BUS_DMASYNC_PREWRITE); 1091 } 1092 } 1093 1094 /* Add high speed control QH, called at splusb(). */ 1095 void 1096 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1097 { 1098 uhci_soft_qh_t *eqh; 1099 1100 SPLUSBCHECK; 1101 1102 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1103 eqh = sc->sc_hctl_end; 1104 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1105 sizeof(eqh->qh.qh_hlink), 1106 BUS_DMASYNC_POSTWRITE); 1107 sqh->hlink = eqh->hlink; 1108 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1109 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1110 BUS_DMASYNC_PREWRITE); 1111 eqh->hlink = sqh; 1112 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1113 sc->sc_hctl_end = sqh; 1114 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1115 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1116 #ifdef UHCI_CTL_LOOP 1117 uhci_add_loop(sc); 1118 #endif 1119 } 1120 1121 /* Remove high speed control QH, called at splusb(). */ 1122 void 1123 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1124 { 1125 uhci_soft_qh_t *pqh; 1126 1127 SPLUSBCHECK; 1128 1129 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1130 #ifdef UHCI_CTL_LOOP 1131 uhci_rem_loop(sc); 1132 #endif 1133 /* 1134 * The T bit should be set in the elink of the QH so that the HC 1135 * doesn't follow the pointer. This condition may fail if the 1136 * the transferred packet was short so that the QH still points 1137 * at the last used TD. 1138 * In this case we set the T bit and wait a little for the HC 1139 * to stop looking at the TD. 1140 * Note that if the TD chain is large enough, the controller 1141 * may still be looking at the chain at the end of this function. 1142 * uhci_free_std_chain() will make sure the controller stops 1143 * looking at it quickly, but until then we should not change 1144 * sqh->hlink. 1145 */ 1146 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1147 sizeof(sqh->qh.qh_elink), 1148 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1149 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1150 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1151 usb_syncmem(&sqh->dma, 1152 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1153 sizeof(sqh->qh.qh_elink), 1154 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1155 delay(UHCI_QH_REMOVE_DELAY); 1156 } 1157 1158 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1159 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1160 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1161 pqh->hlink = sqh->hlink; 1162 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1163 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1164 sizeof(pqh->qh.qh_hlink), 1165 BUS_DMASYNC_PREWRITE); 1166 delay(UHCI_QH_REMOVE_DELAY); 1167 if (sc->sc_hctl_end == sqh) 1168 sc->sc_hctl_end = pqh; 1169 } 1170 1171 /* Add low speed control QH, called at splusb(). */ 1172 void 1173 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1174 { 1175 uhci_soft_qh_t *eqh; 1176 1177 SPLUSBCHECK; 1178 1179 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1180 eqh = sc->sc_lctl_end; 1181 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1182 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1183 sqh->hlink = eqh->hlink; 1184 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1185 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1186 BUS_DMASYNC_PREWRITE); 1187 eqh->hlink = sqh; 1188 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1189 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1190 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1191 sc->sc_lctl_end = sqh; 1192 } 1193 1194 /* Remove low speed control QH, called at splusb(). */ 1195 void 1196 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1197 { 1198 uhci_soft_qh_t *pqh; 1199 1200 SPLUSBCHECK; 1201 1202 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1203 /* See comment in uhci_remove_hs_ctrl() */ 1204 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1205 sizeof(sqh->qh.qh_elink), 1206 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1207 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1208 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1209 usb_syncmem(&sqh->dma, 1210 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1211 sizeof(sqh->qh.qh_elink), 1212 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1213 delay(UHCI_QH_REMOVE_DELAY); 1214 } 1215 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1216 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1217 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1218 pqh->hlink = sqh->hlink; 1219 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1220 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1221 sizeof(pqh->qh.qh_hlink), 1222 BUS_DMASYNC_PREWRITE); 1223 delay(UHCI_QH_REMOVE_DELAY); 1224 if (sc->sc_lctl_end == sqh) 1225 sc->sc_lctl_end = pqh; 1226 } 1227 1228 /* Add bulk QH, called at splusb(). */ 1229 void 1230 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1231 { 1232 uhci_soft_qh_t *eqh; 1233 1234 SPLUSBCHECK; 1235 1236 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1237 eqh = sc->sc_bulk_end; 1238 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1239 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1240 sqh->hlink = eqh->hlink; 1241 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1242 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1243 BUS_DMASYNC_PREWRITE); 1244 eqh->hlink = sqh; 1245 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1246 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1247 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1248 sc->sc_bulk_end = sqh; 1249 uhci_add_loop(sc); 1250 } 1251 1252 /* Remove bulk QH, called at splusb(). */ 1253 void 1254 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1255 { 1256 uhci_soft_qh_t *pqh; 1257 1258 SPLUSBCHECK; 1259 1260 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1261 uhci_rem_loop(sc); 1262 /* See comment in uhci_remove_hs_ctrl() */ 1263 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1264 sizeof(sqh->qh.qh_elink), 1265 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1266 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1267 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1268 usb_syncmem(&sqh->dma, 1269 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1270 sizeof(sqh->qh.qh_elink), 1271 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1272 delay(UHCI_QH_REMOVE_DELAY); 1273 } 1274 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1275 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1276 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1277 pqh->hlink = sqh->hlink; 1278 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1279 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1280 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1281 delay(UHCI_QH_REMOVE_DELAY); 1282 if (sc->sc_bulk_end == sqh) 1283 sc->sc_bulk_end = pqh; 1284 } 1285 1286 Static int uhci_intr1(uhci_softc_t *); 1287 1288 int 1289 uhci_intr(void *arg) 1290 { 1291 uhci_softc_t *sc = arg; 1292 int ret = 0; 1293 1294 mutex_spin_enter(&sc->sc_intr_lock); 1295 1296 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1297 goto done; 1298 1299 if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) { 1300 #ifdef DIAGNOSTIC 1301 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1302 #endif 1303 goto done; 1304 } 1305 1306 ret = uhci_intr1(sc); 1307 1308 done: 1309 mutex_spin_exit(&sc->sc_intr_lock); 1310 return ret; 1311 } 1312 1313 int 1314 uhci_intr1(uhci_softc_t *sc) 1315 { 1316 int status; 1317 int ack; 1318 1319 #ifdef UHCI_DEBUG 1320 if (uhcidebug > 15) { 1321 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1322 uhci_dumpregs(sc); 1323 } 1324 #endif 1325 1326 KASSERT(mutex_owned(&sc->sc_lock)); 1327 1328 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1329 if (status == 0) /* The interrupt was not for us. */ 1330 return (0); 1331 1332 if (sc->sc_suspend != PWR_RESUME) { 1333 #ifdef DIAGNOSTIC 1334 printf("%s: interrupt while not operating ignored\n", 1335 device_xname(sc->sc_dev)); 1336 #endif 1337 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1338 return (0); 1339 } 1340 1341 ack = 0; 1342 if (status & UHCI_STS_USBINT) 1343 ack |= UHCI_STS_USBINT; 1344 if (status & UHCI_STS_USBEI) 1345 ack |= UHCI_STS_USBEI; 1346 if (status & UHCI_STS_RD) { 1347 ack |= UHCI_STS_RD; 1348 #ifdef UHCI_DEBUG 1349 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1350 #endif 1351 } 1352 if (status & UHCI_STS_HSE) { 1353 ack |= UHCI_STS_HSE; 1354 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1355 } 1356 if (status & UHCI_STS_HCPE) { 1357 ack |= UHCI_STS_HCPE; 1358 printf("%s: host controller process error\n", 1359 device_xname(sc->sc_dev)); 1360 } 1361 1362 /* When HCHalted=1 and Run/Stop=0 , it is normal */ 1363 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) { 1364 /* no acknowledge needed */ 1365 if (!sc->sc_dying) { 1366 printf("%s: host controller halted\n", 1367 device_xname(sc->sc_dev)); 1368 #ifdef UHCI_DEBUG 1369 uhci_dump_all(sc); 1370 #endif 1371 } 1372 sc->sc_dying = 1; 1373 } 1374 1375 if (!ack) 1376 return (0); /* nothing to acknowledge */ 1377 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1378 1379 sc->sc_bus.no_intrs++; 1380 usb_schedsoftintr(&sc->sc_bus); 1381 1382 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1383 1384 return (1); 1385 } 1386 1387 void 1388 uhci_softintr(void *v) 1389 { 1390 struct usbd_bus *bus = v; 1391 uhci_softc_t *sc = bus->hci_private; 1392 uhci_intr_info_t *ii, *nextii; 1393 1394 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev), 1395 sc->sc_bus.intr_context)); 1396 1397 mutex_enter(&sc->sc_lock); 1398 1399 sc->sc_bus.intr_context++; 1400 1401 /* 1402 * Interrupts on UHCI really suck. When the host controller 1403 * interrupts because a transfer is completed there is no 1404 * way of knowing which transfer it was. You can scan down 1405 * the TDs and QHs of the previous frame to limit the search, 1406 * but that assumes that the interrupt was not delayed by more 1407 * than 1 ms, which may not always be true (e.g. after debug 1408 * output on a slow console). 1409 * We scan all interrupt descriptors to see if any have 1410 * completed. 1411 */ 1412 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1413 nextii = LIST_NEXT(ii, list); 1414 uhci_check_intr(sc, ii); 1415 } 1416 1417 if (sc->sc_softwake) { 1418 sc->sc_softwake = 0; 1419 cv_broadcast(&sc->sc_softwake_cv); 1420 } 1421 1422 sc->sc_bus.intr_context--; 1423 1424 mutex_exit(&sc->sc_lock); 1425 } 1426 1427 /* Check for an interrupt. */ 1428 void 1429 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1430 { 1431 uhci_soft_td_t *std, *lstd; 1432 u_int32_t status; 1433 1434 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1435 #ifdef DIAGNOSTIC 1436 if (ii == NULL) { 1437 printf("uhci_check_intr: no ii? %p\n", ii); 1438 return; 1439 } 1440 #endif 1441 if (ii->xfer->status == USBD_CANCELLED || 1442 ii->xfer->status == USBD_TIMEOUT) { 1443 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1444 return; 1445 } 1446 1447 if (ii->stdstart == NULL) 1448 return; 1449 lstd = ii->stdend; 1450 #ifdef DIAGNOSTIC 1451 if (lstd == NULL) { 1452 printf("uhci_check_intr: std==0\n"); 1453 return; 1454 } 1455 #endif 1456 /* 1457 * If the last TD is still active we need to check whether there 1458 * is an error somewhere in the middle, or whether there was a 1459 * short packet (SPD and not ACTIVE). 1460 */ 1461 usb_syncmem(&lstd->dma, 1462 lstd->offs + offsetof(uhci_td_t, td_status), 1463 sizeof(lstd->td.td_status), 1464 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1465 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1466 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1467 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1468 usb_syncmem(&std->dma, 1469 std->offs + offsetof(uhci_td_t, td_status), 1470 sizeof(std->td.td_status), 1471 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1472 status = le32toh(std->td.td_status); 1473 usb_syncmem(&std->dma, 1474 std->offs + offsetof(uhci_td_t, td_status), 1475 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1476 /* If there's an active TD the xfer isn't done. */ 1477 if (status & UHCI_TD_ACTIVE) 1478 break; 1479 /* Any kind of error makes the xfer done. */ 1480 if (status & UHCI_TD_STALLED) 1481 goto done; 1482 /* We want short packets, and it is short: it's done */ 1483 usb_syncmem(&std->dma, 1484 std->offs + offsetof(uhci_td_t, td_token), 1485 sizeof(std->td.td_token), 1486 BUS_DMASYNC_POSTWRITE); 1487 if ((status & UHCI_TD_SPD) && 1488 UHCI_TD_GET_ACTLEN(status) < 1489 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1490 goto done; 1491 } 1492 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1493 ii, ii->stdstart)); 1494 usb_syncmem(&lstd->dma, 1495 lstd->offs + offsetof(uhci_td_t, td_status), 1496 sizeof(lstd->td.td_status), 1497 BUS_DMASYNC_PREREAD); 1498 return; 1499 } 1500 done: 1501 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1502 callout_stop(&ii->xfer->timeout_handle); 1503 uhci_idone(ii); 1504 } 1505 1506 /* Called at splusb() */ 1507 void 1508 uhci_idone(uhci_intr_info_t *ii) 1509 { 1510 usbd_xfer_handle xfer = ii->xfer; 1511 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1512 uhci_soft_td_t *std; 1513 u_int32_t status = 0, nstatus; 1514 int actlen; 1515 1516 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1517 #ifdef DIAGNOSTIC 1518 { 1519 /* XXX SMP? */ 1520 int s = splhigh(); 1521 if (ii->isdone) { 1522 splx(s); 1523 #ifdef UHCI_DEBUG 1524 printf("uhci_idone: ii is done!\n "); 1525 uhci_dump_ii(ii); 1526 #else 1527 printf("uhci_idone: ii=%p is done!\n", ii); 1528 #endif 1529 return; 1530 } 1531 ii->isdone = 1; 1532 splx(s); 1533 } 1534 #endif 1535 1536 if (xfer->nframes != 0) { 1537 /* Isoc transfer, do things differently. */ 1538 uhci_soft_td_t **stds = upipe->u.iso.stds; 1539 int i, n, nframes, len; 1540 1541 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1542 1543 nframes = xfer->nframes; 1544 actlen = 0; 1545 n = UXFER(xfer)->curframe; 1546 for (i = 0; i < nframes; i++) { 1547 std = stds[n]; 1548 #ifdef UHCI_DEBUG 1549 if (uhcidebug > 5) { 1550 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1551 uhci_dump_td(std); 1552 } 1553 #endif 1554 if (++n >= UHCI_VFRAMELIST_COUNT) 1555 n = 0; 1556 usb_syncmem(&std->dma, 1557 std->offs + offsetof(uhci_td_t, td_status), 1558 sizeof(std->td.td_status), 1559 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1560 status = le32toh(std->td.td_status); 1561 len = UHCI_TD_GET_ACTLEN(status); 1562 xfer->frlengths[i] = len; 1563 actlen += len; 1564 } 1565 upipe->u.iso.inuse -= nframes; 1566 xfer->actlen = actlen; 1567 xfer->status = USBD_NORMAL_COMPLETION; 1568 goto end; 1569 } 1570 1571 #ifdef UHCI_DEBUG 1572 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1573 ii, xfer, upipe)); 1574 if (uhcidebug > 10) 1575 uhci_dump_tds(ii->stdstart); 1576 #endif 1577 1578 /* The transfer is done, compute actual length and status. */ 1579 actlen = 0; 1580 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1581 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1582 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1583 nstatus = le32toh(std->td.td_status); 1584 if (nstatus & UHCI_TD_ACTIVE) 1585 break; 1586 1587 status = nstatus; 1588 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1589 UHCI_TD_PID_SETUP) 1590 actlen += UHCI_TD_GET_ACTLEN(status); 1591 else { 1592 /* 1593 * UHCI will report CRCTO in addition to a STALL or NAK 1594 * for a SETUP transaction. See section 3.2.2, "TD 1595 * CONTROL AND STATUS". 1596 */ 1597 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1598 status &= ~UHCI_TD_CRCTO; 1599 } 1600 } 1601 /* If there are left over TDs we need to update the toggle. */ 1602 if (std != NULL) 1603 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1604 1605 status &= UHCI_TD_ERROR; 1606 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1607 actlen, status)); 1608 xfer->actlen = actlen; 1609 if (status != 0) { 1610 #ifdef UHCI_DEBUG 1611 char sbuf[128]; 1612 1613 snprintb(sbuf, sizeof(sbuf), 1614 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1615 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status); 1616 1617 DPRINTFN((status == UHCI_TD_STALLED)*10, 1618 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1619 "status 0x%s\n", 1620 xfer->pipe->device->address, 1621 xfer->pipe->endpoint->edesc->bEndpointAddress, 1622 sbuf)); 1623 #endif 1624 1625 if (status == UHCI_TD_STALLED) 1626 xfer->status = USBD_STALLED; 1627 else 1628 xfer->status = USBD_IOERROR; /* more info XXX */ 1629 } else { 1630 xfer->status = USBD_NORMAL_COMPLETION; 1631 } 1632 1633 end: 1634 usb_transfer_complete(xfer); 1635 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1636 } 1637 1638 /* 1639 * Called when a request does not complete. 1640 */ 1641 void 1642 uhci_timeout(void *addr) 1643 { 1644 uhci_intr_info_t *ii = addr; 1645 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1646 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1647 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1648 1649 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1650 1651 if (sc->sc_dying) { 1652 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1653 return; 1654 } 1655 1656 /* Execute the abort in a process context. */ 1657 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1658 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1659 USB_TASKQ_HC); 1660 } 1661 1662 void 1663 uhci_timeout_task(void *addr) 1664 { 1665 usbd_xfer_handle xfer = addr; 1666 1667 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1668 1669 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1670 } 1671 1672 /* 1673 * Wait here until controller claims to have an interrupt. 1674 * Then call uhci_intr and return. Use timeout to avoid waiting 1675 * too long. 1676 * Only used during boot when interrupts are not enabled yet. 1677 */ 1678 void 1679 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1680 { 1681 int timo = xfer->timeout; 1682 uhci_intr_info_t *ii; 1683 1684 mutex_enter(&sc->sc_lock); 1685 1686 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1687 1688 xfer->status = USBD_IN_PROGRESS; 1689 for (; timo >= 0; timo--) { 1690 usb_delay_ms(&sc->sc_bus, 1); 1691 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1692 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1693 mutex_spin_enter(&sc->sc_intr_lock); 1694 uhci_intr1(sc); 1695 mutex_spin_exit(&sc->sc_intr_lock); 1696 if (xfer->status != USBD_IN_PROGRESS) 1697 goto done; 1698 } 1699 } 1700 1701 /* Timeout */ 1702 DPRINTF(("uhci_waitintr: timeout\n")); 1703 for (ii = LIST_FIRST(&sc->sc_intrhead); 1704 ii != NULL && ii->xfer != xfer; 1705 ii = LIST_NEXT(ii, list)) 1706 ; 1707 #ifdef DIAGNOSTIC 1708 if (ii == NULL) 1709 panic("uhci_waitintr: lost intr_info"); 1710 #endif 1711 uhci_idone(ii); 1712 1713 done: 1714 mutex_exit(&sc->sc_lock); 1715 } 1716 1717 void 1718 uhci_poll(struct usbd_bus *bus) 1719 { 1720 uhci_softc_t *sc = bus->hci_private; 1721 1722 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1723 mutex_spin_enter(&sc->sc_intr_lock); 1724 uhci_intr1(sc); 1725 mutex_spin_exit(&sc->sc_intr_lock); 1726 } 1727 } 1728 1729 void 1730 uhci_reset(uhci_softc_t *sc) 1731 { 1732 int n; 1733 1734 UHCICMD(sc, UHCI_CMD_HCRESET); 1735 /* The reset bit goes low when the controller is done. */ 1736 for (n = 0; n < UHCI_RESET_TIMEOUT && 1737 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1738 usb_delay_ms(&sc->sc_bus, 1); 1739 if (n >= UHCI_RESET_TIMEOUT) 1740 printf("%s: controller did not reset\n", 1741 device_xname(sc->sc_dev)); 1742 } 1743 1744 usbd_status 1745 uhci_run(uhci_softc_t *sc, int run) 1746 { 1747 int n, running; 1748 u_int16_t cmd; 1749 1750 run = run != 0; 1751 mutex_spin_enter(&sc->sc_intr_lock); 1752 DPRINTF(("uhci_run: setting run=%d\n", run)); 1753 cmd = UREAD2(sc, UHCI_CMD); 1754 if (run) 1755 cmd |= UHCI_CMD_RS; 1756 else 1757 cmd &= ~UHCI_CMD_RS; 1758 UHCICMD(sc, cmd); 1759 for(n = 0; n < 10; n++) { 1760 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1761 /* return when we've entered the state we want */ 1762 if (run == running) { 1763 mutex_spin_exit(&sc->sc_intr_lock); 1764 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1765 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1766 return (USBD_NORMAL_COMPLETION); 1767 } 1768 usb_delay_ms(&sc->sc_bus, 1); 1769 } 1770 mutex_spin_exit(&sc->sc_intr_lock); 1771 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1772 run ? "start" : "stop"); 1773 return (USBD_IOERROR); 1774 } 1775 1776 /* 1777 * Memory management routines. 1778 * uhci_alloc_std allocates TDs 1779 * uhci_alloc_sqh allocates QHs 1780 * These two routines do their own free list management, 1781 * partly for speed, partly because allocating DMAable memory 1782 * has page size granularaity so much memory would be wasted if 1783 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1784 */ 1785 1786 uhci_soft_td_t * 1787 uhci_alloc_std(uhci_softc_t *sc) 1788 { 1789 uhci_soft_td_t *std; 1790 usbd_status err; 1791 int i, offs; 1792 usb_dma_t dma; 1793 1794 if (sc->sc_freetds == NULL) { 1795 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1796 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1797 UHCI_TD_ALIGN, &dma); 1798 if (err) 1799 return (0); 1800 for (i = 0; i < UHCI_STD_CHUNK; i++) { 1801 offs = i * UHCI_STD_SIZE; 1802 std = KERNADDR(&dma, offs); 1803 std->physaddr = DMAADDR(&dma, offs); 1804 std->dma = dma; 1805 std->offs = offs; 1806 std->link.std = sc->sc_freetds; 1807 sc->sc_freetds = std; 1808 } 1809 } 1810 std = sc->sc_freetds; 1811 sc->sc_freetds = std->link.std; 1812 memset(&std->td, 0, sizeof(uhci_td_t)); 1813 return std; 1814 } 1815 1816 void 1817 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1818 { 1819 #ifdef DIAGNOSTIC 1820 #define TD_IS_FREE 0x12345678 1821 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1822 printf("uhci_free_std: freeing free TD %p\n", std); 1823 return; 1824 } 1825 std->td.td_token = htole32(TD_IS_FREE); 1826 #endif 1827 std->link.std = sc->sc_freetds; 1828 sc->sc_freetds = std; 1829 } 1830 1831 uhci_soft_qh_t * 1832 uhci_alloc_sqh(uhci_softc_t *sc) 1833 { 1834 uhci_soft_qh_t *sqh; 1835 usbd_status err; 1836 int i, offs; 1837 usb_dma_t dma; 1838 1839 if (sc->sc_freeqhs == NULL) { 1840 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1841 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1842 UHCI_QH_ALIGN, &dma); 1843 if (err) 1844 return (0); 1845 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1846 offs = i * UHCI_SQH_SIZE; 1847 sqh = KERNADDR(&dma, offs); 1848 sqh->physaddr = DMAADDR(&dma, offs); 1849 sqh->dma = dma; 1850 sqh->offs = offs; 1851 sqh->hlink = sc->sc_freeqhs; 1852 sc->sc_freeqhs = sqh; 1853 } 1854 } 1855 sqh = sc->sc_freeqhs; 1856 sc->sc_freeqhs = sqh->hlink; 1857 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1858 return (sqh); 1859 } 1860 1861 void 1862 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1863 { 1864 sqh->hlink = sc->sc_freeqhs; 1865 sc->sc_freeqhs = sqh; 1866 } 1867 1868 void 1869 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1870 uhci_soft_td_t *stdend) 1871 { 1872 uhci_soft_td_t *p; 1873 1874 /* 1875 * to avoid race condition with the controller which may be looking 1876 * at this chain, we need to first invalidate all links, and 1877 * then wait for the controller to move to another queue 1878 */ 1879 for (p = std; p != stdend; p = p->link.std) { 1880 usb_syncmem(&p->dma, 1881 p->offs + offsetof(uhci_td_t, td_link), 1882 sizeof(p->td.td_link), 1883 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1884 if ((p->td.td_link & UHCI_PTR_T) == 0) { 1885 p->td.td_link = UHCI_PTR_T; 1886 usb_syncmem(&p->dma, 1887 p->offs + offsetof(uhci_td_t, td_link), 1888 sizeof(p->td.td_link), 1889 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1890 } 1891 } 1892 delay(UHCI_QH_REMOVE_DELAY); 1893 1894 for (; std != stdend; std = p) { 1895 p = std->link.std; 1896 uhci_free_std(sc, std); 1897 } 1898 } 1899 1900 usbd_status 1901 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1902 int rd, u_int16_t flags, usb_dma_t *dma, 1903 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1904 { 1905 uhci_soft_td_t *p, *lastp; 1906 uhci_physaddr_t lastlink; 1907 int i, ntd, l, tog, maxp; 1908 u_int32_t status; 1909 int addr = upipe->pipe.device->address; 1910 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1911 1912 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1913 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1914 upipe->pipe.device->speed, flags)); 1915 1916 KASSERT(mutex_owned(&sc->sc_lock)); 1917 1918 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1919 if (maxp == 0) { 1920 printf("uhci_alloc_std_chain: maxp=0\n"); 1921 return (USBD_INVAL); 1922 } 1923 ntd = (len + maxp - 1) / maxp; 1924 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1925 ntd++; 1926 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1927 if (ntd == 0) { 1928 *sp = *ep = 0; 1929 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1930 return (USBD_NORMAL_COMPLETION); 1931 } 1932 tog = upipe->nexttoggle; 1933 if (ntd % 2 == 0) 1934 tog ^= 1; 1935 upipe->nexttoggle = tog ^ 1; 1936 lastp = NULL; 1937 lastlink = UHCI_PTR_T; 1938 ntd--; 1939 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1940 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1941 status |= UHCI_TD_LS; 1942 if (flags & USBD_SHORT_XFER_OK) 1943 status |= UHCI_TD_SPD; 1944 usb_syncmem(dma, 0, len, 1945 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1946 for (i = ntd; i >= 0; i--) { 1947 p = uhci_alloc_std(sc); 1948 if (p == NULL) { 1949 KASSERT(lastp != NULL); 1950 uhci_free_std_chain(sc, lastp, NULL); 1951 return (USBD_NOMEM); 1952 } 1953 p->link.std = lastp; 1954 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1955 lastp = p; 1956 lastlink = p->physaddr; 1957 p->td.td_status = htole32(status); 1958 if (i == ntd) { 1959 /* last TD */ 1960 l = len % maxp; 1961 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1962 l = maxp; 1963 *ep = p; 1964 } else 1965 l = maxp; 1966 p->td.td_token = 1967 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1968 UHCI_TD_OUT(l, endpt, addr, tog)); 1969 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1970 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 1971 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1972 tog ^= 1; 1973 } 1974 *sp = lastp; 1975 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1976 upipe->nexttoggle)); 1977 return (USBD_NORMAL_COMPLETION); 1978 } 1979 1980 void 1981 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1982 { 1983 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1984 upipe->nexttoggle = 0; 1985 } 1986 1987 void 1988 uhci_noop(usbd_pipe_handle pipe) 1989 { 1990 } 1991 1992 usbd_status 1993 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1994 { 1995 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1996 usbd_status err; 1997 1998 /* Insert last in queue. */ 1999 mutex_enter(&sc->sc_lock); 2000 err = usb_insert_transfer(xfer); 2001 mutex_exit(&sc->sc_lock); 2002 if (err) 2003 return (err); 2004 2005 /* 2006 * Pipe isn't running (otherwise err would be USBD_INPROG), 2007 * so start it first. 2008 */ 2009 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2010 } 2011 2012 usbd_status 2013 uhci_device_bulk_start(usbd_xfer_handle xfer) 2014 { 2015 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2016 usbd_device_handle dev = upipe->pipe.device; 2017 uhci_softc_t *sc = dev->bus->hci_private; 2018 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2019 uhci_soft_td_t *data, *dataend; 2020 uhci_soft_qh_t *sqh; 2021 usbd_status err; 2022 int len, isread, endpt; 2023 2024 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2025 xfer, xfer->length, xfer->flags, ii)); 2026 2027 if (sc->sc_dying) 2028 return (USBD_IOERROR); 2029 2030 #ifdef DIAGNOSTIC 2031 if (xfer->rqflags & URQ_REQUEST) 2032 panic("uhci_device_bulk_transfer: a request"); 2033 #endif 2034 2035 mutex_enter(&sc->sc_lock); 2036 2037 len = xfer->length; 2038 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2039 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2040 sqh = upipe->u.bulk.sqh; 2041 2042 upipe->u.bulk.isread = isread; 2043 upipe->u.bulk.length = len; 2044 2045 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2046 &xfer->dmabuf, &data, &dataend); 2047 if (err) { 2048 mutex_exit(&sc->sc_lock); 2049 return (err); 2050 } 2051 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2052 usb_syncmem(&dataend->dma, 2053 dataend->offs + offsetof(uhci_td_t, td_status), 2054 sizeof(dataend->td.td_status), 2055 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2056 2057 2058 #ifdef UHCI_DEBUG 2059 if (uhcidebug > 8) { 2060 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2061 uhci_dump_tds(data); 2062 } 2063 #endif 2064 2065 /* Set up interrupt info. */ 2066 ii->xfer = xfer; 2067 ii->stdstart = data; 2068 ii->stdend = dataend; 2069 #ifdef DIAGNOSTIC 2070 if (!ii->isdone) { 2071 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2072 } 2073 ii->isdone = 0; 2074 #endif 2075 2076 sqh->elink = data; 2077 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2078 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2079 2080 uhci_add_bulk(sc, sqh); 2081 uhci_add_intr_info(sc, ii); 2082 2083 if (xfer->timeout && !sc->sc_bus.use_polling) { 2084 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2085 uhci_timeout, ii); 2086 } 2087 xfer->status = USBD_IN_PROGRESS; 2088 2089 #ifdef UHCI_DEBUG 2090 if (uhcidebug > 10) { 2091 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2092 uhci_dump_tds(data); 2093 } 2094 #endif 2095 2096 if (sc->sc_bus.use_polling) 2097 uhci_waitintr(sc, xfer); 2098 2099 mutex_exit(&sc->sc_lock); 2100 return (USBD_IN_PROGRESS); 2101 } 2102 2103 /* Abort a device bulk request. */ 2104 void 2105 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2106 { 2107 DPRINTF(("uhci_device_bulk_abort:\n")); 2108 uhci_abort_xfer(xfer, USBD_CANCELLED); 2109 } 2110 2111 /* 2112 * Abort a device request. 2113 * If this routine is called at splusb() it guarantees that the request 2114 * will be removed from the hardware scheduling and that the callback 2115 * for it will be called with USBD_CANCELLED status. 2116 * It's impossible to guarantee that the requested transfer will not 2117 * have happened since the hardware runs concurrently. 2118 * If the transaction has already happened we rely on the ordinary 2119 * interrupt processing to process it. 2120 */ 2121 void 2122 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2123 { 2124 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2125 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2126 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2127 uhci_soft_td_t *std; 2128 int wake; 2129 2130 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2131 2132 if (sc->sc_dying) { 2133 /* If we're dying, just do the software part. */ 2134 mutex_enter(&sc->sc_lock); 2135 xfer->status = status; /* make software ignore it */ 2136 callout_stop(&xfer->timeout_handle); 2137 usb_transfer_complete(xfer); 2138 mutex_exit(&sc->sc_lock); 2139 return; 2140 } 2141 2142 if (xfer->device->bus->intr_context || !curproc) 2143 panic("uhci_abort_xfer: not in process context"); 2144 2145 mutex_enter(&sc->sc_lock); 2146 2147 /* 2148 * If an abort is already in progress then just wait for it to 2149 * complete and return. 2150 */ 2151 if (xfer->hcflags & UXFER_ABORTING) { 2152 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2153 #ifdef DIAGNOSTIC 2154 if (status == USBD_TIMEOUT) 2155 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2156 #endif 2157 /* Override the status which might be USBD_TIMEOUT. */ 2158 xfer->status = status; 2159 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2160 xfer->hcflags |= UXFER_ABORTWAIT; 2161 while (xfer->hcflags & UXFER_ABORTING) 2162 cv_wait(&xfer->hccv, &sc->sc_lock); 2163 goto done; 2164 } 2165 xfer->hcflags |= UXFER_ABORTING; 2166 2167 /* 2168 * Step 1: Make interrupt routine and hardware ignore xfer. 2169 */ 2170 xfer->status = status; /* make software ignore it */ 2171 callout_stop(&xfer->timeout_handle); 2172 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2173 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2174 usb_syncmem(&std->dma, 2175 std->offs + offsetof(uhci_td_t, td_status), 2176 sizeof(std->td.td_status), 2177 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2178 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2179 usb_syncmem(&std->dma, 2180 std->offs + offsetof(uhci_td_t, td_status), 2181 sizeof(std->td.td_status), 2182 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2183 } 2184 2185 /* 2186 * Step 2: Wait until we know hardware has finished any possible 2187 * use of the xfer. Also make sure the soft interrupt routine 2188 * has run. 2189 */ 2190 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2191 sc->sc_softwake = 1; 2192 usb_schedsoftintr(&sc->sc_bus); 2193 DPRINTFN(1,("uhci_abort_xfer: cv_wait\n")); 2194 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2195 2196 /* 2197 * Step 3: Execute callback. 2198 */ 2199 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2200 #ifdef DIAGNOSTIC 2201 ii->isdone = 1; 2202 #endif 2203 wake = xfer->hcflags & UXFER_ABORTWAIT; 2204 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2205 usb_transfer_complete(xfer); 2206 if (wake) 2207 cv_broadcast(&xfer->hccv); 2208 done: 2209 mutex_exit(&sc->sc_lock); 2210 } 2211 2212 /* Close a device bulk pipe. */ 2213 void 2214 uhci_device_bulk_close(usbd_pipe_handle pipe) 2215 { 2216 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2217 usbd_device_handle dev = upipe->pipe.device; 2218 uhci_softc_t *sc = dev->bus->hci_private; 2219 2220 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2221 2222 pipe->endpoint->datatoggle = upipe->nexttoggle; 2223 } 2224 2225 usbd_status 2226 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2227 { 2228 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2229 usbd_status err; 2230 2231 /* Insert last in queue. */ 2232 mutex_enter(&sc->sc_lock); 2233 err = usb_insert_transfer(xfer); 2234 mutex_exit(&sc->sc_lock); 2235 if (err) 2236 return (err); 2237 2238 /* 2239 * Pipe isn't running (otherwise err would be USBD_INPROG), 2240 * so start it first. 2241 */ 2242 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2243 } 2244 2245 usbd_status 2246 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2247 { 2248 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2249 usbd_status err; 2250 2251 if (sc->sc_dying) 2252 return (USBD_IOERROR); 2253 2254 #ifdef DIAGNOSTIC 2255 if (!(xfer->rqflags & URQ_REQUEST)) 2256 panic("uhci_device_ctrl_transfer: not a request"); 2257 #endif 2258 2259 mutex_enter(&sc->sc_lock); 2260 err = uhci_device_request(xfer); 2261 mutex_exit(&sc->sc_lock); 2262 if (err) 2263 return (err); 2264 2265 if (sc->sc_bus.use_polling) 2266 uhci_waitintr(sc, xfer); 2267 return (USBD_IN_PROGRESS); 2268 } 2269 2270 usbd_status 2271 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2272 { 2273 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2274 usbd_status err; 2275 2276 /* Insert last in queue. */ 2277 mutex_enter(&sc->sc_lock); 2278 err = usb_insert_transfer(xfer); 2279 mutex_exit(&sc->sc_lock); 2280 if (err) 2281 return (err); 2282 2283 /* 2284 * Pipe isn't running (otherwise err would be USBD_INPROG), 2285 * so start it first. 2286 */ 2287 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2288 } 2289 2290 usbd_status 2291 uhci_device_intr_start(usbd_xfer_handle xfer) 2292 { 2293 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2294 usbd_device_handle dev = upipe->pipe.device; 2295 uhci_softc_t *sc = dev->bus->hci_private; 2296 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2297 uhci_soft_td_t *data, *dataend; 2298 uhci_soft_qh_t *sqh; 2299 usbd_status err; 2300 int isread, endpt; 2301 int i; 2302 2303 if (sc->sc_dying) 2304 return (USBD_IOERROR); 2305 2306 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2307 xfer, xfer->length, xfer->flags)); 2308 2309 #ifdef DIAGNOSTIC 2310 if (xfer->rqflags & URQ_REQUEST) 2311 panic("uhci_device_intr_transfer: a request"); 2312 #endif 2313 2314 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2315 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2316 2317 upipe->u.intr.isread = isread; 2318 2319 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2320 xfer->flags, &xfer->dmabuf, &data, 2321 &dataend); 2322 if (err) 2323 return (err); 2324 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2325 usb_syncmem(&dataend->dma, 2326 dataend->offs + offsetof(uhci_td_t, td_status), 2327 sizeof(dataend->td.td_status), 2328 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2329 2330 #ifdef UHCI_DEBUG 2331 if (uhcidebug > 10) { 2332 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2333 uhci_dump_tds(data); 2334 uhci_dump_qh(upipe->u.intr.qhs[0]); 2335 } 2336 #endif 2337 2338 mutex_enter(&sc->sc_lock); 2339 /* Set up interrupt info. */ 2340 ii->xfer = xfer; 2341 ii->stdstart = data; 2342 ii->stdend = dataend; 2343 #ifdef DIAGNOSTIC 2344 if (!ii->isdone) { 2345 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2346 } 2347 ii->isdone = 0; 2348 #endif 2349 2350 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2351 upipe->u.intr.qhs[0])); 2352 for (i = 0; i < upipe->u.intr.npoll; i++) { 2353 sqh = upipe->u.intr.qhs[i]; 2354 sqh->elink = data; 2355 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2356 usb_syncmem(&sqh->dma, 2357 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2358 sizeof(sqh->qh.qh_elink), 2359 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2360 } 2361 uhci_add_intr_info(sc, ii); 2362 xfer->status = USBD_IN_PROGRESS; 2363 mutex_exit(&sc->sc_lock); 2364 2365 #ifdef UHCI_DEBUG 2366 if (uhcidebug > 10) { 2367 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2368 uhci_dump_tds(data); 2369 uhci_dump_qh(upipe->u.intr.qhs[0]); 2370 } 2371 #endif 2372 2373 return (USBD_IN_PROGRESS); 2374 } 2375 2376 /* Abort a device control request. */ 2377 void 2378 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2379 { 2380 DPRINTF(("uhci_device_ctrl_abort:\n")); 2381 uhci_abort_xfer(xfer, USBD_CANCELLED); 2382 } 2383 2384 /* Close a device control pipe. */ 2385 void 2386 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2387 { 2388 } 2389 2390 /* Abort a device interrupt request. */ 2391 void 2392 uhci_device_intr_abort(usbd_xfer_handle xfer) 2393 { 2394 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2395 if (xfer->pipe->intrxfer == xfer) { 2396 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2397 xfer->pipe->intrxfer = NULL; 2398 } 2399 uhci_abort_xfer(xfer, USBD_CANCELLED); 2400 } 2401 2402 /* Close a device interrupt pipe. */ 2403 void 2404 uhci_device_intr_close(usbd_pipe_handle pipe) 2405 { 2406 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2407 uhci_softc_t *sc = pipe->device->bus->hci_private; 2408 int i, npoll; 2409 2410 /* Unlink descriptors from controller data structures. */ 2411 npoll = upipe->u.intr.npoll; 2412 mutex_enter(&sc->sc_lock); 2413 for (i = 0; i < npoll; i++) 2414 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2415 mutex_exit(&sc->sc_lock); 2416 2417 /* 2418 * We now have to wait for any activity on the physical 2419 * descriptors to stop. 2420 */ 2421 usb_delay_ms(&sc->sc_bus, 2); 2422 2423 for(i = 0; i < npoll; i++) 2424 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2425 kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *)); 2426 2427 /* XXX free other resources */ 2428 } 2429 2430 usbd_status 2431 uhci_device_request(usbd_xfer_handle xfer) 2432 { 2433 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2434 usb_device_request_t *req = &xfer->request; 2435 usbd_device_handle dev = upipe->pipe.device; 2436 uhci_softc_t *sc = dev->bus->hci_private; 2437 int addr = dev->address; 2438 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2439 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2440 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2441 uhci_soft_qh_t *sqh; 2442 int len; 2443 u_int32_t ls; 2444 usbd_status err; 2445 int isread; 2446 2447 KASSERT(mutex_owned(&sc->sc_lock)); 2448 2449 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2450 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2451 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2452 UGETW(req->wIndex), UGETW(req->wLength), 2453 addr, endpt)); 2454 2455 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2456 isread = req->bmRequestType & UT_READ; 2457 len = UGETW(req->wLength); 2458 2459 setup = upipe->u.ctl.setup; 2460 stat = upipe->u.ctl.stat; 2461 sqh = upipe->u.ctl.sqh; 2462 2463 /* Set up data transaction */ 2464 if (len != 0) { 2465 upipe->nexttoggle = 1; 2466 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2467 &xfer->dmabuf, &data, &dataend); 2468 if (err) 2469 return (err); 2470 next = data; 2471 dataend->link.std = stat; 2472 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2473 usb_syncmem(&dataend->dma, 2474 dataend->offs + offsetof(uhci_td_t, td_link), 2475 sizeof(dataend->td.td_link), 2476 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2477 } else { 2478 next = stat; 2479 } 2480 upipe->u.ctl.length = len; 2481 2482 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2483 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2484 2485 setup->link.std = next; 2486 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2487 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2488 UHCI_TD_ACTIVE); 2489 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2490 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2491 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2492 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2493 2494 stat->link.std = NULL; 2495 stat->td.td_link = htole32(UHCI_PTR_T); 2496 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2497 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2498 stat->td.td_token = 2499 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2500 UHCI_TD_IN (0, endpt, addr, 1)); 2501 stat->td.td_buffer = htole32(0); 2502 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2503 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2504 2505 #ifdef UHCI_DEBUG 2506 if (uhcidebug > 10) { 2507 DPRINTF(("uhci_device_request: before transfer\n")); 2508 uhci_dump_tds(setup); 2509 } 2510 #endif 2511 2512 /* Set up interrupt info. */ 2513 ii->xfer = xfer; 2514 ii->stdstart = setup; 2515 ii->stdend = stat; 2516 #ifdef DIAGNOSTIC 2517 if (!ii->isdone) { 2518 printf("uhci_device_request: not done, ii=%p\n", ii); 2519 } 2520 ii->isdone = 0; 2521 #endif 2522 2523 sqh->elink = setup; 2524 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2525 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2526 2527 mutex_enter(&sc->sc_lock); 2528 if (dev->speed == USB_SPEED_LOW) 2529 uhci_add_ls_ctrl(sc, sqh); 2530 else 2531 uhci_add_hs_ctrl(sc, sqh); 2532 uhci_add_intr_info(sc, ii); 2533 #ifdef UHCI_DEBUG 2534 if (uhcidebug > 12) { 2535 uhci_soft_td_t *std; 2536 uhci_soft_qh_t *xqh; 2537 uhci_soft_qh_t *sxqh; 2538 int maxqh = 0; 2539 uhci_physaddr_t link; 2540 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2541 for (std = sc->sc_vframes[0].htd, link = 0; 2542 (link & UHCI_PTR_QH) == 0; 2543 std = std->link.std) { 2544 link = le32toh(std->td.td_link); 2545 uhci_dump_td(std); 2546 } 2547 sxqh = (uhci_soft_qh_t *)std; 2548 uhci_dump_qh(sxqh); 2549 for (xqh = sxqh; 2550 xqh != NULL; 2551 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2552 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2553 uhci_dump_qh(xqh); 2554 } 2555 DPRINTF(("Enqueued QH:\n")); 2556 uhci_dump_qh(sqh); 2557 uhci_dump_tds(sqh->elink); 2558 } 2559 #endif 2560 if (xfer->timeout && !sc->sc_bus.use_polling) { 2561 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2562 uhci_timeout, ii); 2563 } 2564 xfer->status = USBD_IN_PROGRESS; 2565 mutex_exit(&sc->sc_lock); 2566 2567 return (USBD_NORMAL_COMPLETION); 2568 } 2569 2570 usbd_status 2571 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2572 { 2573 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2574 usbd_status err; 2575 2576 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2577 2578 /* Put it on our queue, */ 2579 mutex_enter(&sc->sc_lock); 2580 err = usb_insert_transfer(xfer); 2581 mutex_exit(&sc->sc_lock); 2582 2583 /* bail out on error, */ 2584 if (err && err != USBD_IN_PROGRESS) 2585 return (err); 2586 2587 /* XXX should check inuse here */ 2588 2589 /* insert into schedule, */ 2590 uhci_device_isoc_enter(xfer); 2591 2592 /* and start if the pipe wasn't running */ 2593 if (!err) 2594 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2595 2596 return (err); 2597 } 2598 2599 void 2600 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2601 { 2602 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2603 usbd_device_handle dev = upipe->pipe.device; 2604 uhci_softc_t *sc = dev->bus->hci_private; 2605 struct iso *iso = &upipe->u.iso; 2606 uhci_soft_td_t *std; 2607 u_int32_t buf, len, status, offs; 2608 int i, next, nframes; 2609 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2610 2611 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2612 "nframes=%d\n", 2613 iso->inuse, iso->next, xfer, xfer->nframes)); 2614 2615 if (sc->sc_dying) 2616 return; 2617 2618 if (xfer->status == USBD_IN_PROGRESS) { 2619 /* This request has already been entered into the frame list */ 2620 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2621 /* XXX */ 2622 } 2623 2624 #ifdef DIAGNOSTIC 2625 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2626 printf("uhci_device_isoc_enter: overflow!\n"); 2627 #endif 2628 2629 next = iso->next; 2630 if (next == -1) { 2631 /* Not in use yet, schedule it a few frames ahead. */ 2632 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2633 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2634 } 2635 2636 xfer->status = USBD_IN_PROGRESS; 2637 UXFER(xfer)->curframe = next; 2638 2639 buf = DMAADDR(&xfer->dmabuf, 0); 2640 offs = 0; 2641 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2642 UHCI_TD_ACTIVE | 2643 UHCI_TD_IOS); 2644 nframes = xfer->nframes; 2645 mutex_enter(&sc->sc_lock); 2646 for (i = 0; i < nframes; i++) { 2647 std = iso->stds[next]; 2648 if (++next >= UHCI_VFRAMELIST_COUNT) 2649 next = 0; 2650 len = xfer->frlengths[i]; 2651 std->td.td_buffer = htole32(buf); 2652 usb_syncmem(&xfer->dmabuf, offs, len, 2653 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2654 if (i == nframes - 1) 2655 status |= UHCI_TD_IOC; 2656 std->td.td_status = htole32(status); 2657 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2658 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2659 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2660 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2661 #ifdef UHCI_DEBUG 2662 if (uhcidebug > 5) { 2663 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2664 uhci_dump_td(std); 2665 } 2666 #endif 2667 buf += len; 2668 offs += len; 2669 } 2670 iso->next = next; 2671 iso->inuse += xfer->nframes; 2672 2673 mutex_exit(&sc->sc_lock); 2674 } 2675 2676 usbd_status 2677 uhci_device_isoc_start(usbd_xfer_handle xfer) 2678 { 2679 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2680 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2681 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2682 uhci_soft_td_t *end; 2683 int i; 2684 2685 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2686 2687 mutex_enter(&sc->sc_lock); 2688 2689 if (sc->sc_dying) { 2690 mutex_exit(&sc->sc_lock); 2691 return (USBD_IOERROR); 2692 } 2693 2694 #ifdef DIAGNOSTIC 2695 if (xfer->status != USBD_IN_PROGRESS) 2696 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2697 #endif 2698 2699 /* Find the last TD */ 2700 i = UXFER(xfer)->curframe + xfer->nframes; 2701 if (i >= UHCI_VFRAMELIST_COUNT) 2702 i -= UHCI_VFRAMELIST_COUNT; 2703 end = upipe->u.iso.stds[i]; 2704 2705 #ifdef DIAGNOSTIC 2706 if (end == NULL) { 2707 printf("uhci_device_isoc_start: end == NULL\n"); 2708 return (USBD_INVAL); 2709 } 2710 #endif 2711 2712 /* Set up interrupt info. */ 2713 ii->xfer = xfer; 2714 ii->stdstart = end; 2715 ii->stdend = end; 2716 #ifdef DIAGNOSTIC 2717 if (!ii->isdone) 2718 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2719 ii->isdone = 0; 2720 #endif 2721 uhci_add_intr_info(sc, ii); 2722 2723 mutex_exit(&sc->sc_lock); 2724 2725 return (USBD_IN_PROGRESS); 2726 } 2727 2728 void 2729 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2730 { 2731 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2732 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2733 uhci_soft_td_t **stds = upipe->u.iso.stds; 2734 uhci_soft_td_t *std; 2735 int i, n, nframes, maxlen, len; 2736 2737 mutex_enter(&sc->sc_lock); 2738 2739 /* Transfer is already done. */ 2740 if (xfer->status != USBD_NOT_STARTED && 2741 xfer->status != USBD_IN_PROGRESS) { 2742 mutex_exit(&sc->sc_lock); 2743 return; 2744 } 2745 2746 /* Give xfer the requested abort code. */ 2747 xfer->status = USBD_CANCELLED; 2748 2749 /* make hardware ignore it, */ 2750 nframes = xfer->nframes; 2751 n = UXFER(xfer)->curframe; 2752 maxlen = 0; 2753 for (i = 0; i < nframes; i++) { 2754 std = stds[n]; 2755 usb_syncmem(&std->dma, 2756 std->offs + offsetof(uhci_td_t, td_status), 2757 sizeof(std->td.td_status), 2758 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2759 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2760 usb_syncmem(&std->dma, 2761 std->offs + offsetof(uhci_td_t, td_status), 2762 sizeof(std->td.td_status), 2763 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2764 usb_syncmem(&std->dma, 2765 std->offs + offsetof(uhci_td_t, td_token), 2766 sizeof(std->td.td_token), 2767 BUS_DMASYNC_POSTWRITE); 2768 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2769 if (len > maxlen) 2770 maxlen = len; 2771 if (++n >= UHCI_VFRAMELIST_COUNT) 2772 n = 0; 2773 } 2774 2775 /* and wait until we are sure the hardware has finished. */ 2776 delay(maxlen); 2777 2778 #ifdef DIAGNOSTIC 2779 UXFER(xfer)->iinfo.isdone = 1; 2780 #endif 2781 /* Run callback and remove from interrupt list. */ 2782 usb_transfer_complete(xfer); 2783 2784 mutex_exit(&sc->sc_lock); 2785 } 2786 2787 void 2788 uhci_device_isoc_close(usbd_pipe_handle pipe) 2789 { 2790 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2791 usbd_device_handle dev = upipe->pipe.device; 2792 uhci_softc_t *sc = dev->bus->hci_private; 2793 uhci_soft_td_t *std, *vstd; 2794 struct iso *iso; 2795 int i; 2796 2797 /* 2798 * Make sure all TDs are marked as inactive. 2799 * Wait for completion. 2800 * Unschedule. 2801 * Deallocate. 2802 */ 2803 iso = &upipe->u.iso; 2804 2805 mutex_enter(&sc->sc_lock); 2806 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2807 std = iso->stds[i]; 2808 usb_syncmem(&std->dma, 2809 std->offs + offsetof(uhci_td_t, td_status), 2810 sizeof(std->td.td_status), 2811 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2812 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2813 usb_syncmem(&std->dma, 2814 std->offs + offsetof(uhci_td_t, td_status), 2815 sizeof(std->td.td_status), 2816 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2817 } 2818 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2819 2820 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2821 std = iso->stds[i]; 2822 for (vstd = sc->sc_vframes[i].htd; 2823 vstd != NULL && vstd->link.std != std; 2824 vstd = vstd->link.std) 2825 ; 2826 if (vstd == NULL) { 2827 /*panic*/ 2828 printf("uhci_device_isoc_close: %p not found\n", std); 2829 mutex_exit(&sc->sc_lock); 2830 return; 2831 } 2832 vstd->link = std->link; 2833 usb_syncmem(&std->dma, 2834 std->offs + offsetof(uhci_td_t, td_link), 2835 sizeof(std->td.td_link), 2836 BUS_DMASYNC_POSTWRITE); 2837 vstd->td.td_link = std->td.td_link; 2838 usb_syncmem(&vstd->dma, 2839 vstd->offs + offsetof(uhci_td_t, td_link), 2840 sizeof(vstd->td.td_link), 2841 BUS_DMASYNC_PREWRITE); 2842 uhci_free_std(sc, std); 2843 } 2844 mutex_exit(&sc->sc_lock); 2845 2846 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2847 } 2848 2849 usbd_status 2850 uhci_setup_isoc(usbd_pipe_handle pipe) 2851 { 2852 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2853 usbd_device_handle dev = upipe->pipe.device; 2854 uhci_softc_t *sc = dev->bus->hci_private; 2855 int addr = upipe->pipe.device->address; 2856 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2857 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2858 uhci_soft_td_t *std, *vstd; 2859 u_int32_t token; 2860 struct iso *iso; 2861 int i; 2862 2863 iso = &upipe->u.iso; 2864 iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT * 2865 sizeof (uhci_soft_td_t *), 2866 KM_SLEEP); 2867 if (iso->stds == NULL) 2868 return USBD_NOMEM; 2869 2870 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2871 UHCI_TD_OUT(0, endpt, addr, 0); 2872 2873 mutex_enter(&sc->sc_lock); 2874 2875 /* Allocate the TDs and mark as inactive; */ 2876 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2877 std = uhci_alloc_std(sc); 2878 if (std == 0) 2879 goto bad; 2880 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2881 std->td.td_token = htole32(token); 2882 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2883 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2884 iso->stds[i] = std; 2885 } 2886 2887 /* Insert TDs into schedule. */ 2888 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2889 std = iso->stds[i]; 2890 vstd = sc->sc_vframes[i].htd; 2891 usb_syncmem(&vstd->dma, 2892 vstd->offs + offsetof(uhci_td_t, td_link), 2893 sizeof(vstd->td.td_link), 2894 BUS_DMASYNC_POSTWRITE); 2895 std->link = vstd->link; 2896 std->td.td_link = vstd->td.td_link; 2897 usb_syncmem(&std->dma, 2898 std->offs + offsetof(uhci_td_t, td_link), 2899 sizeof(std->td.td_link), 2900 BUS_DMASYNC_PREWRITE); 2901 vstd->link.std = std; 2902 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2903 usb_syncmem(&vstd->dma, 2904 vstd->offs + offsetof(uhci_td_t, td_link), 2905 sizeof(vstd->td.td_link), 2906 BUS_DMASYNC_PREWRITE); 2907 } 2908 mutex_exit(&sc->sc_lock); 2909 2910 iso->next = -1; 2911 iso->inuse = 0; 2912 2913 return (USBD_NORMAL_COMPLETION); 2914 2915 bad: 2916 while (--i >= 0) 2917 uhci_free_std(sc, iso->stds[i]); 2918 mutex_exit(&sc->sc_lock); 2919 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2920 return (USBD_NOMEM); 2921 } 2922 2923 void 2924 uhci_device_isoc_done(usbd_xfer_handle xfer) 2925 { 2926 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2927 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2928 int i, offs; 2929 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2930 2931 2932 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2933 xfer->actlen, xfer->busy_free)); 2934 2935 if (ii->xfer != xfer) 2936 /* Not on interrupt list, ignore it. */ 2937 return; 2938 2939 if (!uhci_active_intr_info(ii)) 2940 return; 2941 2942 #ifdef DIAGNOSTIC 2943 if (ii->stdend == NULL) { 2944 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2945 #ifdef UHCI_DEBUG 2946 uhci_dump_ii(ii); 2947 #endif 2948 return; 2949 } 2950 #endif 2951 2952 /* Turn off the interrupt since it is active even if the TD is not. */ 2953 usb_syncmem(&ii->stdend->dma, 2954 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2955 sizeof(ii->stdend->td.td_status), 2956 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2957 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2958 usb_syncmem(&ii->stdend->dma, 2959 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2960 sizeof(ii->stdend->td.td_status), 2961 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2962 2963 uhci_del_intr_info(ii); /* remove from active list */ 2964 2965 offs = 0; 2966 for (i = 0; i < xfer->nframes; i++) { 2967 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i], 2968 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2969 offs += xfer->frlengths[i]; 2970 } 2971 } 2972 2973 void 2974 uhci_device_intr_done(usbd_xfer_handle xfer) 2975 { 2976 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2977 uhci_softc_t *sc = ii->sc; 2978 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2979 uhci_soft_qh_t *sqh; 2980 int i, npoll, isread; 2981 2982 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2983 2984 KASSERT(mutex_owned(&sc->sc_lock)); 2985 2986 npoll = upipe->u.intr.npoll; 2987 for(i = 0; i < npoll; i++) { 2988 sqh = upipe->u.intr.qhs[i]; 2989 sqh->elink = NULL; 2990 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2991 usb_syncmem(&sqh->dma, 2992 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2993 sizeof(sqh->qh.qh_elink), 2994 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2995 } 2996 uhci_free_std_chain(sc, ii->stdstart, NULL); 2997 2998 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2999 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 3000 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3001 3002 /* XXX Wasteful. */ 3003 if (xfer->pipe->repeat) { 3004 uhci_soft_td_t *data, *dataend; 3005 3006 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 3007 3008 /* This alloc cannot fail since we freed the chain above. */ 3009 uhci_alloc_std_chain(upipe, sc, xfer->length, 3010 upipe->u.intr.isread, xfer->flags, 3011 &xfer->dmabuf, &data, &dataend); 3012 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3013 usb_syncmem(&dataend->dma, 3014 dataend->offs + offsetof(uhci_td_t, td_status), 3015 sizeof(dataend->td.td_status), 3016 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3017 3018 #ifdef UHCI_DEBUG 3019 if (uhcidebug > 10) { 3020 DPRINTF(("uhci_device_intr_done: data(1)\n")); 3021 uhci_dump_tds(data); 3022 uhci_dump_qh(upipe->u.intr.qhs[0]); 3023 } 3024 #endif 3025 3026 ii->stdstart = data; 3027 ii->stdend = dataend; 3028 #ifdef DIAGNOSTIC 3029 if (!ii->isdone) { 3030 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3031 } 3032 ii->isdone = 0; 3033 #endif 3034 for (i = 0; i < npoll; i++) { 3035 sqh = upipe->u.intr.qhs[i]; 3036 sqh->elink = data; 3037 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3038 usb_syncmem(&sqh->dma, 3039 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3040 sizeof(sqh->qh.qh_elink), 3041 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3042 } 3043 xfer->status = USBD_IN_PROGRESS; 3044 /* The ii is already on the examined list, just leave it. */ 3045 } else { 3046 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3047 if (uhci_active_intr_info(ii)) 3048 uhci_del_intr_info(ii); 3049 } 3050 } 3051 3052 /* Deallocate request data structures */ 3053 void 3054 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3055 { 3056 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3057 uhci_softc_t *sc = ii->sc; 3058 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3059 int len = UGETW(xfer->request.wLength); 3060 int isread = (xfer->request.bmRequestType & UT_READ); 3061 3062 KASSERT(mutex_owned(&sc->sc_lock)); 3063 3064 #ifdef DIAGNOSTIC 3065 if (!(xfer->rqflags & URQ_REQUEST)) 3066 panic("uhci_device_ctrl_done: not a request"); 3067 #endif 3068 3069 if (!uhci_active_intr_info(ii)) 3070 return; 3071 3072 uhci_del_intr_info(ii); /* remove from active list */ 3073 3074 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3075 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3076 else 3077 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3078 3079 if (upipe->u.ctl.length != 0) 3080 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3081 3082 if (len) { 3083 usb_syncmem(&xfer->dmabuf, 0, len, 3084 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3085 } 3086 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3087 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3088 3089 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3090 } 3091 3092 /* Deallocate request data structures */ 3093 void 3094 uhci_device_bulk_done(usbd_xfer_handle xfer) 3095 { 3096 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3097 uhci_softc_t *sc = ii->sc; 3098 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3099 3100 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3101 xfer, ii, sc, upipe)); 3102 3103 KASSERT(mutex_owned(&sc->sc_lock)); 3104 3105 if (!uhci_active_intr_info(ii)) 3106 return; 3107 3108 uhci_del_intr_info(ii); /* remove from active list */ 3109 3110 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3111 3112 uhci_free_std_chain(sc, ii->stdstart, NULL); 3113 3114 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3115 } 3116 3117 /* Add interrupt QH, called with vflock. */ 3118 void 3119 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3120 { 3121 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3122 uhci_soft_qh_t *eqh; 3123 3124 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3125 3126 eqh = vf->eqh; 3127 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3128 sizeof(eqh->qh.qh_hlink), 3129 BUS_DMASYNC_POSTWRITE); 3130 sqh->hlink = eqh->hlink; 3131 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3132 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3133 sizeof(sqh->qh.qh_hlink), 3134 BUS_DMASYNC_PREWRITE); 3135 eqh->hlink = sqh; 3136 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3137 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3138 sizeof(eqh->qh.qh_hlink), 3139 BUS_DMASYNC_PREWRITE); 3140 vf->eqh = sqh; 3141 vf->bandwidth++; 3142 } 3143 3144 /* Remove interrupt QH. */ 3145 void 3146 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3147 { 3148 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3149 uhci_soft_qh_t *pqh; 3150 3151 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3152 3153 /* See comment in uhci_remove_ctrl() */ 3154 3155 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3156 sizeof(sqh->qh.qh_elink), 3157 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3158 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3159 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3160 usb_syncmem(&sqh->dma, 3161 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3162 sizeof(sqh->qh.qh_elink), 3163 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3164 delay(UHCI_QH_REMOVE_DELAY); 3165 } 3166 3167 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3168 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3169 sizeof(sqh->qh.qh_hlink), 3170 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3171 pqh->hlink = sqh->hlink; 3172 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3173 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3174 sizeof(pqh->qh.qh_hlink), 3175 BUS_DMASYNC_PREWRITE); 3176 delay(UHCI_QH_REMOVE_DELAY); 3177 if (vf->eqh == sqh) 3178 vf->eqh = pqh; 3179 vf->bandwidth--; 3180 } 3181 3182 usbd_status 3183 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3184 { 3185 uhci_soft_qh_t *sqh; 3186 int i, npoll; 3187 u_int bestbw, bw, bestoffs, offs; 3188 3189 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3190 if (ival == 0) { 3191 printf("uhci_device_setintr: 0 interval\n"); 3192 return (USBD_INVAL); 3193 } 3194 3195 if (ival > UHCI_VFRAMELIST_COUNT) 3196 ival = UHCI_VFRAMELIST_COUNT; 3197 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3198 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3199 3200 upipe->u.intr.npoll = npoll; 3201 upipe->u.intr.qhs = 3202 kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP); 3203 if (upipe->u.intr.qhs == NULL) 3204 return USBD_NOMEM; 3205 3206 /* 3207 * Figure out which offset in the schedule that has most 3208 * bandwidth left over. 3209 */ 3210 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3211 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3212 for (bw = i = 0; i < npoll; i++) 3213 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3214 if (bw < bestbw) { 3215 bestbw = bw; 3216 bestoffs = offs; 3217 } 3218 } 3219 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3220 3221 mutex_enter(&sc->sc_lock); 3222 for(i = 0; i < npoll; i++) { 3223 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3224 sqh->elink = NULL; 3225 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3226 usb_syncmem(&sqh->dma, 3227 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3228 sizeof(sqh->qh.qh_elink), 3229 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3230 sqh->pos = MOD(i * ival + bestoffs); 3231 } 3232 #undef MOD 3233 3234 /* Enter QHs into the controller data structures. */ 3235 for(i = 0; i < npoll; i++) 3236 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3237 mutex_exit(&sc->sc_lock); 3238 3239 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3240 return (USBD_NORMAL_COMPLETION); 3241 } 3242 3243 /* Open a new pipe. */ 3244 usbd_status 3245 uhci_open(usbd_pipe_handle pipe) 3246 { 3247 uhci_softc_t *sc = pipe->device->bus->hci_private; 3248 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3249 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3250 usbd_status err = USBD_NOMEM; 3251 int ival; 3252 3253 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3254 pipe, pipe->device->address, 3255 ed->bEndpointAddress, sc->sc_addr)); 3256 3257 if (sc->sc_dying) 3258 return USBD_IOERROR; 3259 3260 upipe->aborting = 0; 3261 /* toggle state needed for bulk endpoints */ 3262 upipe->nexttoggle = pipe->endpoint->datatoggle; 3263 3264 if (pipe->device->address == sc->sc_addr) { 3265 switch (ed->bEndpointAddress) { 3266 case USB_CONTROL_ENDPOINT: 3267 pipe->methods = &uhci_root_ctrl_methods; 3268 break; 3269 case UE_DIR_IN | UHCI_INTR_ENDPT: 3270 pipe->methods = &uhci_root_intr_methods; 3271 break; 3272 default: 3273 return (USBD_INVAL); 3274 } 3275 } else { 3276 switch (ed->bmAttributes & UE_XFERTYPE) { 3277 case UE_CONTROL: 3278 pipe->methods = &uhci_device_ctrl_methods; 3279 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3280 if (upipe->u.ctl.sqh == NULL) 3281 goto bad; 3282 upipe->u.ctl.setup = uhci_alloc_std(sc); 3283 if (upipe->u.ctl.setup == NULL) { 3284 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3285 goto bad; 3286 } 3287 upipe->u.ctl.stat = uhci_alloc_std(sc); 3288 if (upipe->u.ctl.stat == NULL) { 3289 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3290 uhci_free_std(sc, upipe->u.ctl.setup); 3291 goto bad; 3292 } 3293 err = usb_allocmem(&sc->sc_bus, 3294 sizeof(usb_device_request_t), 3295 0, &upipe->u.ctl.reqdma); 3296 if (err) { 3297 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3298 uhci_free_std(sc, upipe->u.ctl.setup); 3299 uhci_free_std(sc, upipe->u.ctl.stat); 3300 goto bad; 3301 } 3302 break; 3303 case UE_INTERRUPT: 3304 pipe->methods = &uhci_device_intr_methods; 3305 ival = pipe->interval; 3306 if (ival == USBD_DEFAULT_INTERVAL) 3307 ival = ed->bInterval; 3308 return (uhci_device_setintr(sc, upipe, ival)); 3309 case UE_ISOCHRONOUS: 3310 pipe->methods = &uhci_device_isoc_methods; 3311 return (uhci_setup_isoc(pipe)); 3312 case UE_BULK: 3313 pipe->methods = &uhci_device_bulk_methods; 3314 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3315 if (upipe->u.bulk.sqh == NULL) 3316 goto bad; 3317 break; 3318 } 3319 } 3320 return (USBD_NORMAL_COMPLETION); 3321 3322 bad: 3323 return USBD_NOMEM; 3324 } 3325 3326 /* 3327 * Data structures and routines to emulate the root hub. 3328 */ 3329 usb_device_descriptor_t uhci_devd = { 3330 USB_DEVICE_DESCRIPTOR_SIZE, 3331 UDESC_DEVICE, /* type */ 3332 {0x00, 0x01}, /* USB version */ 3333 UDCLASS_HUB, /* class */ 3334 UDSUBCLASS_HUB, /* subclass */ 3335 UDPROTO_FSHUB, /* protocol */ 3336 64, /* max packet */ 3337 {0},{0},{0x00,0x01}, /* device id */ 3338 1,2,0, /* string indicies */ 3339 1 /* # of configurations */ 3340 }; 3341 3342 const usb_config_descriptor_t uhci_confd = { 3343 USB_CONFIG_DESCRIPTOR_SIZE, 3344 UDESC_CONFIG, 3345 {USB_CONFIG_DESCRIPTOR_SIZE + 3346 USB_INTERFACE_DESCRIPTOR_SIZE + 3347 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3348 1, 3349 1, 3350 0, 3351 UC_ATTR_MBO | UC_SELF_POWERED, 3352 0 /* max power */ 3353 }; 3354 3355 const usb_interface_descriptor_t uhci_ifcd = { 3356 USB_INTERFACE_DESCRIPTOR_SIZE, 3357 UDESC_INTERFACE, 3358 0, 3359 0, 3360 1, 3361 UICLASS_HUB, 3362 UISUBCLASS_HUB, 3363 UIPROTO_FSHUB, 3364 0 3365 }; 3366 3367 const usb_endpoint_descriptor_t uhci_endpd = { 3368 USB_ENDPOINT_DESCRIPTOR_SIZE, 3369 UDESC_ENDPOINT, 3370 UE_DIR_IN | UHCI_INTR_ENDPT, 3371 UE_INTERRUPT, 3372 {8}, 3373 255 3374 }; 3375 3376 const usb_hub_descriptor_t uhci_hubd_piix = { 3377 USB_HUB_DESCRIPTOR_SIZE, 3378 UDESC_HUB, 3379 2, 3380 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3381 50, /* power on to power good */ 3382 0, 3383 { 0x00 }, /* both ports are removable */ 3384 { 0 }, 3385 }; 3386 3387 /* 3388 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3389 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3390 * should not be used by the USB subsystem. As we cannot issue a 3391 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3392 * will be enabled as part of the reset. 3393 * 3394 * On the VT83C572, the port cannot be successfully enabled until the 3395 * outstanding "port enable change" and "connection status change" 3396 * events have been reset. 3397 */ 3398 Static usbd_status 3399 uhci_portreset(uhci_softc_t *sc, int index) 3400 { 3401 int lim, port, x; 3402 3403 if (index == 1) 3404 port = UHCI_PORTSC1; 3405 else if (index == 2) 3406 port = UHCI_PORTSC2; 3407 else 3408 return (USBD_IOERROR); 3409 3410 x = URWMASK(UREAD2(sc, port)); 3411 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3412 3413 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3414 3415 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3416 index, UREAD2(sc, port))); 3417 3418 x = URWMASK(UREAD2(sc, port)); 3419 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3420 3421 delay(100); 3422 3423 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3424 index, UREAD2(sc, port))); 3425 3426 x = URWMASK(UREAD2(sc, port)); 3427 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3428 3429 for (lim = 10; --lim > 0;) { 3430 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3431 3432 x = UREAD2(sc, port); 3433 3434 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3435 index, lim, x)); 3436 3437 if (!(x & UHCI_PORTSC_CCS)) { 3438 /* 3439 * No device is connected (or was disconnected 3440 * during reset). Consider the port reset. 3441 * The delay must be long enough to ensure on 3442 * the initial iteration that the device 3443 * connection will have been registered. 50ms 3444 * appears to be sufficient, but 20ms is not. 3445 */ 3446 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3447 index, lim)); 3448 break; 3449 } 3450 3451 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3452 /* 3453 * Port enabled changed and/or connection 3454 * status changed were set. Reset either or 3455 * both raised flags (by writing a 1 to that 3456 * bit), and wait again for state to settle. 3457 */ 3458 UWRITE2(sc, port, URWMASK(x) | 3459 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3460 continue; 3461 } 3462 3463 if (x & UHCI_PORTSC_PE) 3464 /* Port is enabled */ 3465 break; 3466 3467 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3468 } 3469 3470 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3471 index, UREAD2(sc, port))); 3472 3473 if (lim <= 0) { 3474 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3475 return (USBD_TIMEOUT); 3476 } 3477 3478 sc->sc_isreset = 1; 3479 return (USBD_NORMAL_COMPLETION); 3480 } 3481 3482 /* 3483 * Simulate a hardware hub by handling all the necessary requests. 3484 */ 3485 usbd_status 3486 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3487 { 3488 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3489 usbd_status err; 3490 3491 /* Insert last in queue. */ 3492 mutex_enter(&sc->sc_lock); 3493 err = usb_insert_transfer(xfer); 3494 mutex_exit(&sc->sc_lock); 3495 if (err) 3496 return (err); 3497 3498 /* 3499 * Pipe isn't running (otherwise err would be USBD_INPROG), 3500 * so start it first. 3501 */ 3502 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3503 } 3504 3505 usbd_status 3506 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3507 { 3508 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3509 usb_device_request_t *req; 3510 void *buf = NULL; 3511 int port, x; 3512 int len, value, index, status, change, l, totlen = 0; 3513 usb_port_status_t ps; 3514 usbd_status err; 3515 3516 if (sc->sc_dying) 3517 return (USBD_IOERROR); 3518 3519 #ifdef DIAGNOSTIC 3520 if (!(xfer->rqflags & URQ_REQUEST)) 3521 panic("uhci_root_ctrl_transfer: not a request"); 3522 #endif 3523 req = &xfer->request; 3524 3525 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3526 req->bmRequestType, req->bRequest)); 3527 3528 len = UGETW(req->wLength); 3529 value = UGETW(req->wValue); 3530 index = UGETW(req->wIndex); 3531 3532 if (len != 0) 3533 buf = KERNADDR(&xfer->dmabuf, 0); 3534 3535 #define C(x,y) ((x) | ((y) << 8)) 3536 switch(C(req->bRequest, req->bmRequestType)) { 3537 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3538 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3539 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3540 /* 3541 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3542 * for the integrated root hub. 3543 */ 3544 break; 3545 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3546 if (len > 0) { 3547 *(u_int8_t *)buf = sc->sc_conf; 3548 totlen = 1; 3549 } 3550 break; 3551 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3552 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3553 if (len == 0) 3554 break; 3555 switch(value >> 8) { 3556 case UDESC_DEVICE: 3557 if ((value & 0xff) != 0) { 3558 err = USBD_IOERROR; 3559 goto ret; 3560 } 3561 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3562 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3563 memcpy(buf, &uhci_devd, l); 3564 break; 3565 case UDESC_CONFIG: 3566 if ((value & 0xff) != 0) { 3567 err = USBD_IOERROR; 3568 goto ret; 3569 } 3570 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3571 memcpy(buf, &uhci_confd, l); 3572 buf = (char *)buf + l; 3573 len -= l; 3574 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3575 totlen += l; 3576 memcpy(buf, &uhci_ifcd, l); 3577 buf = (char *)buf + l; 3578 len -= l; 3579 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3580 totlen += l; 3581 memcpy(buf, &uhci_endpd, l); 3582 break; 3583 case UDESC_STRING: 3584 #define sd ((usb_string_descriptor_t *)buf) 3585 switch (value & 0xff) { 3586 case 0: /* Language table */ 3587 totlen = usb_makelangtbl(sd, len); 3588 break; 3589 case 1: /* Vendor */ 3590 totlen = usb_makestrdesc(sd, len, 3591 sc->sc_vendor); 3592 break; 3593 case 2: /* Product */ 3594 totlen = usb_makestrdesc(sd, len, 3595 "UHCI root hub"); 3596 break; 3597 } 3598 #undef sd 3599 break; 3600 default: 3601 err = USBD_IOERROR; 3602 goto ret; 3603 } 3604 break; 3605 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3606 if (len > 0) { 3607 *(u_int8_t *)buf = 0; 3608 totlen = 1; 3609 } 3610 break; 3611 case C(UR_GET_STATUS, UT_READ_DEVICE): 3612 if (len > 1) { 3613 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3614 totlen = 2; 3615 } 3616 break; 3617 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3618 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3619 if (len > 1) { 3620 USETW(((usb_status_t *)buf)->wStatus, 0); 3621 totlen = 2; 3622 } 3623 break; 3624 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3625 if (value >= USB_MAX_DEVICES) { 3626 err = USBD_IOERROR; 3627 goto ret; 3628 } 3629 sc->sc_addr = value; 3630 break; 3631 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3632 if (value != 0 && value != 1) { 3633 err = USBD_IOERROR; 3634 goto ret; 3635 } 3636 sc->sc_conf = value; 3637 break; 3638 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3639 break; 3640 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3641 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3642 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3643 err = USBD_IOERROR; 3644 goto ret; 3645 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3646 break; 3647 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3648 break; 3649 /* Hub requests */ 3650 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3651 break; 3652 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3653 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3654 "port=%d feature=%d\n", 3655 index, value)); 3656 if (index == 1) 3657 port = UHCI_PORTSC1; 3658 else if (index == 2) 3659 port = UHCI_PORTSC2; 3660 else { 3661 err = USBD_IOERROR; 3662 goto ret; 3663 } 3664 switch(value) { 3665 case UHF_PORT_ENABLE: 3666 x = URWMASK(UREAD2(sc, port)); 3667 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3668 break; 3669 case UHF_PORT_SUSPEND: 3670 x = URWMASK(UREAD2(sc, port)); 3671 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3672 break; 3673 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3674 /* see USB2 spec ch. 7.1.7.7 */ 3675 usb_delay_ms(&sc->sc_bus, 20); 3676 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3677 /* 10ms resume delay must be provided by caller */ 3678 break; 3679 case UHF_PORT_RESET: 3680 x = URWMASK(UREAD2(sc, port)); 3681 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3682 break; 3683 case UHF_C_PORT_CONNECTION: 3684 x = URWMASK(UREAD2(sc, port)); 3685 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3686 break; 3687 case UHF_C_PORT_ENABLE: 3688 x = URWMASK(UREAD2(sc, port)); 3689 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3690 break; 3691 case UHF_C_PORT_OVER_CURRENT: 3692 x = URWMASK(UREAD2(sc, port)); 3693 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3694 break; 3695 case UHF_C_PORT_RESET: 3696 sc->sc_isreset = 0; 3697 err = USBD_NORMAL_COMPLETION; 3698 goto ret; 3699 case UHF_PORT_CONNECTION: 3700 case UHF_PORT_OVER_CURRENT: 3701 case UHF_PORT_POWER: 3702 case UHF_PORT_LOW_SPEED: 3703 case UHF_C_PORT_SUSPEND: 3704 default: 3705 err = USBD_IOERROR; 3706 goto ret; 3707 } 3708 break; 3709 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3710 if (index == 1) 3711 port = UHCI_PORTSC1; 3712 else if (index == 2) 3713 port = UHCI_PORTSC2; 3714 else { 3715 err = USBD_IOERROR; 3716 goto ret; 3717 } 3718 if (len > 0) { 3719 *(u_int8_t *)buf = 3720 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3721 UHCI_PORTSC_LS_SHIFT; 3722 totlen = 1; 3723 } 3724 break; 3725 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3726 if (len == 0) 3727 break; 3728 if ((value & 0xff) != 0) { 3729 err = USBD_IOERROR; 3730 goto ret; 3731 } 3732 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3733 totlen = l; 3734 memcpy(buf, &uhci_hubd_piix, l); 3735 break; 3736 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3737 if (len != 4) { 3738 err = USBD_IOERROR; 3739 goto ret; 3740 } 3741 memset(buf, 0, len); 3742 totlen = len; 3743 break; 3744 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3745 if (index == 1) 3746 port = UHCI_PORTSC1; 3747 else if (index == 2) 3748 port = UHCI_PORTSC2; 3749 else { 3750 err = USBD_IOERROR; 3751 goto ret; 3752 } 3753 if (len != 4) { 3754 err = USBD_IOERROR; 3755 goto ret; 3756 } 3757 x = UREAD2(sc, port); 3758 status = change = 0; 3759 if (x & UHCI_PORTSC_CCS) 3760 status |= UPS_CURRENT_CONNECT_STATUS; 3761 if (x & UHCI_PORTSC_CSC) 3762 change |= UPS_C_CONNECT_STATUS; 3763 if (x & UHCI_PORTSC_PE) 3764 status |= UPS_PORT_ENABLED; 3765 if (x & UHCI_PORTSC_POEDC) 3766 change |= UPS_C_PORT_ENABLED; 3767 if (x & UHCI_PORTSC_OCI) 3768 status |= UPS_OVERCURRENT_INDICATOR; 3769 if (x & UHCI_PORTSC_OCIC) 3770 change |= UPS_C_OVERCURRENT_INDICATOR; 3771 if (x & UHCI_PORTSC_SUSP) 3772 status |= UPS_SUSPEND; 3773 if (x & UHCI_PORTSC_LSDA) 3774 status |= UPS_LOW_SPEED; 3775 status |= UPS_PORT_POWER; 3776 if (sc->sc_isreset) 3777 change |= UPS_C_PORT_RESET; 3778 USETW(ps.wPortStatus, status); 3779 USETW(ps.wPortChange, change); 3780 l = min(len, sizeof ps); 3781 memcpy(buf, &ps, l); 3782 totlen = l; 3783 break; 3784 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3785 err = USBD_IOERROR; 3786 goto ret; 3787 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3788 break; 3789 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3790 if (index == 1) 3791 port = UHCI_PORTSC1; 3792 else if (index == 2) 3793 port = UHCI_PORTSC2; 3794 else { 3795 err = USBD_IOERROR; 3796 goto ret; 3797 } 3798 switch(value) { 3799 case UHF_PORT_ENABLE: 3800 x = URWMASK(UREAD2(sc, port)); 3801 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3802 break; 3803 case UHF_PORT_SUSPEND: 3804 x = URWMASK(UREAD2(sc, port)); 3805 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3806 break; 3807 case UHF_PORT_RESET: 3808 err = uhci_portreset(sc, index); 3809 goto ret; 3810 case UHF_PORT_POWER: 3811 /* Pretend we turned on power */ 3812 err = USBD_NORMAL_COMPLETION; 3813 goto ret; 3814 case UHF_C_PORT_CONNECTION: 3815 case UHF_C_PORT_ENABLE: 3816 case UHF_C_PORT_OVER_CURRENT: 3817 case UHF_PORT_CONNECTION: 3818 case UHF_PORT_OVER_CURRENT: 3819 case UHF_PORT_LOW_SPEED: 3820 case UHF_C_PORT_SUSPEND: 3821 case UHF_C_PORT_RESET: 3822 default: 3823 err = USBD_IOERROR; 3824 goto ret; 3825 } 3826 break; 3827 default: 3828 err = USBD_IOERROR; 3829 goto ret; 3830 } 3831 xfer->actlen = totlen; 3832 err = USBD_NORMAL_COMPLETION; 3833 ret: 3834 xfer->status = err; 3835 mutex_enter(&sc->sc_lock); 3836 usb_transfer_complete(xfer); 3837 mutex_exit(&sc->sc_lock); 3838 return (USBD_IN_PROGRESS); 3839 } 3840 3841 /* Abort a root control request. */ 3842 void 3843 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3844 { 3845 /* Nothing to do, all transfers are synchronous. */ 3846 } 3847 3848 /* Close the root pipe. */ 3849 void 3850 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3851 { 3852 DPRINTF(("uhci_root_ctrl_close\n")); 3853 } 3854 3855 /* Abort a root interrupt request. */ 3856 void 3857 uhci_root_intr_abort(usbd_xfer_handle xfer) 3858 { 3859 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3860 3861 callout_stop(&sc->sc_poll_handle); 3862 sc->sc_intr_xfer = NULL; 3863 3864 if (xfer->pipe->intrxfer == xfer) { 3865 DPRINTF(("uhci_root_intr_abort: remove\n")); 3866 xfer->pipe->intrxfer = 0; 3867 } 3868 xfer->status = USBD_CANCELLED; 3869 #ifdef DIAGNOSTIC 3870 UXFER(xfer)->iinfo.isdone = 1; 3871 #endif 3872 usb_transfer_complete(xfer); 3873 } 3874 3875 usbd_status 3876 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3877 { 3878 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3879 usbd_status err; 3880 3881 /* Insert last in queue. */ 3882 mutex_enter(&sc->sc_lock); 3883 err = usb_insert_transfer(xfer); 3884 mutex_exit(&sc->sc_lock); 3885 if (err) 3886 return (err); 3887 3888 /* 3889 * Pipe isn't running (otherwise err would be USBD_INPROG), 3890 * start first 3891 */ 3892 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3893 } 3894 3895 /* Start a transfer on the root interrupt pipe */ 3896 usbd_status 3897 uhci_root_intr_start(usbd_xfer_handle xfer) 3898 { 3899 usbd_pipe_handle pipe = xfer->pipe; 3900 uhci_softc_t *sc = pipe->device->bus->hci_private; 3901 unsigned int ival; 3902 3903 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3904 xfer, xfer->length, xfer->flags)); 3905 3906 if (sc->sc_dying) 3907 return (USBD_IOERROR); 3908 3909 /* XXX temporary variable needed to avoid gcc3 warning */ 3910 ival = xfer->pipe->endpoint->edesc->bInterval; 3911 sc->sc_ival = mstohz(ival); 3912 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3913 sc->sc_intr_xfer = xfer; 3914 return (USBD_IN_PROGRESS); 3915 } 3916 3917 /* Close the root interrupt pipe. */ 3918 void 3919 uhci_root_intr_close(usbd_pipe_handle pipe) 3920 { 3921 uhci_softc_t *sc = pipe->device->bus->hci_private; 3922 3923 callout_stop(&sc->sc_poll_handle); 3924 sc->sc_intr_xfer = NULL; 3925 DPRINTF(("uhci_root_intr_close\n")); 3926 } 3927
Indexes created Tue Sep 30 17:09:57 GMT 2025