uhci.c revision 1.253
1 /* $NetBSD: uhci.c,v 1.253 2013/01/29 00:00:15 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 39 * USB spec: http://www.usb.org/developers/docs/ 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.253 2013/01/29 00:00:15 christos Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/kmem.h> 51 #include <sys/device.h> 52 #include <sys/select.h> 53 #include <sys/extent.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/bus.h> 57 #include <sys/cpu.h> 58 59 #include <machine/endian.h> 60 61 #include <dev/usb/usb.h> 62 #include <dev/usb/usbdi.h> 63 #include <dev/usb/usbdivar.h> 64 #include <dev/usb/usb_mem.h> 65 #include <dev/usb/usb_quirks.h> 66 67 #include <dev/usb/uhcireg.h> 68 #include <dev/usb/uhcivar.h> 69 #include <dev/usb/usbroothub_subr.h> 70 71 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 72 /*#define UHCI_CTL_LOOP */ 73 74 75 76 #ifdef UHCI_DEBUG 77 uhci_softc_t *thesc; 78 #define DPRINTF(x) if (uhcidebug) printf x 79 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 80 int uhcidebug = 0; 81 int uhcinoloop = 0; 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n,x) 85 #endif 86 87 /* 88 * The UHCI controller is little endian, so on big endian machines 89 * the data stored in memory needs to be swapped. 90 */ 91 92 struct uhci_pipe { 93 struct usbd_pipe pipe; 94 int nexttoggle; 95 96 u_char aborting; 97 usbd_xfer_handle abortstart, abortend; 98 99 /* Info needed for different pipe kinds. */ 100 union { 101 /* Control pipe */ 102 struct { 103 uhci_soft_qh_t *sqh; 104 usb_dma_t reqdma; 105 uhci_soft_td_t *setup, *stat; 106 u_int length; 107 } ctl; 108 /* Interrupt pipe */ 109 struct { 110 int npoll; 111 int isread; 112 uhci_soft_qh_t **qhs; 113 } intr; 114 /* Bulk pipe */ 115 struct { 116 uhci_soft_qh_t *sqh; 117 u_int length; 118 int isread; 119 } bulk; 120 /* Iso pipe */ 121 struct iso { 122 uhci_soft_td_t **stds; 123 int next, inuse; 124 } iso; 125 } u; 126 }; 127 128 Static void uhci_globalreset(uhci_softc_t *); 129 Static usbd_status uhci_portreset(uhci_softc_t*, int); 130 Static void uhci_reset(uhci_softc_t *); 131 Static usbd_status uhci_run(uhci_softc_t *, int run, int locked); 132 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 133 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 134 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 135 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 136 #if 0 137 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 138 uhci_intr_info_t *); 139 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 140 #endif 141 142 Static void uhci_free_std_chain(uhci_softc_t *, 143 uhci_soft_td_t *, uhci_soft_td_t *); 144 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 145 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 146 uhci_soft_td_t **, uhci_soft_td_t **); 147 Static void uhci_poll_hub(void *); 148 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 149 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 150 Static void uhci_idone(uhci_intr_info_t *); 151 152 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 153 154 Static void uhci_timeout(void *); 155 Static void uhci_timeout_task(void *); 156 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 157 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 158 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 159 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 160 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 161 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 162 Static void uhci_add_loop(uhci_softc_t *sc); 163 Static void uhci_rem_loop(uhci_softc_t *sc); 164 165 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 166 Static void uhci_device_isoc_enter(usbd_xfer_handle); 167 168 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 169 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 170 171 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 172 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 173 Static void uhci_get_lock(struct usbd_bus *, kmutex_t **); 174 175 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 176 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 177 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 178 Static void uhci_device_ctrl_close(usbd_pipe_handle); 179 Static void uhci_device_ctrl_done(usbd_xfer_handle); 180 181 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 182 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 183 Static void uhci_device_intr_abort(usbd_xfer_handle); 184 Static void uhci_device_intr_close(usbd_pipe_handle); 185 Static void uhci_device_intr_done(usbd_xfer_handle); 186 187 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 188 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 189 Static void uhci_device_bulk_abort(usbd_xfer_handle); 190 Static void uhci_device_bulk_close(usbd_pipe_handle); 191 Static void uhci_device_bulk_done(usbd_xfer_handle); 192 193 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 194 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 195 Static void uhci_device_isoc_abort(usbd_xfer_handle); 196 Static void uhci_device_isoc_close(usbd_pipe_handle); 197 Static void uhci_device_isoc_done(usbd_xfer_handle); 198 199 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 200 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 201 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 202 Static void uhci_root_ctrl_close(usbd_pipe_handle); 203 Static void uhci_root_ctrl_done(usbd_xfer_handle); 204 205 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 206 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 207 Static void uhci_root_intr_abort(usbd_xfer_handle); 208 Static void uhci_root_intr_close(usbd_pipe_handle); 209 Static void uhci_root_intr_done(usbd_xfer_handle); 210 211 Static usbd_status uhci_open(usbd_pipe_handle); 212 Static void uhci_poll(struct usbd_bus *); 213 Static void uhci_softintr(void *); 214 215 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 216 217 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 218 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 219 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 220 struct uhci_pipe *pipe, int ival); 221 222 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 223 Static void uhci_noop(usbd_pipe_handle pipe); 224 225 static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 226 uhci_soft_qh_t *); 227 228 #ifdef UHCI_DEBUG 229 Static void uhci_dump_all(uhci_softc_t *); 230 Static void uhci_dumpregs(uhci_softc_t *); 231 Static void uhci_dump_qhs(uhci_soft_qh_t *); 232 Static void uhci_dump_qh(uhci_soft_qh_t *); 233 Static void uhci_dump_tds(uhci_soft_td_t *); 234 Static void uhci_dump_td(uhci_soft_td_t *); 235 Static void uhci_dump_ii(uhci_intr_info_t *ii); 236 void uhci_dump(void); 237 #endif 238 239 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 240 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 241 #define UWRITE1(sc, r, x) \ 242 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 243 } while (/*CONSTCOND*/0) 244 #define UWRITE2(sc, r, x) \ 245 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 246 } while (/*CONSTCOND*/0) 247 #define UWRITE4(sc, r, x) \ 248 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 249 } while (/*CONSTCOND*/0) 250 static __inline uint8_t 251 UREAD1(uhci_softc_t *sc, bus_size_t r) 252 { 253 254 UBARR(sc); 255 return bus_space_read_1(sc->iot, sc->ioh, r); 256 } 257 258 static __inline uint16_t 259 UREAD2(uhci_softc_t *sc, bus_size_t r) 260 { 261 262 UBARR(sc); 263 return bus_space_read_2(sc->iot, sc->ioh, r); 264 } 265 266 static __inline uint32_t 267 UREAD4(uhci_softc_t *sc, bus_size_t r) 268 { 269 270 UBARR(sc); 271 return bus_space_read_4(sc->iot, sc->ioh, r); 272 } 273 274 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 275 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 276 277 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 278 279 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 280 281 #define UHCI_INTR_ENDPT 1 282 283 const struct usbd_bus_methods uhci_bus_methods = { 284 .open_pipe = uhci_open, 285 .soft_intr = uhci_softintr, 286 .do_poll = uhci_poll, 287 .allocm = uhci_allocm, 288 .freem = uhci_freem, 289 .allocx = uhci_allocx, 290 .freex = uhci_freex, 291 .get_lock = uhci_get_lock, 292 }; 293 294 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 295 .transfer = uhci_root_ctrl_transfer, 296 .start = uhci_root_ctrl_start, 297 .abort = uhci_root_ctrl_abort, 298 .close = uhci_root_ctrl_close, 299 .cleartoggle = uhci_noop, 300 .done = uhci_root_ctrl_done, 301 }; 302 303 const struct usbd_pipe_methods uhci_root_intr_methods = { 304 .transfer = uhci_root_intr_transfer, 305 .start = uhci_root_intr_start, 306 .abort = uhci_root_intr_abort, 307 .close = uhci_root_intr_close, 308 .cleartoggle = uhci_noop, 309 .done = uhci_root_intr_done, 310 }; 311 312 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 313 .transfer = uhci_device_ctrl_transfer, 314 .start = uhci_device_ctrl_start, 315 .abort = uhci_device_ctrl_abort, 316 .close = uhci_device_ctrl_close, 317 .cleartoggle = uhci_noop, 318 .done = uhci_device_ctrl_done, 319 }; 320 321 const struct usbd_pipe_methods uhci_device_intr_methods = { 322 .transfer = uhci_device_intr_transfer, 323 .start = uhci_device_intr_start, 324 .abort = uhci_device_intr_abort, 325 .close = uhci_device_intr_close, 326 .cleartoggle = uhci_device_clear_toggle, 327 .done = uhci_device_intr_done, 328 }; 329 330 const struct usbd_pipe_methods uhci_device_bulk_methods = { 331 .transfer = uhci_device_bulk_transfer, 332 .start = uhci_device_bulk_start, 333 .abort = uhci_device_bulk_abort, 334 .close = uhci_device_bulk_close, 335 .cleartoggle = uhci_device_clear_toggle, 336 .done = uhci_device_bulk_done, 337 }; 338 339 const struct usbd_pipe_methods uhci_device_isoc_methods = { 340 .transfer = uhci_device_isoc_transfer, 341 .start = uhci_device_isoc_start, 342 .abort = uhci_device_isoc_abort, 343 .close = uhci_device_isoc_close, 344 .cleartoggle = uhci_noop, 345 .done = uhci_device_isoc_done, 346 }; 347 348 #define uhci_add_intr_info(sc, ii) \ 349 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 350 #define uhci_del_intr_info(ii) \ 351 do { \ 352 LIST_REMOVE((ii), list); \ 353 (ii)->list.le_prev = NULL; \ 354 } while (0) 355 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 356 357 static inline uhci_soft_qh_t * 358 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 359 { 360 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 361 362 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 363 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 364 usb_syncmem(&pqh->dma, 365 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 366 sizeof(pqh->qh.qh_hlink), 367 BUS_DMASYNC_POSTWRITE); 368 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 369 printf("uhci_find_prev_qh: QH not found\n"); 370 return (NULL); 371 } 372 #endif 373 } 374 return (pqh); 375 } 376 377 void 378 uhci_globalreset(uhci_softc_t *sc) 379 { 380 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 381 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 382 UHCICMD(sc, 0); /* do nothing */ 383 } 384 385 usbd_status 386 uhci_init(uhci_softc_t *sc) 387 { 388 usbd_status err; 389 int i, j; 390 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 391 uhci_soft_td_t *std; 392 393 DPRINTFN(1,("uhci_init: start\n")); 394 395 #ifdef UHCI_DEBUG 396 thesc = sc; 397 398 if (uhcidebug > 2) 399 uhci_dumpregs(sc); 400 #endif 401 402 sc->sc_suspend = PWR_RESUME; 403 404 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 405 uhci_globalreset(sc); /* reset the controller */ 406 uhci_reset(sc); 407 408 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 409 USB_MEM_RESERVE); 410 411 /* Allocate and initialize real frame array. */ 412 err = usb_allocmem(&sc->sc_bus, 413 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 414 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 415 if (err) 416 return (err); 417 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 418 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 419 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 420 421 /* 422 * Allocate a TD, inactive, that hangs from the last QH. 423 * This is to avoid a bug in the PIIX that makes it run berserk 424 * otherwise. 425 */ 426 std = uhci_alloc_std(sc); 427 if (std == NULL) 428 return (USBD_NOMEM); 429 std->link.std = NULL; 430 std->td.td_link = htole32(UHCI_PTR_T); 431 std->td.td_status = htole32(0); /* inactive */ 432 std->td.td_token = htole32(0); 433 std->td.td_buffer = htole32(0); 434 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 435 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 436 437 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 438 lsqh = uhci_alloc_sqh(sc); 439 if (lsqh == NULL) 440 return (USBD_NOMEM); 441 lsqh->hlink = NULL; 442 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 443 lsqh->elink = std; 444 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 445 sc->sc_last_qh = lsqh; 446 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 447 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 448 449 /* Allocate the dummy QH where bulk traffic will be queued. */ 450 bsqh = uhci_alloc_sqh(sc); 451 if (bsqh == NULL) 452 return (USBD_NOMEM); 453 bsqh->hlink = lsqh; 454 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 455 bsqh->elink = NULL; 456 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 457 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 458 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 459 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 460 461 /* Allocate dummy QH where high speed control traffic will be queued. */ 462 chsqh = uhci_alloc_sqh(sc); 463 if (chsqh == NULL) 464 return (USBD_NOMEM); 465 chsqh->hlink = bsqh; 466 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 467 chsqh->elink = NULL; 468 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 469 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 470 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 471 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 472 473 /* Allocate dummy QH where control traffic will be queued. */ 474 clsqh = uhci_alloc_sqh(sc); 475 if (clsqh == NULL) 476 return (USBD_NOMEM); 477 clsqh->hlink = chsqh; 478 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 479 clsqh->elink = NULL; 480 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 481 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 482 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 483 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 484 485 /* 486 * Make all (virtual) frame list pointers point to the interrupt 487 * queue heads and the interrupt queue heads at the control 488 * queue head and point the physical frame list to the virtual. 489 */ 490 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 491 std = uhci_alloc_std(sc); 492 sqh = uhci_alloc_sqh(sc); 493 if (std == NULL || sqh == NULL) 494 return (USBD_NOMEM); 495 std->link.sqh = sqh; 496 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 497 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 498 std->td.td_token = htole32(0); 499 std->td.td_buffer = htole32(0); 500 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 501 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 502 sqh->hlink = clsqh; 503 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 504 sqh->elink = NULL; 505 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 506 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 507 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 508 sc->sc_vframes[i].htd = std; 509 sc->sc_vframes[i].etd = std; 510 sc->sc_vframes[i].hqh = sqh; 511 sc->sc_vframes[i].eqh = sqh; 512 for (j = i; 513 j < UHCI_FRAMELIST_COUNT; 514 j += UHCI_VFRAMELIST_COUNT) 515 sc->sc_pframes[j] = htole32(std->physaddr); 516 } 517 usb_syncmem(&sc->sc_dma, 0, 518 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 519 BUS_DMASYNC_PREWRITE); 520 521 522 LIST_INIT(&sc->sc_intrhead); 523 524 sc->sc_xferpool = pool_cache_init(sizeof(struct uhci_xfer), 0, 0, 0, 525 "uhcixfer", NULL, IPL_USB, NULL, NULL, NULL); 526 527 callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE); 528 529 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 530 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 531 cv_init(&sc->sc_softwake_cv, "uhciab"); 532 533 /* Set up the bus struct. */ 534 sc->sc_bus.methods = &uhci_bus_methods; 535 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 536 537 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 538 539 DPRINTFN(1,("uhci_init: enabling\n")); 540 541 err = uhci_run(sc, 1, 0); /* and here we go... */ 542 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 543 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 544 return err; 545 } 546 547 int 548 uhci_activate(device_t self, enum devact act) 549 { 550 struct uhci_softc *sc = device_private(self); 551 552 switch (act) { 553 case DVACT_DEACTIVATE: 554 sc->sc_dying = 1; 555 return 0; 556 default: 557 return EOPNOTSUPP; 558 } 559 } 560 561 void 562 uhci_childdet(device_t self, device_t child) 563 { 564 struct uhci_softc *sc = device_private(self); 565 566 KASSERT(sc->sc_child == child); 567 sc->sc_child = NULL; 568 } 569 570 int 571 uhci_detach(struct uhci_softc *sc, int flags) 572 { 573 int rv = 0; 574 575 if (sc->sc_child != NULL) 576 rv = config_detach(sc->sc_child, flags); 577 578 if (rv != 0) 579 return (rv); 580 581 pool_cache_destroy(sc->sc_xferpool); 582 583 callout_halt(&sc->sc_poll_handle, NULL); 584 callout_destroy(&sc->sc_poll_handle); 585 586 cv_destroy(&sc->sc_softwake_cv); 587 588 mutex_destroy(&sc->sc_lock); 589 mutex_destroy(&sc->sc_intr_lock); 590 591 /* XXX free other data structures XXX */ 592 593 return (rv); 594 } 595 596 usbd_status 597 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 598 { 599 struct uhci_softc *sc = bus->hci_private; 600 usbd_status status; 601 u_int32_t n; 602 603 /* 604 * XXX 605 * Since we are allocating a buffer we can assume that we will 606 * need TDs for it. Since we don't want to allocate those from 607 * an interrupt context, we allocate them here and free them again. 608 * This is no guarantee that we'll get the TDs next time... 609 */ 610 n = size / 8; 611 if (n > 16) { 612 u_int32_t i; 613 uhci_soft_td_t **stds; 614 615 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 616 stds = kmem_alloc(sizeof(uhci_soft_td_t *) * n, KM_SLEEP); 617 if (!stds) 618 return USBD_NOMEM; 619 for(i = 0; i < n; i++) 620 stds[i] = uhci_alloc_std(sc); 621 for(i = 0; i < n; i++) 622 if (stds[i] != NULL) 623 uhci_free_std(sc, stds[i]); 624 kmem_free(stds, sizeof(uhci_soft_td_t *) * n); 625 } 626 627 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 628 if (status == USBD_NOMEM) 629 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 630 return status; 631 } 632 633 void 634 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 635 { 636 if (dma->block->flags & USB_DMA_RESERVE) { 637 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 638 dma); 639 return; 640 } 641 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 642 } 643 644 usbd_xfer_handle 645 uhci_allocx(struct usbd_bus *bus) 646 { 647 struct uhci_softc *sc = bus->hci_private; 648 usbd_xfer_handle xfer; 649 650 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 651 if (xfer != NULL) { 652 memset(xfer, 0, sizeof(struct uhci_xfer)); 653 #ifdef DIAGNOSTIC 654 UXFER(xfer)->iinfo.isdone = 1; 655 xfer->busy_free = XFER_BUSY; 656 #endif 657 } 658 return (xfer); 659 } 660 661 void 662 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 663 { 664 struct uhci_softc *sc = bus->hci_private; 665 666 #ifdef DIAGNOSTIC 667 if (xfer->busy_free != XFER_BUSY) { 668 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 669 xfer->busy_free); 670 } 671 xfer->busy_free = XFER_FREE; 672 if (!UXFER(xfer)->iinfo.isdone) { 673 printf("uhci_freex: !isdone\n"); 674 } 675 #endif 676 pool_cache_put(sc->sc_xferpool, xfer); 677 } 678 679 Static void 680 uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 681 { 682 struct uhci_softc *sc = bus->hci_private; 683 684 *lock = &sc->sc_lock; 685 } 686 687 688 /* 689 * Handle suspend/resume. 690 * 691 * We need to switch to polling mode here, because this routine is 692 * called from an interrupt context. This is all right since we 693 * are almost suspended anyway. 694 */ 695 bool 696 uhci_resume(device_t dv, const pmf_qual_t *qual) 697 { 698 uhci_softc_t *sc = device_private(dv); 699 int cmd; 700 701 mutex_spin_enter(&sc->sc_intr_lock); 702 703 cmd = UREAD2(sc, UHCI_CMD); 704 sc->sc_bus.use_polling++; 705 UWRITE2(sc, UHCI_INTR, 0); 706 uhci_globalreset(sc); 707 uhci_reset(sc); 708 if (cmd & UHCI_CMD_RS) 709 uhci_run(sc, 0, 1); 710 711 /* restore saved state */ 712 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 713 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 714 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 715 716 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 717 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock); 718 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 719 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 720 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 721 UHCICMD(sc, UHCI_CMD_MAXP); 722 uhci_run(sc, 1, 1); /* and start traffic again */ 723 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock); 724 sc->sc_bus.use_polling--; 725 if (sc->sc_intr_xfer != NULL) 726 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 727 sc->sc_intr_xfer); 728 #ifdef UHCI_DEBUG 729 if (uhcidebug > 2) 730 uhci_dumpregs(sc); 731 #endif 732 733 sc->sc_suspend = PWR_RESUME; 734 mutex_spin_exit(&sc->sc_intr_lock); 735 736 return true; 737 } 738 739 bool 740 uhci_suspend(device_t dv, const pmf_qual_t *qual) 741 { 742 uhci_softc_t *sc = device_private(dv); 743 int cmd; 744 745 mutex_spin_enter(&sc->sc_intr_lock); 746 747 cmd = UREAD2(sc, UHCI_CMD); 748 749 #ifdef UHCI_DEBUG 750 if (uhcidebug > 2) 751 uhci_dumpregs(sc); 752 #endif 753 if (sc->sc_intr_xfer != NULL) 754 callout_stop(&sc->sc_poll_handle); 755 sc->sc_suspend = PWR_SUSPEND; 756 sc->sc_bus.use_polling++; 757 758 uhci_run(sc, 0, 1); /* stop the controller */ 759 cmd &= ~UHCI_CMD_RS; 760 761 /* save some state if BIOS doesn't */ 762 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 763 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 764 765 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 766 767 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 768 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock); 769 sc->sc_bus.use_polling--; 770 771 mutex_spin_exit(&sc->sc_intr_lock); 772 773 return true; 774 } 775 776 #ifdef UHCI_DEBUG 777 Static void 778 uhci_dumpregs(uhci_softc_t *sc) 779 { 780 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 781 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 782 device_xname(sc->sc_dev), 783 UREAD2(sc, UHCI_CMD), 784 UREAD2(sc, UHCI_STS), 785 UREAD2(sc, UHCI_INTR), 786 UREAD2(sc, UHCI_FRNUM), 787 UREAD4(sc, UHCI_FLBASEADDR), 788 UREAD1(sc, UHCI_SOF), 789 UREAD2(sc, UHCI_PORTSC1), 790 UREAD2(sc, UHCI_PORTSC2))); 791 } 792 793 void 794 uhci_dump_td(uhci_soft_td_t *p) 795 { 796 char sbuf[128], sbuf2[128]; 797 798 799 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 800 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 801 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 802 "token=0x%08lx buffer=0x%08lx\n", 803 p, (long)p->physaddr, 804 (long)le32toh(p->td.td_link), 805 (long)le32toh(p->td.td_status), 806 (long)le32toh(p->td.td_token), 807 (long)le32toh(p->td.td_buffer))); 808 809 snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF", 810 (u_int32_t)le32toh(p->td.td_link)); 811 snprintb(sbuf2, sizeof(sbuf2), 812 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 813 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 814 (u_int32_t)le32toh(p->td.td_status)); 815 816 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 817 "D=%d,maxlen=%d\n", sbuf, sbuf2, 818 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 819 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 820 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 821 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 822 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 823 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 824 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 825 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 826 BUS_DMASYNC_PREREAD); 827 } 828 829 void 830 uhci_dump_qh(uhci_soft_qh_t *sqh) 831 { 832 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 833 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 834 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 835 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 836 le32toh(sqh->qh.qh_elink))); 837 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 838 } 839 840 841 #if 1 842 void 843 uhci_dump(void) 844 { 845 uhci_dump_all(thesc); 846 } 847 #endif 848 849 void 850 uhci_dump_all(uhci_softc_t *sc) 851 { 852 uhci_dumpregs(sc); 853 printf("intrs=%d\n", sc->sc_bus.no_intrs); 854 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 855 uhci_dump_qh(sc->sc_lctl_start); 856 } 857 858 859 void 860 uhci_dump_qhs(uhci_soft_qh_t *sqh) 861 { 862 uhci_dump_qh(sqh); 863 864 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 865 * Traverses sideways first, then down. 866 * 867 * QH1 868 * QH2 869 * No QH 870 * TD2.1 871 * TD2.2 872 * TD1.1 873 * etc. 874 * 875 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 876 */ 877 878 879 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 880 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 881 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 882 uhci_dump_qhs(sqh->hlink); 883 else 884 DPRINTF(("No QH\n")); 885 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 886 887 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 888 uhci_dump_tds(sqh->elink); 889 else 890 DPRINTF(("No TD\n")); 891 } 892 893 void 894 uhci_dump_tds(uhci_soft_td_t *std) 895 { 896 uhci_soft_td_t *td; 897 int stop; 898 899 for(td = std; td != NULL; td = td->link.std) { 900 uhci_dump_td(td); 901 902 /* Check whether the link pointer in this TD marks 903 * the link pointer as end of queue. This avoids 904 * printing the free list in case the queue/TD has 905 * already been moved there (seatbelt). 906 */ 907 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 908 sizeof(td->td.td_link), 909 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 910 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 911 le32toh(td->td.td_link) == 0); 912 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 913 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 914 if (stop) 915 break; 916 } 917 } 918 919 Static void 920 uhci_dump_ii(uhci_intr_info_t *ii) 921 { 922 usbd_pipe_handle pipe; 923 usb_endpoint_descriptor_t *ed; 924 usbd_device_handle dev; 925 926 #ifdef DIAGNOSTIC 927 #define DONE ii->isdone 928 #else 929 #define DONE 0 930 #endif 931 if (ii == NULL) { 932 printf("ii NULL\n"); 933 return; 934 } 935 if (ii->xfer == NULL) { 936 printf("ii %p: done=%d xfer=NULL\n", 937 ii, DONE); 938 return; 939 } 940 pipe = ii->xfer->pipe; 941 if (pipe == NULL) { 942 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 943 ii, DONE, ii->xfer); 944 return; 945 } 946 if (pipe->endpoint == NULL) { 947 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 948 ii, DONE, ii->xfer, pipe); 949 return; 950 } 951 if (pipe->device == NULL) { 952 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 953 ii, DONE, ii->xfer, pipe); 954 return; 955 } 956 ed = pipe->endpoint->edesc; 957 dev = pipe->device; 958 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 959 ii, DONE, ii->xfer, dev, 960 UGETW(dev->ddesc.idVendor), 961 UGETW(dev->ddesc.idProduct), 962 dev->address, pipe, 963 ed->bEndpointAddress, ed->bmAttributes); 964 #undef DONE 965 } 966 967 void uhci_dump_iis(struct uhci_softc *sc); 968 void 969 uhci_dump_iis(struct uhci_softc *sc) 970 { 971 uhci_intr_info_t *ii; 972 973 printf("intr_info list:\n"); 974 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 975 uhci_dump_ii(ii); 976 } 977 978 void iidump(void); 979 void iidump(void) { uhci_dump_iis(thesc); } 980 981 #endif 982 983 /* 984 * This routine is executed periodically and simulates interrupts 985 * from the root controller interrupt pipe for port status change. 986 */ 987 void 988 uhci_poll_hub(void *addr) 989 { 990 usbd_xfer_handle xfer = addr; 991 usbd_pipe_handle pipe = xfer->pipe; 992 uhci_softc_t *sc; 993 u_char *p; 994 995 DPRINTFN(20, ("uhci_poll_hub\n")); 996 997 if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL)) 998 return; /* device has detached */ 999 sc = pipe->device->bus->hci_private; 1000 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1001 1002 p = KERNADDR(&xfer->dmabuf, 0); 1003 p[0] = 0; 1004 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1005 p[0] |= 1<<1; 1006 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1007 p[0] |= 1<<2; 1008 if (p[0] == 0) 1009 /* No change, try again in a while */ 1010 return; 1011 1012 xfer->actlen = 1; 1013 xfer->status = USBD_NORMAL_COMPLETION; 1014 mutex_enter(&sc->sc_lock); 1015 usb_transfer_complete(xfer); 1016 mutex_exit(&sc->sc_lock); 1017 } 1018 1019 void 1020 uhci_root_intr_done(usbd_xfer_handle xfer) 1021 { 1022 } 1023 1024 void 1025 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1026 { 1027 } 1028 1029 /* 1030 * Let the last QH loop back to the high speed control transfer QH. 1031 * This is what intel calls "bandwidth reclamation" and improves 1032 * USB performance a lot for some devices. 1033 * If we are already looping, just count it. 1034 */ 1035 void 1036 uhci_add_loop(uhci_softc_t *sc) { 1037 #ifdef UHCI_DEBUG 1038 if (uhcinoloop) 1039 return; 1040 #endif 1041 if (++sc->sc_loops == 1) { 1042 DPRINTFN(5,("uhci_start_loop: add\n")); 1043 /* Note, we don't loop back the soft pointer. */ 1044 sc->sc_last_qh->qh.qh_hlink = 1045 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1046 usb_syncmem(&sc->sc_last_qh->dma, 1047 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1048 sizeof(sc->sc_last_qh->qh.qh_hlink), 1049 BUS_DMASYNC_PREWRITE); 1050 } 1051 } 1052 1053 void 1054 uhci_rem_loop(uhci_softc_t *sc) { 1055 #ifdef UHCI_DEBUG 1056 if (uhcinoloop) 1057 return; 1058 #endif 1059 if (--sc->sc_loops == 0) { 1060 DPRINTFN(5,("uhci_end_loop: remove\n")); 1061 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1062 usb_syncmem(&sc->sc_last_qh->dma, 1063 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1064 sizeof(sc->sc_last_qh->qh.qh_hlink), 1065 BUS_DMASYNC_PREWRITE); 1066 } 1067 } 1068 1069 /* Add high speed control QH, called with lock held. */ 1070 void 1071 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1072 { 1073 uhci_soft_qh_t *eqh; 1074 1075 KASSERT(mutex_owned(&sc->sc_lock)); 1076 1077 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1078 eqh = sc->sc_hctl_end; 1079 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1080 sizeof(eqh->qh.qh_hlink), 1081 BUS_DMASYNC_POSTWRITE); 1082 sqh->hlink = eqh->hlink; 1083 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1084 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1085 BUS_DMASYNC_PREWRITE); 1086 eqh->hlink = sqh; 1087 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1088 sc->sc_hctl_end = sqh; 1089 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1090 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1091 #ifdef UHCI_CTL_LOOP 1092 uhci_add_loop(sc); 1093 #endif 1094 } 1095 1096 /* Remove high speed control QH, called with lock held. */ 1097 void 1098 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1099 { 1100 uhci_soft_qh_t *pqh; 1101 1102 KASSERT(mutex_owned(&sc->sc_lock)); 1103 1104 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1105 #ifdef UHCI_CTL_LOOP 1106 uhci_rem_loop(sc); 1107 #endif 1108 /* 1109 * The T bit should be set in the elink of the QH so that the HC 1110 * doesn't follow the pointer. This condition may fail if the 1111 * the transferred packet was short so that the QH still points 1112 * at the last used TD. 1113 * In this case we set the T bit and wait a little for the HC 1114 * to stop looking at the TD. 1115 * Note that if the TD chain is large enough, the controller 1116 * may still be looking at the chain at the end of this function. 1117 * uhci_free_std_chain() will make sure the controller stops 1118 * looking at it quickly, but until then we should not change 1119 * sqh->hlink. 1120 */ 1121 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1122 sizeof(sqh->qh.qh_elink), 1123 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1124 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1125 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1126 usb_syncmem(&sqh->dma, 1127 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1128 sizeof(sqh->qh.qh_elink), 1129 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1130 delay(UHCI_QH_REMOVE_DELAY); 1131 } 1132 1133 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1134 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1135 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1136 pqh->hlink = sqh->hlink; 1137 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1138 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1139 sizeof(pqh->qh.qh_hlink), 1140 BUS_DMASYNC_PREWRITE); 1141 delay(UHCI_QH_REMOVE_DELAY); 1142 if (sc->sc_hctl_end == sqh) 1143 sc->sc_hctl_end = pqh; 1144 } 1145 1146 /* Add low speed control QH, called with lock held. */ 1147 void 1148 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1149 { 1150 uhci_soft_qh_t *eqh; 1151 1152 KASSERT(mutex_owned(&sc->sc_lock)); 1153 1154 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1155 eqh = sc->sc_lctl_end; 1156 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1157 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1158 sqh->hlink = eqh->hlink; 1159 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1160 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1161 BUS_DMASYNC_PREWRITE); 1162 eqh->hlink = sqh; 1163 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1164 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1165 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1166 sc->sc_lctl_end = sqh; 1167 } 1168 1169 /* Remove low speed control QH, called with lock held. */ 1170 void 1171 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1172 { 1173 uhci_soft_qh_t *pqh; 1174 1175 KASSERT(mutex_owned(&sc->sc_lock)); 1176 1177 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1178 /* See comment in uhci_remove_hs_ctrl() */ 1179 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1180 sizeof(sqh->qh.qh_elink), 1181 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1182 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1183 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1184 usb_syncmem(&sqh->dma, 1185 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1186 sizeof(sqh->qh.qh_elink), 1187 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1188 delay(UHCI_QH_REMOVE_DELAY); 1189 } 1190 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1191 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1192 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1193 pqh->hlink = sqh->hlink; 1194 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1195 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1196 sizeof(pqh->qh.qh_hlink), 1197 BUS_DMASYNC_PREWRITE); 1198 delay(UHCI_QH_REMOVE_DELAY); 1199 if (sc->sc_lctl_end == sqh) 1200 sc->sc_lctl_end = pqh; 1201 } 1202 1203 /* Add bulk QH, called with lock held. */ 1204 void 1205 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1206 { 1207 uhci_soft_qh_t *eqh; 1208 1209 KASSERT(mutex_owned(&sc->sc_lock)); 1210 1211 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1212 eqh = sc->sc_bulk_end; 1213 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1214 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1215 sqh->hlink = eqh->hlink; 1216 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1217 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1218 BUS_DMASYNC_PREWRITE); 1219 eqh->hlink = sqh; 1220 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1221 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1222 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1223 sc->sc_bulk_end = sqh; 1224 uhci_add_loop(sc); 1225 } 1226 1227 /* Remove bulk QH, called with lock held. */ 1228 void 1229 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1230 { 1231 uhci_soft_qh_t *pqh; 1232 1233 KASSERT(mutex_owned(&sc->sc_lock)); 1234 1235 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1236 uhci_rem_loop(sc); 1237 /* See comment in uhci_remove_hs_ctrl() */ 1238 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1239 sizeof(sqh->qh.qh_elink), 1240 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1241 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1242 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1243 usb_syncmem(&sqh->dma, 1244 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1245 sizeof(sqh->qh.qh_elink), 1246 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1247 delay(UHCI_QH_REMOVE_DELAY); 1248 } 1249 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1250 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1251 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1252 pqh->hlink = sqh->hlink; 1253 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1254 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1255 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1256 delay(UHCI_QH_REMOVE_DELAY); 1257 if (sc->sc_bulk_end == sqh) 1258 sc->sc_bulk_end = pqh; 1259 } 1260 1261 Static int uhci_intr1(uhci_softc_t *); 1262 1263 int 1264 uhci_intr(void *arg) 1265 { 1266 uhci_softc_t *sc = arg; 1267 int ret = 0; 1268 1269 mutex_spin_enter(&sc->sc_intr_lock); 1270 1271 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1272 goto done; 1273 1274 if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) { 1275 #ifdef DIAGNOSTIC 1276 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1277 #endif 1278 goto done; 1279 } 1280 1281 ret = uhci_intr1(sc); 1282 1283 done: 1284 mutex_spin_exit(&sc->sc_intr_lock); 1285 return ret; 1286 } 1287 1288 int 1289 uhci_intr1(uhci_softc_t *sc) 1290 { 1291 int status; 1292 int ack; 1293 1294 #ifdef UHCI_DEBUG 1295 if (uhcidebug > 15) { 1296 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1297 uhci_dumpregs(sc); 1298 } 1299 #endif 1300 1301 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1302 1303 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1304 if (status == 0) /* The interrupt was not for us. */ 1305 return (0); 1306 1307 if (sc->sc_suspend != PWR_RESUME) { 1308 #ifdef DIAGNOSTIC 1309 printf("%s: interrupt while not operating ignored\n", 1310 device_xname(sc->sc_dev)); 1311 #endif 1312 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1313 return (0); 1314 } 1315 1316 ack = 0; 1317 if (status & UHCI_STS_USBINT) 1318 ack |= UHCI_STS_USBINT; 1319 if (status & UHCI_STS_USBEI) 1320 ack |= UHCI_STS_USBEI; 1321 if (status & UHCI_STS_RD) { 1322 ack |= UHCI_STS_RD; 1323 #ifdef UHCI_DEBUG 1324 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1325 #endif 1326 } 1327 if (status & UHCI_STS_HSE) { 1328 ack |= UHCI_STS_HSE; 1329 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1330 } 1331 if (status & UHCI_STS_HCPE) { 1332 ack |= UHCI_STS_HCPE; 1333 printf("%s: host controller process error\n", 1334 device_xname(sc->sc_dev)); 1335 } 1336 1337 /* When HCHalted=1 and Run/Stop=0 , it is normal */ 1338 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) { 1339 /* no acknowledge needed */ 1340 if (!sc->sc_dying) { 1341 printf("%s: host controller halted\n", 1342 device_xname(sc->sc_dev)); 1343 #ifdef UHCI_DEBUG 1344 uhci_dump_all(sc); 1345 #endif 1346 } 1347 sc->sc_dying = 1; 1348 } 1349 1350 if (!ack) 1351 return (0); /* nothing to acknowledge */ 1352 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1353 1354 sc->sc_bus.no_intrs++; 1355 usb_schedsoftintr(&sc->sc_bus); 1356 1357 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1358 1359 return (1); 1360 } 1361 1362 void 1363 uhci_softintr(void *v) 1364 { 1365 struct usbd_bus *bus = v; 1366 uhci_softc_t *sc = bus->hci_private; 1367 uhci_intr_info_t *ii, *nextii; 1368 1369 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1370 1371 DPRINTFN(10,("%s: uhci_softintr\n", device_xname(sc->sc_dev))); 1372 1373 /* 1374 * Interrupts on UHCI really suck. When the host controller 1375 * interrupts because a transfer is completed there is no 1376 * way of knowing which transfer it was. You can scan down 1377 * the TDs and QHs of the previous frame to limit the search, 1378 * but that assumes that the interrupt was not delayed by more 1379 * than 1 ms, which may not always be true (e.g. after debug 1380 * output on a slow console). 1381 * We scan all interrupt descriptors to see if any have 1382 * completed. 1383 */ 1384 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1385 nextii = LIST_NEXT(ii, list); 1386 uhci_check_intr(sc, ii); 1387 } 1388 1389 if (sc->sc_softwake) { 1390 sc->sc_softwake = 0; 1391 cv_broadcast(&sc->sc_softwake_cv); 1392 } 1393 } 1394 1395 /* Check for an interrupt. */ 1396 void 1397 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1398 { 1399 uhci_soft_td_t *std, *lstd; 1400 u_int32_t status; 1401 1402 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1403 #ifdef DIAGNOSTIC 1404 if (ii == NULL) { 1405 printf("uhci_check_intr: no ii? %p\n", ii); 1406 return; 1407 } 1408 #endif 1409 if (ii->xfer->status == USBD_CANCELLED || 1410 ii->xfer->status == USBD_TIMEOUT) { 1411 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1412 return; 1413 } 1414 1415 if (ii->stdstart == NULL) 1416 return; 1417 lstd = ii->stdend; 1418 #ifdef DIAGNOSTIC 1419 if (lstd == NULL) { 1420 printf("uhci_check_intr: std==0\n"); 1421 return; 1422 } 1423 #endif 1424 /* 1425 * If the last TD is still active we need to check whether there 1426 * is an error somewhere in the middle, or whether there was a 1427 * short packet (SPD and not ACTIVE). 1428 */ 1429 usb_syncmem(&lstd->dma, 1430 lstd->offs + offsetof(uhci_td_t, td_status), 1431 sizeof(lstd->td.td_status), 1432 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1433 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1434 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1435 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1436 usb_syncmem(&std->dma, 1437 std->offs + offsetof(uhci_td_t, td_status), 1438 sizeof(std->td.td_status), 1439 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1440 status = le32toh(std->td.td_status); 1441 usb_syncmem(&std->dma, 1442 std->offs + offsetof(uhci_td_t, td_status), 1443 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1444 /* If there's an active TD the xfer isn't done. */ 1445 if (status & UHCI_TD_ACTIVE) 1446 break; 1447 /* Any kind of error makes the xfer done. */ 1448 if (status & UHCI_TD_STALLED) 1449 goto done; 1450 /* We want short packets, and it is short: it's done */ 1451 usb_syncmem(&std->dma, 1452 std->offs + offsetof(uhci_td_t, td_token), 1453 sizeof(std->td.td_token), 1454 BUS_DMASYNC_POSTWRITE); 1455 if ((status & UHCI_TD_SPD) && 1456 UHCI_TD_GET_ACTLEN(status) < 1457 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1458 goto done; 1459 } 1460 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1461 ii, ii->stdstart)); 1462 usb_syncmem(&lstd->dma, 1463 lstd->offs + offsetof(uhci_td_t, td_status), 1464 sizeof(lstd->td.td_status), 1465 BUS_DMASYNC_PREREAD); 1466 return; 1467 } 1468 done: 1469 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1470 callout_stop(&ii->xfer->timeout_handle); 1471 uhci_idone(ii); 1472 } 1473 1474 /* Called with USB lock held. */ 1475 void 1476 uhci_idone(uhci_intr_info_t *ii) 1477 { 1478 usbd_xfer_handle xfer = ii->xfer; 1479 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1480 #ifdef DIAGNOSTIC 1481 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1482 #endif 1483 uhci_soft_td_t *std; 1484 u_int32_t status = 0, nstatus; 1485 int actlen; 1486 1487 KASSERT(mutex_owned(&sc->sc_lock)); 1488 1489 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1490 #ifdef DIAGNOSTIC 1491 { 1492 /* XXX SMP? */ 1493 int s = splhigh(); 1494 if (ii->isdone) { 1495 splx(s); 1496 #ifdef UHCI_DEBUG 1497 printf("uhci_idone: ii is done!\n "); 1498 uhci_dump_ii(ii); 1499 #else 1500 printf("uhci_idone: ii=%p is done!\n", ii); 1501 #endif 1502 return; 1503 } 1504 ii->isdone = 1; 1505 splx(s); 1506 } 1507 #endif 1508 1509 if (xfer->nframes != 0) { 1510 /* Isoc transfer, do things differently. */ 1511 uhci_soft_td_t **stds = upipe->u.iso.stds; 1512 int i, n, nframes, len; 1513 1514 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1515 1516 nframes = xfer->nframes; 1517 actlen = 0; 1518 n = UXFER(xfer)->curframe; 1519 for (i = 0; i < nframes; i++) { 1520 std = stds[n]; 1521 #ifdef UHCI_DEBUG 1522 if (uhcidebug > 5) { 1523 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1524 uhci_dump_td(std); 1525 } 1526 #endif 1527 if (++n >= UHCI_VFRAMELIST_COUNT) 1528 n = 0; 1529 usb_syncmem(&std->dma, 1530 std->offs + offsetof(uhci_td_t, td_status), 1531 sizeof(std->td.td_status), 1532 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1533 status = le32toh(std->td.td_status); 1534 len = UHCI_TD_GET_ACTLEN(status); 1535 xfer->frlengths[i] = len; 1536 actlen += len; 1537 } 1538 upipe->u.iso.inuse -= nframes; 1539 xfer->actlen = actlen; 1540 xfer->status = USBD_NORMAL_COMPLETION; 1541 goto end; 1542 } 1543 1544 #ifdef UHCI_DEBUG 1545 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1546 ii, xfer, upipe)); 1547 if (uhcidebug > 10) 1548 uhci_dump_tds(ii->stdstart); 1549 #endif 1550 1551 /* The transfer is done, compute actual length and status. */ 1552 actlen = 0; 1553 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1554 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1555 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1556 nstatus = le32toh(std->td.td_status); 1557 if (nstatus & UHCI_TD_ACTIVE) 1558 break; 1559 1560 status = nstatus; 1561 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1562 UHCI_TD_PID_SETUP) 1563 actlen += UHCI_TD_GET_ACTLEN(status); 1564 else { 1565 /* 1566 * UHCI will report CRCTO in addition to a STALL or NAK 1567 * for a SETUP transaction. See section 3.2.2, "TD 1568 * CONTROL AND STATUS". 1569 */ 1570 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1571 status &= ~UHCI_TD_CRCTO; 1572 } 1573 } 1574 /* If there are left over TDs we need to update the toggle. */ 1575 if (std != NULL) 1576 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1577 1578 status &= UHCI_TD_ERROR; 1579 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1580 actlen, status)); 1581 xfer->actlen = actlen; 1582 if (status != 0) { 1583 #ifdef UHCI_DEBUG 1584 char sbuf[128]; 1585 1586 snprintb(sbuf, sizeof(sbuf), 1587 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1588 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status); 1589 1590 DPRINTFN((status == UHCI_TD_STALLED)*10, 1591 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1592 "status 0x%s\n", 1593 xfer->pipe->device->address, 1594 xfer->pipe->endpoint->edesc->bEndpointAddress, 1595 sbuf)); 1596 #endif 1597 1598 if (status == UHCI_TD_STALLED) 1599 xfer->status = USBD_STALLED; 1600 else 1601 xfer->status = USBD_IOERROR; /* more info XXX */ 1602 } else { 1603 xfer->status = USBD_NORMAL_COMPLETION; 1604 } 1605 1606 end: 1607 usb_transfer_complete(xfer); 1608 KASSERT(mutex_owned(&sc->sc_lock)); 1609 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1610 } 1611 1612 /* 1613 * Called when a request does not complete. 1614 */ 1615 void 1616 uhci_timeout(void *addr) 1617 { 1618 uhci_intr_info_t *ii = addr; 1619 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1620 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1621 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1622 1623 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1624 1625 if (sc->sc_dying) { 1626 mutex_enter(&sc->sc_lock); 1627 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1628 mutex_exit(&sc->sc_lock); 1629 return; 1630 } 1631 1632 /* Execute the abort in a process context. */ 1633 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer, 1634 USB_TASKQ_MPSAFE); 1635 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1636 USB_TASKQ_HC); 1637 } 1638 1639 void 1640 uhci_timeout_task(void *addr) 1641 { 1642 usbd_xfer_handle xfer = addr; 1643 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1644 1645 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1646 1647 mutex_enter(&sc->sc_lock); 1648 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1649 mutex_exit(&sc->sc_lock); 1650 } 1651 1652 /* 1653 * Wait here until controller claims to have an interrupt. 1654 * Then call uhci_intr and return. Use timeout to avoid waiting 1655 * too long. 1656 * Only used during boot when interrupts are not enabled yet. 1657 */ 1658 void 1659 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1660 { 1661 int timo = xfer->timeout; 1662 uhci_intr_info_t *ii; 1663 1664 mutex_enter(&sc->sc_lock); 1665 1666 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1667 1668 xfer->status = USBD_IN_PROGRESS; 1669 for (; timo >= 0; timo--) { 1670 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_lock); 1671 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1672 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1673 mutex_spin_enter(&sc->sc_intr_lock); 1674 uhci_intr1(sc); 1675 mutex_spin_exit(&sc->sc_intr_lock); 1676 if (xfer->status != USBD_IN_PROGRESS) 1677 goto done; 1678 } 1679 } 1680 1681 /* Timeout */ 1682 DPRINTF(("uhci_waitintr: timeout\n")); 1683 for (ii = LIST_FIRST(&sc->sc_intrhead); 1684 ii != NULL && ii->xfer != xfer; 1685 ii = LIST_NEXT(ii, list)) 1686 ; 1687 #ifdef DIAGNOSTIC 1688 if (ii == NULL) 1689 panic("uhci_waitintr: lost intr_info"); 1690 #endif 1691 uhci_idone(ii); 1692 1693 done: 1694 mutex_exit(&sc->sc_lock); 1695 } 1696 1697 void 1698 uhci_poll(struct usbd_bus *bus) 1699 { 1700 uhci_softc_t *sc = bus->hci_private; 1701 1702 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1703 mutex_spin_enter(&sc->sc_intr_lock); 1704 uhci_intr1(sc); 1705 mutex_spin_exit(&sc->sc_intr_lock); 1706 } 1707 } 1708 1709 void 1710 uhci_reset(uhci_softc_t *sc) 1711 { 1712 int n; 1713 1714 UHCICMD(sc, UHCI_CMD_HCRESET); 1715 /* The reset bit goes low when the controller is done. */ 1716 for (n = 0; n < UHCI_RESET_TIMEOUT && 1717 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1718 usb_delay_ms(&sc->sc_bus, 1); 1719 if (n >= UHCI_RESET_TIMEOUT) 1720 printf("%s: controller did not reset\n", 1721 device_xname(sc->sc_dev)); 1722 } 1723 1724 usbd_status 1725 uhci_run(uhci_softc_t *sc, int run, int locked) 1726 { 1727 int n, running; 1728 u_int16_t cmd; 1729 1730 run = run != 0; 1731 if (!locked) 1732 mutex_spin_enter(&sc->sc_intr_lock); 1733 DPRINTF(("uhci_run: setting run=%d\n", run)); 1734 cmd = UREAD2(sc, UHCI_CMD); 1735 if (run) 1736 cmd |= UHCI_CMD_RS; 1737 else 1738 cmd &= ~UHCI_CMD_RS; 1739 UHCICMD(sc, cmd); 1740 for(n = 0; n < 10; n++) { 1741 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1742 /* return when we've entered the state we want */ 1743 if (run == running) { 1744 if (!locked) 1745 mutex_spin_exit(&sc->sc_intr_lock); 1746 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1747 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1748 return (USBD_NORMAL_COMPLETION); 1749 } 1750 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock); 1751 } 1752 if (!locked) 1753 mutex_spin_exit(&sc->sc_intr_lock); 1754 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1755 run ? "start" : "stop"); 1756 return (USBD_IOERROR); 1757 } 1758 1759 /* 1760 * Memory management routines. 1761 * uhci_alloc_std allocates TDs 1762 * uhci_alloc_sqh allocates QHs 1763 * These two routines do their own free list management, 1764 * partly for speed, partly because allocating DMAable memory 1765 * has page size granularaity so much memory would be wasted if 1766 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1767 */ 1768 1769 uhci_soft_td_t * 1770 uhci_alloc_std(uhci_softc_t *sc) 1771 { 1772 uhci_soft_td_t *std; 1773 usbd_status err; 1774 int i, offs; 1775 usb_dma_t dma; 1776 1777 if (sc->sc_freetds == NULL) { 1778 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1779 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1780 UHCI_TD_ALIGN, &dma); 1781 if (err) 1782 return (0); 1783 for (i = 0; i < UHCI_STD_CHUNK; i++) { 1784 offs = i * UHCI_STD_SIZE; 1785 std = KERNADDR(&dma, offs); 1786 std->physaddr = DMAADDR(&dma, offs); 1787 std->dma = dma; 1788 std->offs = offs; 1789 std->link.std = sc->sc_freetds; 1790 sc->sc_freetds = std; 1791 } 1792 } 1793 std = sc->sc_freetds; 1794 sc->sc_freetds = std->link.std; 1795 memset(&std->td, 0, sizeof(uhci_td_t)); 1796 return std; 1797 } 1798 1799 void 1800 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1801 { 1802 #ifdef DIAGNOSTIC 1803 #define TD_IS_FREE 0x12345678 1804 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1805 printf("uhci_free_std: freeing free TD %p\n", std); 1806 return; 1807 } 1808 std->td.td_token = htole32(TD_IS_FREE); 1809 #endif 1810 std->link.std = sc->sc_freetds; 1811 sc->sc_freetds = std; 1812 } 1813 1814 uhci_soft_qh_t * 1815 uhci_alloc_sqh(uhci_softc_t *sc) 1816 { 1817 uhci_soft_qh_t *sqh; 1818 usbd_status err; 1819 int i, offs; 1820 usb_dma_t dma; 1821 1822 if (sc->sc_freeqhs == NULL) { 1823 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1824 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1825 UHCI_QH_ALIGN, &dma); 1826 if (err) 1827 return (0); 1828 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1829 offs = i * UHCI_SQH_SIZE; 1830 sqh = KERNADDR(&dma, offs); 1831 sqh->physaddr = DMAADDR(&dma, offs); 1832 sqh->dma = dma; 1833 sqh->offs = offs; 1834 sqh->hlink = sc->sc_freeqhs; 1835 sc->sc_freeqhs = sqh; 1836 } 1837 } 1838 sqh = sc->sc_freeqhs; 1839 sc->sc_freeqhs = sqh->hlink; 1840 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1841 return (sqh); 1842 } 1843 1844 void 1845 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1846 { 1847 sqh->hlink = sc->sc_freeqhs; 1848 sc->sc_freeqhs = sqh; 1849 } 1850 1851 void 1852 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1853 uhci_soft_td_t *stdend) 1854 { 1855 uhci_soft_td_t *p; 1856 1857 /* 1858 * to avoid race condition with the controller which may be looking 1859 * at this chain, we need to first invalidate all links, and 1860 * then wait for the controller to move to another queue 1861 */ 1862 for (p = std; p != stdend; p = p->link.std) { 1863 usb_syncmem(&p->dma, 1864 p->offs + offsetof(uhci_td_t, td_link), 1865 sizeof(p->td.td_link), 1866 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1867 if ((p->td.td_link & UHCI_PTR_T) == 0) { 1868 p->td.td_link = UHCI_PTR_T; 1869 usb_syncmem(&p->dma, 1870 p->offs + offsetof(uhci_td_t, td_link), 1871 sizeof(p->td.td_link), 1872 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1873 } 1874 } 1875 delay(UHCI_QH_REMOVE_DELAY); 1876 1877 for (; std != stdend; std = p) { 1878 p = std->link.std; 1879 uhci_free_std(sc, std); 1880 } 1881 } 1882 1883 usbd_status 1884 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1885 int rd, u_int16_t flags, usb_dma_t *dma, 1886 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1887 { 1888 uhci_soft_td_t *p, *lastp; 1889 uhci_physaddr_t lastlink; 1890 int i, ntd, l, tog, maxp; 1891 u_int32_t status; 1892 int addr = upipe->pipe.device->address; 1893 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1894 1895 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1896 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1897 upipe->pipe.device->speed, flags)); 1898 1899 KASSERT(mutex_owned(&sc->sc_lock)); 1900 1901 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1902 if (maxp == 0) { 1903 printf("uhci_alloc_std_chain: maxp=0\n"); 1904 return (USBD_INVAL); 1905 } 1906 ntd = (len + maxp - 1) / maxp; 1907 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1908 ntd++; 1909 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1910 if (ntd == 0) { 1911 *sp = *ep = 0; 1912 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1913 return (USBD_NORMAL_COMPLETION); 1914 } 1915 tog = upipe->nexttoggle; 1916 if (ntd % 2 == 0) 1917 tog ^= 1; 1918 upipe->nexttoggle = tog ^ 1; 1919 lastp = NULL; 1920 lastlink = UHCI_PTR_T; 1921 ntd--; 1922 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1923 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1924 status |= UHCI_TD_LS; 1925 if (flags & USBD_SHORT_XFER_OK) 1926 status |= UHCI_TD_SPD; 1927 usb_syncmem(dma, 0, len, 1928 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1929 for (i = ntd; i >= 0; i--) { 1930 p = uhci_alloc_std(sc); 1931 if (p == NULL) { 1932 KASSERT(lastp != NULL); 1933 uhci_free_std_chain(sc, lastp, NULL); 1934 return (USBD_NOMEM); 1935 } 1936 p->link.std = lastp; 1937 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1938 lastp = p; 1939 lastlink = p->physaddr; 1940 p->td.td_status = htole32(status); 1941 if (i == ntd) { 1942 /* last TD */ 1943 l = len % maxp; 1944 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1945 l = maxp; 1946 *ep = p; 1947 } else 1948 l = maxp; 1949 p->td.td_token = 1950 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1951 UHCI_TD_OUT(l, endpt, addr, tog)); 1952 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1953 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 1954 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1955 tog ^= 1; 1956 } 1957 *sp = lastp; 1958 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1959 upipe->nexttoggle)); 1960 return (USBD_NORMAL_COMPLETION); 1961 } 1962 1963 void 1964 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1965 { 1966 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1967 upipe->nexttoggle = 0; 1968 } 1969 1970 void 1971 uhci_noop(usbd_pipe_handle pipe) 1972 { 1973 } 1974 1975 usbd_status 1976 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1977 { 1978 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1979 usbd_status err; 1980 1981 /* Insert last in queue. */ 1982 mutex_enter(&sc->sc_lock); 1983 err = usb_insert_transfer(xfer); 1984 mutex_exit(&sc->sc_lock); 1985 if (err) 1986 return (err); 1987 1988 /* 1989 * Pipe isn't running (otherwise err would be USBD_INPROG), 1990 * so start it first. 1991 */ 1992 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1993 } 1994 1995 usbd_status 1996 uhci_device_bulk_start(usbd_xfer_handle xfer) 1997 { 1998 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1999 usbd_device_handle dev = upipe->pipe.device; 2000 uhci_softc_t *sc = dev->bus->hci_private; 2001 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2002 uhci_soft_td_t *data, *dataend; 2003 uhci_soft_qh_t *sqh; 2004 usbd_status err; 2005 int len, isread, endpt; 2006 2007 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2008 xfer, xfer->length, xfer->flags, ii)); 2009 2010 if (sc->sc_dying) 2011 return (USBD_IOERROR); 2012 2013 #ifdef DIAGNOSTIC 2014 if (xfer->rqflags & URQ_REQUEST) 2015 panic("uhci_device_bulk_transfer: a request"); 2016 #endif 2017 2018 mutex_enter(&sc->sc_lock); 2019 2020 len = xfer->length; 2021 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2022 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2023 sqh = upipe->u.bulk.sqh; 2024 2025 upipe->u.bulk.isread = isread; 2026 upipe->u.bulk.length = len; 2027 2028 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2029 &xfer->dmabuf, &data, &dataend); 2030 if (err) { 2031 mutex_exit(&sc->sc_lock); 2032 return (err); 2033 } 2034 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2035 usb_syncmem(&dataend->dma, 2036 dataend->offs + offsetof(uhci_td_t, td_status), 2037 sizeof(dataend->td.td_status), 2038 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2039 2040 2041 #ifdef UHCI_DEBUG 2042 if (uhcidebug > 8) { 2043 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2044 uhci_dump_tds(data); 2045 } 2046 #endif 2047 2048 /* Set up interrupt info. */ 2049 ii->xfer = xfer; 2050 ii->stdstart = data; 2051 ii->stdend = dataend; 2052 #ifdef DIAGNOSTIC 2053 if (!ii->isdone) { 2054 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2055 } 2056 ii->isdone = 0; 2057 #endif 2058 2059 sqh->elink = data; 2060 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2061 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2062 2063 uhci_add_bulk(sc, sqh); 2064 uhci_add_intr_info(sc, ii); 2065 2066 if (xfer->timeout && !sc->sc_bus.use_polling) { 2067 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2068 uhci_timeout, ii); 2069 } 2070 xfer->status = USBD_IN_PROGRESS; 2071 2072 #ifdef UHCI_DEBUG 2073 if (uhcidebug > 10) { 2074 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2075 uhci_dump_tds(data); 2076 } 2077 #endif 2078 2079 if (sc->sc_bus.use_polling) 2080 uhci_waitintr(sc, xfer); 2081 2082 mutex_exit(&sc->sc_lock); 2083 return (USBD_IN_PROGRESS); 2084 } 2085 2086 /* Abort a device bulk request. */ 2087 void 2088 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2089 { 2090 #ifdef DIAGNOSTIC 2091 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2092 #endif 2093 2094 KASSERT(mutex_owned(&sc->sc_lock)); 2095 2096 DPRINTF(("uhci_device_bulk_abort:\n")); 2097 uhci_abort_xfer(xfer, USBD_CANCELLED); 2098 } 2099 2100 /* 2101 * Abort a device request. 2102 * If this routine is called at splusb() it guarantees that the request 2103 * will be removed from the hardware scheduling and that the callback 2104 * for it will be called with USBD_CANCELLED status. 2105 * It's impossible to guarantee that the requested transfer will not 2106 * have happened since the hardware runs concurrently. 2107 * If the transaction has already happened we rely on the ordinary 2108 * interrupt processing to process it. 2109 * XXX This is most probably wrong. 2110 * XXXMRG this doesn't make sense anymore. 2111 */ 2112 void 2113 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2114 { 2115 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2116 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2117 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2118 uhci_soft_td_t *std; 2119 int wake; 2120 2121 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2122 2123 KASSERT(mutex_owned(&sc->sc_lock)); 2124 2125 if (sc->sc_dying) { 2126 /* If we're dying, just do the software part. */ 2127 xfer->status = status; /* make software ignore it */ 2128 callout_stop(&xfer->timeout_handle); 2129 usb_transfer_complete(xfer); 2130 return; 2131 } 2132 2133 if (cpu_intr_p() || cpu_softintr_p()) 2134 panic("uhci_abort_xfer: not in process context"); 2135 2136 /* 2137 * If an abort is already in progress then just wait for it to 2138 * complete and return. 2139 */ 2140 if (xfer->hcflags & UXFER_ABORTING) { 2141 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2142 #ifdef DIAGNOSTIC 2143 if (status == USBD_TIMEOUT) 2144 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2145 #endif 2146 /* Override the status which might be USBD_TIMEOUT. */ 2147 xfer->status = status; 2148 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2149 xfer->hcflags |= UXFER_ABORTWAIT; 2150 while (xfer->hcflags & UXFER_ABORTING) 2151 cv_wait(&xfer->hccv, &sc->sc_lock); 2152 goto done; 2153 } 2154 xfer->hcflags |= UXFER_ABORTING; 2155 2156 /* 2157 * Step 1: Make interrupt routine and hardware ignore xfer. 2158 */ 2159 xfer->status = status; /* make software ignore it */ 2160 callout_stop(&xfer->timeout_handle); 2161 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2162 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2163 usb_syncmem(&std->dma, 2164 std->offs + offsetof(uhci_td_t, td_status), 2165 sizeof(std->td.td_status), 2166 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2167 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2168 usb_syncmem(&std->dma, 2169 std->offs + offsetof(uhci_td_t, td_status), 2170 sizeof(std->td.td_status), 2171 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2172 } 2173 2174 /* 2175 * Step 2: Wait until we know hardware has finished any possible 2176 * use of the xfer. Also make sure the soft interrupt routine 2177 * has run. 2178 */ 2179 /* Hardware finishes in 1ms */ 2180 usb_delay_ms_locked(upipe->pipe.device->bus, 2, &sc->sc_lock); 2181 sc->sc_softwake = 1; 2182 usb_schedsoftintr(&sc->sc_bus); 2183 DPRINTFN(1,("uhci_abort_xfer: cv_wait\n")); 2184 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2185 2186 /* 2187 * Step 3: Execute callback. 2188 */ 2189 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2190 #ifdef DIAGNOSTIC 2191 ii->isdone = 1; 2192 #endif 2193 wake = xfer->hcflags & UXFER_ABORTWAIT; 2194 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2195 usb_transfer_complete(xfer); 2196 if (wake) 2197 cv_broadcast(&xfer->hccv); 2198 done: 2199 KASSERT(mutex_owned(&sc->sc_lock)); 2200 } 2201 2202 /* Close a device bulk pipe. */ 2203 void 2204 uhci_device_bulk_close(usbd_pipe_handle pipe) 2205 { 2206 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2207 usbd_device_handle dev = upipe->pipe.device; 2208 uhci_softc_t *sc = dev->bus->hci_private; 2209 2210 KASSERT(mutex_owned(&sc->sc_lock)); 2211 2212 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2213 2214 pipe->endpoint->datatoggle = upipe->nexttoggle; 2215 } 2216 2217 usbd_status 2218 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2219 { 2220 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2221 usbd_status err; 2222 2223 /* Insert last in queue. */ 2224 mutex_enter(&sc->sc_lock); 2225 err = usb_insert_transfer(xfer); 2226 mutex_exit(&sc->sc_lock); 2227 if (err) 2228 return (err); 2229 2230 /* 2231 * Pipe isn't running (otherwise err would be USBD_INPROG), 2232 * so start it first. 2233 */ 2234 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2235 } 2236 2237 usbd_status 2238 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2239 { 2240 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2241 usbd_status err; 2242 2243 if (sc->sc_dying) 2244 return (USBD_IOERROR); 2245 2246 #ifdef DIAGNOSTIC 2247 if (!(xfer->rqflags & URQ_REQUEST)) 2248 panic("uhci_device_ctrl_transfer: not a request"); 2249 #endif 2250 2251 mutex_enter(&sc->sc_lock); 2252 err = uhci_device_request(xfer); 2253 mutex_exit(&sc->sc_lock); 2254 if (err) 2255 return (err); 2256 2257 if (sc->sc_bus.use_polling) 2258 uhci_waitintr(sc, xfer); 2259 return (USBD_IN_PROGRESS); 2260 } 2261 2262 usbd_status 2263 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2264 { 2265 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2266 usbd_status err; 2267 2268 /* Insert last in queue. */ 2269 mutex_enter(&sc->sc_lock); 2270 err = usb_insert_transfer(xfer); 2271 mutex_exit(&sc->sc_lock); 2272 if (err) 2273 return (err); 2274 2275 /* 2276 * Pipe isn't running (otherwise err would be USBD_INPROG), 2277 * so start it first. 2278 */ 2279 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2280 } 2281 2282 usbd_status 2283 uhci_device_intr_start(usbd_xfer_handle xfer) 2284 { 2285 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2286 usbd_device_handle dev = upipe->pipe.device; 2287 uhci_softc_t *sc = dev->bus->hci_private; 2288 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2289 uhci_soft_td_t *data, *dataend; 2290 uhci_soft_qh_t *sqh; 2291 usbd_status err; 2292 int isread, endpt; 2293 int i; 2294 2295 if (sc->sc_dying) 2296 return (USBD_IOERROR); 2297 2298 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2299 xfer, xfer->length, xfer->flags)); 2300 2301 #ifdef DIAGNOSTIC 2302 if (xfer->rqflags & URQ_REQUEST) 2303 panic("uhci_device_intr_transfer: a request"); 2304 #endif 2305 2306 mutex_enter(&sc->sc_lock); 2307 2308 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2309 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2310 2311 upipe->u.intr.isread = isread; 2312 2313 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2314 xfer->flags, &xfer->dmabuf, &data, 2315 &dataend); 2316 if (err) { 2317 mutex_exit(&sc->sc_lock); 2318 return (err); 2319 } 2320 2321 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2322 usb_syncmem(&dataend->dma, 2323 dataend->offs + offsetof(uhci_td_t, td_status), 2324 sizeof(dataend->td.td_status), 2325 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2326 2327 #ifdef UHCI_DEBUG 2328 if (uhcidebug > 10) { 2329 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2330 uhci_dump_tds(data); 2331 uhci_dump_qh(upipe->u.intr.qhs[0]); 2332 } 2333 #endif 2334 2335 /* Set up interrupt info. */ 2336 ii->xfer = xfer; 2337 ii->stdstart = data; 2338 ii->stdend = dataend; 2339 #ifdef DIAGNOSTIC 2340 if (!ii->isdone) { 2341 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2342 } 2343 ii->isdone = 0; 2344 #endif 2345 2346 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2347 upipe->u.intr.qhs[0])); 2348 for (i = 0; i < upipe->u.intr.npoll; i++) { 2349 sqh = upipe->u.intr.qhs[i]; 2350 sqh->elink = data; 2351 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2352 usb_syncmem(&sqh->dma, 2353 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2354 sizeof(sqh->qh.qh_elink), 2355 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2356 } 2357 uhci_add_intr_info(sc, ii); 2358 xfer->status = USBD_IN_PROGRESS; 2359 mutex_exit(&sc->sc_lock); 2360 2361 #ifdef UHCI_DEBUG 2362 if (uhcidebug > 10) { 2363 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2364 uhci_dump_tds(data); 2365 uhci_dump_qh(upipe->u.intr.qhs[0]); 2366 } 2367 #endif 2368 2369 return (USBD_IN_PROGRESS); 2370 } 2371 2372 /* Abort a device control request. */ 2373 void 2374 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2375 { 2376 #ifdef DIAGNOSTIC 2377 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2378 #endif 2379 2380 KASSERT(mutex_owned(&sc->sc_lock)); 2381 2382 DPRINTF(("uhci_device_ctrl_abort:\n")); 2383 uhci_abort_xfer(xfer, USBD_CANCELLED); 2384 } 2385 2386 /* Close a device control pipe. */ 2387 void 2388 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2389 { 2390 } 2391 2392 /* Abort a device interrupt request. */ 2393 void 2394 uhci_device_intr_abort(usbd_xfer_handle xfer) 2395 { 2396 #ifdef DIAGNOSTIC 2397 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2398 #endif 2399 2400 KASSERT(mutex_owned(&sc->sc_lock)); 2401 2402 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2403 if (xfer->pipe->intrxfer == xfer) { 2404 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2405 xfer->pipe->intrxfer = NULL; 2406 } 2407 uhci_abort_xfer(xfer, USBD_CANCELLED); 2408 } 2409 2410 /* Close a device interrupt pipe. */ 2411 void 2412 uhci_device_intr_close(usbd_pipe_handle pipe) 2413 { 2414 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2415 uhci_softc_t *sc = pipe->device->bus->hci_private; 2416 int i, npoll; 2417 2418 KASSERT(mutex_owned(&sc->sc_lock)); 2419 2420 /* Unlink descriptors from controller data structures. */ 2421 npoll = upipe->u.intr.npoll; 2422 for (i = 0; i < npoll; i++) 2423 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2424 2425 /* 2426 * We now have to wait for any activity on the physical 2427 * descriptors to stop. 2428 */ 2429 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2430 2431 for(i = 0; i < npoll; i++) 2432 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2433 kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *)); 2434 2435 /* XXX free other resources */ 2436 } 2437 2438 usbd_status 2439 uhci_device_request(usbd_xfer_handle xfer) 2440 { 2441 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2442 usb_device_request_t *req = &xfer->request; 2443 usbd_device_handle dev = upipe->pipe.device; 2444 uhci_softc_t *sc = dev->bus->hci_private; 2445 int addr = dev->address; 2446 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2447 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2448 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2449 uhci_soft_qh_t *sqh; 2450 int len; 2451 u_int32_t ls; 2452 usbd_status err; 2453 int isread; 2454 2455 KASSERT(mutex_owned(&sc->sc_lock)); 2456 2457 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2458 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2459 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2460 UGETW(req->wIndex), UGETW(req->wLength), 2461 addr, endpt)); 2462 2463 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2464 isread = req->bmRequestType & UT_READ; 2465 len = UGETW(req->wLength); 2466 2467 setup = upipe->u.ctl.setup; 2468 stat = upipe->u.ctl.stat; 2469 sqh = upipe->u.ctl.sqh; 2470 2471 /* Set up data transaction */ 2472 if (len != 0) { 2473 upipe->nexttoggle = 1; 2474 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2475 &xfer->dmabuf, &data, &dataend); 2476 if (err) 2477 return (err); 2478 next = data; 2479 dataend->link.std = stat; 2480 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2481 usb_syncmem(&dataend->dma, 2482 dataend->offs + offsetof(uhci_td_t, td_link), 2483 sizeof(dataend->td.td_link), 2484 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2485 } else { 2486 next = stat; 2487 } 2488 upipe->u.ctl.length = len; 2489 2490 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2491 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2492 2493 setup->link.std = next; 2494 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2495 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2496 UHCI_TD_ACTIVE); 2497 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2498 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2499 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2500 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2501 2502 stat->link.std = NULL; 2503 stat->td.td_link = htole32(UHCI_PTR_T); 2504 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2505 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2506 stat->td.td_token = 2507 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2508 UHCI_TD_IN (0, endpt, addr, 1)); 2509 stat->td.td_buffer = htole32(0); 2510 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2511 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2512 2513 #ifdef UHCI_DEBUG 2514 if (uhcidebug > 10) { 2515 DPRINTF(("uhci_device_request: before transfer\n")); 2516 uhci_dump_tds(setup); 2517 } 2518 #endif 2519 2520 /* Set up interrupt info. */ 2521 ii->xfer = xfer; 2522 ii->stdstart = setup; 2523 ii->stdend = stat; 2524 #ifdef DIAGNOSTIC 2525 if (!ii->isdone) { 2526 printf("uhci_device_request: not done, ii=%p\n", ii); 2527 } 2528 ii->isdone = 0; 2529 #endif 2530 2531 sqh->elink = setup; 2532 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2533 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2534 2535 if (dev->speed == USB_SPEED_LOW) 2536 uhci_add_ls_ctrl(sc, sqh); 2537 else 2538 uhci_add_hs_ctrl(sc, sqh); 2539 uhci_add_intr_info(sc, ii); 2540 #ifdef UHCI_DEBUG 2541 if (uhcidebug > 12) { 2542 uhci_soft_td_t *std; 2543 uhci_soft_qh_t *xqh; 2544 uhci_soft_qh_t *sxqh; 2545 int maxqh = 0; 2546 uhci_physaddr_t link; 2547 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2548 for (std = sc->sc_vframes[0].htd, link = 0; 2549 (link & UHCI_PTR_QH) == 0; 2550 std = std->link.std) { 2551 link = le32toh(std->td.td_link); 2552 uhci_dump_td(std); 2553 } 2554 sxqh = (uhci_soft_qh_t *)std; 2555 uhci_dump_qh(sxqh); 2556 for (xqh = sxqh; 2557 xqh != NULL; 2558 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2559 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2560 uhci_dump_qh(xqh); 2561 } 2562 DPRINTF(("Enqueued QH:\n")); 2563 uhci_dump_qh(sqh); 2564 uhci_dump_tds(sqh->elink); 2565 } 2566 #endif 2567 if (xfer->timeout && !sc->sc_bus.use_polling) { 2568 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2569 uhci_timeout, ii); 2570 } 2571 xfer->status = USBD_IN_PROGRESS; 2572 2573 return (USBD_NORMAL_COMPLETION); 2574 } 2575 2576 usbd_status 2577 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2578 { 2579 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2580 usbd_status err; 2581 2582 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2583 2584 /* Put it on our queue, */ 2585 mutex_enter(&sc->sc_lock); 2586 err = usb_insert_transfer(xfer); 2587 mutex_exit(&sc->sc_lock); 2588 2589 /* bail out on error, */ 2590 if (err && err != USBD_IN_PROGRESS) 2591 return (err); 2592 2593 /* XXX should check inuse here */ 2594 2595 /* insert into schedule, */ 2596 uhci_device_isoc_enter(xfer); 2597 2598 /* and start if the pipe wasn't running */ 2599 if (!err) 2600 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2601 2602 return (err); 2603 } 2604 2605 void 2606 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2607 { 2608 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2609 usbd_device_handle dev = upipe->pipe.device; 2610 uhci_softc_t *sc = dev->bus->hci_private; 2611 struct iso *iso = &upipe->u.iso; 2612 uhci_soft_td_t *std; 2613 u_int32_t buf, len, status, offs; 2614 int i, next, nframes; 2615 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2616 2617 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2618 "nframes=%d\n", 2619 iso->inuse, iso->next, xfer, xfer->nframes)); 2620 2621 if (sc->sc_dying) 2622 return; 2623 2624 if (xfer->status == USBD_IN_PROGRESS) { 2625 /* This request has already been entered into the frame list */ 2626 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2627 /* XXX */ 2628 } 2629 2630 #ifdef DIAGNOSTIC 2631 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2632 printf("uhci_device_isoc_enter: overflow!\n"); 2633 #endif 2634 2635 next = iso->next; 2636 if (next == -1) { 2637 /* Not in use yet, schedule it a few frames ahead. */ 2638 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2639 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2640 } 2641 2642 xfer->status = USBD_IN_PROGRESS; 2643 UXFER(xfer)->curframe = next; 2644 2645 buf = DMAADDR(&xfer->dmabuf, 0); 2646 offs = 0; 2647 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2648 UHCI_TD_ACTIVE | 2649 UHCI_TD_IOS); 2650 nframes = xfer->nframes; 2651 mutex_enter(&sc->sc_lock); 2652 for (i = 0; i < nframes; i++) { 2653 std = iso->stds[next]; 2654 if (++next >= UHCI_VFRAMELIST_COUNT) 2655 next = 0; 2656 len = xfer->frlengths[i]; 2657 std->td.td_buffer = htole32(buf); 2658 usb_syncmem(&xfer->dmabuf, offs, len, 2659 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2660 if (i == nframes - 1) 2661 status |= UHCI_TD_IOC; 2662 std->td.td_status = htole32(status); 2663 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2664 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2665 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2666 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2667 #ifdef UHCI_DEBUG 2668 if (uhcidebug > 5) { 2669 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2670 uhci_dump_td(std); 2671 } 2672 #endif 2673 buf += len; 2674 offs += len; 2675 } 2676 iso->next = next; 2677 iso->inuse += xfer->nframes; 2678 2679 mutex_exit(&sc->sc_lock); 2680 } 2681 2682 usbd_status 2683 uhci_device_isoc_start(usbd_xfer_handle xfer) 2684 { 2685 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2686 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2687 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2688 uhci_soft_td_t *end; 2689 int i; 2690 2691 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2692 2693 mutex_enter(&sc->sc_lock); 2694 2695 if (sc->sc_dying) { 2696 mutex_exit(&sc->sc_lock); 2697 return (USBD_IOERROR); 2698 } 2699 2700 #ifdef DIAGNOSTIC 2701 if (xfer->status != USBD_IN_PROGRESS) 2702 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2703 #endif 2704 2705 /* Find the last TD */ 2706 i = UXFER(xfer)->curframe + xfer->nframes; 2707 if (i >= UHCI_VFRAMELIST_COUNT) 2708 i -= UHCI_VFRAMELIST_COUNT; 2709 end = upipe->u.iso.stds[i]; 2710 2711 #ifdef DIAGNOSTIC 2712 if (end == NULL) { 2713 printf("uhci_device_isoc_start: end == NULL\n"); 2714 return (USBD_INVAL); 2715 } 2716 #endif 2717 2718 /* Set up interrupt info. */ 2719 ii->xfer = xfer; 2720 ii->stdstart = end; 2721 ii->stdend = end; 2722 #ifdef DIAGNOSTIC 2723 if (!ii->isdone) 2724 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2725 ii->isdone = 0; 2726 #endif 2727 uhci_add_intr_info(sc, ii); 2728 2729 mutex_exit(&sc->sc_lock); 2730 2731 return (USBD_IN_PROGRESS); 2732 } 2733 2734 void 2735 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2736 { 2737 #ifdef DIAGNOSTIC 2738 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2739 #endif 2740 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2741 uhci_soft_td_t **stds = upipe->u.iso.stds; 2742 uhci_soft_td_t *std; 2743 int i, n, nframes, maxlen, len; 2744 2745 KASSERT(mutex_owned(&sc->sc_lock)); 2746 2747 /* Transfer is already done. */ 2748 if (xfer->status != USBD_NOT_STARTED && 2749 xfer->status != USBD_IN_PROGRESS) { 2750 return; 2751 } 2752 2753 /* Give xfer the requested abort code. */ 2754 xfer->status = USBD_CANCELLED; 2755 2756 /* make hardware ignore it, */ 2757 nframes = xfer->nframes; 2758 n = UXFER(xfer)->curframe; 2759 maxlen = 0; 2760 for (i = 0; i < nframes; i++) { 2761 std = stds[n]; 2762 usb_syncmem(&std->dma, 2763 std->offs + offsetof(uhci_td_t, td_status), 2764 sizeof(std->td.td_status), 2765 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2766 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2767 usb_syncmem(&std->dma, 2768 std->offs + offsetof(uhci_td_t, td_status), 2769 sizeof(std->td.td_status), 2770 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2771 usb_syncmem(&std->dma, 2772 std->offs + offsetof(uhci_td_t, td_token), 2773 sizeof(std->td.td_token), 2774 BUS_DMASYNC_POSTWRITE); 2775 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2776 if (len > maxlen) 2777 maxlen = len; 2778 if (++n >= UHCI_VFRAMELIST_COUNT) 2779 n = 0; 2780 } 2781 2782 /* and wait until we are sure the hardware has finished. */ 2783 delay(maxlen); 2784 2785 #ifdef DIAGNOSTIC 2786 UXFER(xfer)->iinfo.isdone = 1; 2787 #endif 2788 /* Run callback and remove from interrupt list. */ 2789 usb_transfer_complete(xfer); 2790 2791 KASSERT(mutex_owned(&sc->sc_lock)); 2792 } 2793 2794 void 2795 uhci_device_isoc_close(usbd_pipe_handle pipe) 2796 { 2797 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2798 usbd_device_handle dev = upipe->pipe.device; 2799 uhci_softc_t *sc = dev->bus->hci_private; 2800 uhci_soft_td_t *std, *vstd; 2801 struct iso *iso; 2802 int i; 2803 2804 KASSERT(mutex_owned(&sc->sc_lock)); 2805 2806 /* 2807 * Make sure all TDs are marked as inactive. 2808 * Wait for completion. 2809 * Unschedule. 2810 * Deallocate. 2811 */ 2812 iso = &upipe->u.iso; 2813 2814 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2815 std = iso->stds[i]; 2816 usb_syncmem(&std->dma, 2817 std->offs + offsetof(uhci_td_t, td_status), 2818 sizeof(std->td.td_status), 2819 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2820 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2821 usb_syncmem(&std->dma, 2822 std->offs + offsetof(uhci_td_t, td_status), 2823 sizeof(std->td.td_status), 2824 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2825 } 2826 /* wait for completion */ 2827 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2828 2829 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2830 std = iso->stds[i]; 2831 for (vstd = sc->sc_vframes[i].htd; 2832 vstd != NULL && vstd->link.std != std; 2833 vstd = vstd->link.std) 2834 ; 2835 if (vstd == NULL) { 2836 /*panic*/ 2837 printf("uhci_device_isoc_close: %p not found\n", std); 2838 mutex_exit(&sc->sc_lock); 2839 return; 2840 } 2841 vstd->link = std->link; 2842 usb_syncmem(&std->dma, 2843 std->offs + offsetof(uhci_td_t, td_link), 2844 sizeof(std->td.td_link), 2845 BUS_DMASYNC_POSTWRITE); 2846 vstd->td.td_link = std->td.td_link; 2847 usb_syncmem(&vstd->dma, 2848 vstd->offs + offsetof(uhci_td_t, td_link), 2849 sizeof(vstd->td.td_link), 2850 BUS_DMASYNC_PREWRITE); 2851 uhci_free_std(sc, std); 2852 } 2853 2854 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2855 } 2856 2857 usbd_status 2858 uhci_setup_isoc(usbd_pipe_handle pipe) 2859 { 2860 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2861 usbd_device_handle dev = upipe->pipe.device; 2862 uhci_softc_t *sc = dev->bus->hci_private; 2863 int addr = upipe->pipe.device->address; 2864 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2865 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2866 uhci_soft_td_t *std, *vstd; 2867 u_int32_t token; 2868 struct iso *iso; 2869 int i; 2870 2871 iso = &upipe->u.iso; 2872 iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT * 2873 sizeof (uhci_soft_td_t *), 2874 KM_SLEEP); 2875 if (iso->stds == NULL) 2876 return USBD_NOMEM; 2877 2878 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2879 UHCI_TD_OUT(0, endpt, addr, 0); 2880 2881 mutex_enter(&sc->sc_lock); 2882 2883 /* Allocate the TDs and mark as inactive; */ 2884 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2885 std = uhci_alloc_std(sc); 2886 if (std == 0) 2887 goto bad; 2888 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2889 std->td.td_token = htole32(token); 2890 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2891 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2892 iso->stds[i] = std; 2893 } 2894 2895 /* Insert TDs into schedule. */ 2896 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2897 std = iso->stds[i]; 2898 vstd = sc->sc_vframes[i].htd; 2899 usb_syncmem(&vstd->dma, 2900 vstd->offs + offsetof(uhci_td_t, td_link), 2901 sizeof(vstd->td.td_link), 2902 BUS_DMASYNC_POSTWRITE); 2903 std->link = vstd->link; 2904 std->td.td_link = vstd->td.td_link; 2905 usb_syncmem(&std->dma, 2906 std->offs + offsetof(uhci_td_t, td_link), 2907 sizeof(std->td.td_link), 2908 BUS_DMASYNC_PREWRITE); 2909 vstd->link.std = std; 2910 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2911 usb_syncmem(&vstd->dma, 2912 vstd->offs + offsetof(uhci_td_t, td_link), 2913 sizeof(vstd->td.td_link), 2914 BUS_DMASYNC_PREWRITE); 2915 } 2916 mutex_exit(&sc->sc_lock); 2917 2918 iso->next = -1; 2919 iso->inuse = 0; 2920 2921 return (USBD_NORMAL_COMPLETION); 2922 2923 bad: 2924 while (--i >= 0) 2925 uhci_free_std(sc, iso->stds[i]); 2926 mutex_exit(&sc->sc_lock); 2927 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2928 return (USBD_NOMEM); 2929 } 2930 2931 void 2932 uhci_device_isoc_done(usbd_xfer_handle xfer) 2933 { 2934 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2935 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2936 int i, offs; 2937 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2938 2939 2940 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2941 xfer->actlen, xfer->busy_free)); 2942 2943 if (ii->xfer != xfer) 2944 /* Not on interrupt list, ignore it. */ 2945 return; 2946 2947 if (!uhci_active_intr_info(ii)) 2948 return; 2949 2950 #ifdef DIAGNOSTIC 2951 if (ii->stdend == NULL) { 2952 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2953 #ifdef UHCI_DEBUG 2954 uhci_dump_ii(ii); 2955 #endif 2956 return; 2957 } 2958 #endif 2959 2960 /* Turn off the interrupt since it is active even if the TD is not. */ 2961 usb_syncmem(&ii->stdend->dma, 2962 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2963 sizeof(ii->stdend->td.td_status), 2964 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2965 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2966 usb_syncmem(&ii->stdend->dma, 2967 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2968 sizeof(ii->stdend->td.td_status), 2969 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2970 2971 uhci_del_intr_info(ii); /* remove from active list */ 2972 2973 offs = 0; 2974 for (i = 0; i < xfer->nframes; i++) { 2975 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i], 2976 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2977 offs += xfer->frlengths[i]; 2978 } 2979 } 2980 2981 void 2982 uhci_device_intr_done(usbd_xfer_handle xfer) 2983 { 2984 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2985 uhci_softc_t *sc = ii->sc; 2986 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2987 uhci_soft_qh_t *sqh; 2988 int i, npoll, isread; 2989 2990 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2991 2992 KASSERT(mutex_owned(&sc->sc_lock)); 2993 2994 npoll = upipe->u.intr.npoll; 2995 for(i = 0; i < npoll; i++) { 2996 sqh = upipe->u.intr.qhs[i]; 2997 sqh->elink = NULL; 2998 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2999 usb_syncmem(&sqh->dma, 3000 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3001 sizeof(sqh->qh.qh_elink), 3002 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3003 } 3004 uhci_free_std_chain(sc, ii->stdstart, NULL); 3005 3006 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 3007 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 3008 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3009 3010 /* XXX Wasteful. */ 3011 if (xfer->pipe->repeat) { 3012 uhci_soft_td_t *data, *dataend; 3013 3014 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 3015 3016 /* This alloc cannot fail since we freed the chain above. */ 3017 uhci_alloc_std_chain(upipe, sc, xfer->length, 3018 upipe->u.intr.isread, xfer->flags, 3019 &xfer->dmabuf, &data, &dataend); 3020 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3021 usb_syncmem(&dataend->dma, 3022 dataend->offs + offsetof(uhci_td_t, td_status), 3023 sizeof(dataend->td.td_status), 3024 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3025 3026 #ifdef UHCI_DEBUG 3027 if (uhcidebug > 10) { 3028 DPRINTF(("uhci_device_intr_done: data(1)\n")); 3029 uhci_dump_tds(data); 3030 uhci_dump_qh(upipe->u.intr.qhs[0]); 3031 } 3032 #endif 3033 3034 ii->stdstart = data; 3035 ii->stdend = dataend; 3036 #ifdef DIAGNOSTIC 3037 if (!ii->isdone) { 3038 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3039 } 3040 ii->isdone = 0; 3041 #endif 3042 for (i = 0; i < npoll; i++) { 3043 sqh = upipe->u.intr.qhs[i]; 3044 sqh->elink = data; 3045 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3046 usb_syncmem(&sqh->dma, 3047 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3048 sizeof(sqh->qh.qh_elink), 3049 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3050 } 3051 xfer->status = USBD_IN_PROGRESS; 3052 /* The ii is already on the examined list, just leave it. */ 3053 } else { 3054 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3055 if (uhci_active_intr_info(ii)) 3056 uhci_del_intr_info(ii); 3057 } 3058 } 3059 3060 /* Deallocate request data structures */ 3061 void 3062 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3063 { 3064 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3065 uhci_softc_t *sc = ii->sc; 3066 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3067 int len = UGETW(xfer->request.wLength); 3068 int isread = (xfer->request.bmRequestType & UT_READ); 3069 3070 KASSERT(mutex_owned(&sc->sc_lock)); 3071 3072 #ifdef DIAGNOSTIC 3073 if (!(xfer->rqflags & URQ_REQUEST)) 3074 panic("uhci_device_ctrl_done: not a request"); 3075 #endif 3076 3077 if (!uhci_active_intr_info(ii)) 3078 return; 3079 3080 uhci_del_intr_info(ii); /* remove from active list */ 3081 3082 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3083 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3084 else 3085 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3086 3087 if (upipe->u.ctl.length != 0) 3088 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3089 3090 if (len) { 3091 usb_syncmem(&xfer->dmabuf, 0, len, 3092 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3093 } 3094 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3095 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3096 3097 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3098 } 3099 3100 /* Deallocate request data structures */ 3101 void 3102 uhci_device_bulk_done(usbd_xfer_handle xfer) 3103 { 3104 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3105 uhci_softc_t *sc = ii->sc; 3106 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3107 3108 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3109 xfer, ii, sc, upipe)); 3110 3111 KASSERT(mutex_owned(&sc->sc_lock)); 3112 3113 if (!uhci_active_intr_info(ii)) 3114 return; 3115 3116 uhci_del_intr_info(ii); /* remove from active list */ 3117 3118 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3119 3120 uhci_free_std_chain(sc, ii->stdstart, NULL); 3121 3122 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3123 } 3124 3125 /* Add interrupt QH, called with vflock. */ 3126 void 3127 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3128 { 3129 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3130 uhci_soft_qh_t *eqh; 3131 3132 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3133 3134 eqh = vf->eqh; 3135 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3136 sizeof(eqh->qh.qh_hlink), 3137 BUS_DMASYNC_POSTWRITE); 3138 sqh->hlink = eqh->hlink; 3139 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3140 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3141 sizeof(sqh->qh.qh_hlink), 3142 BUS_DMASYNC_PREWRITE); 3143 eqh->hlink = sqh; 3144 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3145 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3146 sizeof(eqh->qh.qh_hlink), 3147 BUS_DMASYNC_PREWRITE); 3148 vf->eqh = sqh; 3149 vf->bandwidth++; 3150 } 3151 3152 /* Remove interrupt QH. */ 3153 void 3154 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3155 { 3156 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3157 uhci_soft_qh_t *pqh; 3158 3159 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3160 3161 /* See comment in uhci_remove_ctrl() */ 3162 3163 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3164 sizeof(sqh->qh.qh_elink), 3165 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3166 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3167 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3168 usb_syncmem(&sqh->dma, 3169 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3170 sizeof(sqh->qh.qh_elink), 3171 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3172 delay(UHCI_QH_REMOVE_DELAY); 3173 } 3174 3175 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3176 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3177 sizeof(sqh->qh.qh_hlink), 3178 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3179 pqh->hlink = sqh->hlink; 3180 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3181 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3182 sizeof(pqh->qh.qh_hlink), 3183 BUS_DMASYNC_PREWRITE); 3184 delay(UHCI_QH_REMOVE_DELAY); 3185 if (vf->eqh == sqh) 3186 vf->eqh = pqh; 3187 vf->bandwidth--; 3188 } 3189 3190 usbd_status 3191 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3192 { 3193 uhci_soft_qh_t *sqh; 3194 int i, npoll; 3195 u_int bestbw, bw, bestoffs, offs; 3196 3197 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3198 if (ival == 0) { 3199 printf("uhci_device_setintr: 0 interval\n"); 3200 return (USBD_INVAL); 3201 } 3202 3203 if (ival > UHCI_VFRAMELIST_COUNT) 3204 ival = UHCI_VFRAMELIST_COUNT; 3205 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3206 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3207 3208 upipe->u.intr.npoll = npoll; 3209 upipe->u.intr.qhs = 3210 kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP); 3211 if (upipe->u.intr.qhs == NULL) 3212 return USBD_NOMEM; 3213 3214 /* 3215 * Figure out which offset in the schedule that has most 3216 * bandwidth left over. 3217 */ 3218 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3219 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3220 for (bw = i = 0; i < npoll; i++) 3221 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3222 if (bw < bestbw) { 3223 bestbw = bw; 3224 bestoffs = offs; 3225 } 3226 } 3227 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3228 3229 mutex_enter(&sc->sc_lock); 3230 for(i = 0; i < npoll; i++) { 3231 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3232 sqh->elink = NULL; 3233 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3234 usb_syncmem(&sqh->dma, 3235 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3236 sizeof(sqh->qh.qh_elink), 3237 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3238 sqh->pos = MOD(i * ival + bestoffs); 3239 } 3240 #undef MOD 3241 3242 /* Enter QHs into the controller data structures. */ 3243 for(i = 0; i < npoll; i++) 3244 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3245 mutex_exit(&sc->sc_lock); 3246 3247 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3248 return (USBD_NORMAL_COMPLETION); 3249 } 3250 3251 /* Open a new pipe. */ 3252 usbd_status 3253 uhci_open(usbd_pipe_handle pipe) 3254 { 3255 uhci_softc_t *sc = pipe->device->bus->hci_private; 3256 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3257 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3258 usbd_status err = USBD_NOMEM; 3259 int ival; 3260 3261 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3262 pipe, pipe->device->address, 3263 ed->bEndpointAddress, sc->sc_addr)); 3264 3265 if (sc->sc_dying) 3266 return USBD_IOERROR; 3267 3268 upipe->aborting = 0; 3269 /* toggle state needed for bulk endpoints */ 3270 upipe->nexttoggle = pipe->endpoint->datatoggle; 3271 3272 if (pipe->device->address == sc->sc_addr) { 3273 switch (ed->bEndpointAddress) { 3274 case USB_CONTROL_ENDPOINT: 3275 pipe->methods = &uhci_root_ctrl_methods; 3276 break; 3277 case UE_DIR_IN | UHCI_INTR_ENDPT: 3278 pipe->methods = &uhci_root_intr_methods; 3279 break; 3280 default: 3281 return (USBD_INVAL); 3282 } 3283 } else { 3284 switch (ed->bmAttributes & UE_XFERTYPE) { 3285 case UE_CONTROL: 3286 pipe->methods = &uhci_device_ctrl_methods; 3287 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3288 if (upipe->u.ctl.sqh == NULL) 3289 goto bad; 3290 upipe->u.ctl.setup = uhci_alloc_std(sc); 3291 if (upipe->u.ctl.setup == NULL) { 3292 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3293 goto bad; 3294 } 3295 upipe->u.ctl.stat = uhci_alloc_std(sc); 3296 if (upipe->u.ctl.stat == NULL) { 3297 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3298 uhci_free_std(sc, upipe->u.ctl.setup); 3299 goto bad; 3300 } 3301 err = usb_allocmem(&sc->sc_bus, 3302 sizeof(usb_device_request_t), 3303 0, &upipe->u.ctl.reqdma); 3304 if (err) { 3305 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3306 uhci_free_std(sc, upipe->u.ctl.setup); 3307 uhci_free_std(sc, upipe->u.ctl.stat); 3308 goto bad; 3309 } 3310 break; 3311 case UE_INTERRUPT: 3312 pipe->methods = &uhci_device_intr_methods; 3313 ival = pipe->interval; 3314 if (ival == USBD_DEFAULT_INTERVAL) 3315 ival = ed->bInterval; 3316 return (uhci_device_setintr(sc, upipe, ival)); 3317 case UE_ISOCHRONOUS: 3318 pipe->methods = &uhci_device_isoc_methods; 3319 return (uhci_setup_isoc(pipe)); 3320 case UE_BULK: 3321 pipe->methods = &uhci_device_bulk_methods; 3322 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3323 if (upipe->u.bulk.sqh == NULL) 3324 goto bad; 3325 break; 3326 } 3327 } 3328 return (USBD_NORMAL_COMPLETION); 3329 3330 bad: 3331 return USBD_NOMEM; 3332 } 3333 3334 /* 3335 * Data structures and routines to emulate the root hub. 3336 */ 3337 usb_device_descriptor_t uhci_devd = { 3338 USB_DEVICE_DESCRIPTOR_SIZE, 3339 UDESC_DEVICE, /* type */ 3340 {0x00, 0x01}, /* USB version */ 3341 UDCLASS_HUB, /* class */ 3342 UDSUBCLASS_HUB, /* subclass */ 3343 UDPROTO_FSHUB, /* protocol */ 3344 64, /* max packet */ 3345 {0},{0},{0x00,0x01}, /* device id */ 3346 1,2,0, /* string indicies */ 3347 1 /* # of configurations */ 3348 }; 3349 3350 const usb_config_descriptor_t uhci_confd = { 3351 USB_CONFIG_DESCRIPTOR_SIZE, 3352 UDESC_CONFIG, 3353 {USB_CONFIG_DESCRIPTOR_SIZE + 3354 USB_INTERFACE_DESCRIPTOR_SIZE + 3355 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3356 1, 3357 1, 3358 0, 3359 UC_ATTR_MBO | UC_SELF_POWERED, 3360 0 /* max power */ 3361 }; 3362 3363 const usb_interface_descriptor_t uhci_ifcd = { 3364 USB_INTERFACE_DESCRIPTOR_SIZE, 3365 UDESC_INTERFACE, 3366 0, 3367 0, 3368 1, 3369 UICLASS_HUB, 3370 UISUBCLASS_HUB, 3371 UIPROTO_FSHUB, 3372 0 3373 }; 3374 3375 const usb_endpoint_descriptor_t uhci_endpd = { 3376 USB_ENDPOINT_DESCRIPTOR_SIZE, 3377 UDESC_ENDPOINT, 3378 UE_DIR_IN | UHCI_INTR_ENDPT, 3379 UE_INTERRUPT, 3380 {8}, 3381 255 3382 }; 3383 3384 const usb_hub_descriptor_t uhci_hubd_piix = { 3385 USB_HUB_DESCRIPTOR_SIZE, 3386 UDESC_HUB, 3387 2, 3388 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3389 50, /* power on to power good */ 3390 0, 3391 { 0x00 }, /* both ports are removable */ 3392 { 0 }, 3393 }; 3394 3395 /* 3396 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3397 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3398 * should not be used by the USB subsystem. As we cannot issue a 3399 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3400 * will be enabled as part of the reset. 3401 * 3402 * On the VT83C572, the port cannot be successfully enabled until the 3403 * outstanding "port enable change" and "connection status change" 3404 * events have been reset. 3405 */ 3406 Static usbd_status 3407 uhci_portreset(uhci_softc_t *sc, int index) 3408 { 3409 int lim, port, x; 3410 3411 if (index == 1) 3412 port = UHCI_PORTSC1; 3413 else if (index == 2) 3414 port = UHCI_PORTSC2; 3415 else 3416 return (USBD_IOERROR); 3417 3418 x = URWMASK(UREAD2(sc, port)); 3419 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3420 3421 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3422 3423 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3424 index, UREAD2(sc, port))); 3425 3426 x = URWMASK(UREAD2(sc, port)); 3427 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3428 3429 delay(100); 3430 3431 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3432 index, UREAD2(sc, port))); 3433 3434 x = URWMASK(UREAD2(sc, port)); 3435 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3436 3437 for (lim = 10; --lim > 0;) { 3438 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3439 3440 x = UREAD2(sc, port); 3441 3442 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3443 index, lim, x)); 3444 3445 if (!(x & UHCI_PORTSC_CCS)) { 3446 /* 3447 * No device is connected (or was disconnected 3448 * during reset). Consider the port reset. 3449 * The delay must be long enough to ensure on 3450 * the initial iteration that the device 3451 * connection will have been registered. 50ms 3452 * appears to be sufficient, but 20ms is not. 3453 */ 3454 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3455 index, lim)); 3456 break; 3457 } 3458 3459 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3460 /* 3461 * Port enabled changed and/or connection 3462 * status changed were set. Reset either or 3463 * both raised flags (by writing a 1 to that 3464 * bit), and wait again for state to settle. 3465 */ 3466 UWRITE2(sc, port, URWMASK(x) | 3467 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3468 continue; 3469 } 3470 3471 if (x & UHCI_PORTSC_PE) 3472 /* Port is enabled */ 3473 break; 3474 3475 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3476 } 3477 3478 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3479 index, UREAD2(sc, port))); 3480 3481 if (lim <= 0) { 3482 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3483 return (USBD_TIMEOUT); 3484 } 3485 3486 sc->sc_isreset = 1; 3487 return (USBD_NORMAL_COMPLETION); 3488 } 3489 3490 /* 3491 * Simulate a hardware hub by handling all the necessary requests. 3492 */ 3493 usbd_status 3494 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3495 { 3496 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3497 usbd_status err; 3498 3499 /* Insert last in queue. */ 3500 mutex_enter(&sc->sc_lock); 3501 err = usb_insert_transfer(xfer); 3502 mutex_exit(&sc->sc_lock); 3503 if (err) 3504 return (err); 3505 3506 /* 3507 * Pipe isn't running (otherwise err would be USBD_INPROG), 3508 * so start it first. 3509 */ 3510 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3511 } 3512 3513 usbd_status 3514 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3515 { 3516 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3517 usb_device_request_t *req; 3518 void *buf = NULL; 3519 int port, x; 3520 int len, value, index, status, change, l, totlen = 0; 3521 usb_port_status_t ps; 3522 usbd_status err; 3523 3524 if (sc->sc_dying) 3525 return (USBD_IOERROR); 3526 3527 #ifdef DIAGNOSTIC 3528 if (!(xfer->rqflags & URQ_REQUEST)) 3529 panic("uhci_root_ctrl_start: not a request"); 3530 #endif 3531 req = &xfer->request; 3532 3533 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3534 req->bmRequestType, req->bRequest)); 3535 3536 len = UGETW(req->wLength); 3537 value = UGETW(req->wValue); 3538 index = UGETW(req->wIndex); 3539 3540 if (len != 0) 3541 buf = KERNADDR(&xfer->dmabuf, 0); 3542 3543 #define C(x,y) ((x) | ((y) << 8)) 3544 switch(C(req->bRequest, req->bmRequestType)) { 3545 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3546 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3547 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3548 /* 3549 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3550 * for the integrated root hub. 3551 */ 3552 break; 3553 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3554 if (len > 0) { 3555 *(u_int8_t *)buf = sc->sc_conf; 3556 totlen = 1; 3557 } 3558 break; 3559 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3560 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3561 if (len == 0) 3562 break; 3563 switch(value >> 8) { 3564 case UDESC_DEVICE: 3565 if ((value & 0xff) != 0) { 3566 err = USBD_IOERROR; 3567 goto ret; 3568 } 3569 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3570 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3571 memcpy(buf, &uhci_devd, l); 3572 break; 3573 case UDESC_CONFIG: 3574 if ((value & 0xff) != 0) { 3575 err = USBD_IOERROR; 3576 goto ret; 3577 } 3578 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3579 memcpy(buf, &uhci_confd, l); 3580 buf = (char *)buf + l; 3581 len -= l; 3582 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3583 totlen += l; 3584 memcpy(buf, &uhci_ifcd, l); 3585 buf = (char *)buf + l; 3586 len -= l; 3587 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3588 totlen += l; 3589 memcpy(buf, &uhci_endpd, l); 3590 break; 3591 case UDESC_STRING: 3592 #define sd ((usb_string_descriptor_t *)buf) 3593 switch (value & 0xff) { 3594 case 0: /* Language table */ 3595 totlen = usb_makelangtbl(sd, len); 3596 break; 3597 case 1: /* Vendor */ 3598 totlen = usb_makestrdesc(sd, len, 3599 sc->sc_vendor); 3600 break; 3601 case 2: /* Product */ 3602 totlen = usb_makestrdesc(sd, len, 3603 "UHCI root hub"); 3604 break; 3605 } 3606 #undef sd 3607 break; 3608 default: 3609 err = USBD_IOERROR; 3610 goto ret; 3611 } 3612 break; 3613 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3614 if (len > 0) { 3615 *(u_int8_t *)buf = 0; 3616 totlen = 1; 3617 } 3618 break; 3619 case C(UR_GET_STATUS, UT_READ_DEVICE): 3620 if (len > 1) { 3621 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3622 totlen = 2; 3623 } 3624 break; 3625 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3626 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3627 if (len > 1) { 3628 USETW(((usb_status_t *)buf)->wStatus, 0); 3629 totlen = 2; 3630 } 3631 break; 3632 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3633 if (value >= USB_MAX_DEVICES) { 3634 err = USBD_IOERROR; 3635 goto ret; 3636 } 3637 sc->sc_addr = value; 3638 break; 3639 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3640 if (value != 0 && value != 1) { 3641 err = USBD_IOERROR; 3642 goto ret; 3643 } 3644 sc->sc_conf = value; 3645 break; 3646 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3647 break; 3648 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3649 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3650 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3651 err = USBD_IOERROR; 3652 goto ret; 3653 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3654 break; 3655 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3656 break; 3657 /* Hub requests */ 3658 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3659 break; 3660 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3661 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3662 "port=%d feature=%d\n", 3663 index, value)); 3664 if (index == 1) 3665 port = UHCI_PORTSC1; 3666 else if (index == 2) 3667 port = UHCI_PORTSC2; 3668 else { 3669 err = USBD_IOERROR; 3670 goto ret; 3671 } 3672 switch(value) { 3673 case UHF_PORT_ENABLE: 3674 x = URWMASK(UREAD2(sc, port)); 3675 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3676 break; 3677 case UHF_PORT_SUSPEND: 3678 x = URWMASK(UREAD2(sc, port)); 3679 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3680 break; 3681 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3682 /* see USB2 spec ch. 7.1.7.7 */ 3683 usb_delay_ms(&sc->sc_bus, 20); 3684 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3685 /* 10ms resume delay must be provided by caller */ 3686 break; 3687 case UHF_PORT_RESET: 3688 x = URWMASK(UREAD2(sc, port)); 3689 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3690 break; 3691 case UHF_C_PORT_CONNECTION: 3692 x = URWMASK(UREAD2(sc, port)); 3693 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3694 break; 3695 case UHF_C_PORT_ENABLE: 3696 x = URWMASK(UREAD2(sc, port)); 3697 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3698 break; 3699 case UHF_C_PORT_OVER_CURRENT: 3700 x = URWMASK(UREAD2(sc, port)); 3701 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3702 break; 3703 case UHF_C_PORT_RESET: 3704 sc->sc_isreset = 0; 3705 err = USBD_NORMAL_COMPLETION; 3706 goto ret; 3707 case UHF_PORT_CONNECTION: 3708 case UHF_PORT_OVER_CURRENT: 3709 case UHF_PORT_POWER: 3710 case UHF_PORT_LOW_SPEED: 3711 case UHF_C_PORT_SUSPEND: 3712 default: 3713 err = USBD_IOERROR; 3714 goto ret; 3715 } 3716 break; 3717 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3718 if (index == 1) 3719 port = UHCI_PORTSC1; 3720 else if (index == 2) 3721 port = UHCI_PORTSC2; 3722 else { 3723 err = USBD_IOERROR; 3724 goto ret; 3725 } 3726 if (len > 0) { 3727 *(u_int8_t *)buf = 3728 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3729 UHCI_PORTSC_LS_SHIFT; 3730 totlen = 1; 3731 } 3732 break; 3733 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3734 if (len == 0) 3735 break; 3736 if ((value & 0xff) != 0) { 3737 err = USBD_IOERROR; 3738 goto ret; 3739 } 3740 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3741 totlen = l; 3742 memcpy(buf, &uhci_hubd_piix, l); 3743 break; 3744 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3745 if (len != 4) { 3746 err = USBD_IOERROR; 3747 goto ret; 3748 } 3749 memset(buf, 0, len); 3750 totlen = len; 3751 break; 3752 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3753 if (index == 1) 3754 port = UHCI_PORTSC1; 3755 else if (index == 2) 3756 port = UHCI_PORTSC2; 3757 else { 3758 err = USBD_IOERROR; 3759 goto ret; 3760 } 3761 if (len != 4) { 3762 err = USBD_IOERROR; 3763 goto ret; 3764 } 3765 x = UREAD2(sc, port); 3766 status = change = 0; 3767 if (x & UHCI_PORTSC_CCS) 3768 status |= UPS_CURRENT_CONNECT_STATUS; 3769 if (x & UHCI_PORTSC_CSC) 3770 change |= UPS_C_CONNECT_STATUS; 3771 if (x & UHCI_PORTSC_PE) 3772 status |= UPS_PORT_ENABLED; 3773 if (x & UHCI_PORTSC_POEDC) 3774 change |= UPS_C_PORT_ENABLED; 3775 if (x & UHCI_PORTSC_OCI) 3776 status |= UPS_OVERCURRENT_INDICATOR; 3777 if (x & UHCI_PORTSC_OCIC) 3778 change |= UPS_C_OVERCURRENT_INDICATOR; 3779 if (x & UHCI_PORTSC_SUSP) 3780 status |= UPS_SUSPEND; 3781 if (x & UHCI_PORTSC_LSDA) 3782 status |= UPS_LOW_SPEED; 3783 status |= UPS_PORT_POWER; 3784 if (sc->sc_isreset) 3785 change |= UPS_C_PORT_RESET; 3786 USETW(ps.wPortStatus, status); 3787 USETW(ps.wPortChange, change); 3788 l = min(len, sizeof ps); 3789 memcpy(buf, &ps, l); 3790 totlen = l; 3791 break; 3792 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3793 err = USBD_IOERROR; 3794 goto ret; 3795 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3796 break; 3797 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3798 if (index == 1) 3799 port = UHCI_PORTSC1; 3800 else if (index == 2) 3801 port = UHCI_PORTSC2; 3802 else { 3803 err = USBD_IOERROR; 3804 goto ret; 3805 } 3806 switch(value) { 3807 case UHF_PORT_ENABLE: 3808 x = URWMASK(UREAD2(sc, port)); 3809 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3810 break; 3811 case UHF_PORT_SUSPEND: 3812 x = URWMASK(UREAD2(sc, port)); 3813 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3814 break; 3815 case UHF_PORT_RESET: 3816 err = uhci_portreset(sc, index); 3817 goto ret; 3818 case UHF_PORT_POWER: 3819 /* Pretend we turned on power */ 3820 err = USBD_NORMAL_COMPLETION; 3821 goto ret; 3822 case UHF_C_PORT_CONNECTION: 3823 case UHF_C_PORT_ENABLE: 3824 case UHF_C_PORT_OVER_CURRENT: 3825 case UHF_PORT_CONNECTION: 3826 case UHF_PORT_OVER_CURRENT: 3827 case UHF_PORT_LOW_SPEED: 3828 case UHF_C_PORT_SUSPEND: 3829 case UHF_C_PORT_RESET: 3830 default: 3831 err = USBD_IOERROR; 3832 goto ret; 3833 } 3834 break; 3835 default: 3836 err = USBD_IOERROR; 3837 goto ret; 3838 } 3839 xfer->actlen = totlen; 3840 err = USBD_NORMAL_COMPLETION; 3841 ret: 3842 xfer->status = err; 3843 mutex_enter(&sc->sc_lock); 3844 usb_transfer_complete(xfer); 3845 mutex_exit(&sc->sc_lock); 3846 return (USBD_IN_PROGRESS); 3847 } 3848 3849 /* Abort a root control request. */ 3850 void 3851 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3852 { 3853 /* Nothing to do, all transfers are synchronous. */ 3854 } 3855 3856 /* Close the root pipe. */ 3857 void 3858 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3859 { 3860 DPRINTF(("uhci_root_ctrl_close\n")); 3861 } 3862 3863 /* Abort a root interrupt request. */ 3864 void 3865 uhci_root_intr_abort(usbd_xfer_handle xfer) 3866 { 3867 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3868 3869 KASSERT(mutex_owned(&sc->sc_lock)); 3870 3871 callout_stop(&sc->sc_poll_handle); 3872 sc->sc_intr_xfer = NULL; 3873 3874 if (xfer->pipe->intrxfer == xfer) { 3875 DPRINTF(("uhci_root_intr_abort: remove\n")); 3876 xfer->pipe->intrxfer = 0; 3877 } 3878 xfer->status = USBD_CANCELLED; 3879 #ifdef DIAGNOSTIC 3880 UXFER(xfer)->iinfo.isdone = 1; 3881 #endif 3882 usb_transfer_complete(xfer); 3883 } 3884 3885 usbd_status 3886 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3887 { 3888 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3889 usbd_status err; 3890 3891 /* Insert last in queue. */ 3892 mutex_enter(&sc->sc_lock); 3893 err = usb_insert_transfer(xfer); 3894 mutex_exit(&sc->sc_lock); 3895 if (err) 3896 return (err); 3897 3898 /* 3899 * Pipe isn't running (otherwise err would be USBD_INPROG), 3900 * start first 3901 */ 3902 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3903 } 3904 3905 /* Start a transfer on the root interrupt pipe */ 3906 usbd_status 3907 uhci_root_intr_start(usbd_xfer_handle xfer) 3908 { 3909 usbd_pipe_handle pipe = xfer->pipe; 3910 uhci_softc_t *sc = pipe->device->bus->hci_private; 3911 unsigned int ival; 3912 3913 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3914 xfer, xfer->length, xfer->flags)); 3915 3916 if (sc->sc_dying) 3917 return (USBD_IOERROR); 3918 3919 /* XXX temporary variable needed to avoid gcc3 warning */ 3920 ival = xfer->pipe->endpoint->edesc->bInterval; 3921 sc->sc_ival = mstohz(ival); 3922 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3923 sc->sc_intr_xfer = xfer; 3924 return (USBD_IN_PROGRESS); 3925 } 3926 3927 /* Close the root interrupt pipe. */ 3928 void 3929 uhci_root_intr_close(usbd_pipe_handle pipe) 3930 { 3931 uhci_softc_t *sc = pipe->device->bus->hci_private; 3932 3933 KASSERT(mutex_owned(&sc->sc_lock)); 3934 3935 callout_stop(&sc->sc_poll_handle); 3936 sc->sc_intr_xfer = NULL; 3937 DPRINTF(("uhci_root_intr_close\n")); 3938 } 3939
Indexes created Tue Sep 30 20:09:53 GMT 2025