uhci.c revision 1.260
1 /* $NetBSD: uhci.c,v 1.260 2013/09/14 13:17:21 joerg Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 39 * USB spec: http://www.usb.org/developers/docs/ 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.260 2013/09/14 13:17:21 joerg Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/kmem.h> 51 #include <sys/device.h> 52 #include <sys/select.h> 53 #include <sys/extent.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/bus.h> 57 #include <sys/cpu.h> 58 59 #include <machine/endian.h> 60 61 #include <dev/usb/usb.h> 62 #include <dev/usb/usbdi.h> 63 #include <dev/usb/usbdivar.h> 64 #include <dev/usb/usb_mem.h> 65 #include <dev/usb/usb_quirks.h> 66 67 #include <dev/usb/uhcireg.h> 68 #include <dev/usb/uhcivar.h> 69 #include <dev/usb/usbroothub_subr.h> 70 71 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 72 /*#define UHCI_CTL_LOOP */ 73 74 75 76 #ifdef UHCI_DEBUG 77 uhci_softc_t *thesc; 78 #define DPRINTF(x) if (uhcidebug) printf x 79 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 80 int uhcidebug = 0; 81 int uhcinoloop = 0; 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n,x) 85 #endif 86 87 /* 88 * The UHCI controller is little endian, so on big endian machines 89 * the data stored in memory needs to be swapped. 90 */ 91 92 struct uhci_pipe { 93 struct usbd_pipe pipe; 94 int nexttoggle; 95 96 u_char aborting; 97 usbd_xfer_handle abortstart, abortend; 98 99 /* Info needed for different pipe kinds. */ 100 union { 101 /* Control pipe */ 102 struct { 103 uhci_soft_qh_t *sqh; 104 usb_dma_t reqdma; 105 uhci_soft_td_t *setup, *stat; 106 u_int length; 107 } ctl; 108 /* Interrupt pipe */ 109 struct { 110 int npoll; 111 int isread; 112 uhci_soft_qh_t **qhs; 113 } intr; 114 /* Bulk pipe */ 115 struct { 116 uhci_soft_qh_t *sqh; 117 u_int length; 118 int isread; 119 } bulk; 120 /* Iso pipe */ 121 struct iso { 122 uhci_soft_td_t **stds; 123 int next, inuse; 124 } iso; 125 } u; 126 }; 127 128 Static void uhci_globalreset(uhci_softc_t *); 129 Static usbd_status uhci_portreset(uhci_softc_t*, int); 130 Static void uhci_reset(uhci_softc_t *); 131 Static usbd_status uhci_run(uhci_softc_t *, int run, int locked); 132 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 133 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 134 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 135 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 136 #if 0 137 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 138 uhci_intr_info_t *); 139 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 140 #endif 141 142 Static void uhci_free_std_chain(uhci_softc_t *, 143 uhci_soft_td_t *, uhci_soft_td_t *); 144 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 145 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 146 uhci_soft_td_t **, uhci_soft_td_t **); 147 Static void uhci_poll_hub(void *); 148 Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 149 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 150 Static void uhci_idone(uhci_intr_info_t *); 151 152 Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 153 154 Static void uhci_timeout(void *); 155 Static void uhci_timeout_task(void *); 156 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 157 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 158 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 159 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 160 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 161 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 162 Static void uhci_add_loop(uhci_softc_t *sc); 163 Static void uhci_rem_loop(uhci_softc_t *sc); 164 165 Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 166 Static void uhci_device_isoc_enter(usbd_xfer_handle); 167 168 Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 169 Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 170 171 Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 172 Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 173 Static void uhci_get_lock(struct usbd_bus *, kmutex_t **); 174 175 Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 176 Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 177 Static void uhci_device_ctrl_abort(usbd_xfer_handle); 178 Static void uhci_device_ctrl_close(usbd_pipe_handle); 179 Static void uhci_device_ctrl_done(usbd_xfer_handle); 180 181 Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 182 Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 183 Static void uhci_device_intr_abort(usbd_xfer_handle); 184 Static void uhci_device_intr_close(usbd_pipe_handle); 185 Static void uhci_device_intr_done(usbd_xfer_handle); 186 187 Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 188 Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 189 Static void uhci_device_bulk_abort(usbd_xfer_handle); 190 Static void uhci_device_bulk_close(usbd_pipe_handle); 191 Static void uhci_device_bulk_done(usbd_xfer_handle); 192 193 Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 194 Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 195 Static void uhci_device_isoc_abort(usbd_xfer_handle); 196 Static void uhci_device_isoc_close(usbd_pipe_handle); 197 Static void uhci_device_isoc_done(usbd_xfer_handle); 198 199 Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 200 Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 201 Static void uhci_root_ctrl_abort(usbd_xfer_handle); 202 Static void uhci_root_ctrl_close(usbd_pipe_handle); 203 Static void uhci_root_ctrl_done(usbd_xfer_handle); 204 205 Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 206 Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 207 Static void uhci_root_intr_abort(usbd_xfer_handle); 208 Static void uhci_root_intr_close(usbd_pipe_handle); 209 Static void uhci_root_intr_done(usbd_xfer_handle); 210 211 Static usbd_status uhci_open(usbd_pipe_handle); 212 Static void uhci_poll(struct usbd_bus *); 213 Static void uhci_softintr(void *); 214 215 Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 216 217 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 218 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 219 Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 220 struct uhci_pipe *pipe, int ival); 221 222 Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 223 Static void uhci_noop(usbd_pipe_handle pipe); 224 225 static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 226 uhci_soft_qh_t *); 227 228 #ifdef UHCI_DEBUG 229 Static void uhci_dump_all(uhci_softc_t *); 230 Static void uhci_dumpregs(uhci_softc_t *); 231 Static void uhci_dump_qhs(uhci_soft_qh_t *); 232 Static void uhci_dump_qh(uhci_soft_qh_t *); 233 Static void uhci_dump_tds(uhci_soft_td_t *); 234 Static void uhci_dump_td(uhci_soft_td_t *); 235 Static void uhci_dump_ii(uhci_intr_info_t *ii); 236 void uhci_dump(void); 237 #endif 238 239 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 240 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 241 #define UWRITE1(sc, r, x) \ 242 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 243 } while (/*CONSTCOND*/0) 244 #define UWRITE2(sc, r, x) \ 245 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 246 } while (/*CONSTCOND*/0) 247 #define UWRITE4(sc, r, x) \ 248 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 249 } while (/*CONSTCOND*/0) 250 static __inline uint8_t 251 UREAD1(uhci_softc_t *sc, bus_size_t r) 252 { 253 254 UBARR(sc); 255 return bus_space_read_1(sc->iot, sc->ioh, r); 256 } 257 258 static __inline uint16_t 259 UREAD2(uhci_softc_t *sc, bus_size_t r) 260 { 261 262 UBARR(sc); 263 return bus_space_read_2(sc->iot, sc->ioh, r); 264 } 265 266 #ifdef UHCI_DEBUG 267 static __inline uint32_t 268 UREAD4(uhci_softc_t *sc, bus_size_t r) 269 { 270 271 UBARR(sc); 272 return bus_space_read_4(sc->iot, sc->ioh, r); 273 } 274 #endif 275 276 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 277 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 278 279 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 280 281 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 282 283 #define UHCI_INTR_ENDPT 1 284 285 const struct usbd_bus_methods uhci_bus_methods = { 286 .open_pipe = uhci_open, 287 .soft_intr = uhci_softintr, 288 .do_poll = uhci_poll, 289 .allocm = uhci_allocm, 290 .freem = uhci_freem, 291 .allocx = uhci_allocx, 292 .freex = uhci_freex, 293 .get_lock = uhci_get_lock, 294 }; 295 296 const struct usbd_pipe_methods uhci_root_ctrl_methods = { 297 .transfer = uhci_root_ctrl_transfer, 298 .start = uhci_root_ctrl_start, 299 .abort = uhci_root_ctrl_abort, 300 .close = uhci_root_ctrl_close, 301 .cleartoggle = uhci_noop, 302 .done = uhci_root_ctrl_done, 303 }; 304 305 const struct usbd_pipe_methods uhci_root_intr_methods = { 306 .transfer = uhci_root_intr_transfer, 307 .start = uhci_root_intr_start, 308 .abort = uhci_root_intr_abort, 309 .close = uhci_root_intr_close, 310 .cleartoggle = uhci_noop, 311 .done = uhci_root_intr_done, 312 }; 313 314 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 315 .transfer = uhci_device_ctrl_transfer, 316 .start = uhci_device_ctrl_start, 317 .abort = uhci_device_ctrl_abort, 318 .close = uhci_device_ctrl_close, 319 .cleartoggle = uhci_noop, 320 .done = uhci_device_ctrl_done, 321 }; 322 323 const struct usbd_pipe_methods uhci_device_intr_methods = { 324 .transfer = uhci_device_intr_transfer, 325 .start = uhci_device_intr_start, 326 .abort = uhci_device_intr_abort, 327 .close = uhci_device_intr_close, 328 .cleartoggle = uhci_device_clear_toggle, 329 .done = uhci_device_intr_done, 330 }; 331 332 const struct usbd_pipe_methods uhci_device_bulk_methods = { 333 .transfer = uhci_device_bulk_transfer, 334 .start = uhci_device_bulk_start, 335 .abort = uhci_device_bulk_abort, 336 .close = uhci_device_bulk_close, 337 .cleartoggle = uhci_device_clear_toggle, 338 .done = uhci_device_bulk_done, 339 }; 340 341 const struct usbd_pipe_methods uhci_device_isoc_methods = { 342 .transfer = uhci_device_isoc_transfer, 343 .start = uhci_device_isoc_start, 344 .abort = uhci_device_isoc_abort, 345 .close = uhci_device_isoc_close, 346 .cleartoggle = uhci_noop, 347 .done = uhci_device_isoc_done, 348 }; 349 350 #define uhci_add_intr_info(sc, ii) \ 351 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 352 #define uhci_del_intr_info(ii) \ 353 do { \ 354 LIST_REMOVE((ii), list); \ 355 (ii)->list.le_prev = NULL; \ 356 } while (0) 357 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 358 359 static inline uhci_soft_qh_t * 360 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 361 { 362 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 363 364 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 365 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 366 usb_syncmem(&pqh->dma, 367 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 368 sizeof(pqh->qh.qh_hlink), 369 BUS_DMASYNC_POSTWRITE); 370 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 371 printf("uhci_find_prev_qh: QH not found\n"); 372 return (NULL); 373 } 374 #endif 375 } 376 return (pqh); 377 } 378 379 void 380 uhci_globalreset(uhci_softc_t *sc) 381 { 382 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 383 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 384 UHCICMD(sc, 0); /* do nothing */ 385 } 386 387 usbd_status 388 uhci_init(uhci_softc_t *sc) 389 { 390 usbd_status err; 391 int i, j; 392 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 393 uhci_soft_td_t *std; 394 395 DPRINTFN(1,("uhci_init: start\n")); 396 397 #ifdef UHCI_DEBUG 398 thesc = sc; 399 400 if (uhcidebug > 2) 401 uhci_dumpregs(sc); 402 #endif 403 404 sc->sc_suspend = PWR_RESUME; 405 406 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 407 uhci_globalreset(sc); /* reset the controller */ 408 uhci_reset(sc); 409 410 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 411 USB_MEM_RESERVE); 412 413 /* Allocate and initialize real frame array. */ 414 err = usb_allocmem(&sc->sc_bus, 415 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 416 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 417 if (err) 418 return (err); 419 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 420 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 421 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 422 423 /* 424 * Allocate a TD, inactive, that hangs from the last QH. 425 * This is to avoid a bug in the PIIX that makes it run berserk 426 * otherwise. 427 */ 428 std = uhci_alloc_std(sc); 429 if (std == NULL) 430 return (USBD_NOMEM); 431 std->link.std = NULL; 432 std->td.td_link = htole32(UHCI_PTR_T); 433 std->td.td_status = htole32(0); /* inactive */ 434 std->td.td_token = htole32(0); 435 std->td.td_buffer = htole32(0); 436 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 437 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 438 439 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 440 lsqh = uhci_alloc_sqh(sc); 441 if (lsqh == NULL) 442 return (USBD_NOMEM); 443 lsqh->hlink = NULL; 444 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 445 lsqh->elink = std; 446 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 447 sc->sc_last_qh = lsqh; 448 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 449 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 450 451 /* Allocate the dummy QH where bulk traffic will be queued. */ 452 bsqh = uhci_alloc_sqh(sc); 453 if (bsqh == NULL) 454 return (USBD_NOMEM); 455 bsqh->hlink = lsqh; 456 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 457 bsqh->elink = NULL; 458 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 459 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 460 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 461 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 462 463 /* Allocate dummy QH where high speed control traffic will be queued. */ 464 chsqh = uhci_alloc_sqh(sc); 465 if (chsqh == NULL) 466 return (USBD_NOMEM); 467 chsqh->hlink = bsqh; 468 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 469 chsqh->elink = NULL; 470 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 471 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 472 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 473 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 474 475 /* Allocate dummy QH where control traffic will be queued. */ 476 clsqh = uhci_alloc_sqh(sc); 477 if (clsqh == NULL) 478 return (USBD_NOMEM); 479 clsqh->hlink = chsqh; 480 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 481 clsqh->elink = NULL; 482 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 483 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 484 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 485 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 486 487 /* 488 * Make all (virtual) frame list pointers point to the interrupt 489 * queue heads and the interrupt queue heads at the control 490 * queue head and point the physical frame list to the virtual. 491 */ 492 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 493 std = uhci_alloc_std(sc); 494 sqh = uhci_alloc_sqh(sc); 495 if (std == NULL || sqh == NULL) 496 return (USBD_NOMEM); 497 std->link.sqh = sqh; 498 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 499 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 500 std->td.td_token = htole32(0); 501 std->td.td_buffer = htole32(0); 502 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 503 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 504 sqh->hlink = clsqh; 505 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 506 sqh->elink = NULL; 507 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 508 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 509 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 510 sc->sc_vframes[i].htd = std; 511 sc->sc_vframes[i].etd = std; 512 sc->sc_vframes[i].hqh = sqh; 513 sc->sc_vframes[i].eqh = sqh; 514 for (j = i; 515 j < UHCI_FRAMELIST_COUNT; 516 j += UHCI_VFRAMELIST_COUNT) 517 sc->sc_pframes[j] = htole32(std->physaddr); 518 } 519 usb_syncmem(&sc->sc_dma, 0, 520 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 521 BUS_DMASYNC_PREWRITE); 522 523 524 LIST_INIT(&sc->sc_intrhead); 525 526 sc->sc_xferpool = pool_cache_init(sizeof(struct uhci_xfer), 0, 0, 0, 527 "uhcixfer", NULL, IPL_USB, NULL, NULL, NULL); 528 529 callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE); 530 531 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 532 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 533 cv_init(&sc->sc_softwake_cv, "uhciab"); 534 535 /* Set up the bus struct. */ 536 sc->sc_bus.methods = &uhci_bus_methods; 537 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 538 539 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 540 541 DPRINTFN(1,("uhci_init: enabling\n")); 542 543 err = uhci_run(sc, 1, 0); /* and here we go... */ 544 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 545 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 546 return err; 547 } 548 549 int 550 uhci_activate(device_t self, enum devact act) 551 { 552 struct uhci_softc *sc = device_private(self); 553 554 switch (act) { 555 case DVACT_DEACTIVATE: 556 sc->sc_dying = 1; 557 return 0; 558 default: 559 return EOPNOTSUPP; 560 } 561 } 562 563 void 564 uhci_childdet(device_t self, device_t child) 565 { 566 struct uhci_softc *sc = device_private(self); 567 568 KASSERT(sc->sc_child == child); 569 sc->sc_child = NULL; 570 } 571 572 int 573 uhci_detach(struct uhci_softc *sc, int flags) 574 { 575 int rv = 0; 576 577 if (sc->sc_child != NULL) 578 rv = config_detach(sc->sc_child, flags); 579 580 if (rv != 0) 581 return (rv); 582 583 callout_halt(&sc->sc_poll_handle, NULL); 584 callout_destroy(&sc->sc_poll_handle); 585 586 cv_destroy(&sc->sc_softwake_cv); 587 588 mutex_destroy(&sc->sc_lock); 589 mutex_destroy(&sc->sc_intr_lock); 590 591 pool_cache_destroy(sc->sc_xferpool); 592 593 /* XXX free other data structures XXX */ 594 595 return (rv); 596 } 597 598 usbd_status 599 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 600 { 601 struct uhci_softc *sc = bus->hci_private; 602 usbd_status status; 603 u_int32_t n; 604 605 /* 606 * XXX 607 * Since we are allocating a buffer we can assume that we will 608 * need TDs for it. Since we don't want to allocate those from 609 * an interrupt context, we allocate them here and free them again. 610 * This is no guarantee that we'll get the TDs next time... 611 */ 612 n = size / 8; 613 if (n > 16) { 614 u_int32_t i; 615 uhci_soft_td_t **stds; 616 617 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 618 stds = kmem_alloc(sizeof(uhci_soft_td_t *) * n, KM_SLEEP); 619 if (!stds) 620 return USBD_NOMEM; 621 for(i = 0; i < n; i++) 622 stds[i] = uhci_alloc_std(sc); 623 for(i = 0; i < n; i++) 624 if (stds[i] != NULL) 625 uhci_free_std(sc, stds[i]); 626 kmem_free(stds, sizeof(uhci_soft_td_t *) * n); 627 } 628 629 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 630 if (status == USBD_NOMEM) 631 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 632 return status; 633 } 634 635 void 636 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 637 { 638 if (dma->block->flags & USB_DMA_RESERVE) { 639 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 640 dma); 641 return; 642 } 643 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 644 } 645 646 usbd_xfer_handle 647 uhci_allocx(struct usbd_bus *bus) 648 { 649 struct uhci_softc *sc = bus->hci_private; 650 usbd_xfer_handle xfer; 651 652 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 653 if (xfer != NULL) { 654 memset(xfer, 0, sizeof(struct uhci_xfer)); 655 UXFER(xfer)->iinfo.sc = sc; 656 #ifdef DIAGNOSTIC 657 UXFER(xfer)->iinfo.isdone = 1; 658 xfer->busy_free = XFER_BUSY; 659 #endif 660 } 661 return (xfer); 662 } 663 664 void 665 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 666 { 667 struct uhci_softc *sc = bus->hci_private; 668 669 #ifdef DIAGNOSTIC 670 if (xfer->busy_free != XFER_BUSY) { 671 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 672 xfer->busy_free); 673 } 674 xfer->busy_free = XFER_FREE; 675 if (!UXFER(xfer)->iinfo.isdone) { 676 printf("uhci_freex: !isdone\n"); 677 } 678 #endif 679 pool_cache_put(sc->sc_xferpool, xfer); 680 } 681 682 Static void 683 uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 684 { 685 struct uhci_softc *sc = bus->hci_private; 686 687 *lock = &sc->sc_lock; 688 } 689 690 691 /* 692 * Handle suspend/resume. 693 * 694 * We need to switch to polling mode here, because this routine is 695 * called from an interrupt context. This is all right since we 696 * are almost suspended anyway. 697 */ 698 bool 699 uhci_resume(device_t dv, const pmf_qual_t *qual) 700 { 701 uhci_softc_t *sc = device_private(dv); 702 int cmd; 703 704 mutex_spin_enter(&sc->sc_intr_lock); 705 706 cmd = UREAD2(sc, UHCI_CMD); 707 sc->sc_bus.use_polling++; 708 UWRITE2(sc, UHCI_INTR, 0); 709 uhci_globalreset(sc); 710 uhci_reset(sc); 711 if (cmd & UHCI_CMD_RS) 712 uhci_run(sc, 0, 1); 713 714 /* restore saved state */ 715 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 716 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 717 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 718 719 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 720 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock); 721 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 722 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 723 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 724 UHCICMD(sc, UHCI_CMD_MAXP); 725 uhci_run(sc, 1, 1); /* and start traffic again */ 726 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock); 727 sc->sc_bus.use_polling--; 728 if (sc->sc_intr_xfer != NULL) 729 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 730 sc->sc_intr_xfer); 731 #ifdef UHCI_DEBUG 732 if (uhcidebug > 2) 733 uhci_dumpregs(sc); 734 #endif 735 736 sc->sc_suspend = PWR_RESUME; 737 mutex_spin_exit(&sc->sc_intr_lock); 738 739 return true; 740 } 741 742 bool 743 uhci_suspend(device_t dv, const pmf_qual_t *qual) 744 { 745 uhci_softc_t *sc = device_private(dv); 746 int cmd; 747 748 mutex_spin_enter(&sc->sc_intr_lock); 749 750 cmd = UREAD2(sc, UHCI_CMD); 751 752 #ifdef UHCI_DEBUG 753 if (uhcidebug > 2) 754 uhci_dumpregs(sc); 755 #endif 756 if (sc->sc_intr_xfer != NULL) 757 callout_stop(&sc->sc_poll_handle); 758 sc->sc_suspend = PWR_SUSPEND; 759 sc->sc_bus.use_polling++; 760 761 uhci_run(sc, 0, 1); /* stop the controller */ 762 cmd &= ~UHCI_CMD_RS; 763 764 /* save some state if BIOS doesn't */ 765 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 766 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 767 768 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 769 770 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 771 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock); 772 sc->sc_bus.use_polling--; 773 774 mutex_spin_exit(&sc->sc_intr_lock); 775 776 return true; 777 } 778 779 #ifdef UHCI_DEBUG 780 Static void 781 uhci_dumpregs(uhci_softc_t *sc) 782 { 783 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 784 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 785 device_xname(sc->sc_dev), 786 UREAD2(sc, UHCI_CMD), 787 UREAD2(sc, UHCI_STS), 788 UREAD2(sc, UHCI_INTR), 789 UREAD2(sc, UHCI_FRNUM), 790 UREAD4(sc, UHCI_FLBASEADDR), 791 UREAD1(sc, UHCI_SOF), 792 UREAD2(sc, UHCI_PORTSC1), 793 UREAD2(sc, UHCI_PORTSC2))); 794 } 795 796 void 797 uhci_dump_td(uhci_soft_td_t *p) 798 { 799 char sbuf[128], sbuf2[128]; 800 801 802 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 803 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 804 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 805 "token=0x%08lx buffer=0x%08lx\n", 806 p, (long)p->physaddr, 807 (long)le32toh(p->td.td_link), 808 (long)le32toh(p->td.td_status), 809 (long)le32toh(p->td.td_token), 810 (long)le32toh(p->td.td_buffer))); 811 812 snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF", 813 (u_int32_t)le32toh(p->td.td_link)); 814 snprintb(sbuf2, sizeof(sbuf2), 815 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 816 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 817 (u_int32_t)le32toh(p->td.td_status)); 818 819 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 820 "D=%d,maxlen=%d\n", sbuf, sbuf2, 821 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 822 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 823 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 824 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 825 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 826 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 827 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 828 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 829 BUS_DMASYNC_PREREAD); 830 } 831 832 void 833 uhci_dump_qh(uhci_soft_qh_t *sqh) 834 { 835 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 836 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 837 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 838 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 839 le32toh(sqh->qh.qh_elink))); 840 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 841 } 842 843 844 #if 1 845 void 846 uhci_dump(void) 847 { 848 uhci_dump_all(thesc); 849 } 850 #endif 851 852 void 853 uhci_dump_all(uhci_softc_t *sc) 854 { 855 uhci_dumpregs(sc); 856 printf("intrs=%d\n", sc->sc_bus.no_intrs); 857 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 858 uhci_dump_qh(sc->sc_lctl_start); 859 } 860 861 862 void 863 uhci_dump_qhs(uhci_soft_qh_t *sqh) 864 { 865 uhci_dump_qh(sqh); 866 867 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 868 * Traverses sideways first, then down. 869 * 870 * QH1 871 * QH2 872 * No QH 873 * TD2.1 874 * TD2.2 875 * TD1.1 876 * etc. 877 * 878 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 879 */ 880 881 882 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 883 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 884 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 885 uhci_dump_qhs(sqh->hlink); 886 else 887 DPRINTF(("No QH\n")); 888 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 889 890 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 891 uhci_dump_tds(sqh->elink); 892 else 893 DPRINTF(("No TD\n")); 894 } 895 896 void 897 uhci_dump_tds(uhci_soft_td_t *std) 898 { 899 uhci_soft_td_t *td; 900 int stop; 901 902 for(td = std; td != NULL; td = td->link.std) { 903 uhci_dump_td(td); 904 905 /* Check whether the link pointer in this TD marks 906 * the link pointer as end of queue. This avoids 907 * printing the free list in case the queue/TD has 908 * already been moved there (seatbelt). 909 */ 910 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 911 sizeof(td->td.td_link), 912 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 913 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 914 le32toh(td->td.td_link) == 0); 915 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 916 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 917 if (stop) 918 break; 919 } 920 } 921 922 Static void 923 uhci_dump_ii(uhci_intr_info_t *ii) 924 { 925 usbd_pipe_handle pipe; 926 usb_endpoint_descriptor_t *ed; 927 usbd_device_handle dev; 928 929 #ifdef DIAGNOSTIC 930 #define DONE ii->isdone 931 #else 932 #define DONE 0 933 #endif 934 if (ii == NULL) { 935 printf("ii NULL\n"); 936 return; 937 } 938 if (ii->xfer == NULL) { 939 printf("ii %p: done=%d xfer=NULL\n", 940 ii, DONE); 941 return; 942 } 943 pipe = ii->xfer->pipe; 944 if (pipe == NULL) { 945 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 946 ii, DONE, ii->xfer); 947 return; 948 } 949 if (pipe->endpoint == NULL) { 950 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 951 ii, DONE, ii->xfer, pipe); 952 return; 953 } 954 if (pipe->device == NULL) { 955 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 956 ii, DONE, ii->xfer, pipe); 957 return; 958 } 959 ed = pipe->endpoint->edesc; 960 dev = pipe->device; 961 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 962 ii, DONE, ii->xfer, dev, 963 UGETW(dev->ddesc.idVendor), 964 UGETW(dev->ddesc.idProduct), 965 dev->address, pipe, 966 ed->bEndpointAddress, ed->bmAttributes); 967 #undef DONE 968 } 969 970 void uhci_dump_iis(struct uhci_softc *sc); 971 void 972 uhci_dump_iis(struct uhci_softc *sc) 973 { 974 uhci_intr_info_t *ii; 975 976 printf("intr_info list:\n"); 977 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 978 uhci_dump_ii(ii); 979 } 980 981 void iidump(void); 982 void iidump(void) { uhci_dump_iis(thesc); } 983 984 #endif 985 986 /* 987 * This routine is executed periodically and simulates interrupts 988 * from the root controller interrupt pipe for port status change. 989 */ 990 void 991 uhci_poll_hub(void *addr) 992 { 993 usbd_xfer_handle xfer = addr; 994 usbd_pipe_handle pipe = xfer->pipe; 995 uhci_softc_t *sc; 996 u_char *p; 997 998 DPRINTFN(20, ("uhci_poll_hub\n")); 999 1000 if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL)) 1001 return; /* device has detached */ 1002 sc = pipe->device->bus->hci_private; 1003 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1004 1005 p = KERNADDR(&xfer->dmabuf, 0); 1006 p[0] = 0; 1007 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1008 p[0] |= 1<<1; 1009 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1010 p[0] |= 1<<2; 1011 if (p[0] == 0) 1012 /* No change, try again in a while */ 1013 return; 1014 1015 xfer->actlen = 1; 1016 xfer->status = USBD_NORMAL_COMPLETION; 1017 mutex_enter(&sc->sc_lock); 1018 usb_transfer_complete(xfer); 1019 mutex_exit(&sc->sc_lock); 1020 } 1021 1022 void 1023 uhci_root_intr_done(usbd_xfer_handle xfer) 1024 { 1025 } 1026 1027 void 1028 uhci_root_ctrl_done(usbd_xfer_handle xfer) 1029 { 1030 } 1031 1032 /* 1033 * Let the last QH loop back to the high speed control transfer QH. 1034 * This is what intel calls "bandwidth reclamation" and improves 1035 * USB performance a lot for some devices. 1036 * If we are already looping, just count it. 1037 */ 1038 void 1039 uhci_add_loop(uhci_softc_t *sc) { 1040 #ifdef UHCI_DEBUG 1041 if (uhcinoloop) 1042 return; 1043 #endif 1044 if (++sc->sc_loops == 1) { 1045 DPRINTFN(5,("uhci_start_loop: add\n")); 1046 /* Note, we don't loop back the soft pointer. */ 1047 sc->sc_last_qh->qh.qh_hlink = 1048 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1049 usb_syncmem(&sc->sc_last_qh->dma, 1050 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1051 sizeof(sc->sc_last_qh->qh.qh_hlink), 1052 BUS_DMASYNC_PREWRITE); 1053 } 1054 } 1055 1056 void 1057 uhci_rem_loop(uhci_softc_t *sc) { 1058 #ifdef UHCI_DEBUG 1059 if (uhcinoloop) 1060 return; 1061 #endif 1062 if (--sc->sc_loops == 0) { 1063 DPRINTFN(5,("uhci_end_loop: remove\n")); 1064 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1065 usb_syncmem(&sc->sc_last_qh->dma, 1066 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1067 sizeof(sc->sc_last_qh->qh.qh_hlink), 1068 BUS_DMASYNC_PREWRITE); 1069 } 1070 } 1071 1072 /* Add high speed control QH, called with lock held. */ 1073 void 1074 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1075 { 1076 uhci_soft_qh_t *eqh; 1077 1078 KASSERT(mutex_owned(&sc->sc_lock)); 1079 1080 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1081 eqh = sc->sc_hctl_end; 1082 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1083 sizeof(eqh->qh.qh_hlink), 1084 BUS_DMASYNC_POSTWRITE); 1085 sqh->hlink = eqh->hlink; 1086 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1087 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1088 BUS_DMASYNC_PREWRITE); 1089 eqh->hlink = sqh; 1090 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1091 sc->sc_hctl_end = sqh; 1092 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1093 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1094 #ifdef UHCI_CTL_LOOP 1095 uhci_add_loop(sc); 1096 #endif 1097 } 1098 1099 /* Remove high speed control QH, called with lock held. */ 1100 void 1101 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1102 { 1103 uhci_soft_qh_t *pqh; 1104 uint32_t elink; 1105 1106 KASSERT(mutex_owned(&sc->sc_lock)); 1107 1108 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1109 #ifdef UHCI_CTL_LOOP 1110 uhci_rem_loop(sc); 1111 #endif 1112 /* 1113 * The T bit should be set in the elink of the QH so that the HC 1114 * doesn't follow the pointer. This condition may fail if the 1115 * the transferred packet was short so that the QH still points 1116 * at the last used TD. 1117 * In this case we set the T bit and wait a little for the HC 1118 * to stop looking at the TD. 1119 * Note that if the TD chain is large enough, the controller 1120 * may still be looking at the chain at the end of this function. 1121 * uhci_free_std_chain() will make sure the controller stops 1122 * looking at it quickly, but until then we should not change 1123 * sqh->hlink. 1124 */ 1125 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1126 sizeof(sqh->qh.qh_elink), 1127 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1128 elink = le32toh(sqh->qh.qh_elink); 1129 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1130 sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD); 1131 if (!(elink & UHCI_PTR_T)) { 1132 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1133 usb_syncmem(&sqh->dma, 1134 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1135 sizeof(sqh->qh.qh_elink), 1136 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1137 delay(UHCI_QH_REMOVE_DELAY); 1138 } 1139 1140 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1141 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1142 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1143 pqh->hlink = sqh->hlink; 1144 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1145 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1146 sizeof(pqh->qh.qh_hlink), 1147 BUS_DMASYNC_PREWRITE); 1148 delay(UHCI_QH_REMOVE_DELAY); 1149 if (sc->sc_hctl_end == sqh) 1150 sc->sc_hctl_end = pqh; 1151 } 1152 1153 /* Add low speed control QH, called with lock held. */ 1154 void 1155 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1156 { 1157 uhci_soft_qh_t *eqh; 1158 1159 KASSERT(mutex_owned(&sc->sc_lock)); 1160 1161 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1162 eqh = sc->sc_lctl_end; 1163 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1164 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1165 sqh->hlink = eqh->hlink; 1166 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1167 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1168 BUS_DMASYNC_PREWRITE); 1169 eqh->hlink = sqh; 1170 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1171 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1172 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1173 sc->sc_lctl_end = sqh; 1174 } 1175 1176 /* Remove low speed control QH, called with lock held. */ 1177 void 1178 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1179 { 1180 uhci_soft_qh_t *pqh; 1181 uint32_t elink; 1182 1183 KASSERT(mutex_owned(&sc->sc_lock)); 1184 1185 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1186 /* See comment in uhci_remove_hs_ctrl() */ 1187 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1188 sizeof(sqh->qh.qh_elink), 1189 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1190 elink = le32toh(sqh->qh.qh_elink); 1191 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1192 sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD); 1193 if (!(elink & UHCI_PTR_T)) { 1194 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1195 usb_syncmem(&sqh->dma, 1196 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1197 sizeof(sqh->qh.qh_elink), 1198 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1199 delay(UHCI_QH_REMOVE_DELAY); 1200 } 1201 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1202 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1203 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1204 pqh->hlink = sqh->hlink; 1205 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1206 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1207 sizeof(pqh->qh.qh_hlink), 1208 BUS_DMASYNC_PREWRITE); 1209 delay(UHCI_QH_REMOVE_DELAY); 1210 if (sc->sc_lctl_end == sqh) 1211 sc->sc_lctl_end = pqh; 1212 } 1213 1214 /* Add bulk QH, called with lock held. */ 1215 void 1216 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1217 { 1218 uhci_soft_qh_t *eqh; 1219 1220 KASSERT(mutex_owned(&sc->sc_lock)); 1221 1222 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1223 eqh = sc->sc_bulk_end; 1224 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1225 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1226 sqh->hlink = eqh->hlink; 1227 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1228 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1229 BUS_DMASYNC_PREWRITE); 1230 eqh->hlink = sqh; 1231 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1232 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1233 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1234 sc->sc_bulk_end = sqh; 1235 uhci_add_loop(sc); 1236 } 1237 1238 /* Remove bulk QH, called with lock held. */ 1239 void 1240 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1241 { 1242 uhci_soft_qh_t *pqh; 1243 1244 KASSERT(mutex_owned(&sc->sc_lock)); 1245 1246 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1247 uhci_rem_loop(sc); 1248 /* See comment in uhci_remove_hs_ctrl() */ 1249 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1250 sizeof(sqh->qh.qh_elink), 1251 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1252 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1253 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1254 usb_syncmem(&sqh->dma, 1255 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1256 sizeof(sqh->qh.qh_elink), 1257 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1258 delay(UHCI_QH_REMOVE_DELAY); 1259 } 1260 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1261 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1262 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1263 pqh->hlink = sqh->hlink; 1264 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1265 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1266 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1267 delay(UHCI_QH_REMOVE_DELAY); 1268 if (sc->sc_bulk_end == sqh) 1269 sc->sc_bulk_end = pqh; 1270 } 1271 1272 Static int uhci_intr1(uhci_softc_t *); 1273 1274 int 1275 uhci_intr(void *arg) 1276 { 1277 uhci_softc_t *sc = arg; 1278 int ret = 0; 1279 1280 mutex_spin_enter(&sc->sc_intr_lock); 1281 1282 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1283 goto done; 1284 1285 if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) { 1286 #ifdef DIAGNOSTIC 1287 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1288 #endif 1289 goto done; 1290 } 1291 1292 ret = uhci_intr1(sc); 1293 1294 done: 1295 mutex_spin_exit(&sc->sc_intr_lock); 1296 return ret; 1297 } 1298 1299 int 1300 uhci_intr1(uhci_softc_t *sc) 1301 { 1302 int status; 1303 int ack; 1304 1305 #ifdef UHCI_DEBUG 1306 if (uhcidebug > 15) { 1307 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1308 uhci_dumpregs(sc); 1309 } 1310 #endif 1311 1312 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1313 1314 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1315 if (status == 0) /* The interrupt was not for us. */ 1316 return (0); 1317 1318 if (sc->sc_suspend != PWR_RESUME) { 1319 #ifdef DIAGNOSTIC 1320 printf("%s: interrupt while not operating ignored\n", 1321 device_xname(sc->sc_dev)); 1322 #endif 1323 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1324 return (0); 1325 } 1326 1327 ack = 0; 1328 if (status & UHCI_STS_USBINT) 1329 ack |= UHCI_STS_USBINT; 1330 if (status & UHCI_STS_USBEI) 1331 ack |= UHCI_STS_USBEI; 1332 if (status & UHCI_STS_RD) { 1333 ack |= UHCI_STS_RD; 1334 #ifdef UHCI_DEBUG 1335 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1336 #endif 1337 } 1338 if (status & UHCI_STS_HSE) { 1339 ack |= UHCI_STS_HSE; 1340 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1341 } 1342 if (status & UHCI_STS_HCPE) { 1343 ack |= UHCI_STS_HCPE; 1344 printf("%s: host controller process error\n", 1345 device_xname(sc->sc_dev)); 1346 } 1347 1348 /* When HCHalted=1 and Run/Stop=0 , it is normal */ 1349 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) { 1350 /* no acknowledge needed */ 1351 if (!sc->sc_dying) { 1352 printf("%s: host controller halted\n", 1353 device_xname(sc->sc_dev)); 1354 #ifdef UHCI_DEBUG 1355 uhci_dump_all(sc); 1356 #endif 1357 } 1358 sc->sc_dying = 1; 1359 } 1360 1361 if (!ack) 1362 return (0); /* nothing to acknowledge */ 1363 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1364 1365 sc->sc_bus.no_intrs++; 1366 usb_schedsoftintr(&sc->sc_bus); 1367 1368 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1369 1370 return (1); 1371 } 1372 1373 void 1374 uhci_softintr(void *v) 1375 { 1376 struct usbd_bus *bus = v; 1377 uhci_softc_t *sc = bus->hci_private; 1378 uhci_intr_info_t *ii, *nextii; 1379 1380 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1381 1382 DPRINTFN(10,("%s: uhci_softintr\n", device_xname(sc->sc_dev))); 1383 1384 /* 1385 * Interrupts on UHCI really suck. When the host controller 1386 * interrupts because a transfer is completed there is no 1387 * way of knowing which transfer it was. You can scan down 1388 * the TDs and QHs of the previous frame to limit the search, 1389 * but that assumes that the interrupt was not delayed by more 1390 * than 1 ms, which may not always be true (e.g. after debug 1391 * output on a slow console). 1392 * We scan all interrupt descriptors to see if any have 1393 * completed. 1394 */ 1395 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1396 nextii = LIST_NEXT(ii, list); 1397 uhci_check_intr(sc, ii); 1398 } 1399 1400 if (sc->sc_softwake) { 1401 sc->sc_softwake = 0; 1402 cv_broadcast(&sc->sc_softwake_cv); 1403 } 1404 } 1405 1406 /* Check for an interrupt. */ 1407 void 1408 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1409 { 1410 uhci_soft_td_t *std, *lstd; 1411 u_int32_t status; 1412 1413 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1414 #ifdef DIAGNOSTIC 1415 if (ii == NULL) { 1416 printf("uhci_check_intr: no ii? %p\n", ii); 1417 return; 1418 } 1419 #endif 1420 if (ii->xfer->status == USBD_CANCELLED || 1421 ii->xfer->status == USBD_TIMEOUT) { 1422 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1423 return; 1424 } 1425 1426 if (ii->stdstart == NULL) 1427 return; 1428 lstd = ii->stdend; 1429 #ifdef DIAGNOSTIC 1430 if (lstd == NULL) { 1431 printf("uhci_check_intr: std==0\n"); 1432 return; 1433 } 1434 #endif 1435 usb_syncmem(&lstd->dma, 1436 lstd->offs + offsetof(uhci_td_t, td_status), 1437 sizeof(lstd->td.td_status), 1438 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1439 status = le32toh(lstd->td.td_status); 1440 usb_syncmem(&lstd->dma, 1441 lstd->offs + offsetof(uhci_td_t, td_status), 1442 sizeof(lstd->td.td_status), 1443 BUS_DMASYNC_PREREAD); 1444 1445 /* If the last TD is not marked active we can complete */ 1446 if (!(status & UHCI_TD_ACTIVE)) { 1447 done: 1448 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1449 callout_stop(&ii->xfer->timeout_handle); 1450 uhci_idone(ii); 1451 return; 1452 } 1453 1454 /* 1455 * If the last TD is still active we need to check whether there 1456 * is an error somewhere in the middle, or whether there was a 1457 * short packet (SPD and not ACTIVE). 1458 */ 1459 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1460 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1461 usb_syncmem(&std->dma, 1462 std->offs + offsetof(uhci_td_t, td_status), 1463 sizeof(std->td.td_status), 1464 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1465 status = le32toh(std->td.td_status); 1466 usb_syncmem(&std->dma, 1467 std->offs + offsetof(uhci_td_t, td_status), 1468 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1469 1470 /* If there's an active TD the xfer isn't done. */ 1471 if (status & UHCI_TD_ACTIVE) { 1472 DPRINTFN(12, ("%s: ii=%p std=%p still active\n", 1473 __func__, ii, std)); 1474 return; 1475 } 1476 1477 /* Any kind of error makes the xfer done. */ 1478 if (status & UHCI_TD_STALLED) 1479 goto done; 1480 1481 /* 1482 * If the data phase of a control transfer is short, we need 1483 * to complete the status stage 1484 */ 1485 usbd_xfer_handle xfer = ii->xfer; 1486 usb_endpoint_descriptor_t *ed = xfer->pipe->endpoint->edesc; 1487 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1488 1489 if ((status & UHCI_TD_SPD) && xfertype == UE_CONTROL) { 1490 struct uhci_pipe *upipe = 1491 (struct uhci_pipe *)xfer->pipe; 1492 uhci_soft_qh_t *sqh = upipe->u.ctl.sqh; 1493 uhci_soft_td_t *stat = upipe->u.ctl.stat; 1494 1495 DPRINTFN(12, ("%s: ii=%p std=%p control status" 1496 "phase needs completion\n", __func__, ii, 1497 ii->stdstart)); 1498 1499 sqh->qh.qh_elink = 1500 htole32(stat->physaddr | UHCI_PTR_TD); 1501 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1502 BUS_DMASYNC_PREWRITE); 1503 break; 1504 } 1505 1506 /* We want short packets, and it is short: it's done */ 1507 usb_syncmem(&std->dma, 1508 std->offs + offsetof(uhci_td_t, td_token), 1509 sizeof(std->td.td_token), 1510 BUS_DMASYNC_POSTWRITE); 1511 1512 if ((status & UHCI_TD_SPD) && 1513 UHCI_TD_GET_ACTLEN(status) < 1514 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) { 1515 goto done; 1516 } 1517 } 1518 } 1519 1520 /* Called with USB lock held. */ 1521 void 1522 uhci_idone(uhci_intr_info_t *ii) 1523 { 1524 usbd_xfer_handle xfer = ii->xfer; 1525 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1526 #ifdef DIAGNOSTIC 1527 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1528 #endif 1529 uhci_soft_td_t *std; 1530 u_int32_t status = 0, nstatus; 1531 int actlen; 1532 1533 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1534 1535 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1536 #ifdef DIAGNOSTIC 1537 { 1538 /* XXX SMP? */ 1539 int s = splhigh(); 1540 if (ii->isdone) { 1541 splx(s); 1542 #ifdef UHCI_DEBUG 1543 printf("uhci_idone: ii is done!\n "); 1544 uhci_dump_ii(ii); 1545 #else 1546 printf("uhci_idone: ii=%p is done!\n", ii); 1547 #endif 1548 return; 1549 } 1550 ii->isdone = 1; 1551 splx(s); 1552 } 1553 #endif 1554 1555 if (xfer->nframes != 0) { 1556 /* Isoc transfer, do things differently. */ 1557 uhci_soft_td_t **stds = upipe->u.iso.stds; 1558 int i, n, nframes, len; 1559 1560 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1561 1562 nframes = xfer->nframes; 1563 actlen = 0; 1564 n = UXFER(xfer)->curframe; 1565 for (i = 0; i < nframes; i++) { 1566 std = stds[n]; 1567 #ifdef UHCI_DEBUG 1568 if (uhcidebug > 5) { 1569 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1570 uhci_dump_td(std); 1571 } 1572 #endif 1573 if (++n >= UHCI_VFRAMELIST_COUNT) 1574 n = 0; 1575 usb_syncmem(&std->dma, 1576 std->offs + offsetof(uhci_td_t, td_status), 1577 sizeof(std->td.td_status), 1578 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1579 status = le32toh(std->td.td_status); 1580 len = UHCI_TD_GET_ACTLEN(status); 1581 xfer->frlengths[i] = len; 1582 actlen += len; 1583 } 1584 upipe->u.iso.inuse -= nframes; 1585 xfer->actlen = actlen; 1586 xfer->status = USBD_NORMAL_COMPLETION; 1587 goto end; 1588 } 1589 1590 #ifdef UHCI_DEBUG 1591 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1592 ii, xfer, upipe)); 1593 if (uhcidebug > 10) 1594 uhci_dump_tds(ii->stdstart); 1595 #endif 1596 1597 /* The transfer is done, compute actual length and status. */ 1598 actlen = 0; 1599 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1600 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1601 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1602 nstatus = le32toh(std->td.td_status); 1603 if (nstatus & UHCI_TD_ACTIVE) 1604 break; 1605 1606 status = nstatus; 1607 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1608 UHCI_TD_PID_SETUP) 1609 actlen += UHCI_TD_GET_ACTLEN(status); 1610 else { 1611 /* 1612 * UHCI will report CRCTO in addition to a STALL or NAK 1613 * for a SETUP transaction. See section 3.2.2, "TD 1614 * CONTROL AND STATUS". 1615 */ 1616 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1617 status &= ~UHCI_TD_CRCTO; 1618 } 1619 } 1620 /* If there are left over TDs we need to update the toggle. */ 1621 if (std != NULL) 1622 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1623 1624 status &= UHCI_TD_ERROR; 1625 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1626 actlen, status)); 1627 xfer->actlen = actlen; 1628 if (status != 0) { 1629 #ifdef UHCI_DEBUG 1630 char sbuf[128]; 1631 1632 snprintb(sbuf, sizeof(sbuf), 1633 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1634 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status); 1635 1636 DPRINTFN((status == UHCI_TD_STALLED)*10, 1637 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1638 "status 0x%s\n", 1639 xfer->pipe->device->address, 1640 xfer->pipe->endpoint->edesc->bEndpointAddress, 1641 sbuf)); 1642 #endif 1643 1644 if (status == UHCI_TD_STALLED) 1645 xfer->status = USBD_STALLED; 1646 else 1647 xfer->status = USBD_IOERROR; /* more info XXX */ 1648 } else { 1649 xfer->status = USBD_NORMAL_COMPLETION; 1650 } 1651 1652 end: 1653 usb_transfer_complete(xfer); 1654 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1655 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1656 } 1657 1658 /* 1659 * Called when a request does not complete. 1660 */ 1661 void 1662 uhci_timeout(void *addr) 1663 { 1664 uhci_intr_info_t *ii = addr; 1665 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1666 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1667 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1668 1669 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1670 1671 if (sc->sc_dying) { 1672 mutex_enter(&sc->sc_lock); 1673 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1674 mutex_exit(&sc->sc_lock); 1675 return; 1676 } 1677 1678 /* Execute the abort in a process context. */ 1679 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer, 1680 USB_TASKQ_MPSAFE); 1681 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1682 USB_TASKQ_HC); 1683 } 1684 1685 void 1686 uhci_timeout_task(void *addr) 1687 { 1688 usbd_xfer_handle xfer = addr; 1689 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 1690 1691 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1692 1693 mutex_enter(&sc->sc_lock); 1694 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1695 mutex_exit(&sc->sc_lock); 1696 } 1697 1698 /* 1699 * Wait here until controller claims to have an interrupt. 1700 * Then call uhci_intr and return. Use timeout to avoid waiting 1701 * too long. 1702 * Only used during boot when interrupts are not enabled yet. 1703 */ 1704 void 1705 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1706 { 1707 int timo = xfer->timeout; 1708 uhci_intr_info_t *ii; 1709 1710 mutex_enter(&sc->sc_lock); 1711 1712 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1713 1714 xfer->status = USBD_IN_PROGRESS; 1715 for (; timo >= 0; timo--) { 1716 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_lock); 1717 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1718 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1719 mutex_spin_enter(&sc->sc_intr_lock); 1720 uhci_intr1(sc); 1721 mutex_spin_exit(&sc->sc_intr_lock); 1722 if (xfer->status != USBD_IN_PROGRESS) 1723 goto done; 1724 } 1725 } 1726 1727 /* Timeout */ 1728 DPRINTF(("uhci_waitintr: timeout\n")); 1729 for (ii = LIST_FIRST(&sc->sc_intrhead); 1730 ii != NULL && ii->xfer != xfer; 1731 ii = LIST_NEXT(ii, list)) 1732 ; 1733 #ifdef DIAGNOSTIC 1734 if (ii == NULL) 1735 panic("uhci_waitintr: lost intr_info"); 1736 #endif 1737 uhci_idone(ii); 1738 1739 done: 1740 mutex_exit(&sc->sc_lock); 1741 } 1742 1743 void 1744 uhci_poll(struct usbd_bus *bus) 1745 { 1746 uhci_softc_t *sc = bus->hci_private; 1747 1748 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1749 mutex_spin_enter(&sc->sc_intr_lock); 1750 uhci_intr1(sc); 1751 mutex_spin_exit(&sc->sc_intr_lock); 1752 } 1753 } 1754 1755 void 1756 uhci_reset(uhci_softc_t *sc) 1757 { 1758 int n; 1759 1760 UHCICMD(sc, UHCI_CMD_HCRESET); 1761 /* The reset bit goes low when the controller is done. */ 1762 for (n = 0; n < UHCI_RESET_TIMEOUT && 1763 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1764 usb_delay_ms(&sc->sc_bus, 1); 1765 if (n >= UHCI_RESET_TIMEOUT) 1766 printf("%s: controller did not reset\n", 1767 device_xname(sc->sc_dev)); 1768 } 1769 1770 usbd_status 1771 uhci_run(uhci_softc_t *sc, int run, int locked) 1772 { 1773 int n, running; 1774 u_int16_t cmd; 1775 1776 run = run != 0; 1777 if (!locked) 1778 mutex_spin_enter(&sc->sc_intr_lock); 1779 DPRINTF(("uhci_run: setting run=%d\n", run)); 1780 cmd = UREAD2(sc, UHCI_CMD); 1781 if (run) 1782 cmd |= UHCI_CMD_RS; 1783 else 1784 cmd &= ~UHCI_CMD_RS; 1785 UHCICMD(sc, cmd); 1786 for(n = 0; n < 10; n++) { 1787 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1788 /* return when we've entered the state we want */ 1789 if (run == running) { 1790 if (!locked) 1791 mutex_spin_exit(&sc->sc_intr_lock); 1792 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1793 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1794 return (USBD_NORMAL_COMPLETION); 1795 } 1796 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock); 1797 } 1798 if (!locked) 1799 mutex_spin_exit(&sc->sc_intr_lock); 1800 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1801 run ? "start" : "stop"); 1802 return (USBD_IOERROR); 1803 } 1804 1805 /* 1806 * Memory management routines. 1807 * uhci_alloc_std allocates TDs 1808 * uhci_alloc_sqh allocates QHs 1809 * These two routines do their own free list management, 1810 * partly for speed, partly because allocating DMAable memory 1811 * has page size granularaity so much memory would be wasted if 1812 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1813 */ 1814 1815 uhci_soft_td_t * 1816 uhci_alloc_std(uhci_softc_t *sc) 1817 { 1818 uhci_soft_td_t *std; 1819 usbd_status err; 1820 int i, offs; 1821 usb_dma_t dma; 1822 1823 if (sc->sc_freetds == NULL) { 1824 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1825 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1826 UHCI_TD_ALIGN, &dma); 1827 if (err) 1828 return (0); 1829 for (i = 0; i < UHCI_STD_CHUNK; i++) { 1830 offs = i * UHCI_STD_SIZE; 1831 std = KERNADDR(&dma, offs); 1832 std->physaddr = DMAADDR(&dma, offs); 1833 std->dma = dma; 1834 std->offs = offs; 1835 std->link.std = sc->sc_freetds; 1836 sc->sc_freetds = std; 1837 } 1838 } 1839 std = sc->sc_freetds; 1840 sc->sc_freetds = std->link.std; 1841 memset(&std->td, 0, sizeof(uhci_td_t)); 1842 return std; 1843 } 1844 1845 void 1846 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1847 { 1848 #ifdef DIAGNOSTIC 1849 #define TD_IS_FREE 0x12345678 1850 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1851 printf("uhci_free_std: freeing free TD %p\n", std); 1852 return; 1853 } 1854 std->td.td_token = htole32(TD_IS_FREE); 1855 #endif 1856 std->link.std = sc->sc_freetds; 1857 sc->sc_freetds = std; 1858 } 1859 1860 uhci_soft_qh_t * 1861 uhci_alloc_sqh(uhci_softc_t *sc) 1862 { 1863 uhci_soft_qh_t *sqh; 1864 usbd_status err; 1865 int i, offs; 1866 usb_dma_t dma; 1867 1868 if (sc->sc_freeqhs == NULL) { 1869 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1870 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1871 UHCI_QH_ALIGN, &dma); 1872 if (err) 1873 return (0); 1874 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1875 offs = i * UHCI_SQH_SIZE; 1876 sqh = KERNADDR(&dma, offs); 1877 sqh->physaddr = DMAADDR(&dma, offs); 1878 sqh->dma = dma; 1879 sqh->offs = offs; 1880 sqh->hlink = sc->sc_freeqhs; 1881 sc->sc_freeqhs = sqh; 1882 } 1883 } 1884 sqh = sc->sc_freeqhs; 1885 sc->sc_freeqhs = sqh->hlink; 1886 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1887 return (sqh); 1888 } 1889 1890 void 1891 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1892 { 1893 sqh->hlink = sc->sc_freeqhs; 1894 sc->sc_freeqhs = sqh; 1895 } 1896 1897 void 1898 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1899 uhci_soft_td_t *stdend) 1900 { 1901 uhci_soft_td_t *p; 1902 uint32_t td_link; 1903 1904 /* 1905 * to avoid race condition with the controller which may be looking 1906 * at this chain, we need to first invalidate all links, and 1907 * then wait for the controller to move to another queue 1908 */ 1909 for (p = std; p != stdend; p = p->link.std) { 1910 usb_syncmem(&p->dma, 1911 p->offs + offsetof(uhci_td_t, td_link), 1912 sizeof(p->td.td_link), 1913 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1914 td_link = le32toh(p->td.td_link); 1915 usb_syncmem(&p->dma, 1916 p->offs + offsetof(uhci_td_t, td_link), 1917 sizeof(p->td.td_link), 1918 BUS_DMASYNC_PREREAD); 1919 if ((td_link & UHCI_PTR_T) == 0) { 1920 p->td.td_link = htole32(UHCI_PTR_T); 1921 usb_syncmem(&p->dma, 1922 p->offs + offsetof(uhci_td_t, td_link), 1923 sizeof(p->td.td_link), 1924 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1925 } 1926 } 1927 delay(UHCI_QH_REMOVE_DELAY); 1928 1929 for (; std != stdend; std = p) { 1930 p = std->link.std; 1931 uhci_free_std(sc, std); 1932 } 1933 } 1934 1935 usbd_status 1936 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1937 int rd, u_int16_t flags, usb_dma_t *dma, 1938 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1939 { 1940 uhci_soft_td_t *p, *lastp; 1941 uhci_physaddr_t lastlink; 1942 int i, ntd, l, tog, maxp; 1943 u_int32_t status; 1944 int addr = upipe->pipe.device->address; 1945 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1946 1947 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1948 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1949 upipe->pipe.device->speed, flags)); 1950 1951 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 1952 1953 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1954 if (maxp == 0) { 1955 printf("uhci_alloc_std_chain: maxp=0\n"); 1956 return (USBD_INVAL); 1957 } 1958 ntd = (len + maxp - 1) / maxp; 1959 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1960 ntd++; 1961 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1962 if (ntd == 0) { 1963 *sp = *ep = 0; 1964 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1965 return (USBD_NORMAL_COMPLETION); 1966 } 1967 tog = upipe->nexttoggle; 1968 if (ntd % 2 == 0) 1969 tog ^= 1; 1970 upipe->nexttoggle = tog ^ 1; 1971 lastp = NULL; 1972 lastlink = UHCI_PTR_T; 1973 ntd--; 1974 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1975 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1976 status |= UHCI_TD_LS; 1977 if (flags & USBD_SHORT_XFER_OK) 1978 status |= UHCI_TD_SPD; 1979 usb_syncmem(dma, 0, len, 1980 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1981 for (i = ntd; i >= 0; i--) { 1982 p = uhci_alloc_std(sc); 1983 if (p == NULL) { 1984 KASSERT(lastp != NULL); 1985 uhci_free_std_chain(sc, lastp, NULL); 1986 return (USBD_NOMEM); 1987 } 1988 p->link.std = lastp; 1989 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1990 lastp = p; 1991 lastlink = p->physaddr; 1992 p->td.td_status = htole32(status); 1993 if (i == ntd) { 1994 /* last TD */ 1995 l = len % maxp; 1996 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1997 l = maxp; 1998 *ep = p; 1999 } else 2000 l = maxp; 2001 p->td.td_token = 2002 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 2003 UHCI_TD_OUT(l, endpt, addr, tog)); 2004 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 2005 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 2006 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2007 tog ^= 1; 2008 } 2009 *sp = lastp; 2010 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 2011 upipe->nexttoggle)); 2012 return (USBD_NORMAL_COMPLETION); 2013 } 2014 2015 void 2016 uhci_device_clear_toggle(usbd_pipe_handle pipe) 2017 { 2018 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2019 upipe->nexttoggle = 0; 2020 } 2021 2022 void 2023 uhci_noop(usbd_pipe_handle pipe) 2024 { 2025 } 2026 2027 usbd_status 2028 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 2029 { 2030 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2031 usbd_status err; 2032 2033 /* Insert last in queue. */ 2034 mutex_enter(&sc->sc_lock); 2035 err = usb_insert_transfer(xfer); 2036 mutex_exit(&sc->sc_lock); 2037 if (err) 2038 return (err); 2039 2040 /* 2041 * Pipe isn't running (otherwise err would be USBD_INPROG), 2042 * so start it first. 2043 */ 2044 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2045 } 2046 2047 usbd_status 2048 uhci_device_bulk_start(usbd_xfer_handle xfer) 2049 { 2050 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2051 usbd_device_handle dev = upipe->pipe.device; 2052 uhci_softc_t *sc = dev->bus->hci_private; 2053 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2054 uhci_soft_td_t *data, *dataend; 2055 uhci_soft_qh_t *sqh; 2056 usbd_status err; 2057 int len, isread, endpt; 2058 2059 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2060 xfer, xfer->length, xfer->flags, ii)); 2061 2062 if (sc->sc_dying) 2063 return (USBD_IOERROR); 2064 2065 #ifdef DIAGNOSTIC 2066 if (xfer->rqflags & URQ_REQUEST) 2067 panic("uhci_device_bulk_transfer: a request"); 2068 #endif 2069 2070 mutex_enter(&sc->sc_lock); 2071 2072 len = xfer->length; 2073 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2074 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2075 sqh = upipe->u.bulk.sqh; 2076 2077 upipe->u.bulk.isread = isread; 2078 upipe->u.bulk.length = len; 2079 2080 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2081 &xfer->dmabuf, &data, &dataend); 2082 if (err) { 2083 mutex_exit(&sc->sc_lock); 2084 return (err); 2085 } 2086 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2087 usb_syncmem(&dataend->dma, 2088 dataend->offs + offsetof(uhci_td_t, td_status), 2089 sizeof(dataend->td.td_status), 2090 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2091 2092 2093 #ifdef UHCI_DEBUG 2094 if (uhcidebug > 8) { 2095 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2096 uhci_dump_tds(data); 2097 } 2098 #endif 2099 2100 /* Set up interrupt info. */ 2101 ii->xfer = xfer; 2102 ii->stdstart = data; 2103 ii->stdend = dataend; 2104 #ifdef DIAGNOSTIC 2105 if (!ii->isdone) { 2106 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2107 } 2108 ii->isdone = 0; 2109 #endif 2110 2111 sqh->elink = data; 2112 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2113 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2114 2115 uhci_add_bulk(sc, sqh); 2116 uhci_add_intr_info(sc, ii); 2117 2118 if (xfer->timeout && !sc->sc_bus.use_polling) { 2119 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2120 uhci_timeout, ii); 2121 } 2122 xfer->status = USBD_IN_PROGRESS; 2123 2124 #ifdef UHCI_DEBUG 2125 if (uhcidebug > 10) { 2126 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2127 uhci_dump_tds(data); 2128 } 2129 #endif 2130 2131 if (sc->sc_bus.use_polling) 2132 uhci_waitintr(sc, xfer); 2133 2134 mutex_exit(&sc->sc_lock); 2135 return (USBD_IN_PROGRESS); 2136 } 2137 2138 /* Abort a device bulk request. */ 2139 void 2140 uhci_device_bulk_abort(usbd_xfer_handle xfer) 2141 { 2142 #ifdef DIAGNOSTIC 2143 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2144 #endif 2145 2146 KASSERT(mutex_owned(&sc->sc_lock)); 2147 2148 DPRINTF(("uhci_device_bulk_abort:\n")); 2149 uhci_abort_xfer(xfer, USBD_CANCELLED); 2150 } 2151 2152 /* 2153 * Abort a device request. 2154 * If this routine is called at splusb() it guarantees that the request 2155 * will be removed from the hardware scheduling and that the callback 2156 * for it will be called with USBD_CANCELLED status. 2157 * It's impossible to guarantee that the requested transfer will not 2158 * have happened since the hardware runs concurrently. 2159 * If the transaction has already happened we rely on the ordinary 2160 * interrupt processing to process it. 2161 * XXX This is most probably wrong. 2162 * XXXMRG this doesn't make sense anymore. 2163 */ 2164 void 2165 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2166 { 2167 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2168 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2169 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2170 uhci_soft_td_t *std; 2171 int wake; 2172 2173 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2174 2175 KASSERT(mutex_owned(&sc->sc_lock)); 2176 2177 if (sc->sc_dying) { 2178 /* If we're dying, just do the software part. */ 2179 xfer->status = status; /* make software ignore it */ 2180 callout_stop(&xfer->timeout_handle); 2181 usb_transfer_complete(xfer); 2182 return; 2183 } 2184 2185 if (cpu_intr_p() || cpu_softintr_p()) 2186 panic("uhci_abort_xfer: not in process context"); 2187 2188 /* 2189 * If an abort is already in progress then just wait for it to 2190 * complete and return. 2191 */ 2192 if (xfer->hcflags & UXFER_ABORTING) { 2193 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2194 #ifdef DIAGNOSTIC 2195 if (status == USBD_TIMEOUT) 2196 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2197 #endif 2198 /* Override the status which might be USBD_TIMEOUT. */ 2199 xfer->status = status; 2200 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2201 xfer->hcflags |= UXFER_ABORTWAIT; 2202 while (xfer->hcflags & UXFER_ABORTING) 2203 cv_wait(&xfer->hccv, &sc->sc_lock); 2204 goto done; 2205 } 2206 xfer->hcflags |= UXFER_ABORTING; 2207 2208 /* 2209 * Step 1: Make interrupt routine and hardware ignore xfer. 2210 */ 2211 xfer->status = status; /* make software ignore it */ 2212 callout_stop(&xfer->timeout_handle); 2213 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2214 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2215 usb_syncmem(&std->dma, 2216 std->offs + offsetof(uhci_td_t, td_status), 2217 sizeof(std->td.td_status), 2218 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2219 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2220 usb_syncmem(&std->dma, 2221 std->offs + offsetof(uhci_td_t, td_status), 2222 sizeof(std->td.td_status), 2223 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2224 } 2225 2226 /* 2227 * Step 2: Wait until we know hardware has finished any possible 2228 * use of the xfer. Also make sure the soft interrupt routine 2229 * has run. 2230 */ 2231 /* Hardware finishes in 1ms */ 2232 usb_delay_ms_locked(upipe->pipe.device->bus, 2, &sc->sc_lock); 2233 sc->sc_softwake = 1; 2234 usb_schedsoftintr(&sc->sc_bus); 2235 DPRINTFN(1,("uhci_abort_xfer: cv_wait\n")); 2236 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2237 2238 /* 2239 * Step 3: Execute callback. 2240 */ 2241 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2242 #ifdef DIAGNOSTIC 2243 ii->isdone = 1; 2244 #endif 2245 wake = xfer->hcflags & UXFER_ABORTWAIT; 2246 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2247 usb_transfer_complete(xfer); 2248 if (wake) 2249 cv_broadcast(&xfer->hccv); 2250 done: 2251 KASSERT(mutex_owned(&sc->sc_lock)); 2252 } 2253 2254 /* Close a device bulk pipe. */ 2255 void 2256 uhci_device_bulk_close(usbd_pipe_handle pipe) 2257 { 2258 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2259 usbd_device_handle dev = upipe->pipe.device; 2260 uhci_softc_t *sc = dev->bus->hci_private; 2261 2262 KASSERT(mutex_owned(&sc->sc_lock)); 2263 2264 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2265 2266 pipe->endpoint->datatoggle = upipe->nexttoggle; 2267 } 2268 2269 usbd_status 2270 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2271 { 2272 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2273 usbd_status err; 2274 2275 /* Insert last in queue. */ 2276 mutex_enter(&sc->sc_lock); 2277 err = usb_insert_transfer(xfer); 2278 mutex_exit(&sc->sc_lock); 2279 if (err) 2280 return (err); 2281 2282 /* 2283 * Pipe isn't running (otherwise err would be USBD_INPROG), 2284 * so start it first. 2285 */ 2286 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2287 } 2288 2289 usbd_status 2290 uhci_device_ctrl_start(usbd_xfer_handle xfer) 2291 { 2292 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2293 usbd_status err; 2294 2295 if (sc->sc_dying) 2296 return (USBD_IOERROR); 2297 2298 #ifdef DIAGNOSTIC 2299 if (!(xfer->rqflags & URQ_REQUEST)) 2300 panic("uhci_device_ctrl_transfer: not a request"); 2301 #endif 2302 2303 mutex_enter(&sc->sc_lock); 2304 err = uhci_device_request(xfer); 2305 mutex_exit(&sc->sc_lock); 2306 if (err) 2307 return (err); 2308 2309 if (sc->sc_bus.use_polling) 2310 uhci_waitintr(sc, xfer); 2311 return (USBD_IN_PROGRESS); 2312 } 2313 2314 usbd_status 2315 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2316 { 2317 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2318 usbd_status err; 2319 2320 /* Insert last in queue. */ 2321 mutex_enter(&sc->sc_lock); 2322 err = usb_insert_transfer(xfer); 2323 mutex_exit(&sc->sc_lock); 2324 if (err) 2325 return (err); 2326 2327 /* 2328 * Pipe isn't running (otherwise err would be USBD_INPROG), 2329 * so start it first. 2330 */ 2331 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2332 } 2333 2334 usbd_status 2335 uhci_device_intr_start(usbd_xfer_handle xfer) 2336 { 2337 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2338 usbd_device_handle dev = upipe->pipe.device; 2339 uhci_softc_t *sc = dev->bus->hci_private; 2340 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2341 uhci_soft_td_t *data, *dataend; 2342 uhci_soft_qh_t *sqh; 2343 usbd_status err; 2344 int isread, endpt; 2345 int i; 2346 2347 if (sc->sc_dying) 2348 return (USBD_IOERROR); 2349 2350 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2351 xfer, xfer->length, xfer->flags)); 2352 2353 #ifdef DIAGNOSTIC 2354 if (xfer->rqflags & URQ_REQUEST) 2355 panic("uhci_device_intr_transfer: a request"); 2356 #endif 2357 2358 mutex_enter(&sc->sc_lock); 2359 2360 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2361 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2362 2363 upipe->u.intr.isread = isread; 2364 2365 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2366 xfer->flags, &xfer->dmabuf, &data, 2367 &dataend); 2368 if (err) { 2369 mutex_exit(&sc->sc_lock); 2370 return (err); 2371 } 2372 2373 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2374 usb_syncmem(&dataend->dma, 2375 dataend->offs + offsetof(uhci_td_t, td_status), 2376 sizeof(dataend->td.td_status), 2377 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2378 2379 #ifdef UHCI_DEBUG 2380 if (uhcidebug > 10) { 2381 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2382 uhci_dump_tds(data); 2383 uhci_dump_qh(upipe->u.intr.qhs[0]); 2384 } 2385 #endif 2386 2387 /* Set up interrupt info. */ 2388 ii->xfer = xfer; 2389 ii->stdstart = data; 2390 ii->stdend = dataend; 2391 #ifdef DIAGNOSTIC 2392 if (!ii->isdone) { 2393 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2394 } 2395 ii->isdone = 0; 2396 #endif 2397 2398 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2399 upipe->u.intr.qhs[0])); 2400 for (i = 0; i < upipe->u.intr.npoll; i++) { 2401 sqh = upipe->u.intr.qhs[i]; 2402 sqh->elink = data; 2403 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2404 usb_syncmem(&sqh->dma, 2405 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2406 sizeof(sqh->qh.qh_elink), 2407 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2408 } 2409 uhci_add_intr_info(sc, ii); 2410 xfer->status = USBD_IN_PROGRESS; 2411 mutex_exit(&sc->sc_lock); 2412 2413 #ifdef UHCI_DEBUG 2414 if (uhcidebug > 10) { 2415 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2416 uhci_dump_tds(data); 2417 uhci_dump_qh(upipe->u.intr.qhs[0]); 2418 } 2419 #endif 2420 2421 return (USBD_IN_PROGRESS); 2422 } 2423 2424 /* Abort a device control request. */ 2425 void 2426 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2427 { 2428 #ifdef DIAGNOSTIC 2429 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2430 #endif 2431 2432 KASSERT(mutex_owned(&sc->sc_lock)); 2433 2434 DPRINTF(("uhci_device_ctrl_abort:\n")); 2435 uhci_abort_xfer(xfer, USBD_CANCELLED); 2436 } 2437 2438 /* Close a device control pipe. */ 2439 void 2440 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2441 { 2442 } 2443 2444 /* Abort a device interrupt request. */ 2445 void 2446 uhci_device_intr_abort(usbd_xfer_handle xfer) 2447 { 2448 #ifdef DIAGNOSTIC 2449 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2450 #endif 2451 2452 KASSERT(mutex_owned(&sc->sc_lock)); 2453 2454 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2455 if (xfer->pipe->intrxfer == xfer) { 2456 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2457 xfer->pipe->intrxfer = NULL; 2458 } 2459 uhci_abort_xfer(xfer, USBD_CANCELLED); 2460 } 2461 2462 /* Close a device interrupt pipe. */ 2463 void 2464 uhci_device_intr_close(usbd_pipe_handle pipe) 2465 { 2466 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2467 uhci_softc_t *sc = pipe->device->bus->hci_private; 2468 int i, npoll; 2469 2470 KASSERT(mutex_owned(&sc->sc_lock)); 2471 2472 /* Unlink descriptors from controller data structures. */ 2473 npoll = upipe->u.intr.npoll; 2474 for (i = 0; i < npoll; i++) 2475 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2476 2477 /* 2478 * We now have to wait for any activity on the physical 2479 * descriptors to stop. 2480 */ 2481 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2482 2483 for(i = 0; i < npoll; i++) 2484 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2485 kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *)); 2486 2487 /* XXX free other resources */ 2488 } 2489 2490 usbd_status 2491 uhci_device_request(usbd_xfer_handle xfer) 2492 { 2493 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2494 usb_device_request_t *req = &xfer->request; 2495 usbd_device_handle dev = upipe->pipe.device; 2496 uhci_softc_t *sc = dev->bus->hci_private; 2497 int addr = dev->address; 2498 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2499 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2500 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2501 uhci_soft_qh_t *sqh; 2502 int len; 2503 u_int32_t ls; 2504 usbd_status err; 2505 int isread; 2506 2507 KASSERT(mutex_owned(&sc->sc_lock)); 2508 2509 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2510 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2511 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2512 UGETW(req->wIndex), UGETW(req->wLength), 2513 addr, endpt)); 2514 2515 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2516 isread = req->bmRequestType & UT_READ; 2517 len = UGETW(req->wLength); 2518 2519 setup = upipe->u.ctl.setup; 2520 stat = upipe->u.ctl.stat; 2521 sqh = upipe->u.ctl.sqh; 2522 2523 /* Set up data transaction */ 2524 if (len != 0) { 2525 upipe->nexttoggle = 1; 2526 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2527 &xfer->dmabuf, &data, &dataend); 2528 if (err) 2529 return (err); 2530 next = data; 2531 dataend->link.std = stat; 2532 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_TD); 2533 usb_syncmem(&dataend->dma, 2534 dataend->offs + offsetof(uhci_td_t, td_link), 2535 sizeof(dataend->td.td_link), 2536 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2537 } else { 2538 next = stat; 2539 } 2540 upipe->u.ctl.length = len; 2541 2542 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2543 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2544 2545 setup->link.std = next; 2546 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_TD); 2547 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2548 UHCI_TD_ACTIVE); 2549 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2550 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2551 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2552 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2553 2554 stat->link.std = NULL; 2555 stat->td.td_link = htole32(UHCI_PTR_T); 2556 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2557 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2558 stat->td.td_token = 2559 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2560 UHCI_TD_IN (0, endpt, addr, 1)); 2561 stat->td.td_buffer = htole32(0); 2562 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2563 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2564 2565 #ifdef UHCI_DEBUG 2566 if (uhcidebug > 10) { 2567 DPRINTF(("uhci_device_request: before transfer\n")); 2568 uhci_dump_tds(setup); 2569 } 2570 #endif 2571 2572 /* Set up interrupt info. */ 2573 ii->xfer = xfer; 2574 ii->stdstart = setup; 2575 ii->stdend = stat; 2576 #ifdef DIAGNOSTIC 2577 if (!ii->isdone) { 2578 printf("uhci_device_request: not done, ii=%p\n", ii); 2579 } 2580 ii->isdone = 0; 2581 #endif 2582 2583 sqh->elink = setup; 2584 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2585 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2586 2587 if (dev->speed == USB_SPEED_LOW) 2588 uhci_add_ls_ctrl(sc, sqh); 2589 else 2590 uhci_add_hs_ctrl(sc, sqh); 2591 uhci_add_intr_info(sc, ii); 2592 #ifdef UHCI_DEBUG 2593 if (uhcidebug > 12) { 2594 uhci_soft_td_t *std; 2595 uhci_soft_qh_t *xqh; 2596 uhci_soft_qh_t *sxqh; 2597 int maxqh = 0; 2598 uhci_physaddr_t link; 2599 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2600 for (std = sc->sc_vframes[0].htd, link = 0; 2601 (link & UHCI_PTR_QH) == 0; 2602 std = std->link.std) { 2603 link = le32toh(std->td.td_link); 2604 uhci_dump_td(std); 2605 } 2606 sxqh = (uhci_soft_qh_t *)std; 2607 uhci_dump_qh(sxqh); 2608 for (xqh = sxqh; 2609 xqh != NULL; 2610 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2611 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2612 uhci_dump_qh(xqh); 2613 } 2614 DPRINTF(("Enqueued QH:\n")); 2615 uhci_dump_qh(sqh); 2616 uhci_dump_tds(sqh->elink); 2617 } 2618 #endif 2619 if (xfer->timeout && !sc->sc_bus.use_polling) { 2620 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2621 uhci_timeout, ii); 2622 } 2623 xfer->status = USBD_IN_PROGRESS; 2624 2625 return (USBD_NORMAL_COMPLETION); 2626 } 2627 2628 usbd_status 2629 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2630 { 2631 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2632 usbd_status err; 2633 2634 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2635 2636 /* Put it on our queue, */ 2637 mutex_enter(&sc->sc_lock); 2638 err = usb_insert_transfer(xfer); 2639 mutex_exit(&sc->sc_lock); 2640 2641 /* bail out on error, */ 2642 if (err && err != USBD_IN_PROGRESS) 2643 return (err); 2644 2645 /* XXX should check inuse here */ 2646 2647 /* insert into schedule, */ 2648 uhci_device_isoc_enter(xfer); 2649 2650 /* and start if the pipe wasn't running */ 2651 if (!err) 2652 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2653 2654 return (err); 2655 } 2656 2657 void 2658 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2659 { 2660 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2661 usbd_device_handle dev = upipe->pipe.device; 2662 uhci_softc_t *sc = dev->bus->hci_private; 2663 struct iso *iso = &upipe->u.iso; 2664 uhci_soft_td_t *std; 2665 u_int32_t buf, len, status, offs; 2666 int i, next, nframes; 2667 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2668 2669 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2670 "nframes=%d\n", 2671 iso->inuse, iso->next, xfer, xfer->nframes)); 2672 2673 if (sc->sc_dying) 2674 return; 2675 2676 if (xfer->status == USBD_IN_PROGRESS) { 2677 /* This request has already been entered into the frame list */ 2678 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2679 /* XXX */ 2680 } 2681 2682 #ifdef DIAGNOSTIC 2683 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2684 printf("uhci_device_isoc_enter: overflow!\n"); 2685 #endif 2686 2687 next = iso->next; 2688 if (next == -1) { 2689 /* Not in use yet, schedule it a few frames ahead. */ 2690 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2691 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2692 } 2693 2694 xfer->status = USBD_IN_PROGRESS; 2695 UXFER(xfer)->curframe = next; 2696 2697 buf = DMAADDR(&xfer->dmabuf, 0); 2698 offs = 0; 2699 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2700 UHCI_TD_ACTIVE | 2701 UHCI_TD_IOS); 2702 nframes = xfer->nframes; 2703 mutex_enter(&sc->sc_lock); 2704 for (i = 0; i < nframes; i++) { 2705 std = iso->stds[next]; 2706 if (++next >= UHCI_VFRAMELIST_COUNT) 2707 next = 0; 2708 len = xfer->frlengths[i]; 2709 std->td.td_buffer = htole32(buf); 2710 usb_syncmem(&xfer->dmabuf, offs, len, 2711 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2712 if (i == nframes - 1) 2713 status |= UHCI_TD_IOC; 2714 std->td.td_status = htole32(status); 2715 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2716 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2717 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2718 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2719 #ifdef UHCI_DEBUG 2720 if (uhcidebug > 5) { 2721 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2722 uhci_dump_td(std); 2723 } 2724 #endif 2725 buf += len; 2726 offs += len; 2727 } 2728 iso->next = next; 2729 iso->inuse += xfer->nframes; 2730 2731 mutex_exit(&sc->sc_lock); 2732 } 2733 2734 usbd_status 2735 uhci_device_isoc_start(usbd_xfer_handle xfer) 2736 { 2737 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2738 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2739 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2740 uhci_soft_td_t *end; 2741 int i; 2742 2743 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2744 2745 mutex_enter(&sc->sc_lock); 2746 2747 if (sc->sc_dying) { 2748 mutex_exit(&sc->sc_lock); 2749 return (USBD_IOERROR); 2750 } 2751 2752 #ifdef DIAGNOSTIC 2753 if (xfer->status != USBD_IN_PROGRESS) 2754 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2755 #endif 2756 2757 /* Find the last TD */ 2758 i = UXFER(xfer)->curframe + xfer->nframes; 2759 if (i >= UHCI_VFRAMELIST_COUNT) 2760 i -= UHCI_VFRAMELIST_COUNT; 2761 end = upipe->u.iso.stds[i]; 2762 2763 #ifdef DIAGNOSTIC 2764 if (end == NULL) { 2765 printf("uhci_device_isoc_start: end == NULL\n"); 2766 return (USBD_INVAL); 2767 } 2768 #endif 2769 2770 /* Set up interrupt info. */ 2771 ii->xfer = xfer; 2772 ii->stdstart = end; 2773 ii->stdend = end; 2774 #ifdef DIAGNOSTIC 2775 if (!ii->isdone) 2776 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2777 ii->isdone = 0; 2778 #endif 2779 uhci_add_intr_info(sc, ii); 2780 2781 mutex_exit(&sc->sc_lock); 2782 2783 return (USBD_IN_PROGRESS); 2784 } 2785 2786 void 2787 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2788 { 2789 #ifdef DIAGNOSTIC 2790 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2791 #endif 2792 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2793 uhci_soft_td_t **stds = upipe->u.iso.stds; 2794 uhci_soft_td_t *std; 2795 int i, n, nframes, maxlen, len; 2796 2797 KASSERT(mutex_owned(&sc->sc_lock)); 2798 2799 /* Transfer is already done. */ 2800 if (xfer->status != USBD_NOT_STARTED && 2801 xfer->status != USBD_IN_PROGRESS) { 2802 return; 2803 } 2804 2805 /* Give xfer the requested abort code. */ 2806 xfer->status = USBD_CANCELLED; 2807 2808 /* make hardware ignore it, */ 2809 nframes = xfer->nframes; 2810 n = UXFER(xfer)->curframe; 2811 maxlen = 0; 2812 for (i = 0; i < nframes; i++) { 2813 std = stds[n]; 2814 usb_syncmem(&std->dma, 2815 std->offs + offsetof(uhci_td_t, td_status), 2816 sizeof(std->td.td_status), 2817 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2818 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2819 usb_syncmem(&std->dma, 2820 std->offs + offsetof(uhci_td_t, td_status), 2821 sizeof(std->td.td_status), 2822 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2823 usb_syncmem(&std->dma, 2824 std->offs + offsetof(uhci_td_t, td_token), 2825 sizeof(std->td.td_token), 2826 BUS_DMASYNC_POSTWRITE); 2827 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2828 if (len > maxlen) 2829 maxlen = len; 2830 if (++n >= UHCI_VFRAMELIST_COUNT) 2831 n = 0; 2832 } 2833 2834 /* and wait until we are sure the hardware has finished. */ 2835 delay(maxlen); 2836 2837 #ifdef DIAGNOSTIC 2838 UXFER(xfer)->iinfo.isdone = 1; 2839 #endif 2840 /* Run callback and remove from interrupt list. */ 2841 usb_transfer_complete(xfer); 2842 2843 KASSERT(mutex_owned(&sc->sc_lock)); 2844 } 2845 2846 void 2847 uhci_device_isoc_close(usbd_pipe_handle pipe) 2848 { 2849 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2850 usbd_device_handle dev = upipe->pipe.device; 2851 uhci_softc_t *sc = dev->bus->hci_private; 2852 uhci_soft_td_t *std, *vstd; 2853 struct iso *iso; 2854 int i; 2855 2856 KASSERT(mutex_owned(&sc->sc_lock)); 2857 2858 /* 2859 * Make sure all TDs are marked as inactive. 2860 * Wait for completion. 2861 * Unschedule. 2862 * Deallocate. 2863 */ 2864 iso = &upipe->u.iso; 2865 2866 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2867 std = iso->stds[i]; 2868 usb_syncmem(&std->dma, 2869 std->offs + offsetof(uhci_td_t, td_status), 2870 sizeof(std->td.td_status), 2871 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2872 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2873 usb_syncmem(&std->dma, 2874 std->offs + offsetof(uhci_td_t, td_status), 2875 sizeof(std->td.td_status), 2876 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2877 } 2878 /* wait for completion */ 2879 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2880 2881 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2882 std = iso->stds[i]; 2883 for (vstd = sc->sc_vframes[i].htd; 2884 vstd != NULL && vstd->link.std != std; 2885 vstd = vstd->link.std) 2886 ; 2887 if (vstd == NULL) { 2888 /*panic*/ 2889 printf("uhci_device_isoc_close: %p not found\n", std); 2890 mutex_exit(&sc->sc_lock); 2891 return; 2892 } 2893 vstd->link = std->link; 2894 usb_syncmem(&std->dma, 2895 std->offs + offsetof(uhci_td_t, td_link), 2896 sizeof(std->td.td_link), 2897 BUS_DMASYNC_POSTWRITE); 2898 vstd->td.td_link = std->td.td_link; 2899 usb_syncmem(&vstd->dma, 2900 vstd->offs + offsetof(uhci_td_t, td_link), 2901 sizeof(vstd->td.td_link), 2902 BUS_DMASYNC_PREWRITE); 2903 uhci_free_std(sc, std); 2904 } 2905 2906 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2907 } 2908 2909 usbd_status 2910 uhci_setup_isoc(usbd_pipe_handle pipe) 2911 { 2912 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2913 usbd_device_handle dev = upipe->pipe.device; 2914 uhci_softc_t *sc = dev->bus->hci_private; 2915 int addr = upipe->pipe.device->address; 2916 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2917 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2918 uhci_soft_td_t *std, *vstd; 2919 u_int32_t token; 2920 struct iso *iso; 2921 int i; 2922 2923 iso = &upipe->u.iso; 2924 iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT * 2925 sizeof (uhci_soft_td_t *), 2926 KM_SLEEP); 2927 if (iso->stds == NULL) 2928 return USBD_NOMEM; 2929 2930 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2931 UHCI_TD_OUT(0, endpt, addr, 0); 2932 2933 mutex_enter(&sc->sc_lock); 2934 2935 /* Allocate the TDs and mark as inactive; */ 2936 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2937 std = uhci_alloc_std(sc); 2938 if (std == 0) 2939 goto bad; 2940 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2941 std->td.td_token = htole32(token); 2942 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2943 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2944 iso->stds[i] = std; 2945 } 2946 2947 /* Insert TDs into schedule. */ 2948 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2949 std = iso->stds[i]; 2950 vstd = sc->sc_vframes[i].htd; 2951 usb_syncmem(&vstd->dma, 2952 vstd->offs + offsetof(uhci_td_t, td_link), 2953 sizeof(vstd->td.td_link), 2954 BUS_DMASYNC_POSTWRITE); 2955 std->link = vstd->link; 2956 std->td.td_link = vstd->td.td_link; 2957 usb_syncmem(&std->dma, 2958 std->offs + offsetof(uhci_td_t, td_link), 2959 sizeof(std->td.td_link), 2960 BUS_DMASYNC_PREWRITE); 2961 vstd->link.std = std; 2962 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2963 usb_syncmem(&vstd->dma, 2964 vstd->offs + offsetof(uhci_td_t, td_link), 2965 sizeof(vstd->td.td_link), 2966 BUS_DMASYNC_PREWRITE); 2967 } 2968 mutex_exit(&sc->sc_lock); 2969 2970 iso->next = -1; 2971 iso->inuse = 0; 2972 2973 return (USBD_NORMAL_COMPLETION); 2974 2975 bad: 2976 while (--i >= 0) 2977 uhci_free_std(sc, iso->stds[i]); 2978 mutex_exit(&sc->sc_lock); 2979 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2980 return (USBD_NOMEM); 2981 } 2982 2983 void 2984 uhci_device_isoc_done(usbd_xfer_handle xfer) 2985 { 2986 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2987 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2988 int i, offs; 2989 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2990 2991 2992 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2993 xfer->actlen, xfer->busy_free)); 2994 2995 if (ii->xfer != xfer) 2996 /* Not on interrupt list, ignore it. */ 2997 return; 2998 2999 if (!uhci_active_intr_info(ii)) 3000 return; 3001 3002 #ifdef DIAGNOSTIC 3003 if (ii->stdend == NULL) { 3004 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 3005 #ifdef UHCI_DEBUG 3006 uhci_dump_ii(ii); 3007 #endif 3008 return; 3009 } 3010 #endif 3011 3012 /* Turn off the interrupt since it is active even if the TD is not. */ 3013 usb_syncmem(&ii->stdend->dma, 3014 ii->stdend->offs + offsetof(uhci_td_t, td_status), 3015 sizeof(ii->stdend->td.td_status), 3016 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3017 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 3018 usb_syncmem(&ii->stdend->dma, 3019 ii->stdend->offs + offsetof(uhci_td_t, td_status), 3020 sizeof(ii->stdend->td.td_status), 3021 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3022 3023 uhci_del_intr_info(ii); /* remove from active list */ 3024 3025 offs = 0; 3026 for (i = 0; i < xfer->nframes; i++) { 3027 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i], 3028 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3029 offs += xfer->frlengths[i]; 3030 } 3031 } 3032 3033 void 3034 uhci_device_intr_done(usbd_xfer_handle xfer) 3035 { 3036 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3037 uhci_softc_t *sc = ii->sc; 3038 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3039 uhci_soft_qh_t *sqh; 3040 int i, npoll, isread; 3041 3042 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 3043 3044 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 3045 3046 npoll = upipe->u.intr.npoll; 3047 for(i = 0; i < npoll; i++) { 3048 sqh = upipe->u.intr.qhs[i]; 3049 sqh->elink = NULL; 3050 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3051 usb_syncmem(&sqh->dma, 3052 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3053 sizeof(sqh->qh.qh_elink), 3054 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3055 } 3056 uhci_free_std_chain(sc, ii->stdstart, NULL); 3057 3058 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 3059 usb_syncmem(&xfer->dmabuf, 0, xfer->length, 3060 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3061 3062 /* XXX Wasteful. */ 3063 if (xfer->pipe->repeat) { 3064 uhci_soft_td_t *data, *dataend; 3065 3066 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 3067 3068 /* This alloc cannot fail since we freed the chain above. */ 3069 uhci_alloc_std_chain(upipe, sc, xfer->length, 3070 upipe->u.intr.isread, xfer->flags, 3071 &xfer->dmabuf, &data, &dataend); 3072 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3073 usb_syncmem(&dataend->dma, 3074 dataend->offs + offsetof(uhci_td_t, td_status), 3075 sizeof(dataend->td.td_status), 3076 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3077 3078 #ifdef UHCI_DEBUG 3079 if (uhcidebug > 10) { 3080 DPRINTF(("uhci_device_intr_done: data(1)\n")); 3081 uhci_dump_tds(data); 3082 uhci_dump_qh(upipe->u.intr.qhs[0]); 3083 } 3084 #endif 3085 3086 ii->stdstart = data; 3087 ii->stdend = dataend; 3088 #ifdef DIAGNOSTIC 3089 if (!ii->isdone) { 3090 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3091 } 3092 ii->isdone = 0; 3093 #endif 3094 for (i = 0; i < npoll; i++) { 3095 sqh = upipe->u.intr.qhs[i]; 3096 sqh->elink = data; 3097 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3098 usb_syncmem(&sqh->dma, 3099 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3100 sizeof(sqh->qh.qh_elink), 3101 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3102 } 3103 xfer->status = USBD_IN_PROGRESS; 3104 /* The ii is already on the examined list, just leave it. */ 3105 } else { 3106 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3107 if (uhci_active_intr_info(ii)) 3108 uhci_del_intr_info(ii); 3109 } 3110 } 3111 3112 /* Deallocate request data structures */ 3113 void 3114 uhci_device_ctrl_done(usbd_xfer_handle xfer) 3115 { 3116 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3117 uhci_softc_t *sc = ii->sc; 3118 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3119 int len = UGETW(xfer->request.wLength); 3120 int isread = (xfer->request.bmRequestType & UT_READ); 3121 3122 KASSERT(mutex_owned(&sc->sc_lock)); 3123 3124 #ifdef DIAGNOSTIC 3125 if (!(xfer->rqflags & URQ_REQUEST)) 3126 panic("uhci_device_ctrl_done: not a request"); 3127 #endif 3128 3129 if (!uhci_active_intr_info(ii)) 3130 return; 3131 3132 uhci_del_intr_info(ii); /* remove from active list */ 3133 3134 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3135 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3136 else 3137 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3138 3139 if (upipe->u.ctl.length != 0) 3140 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3141 3142 if (len) { 3143 usb_syncmem(&xfer->dmabuf, 0, len, 3144 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3145 } 3146 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3147 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3148 3149 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3150 } 3151 3152 /* Deallocate request data structures */ 3153 void 3154 uhci_device_bulk_done(usbd_xfer_handle xfer) 3155 { 3156 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3157 uhci_softc_t *sc = ii->sc; 3158 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3159 3160 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3161 xfer, ii, sc, upipe)); 3162 3163 KASSERT(mutex_owned(&sc->sc_lock)); 3164 3165 if (!uhci_active_intr_info(ii)) 3166 return; 3167 3168 uhci_del_intr_info(ii); /* remove from active list */ 3169 3170 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3171 3172 uhci_free_std_chain(sc, ii->stdstart, NULL); 3173 3174 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3175 } 3176 3177 /* Add interrupt QH, called with vflock. */ 3178 void 3179 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3180 { 3181 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3182 uhci_soft_qh_t *eqh; 3183 3184 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3185 3186 eqh = vf->eqh; 3187 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3188 sizeof(eqh->qh.qh_hlink), 3189 BUS_DMASYNC_POSTWRITE); 3190 sqh->hlink = eqh->hlink; 3191 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3192 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3193 sizeof(sqh->qh.qh_hlink), 3194 BUS_DMASYNC_PREWRITE); 3195 eqh->hlink = sqh; 3196 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3197 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3198 sizeof(eqh->qh.qh_hlink), 3199 BUS_DMASYNC_PREWRITE); 3200 vf->eqh = sqh; 3201 vf->bandwidth++; 3202 } 3203 3204 /* Remove interrupt QH. */ 3205 void 3206 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3207 { 3208 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3209 uhci_soft_qh_t *pqh; 3210 3211 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3212 3213 /* See comment in uhci_remove_ctrl() */ 3214 3215 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3216 sizeof(sqh->qh.qh_elink), 3217 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3218 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3219 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3220 usb_syncmem(&sqh->dma, 3221 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3222 sizeof(sqh->qh.qh_elink), 3223 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3224 delay(UHCI_QH_REMOVE_DELAY); 3225 } 3226 3227 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3228 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3229 sizeof(sqh->qh.qh_hlink), 3230 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3231 pqh->hlink = sqh->hlink; 3232 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3233 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3234 sizeof(pqh->qh.qh_hlink), 3235 BUS_DMASYNC_PREWRITE); 3236 delay(UHCI_QH_REMOVE_DELAY); 3237 if (vf->eqh == sqh) 3238 vf->eqh = pqh; 3239 vf->bandwidth--; 3240 } 3241 3242 usbd_status 3243 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3244 { 3245 uhci_soft_qh_t *sqh; 3246 int i, npoll; 3247 u_int bestbw, bw, bestoffs, offs; 3248 3249 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3250 if (ival == 0) { 3251 printf("uhci_device_setintr: 0 interval\n"); 3252 return (USBD_INVAL); 3253 } 3254 3255 if (ival > UHCI_VFRAMELIST_COUNT) 3256 ival = UHCI_VFRAMELIST_COUNT; 3257 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3258 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3259 3260 upipe->u.intr.npoll = npoll; 3261 upipe->u.intr.qhs = 3262 kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP); 3263 if (upipe->u.intr.qhs == NULL) 3264 return USBD_NOMEM; 3265 3266 /* 3267 * Figure out which offset in the schedule that has most 3268 * bandwidth left over. 3269 */ 3270 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3271 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3272 for (bw = i = 0; i < npoll; i++) 3273 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3274 if (bw < bestbw) { 3275 bestbw = bw; 3276 bestoffs = offs; 3277 } 3278 } 3279 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3280 3281 mutex_enter(&sc->sc_lock); 3282 for(i = 0; i < npoll; i++) { 3283 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3284 sqh->elink = NULL; 3285 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3286 usb_syncmem(&sqh->dma, 3287 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3288 sizeof(sqh->qh.qh_elink), 3289 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3290 sqh->pos = MOD(i * ival + bestoffs); 3291 } 3292 #undef MOD 3293 3294 /* Enter QHs into the controller data structures. */ 3295 for(i = 0; i < npoll; i++) 3296 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3297 mutex_exit(&sc->sc_lock); 3298 3299 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3300 return (USBD_NORMAL_COMPLETION); 3301 } 3302 3303 /* Open a new pipe. */ 3304 usbd_status 3305 uhci_open(usbd_pipe_handle pipe) 3306 { 3307 uhci_softc_t *sc = pipe->device->bus->hci_private; 3308 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3309 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3310 usbd_status err = USBD_NOMEM; 3311 int ival; 3312 3313 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3314 pipe, pipe->device->address, 3315 ed->bEndpointAddress, sc->sc_addr)); 3316 3317 if (sc->sc_dying) 3318 return USBD_IOERROR; 3319 3320 upipe->aborting = 0; 3321 /* toggle state needed for bulk endpoints */ 3322 upipe->nexttoggle = pipe->endpoint->datatoggle; 3323 3324 if (pipe->device->address == sc->sc_addr) { 3325 switch (ed->bEndpointAddress) { 3326 case USB_CONTROL_ENDPOINT: 3327 pipe->methods = &uhci_root_ctrl_methods; 3328 break; 3329 case UE_DIR_IN | UHCI_INTR_ENDPT: 3330 pipe->methods = &uhci_root_intr_methods; 3331 break; 3332 default: 3333 return (USBD_INVAL); 3334 } 3335 } else { 3336 switch (ed->bmAttributes & UE_XFERTYPE) { 3337 case UE_CONTROL: 3338 pipe->methods = &uhci_device_ctrl_methods; 3339 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3340 if (upipe->u.ctl.sqh == NULL) 3341 goto bad; 3342 upipe->u.ctl.setup = uhci_alloc_std(sc); 3343 if (upipe->u.ctl.setup == NULL) { 3344 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3345 goto bad; 3346 } 3347 upipe->u.ctl.stat = uhci_alloc_std(sc); 3348 if (upipe->u.ctl.stat == NULL) { 3349 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3350 uhci_free_std(sc, upipe->u.ctl.setup); 3351 goto bad; 3352 } 3353 err = usb_allocmem(&sc->sc_bus, 3354 sizeof(usb_device_request_t), 3355 0, &upipe->u.ctl.reqdma); 3356 if (err) { 3357 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3358 uhci_free_std(sc, upipe->u.ctl.setup); 3359 uhci_free_std(sc, upipe->u.ctl.stat); 3360 goto bad; 3361 } 3362 break; 3363 case UE_INTERRUPT: 3364 pipe->methods = &uhci_device_intr_methods; 3365 ival = pipe->interval; 3366 if (ival == USBD_DEFAULT_INTERVAL) 3367 ival = ed->bInterval; 3368 return (uhci_device_setintr(sc, upipe, ival)); 3369 case UE_ISOCHRONOUS: 3370 pipe->methods = &uhci_device_isoc_methods; 3371 return (uhci_setup_isoc(pipe)); 3372 case UE_BULK: 3373 pipe->methods = &uhci_device_bulk_methods; 3374 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3375 if (upipe->u.bulk.sqh == NULL) 3376 goto bad; 3377 break; 3378 } 3379 } 3380 return (USBD_NORMAL_COMPLETION); 3381 3382 bad: 3383 return USBD_NOMEM; 3384 } 3385 3386 /* 3387 * Data structures and routines to emulate the root hub. 3388 */ 3389 usb_device_descriptor_t uhci_devd = { 3390 USB_DEVICE_DESCRIPTOR_SIZE, 3391 UDESC_DEVICE, /* type */ 3392 {0x00, 0x01}, /* USB version */ 3393 UDCLASS_HUB, /* class */ 3394 UDSUBCLASS_HUB, /* subclass */ 3395 UDPROTO_FSHUB, /* protocol */ 3396 64, /* max packet */ 3397 {0},{0},{0x00,0x01}, /* device id */ 3398 1,2,0, /* string indicies */ 3399 1 /* # of configurations */ 3400 }; 3401 3402 const usb_config_descriptor_t uhci_confd = { 3403 USB_CONFIG_DESCRIPTOR_SIZE, 3404 UDESC_CONFIG, 3405 {USB_CONFIG_DESCRIPTOR_SIZE + 3406 USB_INTERFACE_DESCRIPTOR_SIZE + 3407 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3408 1, 3409 1, 3410 0, 3411 UC_ATTR_MBO | UC_SELF_POWERED, 3412 0 /* max power */ 3413 }; 3414 3415 const usb_interface_descriptor_t uhci_ifcd = { 3416 USB_INTERFACE_DESCRIPTOR_SIZE, 3417 UDESC_INTERFACE, 3418 0, 3419 0, 3420 1, 3421 UICLASS_HUB, 3422 UISUBCLASS_HUB, 3423 UIPROTO_FSHUB, 3424 0 3425 }; 3426 3427 const usb_endpoint_descriptor_t uhci_endpd = { 3428 USB_ENDPOINT_DESCRIPTOR_SIZE, 3429 UDESC_ENDPOINT, 3430 UE_DIR_IN | UHCI_INTR_ENDPT, 3431 UE_INTERRUPT, 3432 {8}, 3433 255 3434 }; 3435 3436 const usb_hub_descriptor_t uhci_hubd_piix = { 3437 USB_HUB_DESCRIPTOR_SIZE, 3438 UDESC_HUB, 3439 2, 3440 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3441 50, /* power on to power good */ 3442 0, 3443 { 0x00 }, /* both ports are removable */ 3444 { 0 }, 3445 }; 3446 3447 /* 3448 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3449 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3450 * should not be used by the USB subsystem. As we cannot issue a 3451 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3452 * will be enabled as part of the reset. 3453 * 3454 * On the VT83C572, the port cannot be successfully enabled until the 3455 * outstanding "port enable change" and "connection status change" 3456 * events have been reset. 3457 */ 3458 Static usbd_status 3459 uhci_portreset(uhci_softc_t *sc, int index) 3460 { 3461 int lim, port, x; 3462 3463 if (index == 1) 3464 port = UHCI_PORTSC1; 3465 else if (index == 2) 3466 port = UHCI_PORTSC2; 3467 else 3468 return (USBD_IOERROR); 3469 3470 x = URWMASK(UREAD2(sc, port)); 3471 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3472 3473 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3474 3475 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3476 index, UREAD2(sc, port))); 3477 3478 x = URWMASK(UREAD2(sc, port)); 3479 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3480 3481 delay(100); 3482 3483 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3484 index, UREAD2(sc, port))); 3485 3486 x = URWMASK(UREAD2(sc, port)); 3487 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3488 3489 for (lim = 10; --lim > 0;) { 3490 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3491 3492 x = UREAD2(sc, port); 3493 3494 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3495 index, lim, x)); 3496 3497 if (!(x & UHCI_PORTSC_CCS)) { 3498 /* 3499 * No device is connected (or was disconnected 3500 * during reset). Consider the port reset. 3501 * The delay must be long enough to ensure on 3502 * the initial iteration that the device 3503 * connection will have been registered. 50ms 3504 * appears to be sufficient, but 20ms is not. 3505 */ 3506 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3507 index, lim)); 3508 break; 3509 } 3510 3511 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3512 /* 3513 * Port enabled changed and/or connection 3514 * status changed were set. Reset either or 3515 * both raised flags (by writing a 1 to that 3516 * bit), and wait again for state to settle. 3517 */ 3518 UWRITE2(sc, port, URWMASK(x) | 3519 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3520 continue; 3521 } 3522 3523 if (x & UHCI_PORTSC_PE) 3524 /* Port is enabled */ 3525 break; 3526 3527 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3528 } 3529 3530 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3531 index, UREAD2(sc, port))); 3532 3533 if (lim <= 0) { 3534 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3535 return (USBD_TIMEOUT); 3536 } 3537 3538 sc->sc_isreset = 1; 3539 return (USBD_NORMAL_COMPLETION); 3540 } 3541 3542 /* 3543 * Simulate a hardware hub by handling all the necessary requests. 3544 */ 3545 usbd_status 3546 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3547 { 3548 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3549 usbd_status err; 3550 3551 /* Insert last in queue. */ 3552 mutex_enter(&sc->sc_lock); 3553 err = usb_insert_transfer(xfer); 3554 mutex_exit(&sc->sc_lock); 3555 if (err) 3556 return (err); 3557 3558 /* 3559 * Pipe isn't running (otherwise err would be USBD_INPROG), 3560 * so start it first. 3561 */ 3562 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3563 } 3564 3565 usbd_status 3566 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3567 { 3568 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3569 usb_device_request_t *req; 3570 void *buf = NULL; 3571 int port, x; 3572 int len, value, index, status, change, l, totlen = 0; 3573 usb_port_status_t ps; 3574 usbd_status err; 3575 3576 if (sc->sc_dying) 3577 return (USBD_IOERROR); 3578 3579 #ifdef DIAGNOSTIC 3580 if (!(xfer->rqflags & URQ_REQUEST)) 3581 panic("uhci_root_ctrl_start: not a request"); 3582 #endif 3583 req = &xfer->request; 3584 3585 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3586 req->bmRequestType, req->bRequest)); 3587 3588 len = UGETW(req->wLength); 3589 value = UGETW(req->wValue); 3590 index = UGETW(req->wIndex); 3591 3592 if (len != 0) 3593 buf = KERNADDR(&xfer->dmabuf, 0); 3594 3595 #define C(x,y) ((x) | ((y) << 8)) 3596 switch(C(req->bRequest, req->bmRequestType)) { 3597 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3598 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3599 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3600 /* 3601 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3602 * for the integrated root hub. 3603 */ 3604 break; 3605 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3606 if (len > 0) { 3607 *(u_int8_t *)buf = sc->sc_conf; 3608 totlen = 1; 3609 } 3610 break; 3611 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3612 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3613 if (len == 0) 3614 break; 3615 switch(value >> 8) { 3616 case UDESC_DEVICE: 3617 if ((value & 0xff) != 0) { 3618 err = USBD_IOERROR; 3619 goto ret; 3620 } 3621 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3622 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3623 memcpy(buf, &uhci_devd, l); 3624 break; 3625 case UDESC_CONFIG: 3626 if ((value & 0xff) != 0) { 3627 err = USBD_IOERROR; 3628 goto ret; 3629 } 3630 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3631 memcpy(buf, &uhci_confd, l); 3632 buf = (char *)buf + l; 3633 len -= l; 3634 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3635 totlen += l; 3636 memcpy(buf, &uhci_ifcd, l); 3637 buf = (char *)buf + l; 3638 len -= l; 3639 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3640 totlen += l; 3641 memcpy(buf, &uhci_endpd, l); 3642 break; 3643 case UDESC_STRING: 3644 #define sd ((usb_string_descriptor_t *)buf) 3645 switch (value & 0xff) { 3646 case 0: /* Language table */ 3647 totlen = usb_makelangtbl(sd, len); 3648 break; 3649 case 1: /* Vendor */ 3650 totlen = usb_makestrdesc(sd, len, 3651 sc->sc_vendor); 3652 break; 3653 case 2: /* Product */ 3654 totlen = usb_makestrdesc(sd, len, 3655 "UHCI root hub"); 3656 break; 3657 } 3658 #undef sd 3659 break; 3660 default: 3661 err = USBD_IOERROR; 3662 goto ret; 3663 } 3664 break; 3665 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3666 if (len > 0) { 3667 *(u_int8_t *)buf = 0; 3668 totlen = 1; 3669 } 3670 break; 3671 case C(UR_GET_STATUS, UT_READ_DEVICE): 3672 if (len > 1) { 3673 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3674 totlen = 2; 3675 } 3676 break; 3677 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3678 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3679 if (len > 1) { 3680 USETW(((usb_status_t *)buf)->wStatus, 0); 3681 totlen = 2; 3682 } 3683 break; 3684 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3685 if (value >= USB_MAX_DEVICES) { 3686 err = USBD_IOERROR; 3687 goto ret; 3688 } 3689 sc->sc_addr = value; 3690 break; 3691 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3692 if (value != 0 && value != 1) { 3693 err = USBD_IOERROR; 3694 goto ret; 3695 } 3696 sc->sc_conf = value; 3697 break; 3698 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3699 break; 3700 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3701 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3702 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3703 err = USBD_IOERROR; 3704 goto ret; 3705 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3706 break; 3707 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3708 break; 3709 /* Hub requests */ 3710 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3711 break; 3712 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3713 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3714 "port=%d feature=%d\n", 3715 index, value)); 3716 if (index == 1) 3717 port = UHCI_PORTSC1; 3718 else if (index == 2) 3719 port = UHCI_PORTSC2; 3720 else { 3721 err = USBD_IOERROR; 3722 goto ret; 3723 } 3724 switch(value) { 3725 case UHF_PORT_ENABLE: 3726 x = URWMASK(UREAD2(sc, port)); 3727 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3728 break; 3729 case UHF_PORT_SUSPEND: 3730 x = URWMASK(UREAD2(sc, port)); 3731 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3732 break; 3733 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3734 /* see USB2 spec ch. 7.1.7.7 */ 3735 usb_delay_ms(&sc->sc_bus, 20); 3736 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3737 /* 10ms resume delay must be provided by caller */ 3738 break; 3739 case UHF_PORT_RESET: 3740 x = URWMASK(UREAD2(sc, port)); 3741 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3742 break; 3743 case UHF_C_PORT_CONNECTION: 3744 x = URWMASK(UREAD2(sc, port)); 3745 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3746 break; 3747 case UHF_C_PORT_ENABLE: 3748 x = URWMASK(UREAD2(sc, port)); 3749 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3750 break; 3751 case UHF_C_PORT_OVER_CURRENT: 3752 x = URWMASK(UREAD2(sc, port)); 3753 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3754 break; 3755 case UHF_C_PORT_RESET: 3756 sc->sc_isreset = 0; 3757 err = USBD_NORMAL_COMPLETION; 3758 goto ret; 3759 case UHF_PORT_CONNECTION: 3760 case UHF_PORT_OVER_CURRENT: 3761 case UHF_PORT_POWER: 3762 case UHF_PORT_LOW_SPEED: 3763 case UHF_C_PORT_SUSPEND: 3764 default: 3765 err = USBD_IOERROR; 3766 goto ret; 3767 } 3768 break; 3769 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3770 if (index == 1) 3771 port = UHCI_PORTSC1; 3772 else if (index == 2) 3773 port = UHCI_PORTSC2; 3774 else { 3775 err = USBD_IOERROR; 3776 goto ret; 3777 } 3778 if (len > 0) { 3779 *(u_int8_t *)buf = 3780 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3781 UHCI_PORTSC_LS_SHIFT; 3782 totlen = 1; 3783 } 3784 break; 3785 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3786 if (len == 0) 3787 break; 3788 if ((value & 0xff) != 0) { 3789 err = USBD_IOERROR; 3790 goto ret; 3791 } 3792 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3793 totlen = l; 3794 memcpy(buf, &uhci_hubd_piix, l); 3795 break; 3796 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3797 if (len != 4) { 3798 err = USBD_IOERROR; 3799 goto ret; 3800 } 3801 memset(buf, 0, len); 3802 totlen = len; 3803 break; 3804 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3805 if (index == 1) 3806 port = UHCI_PORTSC1; 3807 else if (index == 2) 3808 port = UHCI_PORTSC2; 3809 else { 3810 err = USBD_IOERROR; 3811 goto ret; 3812 } 3813 if (len != 4) { 3814 err = USBD_IOERROR; 3815 goto ret; 3816 } 3817 x = UREAD2(sc, port); 3818 status = change = 0; 3819 if (x & UHCI_PORTSC_CCS) 3820 status |= UPS_CURRENT_CONNECT_STATUS; 3821 if (x & UHCI_PORTSC_CSC) 3822 change |= UPS_C_CONNECT_STATUS; 3823 if (x & UHCI_PORTSC_PE) 3824 status |= UPS_PORT_ENABLED; 3825 if (x & UHCI_PORTSC_POEDC) 3826 change |= UPS_C_PORT_ENABLED; 3827 if (x & UHCI_PORTSC_OCI) 3828 status |= UPS_OVERCURRENT_INDICATOR; 3829 if (x & UHCI_PORTSC_OCIC) 3830 change |= UPS_C_OVERCURRENT_INDICATOR; 3831 if (x & UHCI_PORTSC_SUSP) 3832 status |= UPS_SUSPEND; 3833 if (x & UHCI_PORTSC_LSDA) 3834 status |= UPS_LOW_SPEED; 3835 status |= UPS_PORT_POWER; 3836 if (sc->sc_isreset) 3837 change |= UPS_C_PORT_RESET; 3838 USETW(ps.wPortStatus, status); 3839 USETW(ps.wPortChange, change); 3840 l = min(len, sizeof ps); 3841 memcpy(buf, &ps, l); 3842 totlen = l; 3843 break; 3844 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3845 err = USBD_IOERROR; 3846 goto ret; 3847 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3848 break; 3849 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3850 if (index == 1) 3851 port = UHCI_PORTSC1; 3852 else if (index == 2) 3853 port = UHCI_PORTSC2; 3854 else { 3855 err = USBD_IOERROR; 3856 goto ret; 3857 } 3858 switch(value) { 3859 case UHF_PORT_ENABLE: 3860 x = URWMASK(UREAD2(sc, port)); 3861 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3862 break; 3863 case UHF_PORT_SUSPEND: 3864 x = URWMASK(UREAD2(sc, port)); 3865 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3866 break; 3867 case UHF_PORT_RESET: 3868 err = uhci_portreset(sc, index); 3869 goto ret; 3870 case UHF_PORT_POWER: 3871 /* Pretend we turned on power */ 3872 err = USBD_NORMAL_COMPLETION; 3873 goto ret; 3874 case UHF_C_PORT_CONNECTION: 3875 case UHF_C_PORT_ENABLE: 3876 case UHF_C_PORT_OVER_CURRENT: 3877 case UHF_PORT_CONNECTION: 3878 case UHF_PORT_OVER_CURRENT: 3879 case UHF_PORT_LOW_SPEED: 3880 case UHF_C_PORT_SUSPEND: 3881 case UHF_C_PORT_RESET: 3882 default: 3883 err = USBD_IOERROR; 3884 goto ret; 3885 } 3886 break; 3887 default: 3888 err = USBD_IOERROR; 3889 goto ret; 3890 } 3891 xfer->actlen = totlen; 3892 err = USBD_NORMAL_COMPLETION; 3893 ret: 3894 xfer->status = err; 3895 mutex_enter(&sc->sc_lock); 3896 usb_transfer_complete(xfer); 3897 mutex_exit(&sc->sc_lock); 3898 return (USBD_IN_PROGRESS); 3899 } 3900 3901 /* Abort a root control request. */ 3902 void 3903 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3904 { 3905 /* Nothing to do, all transfers are synchronous. */ 3906 } 3907 3908 /* Close the root pipe. */ 3909 void 3910 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3911 { 3912 DPRINTF(("uhci_root_ctrl_close\n")); 3913 } 3914 3915 /* Abort a root interrupt request. */ 3916 void 3917 uhci_root_intr_abort(usbd_xfer_handle xfer) 3918 { 3919 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3920 3921 KASSERT(mutex_owned(&sc->sc_lock)); 3922 3923 callout_stop(&sc->sc_poll_handle); 3924 sc->sc_intr_xfer = NULL; 3925 3926 if (xfer->pipe->intrxfer == xfer) { 3927 DPRINTF(("uhci_root_intr_abort: remove\n")); 3928 xfer->pipe->intrxfer = 0; 3929 } 3930 xfer->status = USBD_CANCELLED; 3931 #ifdef DIAGNOSTIC 3932 UXFER(xfer)->iinfo.isdone = 1; 3933 #endif 3934 usb_transfer_complete(xfer); 3935 } 3936 3937 usbd_status 3938 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3939 { 3940 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3941 usbd_status err; 3942 3943 /* Insert last in queue. */ 3944 mutex_enter(&sc->sc_lock); 3945 err = usb_insert_transfer(xfer); 3946 mutex_exit(&sc->sc_lock); 3947 if (err) 3948 return (err); 3949 3950 /* 3951 * Pipe isn't running (otherwise err would be USBD_INPROG), 3952 * start first 3953 */ 3954 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3955 } 3956 3957 /* Start a transfer on the root interrupt pipe */ 3958 usbd_status 3959 uhci_root_intr_start(usbd_xfer_handle xfer) 3960 { 3961 usbd_pipe_handle pipe = xfer->pipe; 3962 uhci_softc_t *sc = pipe->device->bus->hci_private; 3963 unsigned int ival; 3964 3965 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3966 xfer, xfer->length, xfer->flags)); 3967 3968 if (sc->sc_dying) 3969 return (USBD_IOERROR); 3970 3971 /* XXX temporary variable needed to avoid gcc3 warning */ 3972 ival = xfer->pipe->endpoint->edesc->bInterval; 3973 sc->sc_ival = mstohz(ival); 3974 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3975 sc->sc_intr_xfer = xfer; 3976 return (USBD_IN_PROGRESS); 3977 } 3978 3979 /* Close the root interrupt pipe. */ 3980 void 3981 uhci_root_intr_close(usbd_pipe_handle pipe) 3982 { 3983 uhci_softc_t *sc = pipe->device->bus->hci_private; 3984 3985 KASSERT(mutex_owned(&sc->sc_lock)); 3986 3987 callout_stop(&sc->sc_poll_handle); 3988 sc->sc_intr_xfer = NULL; 3989 DPRINTF(("uhci_root_intr_close\n")); 3990 } 3991
Indexes created Sun Sep 21 20:09:37 GMT 2025