uhci.c revision 1.264.4.25
1 /* $NetBSD: uhci.c,v 1.264.4.25 2015/03/19 17:26:43 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 39 * USB spec: http://www.usb.org/developers/docs/ 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.264.4.25 2015/03/19 17:26:43 skrll Exp $"); 46 47 #include <sys/param.h> 48 49 #include <sys/bus.h> 50 #include <sys/cpu.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/mutex.h> 55 #include <sys/proc.h> 56 #include <sys/queue.h> 57 #include <sys/select.h> 58 #include <sys/sysctl.h> 59 #include <sys/systm.h> 60 61 #include <machine/endian.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdivar.h> 66 #include <dev/usb/usb_mem.h> 67 68 #include <dev/usb/uhcireg.h> 69 #include <dev/usb/uhcivar.h> 70 #include <dev/usb/usbroothub.h> 71 #include <dev/usb/usbhist.h> 72 73 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 74 /*#define UHCI_CTL_LOOP */ 75 76 #ifdef UHCI_DEBUG 77 uhci_softc_t *thesc; 78 int uhcinoloop = 0; 79 #endif 80 81 #ifdef USB_DEBUG 82 #ifndef UHCI_DEBUG 83 #define uhcidebug 0 84 #else 85 static int uhcidebug = 0; 86 87 SYSCTL_SETUP(sysctl_hw_uhci_setup, "sysctl hw.uhci setup") 88 { 89 int err; 90 const struct sysctlnode *rnode; 91 const struct sysctlnode *cnode; 92 93 err = sysctl_createv(clog, 0, NULL, &rnode, 94 CTLFLAG_PERMANENT, CTLTYPE_NODE, "uhci", 95 SYSCTL_DESCR("uhci global controls"), 96 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 97 98 if (err) 99 goto fail; 100 101 /* control debugging printfs */ 102 err = sysctl_createv(clog, 0, &rnode, &cnode, 103 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 104 "debug", SYSCTL_DESCR("Enable debugging output"), 105 NULL, 0, &uhcidebug, sizeof(uhcidebug), CTL_CREATE, CTL_EOL); 106 if (err) 107 goto fail; 108 109 return; 110 fail: 111 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 112 } 113 114 #endif /* UHCI_DEBUG */ 115 #endif /* USB_DEBUG */ 116 117 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(uhcidebug,N,FMT,A,B,C,D) 118 #define UHCIHIST_FUNC() USBHIST_FUNC() 119 #define UHCIHIST_CALLED(name) USBHIST_CALLED(uhcidebug) 120 121 /* 122 * The UHCI controller is little endian, so on big endian machines 123 * the data stored in memory needs to be swapped. 124 */ 125 126 struct uhci_pipe { 127 struct usbd_pipe pipe; 128 int nexttoggle; 129 130 u_char aborting; 131 struct usbd_xfer *abortstart, abortend; 132 133 /* Info needed for different pipe kinds. */ 134 union { 135 /* Control pipe */ 136 struct { 137 uhci_soft_qh_t *sqh; 138 usb_dma_t reqdma; 139 uhci_soft_td_t *setup, *stat; 140 u_int length; 141 } ctl; 142 /* Interrupt pipe */ 143 struct { 144 int npoll; 145 int isread; 146 uhci_soft_qh_t **qhs; 147 } intr; 148 /* Bulk pipe */ 149 struct { 150 uhci_soft_qh_t *sqh; 151 u_int length; 152 int isread; 153 } bulk; 154 /* Iso pipe */ 155 struct iso { 156 uhci_soft_td_t **stds; 157 int next, inuse; 158 } iso; 159 } u; 160 }; 161 162 Static void uhci_globalreset(uhci_softc_t *); 163 Static usbd_status uhci_portreset(uhci_softc_t*, int); 164 Static void uhci_reset(uhci_softc_t *); 165 Static usbd_status uhci_run(uhci_softc_t *, int, int); 166 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 167 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 168 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 169 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 170 #if 0 171 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 172 uhci_intr_info_t *); 173 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 174 #endif 175 176 Static void uhci_free_std_chain(uhci_softc_t *, 177 uhci_soft_td_t *, uhci_soft_td_t *); 178 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 179 uhci_softc_t *, int, int, uint16_t, usb_dma_t *, 180 uhci_soft_td_t **, uhci_soft_td_t **); 181 Static void uhci_poll_hub(void *); 182 Static void uhci_waitintr(uhci_softc_t *, struct usbd_xfer *); 183 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 184 Static void uhci_idone(uhci_intr_info_t *); 185 186 Static void uhci_abort_xfer(struct usbd_xfer *, usbd_status); 187 188 Static void uhci_timeout(void *); 189 Static void uhci_timeout_task(void *); 190 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 191 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 192 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 193 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 194 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 195 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 196 Static void uhci_add_loop(uhci_softc_t *); 197 Static void uhci_rem_loop(uhci_softc_t *); 198 199 Static usbd_status uhci_setup_isoc(struct usbd_pipe *); 200 Static void uhci_device_isoc_enter(struct usbd_xfer *); 201 202 Static struct usbd_xfer * uhci_allocx(struct usbd_bus *); 203 Static void uhci_freex(struct usbd_bus *, struct usbd_xfer *); 204 Static void uhci_get_lock(struct usbd_bus *, kmutex_t **); 205 Static int uhci_roothub_ctrl(struct usbd_bus *, 206 usb_device_request_t *, void *, int); 207 208 Static usbd_status uhci_device_ctrl_transfer(struct usbd_xfer *); 209 Static usbd_status uhci_device_ctrl_start(struct usbd_xfer *); 210 Static void uhci_device_ctrl_abort(struct usbd_xfer *); 211 Static void uhci_device_ctrl_close(struct usbd_pipe *); 212 Static void uhci_device_ctrl_done(struct usbd_xfer *); 213 214 Static usbd_status uhci_device_intr_transfer(struct usbd_xfer *); 215 Static usbd_status uhci_device_intr_start(struct usbd_xfer *); 216 Static void uhci_device_intr_abort(struct usbd_xfer *); 217 Static void uhci_device_intr_close(struct usbd_pipe *); 218 Static void uhci_device_intr_done(struct usbd_xfer *); 219 220 Static usbd_status uhci_device_bulk_transfer(struct usbd_xfer *); 221 Static usbd_status uhci_device_bulk_start(struct usbd_xfer *); 222 Static void uhci_device_bulk_abort(struct usbd_xfer *); 223 Static void uhci_device_bulk_close(struct usbd_pipe *); 224 Static void uhci_device_bulk_done(struct usbd_xfer *); 225 226 Static usbd_status uhci_device_isoc_transfer(struct usbd_xfer *); 227 Static usbd_status uhci_device_isoc_start(struct usbd_xfer *); 228 Static void uhci_device_isoc_abort(struct usbd_xfer *); 229 Static void uhci_device_isoc_close(struct usbd_pipe *); 230 Static void uhci_device_isoc_done(struct usbd_xfer *); 231 232 Static usbd_status uhci_root_intr_transfer(struct usbd_xfer *); 233 Static usbd_status uhci_root_intr_start(struct usbd_xfer *); 234 Static void uhci_root_intr_abort(struct usbd_xfer *); 235 Static void uhci_root_intr_close(struct usbd_pipe *); 236 Static void uhci_root_intr_done(struct usbd_xfer *); 237 238 Static usbd_status uhci_open(struct usbd_pipe *); 239 Static void uhci_poll(struct usbd_bus *); 240 Static void uhci_softintr(void *); 241 242 Static usbd_status uhci_device_request(struct usbd_xfer *); 243 244 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 245 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 246 Static usbd_status uhci_device_setintr(uhci_softc_t *, 247 struct uhci_pipe *, int); 248 249 Static void uhci_device_clear_toggle(struct usbd_pipe *); 250 Static void uhci_noop(struct usbd_pipe *); 251 252 static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 253 uhci_soft_qh_t *); 254 255 #ifdef UHCI_DEBUG 256 Static void uhci_dump_all(uhci_softc_t *); 257 Static void uhci_dumpregs(uhci_softc_t *); 258 Static void uhci_dump_qhs(uhci_soft_qh_t *); 259 Static void uhci_dump_qh(uhci_soft_qh_t *); 260 Static void uhci_dump_tds(uhci_soft_td_t *); 261 Static void uhci_dump_td(uhci_soft_td_t *); 262 Static void uhci_dump_ii(uhci_intr_info_t *); 263 void uhci_dump(void); 264 #endif 265 266 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 267 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 268 #define UWRITE1(sc, r, x) \ 269 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 270 } while (/*CONSTCOND*/0) 271 #define UWRITE2(sc, r, x) \ 272 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 273 } while (/*CONSTCOND*/0) 274 #define UWRITE4(sc, r, x) \ 275 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 276 } while (/*CONSTCOND*/0) 277 static __inline uint8_t 278 UREAD1(uhci_softc_t *sc, bus_size_t r) 279 { 280 281 UBARR(sc); 282 return bus_space_read_1(sc->iot, sc->ioh, r); 283 } 284 285 static __inline uint16_t 286 UREAD2(uhci_softc_t *sc, bus_size_t r) 287 { 288 289 UBARR(sc); 290 return bus_space_read_2(sc->iot, sc->ioh, r); 291 } 292 293 #ifdef UHCI_DEBUG 294 static __inline uint32_t 295 UREAD4(uhci_softc_t *sc, bus_size_t r) 296 { 297 298 UBARR(sc); 299 return bus_space_read_4(sc->iot, sc->ioh, r); 300 } 301 #endif 302 303 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 304 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 305 306 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 307 308 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 309 310 const struct usbd_bus_methods uhci_bus_methods = { 311 .ubm_open = uhci_open, 312 .ubm_softint = uhci_softintr, 313 .ubm_dopoll = uhci_poll, 314 .ubm_allocx = uhci_allocx, 315 .ubm_freex = uhci_freex, 316 .ubm_getlock = uhci_get_lock, 317 .ubm_rhctrl = uhci_roothub_ctrl, 318 }; 319 320 const struct usbd_pipe_methods uhci_root_intr_methods = { 321 .upm_transfer = uhci_root_intr_transfer, 322 .upm_start = uhci_root_intr_start, 323 .upm_abort = uhci_root_intr_abort, 324 .upm_close = uhci_root_intr_close, 325 .upm_cleartoggle = uhci_noop, 326 .upm_done = uhci_root_intr_done, 327 }; 328 329 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 330 .upm_transfer = uhci_device_ctrl_transfer, 331 .upm_start = uhci_device_ctrl_start, 332 .upm_abort = uhci_device_ctrl_abort, 333 .upm_close = uhci_device_ctrl_close, 334 .upm_cleartoggle = uhci_noop, 335 .upm_done = uhci_device_ctrl_done, 336 }; 337 338 const struct usbd_pipe_methods uhci_device_intr_methods = { 339 .upm_transfer = uhci_device_intr_transfer, 340 .upm_start = uhci_device_intr_start, 341 .upm_abort = uhci_device_intr_abort, 342 .upm_close = uhci_device_intr_close, 343 .upm_cleartoggle = uhci_device_clear_toggle, 344 .upm_done = uhci_device_intr_done, 345 }; 346 347 const struct usbd_pipe_methods uhci_device_bulk_methods = { 348 .upm_transfer = uhci_device_bulk_transfer, 349 .upm_start = uhci_device_bulk_start, 350 .upm_abort = uhci_device_bulk_abort, 351 .upm_close = uhci_device_bulk_close, 352 .upm_cleartoggle = uhci_device_clear_toggle, 353 .upm_done = uhci_device_bulk_done, 354 }; 355 356 const struct usbd_pipe_methods uhci_device_isoc_methods = { 357 .upm_transfer = uhci_device_isoc_transfer, 358 .upm_start = uhci_device_isoc_start, 359 .upm_abort = uhci_device_isoc_abort, 360 .upm_close = uhci_device_isoc_close, 361 .upm_cleartoggle = uhci_noop, 362 .upm_done = uhci_device_isoc_done, 363 }; 364 365 #define uhci_add_intr_info(sc, ii) \ 366 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 367 #define uhci_del_intr_info(ii) \ 368 do { \ 369 LIST_REMOVE((ii), list); \ 370 (ii)->list.le_prev = NULL; \ 371 } while (0) 372 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 373 374 static inline uhci_soft_qh_t * 375 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 376 { 377 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 378 DPRINTFN(15, "pqh=%p sqh=%p", pqh, sqh, 0, 0); 379 380 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 381 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 382 usb_syncmem(&pqh->dma, 383 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 384 sizeof(pqh->qh.qh_hlink), 385 BUS_DMASYNC_POSTWRITE); 386 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 387 printf("uhci_find_prev_qh: QH not found\n"); 388 return NULL; 389 } 390 #endif 391 } 392 return pqh; 393 } 394 395 void 396 uhci_globalreset(uhci_softc_t *sc) 397 { 398 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 399 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 400 UHCICMD(sc, 0); /* do nothing */ 401 } 402 403 int 404 uhci_init(uhci_softc_t *sc) 405 { 406 usbd_status err; 407 int i, j; 408 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 409 uhci_soft_td_t *std; 410 411 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 412 413 #ifdef UHCI_DEBUG 414 thesc = sc; 415 416 if (uhcidebug > 2) 417 uhci_dumpregs(sc); 418 #endif 419 420 sc->sc_suspend = PWR_RESUME; 421 422 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 423 uhci_globalreset(sc); /* reset the controller */ 424 uhci_reset(sc); 425 426 /* Allocate and initialize real frame array. */ 427 err = usb_allocmem(&sc->sc_bus, 428 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 429 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 430 if (err) 431 return err; 432 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 433 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 434 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 435 436 /* 437 * Allocate a TD, inactive, that hangs from the last QH. 438 * This is to avoid a bug in the PIIX that makes it run berserk 439 * otherwise. 440 */ 441 std = uhci_alloc_std(sc); 442 if (std == NULL) 443 return ENOMEM; 444 std->link.std = NULL; 445 std->td.td_link = htole32(UHCI_PTR_T); 446 std->td.td_status = htole32(0); /* inactive */ 447 std->td.td_token = htole32(0); 448 std->td.td_buffer = htole32(0); 449 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 450 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 451 452 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 453 lsqh = uhci_alloc_sqh(sc); 454 if (lsqh == NULL) 455 return ENOMEM; 456 lsqh->hlink = NULL; 457 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 458 lsqh->elink = std; 459 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 460 sc->sc_last_qh = lsqh; 461 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 462 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 463 464 /* Allocate the dummy QH where bulk traffic will be queued. */ 465 bsqh = uhci_alloc_sqh(sc); 466 if (bsqh == NULL) 467 return ENOMEM; 468 bsqh->hlink = lsqh; 469 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 470 bsqh->elink = NULL; 471 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 472 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 473 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 474 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 475 476 /* Allocate dummy QH where high speed control traffic will be queued. */ 477 chsqh = uhci_alloc_sqh(sc); 478 if (chsqh == NULL) 479 return ENOMEM; 480 chsqh->hlink = bsqh; 481 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 482 chsqh->elink = NULL; 483 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 484 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 485 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 486 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 487 488 /* Allocate dummy QH where control traffic will be queued. */ 489 clsqh = uhci_alloc_sqh(sc); 490 if (clsqh == NULL) 491 return ENOMEM; 492 clsqh->hlink = chsqh; 493 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 494 clsqh->elink = NULL; 495 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 496 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 497 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 498 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 499 500 /* 501 * Make all (virtual) frame list pointers point to the interrupt 502 * queue heads and the interrupt queue heads at the control 503 * queue head and point the physical frame list to the virtual. 504 */ 505 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 506 std = uhci_alloc_std(sc); 507 sqh = uhci_alloc_sqh(sc); 508 if (std == NULL || sqh == NULL) 509 return USBD_NOMEM; 510 std->link.sqh = sqh; 511 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 512 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 513 std->td.td_token = htole32(0); 514 std->td.td_buffer = htole32(0); 515 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 516 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 517 sqh->hlink = clsqh; 518 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 519 sqh->elink = NULL; 520 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 521 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 522 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 523 sc->sc_vframes[i].htd = std; 524 sc->sc_vframes[i].etd = std; 525 sc->sc_vframes[i].hqh = sqh; 526 sc->sc_vframes[i].eqh = sqh; 527 for (j = i; 528 j < UHCI_FRAMELIST_COUNT; 529 j += UHCI_VFRAMELIST_COUNT) 530 sc->sc_pframes[j] = htole32(std->physaddr); 531 } 532 usb_syncmem(&sc->sc_dma, 0, 533 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 534 BUS_DMASYNC_PREWRITE); 535 536 537 LIST_INIT(&sc->sc_intrhead); 538 539 sc->sc_xferpool = pool_cache_init(sizeof(struct uhci_xfer), 0, 0, 0, 540 "uhcixfer", NULL, IPL_USB, NULL, NULL, NULL); 541 542 callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE); 543 544 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 545 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 546 cv_init(&sc->sc_softwake_cv, "uhciab"); 547 548 /* Set up the bus struct. */ 549 sc->sc_bus.ub_methods = &uhci_bus_methods; 550 sc->sc_bus.ub_pipesize = sizeof(struct uhci_pipe); 551 sc->sc_bus.ub_usedma = true; 552 553 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 554 555 DPRINTFN(1, "Enabling...", 0, 0, 0, 0); 556 557 err = uhci_run(sc, 1, 0); /* and here we go... */ 558 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 559 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 560 return err; 561 } 562 563 int 564 uhci_activate(device_t self, enum devact act) 565 { 566 struct uhci_softc *sc = device_private(self); 567 568 switch (act) { 569 case DVACT_DEACTIVATE: 570 sc->sc_dying = 1; 571 return 0; 572 default: 573 return EOPNOTSUPP; 574 } 575 } 576 577 void 578 uhci_childdet(device_t self, device_t child) 579 { 580 struct uhci_softc *sc = device_private(self); 581 582 KASSERT(sc->sc_child == child); 583 sc->sc_child = NULL; 584 } 585 586 int 587 uhci_detach(struct uhci_softc *sc, int flags) 588 { 589 int rv = 0; 590 591 if (sc->sc_child != NULL) 592 rv = config_detach(sc->sc_child, flags); 593 594 if (rv != 0) 595 return rv; 596 597 callout_halt(&sc->sc_poll_handle, NULL); 598 callout_destroy(&sc->sc_poll_handle); 599 600 cv_destroy(&sc->sc_softwake_cv); 601 602 mutex_destroy(&sc->sc_lock); 603 mutex_destroy(&sc->sc_intr_lock); 604 605 pool_cache_destroy(sc->sc_xferpool); 606 607 /* XXX free other data structures XXX */ 608 609 return rv; 610 } 611 612 struct usbd_xfer * 613 uhci_allocx(struct usbd_bus *bus) 614 { 615 struct uhci_softc *sc = bus->ub_hcpriv; 616 struct usbd_xfer *xfer; 617 618 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 619 if (xfer != NULL) { 620 memset(xfer, 0, sizeof(struct uhci_xfer)); 621 UXFER(xfer)->iinfo.sc = sc; 622 #ifdef DIAGNOSTIC 623 UXFER(xfer)->iinfo.isdone = 1; 624 xfer->ux_state = XFER_BUSY; 625 #endif 626 } 627 return xfer; 628 } 629 630 void 631 uhci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 632 { 633 struct uhci_softc *sc = bus->ub_hcpriv; 634 635 #ifdef DIAGNOSTIC 636 if (xfer->ux_state != XFER_BUSY) { 637 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 638 xfer->ux_state); 639 } 640 xfer->ux_state = XFER_FREE; 641 if (!UXFER(xfer)->iinfo.isdone) { 642 printf("uhci_freex: !isdone\n"); 643 } 644 #endif 645 pool_cache_put(sc->sc_xferpool, xfer); 646 } 647 648 Static void 649 uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 650 { 651 struct uhci_softc *sc = bus->ub_hcpriv; 652 653 *lock = &sc->sc_lock; 654 } 655 656 657 /* 658 * Handle suspend/resume. 659 * 660 * We need to switch to polling mode here, because this routine is 661 * called from an interrupt context. This is all right since we 662 * are almost suspended anyway. 663 */ 664 bool 665 uhci_resume(device_t dv, const pmf_qual_t *qual) 666 { 667 uhci_softc_t *sc = device_private(dv); 668 int cmd; 669 670 mutex_spin_enter(&sc->sc_intr_lock); 671 672 cmd = UREAD2(sc, UHCI_CMD); 673 sc->sc_bus.ub_usepolling++; 674 UWRITE2(sc, UHCI_INTR, 0); 675 uhci_globalreset(sc); 676 uhci_reset(sc); 677 if (cmd & UHCI_CMD_RS) 678 uhci_run(sc, 0, 1); 679 680 /* restore saved state */ 681 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 682 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 683 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 684 685 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 686 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock); 687 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 688 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 689 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 690 UHCICMD(sc, UHCI_CMD_MAXP); 691 uhci_run(sc, 1, 1); /* and start traffic again */ 692 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock); 693 sc->sc_bus.ub_usepolling--; 694 if (sc->sc_intr_xfer != NULL) 695 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 696 sc->sc_intr_xfer); 697 #ifdef UHCI_DEBUG 698 if (uhcidebug > 2) 699 uhci_dumpregs(sc); 700 #endif 701 702 sc->sc_suspend = PWR_RESUME; 703 mutex_spin_exit(&sc->sc_intr_lock); 704 705 return true; 706 } 707 708 bool 709 uhci_suspend(device_t dv, const pmf_qual_t *qual) 710 { 711 uhci_softc_t *sc = device_private(dv); 712 int cmd; 713 714 mutex_spin_enter(&sc->sc_intr_lock); 715 716 cmd = UREAD2(sc, UHCI_CMD); 717 718 #ifdef UHCI_DEBUG 719 if (uhcidebug > 2) 720 uhci_dumpregs(sc); 721 #endif 722 if (sc->sc_intr_xfer != NULL) 723 callout_stop(&sc->sc_poll_handle); 724 sc->sc_suspend = PWR_SUSPEND; 725 sc->sc_bus.ub_usepolling++; 726 727 uhci_run(sc, 0, 1); /* stop the controller */ 728 cmd &= ~UHCI_CMD_RS; 729 730 /* save some state if BIOS doesn't */ 731 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 732 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 733 734 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 735 736 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 737 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock); 738 sc->sc_bus.ub_usepolling--; 739 740 mutex_spin_exit(&sc->sc_intr_lock); 741 742 return true; 743 } 744 745 #ifdef UHCI_DEBUG 746 Static void 747 uhci_dumpregs(uhci_softc_t *sc) 748 { 749 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 750 DPRINTFN(1, "cmd =%04x sts =%04x intr =%04x frnum =%04x", 751 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 752 UREAD2(sc, UHCI_INTR), UREAD2(sc, UHCI_FRNUM)); 753 DPRINTFN(1, "sof =%04x portsc1=%04x portsc2=%04x flbase=%08x", 754 UREAD1(sc, UHCI_SOF), UREAD2(sc, UHCI_PORTSC1), 755 UREAD2(sc, UHCI_PORTSC2), UREAD4(sc, UHCI_FLBASEADDR)); 756 } 757 758 void 759 uhci_dump_td(uhci_soft_td_t *p) 760 { 761 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 762 763 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 764 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 765 766 DPRINTFN(1, "TD(%p) at %08x", p, p->physaddr, 0, 0); 767 DPRINTFN(1, " link=0x%08x status=0x%08x " 768 "token=0x%08x buffer=0x%08x", 769 le32toh(p->td.td_link), 770 le32toh(p->td.td_status), 771 le32toh(p->td.td_token), 772 le32toh(p->td.td_buffer)); 773 774 DPRINTFN(1, "bitstuff=%d crcto =%d nak =%d babble =%d", 775 !!(le32toh(p->td.td_status) & UHCI_TD_BITSTUFF), 776 !!(le32toh(p->td.td_status) & UHCI_TD_CRCTO), 777 !!(le32toh(p->td.td_status) & UHCI_TD_NAK), 778 !!(le32toh(p->td.td_status) & UHCI_TD_BABBLE)); 779 DPRINTFN(1, "dbuffer =%d stalled =%d active =%d ioc =%d", 780 !!(le32toh(p->td.td_status) & UHCI_TD_DBUFFER), 781 !!(le32toh(p->td.td_status) & UHCI_TD_STALLED), 782 !!(le32toh(p->td.td_status) & UHCI_TD_ACTIVE), 783 !!(le32toh(p->td.td_status) & UHCI_TD_IOC)); 784 DPRINTFN(1, "ios =%d ls =%d spd =%d", 785 !!(le32toh(p->td.td_status) & UHCI_TD_IOS), 786 !!(le32toh(p->td.td_status) & UHCI_TD_LS), 787 !!(le32toh(p->td.td_status) & UHCI_TD_SPD), 0); 788 DPRINTFN(1, "errcnt =%d actlen =%d pid=%02x", 789 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 790 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 791 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 0); 792 DPRINTFN(1, "addr=%d endpt=%d D=%d maxlen=%d,", 793 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 794 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 795 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 796 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))); 797 } 798 799 void 800 uhci_dump_qh(uhci_soft_qh_t *sqh) 801 { 802 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 803 804 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 805 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 806 807 DPRINTFN(1, "QH(%p) at %08x: hlink=%08x elink=%08x", sqh, 808 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 809 le32toh(sqh->qh.qh_elink)); 810 811 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 812 } 813 814 815 #if 1 816 void 817 uhci_dump(void) 818 { 819 uhci_dump_all(thesc); 820 } 821 #endif 822 823 void 824 uhci_dump_all(uhci_softc_t *sc) 825 { 826 uhci_dumpregs(sc); 827 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 828 uhci_dump_qhs(sc->sc_lctl_start); 829 } 830 831 832 void 833 uhci_dump_qhs(uhci_soft_qh_t *sqh) 834 { 835 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 836 837 uhci_dump_qh(sqh); 838 839 /* 840 * uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 841 * Traverses sideways first, then down. 842 * 843 * QH1 844 * QH2 845 * No QH 846 * TD2.1 847 * TD2.2 848 * TD1.1 849 * etc. 850 * 851 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 852 */ 853 854 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 855 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 856 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 857 uhci_dump_qhs(sqh->hlink); 858 else 859 DPRINTFN(1, "No QH", 0, 0, 0, 0); 860 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 861 862 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 863 uhci_dump_tds(sqh->elink); 864 else 865 DPRINTFN(1, "No QH", 0, 0, 0, 0); 866 } 867 868 void 869 uhci_dump_tds(uhci_soft_td_t *std) 870 { 871 uhci_soft_td_t *td; 872 int stop; 873 874 for (td = std; td != NULL; td = td->link.std) { 875 uhci_dump_td(td); 876 877 /* 878 * Check whether the link pointer in this TD marks 879 * the link pointer as end of queue. This avoids 880 * printing the free list in case the queue/TD has 881 * already been moved there (seatbelt). 882 */ 883 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 884 sizeof(td->td.td_link), 885 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 886 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 887 le32toh(td->td.td_link) == 0); 888 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 889 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 890 if (stop) 891 break; 892 } 893 } 894 895 Static void 896 uhci_dump_ii(uhci_intr_info_t *ii) 897 { 898 struct usbd_pipe *pipe; 899 usb_endpoint_descriptor_t *ed; 900 struct usbd_device *dev; 901 902 #ifdef DIAGNOSTIC 903 #define DONE ii->isdone 904 #else 905 #define DONE 0 906 #endif 907 if (ii == NULL) { 908 printf("ii NULL\n"); 909 return; 910 } 911 if (ii->xfer == NULL) { 912 printf("ii %p: done=%d xfer=NULL\n", 913 ii, DONE); 914 return; 915 } 916 pipe = ii->xfer->ux_pipe; 917 if (pipe == NULL) { 918 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 919 ii, DONE, ii->xfer); 920 return; 921 } 922 if (pipe->up_endpoint == NULL) { 923 printf("ii %p: done=%d xfer=%p pipe=%p pipe->up_endpoint=NULL\n", 924 ii, DONE, ii->xfer, pipe); 925 return; 926 } 927 if (pipe->up_dev == NULL) { 928 printf("ii %p: done=%d xfer=%p pipe=%p pipe->up_dev=NULL\n", 929 ii, DONE, ii->xfer, pipe); 930 return; 931 } 932 ed = pipe->up_endpoint->ue_edesc; 933 dev = pipe->up_dev; 934 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 935 ii, DONE, ii->xfer, dev, 936 UGETW(dev->ud_ddesc.idVendor), 937 UGETW(dev->ud_ddesc.idProduct), 938 dev->ud_addr, pipe, 939 ed->bEndpointAddress, ed->bmAttributes); 940 #undef DONE 941 } 942 943 void uhci_dump_iis(struct uhci_softc *sc); 944 void 945 uhci_dump_iis(struct uhci_softc *sc) 946 { 947 uhci_intr_info_t *ii; 948 949 printf("intr_info list:\n"); 950 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 951 uhci_dump_ii(ii); 952 } 953 954 void iidump(void); 955 void iidump(void) { uhci_dump_iis(thesc); } 956 957 #endif 958 959 /* 960 * This routine is executed periodically and simulates interrupts 961 * from the root controller interrupt pipe for port status change. 962 */ 963 void 964 uhci_poll_hub(void *addr) 965 { 966 struct usbd_xfer *xfer = addr; 967 struct usbd_pipe *pipe = xfer->ux_pipe; 968 uhci_softc_t *sc; 969 u_char *p; 970 971 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 972 973 if (__predict_false(pipe->up_dev == NULL || pipe->up_dev->ud_bus == NULL)) 974 return; /* device has detached */ 975 sc = pipe->up_dev->ud_bus->ub_hcpriv; 976 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 977 978 p = xfer->ux_buf; 979 p[0] = 0; 980 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 981 p[0] |= 1<<1; 982 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 983 p[0] |= 1<<2; 984 if (p[0] == 0) 985 /* No change, try again in a while */ 986 return; 987 988 xfer->ux_actlen = 1; 989 xfer->ux_status = USBD_NORMAL_COMPLETION; 990 mutex_enter(&sc->sc_lock); 991 usb_transfer_complete(xfer); 992 mutex_exit(&sc->sc_lock); 993 } 994 995 void 996 uhci_root_intr_done(struct usbd_xfer *xfer) 997 { 998 } 999 1000 /* 1001 * Let the last QH loop back to the high speed control transfer QH. 1002 * This is what intel calls "bandwidth reclamation" and improves 1003 * USB performance a lot for some devices. 1004 * If we are already looping, just count it. 1005 */ 1006 void 1007 uhci_add_loop(uhci_softc_t *sc) 1008 { 1009 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1010 1011 #ifdef UHCI_DEBUG 1012 if (uhcinoloop) 1013 return; 1014 #endif 1015 if (++sc->sc_loops == 1) { 1016 DPRINTFN(5, "add loop", 0, 0, 0, 0); 1017 /* Note, we don't loop back the soft pointer. */ 1018 sc->sc_last_qh->qh.qh_hlink = 1019 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1020 usb_syncmem(&sc->sc_last_qh->dma, 1021 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1022 sizeof(sc->sc_last_qh->qh.qh_hlink), 1023 BUS_DMASYNC_PREWRITE); 1024 } 1025 } 1026 1027 void 1028 uhci_rem_loop(uhci_softc_t *sc) 1029 { 1030 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1031 1032 #ifdef UHCI_DEBUG 1033 if (uhcinoloop) 1034 return; 1035 #endif 1036 if (--sc->sc_loops == 0) { 1037 DPRINTFN(5, "remove loop", 0, 0, 0, 0); 1038 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1039 usb_syncmem(&sc->sc_last_qh->dma, 1040 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1041 sizeof(sc->sc_last_qh->qh.qh_hlink), 1042 BUS_DMASYNC_PREWRITE); 1043 } 1044 } 1045 1046 /* Add high speed control QH, called with lock held. */ 1047 void 1048 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1049 { 1050 uhci_soft_qh_t *eqh; 1051 1052 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1053 1054 KASSERT(mutex_owned(&sc->sc_lock)); 1055 1056 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1057 eqh = sc->sc_hctl_end; 1058 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1059 sizeof(eqh->qh.qh_hlink), 1060 BUS_DMASYNC_POSTWRITE); 1061 sqh->hlink = eqh->hlink; 1062 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1063 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1064 BUS_DMASYNC_PREWRITE); 1065 eqh->hlink = sqh; 1066 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1067 sc->sc_hctl_end = sqh; 1068 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1069 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1070 #ifdef UHCI_CTL_LOOP 1071 uhci_add_loop(sc); 1072 #endif 1073 } 1074 1075 /* Remove high speed control QH, called with lock held. */ 1076 void 1077 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1078 { 1079 uhci_soft_qh_t *pqh; 1080 uint32_t elink; 1081 1082 KASSERT(mutex_owned(&sc->sc_lock)); 1083 1084 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1085 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1086 #ifdef UHCI_CTL_LOOP 1087 uhci_rem_loop(sc); 1088 #endif 1089 /* 1090 * The T bit should be set in the elink of the QH so that the HC 1091 * doesn't follow the pointer. This condition may fail if the 1092 * the transferred packet was short so that the QH still points 1093 * at the last used TD. 1094 * In this case we set the T bit and wait a little for the HC 1095 * to stop looking at the TD. 1096 * Note that if the TD chain is large enough, the controller 1097 * may still be looking at the chain at the end of this function. 1098 * uhci_free_std_chain() will make sure the controller stops 1099 * looking at it quickly, but until then we should not change 1100 * sqh->hlink. 1101 */ 1102 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1103 sizeof(sqh->qh.qh_elink), 1104 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1105 elink = le32toh(sqh->qh.qh_elink); 1106 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1107 sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD); 1108 if (!(elink & UHCI_PTR_T)) { 1109 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1110 usb_syncmem(&sqh->dma, 1111 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1112 sizeof(sqh->qh.qh_elink), 1113 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1114 delay(UHCI_QH_REMOVE_DELAY); 1115 } 1116 1117 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1118 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1119 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1120 pqh->hlink = sqh->hlink; 1121 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1122 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1123 sizeof(pqh->qh.qh_hlink), 1124 BUS_DMASYNC_PREWRITE); 1125 delay(UHCI_QH_REMOVE_DELAY); 1126 if (sc->sc_hctl_end == sqh) 1127 sc->sc_hctl_end = pqh; 1128 } 1129 1130 /* Add low speed control QH, called with lock held. */ 1131 void 1132 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1133 { 1134 uhci_soft_qh_t *eqh; 1135 1136 KASSERT(mutex_owned(&sc->sc_lock)); 1137 1138 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1139 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1140 1141 eqh = sc->sc_lctl_end; 1142 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1143 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1144 sqh->hlink = eqh->hlink; 1145 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1146 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1147 BUS_DMASYNC_PREWRITE); 1148 eqh->hlink = sqh; 1149 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1150 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1151 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1152 sc->sc_lctl_end = sqh; 1153 } 1154 1155 /* Remove low speed control QH, called with lock held. */ 1156 void 1157 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1158 { 1159 uhci_soft_qh_t *pqh; 1160 uint32_t elink; 1161 1162 KASSERT(mutex_owned(&sc->sc_lock)); 1163 1164 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1165 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1166 1167 /* See comment in uhci_remove_hs_ctrl() */ 1168 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1169 sizeof(sqh->qh.qh_elink), 1170 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1171 elink = le32toh(sqh->qh.qh_elink); 1172 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1173 sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD); 1174 if (!(elink & UHCI_PTR_T)) { 1175 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1176 usb_syncmem(&sqh->dma, 1177 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1178 sizeof(sqh->qh.qh_elink), 1179 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1180 delay(UHCI_QH_REMOVE_DELAY); 1181 } 1182 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1183 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1184 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1185 pqh->hlink = sqh->hlink; 1186 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1187 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1188 sizeof(pqh->qh.qh_hlink), 1189 BUS_DMASYNC_PREWRITE); 1190 delay(UHCI_QH_REMOVE_DELAY); 1191 if (sc->sc_lctl_end == sqh) 1192 sc->sc_lctl_end = pqh; 1193 } 1194 1195 /* Add bulk QH, called with lock held. */ 1196 void 1197 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1198 { 1199 uhci_soft_qh_t *eqh; 1200 1201 KASSERT(mutex_owned(&sc->sc_lock)); 1202 1203 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1204 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1205 1206 eqh = sc->sc_bulk_end; 1207 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1208 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1209 sqh->hlink = eqh->hlink; 1210 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1211 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1212 BUS_DMASYNC_PREWRITE); 1213 eqh->hlink = sqh; 1214 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1215 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1216 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1217 sc->sc_bulk_end = sqh; 1218 uhci_add_loop(sc); 1219 } 1220 1221 /* Remove bulk QH, called with lock held. */ 1222 void 1223 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1224 { 1225 uhci_soft_qh_t *pqh; 1226 1227 KASSERT(mutex_owned(&sc->sc_lock)); 1228 1229 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1230 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1231 1232 uhci_rem_loop(sc); 1233 /* See comment in uhci_remove_hs_ctrl() */ 1234 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1235 sizeof(sqh->qh.qh_elink), 1236 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1237 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1238 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1239 usb_syncmem(&sqh->dma, 1240 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1241 sizeof(sqh->qh.qh_elink), 1242 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1243 delay(UHCI_QH_REMOVE_DELAY); 1244 } 1245 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1246 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1247 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1248 pqh->hlink = sqh->hlink; 1249 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1250 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1251 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1252 delay(UHCI_QH_REMOVE_DELAY); 1253 if (sc->sc_bulk_end == sqh) 1254 sc->sc_bulk_end = pqh; 1255 } 1256 1257 Static int uhci_intr1(uhci_softc_t *); 1258 1259 int 1260 uhci_intr(void *arg) 1261 { 1262 uhci_softc_t *sc = arg; 1263 int ret = 0; 1264 1265 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1266 1267 mutex_spin_enter(&sc->sc_intr_lock); 1268 1269 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1270 goto done; 1271 1272 if (sc->sc_bus.ub_usepolling || UREAD2(sc, UHCI_INTR) == 0) { 1273 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1274 goto done; 1275 } 1276 1277 ret = uhci_intr1(sc); 1278 1279 done: 1280 mutex_spin_exit(&sc->sc_intr_lock); 1281 return ret; 1282 } 1283 1284 int 1285 uhci_intr1(uhci_softc_t *sc) 1286 { 1287 int status; 1288 int ack; 1289 1290 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1291 1292 #ifdef UHCI_DEBUG 1293 if (uhcidebug > 15) { 1294 DPRINTFN(1, "sc %p", sc, 0, 0, 0); 1295 uhci_dumpregs(sc); 1296 } 1297 #endif 1298 1299 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1300 1301 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1302 if (status == 0) /* The interrupt was not for us. */ 1303 return 0; 1304 1305 if (sc->sc_suspend != PWR_RESUME) { 1306 #ifdef DIAGNOSTIC 1307 printf("%s: interrupt while not operating ignored\n", 1308 device_xname(sc->sc_dev)); 1309 #endif 1310 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1311 return 0; 1312 } 1313 1314 ack = 0; 1315 if (status & UHCI_STS_USBINT) 1316 ack |= UHCI_STS_USBINT; 1317 if (status & UHCI_STS_USBEI) 1318 ack |= UHCI_STS_USBEI; 1319 if (status & UHCI_STS_RD) { 1320 ack |= UHCI_STS_RD; 1321 #ifdef UHCI_DEBUG 1322 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1323 #endif 1324 } 1325 if (status & UHCI_STS_HSE) { 1326 ack |= UHCI_STS_HSE; 1327 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1328 } 1329 if (status & UHCI_STS_HCPE) { 1330 ack |= UHCI_STS_HCPE; 1331 printf("%s: host controller process error\n", 1332 device_xname(sc->sc_dev)); 1333 } 1334 1335 /* When HCHalted=1 and Run/Stop=0 , it is normal */ 1336 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) { 1337 /* no acknowledge needed */ 1338 if (!sc->sc_dying) { 1339 printf("%s: host controller halted\n", 1340 device_xname(sc->sc_dev)); 1341 #ifdef UHCI_DEBUG 1342 uhci_dump_all(sc); 1343 #endif 1344 } 1345 sc->sc_dying = 1; 1346 } 1347 1348 if (!ack) 1349 return 0; /* nothing to acknowledge */ 1350 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1351 1352 usb_schedsoftintr(&sc->sc_bus); 1353 1354 DPRINTFN(15, "sc %p done", sc, 0, 0, 0); 1355 1356 return 1; 1357 } 1358 1359 void 1360 uhci_softintr(void *v) 1361 { 1362 struct usbd_bus *bus = v; 1363 uhci_softc_t *sc = bus->ub_hcpriv; 1364 uhci_intr_info_t *ii, *nextii; 1365 1366 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1367 DPRINTFN(1, "sc %p", sc, 0, 0, 0); 1368 1369 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1370 1371 /* 1372 * Interrupts on UHCI really suck. When the host controller 1373 * interrupts because a transfer is completed there is no 1374 * way of knowing which transfer it was. You can scan down 1375 * the TDs and QHs of the previous frame to limit the search, 1376 * but that assumes that the interrupt was not delayed by more 1377 * than 1 ms, which may not always be true (e.g. after debug 1378 * output on a slow console). 1379 * We scan all interrupt descriptors to see if any have 1380 * completed. 1381 */ 1382 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1383 nextii = LIST_NEXT(ii, list); 1384 uhci_check_intr(sc, ii); 1385 } 1386 1387 if (sc->sc_softwake) { 1388 sc->sc_softwake = 0; 1389 cv_broadcast(&sc->sc_softwake_cv); 1390 } 1391 } 1392 1393 /* Check for an interrupt. */ 1394 void 1395 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1396 { 1397 uhci_soft_td_t *std, *lstd; 1398 uint32_t status; 1399 1400 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1401 DPRINTFN(15, "ii %p", ii, 0, 0, 0); 1402 #ifdef DIAGNOSTIC 1403 if (ii == NULL) { 1404 printf("uhci_check_intr: no ii? %p\n", ii); 1405 return; 1406 } 1407 #endif 1408 if (ii->xfer->ux_status == USBD_CANCELLED || 1409 ii->xfer->ux_status == USBD_TIMEOUT) { 1410 DPRINTFN(1, "aborted xfer %p", ii->xfer, 0, 0, 0); 1411 return; 1412 } 1413 1414 if (ii->stdstart == NULL) 1415 return; 1416 lstd = ii->stdend; 1417 #ifdef DIAGNOSTIC 1418 if (lstd == NULL) { 1419 printf("uhci_check_intr: std==0\n"); 1420 return; 1421 } 1422 #endif 1423 usb_syncmem(&lstd->dma, 1424 lstd->offs + offsetof(uhci_td_t, td_status), 1425 sizeof(lstd->td.td_status), 1426 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1427 status = le32toh(lstd->td.td_status); 1428 usb_syncmem(&lstd->dma, 1429 lstd->offs + offsetof(uhci_td_t, td_status), 1430 sizeof(lstd->td.td_status), 1431 BUS_DMASYNC_PREREAD); 1432 1433 /* If the last TD is not marked active we can complete */ 1434 if (!(status & UHCI_TD_ACTIVE)) { 1435 done: 1436 DPRINTFN(12, "ii=%p done", ii, 0, 0, 0); 1437 1438 callout_stop(&ii->xfer->ux_callout); 1439 uhci_idone(ii); 1440 return; 1441 } 1442 1443 /* 1444 * If the last TD is still active we need to check whether there 1445 * is an error somewhere in the middle, or whether there was a 1446 * short packet (SPD and not ACTIVE). 1447 */ 1448 DPRINTFN(12, "active ii=%p", ii, 0, 0, 0); 1449 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1450 usb_syncmem(&std->dma, 1451 std->offs + offsetof(uhci_td_t, td_status), 1452 sizeof(std->td.td_status), 1453 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1454 status = le32toh(std->td.td_status); 1455 usb_syncmem(&std->dma, 1456 std->offs + offsetof(uhci_td_t, td_status), 1457 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1458 1459 /* If there's an active TD the xfer isn't done. */ 1460 if (status & UHCI_TD_ACTIVE) { 1461 DPRINTFN(12, "ii=%p std=%p still active", 1462 ii, std, 0, 0); 1463 return; 1464 } 1465 1466 /* Any kind of error makes the xfer done. */ 1467 if (status & UHCI_TD_STALLED) 1468 goto done; 1469 1470 /* 1471 * If the data phase of a control transfer is short, we need 1472 * to complete the status stage 1473 */ 1474 struct usbd_xfer *xfer = ii->xfer; 1475 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 1476 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1477 1478 if ((status & UHCI_TD_SPD) && xfertype == UE_CONTROL) { 1479 struct uhci_pipe *upipe = 1480 (struct uhci_pipe *)xfer->ux_pipe; 1481 uhci_soft_qh_t *sqh = upipe->u.ctl.sqh; 1482 uhci_soft_td_t *stat = upipe->u.ctl.stat; 1483 1484 DPRINTFN(12, "ii=%p std=%p control status" 1485 "phase needs completion", ii, ii->stdstart, 0, 0); 1486 1487 sqh->qh.qh_elink = 1488 htole32(stat->physaddr | UHCI_PTR_TD); 1489 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1490 BUS_DMASYNC_PREWRITE); 1491 break; 1492 } 1493 1494 /* We want short packets, and it is short: it's done */ 1495 usb_syncmem(&std->dma, 1496 std->offs + offsetof(uhci_td_t, td_token), 1497 sizeof(std->td.td_token), 1498 BUS_DMASYNC_POSTWRITE); 1499 1500 if ((status & UHCI_TD_SPD) && 1501 UHCI_TD_GET_ACTLEN(status) < 1502 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) { 1503 goto done; 1504 } 1505 } 1506 } 1507 1508 /* Called with USB lock held. */ 1509 void 1510 uhci_idone(uhci_intr_info_t *ii) 1511 { 1512 struct usbd_xfer *xfer = ii->xfer; 1513 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 1514 #ifdef DIAGNOSTIC 1515 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 1516 #endif 1517 uhci_soft_td_t *std; 1518 uint32_t status = 0, nstatus; 1519 int actlen; 1520 1521 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1522 1523 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1524 DPRINTFN(12, "ii=%p", ii, 0, 0, 0); 1525 1526 #ifdef DIAGNOSTIC 1527 { 1528 /* XXX SMP? */ 1529 int s = splhigh(); 1530 if (ii->isdone) { 1531 splx(s); 1532 #ifdef UHCI_DEBUG 1533 printf("uhci_idone: ii is done!\n "); 1534 uhci_dump_ii(ii); 1535 #else 1536 printf("uhci_idone: ii=%p is done!\n", ii); 1537 #endif 1538 return; 1539 } 1540 ii->isdone = 1; 1541 splx(s); 1542 } 1543 #endif 1544 1545 if (xfer->ux_nframes != 0) { 1546 /* Isoc transfer, do things differently. */ 1547 uhci_soft_td_t **stds = upipe->u.iso.stds; 1548 int i, n, nframes, len; 1549 1550 DPRINTFN(5, "ii=%p isoc ready", ii, 0, 0, 0); 1551 1552 nframes = xfer->ux_nframes; 1553 actlen = 0; 1554 n = UXFER(xfer)->curframe; 1555 for (i = 0; i < nframes; i++) { 1556 std = stds[n]; 1557 #ifdef UHCI_DEBUG 1558 if (uhcidebug > 5) { 1559 DPRINTFN(1, "isoc TD %d", i, 0, 0, 0); 1560 uhci_dump_td(std); 1561 } 1562 #endif 1563 if (++n >= UHCI_VFRAMELIST_COUNT) 1564 n = 0; 1565 usb_syncmem(&std->dma, 1566 std->offs + offsetof(uhci_td_t, td_status), 1567 sizeof(std->td.td_status), 1568 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1569 status = le32toh(std->td.td_status); 1570 len = UHCI_TD_GET_ACTLEN(status); 1571 xfer->ux_frlengths[i] = len; 1572 actlen += len; 1573 } 1574 upipe->u.iso.inuse -= nframes; 1575 xfer->ux_actlen = actlen; 1576 xfer->ux_status = USBD_NORMAL_COMPLETION; 1577 goto end; 1578 } 1579 1580 #ifdef UHCI_DEBUG 1581 DPRINTFN(10, "ii=%p, xfer=%p, pipe=%p ready", 1582 ii, xfer, upipe, 0); 1583 if (uhcidebug > 10) 1584 uhci_dump_tds(ii->stdstart); 1585 #endif 1586 1587 /* The transfer is done, compute actual length and status. */ 1588 actlen = 0; 1589 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1590 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1591 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1592 nstatus = le32toh(std->td.td_status); 1593 if (nstatus & UHCI_TD_ACTIVE) 1594 break; 1595 1596 status = nstatus; 1597 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1598 UHCI_TD_PID_SETUP) 1599 actlen += UHCI_TD_GET_ACTLEN(status); 1600 else { 1601 /* 1602 * UHCI will report CRCTO in addition to a STALL or NAK 1603 * for a SETUP transaction. See section 3.2.2, "TD 1604 * CONTROL AND STATUS". 1605 */ 1606 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1607 status &= ~UHCI_TD_CRCTO; 1608 } 1609 } 1610 /* If there are left over TDs we need to update the toggle. */ 1611 if (std != NULL) 1612 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1613 1614 status &= UHCI_TD_ERROR; 1615 DPRINTFN(10, "actlen=%d, status=0x%x", actlen, status, 1616 0, 0); 1617 xfer->ux_actlen = actlen; 1618 if (status != 0) { 1619 1620 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1621 "error, addr=%d, endpt=0x%02x", 1622 xfer->ux_pipe->up_dev->ud_addr, 1623 xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress, 1624 0, 0); 1625 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1626 "bitstuff=%d crcto =%d nak =%d babble =%d", 1627 status & UHCI_TD_BITSTUFF, 1628 status & UHCI_TD_CRCTO, 1629 status & UHCI_TD_NAK, 1630 status & UHCI_TD_BABBLE); 1631 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1632 "dbuffer =%d stalled =%d active =%d", 1633 status & UHCI_TD_DBUFFER, 1634 status & UHCI_TD_STALLED, 1635 status & UHCI_TD_ACTIVE, 1636 0); 1637 1638 if (status == UHCI_TD_STALLED) 1639 xfer->ux_status = USBD_STALLED; 1640 else 1641 xfer->ux_status = USBD_IOERROR; /* more info XXX */ 1642 } else { 1643 xfer->ux_status = USBD_NORMAL_COMPLETION; 1644 } 1645 1646 end: 1647 usb_transfer_complete(xfer); 1648 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1649 DPRINTFN(12, "ii=%p done", ii, 0, 0, 0); 1650 } 1651 1652 /* 1653 * Called when a request does not complete. 1654 */ 1655 void 1656 uhci_timeout(void *addr) 1657 { 1658 uhci_intr_info_t *ii = addr; 1659 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1660 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.ux_pipe; 1661 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 1662 1663 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1664 1665 DPRINTFN(1, "uxfer %p", uxfer, 0, 0, 0); 1666 1667 if (sc->sc_dying) { 1668 mutex_enter(&sc->sc_lock); 1669 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1670 mutex_exit(&sc->sc_lock); 1671 return; 1672 } 1673 1674 /* Execute the abort in a process context. */ 1675 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer, 1676 USB_TASKQ_MPSAFE); 1677 usb_add_task(uxfer->xfer.ux_pipe->up_dev, &uxfer->abort_task, 1678 USB_TASKQ_HC); 1679 } 1680 1681 void 1682 uhci_timeout_task(void *addr) 1683 { 1684 struct usbd_xfer *xfer = addr; 1685 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 1686 1687 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1688 1689 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 1690 1691 mutex_enter(&sc->sc_lock); 1692 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1693 mutex_exit(&sc->sc_lock); 1694 } 1695 1696 /* 1697 * Wait here until controller claims to have an interrupt. 1698 * Then call uhci_intr and return. Use timeout to avoid waiting 1699 * too long. 1700 * Only used during boot when interrupts are not enabled yet. 1701 */ 1702 void 1703 uhci_waitintr(uhci_softc_t *sc, struct usbd_xfer *xfer) 1704 { 1705 int timo = xfer->ux_timeout; 1706 uhci_intr_info_t *ii; 1707 1708 mutex_enter(&sc->sc_lock); 1709 1710 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1711 DPRINTFN(10, "timeout = %dms", timo, 0, 0, 0); 1712 1713 xfer->ux_status = USBD_IN_PROGRESS; 1714 for (; timo >= 0; timo--) { 1715 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_lock); 1716 DPRINTFN(20, "0x%04x", 1717 UREAD2(sc, UHCI_STS), 0, 0, 0); 1718 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1719 mutex_spin_enter(&sc->sc_intr_lock); 1720 uhci_intr1(sc); 1721 mutex_spin_exit(&sc->sc_intr_lock); 1722 if (xfer->ux_status != USBD_IN_PROGRESS) 1723 goto done; 1724 } 1725 } 1726 1727 /* Timeout */ 1728 DPRINTFN(1, "timeout", 0, 0, 0, 0); 1729 for (ii = LIST_FIRST(&sc->sc_intrhead); 1730 ii != NULL && ii->xfer != xfer; 1731 ii = LIST_NEXT(ii, list)) 1732 ; 1733 #ifdef DIAGNOSTIC 1734 if (ii == NULL) 1735 panic("uhci_waitintr: lost intr_info"); 1736 #endif 1737 uhci_idone(ii); 1738 1739 done: 1740 mutex_exit(&sc->sc_lock); 1741 } 1742 1743 void 1744 uhci_poll(struct usbd_bus *bus) 1745 { 1746 uhci_softc_t *sc = bus->ub_hcpriv; 1747 1748 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1749 mutex_spin_enter(&sc->sc_intr_lock); 1750 uhci_intr1(sc); 1751 mutex_spin_exit(&sc->sc_intr_lock); 1752 } 1753 } 1754 1755 void 1756 uhci_reset(uhci_softc_t *sc) 1757 { 1758 int n; 1759 1760 UHCICMD(sc, UHCI_CMD_HCRESET); 1761 /* The reset bit goes low when the controller is done. */ 1762 for (n = 0; n < UHCI_RESET_TIMEOUT && 1763 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1764 usb_delay_ms(&sc->sc_bus, 1); 1765 if (n >= UHCI_RESET_TIMEOUT) 1766 printf("%s: controller did not reset\n", 1767 device_xname(sc->sc_dev)); 1768 } 1769 1770 usbd_status 1771 uhci_run(uhci_softc_t *sc, int run, int locked) 1772 { 1773 int n, running; 1774 uint16_t cmd; 1775 1776 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1777 1778 run = run != 0; 1779 if (!locked) 1780 mutex_spin_enter(&sc->sc_intr_lock); 1781 1782 DPRINTFN(1, "setting run=%d", run, 0, 0, 0); 1783 cmd = UREAD2(sc, UHCI_CMD); 1784 if (run) 1785 cmd |= UHCI_CMD_RS; 1786 else 1787 cmd &= ~UHCI_CMD_RS; 1788 UHCICMD(sc, cmd); 1789 for(n = 0; n < 10; n++) { 1790 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1791 /* return when we've entered the state we want */ 1792 if (run == running) { 1793 if (!locked) 1794 mutex_spin_exit(&sc->sc_intr_lock); 1795 DPRINTFN(1, "done cmd=0x%x sts=0x%x", 1796 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 0, 0); 1797 return USBD_NORMAL_COMPLETION; 1798 } 1799 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock); 1800 } 1801 if (!locked) 1802 mutex_spin_exit(&sc->sc_intr_lock); 1803 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1804 run ? "start" : "stop"); 1805 return USBD_IOERROR; 1806 } 1807 1808 /* 1809 * Memory management routines. 1810 * uhci_alloc_std allocates TDs 1811 * uhci_alloc_sqh allocates QHs 1812 * These two routines do their own free list management, 1813 * partly for speed, partly because allocating DMAable memory 1814 * has page size granularaity so much memory would be wasted if 1815 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1816 */ 1817 1818 uhci_soft_td_t * 1819 uhci_alloc_std(uhci_softc_t *sc) 1820 { 1821 uhci_soft_td_t *std; 1822 usbd_status err; 1823 int i, offs; 1824 usb_dma_t dma; 1825 1826 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1827 1828 if (sc->sc_freetds == NULL) { 1829 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 1830 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1831 UHCI_TD_ALIGN, &dma); 1832 if (err) 1833 return 0; 1834 for (i = 0; i < UHCI_STD_CHUNK; i++) { 1835 offs = i * UHCI_STD_SIZE; 1836 std = KERNADDR(&dma, offs); 1837 std->physaddr = DMAADDR(&dma, offs); 1838 std->dma = dma; 1839 std->offs = offs; 1840 std->link.std = sc->sc_freetds; 1841 sc->sc_freetds = std; 1842 } 1843 } 1844 std = sc->sc_freetds; 1845 sc->sc_freetds = std->link.std; 1846 memset(&std->td, 0, sizeof(uhci_td_t)); 1847 return std; 1848 } 1849 1850 void 1851 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1852 { 1853 #ifdef DIAGNOSTIC 1854 #define TD_IS_FREE 0x12345678 1855 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1856 printf("uhci_free_std: freeing free TD %p\n", std); 1857 return; 1858 } 1859 std->td.td_token = htole32(TD_IS_FREE); 1860 #endif 1861 std->link.std = sc->sc_freetds; 1862 sc->sc_freetds = std; 1863 } 1864 1865 uhci_soft_qh_t * 1866 uhci_alloc_sqh(uhci_softc_t *sc) 1867 { 1868 uhci_soft_qh_t *sqh; 1869 usbd_status err; 1870 int i, offs; 1871 usb_dma_t dma; 1872 1873 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1874 1875 if (sc->sc_freeqhs == NULL) { 1876 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 1877 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1878 UHCI_QH_ALIGN, &dma); 1879 if (err) 1880 return 0; 1881 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1882 offs = i * UHCI_SQH_SIZE; 1883 sqh = KERNADDR(&dma, offs); 1884 sqh->physaddr = DMAADDR(&dma, offs); 1885 sqh->dma = dma; 1886 sqh->offs = offs; 1887 sqh->hlink = sc->sc_freeqhs; 1888 sc->sc_freeqhs = sqh; 1889 } 1890 } 1891 sqh = sc->sc_freeqhs; 1892 sc->sc_freeqhs = sqh->hlink; 1893 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1894 return sqh; 1895 } 1896 1897 void 1898 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1899 { 1900 sqh->hlink = sc->sc_freeqhs; 1901 sc->sc_freeqhs = sqh; 1902 } 1903 1904 void 1905 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1906 uhci_soft_td_t *stdend) 1907 { 1908 uhci_soft_td_t *p; 1909 uint32_t td_link; 1910 1911 /* 1912 * to avoid race condition with the controller which may be looking 1913 * at this chain, we need to first invalidate all links, and 1914 * then wait for the controller to move to another queue 1915 */ 1916 for (p = std; p != stdend; p = p->link.std) { 1917 usb_syncmem(&p->dma, 1918 p->offs + offsetof(uhci_td_t, td_link), 1919 sizeof(p->td.td_link), 1920 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1921 td_link = le32toh(p->td.td_link); 1922 usb_syncmem(&p->dma, 1923 p->offs + offsetof(uhci_td_t, td_link), 1924 sizeof(p->td.td_link), 1925 BUS_DMASYNC_PREREAD); 1926 if ((td_link & UHCI_PTR_T) == 0) { 1927 p->td.td_link = htole32(UHCI_PTR_T); 1928 usb_syncmem(&p->dma, 1929 p->offs + offsetof(uhci_td_t, td_link), 1930 sizeof(p->td.td_link), 1931 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1932 } 1933 } 1934 delay(UHCI_QH_REMOVE_DELAY); 1935 1936 for (; std != stdend; std = p) { 1937 p = std->link.std; 1938 uhci_free_std(sc, std); 1939 } 1940 } 1941 1942 usbd_status 1943 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1944 int rd, uint16_t flags, usb_dma_t *dma, 1945 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1946 { 1947 uhci_soft_td_t *p, *lastp; 1948 uhci_physaddr_t lastlink; 1949 int i, ntd, l, tog, maxp; 1950 uint32_t status; 1951 int addr = upipe->pipe.up_dev->ud_addr; 1952 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 1953 1954 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1955 1956 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 1957 addr, UE_GET_ADDR(endpt), len, upipe->pipe.up_dev->ud_speed); 1958 1959 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1960 1961 maxp = UGETW(upipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize); 1962 if (maxp == 0) { 1963 printf("uhci_alloc_std_chain: maxp=0\n"); 1964 return USBD_INVAL; 1965 } 1966 ntd = (len + maxp - 1) / maxp; 1967 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1968 ntd++; 1969 DPRINTFN(10, "maxp=%d ntd=%d", 1970 maxp, ntd, 0, 0); 1971 1972 if (ntd == 0) { 1973 *sp = *ep = 0; 1974 DPRINTFN(1, "ntd=0", 0, 0, 0, 0); 1975 return USBD_NORMAL_COMPLETION; 1976 } 1977 tog = upipe->nexttoggle; 1978 if (ntd % 2 == 0) 1979 tog ^= 1; 1980 upipe->nexttoggle = tog ^ 1; 1981 lastp = NULL; 1982 lastlink = UHCI_PTR_T; 1983 ntd--; 1984 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1985 if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW) 1986 status |= UHCI_TD_LS; 1987 if (flags & USBD_SHORT_XFER_OK) 1988 status |= UHCI_TD_SPD; 1989 usb_syncmem(dma, 0, len, 1990 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1991 for (i = ntd; i >= 0; i--) { 1992 p = uhci_alloc_std(sc); 1993 if (p == NULL) { 1994 KASSERT(lastp != NULL); 1995 uhci_free_std_chain(sc, lastp, NULL); 1996 return USBD_NOMEM; 1997 } 1998 p->link.std = lastp; 1999 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 2000 lastp = p; 2001 lastlink = p->physaddr; 2002 p->td.td_status = htole32(status); 2003 if (i == ntd) { 2004 /* last TD */ 2005 l = len % maxp; 2006 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 2007 l = maxp; 2008 *ep = p; 2009 } else 2010 l = maxp; 2011 p->td.td_token = 2012 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 2013 UHCI_TD_OUT(l, endpt, addr, tog)); 2014 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 2015 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 2016 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2017 tog ^= 1; 2018 } 2019 *sp = lastp; 2020 DPRINTFN(10, "nexttog=%d", upipe->nexttoggle, 2021 0, 0, 0); 2022 2023 return USBD_NORMAL_COMPLETION; 2024 } 2025 2026 void 2027 uhci_device_clear_toggle(struct usbd_pipe *pipe) 2028 { 2029 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2030 upipe->nexttoggle = 0; 2031 } 2032 2033 void 2034 uhci_noop(struct usbd_pipe *pipe) 2035 { 2036 } 2037 2038 usbd_status 2039 uhci_device_bulk_transfer(struct usbd_xfer *xfer) 2040 { 2041 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2042 usbd_status err; 2043 2044 /* Insert last in queue. */ 2045 mutex_enter(&sc->sc_lock); 2046 err = usb_insert_transfer(xfer); 2047 mutex_exit(&sc->sc_lock); 2048 if (err) 2049 return err; 2050 2051 /* 2052 * Pipe isn't running (otherwise err would be USBD_INPROG), 2053 * so start it first. 2054 */ 2055 return uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2056 } 2057 2058 usbd_status 2059 uhci_device_bulk_start(struct usbd_xfer *xfer) 2060 { 2061 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2062 struct usbd_device *dev = upipe->pipe.up_dev; 2063 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2064 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2065 uhci_soft_td_t *data, *dataend; 2066 uhci_soft_qh_t *sqh; 2067 usbd_status err; 2068 int len, isread, endpt; 2069 2070 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2071 DPRINTFN(3, "xfer=%p len=%d flags=%d ii=%p", 2072 xfer, xfer->ux_length, xfer->ux_flags, ii); 2073 2074 if (sc->sc_dying) 2075 return USBD_IOERROR; 2076 2077 #ifdef DIAGNOSTIC 2078 if (xfer->ux_rqflags & URQ_REQUEST) 2079 panic("uhci_device_bulk_transfer: a request"); 2080 #endif 2081 2082 mutex_enter(&sc->sc_lock); 2083 2084 len = xfer->ux_length; 2085 endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2086 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2087 sqh = upipe->u.bulk.sqh; 2088 2089 upipe->u.bulk.isread = isread; 2090 upipe->u.bulk.length = len; 2091 2092 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->ux_flags, 2093 &xfer->ux_dmabuf, &data, &dataend); 2094 if (err) { 2095 mutex_exit(&sc->sc_lock); 2096 return err; 2097 } 2098 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2099 usb_syncmem(&dataend->dma, 2100 dataend->offs + offsetof(uhci_td_t, td_status), 2101 sizeof(dataend->td.td_status), 2102 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2103 2104 2105 #ifdef UHCI_DEBUG 2106 if (uhcidebug > 8) { 2107 DPRINTFN(8, "data(1)", 0, 0, 0, 0); 2108 uhci_dump_tds(data); 2109 } 2110 #endif 2111 2112 /* Set up interrupt info. */ 2113 ii->xfer = xfer; 2114 ii->stdstart = data; 2115 ii->stdend = dataend; 2116 #ifdef DIAGNOSTIC 2117 if (!ii->isdone) { 2118 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2119 } 2120 ii->isdone = 0; 2121 #endif 2122 2123 sqh->elink = data; 2124 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2125 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2126 2127 uhci_add_bulk(sc, sqh); 2128 uhci_add_intr_info(sc, ii); 2129 2130 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2131 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2132 uhci_timeout, ii); 2133 } 2134 xfer->ux_status = USBD_IN_PROGRESS; 2135 2136 #ifdef UHCI_DEBUG 2137 if (uhcidebug > 10) { 2138 DPRINTFN(10, "data(2)", 0, 0, 0, 0); 2139 uhci_dump_tds(data); 2140 } 2141 #endif 2142 2143 if (sc->sc_bus.ub_usepolling) 2144 uhci_waitintr(sc, xfer); 2145 2146 mutex_exit(&sc->sc_lock); 2147 return USBD_IN_PROGRESS; 2148 } 2149 2150 /* Abort a device bulk request. */ 2151 void 2152 uhci_device_bulk_abort(struct usbd_xfer *xfer) 2153 { 2154 #ifdef DIAGNOSTIC 2155 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2156 #endif 2157 2158 KASSERT(mutex_owned(&sc->sc_lock)); 2159 2160 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2161 2162 uhci_abort_xfer(xfer, USBD_CANCELLED); 2163 } 2164 2165 /* 2166 * Abort a device request. 2167 * If this routine is called at splusb() it guarantees that the request 2168 * will be removed from the hardware scheduling and that the callback 2169 * for it will be called with USBD_CANCELLED status. 2170 * It's impossible to guarantee that the requested transfer will not 2171 * have happened since the hardware runs concurrently. 2172 * If the transaction has already happened we rely on the ordinary 2173 * interrupt processing to process it. 2174 * XXX This is most probably wrong. 2175 * XXXMRG this doesn't make sense anymore. 2176 */ 2177 void 2178 uhci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2179 { 2180 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2181 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2182 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 2183 uhci_soft_td_t *std; 2184 int wake; 2185 2186 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2187 DPRINTFN(1,"xfer=%p, status=%d", xfer, status, 0, 0); 2188 2189 KASSERT(mutex_owned(&sc->sc_lock)); 2190 ASSERT_SLEEPABLE(); 2191 2192 if (sc->sc_dying) { 2193 /* If we're dying, just do the software part. */ 2194 xfer->ux_status = status; /* make software ignore it */ 2195 callout_stop(&xfer->ux_callout); 2196 usb_transfer_complete(xfer); 2197 return; 2198 } 2199 2200 /* 2201 * If an abort is already in progress then just wait for it to 2202 * complete and return. 2203 */ 2204 if (xfer->ux_hcflags & UXFER_ABORTING) { 2205 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2206 #ifdef DIAGNOSTIC 2207 if (status == USBD_TIMEOUT) 2208 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2209 #endif 2210 /* Override the status which might be USBD_TIMEOUT. */ 2211 xfer->ux_status = status; 2212 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2213 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2214 while (xfer->ux_hcflags & UXFER_ABORTING) 2215 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2216 goto done; 2217 } 2218 xfer->ux_hcflags |= UXFER_ABORTING; 2219 2220 /* 2221 * Step 1: Make interrupt routine and hardware ignore xfer. 2222 */ 2223 xfer->ux_status = status; /* make software ignore it */ 2224 callout_stop(&xfer->ux_callout); 2225 DPRINTFN(1, "stop ii=%p", ii, 0, 0, 0); 2226 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2227 usb_syncmem(&std->dma, 2228 std->offs + offsetof(uhci_td_t, td_status), 2229 sizeof(std->td.td_status), 2230 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2231 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2232 usb_syncmem(&std->dma, 2233 std->offs + offsetof(uhci_td_t, td_status), 2234 sizeof(std->td.td_status), 2235 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2236 } 2237 2238 /* 2239 * Step 2: Wait until we know hardware has finished any possible 2240 * use of the xfer. Also make sure the soft interrupt routine 2241 * has run. 2242 */ 2243 /* Hardware finishes in 1ms */ 2244 usb_delay_ms_locked(upipe->pipe.up_dev->ud_bus, 2, &sc->sc_lock); 2245 sc->sc_softwake = 1; 2246 usb_schedsoftintr(&sc->sc_bus); 2247 DPRINTFN(1, "cv_wait", 0, 0, 0, 0); 2248 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2249 2250 /* 2251 * Step 3: Execute callback. 2252 */ 2253 DPRINTFN(1, "callback", 0, 0, 0, 0); 2254 #ifdef DIAGNOSTIC 2255 ii->isdone = 1; 2256 #endif 2257 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2258 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2259 usb_transfer_complete(xfer); 2260 if (wake) 2261 cv_broadcast(&xfer->ux_hccv); 2262 done: 2263 KASSERT(mutex_owned(&sc->sc_lock)); 2264 } 2265 2266 /* Close a device bulk pipe. */ 2267 void 2268 uhci_device_bulk_close(struct usbd_pipe *pipe) 2269 { 2270 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2271 struct usbd_device *dev = upipe->pipe.up_dev; 2272 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2273 2274 KASSERT(mutex_owned(&sc->sc_lock)); 2275 2276 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2277 2278 pipe->up_endpoint->ue_toggle = upipe->nexttoggle; 2279 } 2280 2281 usbd_status 2282 uhci_device_ctrl_transfer(struct usbd_xfer *xfer) 2283 { 2284 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2285 usbd_status err; 2286 2287 /* Insert last in queue. */ 2288 mutex_enter(&sc->sc_lock); 2289 err = usb_insert_transfer(xfer); 2290 mutex_exit(&sc->sc_lock); 2291 if (err) 2292 return err; 2293 2294 /* 2295 * Pipe isn't running (otherwise err would be USBD_INPROG), 2296 * so start it first. 2297 */ 2298 return uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2299 } 2300 2301 usbd_status 2302 uhci_device_ctrl_start(struct usbd_xfer *xfer) 2303 { 2304 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2305 usbd_status err; 2306 2307 if (sc->sc_dying) 2308 return USBD_IOERROR; 2309 2310 #ifdef DIAGNOSTIC 2311 if (!(xfer->ux_rqflags & URQ_REQUEST)) 2312 panic("uhci_device_ctrl_transfer: not a request"); 2313 #endif 2314 2315 mutex_enter(&sc->sc_lock); 2316 err = uhci_device_request(xfer); 2317 mutex_exit(&sc->sc_lock); 2318 if (err) 2319 return err; 2320 2321 if (sc->sc_bus.ub_usepolling) 2322 uhci_waitintr(sc, xfer); 2323 return USBD_IN_PROGRESS; 2324 } 2325 2326 usbd_status 2327 uhci_device_intr_transfer(struct usbd_xfer *xfer) 2328 { 2329 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2330 usbd_status err; 2331 2332 /* Insert last in queue. */ 2333 mutex_enter(&sc->sc_lock); 2334 err = usb_insert_transfer(xfer); 2335 mutex_exit(&sc->sc_lock); 2336 if (err) 2337 return err; 2338 2339 /* 2340 * Pipe isn't running (otherwise err would be USBD_INPROG), 2341 * so start it first. 2342 */ 2343 return uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2344 } 2345 2346 usbd_status 2347 uhci_device_intr_start(struct usbd_xfer *xfer) 2348 { 2349 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2350 struct usbd_device *dev = upipe->pipe.up_dev; 2351 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2352 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2353 uhci_soft_td_t *data, *dataend; 2354 uhci_soft_qh_t *sqh; 2355 usbd_status err; 2356 int isread, endpt; 2357 int i; 2358 2359 if (sc->sc_dying) 2360 return USBD_IOERROR; 2361 2362 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2363 2364 DPRINTFN(3, "xfer=%p len=%d flags=%d", 2365 xfer, xfer->ux_length, xfer->ux_flags, 0); 2366 2367 #ifdef DIAGNOSTIC 2368 if (xfer->ux_rqflags & URQ_REQUEST) 2369 panic("uhci_device_intr_transfer: a request"); 2370 #endif 2371 2372 mutex_enter(&sc->sc_lock); 2373 2374 endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2375 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2376 2377 upipe->u.intr.isread = isread; 2378 2379 err = uhci_alloc_std_chain(upipe, sc, xfer->ux_length, isread, 2380 xfer->ux_flags, &xfer->ux_dmabuf, &data, 2381 &dataend); 2382 if (err) { 2383 mutex_exit(&sc->sc_lock); 2384 return err; 2385 } 2386 2387 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2388 usb_syncmem(&dataend->dma, 2389 dataend->offs + offsetof(uhci_td_t, td_status), 2390 sizeof(dataend->td.td_status), 2391 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2392 2393 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 2394 #ifdef UHCI_DEBUG 2395 if (uhcidebug > 10) { 2396 uhci_dump_tds(data); 2397 uhci_dump_qh(upipe->u.intr.qhs[0]); 2398 } 2399 #endif 2400 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 2401 2402 /* Set up interrupt info. */ 2403 ii->xfer = xfer; 2404 ii->stdstart = data; 2405 ii->stdend = dataend; 2406 #ifdef DIAGNOSTIC 2407 if (!ii->isdone) { 2408 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2409 } 2410 ii->isdone = 0; 2411 #endif 2412 2413 DPRINTFN(10, "qhs[0]=%p", upipe->u.intr.qhs[0], 0, 0, 0); 2414 for (i = 0; i < upipe->u.intr.npoll; i++) { 2415 sqh = upipe->u.intr.qhs[i]; 2416 sqh->elink = data; 2417 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2418 usb_syncmem(&sqh->dma, 2419 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2420 sizeof(sqh->qh.qh_elink), 2421 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2422 } 2423 uhci_add_intr_info(sc, ii); 2424 xfer->ux_status = USBD_IN_PROGRESS; 2425 mutex_exit(&sc->sc_lock); 2426 2427 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 2428 #ifdef UHCI_DEBUG 2429 if (uhcidebug > 10) { 2430 uhci_dump_tds(data); 2431 uhci_dump_qh(upipe->u.intr.qhs[0]); 2432 } 2433 #endif 2434 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 2435 2436 return USBD_IN_PROGRESS; 2437 } 2438 2439 /* Abort a device control request. */ 2440 void 2441 uhci_device_ctrl_abort(struct usbd_xfer *xfer) 2442 { 2443 #ifdef DIAGNOSTIC 2444 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2445 #endif 2446 2447 KASSERT(mutex_owned(&sc->sc_lock)); 2448 2449 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2450 uhci_abort_xfer(xfer, USBD_CANCELLED); 2451 } 2452 2453 /* Close a device control pipe. */ 2454 void 2455 uhci_device_ctrl_close(struct usbd_pipe *pipe) 2456 { 2457 } 2458 2459 /* Abort a device interrupt request. */ 2460 void 2461 uhci_device_intr_abort(struct usbd_xfer *xfer) 2462 { 2463 #ifdef DIAGNOSTIC 2464 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2465 #endif 2466 2467 KASSERT(mutex_owned(&sc->sc_lock)); 2468 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2469 2470 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2471 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 2472 2473 uhci_abort_xfer(xfer, USBD_CANCELLED); 2474 } 2475 2476 /* Close a device interrupt pipe. */ 2477 void 2478 uhci_device_intr_close(struct usbd_pipe *pipe) 2479 { 2480 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2481 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 2482 int i, npoll; 2483 2484 KASSERT(mutex_owned(&sc->sc_lock)); 2485 2486 /* Unlink descriptors from controller data structures. */ 2487 npoll = upipe->u.intr.npoll; 2488 for (i = 0; i < npoll; i++) 2489 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2490 2491 /* 2492 * We now have to wait for any activity on the physical 2493 * descriptors to stop. 2494 */ 2495 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2496 2497 for(i = 0; i < npoll; i++) 2498 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2499 kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *)); 2500 2501 /* XXX free other resources */ 2502 } 2503 2504 usbd_status 2505 uhci_device_request(struct usbd_xfer *xfer) 2506 { 2507 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2508 usb_device_request_t *req = &xfer->ux_request; 2509 struct usbd_device *dev = upipe->pipe.up_dev; 2510 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2511 int addr = dev->ud_addr; 2512 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2513 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2514 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2515 uhci_soft_qh_t *sqh; 2516 int len; 2517 uint32_t ls; 2518 usbd_status err; 2519 int isread; 2520 2521 KASSERT(mutex_owned(&sc->sc_lock)); 2522 2523 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2524 DPRINTFN(3, "type=0x%02x, request=0x%02x, " 2525 "wValue=0x%04x, wIndex=0x%04x", 2526 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2527 UGETW(req->wIndex)); 2528 DPRINTFN(3, "len=%d, addr=%d, endpt=%d", 2529 UGETW(req->wLength), dev->ud_addr, endpt, 0); 2530 2531 ls = dev->ud_speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2532 isread = req->bmRequestType & UT_READ; 2533 len = UGETW(req->wLength); 2534 2535 setup = upipe->u.ctl.setup; 2536 stat = upipe->u.ctl.stat; 2537 sqh = upipe->u.ctl.sqh; 2538 2539 /* Set up data transaction */ 2540 if (len != 0) { 2541 upipe->nexttoggle = 1; 2542 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->ux_flags, 2543 &xfer->ux_dmabuf, &data, &dataend); 2544 if (err) 2545 return err; 2546 next = data; 2547 dataend->link.std = stat; 2548 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_TD); 2549 usb_syncmem(&dataend->dma, 2550 dataend->offs + offsetof(uhci_td_t, td_link), 2551 sizeof(dataend->td.td_link), 2552 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2553 } else { 2554 next = stat; 2555 } 2556 upipe->u.ctl.length = len; 2557 2558 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2559 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2560 2561 setup->link.std = next; 2562 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_TD); 2563 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2564 UHCI_TD_ACTIVE); 2565 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2566 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2567 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2568 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2569 2570 stat->link.std = NULL; 2571 stat->td.td_link = htole32(UHCI_PTR_T); 2572 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2573 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2574 stat->td.td_token = 2575 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2576 UHCI_TD_IN (0, endpt, addr, 1)); 2577 stat->td.td_buffer = htole32(0); 2578 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2579 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2580 2581 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 2582 #ifdef UHCI_DEBUG 2583 if (uhcidebug > 10) { 2584 DPRINTFN(10, "before transfer", 0, 0, 0, 0); 2585 uhci_dump_tds(setup); 2586 } 2587 #endif 2588 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 2589 2590 /* Set up interrupt info. */ 2591 ii->xfer = xfer; 2592 ii->stdstart = setup; 2593 ii->stdend = stat; 2594 #ifdef DIAGNOSTIC 2595 if (!ii->isdone) { 2596 printf("uhci_device_request: not done, ii=%p\n", ii); 2597 } 2598 ii->isdone = 0; 2599 #endif 2600 2601 sqh->elink = setup; 2602 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2603 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2604 2605 if (dev->ud_speed == USB_SPEED_LOW) 2606 uhci_add_ls_ctrl(sc, sqh); 2607 else 2608 uhci_add_hs_ctrl(sc, sqh); 2609 uhci_add_intr_info(sc, ii); 2610 DPRINTFN(12, "--- dump start ---", 0, 0, 0, 0); 2611 #ifdef UHCI_DEBUG 2612 if (uhcidebug > 12) { 2613 uhci_soft_td_t *std; 2614 uhci_soft_qh_t *xqh; 2615 uhci_soft_qh_t *sxqh; 2616 int maxqh = 0; 2617 uhci_physaddr_t link; 2618 DPRINTFN(12, "follow from [0]", 0, 0, 0, 0); 2619 for (std = sc->sc_vframes[0].htd, link = 0; 2620 (link & UHCI_PTR_QH) == 0; 2621 std = std->link.std) { 2622 link = le32toh(std->td.td_link); 2623 uhci_dump_td(std); 2624 } 2625 sxqh = (uhci_soft_qh_t *)std; 2626 uhci_dump_qh(sxqh); 2627 for (xqh = sxqh; 2628 xqh != NULL; 2629 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2630 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2631 uhci_dump_qh(xqh); 2632 } 2633 DPRINTFN(12, "Enqueued QH:", 0, 0, 0, 0); 2634 uhci_dump_qh(sqh); 2635 uhci_dump_tds(sqh->elink); 2636 } 2637 #endif 2638 DPRINTFN(12, "--- dump end ---", 0, 0, 0, 0); 2639 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2640 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2641 uhci_timeout, ii); 2642 } 2643 xfer->ux_status = USBD_IN_PROGRESS; 2644 2645 return USBD_NORMAL_COMPLETION; 2646 } 2647 2648 usbd_status 2649 uhci_device_isoc_transfer(struct usbd_xfer *xfer) 2650 { 2651 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2652 usbd_status err; 2653 2654 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2655 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 2656 2657 /* Put it on our queue, */ 2658 mutex_enter(&sc->sc_lock); 2659 err = usb_insert_transfer(xfer); 2660 mutex_exit(&sc->sc_lock); 2661 2662 /* bail out on error, */ 2663 if (err && err != USBD_IN_PROGRESS) 2664 return err; 2665 2666 /* XXX should check inuse here */ 2667 2668 /* insert into schedule, */ 2669 uhci_device_isoc_enter(xfer); 2670 2671 /* and start if the pipe wasn't running */ 2672 if (!err) 2673 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2674 2675 return err; 2676 } 2677 2678 void 2679 uhci_device_isoc_enter(struct usbd_xfer *xfer) 2680 { 2681 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2682 struct usbd_device *dev = upipe->pipe.up_dev; 2683 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2684 struct iso *iso = &upipe->u.iso; 2685 uhci_soft_td_t *std; 2686 uint32_t buf, len, status, offs; 2687 int i, next, nframes; 2688 int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 2689 2690 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2691 DPRINTFN(5, "used=%d next=%d xfer=%p nframes=%d", 2692 iso->inuse, iso->next, xfer, xfer->ux_nframes); 2693 2694 if (sc->sc_dying) 2695 return; 2696 2697 if (xfer->ux_status == USBD_IN_PROGRESS) { 2698 /* This request has already been entered into the frame list */ 2699 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2700 /* XXX */ 2701 } 2702 2703 #ifdef DIAGNOSTIC 2704 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2705 printf("uhci_device_isoc_enter: overflow!\n"); 2706 #endif 2707 2708 next = iso->next; 2709 if (next == -1) { 2710 /* Not in use yet, schedule it a few frames ahead. */ 2711 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2712 DPRINTFN(2, "start next=%d", next, 0, 0, 0); 2713 } 2714 2715 xfer->ux_status = USBD_IN_PROGRESS; 2716 UXFER(xfer)->curframe = next; 2717 2718 buf = DMAADDR(&xfer->ux_dmabuf, 0); 2719 offs = 0; 2720 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2721 UHCI_TD_ACTIVE | 2722 UHCI_TD_IOS); 2723 nframes = xfer->ux_nframes; 2724 mutex_enter(&sc->sc_lock); 2725 for (i = 0; i < nframes; i++) { 2726 std = iso->stds[next]; 2727 if (++next >= UHCI_VFRAMELIST_COUNT) 2728 next = 0; 2729 len = xfer->ux_frlengths[i]; 2730 std->td.td_buffer = htole32(buf); 2731 usb_syncmem(&xfer->ux_dmabuf, offs, len, 2732 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2733 if (i == nframes - 1) 2734 status |= UHCI_TD_IOC; 2735 std->td.td_status = htole32(status); 2736 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2737 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2738 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2739 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2740 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 2741 #ifdef UHCI_DEBUG 2742 if (uhcidebug > 5) { 2743 DPRINTFN(1, "TD %d", i, 0, 0, 0); 2744 uhci_dump_td(std); 2745 } 2746 #endif 2747 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 2748 buf += len; 2749 offs += len; 2750 } 2751 iso->next = next; 2752 iso->inuse += xfer->ux_nframes; 2753 2754 mutex_exit(&sc->sc_lock); 2755 } 2756 2757 usbd_status 2758 uhci_device_isoc_start(struct usbd_xfer *xfer) 2759 { 2760 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2761 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 2762 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2763 uhci_soft_td_t *end; 2764 int i; 2765 2766 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2767 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 2768 2769 mutex_enter(&sc->sc_lock); 2770 2771 if (sc->sc_dying) { 2772 mutex_exit(&sc->sc_lock); 2773 return USBD_IOERROR; 2774 } 2775 2776 #ifdef DIAGNOSTIC 2777 if (xfer->ux_status != USBD_IN_PROGRESS) 2778 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2779 #endif 2780 2781 /* Find the last TD */ 2782 i = UXFER(xfer)->curframe + xfer->ux_nframes; 2783 if (i >= UHCI_VFRAMELIST_COUNT) 2784 i -= UHCI_VFRAMELIST_COUNT; 2785 end = upipe->u.iso.stds[i]; 2786 2787 #ifdef DIAGNOSTIC 2788 if (end == NULL) { 2789 printf("uhci_device_isoc_start: end == NULL\n"); 2790 return USBD_INVAL; 2791 } 2792 #endif 2793 2794 /* Set up interrupt info. */ 2795 ii->xfer = xfer; 2796 ii->stdstart = end; 2797 ii->stdend = end; 2798 #ifdef DIAGNOSTIC 2799 if (!ii->isdone) 2800 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2801 ii->isdone = 0; 2802 #endif 2803 uhci_add_intr_info(sc, ii); 2804 2805 mutex_exit(&sc->sc_lock); 2806 2807 return USBD_IN_PROGRESS; 2808 } 2809 2810 void 2811 uhci_device_isoc_abort(struct usbd_xfer *xfer) 2812 { 2813 #ifdef DIAGNOSTIC 2814 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2815 #endif 2816 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2817 uhci_soft_td_t **stds = upipe->u.iso.stds; 2818 uhci_soft_td_t *std; 2819 int i, n, nframes, maxlen, len; 2820 2821 KASSERT(mutex_owned(&sc->sc_lock)); 2822 2823 /* Transfer is already done. */ 2824 if (xfer->ux_status != USBD_NOT_STARTED && 2825 xfer->ux_status != USBD_IN_PROGRESS) { 2826 return; 2827 } 2828 2829 /* Give xfer the requested abort code. */ 2830 xfer->ux_status = USBD_CANCELLED; 2831 2832 /* make hardware ignore it, */ 2833 nframes = xfer->ux_nframes; 2834 n = UXFER(xfer)->curframe; 2835 maxlen = 0; 2836 for (i = 0; i < nframes; i++) { 2837 std = stds[n]; 2838 usb_syncmem(&std->dma, 2839 std->offs + offsetof(uhci_td_t, td_status), 2840 sizeof(std->td.td_status), 2841 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2842 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2843 usb_syncmem(&std->dma, 2844 std->offs + offsetof(uhci_td_t, td_status), 2845 sizeof(std->td.td_status), 2846 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2847 usb_syncmem(&std->dma, 2848 std->offs + offsetof(uhci_td_t, td_token), 2849 sizeof(std->td.td_token), 2850 BUS_DMASYNC_POSTWRITE); 2851 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2852 if (len > maxlen) 2853 maxlen = len; 2854 if (++n >= UHCI_VFRAMELIST_COUNT) 2855 n = 0; 2856 } 2857 2858 /* and wait until we are sure the hardware has finished. */ 2859 delay(maxlen); 2860 2861 #ifdef DIAGNOSTIC 2862 UXFER(xfer)->iinfo.isdone = 1; 2863 #endif 2864 /* Run callback and remove from interrupt list. */ 2865 usb_transfer_complete(xfer); 2866 2867 KASSERT(mutex_owned(&sc->sc_lock)); 2868 } 2869 2870 void 2871 uhci_device_isoc_close(struct usbd_pipe *pipe) 2872 { 2873 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2874 struct usbd_device *dev = upipe->pipe.up_dev; 2875 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2876 uhci_soft_td_t *std, *vstd; 2877 struct iso *iso; 2878 int i; 2879 2880 KASSERT(mutex_owned(&sc->sc_lock)); 2881 2882 /* 2883 * Make sure all TDs are marked as inactive. 2884 * Wait for completion. 2885 * Unschedule. 2886 * Deallocate. 2887 */ 2888 iso = &upipe->u.iso; 2889 2890 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2891 std = iso->stds[i]; 2892 usb_syncmem(&std->dma, 2893 std->offs + offsetof(uhci_td_t, td_status), 2894 sizeof(std->td.td_status), 2895 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2896 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2897 usb_syncmem(&std->dma, 2898 std->offs + offsetof(uhci_td_t, td_status), 2899 sizeof(std->td.td_status), 2900 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2901 } 2902 /* wait for completion */ 2903 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2904 2905 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2906 std = iso->stds[i]; 2907 for (vstd = sc->sc_vframes[i].htd; 2908 vstd != NULL && vstd->link.std != std; 2909 vstd = vstd->link.std) 2910 ; 2911 if (vstd == NULL) { 2912 /*panic*/ 2913 printf("uhci_device_isoc_close: %p not found\n", std); 2914 mutex_exit(&sc->sc_lock); 2915 return; 2916 } 2917 vstd->link = std->link; 2918 usb_syncmem(&std->dma, 2919 std->offs + offsetof(uhci_td_t, td_link), 2920 sizeof(std->td.td_link), 2921 BUS_DMASYNC_POSTWRITE); 2922 vstd->td.td_link = std->td.td_link; 2923 usb_syncmem(&vstd->dma, 2924 vstd->offs + offsetof(uhci_td_t, td_link), 2925 sizeof(vstd->td.td_link), 2926 BUS_DMASYNC_PREWRITE); 2927 uhci_free_std(sc, std); 2928 } 2929 2930 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2931 } 2932 2933 usbd_status 2934 uhci_setup_isoc(struct usbd_pipe *pipe) 2935 { 2936 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2937 struct usbd_device *dev = upipe->pipe.up_dev; 2938 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2939 int addr = upipe->pipe.up_dev->ud_addr; 2940 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2941 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2942 uhci_soft_td_t *std, *vstd; 2943 uint32_t token; 2944 struct iso *iso; 2945 int i; 2946 2947 iso = &upipe->u.iso; 2948 iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT * 2949 sizeof (uhci_soft_td_t *), 2950 KM_SLEEP); 2951 if (iso->stds == NULL) 2952 return USBD_NOMEM; 2953 2954 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2955 UHCI_TD_OUT(0, endpt, addr, 0); 2956 2957 mutex_enter(&sc->sc_lock); 2958 2959 /* Allocate the TDs and mark as inactive; */ 2960 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2961 std = uhci_alloc_std(sc); 2962 if (std == 0) 2963 goto bad; 2964 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2965 std->td.td_token = htole32(token); 2966 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2967 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2968 iso->stds[i] = std; 2969 } 2970 2971 /* Insert TDs into schedule. */ 2972 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2973 std = iso->stds[i]; 2974 vstd = sc->sc_vframes[i].htd; 2975 usb_syncmem(&vstd->dma, 2976 vstd->offs + offsetof(uhci_td_t, td_link), 2977 sizeof(vstd->td.td_link), 2978 BUS_DMASYNC_POSTWRITE); 2979 std->link = vstd->link; 2980 std->td.td_link = vstd->td.td_link; 2981 usb_syncmem(&std->dma, 2982 std->offs + offsetof(uhci_td_t, td_link), 2983 sizeof(std->td.td_link), 2984 BUS_DMASYNC_PREWRITE); 2985 vstd->link.std = std; 2986 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2987 usb_syncmem(&vstd->dma, 2988 vstd->offs + offsetof(uhci_td_t, td_link), 2989 sizeof(vstd->td.td_link), 2990 BUS_DMASYNC_PREWRITE); 2991 } 2992 mutex_exit(&sc->sc_lock); 2993 2994 iso->next = -1; 2995 iso->inuse = 0; 2996 2997 return USBD_NORMAL_COMPLETION; 2998 2999 bad: 3000 while (--i >= 0) 3001 uhci_free_std(sc, iso->stds[i]); 3002 mutex_exit(&sc->sc_lock); 3003 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 3004 return USBD_NOMEM; 3005 } 3006 3007 void 3008 uhci_device_isoc_done(struct usbd_xfer *xfer) 3009 { 3010 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3011 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3012 int i, offs; 3013 int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 3014 3015 3016 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3017 DPRINTFN(4, "length=%d, ux_state=0x%08x", 3018 xfer->ux_actlen, xfer->ux_state, 0, 0); 3019 3020 if (ii->xfer != xfer) 3021 /* Not on interrupt list, ignore it. */ 3022 return; 3023 3024 if (!uhci_active_intr_info(ii)) 3025 return; 3026 3027 #ifdef DIAGNOSTIC 3028 if (ii->stdend == NULL) { 3029 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 3030 #ifdef UHCI_DEBUG 3031 uhci_dump_ii(ii); 3032 #endif 3033 return; 3034 } 3035 #endif 3036 3037 /* Turn off the interrupt since it is active even if the TD is not. */ 3038 usb_syncmem(&ii->stdend->dma, 3039 ii->stdend->offs + offsetof(uhci_td_t, td_status), 3040 sizeof(ii->stdend->td.td_status), 3041 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3042 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 3043 usb_syncmem(&ii->stdend->dma, 3044 ii->stdend->offs + offsetof(uhci_td_t, td_status), 3045 sizeof(ii->stdend->td.td_status), 3046 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3047 3048 uhci_del_intr_info(ii); /* remove from active list */ 3049 3050 offs = 0; 3051 for (i = 0; i < xfer->ux_nframes; i++) { 3052 usb_syncmem(&xfer->ux_dmabuf, offs, xfer->ux_frlengths[i], 3053 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3054 offs += xfer->ux_frlengths[i]; 3055 } 3056 } 3057 3058 void 3059 uhci_device_intr_done(struct usbd_xfer *xfer) 3060 { 3061 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3062 uhci_softc_t *sc = ii->sc; 3063 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3064 uhci_soft_qh_t *sqh; 3065 int i, npoll, isread; 3066 3067 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3068 DPRINTFN(5, "length=%d", xfer->ux_actlen, 0, 0, 0); 3069 3070 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 3071 3072 npoll = upipe->u.intr.npoll; 3073 for(i = 0; i < npoll; i++) { 3074 sqh = upipe->u.intr.qhs[i]; 3075 sqh->elink = NULL; 3076 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3077 usb_syncmem(&sqh->dma, 3078 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3079 sizeof(sqh->qh.qh_elink), 3080 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3081 } 3082 uhci_free_std_chain(sc, ii->stdstart, NULL); 3083 3084 isread = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 3085 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 3086 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3087 3088 /* XXX Wasteful. */ 3089 if (xfer->ux_pipe->up_repeat) { 3090 uhci_soft_td_t *data, *dataend; 3091 3092 DPRINTFN(5, "re-queueing", 0, 0, 0, 0); 3093 3094 /* This alloc cannot fail since we freed the chain above. */ 3095 uhci_alloc_std_chain(upipe, sc, xfer->ux_length, 3096 upipe->u.intr.isread, xfer->ux_flags, 3097 &xfer->ux_dmabuf, &data, &dataend); 3098 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3099 usb_syncmem(&dataend->dma, 3100 dataend->offs + offsetof(uhci_td_t, td_status), 3101 sizeof(dataend->td.td_status), 3102 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3103 3104 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 3105 #ifdef UHCI_DEBUG 3106 if (uhcidebug > 10) { 3107 uhci_dump_tds(data); 3108 uhci_dump_qh(upipe->u.intr.qhs[0]); 3109 } 3110 #endif 3111 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 3112 3113 ii->stdstart = data; 3114 ii->stdend = dataend; 3115 #ifdef DIAGNOSTIC 3116 if (!ii->isdone) { 3117 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3118 } 3119 ii->isdone = 0; 3120 #endif 3121 for (i = 0; i < npoll; i++) { 3122 sqh = upipe->u.intr.qhs[i]; 3123 sqh->elink = data; 3124 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3125 usb_syncmem(&sqh->dma, 3126 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3127 sizeof(sqh->qh.qh_elink), 3128 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3129 } 3130 xfer->ux_status = USBD_IN_PROGRESS; 3131 /* The ii is already on the examined list, just leave it. */ 3132 } else { 3133 DPRINTFN(5, "removing", 0, 0, 0, 0); 3134 if (uhci_active_intr_info(ii)) 3135 uhci_del_intr_info(ii); 3136 } 3137 } 3138 3139 /* Deallocate request data structures */ 3140 void 3141 uhci_device_ctrl_done(struct usbd_xfer *xfer) 3142 { 3143 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3144 uhci_softc_t *sc = ii->sc; 3145 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3146 int len = UGETW(xfer->ux_request.wLength); 3147 int isread = (xfer->ux_request.bmRequestType & UT_READ); 3148 3149 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 3150 3151 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3152 #ifdef DIAGNOSTIC 3153 if (!(xfer->ux_rqflags & URQ_REQUEST)) 3154 panic("uhci_device_ctrl_done: not a request"); 3155 #endif 3156 3157 if (!uhci_active_intr_info(ii)) 3158 return; 3159 3160 uhci_del_intr_info(ii); /* remove from active list */ 3161 3162 if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW) 3163 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3164 else 3165 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3166 3167 if (upipe->u.ctl.length != 0) 3168 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3169 3170 if (len) { 3171 usb_syncmem(&xfer->ux_dmabuf, 0, len, 3172 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3173 } 3174 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3175 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3176 3177 DPRINTFN(1, "length=%d", xfer->ux_actlen, 0, 0, 0); 3178 } 3179 3180 /* Deallocate request data structures */ 3181 void 3182 uhci_device_bulk_done(struct usbd_xfer *xfer) 3183 { 3184 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3185 uhci_softc_t *sc = ii->sc; 3186 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3187 3188 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3189 DPRINTFN(5, "xfer=%p ii=%p sc=%p upipe=%p", xfer, ii, sc, 3190 upipe); 3191 3192 KASSERT(mutex_owned(&sc->sc_lock)); 3193 3194 if (!uhci_active_intr_info(ii)) 3195 return; 3196 3197 uhci_del_intr_info(ii); /* remove from active list */ 3198 3199 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3200 3201 uhci_free_std_chain(sc, ii->stdstart, NULL); 3202 3203 DPRINTFN(5, "length=%d", xfer->ux_actlen, 0, 0, 0); 3204 } 3205 3206 /* Add interrupt QH, called with vflock. */ 3207 void 3208 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3209 { 3210 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3211 uhci_soft_qh_t *eqh; 3212 3213 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3214 DPRINTFN(4, "n=%d sqh=%p", sqh->pos, sqh, 0, 0); 3215 3216 eqh = vf->eqh; 3217 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3218 sizeof(eqh->qh.qh_hlink), 3219 BUS_DMASYNC_POSTWRITE); 3220 sqh->hlink = eqh->hlink; 3221 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3222 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3223 sizeof(sqh->qh.qh_hlink), 3224 BUS_DMASYNC_PREWRITE); 3225 eqh->hlink = sqh; 3226 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3227 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3228 sizeof(eqh->qh.qh_hlink), 3229 BUS_DMASYNC_PREWRITE); 3230 vf->eqh = sqh; 3231 vf->bandwidth++; 3232 } 3233 3234 /* Remove interrupt QH. */ 3235 void 3236 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3237 { 3238 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3239 uhci_soft_qh_t *pqh; 3240 3241 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3242 DPRINTFN(4, "n=%d sqh=%p", sqh->pos, sqh, 0, 0); 3243 3244 /* See comment in uhci_remove_ctrl() */ 3245 3246 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3247 sizeof(sqh->qh.qh_elink), 3248 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3249 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3250 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3251 usb_syncmem(&sqh->dma, 3252 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3253 sizeof(sqh->qh.qh_elink), 3254 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3255 delay(UHCI_QH_REMOVE_DELAY); 3256 } 3257 3258 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3259 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3260 sizeof(sqh->qh.qh_hlink), 3261 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3262 pqh->hlink = sqh->hlink; 3263 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3264 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3265 sizeof(pqh->qh.qh_hlink), 3266 BUS_DMASYNC_PREWRITE); 3267 delay(UHCI_QH_REMOVE_DELAY); 3268 if (vf->eqh == sqh) 3269 vf->eqh = pqh; 3270 vf->bandwidth--; 3271 } 3272 3273 usbd_status 3274 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3275 { 3276 uhci_soft_qh_t *sqh; 3277 int i, npoll; 3278 u_int bestbw, bw, bestoffs, offs; 3279 3280 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3281 DPRINTFN(2, "pipe=%p", upipe, 0, 0, 0); 3282 if (ival == 0) { 3283 printf("uhci_device_setintr: 0 interval\n"); 3284 return USBD_INVAL; 3285 } 3286 3287 if (ival > UHCI_VFRAMELIST_COUNT) 3288 ival = UHCI_VFRAMELIST_COUNT; 3289 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3290 DPRINTFN(1, "ival=%d npoll=%d", ival, npoll, 0, 0); 3291 3292 upipe->u.intr.npoll = npoll; 3293 upipe->u.intr.qhs = 3294 kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP); 3295 if (upipe->u.intr.qhs == NULL) 3296 return USBD_NOMEM; 3297 3298 /* 3299 * Figure out which offset in the schedule that has most 3300 * bandwidth left over. 3301 */ 3302 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3303 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3304 for (bw = i = 0; i < npoll; i++) 3305 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3306 if (bw < bestbw) { 3307 bestbw = bw; 3308 bestoffs = offs; 3309 } 3310 } 3311 DPRINTFN(1, "bw=%d offs=%d", bestbw, bestoffs, 0, 0); 3312 mutex_enter(&sc->sc_lock); 3313 for(i = 0; i < npoll; i++) { 3314 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3315 sqh->elink = NULL; 3316 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3317 usb_syncmem(&sqh->dma, 3318 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3319 sizeof(sqh->qh.qh_elink), 3320 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3321 sqh->pos = MOD(i * ival + bestoffs); 3322 } 3323 #undef MOD 3324 3325 /* Enter QHs into the controller data structures. */ 3326 for(i = 0; i < npoll; i++) 3327 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3328 mutex_exit(&sc->sc_lock); 3329 3330 DPRINTFN(5, "returns %p", upipe, 0, 0, 0); 3331 3332 return USBD_NORMAL_COMPLETION; 3333 } 3334 3335 /* Open a new pipe. */ 3336 usbd_status 3337 uhci_open(struct usbd_pipe *pipe) 3338 { 3339 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3340 struct usbd_bus *bus = pipe->up_dev->ud_bus; 3341 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3342 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 3343 usbd_status err = USBD_NOMEM; 3344 int ival; 3345 3346 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3347 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", 3348 pipe, pipe->up_dev->ud_addr, ed->bEndpointAddress, bus->ub_rhaddr); 3349 3350 if (sc->sc_dying) 3351 return USBD_IOERROR; 3352 3353 upipe->aborting = 0; 3354 /* toggle state needed for bulk endpoints */ 3355 upipe->nexttoggle = pipe->up_endpoint->ue_toggle; 3356 3357 if (pipe->up_dev->ud_addr == bus->ub_rhaddr) { 3358 switch (ed->bEndpointAddress) { 3359 case USB_CONTROL_ENDPOINT: 3360 pipe->up_methods = &roothub_ctrl_methods; 3361 break; 3362 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 3363 pipe->up_methods = &uhci_root_intr_methods; 3364 break; 3365 default: 3366 return USBD_INVAL; 3367 } 3368 } else { 3369 switch (ed->bmAttributes & UE_XFERTYPE) { 3370 case UE_CONTROL: 3371 pipe->up_methods = &uhci_device_ctrl_methods; 3372 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3373 if (upipe->u.ctl.sqh == NULL) 3374 goto bad; 3375 upipe->u.ctl.setup = uhci_alloc_std(sc); 3376 if (upipe->u.ctl.setup == NULL) { 3377 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3378 goto bad; 3379 } 3380 upipe->u.ctl.stat = uhci_alloc_std(sc); 3381 if (upipe->u.ctl.stat == NULL) { 3382 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3383 uhci_free_std(sc, upipe->u.ctl.setup); 3384 goto bad; 3385 } 3386 err = usb_allocmem(&sc->sc_bus, 3387 sizeof(usb_device_request_t), 3388 0, &upipe->u.ctl.reqdma); 3389 if (err) { 3390 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3391 uhci_free_std(sc, upipe->u.ctl.setup); 3392 uhci_free_std(sc, upipe->u.ctl.stat); 3393 goto bad; 3394 } 3395 break; 3396 case UE_INTERRUPT: 3397 pipe->up_methods = &uhci_device_intr_methods; 3398 ival = pipe->up_interval; 3399 if (ival == USBD_DEFAULT_INTERVAL) 3400 ival = ed->bInterval; 3401 return uhci_device_setintr(sc, upipe, ival); 3402 case UE_ISOCHRONOUS: 3403 pipe->up_methods = &uhci_device_isoc_methods; 3404 return uhci_setup_isoc(pipe); 3405 case UE_BULK: 3406 pipe->up_methods = &uhci_device_bulk_methods; 3407 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3408 if (upipe->u.bulk.sqh == NULL) 3409 goto bad; 3410 break; 3411 } 3412 } 3413 return USBD_NORMAL_COMPLETION; 3414 3415 bad: 3416 return USBD_NOMEM; 3417 } 3418 3419 /* 3420 * Data structures and routines to emulate the root hub. 3421 */ 3422 /* 3423 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3424 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3425 * should not be used by the USB subsystem. As we cannot issue a 3426 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3427 * will be enabled as part of the reset. 3428 * 3429 * On the VT83C572, the port cannot be successfully enabled until the 3430 * outstanding "port enable change" and "connection status change" 3431 * events have been reset. 3432 */ 3433 Static usbd_status 3434 uhci_portreset(uhci_softc_t *sc, int index) 3435 { 3436 int lim, port, x; 3437 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3438 3439 if (index == 1) 3440 port = UHCI_PORTSC1; 3441 else if (index == 2) 3442 port = UHCI_PORTSC2; 3443 else 3444 return USBD_IOERROR; 3445 3446 x = URWMASK(UREAD2(sc, port)); 3447 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3448 3449 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3450 3451 DPRINTFN(1, "uhci port %d reset, status0 = 0x%04x", index, 3452 UREAD2(sc, port), 0, 0); 3453 3454 x = URWMASK(UREAD2(sc, port)); 3455 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3456 3457 delay(100); 3458 3459 DPRINTFN(1, "uhci port %d reset, status1 = 0x%04x", index, 3460 UREAD2(sc, port), 0, 0); 3461 3462 x = URWMASK(UREAD2(sc, port)); 3463 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3464 3465 for (lim = 10; --lim > 0;) { 3466 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3467 3468 x = UREAD2(sc, port); 3469 DPRINTFN(1, "uhci port %d iteration %u, status = 0x%04x", index, 3470 lim, x, 0); 3471 3472 if (!(x & UHCI_PORTSC_CCS)) { 3473 /* 3474 * No device is connected (or was disconnected 3475 * during reset). Consider the port reset. 3476 * The delay must be long enough to ensure on 3477 * the initial iteration that the device 3478 * connection will have been registered. 50ms 3479 * appears to be sufficient, but 20ms is not. 3480 */ 3481 DPRINTFN(3, "uhci port %d loop %u, device detached", 3482 index, lim, 0, 0); 3483 break; 3484 } 3485 3486 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3487 /* 3488 * Port enabled changed and/or connection 3489 * status changed were set. Reset either or 3490 * both raised flags (by writing a 1 to that 3491 * bit), and wait again for state to settle. 3492 */ 3493 UWRITE2(sc, port, URWMASK(x) | 3494 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3495 continue; 3496 } 3497 3498 if (x & UHCI_PORTSC_PE) 3499 /* Port is enabled */ 3500 break; 3501 3502 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3503 } 3504 3505 DPRINTFN(3, "uhci port %d reset, status2 = 0x%04x", index, 3506 UREAD2(sc, port), 0, 0); 3507 3508 if (lim <= 0) { 3509 DPRINTFN(1, "uhci port %d reset timed out", index, 3510 0, 0, 0); 3511 return USBD_TIMEOUT; 3512 } 3513 3514 sc->sc_isreset = 1; 3515 return USBD_NORMAL_COMPLETION; 3516 } 3517 3518 Static int 3519 uhci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 3520 void *buf, int buflen) 3521 { 3522 uhci_softc_t *sc = bus->ub_hcpriv; 3523 int port, x; 3524 int status, change, totlen = 0; 3525 uint16_t len, value, index; 3526 usb_port_status_t ps; 3527 usbd_status err; 3528 3529 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3530 3531 if (sc->sc_dying) 3532 return -1; 3533 3534 DPRINTFN(1, "type=0x%02x request=%02x", req->bmRequestType, 3535 req->bRequest, 0, 0); 3536 3537 len = UGETW(req->wLength); 3538 value = UGETW(req->wValue); 3539 index = UGETW(req->wIndex); 3540 3541 #define C(x,y) ((x) | ((y) << 8)) 3542 switch (C(req->bRequest, req->bmRequestType)) { 3543 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3544 DPRINTFN(1, "wValue=0x%04x", value, 0, 0, 0); 3545 if (len == 0) 3546 break; 3547 switch (value) { 3548 case C(0, UDESC_DEVICE): { 3549 usb_device_descriptor_t devd; 3550 3551 totlen = min(buflen, sizeof(devd)); 3552 memcpy(&devd, buf, totlen); 3553 USETW(devd.idVendor, sc->sc_id_vendor); 3554 memcpy(buf, &devd, totlen); 3555 break; 3556 } 3557 case C(1, UDESC_STRING): 3558 #define sd ((usb_string_descriptor_t *)buf) 3559 /* Vendor */ 3560 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 3561 break; 3562 case C(2, UDESC_STRING): 3563 /* Product */ 3564 totlen = usb_makestrdesc(sd, len, "UHCI root hub"); 3565 break; 3566 #undef sd 3567 default: 3568 /* default from usbroothub */ 3569 return buflen; 3570 } 3571 break; 3572 3573 /* Hub requests */ 3574 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3575 break; 3576 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3577 DPRINTFN(1, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", index, 3578 value, 0, 0); 3579 if (index == 1) 3580 port = UHCI_PORTSC1; 3581 else if (index == 2) 3582 port = UHCI_PORTSC2; 3583 else { 3584 return -1; 3585 } 3586 switch(value) { 3587 case UHF_PORT_ENABLE: 3588 x = URWMASK(UREAD2(sc, port)); 3589 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3590 break; 3591 case UHF_PORT_SUSPEND: 3592 x = URWMASK(UREAD2(sc, port)); 3593 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3594 break; 3595 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3596 /* see USB2 spec ch. 7.1.7.7 */ 3597 usb_delay_ms(&sc->sc_bus, 20); 3598 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3599 /* 10ms resume delay must be provided by caller */ 3600 break; 3601 case UHF_PORT_RESET: 3602 x = URWMASK(UREAD2(sc, port)); 3603 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3604 break; 3605 case UHF_C_PORT_CONNECTION: 3606 x = URWMASK(UREAD2(sc, port)); 3607 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3608 break; 3609 case UHF_C_PORT_ENABLE: 3610 x = URWMASK(UREAD2(sc, port)); 3611 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3612 break; 3613 case UHF_C_PORT_OVER_CURRENT: 3614 x = URWMASK(UREAD2(sc, port)); 3615 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3616 break; 3617 case UHF_C_PORT_RESET: 3618 sc->sc_isreset = 0; 3619 break; 3620 case UHF_PORT_CONNECTION: 3621 case UHF_PORT_OVER_CURRENT: 3622 case UHF_PORT_POWER: 3623 case UHF_PORT_LOW_SPEED: 3624 case UHF_C_PORT_SUSPEND: 3625 default: 3626 return -1; 3627 } 3628 break; 3629 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3630 if (index == 1) 3631 port = UHCI_PORTSC1; 3632 else if (index == 2) 3633 port = UHCI_PORTSC2; 3634 else { 3635 return -1; 3636 } 3637 if (len > 0) { 3638 *(uint8_t *)buf = 3639 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3640 UHCI_PORTSC_LS_SHIFT; 3641 totlen = 1; 3642 } 3643 break; 3644 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3645 if (len == 0) 3646 break; 3647 if ((value & 0xff) != 0) { 3648 return -1; 3649 } 3650 usb_hub_descriptor_t hubd; 3651 3652 totlen = min(buflen, sizeof(hubd)); 3653 memcpy(&hubd, buf, totlen); 3654 hubd.bNbrPorts = 2; 3655 memcpy(buf, &hubd, totlen); 3656 break; 3657 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3658 if (len != 4) { 3659 return -1; 3660 } 3661 memset(buf, 0, len); 3662 totlen = len; 3663 break; 3664 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3665 if (index == 1) 3666 port = UHCI_PORTSC1; 3667 else if (index == 2) 3668 port = UHCI_PORTSC2; 3669 else { 3670 return -1; 3671 } 3672 if (len != 4) { 3673 return -1; 3674 } 3675 x = UREAD2(sc, port); 3676 status = change = 0; 3677 if (x & UHCI_PORTSC_CCS) 3678 status |= UPS_CURRENT_CONNECT_STATUS; 3679 if (x & UHCI_PORTSC_CSC) 3680 change |= UPS_C_CONNECT_STATUS; 3681 if (x & UHCI_PORTSC_PE) 3682 status |= UPS_PORT_ENABLED; 3683 if (x & UHCI_PORTSC_POEDC) 3684 change |= UPS_C_PORT_ENABLED; 3685 if (x & UHCI_PORTSC_OCI) 3686 status |= UPS_OVERCURRENT_INDICATOR; 3687 if (x & UHCI_PORTSC_OCIC) 3688 change |= UPS_C_OVERCURRENT_INDICATOR; 3689 if (x & UHCI_PORTSC_SUSP) 3690 status |= UPS_SUSPEND; 3691 if (x & UHCI_PORTSC_LSDA) 3692 status |= UPS_LOW_SPEED; 3693 status |= UPS_PORT_POWER; 3694 if (sc->sc_isreset) 3695 change |= UPS_C_PORT_RESET; 3696 USETW(ps.wPortStatus, status); 3697 USETW(ps.wPortChange, change); 3698 totlen = min(len, sizeof(ps)); 3699 memcpy(buf, &ps, totlen); 3700 break; 3701 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3702 return -1; 3703 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3704 break; 3705 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3706 if (index == 1) 3707 port = UHCI_PORTSC1; 3708 else if (index == 2) 3709 port = UHCI_PORTSC2; 3710 else { 3711 return -1; 3712 } 3713 switch(value) { 3714 case UHF_PORT_ENABLE: 3715 x = URWMASK(UREAD2(sc, port)); 3716 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3717 break; 3718 case UHF_PORT_SUSPEND: 3719 x = URWMASK(UREAD2(sc, port)); 3720 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3721 break; 3722 case UHF_PORT_RESET: 3723 err = uhci_portreset(sc, index); 3724 if (err != USBD_NORMAL_COMPLETION) 3725 return -1; 3726 return 0; 3727 case UHF_PORT_POWER: 3728 /* Pretend we turned on power */ 3729 return 0; 3730 case UHF_C_PORT_CONNECTION: 3731 case UHF_C_PORT_ENABLE: 3732 case UHF_C_PORT_OVER_CURRENT: 3733 case UHF_PORT_CONNECTION: 3734 case UHF_PORT_OVER_CURRENT: 3735 case UHF_PORT_LOW_SPEED: 3736 case UHF_C_PORT_SUSPEND: 3737 case UHF_C_PORT_RESET: 3738 default: 3739 return -1; 3740 } 3741 break; 3742 default: 3743 /* default from usbroothub */ 3744 DPRINTFN(1, "returning %d (usbroothub default)", 3745 buflen, 0, 0, 0); 3746 return buflen; 3747 } 3748 3749 DPRINTFN(1, "returning %d", totlen, 0, 0, 0); 3750 3751 return totlen; 3752 } 3753 3754 /* Abort a root interrupt request. */ 3755 void 3756 uhci_root_intr_abort(struct usbd_xfer *xfer) 3757 { 3758 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 3759 3760 KASSERT(mutex_owned(&sc->sc_lock)); 3761 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3762 3763 callout_stop(&sc->sc_poll_handle); 3764 sc->sc_intr_xfer = NULL; 3765 3766 xfer->ux_status = USBD_CANCELLED; 3767 #ifdef DIAGNOSTIC 3768 UXFER(xfer)->iinfo.isdone = 1; 3769 #endif 3770 usb_transfer_complete(xfer); 3771 } 3772 3773 usbd_status 3774 uhci_root_intr_transfer(struct usbd_xfer *xfer) 3775 { 3776 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 3777 usbd_status err; 3778 3779 /* Insert last in queue. */ 3780 mutex_enter(&sc->sc_lock); 3781 err = usb_insert_transfer(xfer); 3782 mutex_exit(&sc->sc_lock); 3783 if (err) 3784 return err; 3785 3786 /* 3787 * Pipe isn't running (otherwise err would be USBD_INPROG), 3788 * start first 3789 */ 3790 return uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3791 } 3792 3793 /* Start a transfer on the root interrupt pipe */ 3794 usbd_status 3795 uhci_root_intr_start(struct usbd_xfer *xfer) 3796 { 3797 struct usbd_pipe *pipe = xfer->ux_pipe; 3798 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3799 unsigned int ival; 3800 3801 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3802 DPRINTFN(1, "xfer=%p len=%d flags=%d", xfer, xfer->ux_length, 3803 xfer->ux_flags, 0); 3804 3805 if (sc->sc_dying) 3806 return USBD_IOERROR; 3807 3808 /* XXX temporary variable needed to avoid gcc3 warning */ 3809 ival = xfer->ux_pipe->up_endpoint->ue_edesc->bInterval; 3810 sc->sc_ival = mstohz(ival); 3811 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3812 sc->sc_intr_xfer = xfer; 3813 return USBD_IN_PROGRESS; 3814 } 3815 3816 /* Close the root interrupt pipe. */ 3817 void 3818 uhci_root_intr_close(struct usbd_pipe *pipe) 3819 { 3820 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3821 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3822 3823 KASSERT(mutex_owned(&sc->sc_lock)); 3824 3825 callout_stop(&sc->sc_poll_handle); 3826 sc->sc_intr_xfer = NULL; 3827 } 3828
Indexes created Tue Sep 30 20:09:53 GMT 2025