uhci.c revision 1.264.4.27
1 /* $NetBSD: uhci.c,v 1.264.4.27 2015/03/29 11:33:15 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 39 * USB spec: http://www.usb.org/developers/docs/ 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.264.4.27 2015/03/29 11:33:15 skrll Exp $"); 46 47 #include <sys/param.h> 48 49 #include <sys/bus.h> 50 #include <sys/cpu.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/mutex.h> 55 #include <sys/proc.h> 56 #include <sys/queue.h> 57 #include <sys/select.h> 58 #include <sys/sysctl.h> 59 #include <sys/systm.h> 60 61 #include <machine/endian.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdivar.h> 66 #include <dev/usb/usb_mem.h> 67 68 #include <dev/usb/uhcireg.h> 69 #include <dev/usb/uhcivar.h> 70 #include <dev/usb/usbroothub.h> 71 #include <dev/usb/usbhist.h> 72 73 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 74 /*#define UHCI_CTL_LOOP */ 75 76 #ifdef UHCI_DEBUG 77 uhci_softc_t *thesc; 78 int uhcinoloop = 0; 79 #endif 80 81 #ifdef USB_DEBUG 82 #ifndef UHCI_DEBUG 83 #define uhcidebug 0 84 #else 85 static int uhcidebug = 0; 86 87 SYSCTL_SETUP(sysctl_hw_uhci_setup, "sysctl hw.uhci setup") 88 { 89 int err; 90 const struct sysctlnode *rnode; 91 const struct sysctlnode *cnode; 92 93 err = sysctl_createv(clog, 0, NULL, &rnode, 94 CTLFLAG_PERMANENT, CTLTYPE_NODE, "uhci", 95 SYSCTL_DESCR("uhci global controls"), 96 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 97 98 if (err) 99 goto fail; 100 101 /* control debugging printfs */ 102 err = sysctl_createv(clog, 0, &rnode, &cnode, 103 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 104 "debug", SYSCTL_DESCR("Enable debugging output"), 105 NULL, 0, &uhcidebug, sizeof(uhcidebug), CTL_CREATE, CTL_EOL); 106 if (err) 107 goto fail; 108 109 return; 110 fail: 111 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 112 } 113 114 #endif /* UHCI_DEBUG */ 115 #endif /* USB_DEBUG */ 116 117 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOGN(uhcidebug,1,FMT,A,B,C,D) 118 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(uhcidebug,N,FMT,A,B,C,D) 119 #define UHCIHIST_FUNC() USBHIST_FUNC() 120 #define UHCIHIST_CALLED(name) USBHIST_CALLED(uhcidebug) 121 122 /* 123 * The UHCI controller is little endian, so on big endian machines 124 * the data stored in memory needs to be swapped. 125 */ 126 127 struct uhci_pipe { 128 struct usbd_pipe pipe; 129 int nexttoggle; 130 131 u_char aborting; 132 struct usbd_xfer *abortstart, abortend; 133 134 /* Info needed for different pipe kinds. */ 135 union { 136 /* Control pipe */ 137 struct { 138 uhci_soft_qh_t *sqh; 139 usb_dma_t reqdma; 140 uhci_soft_td_t *setup, *stat; 141 u_int length; 142 } ctl; 143 /* Interrupt pipe */ 144 struct { 145 int npoll; 146 int isread; 147 uhci_soft_qh_t **qhs; 148 } intr; 149 /* Bulk pipe */ 150 struct { 151 uhci_soft_qh_t *sqh; 152 u_int length; 153 int isread; 154 } bulk; 155 /* Iso pipe */ 156 struct iso { 157 uhci_soft_td_t **stds; 158 int next, inuse; 159 } iso; 160 } u; 161 }; 162 163 Static void uhci_globalreset(uhci_softc_t *); 164 Static usbd_status uhci_portreset(uhci_softc_t*, int); 165 Static void uhci_reset(uhci_softc_t *); 166 Static usbd_status uhci_run(uhci_softc_t *, int, int); 167 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 168 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 169 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 170 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 171 #if 0 172 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 173 uhci_intr_info_t *); 174 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 175 #endif 176 177 Static void uhci_free_std_chain(uhci_softc_t *, 178 uhci_soft_td_t *, uhci_soft_td_t *); 179 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 180 uhci_softc_t *, int, int, uint16_t, usb_dma_t *, 181 uhci_soft_td_t **, uhci_soft_td_t **); 182 Static void uhci_poll_hub(void *); 183 Static void uhci_waitintr(uhci_softc_t *, struct usbd_xfer *); 184 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 185 Static void uhci_idone(uhci_intr_info_t *); 186 187 Static void uhci_abort_xfer(struct usbd_xfer *, usbd_status); 188 189 Static void uhci_timeout(void *); 190 Static void uhci_timeout_task(void *); 191 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 192 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 193 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 194 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 195 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 196 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 197 Static void uhci_add_loop(uhci_softc_t *); 198 Static void uhci_rem_loop(uhci_softc_t *); 199 200 Static usbd_status uhci_setup_isoc(struct usbd_pipe *); 201 Static void uhci_device_isoc_enter(struct usbd_xfer *); 202 203 Static struct usbd_xfer * uhci_allocx(struct usbd_bus *); 204 Static void uhci_freex(struct usbd_bus *, struct usbd_xfer *); 205 Static void uhci_get_lock(struct usbd_bus *, kmutex_t **); 206 Static int uhci_roothub_ctrl(struct usbd_bus *, 207 usb_device_request_t *, void *, int); 208 209 Static usbd_status uhci_device_ctrl_transfer(struct usbd_xfer *); 210 Static usbd_status uhci_device_ctrl_start(struct usbd_xfer *); 211 Static void uhci_device_ctrl_abort(struct usbd_xfer *); 212 Static void uhci_device_ctrl_close(struct usbd_pipe *); 213 Static void uhci_device_ctrl_done(struct usbd_xfer *); 214 215 Static usbd_status uhci_device_intr_transfer(struct usbd_xfer *); 216 Static usbd_status uhci_device_intr_start(struct usbd_xfer *); 217 Static void uhci_device_intr_abort(struct usbd_xfer *); 218 Static void uhci_device_intr_close(struct usbd_pipe *); 219 Static void uhci_device_intr_done(struct usbd_xfer *); 220 221 Static usbd_status uhci_device_bulk_transfer(struct usbd_xfer *); 222 Static usbd_status uhci_device_bulk_start(struct usbd_xfer *); 223 Static void uhci_device_bulk_abort(struct usbd_xfer *); 224 Static void uhci_device_bulk_close(struct usbd_pipe *); 225 Static void uhci_device_bulk_done(struct usbd_xfer *); 226 227 Static usbd_status uhci_device_isoc_transfer(struct usbd_xfer *); 228 Static usbd_status uhci_device_isoc_start(struct usbd_xfer *); 229 Static void uhci_device_isoc_abort(struct usbd_xfer *); 230 Static void uhci_device_isoc_close(struct usbd_pipe *); 231 Static void uhci_device_isoc_done(struct usbd_xfer *); 232 233 Static usbd_status uhci_root_intr_transfer(struct usbd_xfer *); 234 Static usbd_status uhci_root_intr_start(struct usbd_xfer *); 235 Static void uhci_root_intr_abort(struct usbd_xfer *); 236 Static void uhci_root_intr_close(struct usbd_pipe *); 237 Static void uhci_root_intr_done(struct usbd_xfer *); 238 239 Static usbd_status uhci_open(struct usbd_pipe *); 240 Static void uhci_poll(struct usbd_bus *); 241 Static void uhci_softintr(void *); 242 243 Static usbd_status uhci_device_request(struct usbd_xfer *); 244 245 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 246 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 247 Static usbd_status uhci_device_setintr(uhci_softc_t *, 248 struct uhci_pipe *, int); 249 250 Static void uhci_device_clear_toggle(struct usbd_pipe *); 251 Static void uhci_noop(struct usbd_pipe *); 252 253 static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 254 uhci_soft_qh_t *); 255 256 #ifdef UHCI_DEBUG 257 Static void uhci_dump_all(uhci_softc_t *); 258 Static void uhci_dumpregs(uhci_softc_t *); 259 Static void uhci_dump_qhs(uhci_soft_qh_t *); 260 Static void uhci_dump_qh(uhci_soft_qh_t *); 261 Static void uhci_dump_tds(uhci_soft_td_t *); 262 Static void uhci_dump_td(uhci_soft_td_t *); 263 Static void uhci_dump_ii(uhci_intr_info_t *); 264 void uhci_dump(void); 265 #endif 266 267 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 268 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 269 #define UWRITE1(sc, r, x) \ 270 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 271 } while (/*CONSTCOND*/0) 272 #define UWRITE2(sc, r, x) \ 273 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 274 } while (/*CONSTCOND*/0) 275 #define UWRITE4(sc, r, x) \ 276 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 277 } while (/*CONSTCOND*/0) 278 static __inline uint8_t 279 UREAD1(uhci_softc_t *sc, bus_size_t r) 280 { 281 282 UBARR(sc); 283 return bus_space_read_1(sc->iot, sc->ioh, r); 284 } 285 286 static __inline uint16_t 287 UREAD2(uhci_softc_t *sc, bus_size_t r) 288 { 289 290 UBARR(sc); 291 return bus_space_read_2(sc->iot, sc->ioh, r); 292 } 293 294 #ifdef UHCI_DEBUG 295 static __inline uint32_t 296 UREAD4(uhci_softc_t *sc, bus_size_t r) 297 { 298 299 UBARR(sc); 300 return bus_space_read_4(sc->iot, sc->ioh, r); 301 } 302 #endif 303 304 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 305 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 306 307 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 308 309 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 310 311 const struct usbd_bus_methods uhci_bus_methods = { 312 .ubm_open = uhci_open, 313 .ubm_softint = uhci_softintr, 314 .ubm_dopoll = uhci_poll, 315 .ubm_allocx = uhci_allocx, 316 .ubm_freex = uhci_freex, 317 .ubm_getlock = uhci_get_lock, 318 .ubm_rhctrl = uhci_roothub_ctrl, 319 }; 320 321 const struct usbd_pipe_methods uhci_root_intr_methods = { 322 .upm_transfer = uhci_root_intr_transfer, 323 .upm_start = uhci_root_intr_start, 324 .upm_abort = uhci_root_intr_abort, 325 .upm_close = uhci_root_intr_close, 326 .upm_cleartoggle = uhci_noop, 327 .upm_done = uhci_root_intr_done, 328 }; 329 330 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 331 .upm_transfer = uhci_device_ctrl_transfer, 332 .upm_start = uhci_device_ctrl_start, 333 .upm_abort = uhci_device_ctrl_abort, 334 .upm_close = uhci_device_ctrl_close, 335 .upm_cleartoggle = uhci_noop, 336 .upm_done = uhci_device_ctrl_done, 337 }; 338 339 const struct usbd_pipe_methods uhci_device_intr_methods = { 340 .upm_transfer = uhci_device_intr_transfer, 341 .upm_start = uhci_device_intr_start, 342 .upm_abort = uhci_device_intr_abort, 343 .upm_close = uhci_device_intr_close, 344 .upm_cleartoggle = uhci_device_clear_toggle, 345 .upm_done = uhci_device_intr_done, 346 }; 347 348 const struct usbd_pipe_methods uhci_device_bulk_methods = { 349 .upm_transfer = uhci_device_bulk_transfer, 350 .upm_start = uhci_device_bulk_start, 351 .upm_abort = uhci_device_bulk_abort, 352 .upm_close = uhci_device_bulk_close, 353 .upm_cleartoggle = uhci_device_clear_toggle, 354 .upm_done = uhci_device_bulk_done, 355 }; 356 357 const struct usbd_pipe_methods uhci_device_isoc_methods = { 358 .upm_transfer = uhci_device_isoc_transfer, 359 .upm_start = uhci_device_isoc_start, 360 .upm_abort = uhci_device_isoc_abort, 361 .upm_close = uhci_device_isoc_close, 362 .upm_cleartoggle = uhci_noop, 363 .upm_done = uhci_device_isoc_done, 364 }; 365 366 #define uhci_add_intr_info(sc, ii) \ 367 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 368 #define uhci_del_intr_info(ii) \ 369 do { \ 370 LIST_REMOVE((ii), list); \ 371 (ii)->list.le_prev = NULL; \ 372 } while (0) 373 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 374 375 static inline uhci_soft_qh_t * 376 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 377 { 378 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 379 DPRINTFN(15, "pqh=%p sqh=%p", pqh, sqh, 0, 0); 380 381 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 382 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 383 usb_syncmem(&pqh->dma, 384 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 385 sizeof(pqh->qh.qh_hlink), 386 BUS_DMASYNC_POSTWRITE); 387 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 388 printf("uhci_find_prev_qh: QH not found\n"); 389 return NULL; 390 } 391 #endif 392 } 393 return pqh; 394 } 395 396 void 397 uhci_globalreset(uhci_softc_t *sc) 398 { 399 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 400 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 401 UHCICMD(sc, 0); /* do nothing */ 402 } 403 404 int 405 uhci_init(uhci_softc_t *sc) 406 { 407 usbd_status err; 408 int i, j; 409 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 410 uhci_soft_td_t *std; 411 412 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 413 414 #ifdef UHCI_DEBUG 415 thesc = sc; 416 417 if (uhcidebug > 2) 418 uhci_dumpregs(sc); 419 #endif 420 421 sc->sc_suspend = PWR_RESUME; 422 423 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 424 uhci_globalreset(sc); /* reset the controller */ 425 uhci_reset(sc); 426 427 /* Allocate and initialize real frame array. */ 428 err = usb_allocmem(&sc->sc_bus, 429 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 430 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 431 if (err) 432 return err; 433 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 434 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 435 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 436 437 /* 438 * Allocate a TD, inactive, that hangs from the last QH. 439 * This is to avoid a bug in the PIIX that makes it run berserk 440 * otherwise. 441 */ 442 std = uhci_alloc_std(sc); 443 if (std == NULL) 444 return ENOMEM; 445 std->link.std = NULL; 446 std->td.td_link = htole32(UHCI_PTR_T); 447 std->td.td_status = htole32(0); /* inactive */ 448 std->td.td_token = htole32(0); 449 std->td.td_buffer = htole32(0); 450 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 451 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 452 453 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 454 lsqh = uhci_alloc_sqh(sc); 455 if (lsqh == NULL) 456 return ENOMEM; 457 lsqh->hlink = NULL; 458 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 459 lsqh->elink = std; 460 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 461 sc->sc_last_qh = lsqh; 462 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 463 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 464 465 /* Allocate the dummy QH where bulk traffic will be queued. */ 466 bsqh = uhci_alloc_sqh(sc); 467 if (bsqh == NULL) 468 return ENOMEM; 469 bsqh->hlink = lsqh; 470 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 471 bsqh->elink = NULL; 472 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 473 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 474 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 475 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 476 477 /* Allocate dummy QH where high speed control traffic will be queued. */ 478 chsqh = uhci_alloc_sqh(sc); 479 if (chsqh == NULL) 480 return ENOMEM; 481 chsqh->hlink = bsqh; 482 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 483 chsqh->elink = NULL; 484 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 485 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 486 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 487 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 488 489 /* Allocate dummy QH where control traffic will be queued. */ 490 clsqh = uhci_alloc_sqh(sc); 491 if (clsqh == NULL) 492 return ENOMEM; 493 clsqh->hlink = chsqh; 494 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 495 clsqh->elink = NULL; 496 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 497 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 498 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 499 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 500 501 /* 502 * Make all (virtual) frame list pointers point to the interrupt 503 * queue heads and the interrupt queue heads at the control 504 * queue head and point the physical frame list to the virtual. 505 */ 506 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 507 std = uhci_alloc_std(sc); 508 sqh = uhci_alloc_sqh(sc); 509 if (std == NULL || sqh == NULL) 510 return USBD_NOMEM; 511 std->link.sqh = sqh; 512 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 513 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 514 std->td.td_token = htole32(0); 515 std->td.td_buffer = htole32(0); 516 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 517 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 518 sqh->hlink = clsqh; 519 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 520 sqh->elink = NULL; 521 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 522 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 523 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 524 sc->sc_vframes[i].htd = std; 525 sc->sc_vframes[i].etd = std; 526 sc->sc_vframes[i].hqh = sqh; 527 sc->sc_vframes[i].eqh = sqh; 528 for (j = i; 529 j < UHCI_FRAMELIST_COUNT; 530 j += UHCI_VFRAMELIST_COUNT) 531 sc->sc_pframes[j] = htole32(std->physaddr); 532 } 533 usb_syncmem(&sc->sc_dma, 0, 534 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 535 BUS_DMASYNC_PREWRITE); 536 537 538 LIST_INIT(&sc->sc_intrhead); 539 540 sc->sc_xferpool = pool_cache_init(sizeof(struct uhci_xfer), 0, 0, 0, 541 "uhcixfer", NULL, IPL_USB, NULL, NULL, NULL); 542 543 callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE); 544 545 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 546 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 547 cv_init(&sc->sc_softwake_cv, "uhciab"); 548 549 /* Set up the bus struct. */ 550 sc->sc_bus.ub_methods = &uhci_bus_methods; 551 sc->sc_bus.ub_pipesize = sizeof(struct uhci_pipe); 552 sc->sc_bus.ub_usedma = true; 553 554 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 555 556 DPRINTF("Enabling...", 0, 0, 0, 0); 557 558 err = uhci_run(sc, 1, 0); /* and here we go... */ 559 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 560 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 561 return err; 562 } 563 564 int 565 uhci_activate(device_t self, enum devact act) 566 { 567 struct uhci_softc *sc = device_private(self); 568 569 switch (act) { 570 case DVACT_DEACTIVATE: 571 sc->sc_dying = 1; 572 return 0; 573 default: 574 return EOPNOTSUPP; 575 } 576 } 577 578 void 579 uhci_childdet(device_t self, device_t child) 580 { 581 struct uhci_softc *sc = device_private(self); 582 583 KASSERT(sc->sc_child == child); 584 sc->sc_child = NULL; 585 } 586 587 int 588 uhci_detach(struct uhci_softc *sc, int flags) 589 { 590 int rv = 0; 591 592 if (sc->sc_child != NULL) 593 rv = config_detach(sc->sc_child, flags); 594 595 if (rv != 0) 596 return rv; 597 598 callout_halt(&sc->sc_poll_handle, NULL); 599 callout_destroy(&sc->sc_poll_handle); 600 601 cv_destroy(&sc->sc_softwake_cv); 602 603 mutex_destroy(&sc->sc_lock); 604 mutex_destroy(&sc->sc_intr_lock); 605 606 pool_cache_destroy(sc->sc_xferpool); 607 608 /* XXX free other data structures XXX */ 609 610 return rv; 611 } 612 613 struct usbd_xfer * 614 uhci_allocx(struct usbd_bus *bus) 615 { 616 struct uhci_softc *sc = bus->ub_hcpriv; 617 struct usbd_xfer *xfer; 618 619 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 620 if (xfer != NULL) { 621 memset(xfer, 0, sizeof(struct uhci_xfer)); 622 UXFER(xfer)->iinfo.sc = sc; 623 #ifdef DIAGNOSTIC 624 UXFER(xfer)->iinfo.isdone = 1; 625 xfer->ux_state = XFER_BUSY; 626 #endif 627 } 628 return xfer; 629 } 630 631 void 632 uhci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 633 { 634 struct uhci_softc *sc = bus->ub_hcpriv; 635 636 #ifdef DIAGNOSTIC 637 if (xfer->ux_state != XFER_BUSY) { 638 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 639 xfer->ux_state); 640 } 641 xfer->ux_state = XFER_FREE; 642 if (!UXFER(xfer)->iinfo.isdone) { 643 printf("uhci_freex: !isdone\n"); 644 } 645 #endif 646 pool_cache_put(sc->sc_xferpool, xfer); 647 } 648 649 Static void 650 uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 651 { 652 struct uhci_softc *sc = bus->ub_hcpriv; 653 654 *lock = &sc->sc_lock; 655 } 656 657 658 /* 659 * Handle suspend/resume. 660 * 661 * We need to switch to polling mode here, because this routine is 662 * called from an interrupt context. This is all right since we 663 * are almost suspended anyway. 664 */ 665 bool 666 uhci_resume(device_t dv, const pmf_qual_t *qual) 667 { 668 uhci_softc_t *sc = device_private(dv); 669 int cmd; 670 671 mutex_spin_enter(&sc->sc_intr_lock); 672 673 cmd = UREAD2(sc, UHCI_CMD); 674 sc->sc_bus.ub_usepolling++; 675 UWRITE2(sc, UHCI_INTR, 0); 676 uhci_globalreset(sc); 677 uhci_reset(sc); 678 if (cmd & UHCI_CMD_RS) 679 uhci_run(sc, 0, 1); 680 681 /* restore saved state */ 682 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 683 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 684 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 685 686 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 687 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock); 688 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 689 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 690 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 691 UHCICMD(sc, UHCI_CMD_MAXP); 692 uhci_run(sc, 1, 1); /* and start traffic again */ 693 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock); 694 sc->sc_bus.ub_usepolling--; 695 if (sc->sc_intr_xfer != NULL) 696 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 697 sc->sc_intr_xfer); 698 #ifdef UHCI_DEBUG 699 if (uhcidebug > 2) 700 uhci_dumpregs(sc); 701 #endif 702 703 sc->sc_suspend = PWR_RESUME; 704 mutex_spin_exit(&sc->sc_intr_lock); 705 706 return true; 707 } 708 709 bool 710 uhci_suspend(device_t dv, const pmf_qual_t *qual) 711 { 712 uhci_softc_t *sc = device_private(dv); 713 int cmd; 714 715 mutex_spin_enter(&sc->sc_intr_lock); 716 717 cmd = UREAD2(sc, UHCI_CMD); 718 719 #ifdef UHCI_DEBUG 720 if (uhcidebug > 2) 721 uhci_dumpregs(sc); 722 #endif 723 if (sc->sc_intr_xfer != NULL) 724 callout_stop(&sc->sc_poll_handle); 725 sc->sc_suspend = PWR_SUSPEND; 726 sc->sc_bus.ub_usepolling++; 727 728 uhci_run(sc, 0, 1); /* stop the controller */ 729 cmd &= ~UHCI_CMD_RS; 730 731 /* save some state if BIOS doesn't */ 732 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 733 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 734 735 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 736 737 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 738 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock); 739 sc->sc_bus.ub_usepolling--; 740 741 mutex_spin_exit(&sc->sc_intr_lock); 742 743 return true; 744 } 745 746 #ifdef UHCI_DEBUG 747 Static void 748 uhci_dumpregs(uhci_softc_t *sc) 749 { 750 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 751 DPRINTF("cmd =%04x sts =%04x intr =%04x frnum =%04x", 752 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 753 UREAD2(sc, UHCI_INTR), UREAD2(sc, UHCI_FRNUM)); 754 DPRINTF("sof =%04x portsc1=%04x portsc2=%04x flbase=%08x", 755 UREAD1(sc, UHCI_SOF), UREAD2(sc, UHCI_PORTSC1), 756 UREAD2(sc, UHCI_PORTSC2), UREAD4(sc, UHCI_FLBASEADDR)); 757 } 758 759 void 760 uhci_dump_td(uhci_soft_td_t *p) 761 { 762 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 763 764 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 765 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 766 767 DPRINTF("TD(%p) at %08x", p, p->physaddr, 0, 0); 768 DPRINTF(" link=0x%08x status=0x%08x " 769 "token=0x%08x buffer=0x%08x", 770 le32toh(p->td.td_link), 771 le32toh(p->td.td_status), 772 le32toh(p->td.td_token), 773 le32toh(p->td.td_buffer)); 774 775 DPRINTF("bitstuff=%d crcto =%d nak =%d babble =%d", 776 !!(le32toh(p->td.td_status) & UHCI_TD_BITSTUFF), 777 !!(le32toh(p->td.td_status) & UHCI_TD_CRCTO), 778 !!(le32toh(p->td.td_status) & UHCI_TD_NAK), 779 !!(le32toh(p->td.td_status) & UHCI_TD_BABBLE)); 780 DPRINTF("dbuffer =%d stalled =%d active =%d ioc =%d", 781 !!(le32toh(p->td.td_status) & UHCI_TD_DBUFFER), 782 !!(le32toh(p->td.td_status) & UHCI_TD_STALLED), 783 !!(le32toh(p->td.td_status) & UHCI_TD_ACTIVE), 784 !!(le32toh(p->td.td_status) & UHCI_TD_IOC)); 785 DPRINTF("ios =%d ls =%d spd =%d", 786 !!(le32toh(p->td.td_status) & UHCI_TD_IOS), 787 !!(le32toh(p->td.td_status) & UHCI_TD_LS), 788 !!(le32toh(p->td.td_status) & UHCI_TD_SPD), 0); 789 DPRINTF("errcnt =%d actlen =%d pid=%02x", 790 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 791 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 792 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 0); 793 DPRINTF("addr=%d endpt=%d D=%d maxlen=%d,", 794 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 795 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 796 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 797 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))); 798 } 799 800 void 801 uhci_dump_qh(uhci_soft_qh_t *sqh) 802 { 803 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 804 805 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 806 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 807 808 DPRINTF("QH(%p) at %08x: hlink=%08x elink=%08x", sqh, 809 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 810 le32toh(sqh->qh.qh_elink)); 811 812 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 813 } 814 815 816 #if 1 817 void 818 uhci_dump(void) 819 { 820 uhci_dump_all(thesc); 821 } 822 #endif 823 824 void 825 uhci_dump_all(uhci_softc_t *sc) 826 { 827 uhci_dumpregs(sc); 828 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 829 uhci_dump_qhs(sc->sc_lctl_start); 830 } 831 832 833 void 834 uhci_dump_qhs(uhci_soft_qh_t *sqh) 835 { 836 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 837 838 uhci_dump_qh(sqh); 839 840 /* 841 * uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 842 * Traverses sideways first, then down. 843 * 844 * QH1 845 * QH2 846 * No QH 847 * TD2.1 848 * TD2.2 849 * TD1.1 850 * etc. 851 * 852 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 853 */ 854 855 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 856 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 857 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 858 uhci_dump_qhs(sqh->hlink); 859 else 860 DPRINTF("No QH", 0, 0, 0, 0); 861 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 862 863 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 864 uhci_dump_tds(sqh->elink); 865 else 866 DPRINTF("No QH", 0, 0, 0, 0); 867 } 868 869 void 870 uhci_dump_tds(uhci_soft_td_t *std) 871 { 872 uhci_soft_td_t *td; 873 int stop; 874 875 for (td = std; td != NULL; td = td->link.std) { 876 uhci_dump_td(td); 877 878 /* 879 * Check whether the link pointer in this TD marks 880 * the link pointer as end of queue. This avoids 881 * printing the free list in case the queue/TD has 882 * already been moved there (seatbelt). 883 */ 884 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 885 sizeof(td->td.td_link), 886 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 887 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 888 le32toh(td->td.td_link) == 0); 889 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 890 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 891 if (stop) 892 break; 893 } 894 } 895 896 Static void 897 uhci_dump_ii(uhci_intr_info_t *ii) 898 { 899 struct usbd_pipe *pipe; 900 usb_endpoint_descriptor_t *ed; 901 struct usbd_device *dev; 902 903 #ifdef DIAGNOSTIC 904 #define DONE ii->isdone 905 #else 906 #define DONE 0 907 #endif 908 if (ii == NULL) { 909 printf("ii NULL\n"); 910 return; 911 } 912 if (ii->xfer == NULL) { 913 printf("ii %p: done=%d xfer=NULL\n", 914 ii, DONE); 915 return; 916 } 917 pipe = ii->xfer->ux_pipe; 918 if (pipe == NULL) { 919 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 920 ii, DONE, ii->xfer); 921 return; 922 } 923 if (pipe->up_endpoint == NULL) { 924 printf("ii %p: done=%d xfer=%p pipe=%p pipe->up_endpoint=NULL\n", 925 ii, DONE, ii->xfer, pipe); 926 return; 927 } 928 if (pipe->up_dev == NULL) { 929 printf("ii %p: done=%d xfer=%p pipe=%p pipe->up_dev=NULL\n", 930 ii, DONE, ii->xfer, pipe); 931 return; 932 } 933 ed = pipe->up_endpoint->ue_edesc; 934 dev = pipe->up_dev; 935 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 936 ii, DONE, ii->xfer, dev, 937 UGETW(dev->ud_ddesc.idVendor), 938 UGETW(dev->ud_ddesc.idProduct), 939 dev->ud_addr, pipe, 940 ed->bEndpointAddress, ed->bmAttributes); 941 #undef DONE 942 } 943 944 void uhci_dump_iis(struct uhci_softc *sc); 945 void 946 uhci_dump_iis(struct uhci_softc *sc) 947 { 948 uhci_intr_info_t *ii; 949 950 printf("intr_info list:\n"); 951 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 952 uhci_dump_ii(ii); 953 } 954 955 void iidump(void); 956 void iidump(void) { uhci_dump_iis(thesc); } 957 958 #endif 959 960 /* 961 * This routine is executed periodically and simulates interrupts 962 * from the root controller interrupt pipe for port status change. 963 */ 964 void 965 uhci_poll_hub(void *addr) 966 { 967 struct usbd_xfer *xfer = addr; 968 struct usbd_pipe *pipe = xfer->ux_pipe; 969 uhci_softc_t *sc; 970 u_char *p; 971 972 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 973 974 if (__predict_false(pipe->up_dev == NULL || pipe->up_dev->ud_bus == NULL)) 975 return; /* device has detached */ 976 sc = pipe->up_dev->ud_bus->ub_hcpriv; 977 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 978 979 p = xfer->ux_buf; 980 p[0] = 0; 981 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 982 p[0] |= 1<<1; 983 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 984 p[0] |= 1<<2; 985 if (p[0] == 0) 986 /* No change, try again in a while */ 987 return; 988 989 xfer->ux_actlen = 1; 990 xfer->ux_status = USBD_NORMAL_COMPLETION; 991 mutex_enter(&sc->sc_lock); 992 usb_transfer_complete(xfer); 993 mutex_exit(&sc->sc_lock); 994 } 995 996 void 997 uhci_root_intr_done(struct usbd_xfer *xfer) 998 { 999 } 1000 1001 /* 1002 * Let the last QH loop back to the high speed control transfer QH. 1003 * This is what intel calls "bandwidth reclamation" and improves 1004 * USB performance a lot for some devices. 1005 * If we are already looping, just count it. 1006 */ 1007 void 1008 uhci_add_loop(uhci_softc_t *sc) 1009 { 1010 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1011 1012 #ifdef UHCI_DEBUG 1013 if (uhcinoloop) 1014 return; 1015 #endif 1016 if (++sc->sc_loops == 1) { 1017 DPRINTFN(5, "add loop", 0, 0, 0, 0); 1018 /* Note, we don't loop back the soft pointer. */ 1019 sc->sc_last_qh->qh.qh_hlink = 1020 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1021 usb_syncmem(&sc->sc_last_qh->dma, 1022 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1023 sizeof(sc->sc_last_qh->qh.qh_hlink), 1024 BUS_DMASYNC_PREWRITE); 1025 } 1026 } 1027 1028 void 1029 uhci_rem_loop(uhci_softc_t *sc) 1030 { 1031 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1032 1033 #ifdef UHCI_DEBUG 1034 if (uhcinoloop) 1035 return; 1036 #endif 1037 if (--sc->sc_loops == 0) { 1038 DPRINTFN(5, "remove loop", 0, 0, 0, 0); 1039 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1040 usb_syncmem(&sc->sc_last_qh->dma, 1041 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1042 sizeof(sc->sc_last_qh->qh.qh_hlink), 1043 BUS_DMASYNC_PREWRITE); 1044 } 1045 } 1046 1047 /* Add high speed control QH, called with lock held. */ 1048 void 1049 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1050 { 1051 uhci_soft_qh_t *eqh; 1052 1053 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1054 1055 KASSERT(mutex_owned(&sc->sc_lock)); 1056 1057 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1058 eqh = sc->sc_hctl_end; 1059 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1060 sizeof(eqh->qh.qh_hlink), 1061 BUS_DMASYNC_POSTWRITE); 1062 sqh->hlink = eqh->hlink; 1063 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1064 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1065 BUS_DMASYNC_PREWRITE); 1066 eqh->hlink = sqh; 1067 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1068 sc->sc_hctl_end = sqh; 1069 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1070 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1071 #ifdef UHCI_CTL_LOOP 1072 uhci_add_loop(sc); 1073 #endif 1074 } 1075 1076 /* Remove high speed control QH, called with lock held. */ 1077 void 1078 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1079 { 1080 uhci_soft_qh_t *pqh; 1081 uint32_t elink; 1082 1083 KASSERT(mutex_owned(&sc->sc_lock)); 1084 1085 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1086 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1087 #ifdef UHCI_CTL_LOOP 1088 uhci_rem_loop(sc); 1089 #endif 1090 /* 1091 * The T bit should be set in the elink of the QH so that the HC 1092 * doesn't follow the pointer. This condition may fail if the 1093 * the transferred packet was short so that the QH still points 1094 * at the last used TD. 1095 * In this case we set the T bit and wait a little for the HC 1096 * to stop looking at the TD. 1097 * Note that if the TD chain is large enough, the controller 1098 * may still be looking at the chain at the end of this function. 1099 * uhci_free_std_chain() will make sure the controller stops 1100 * looking at it quickly, but until then we should not change 1101 * sqh->hlink. 1102 */ 1103 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1104 sizeof(sqh->qh.qh_elink), 1105 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1106 elink = le32toh(sqh->qh.qh_elink); 1107 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1108 sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD); 1109 if (!(elink & UHCI_PTR_T)) { 1110 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1111 usb_syncmem(&sqh->dma, 1112 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1113 sizeof(sqh->qh.qh_elink), 1114 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1115 delay(UHCI_QH_REMOVE_DELAY); 1116 } 1117 1118 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1119 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1120 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1121 pqh->hlink = sqh->hlink; 1122 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1123 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1124 sizeof(pqh->qh.qh_hlink), 1125 BUS_DMASYNC_PREWRITE); 1126 delay(UHCI_QH_REMOVE_DELAY); 1127 if (sc->sc_hctl_end == sqh) 1128 sc->sc_hctl_end = pqh; 1129 } 1130 1131 /* Add low speed control QH, called with lock held. */ 1132 void 1133 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1134 { 1135 uhci_soft_qh_t *eqh; 1136 1137 KASSERT(mutex_owned(&sc->sc_lock)); 1138 1139 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1140 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1141 1142 eqh = sc->sc_lctl_end; 1143 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1144 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1145 sqh->hlink = eqh->hlink; 1146 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1147 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1148 BUS_DMASYNC_PREWRITE); 1149 eqh->hlink = sqh; 1150 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1151 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1152 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1153 sc->sc_lctl_end = sqh; 1154 } 1155 1156 /* Remove low speed control QH, called with lock held. */ 1157 void 1158 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1159 { 1160 uhci_soft_qh_t *pqh; 1161 uint32_t elink; 1162 1163 KASSERT(mutex_owned(&sc->sc_lock)); 1164 1165 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1166 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1167 1168 /* See comment in uhci_remove_hs_ctrl() */ 1169 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1170 sizeof(sqh->qh.qh_elink), 1171 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1172 elink = le32toh(sqh->qh.qh_elink); 1173 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1174 sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD); 1175 if (!(elink & UHCI_PTR_T)) { 1176 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1177 usb_syncmem(&sqh->dma, 1178 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1179 sizeof(sqh->qh.qh_elink), 1180 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1181 delay(UHCI_QH_REMOVE_DELAY); 1182 } 1183 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1184 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1185 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1186 pqh->hlink = sqh->hlink; 1187 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1188 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1189 sizeof(pqh->qh.qh_hlink), 1190 BUS_DMASYNC_PREWRITE); 1191 delay(UHCI_QH_REMOVE_DELAY); 1192 if (sc->sc_lctl_end == sqh) 1193 sc->sc_lctl_end = pqh; 1194 } 1195 1196 /* Add bulk QH, called with lock held. */ 1197 void 1198 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1199 { 1200 uhci_soft_qh_t *eqh; 1201 1202 KASSERT(mutex_owned(&sc->sc_lock)); 1203 1204 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1205 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1206 1207 eqh = sc->sc_bulk_end; 1208 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1209 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1210 sqh->hlink = eqh->hlink; 1211 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1212 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1213 BUS_DMASYNC_PREWRITE); 1214 eqh->hlink = sqh; 1215 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1216 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1217 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1218 sc->sc_bulk_end = sqh; 1219 uhci_add_loop(sc); 1220 } 1221 1222 /* Remove bulk QH, called with lock held. */ 1223 void 1224 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1225 { 1226 uhci_soft_qh_t *pqh; 1227 1228 KASSERT(mutex_owned(&sc->sc_lock)); 1229 1230 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1231 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1232 1233 uhci_rem_loop(sc); 1234 /* See comment in uhci_remove_hs_ctrl() */ 1235 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1236 sizeof(sqh->qh.qh_elink), 1237 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1238 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1239 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1240 usb_syncmem(&sqh->dma, 1241 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1242 sizeof(sqh->qh.qh_elink), 1243 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1244 delay(UHCI_QH_REMOVE_DELAY); 1245 } 1246 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1247 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1248 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1249 pqh->hlink = sqh->hlink; 1250 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1251 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1252 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1253 delay(UHCI_QH_REMOVE_DELAY); 1254 if (sc->sc_bulk_end == sqh) 1255 sc->sc_bulk_end = pqh; 1256 } 1257 1258 Static int uhci_intr1(uhci_softc_t *); 1259 1260 int 1261 uhci_intr(void *arg) 1262 { 1263 uhci_softc_t *sc = arg; 1264 int ret = 0; 1265 1266 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1267 1268 mutex_spin_enter(&sc->sc_intr_lock); 1269 1270 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1271 goto done; 1272 1273 if (sc->sc_bus.ub_usepolling || UREAD2(sc, UHCI_INTR) == 0) { 1274 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1275 goto done; 1276 } 1277 1278 ret = uhci_intr1(sc); 1279 1280 done: 1281 mutex_spin_exit(&sc->sc_intr_lock); 1282 return ret; 1283 } 1284 1285 int 1286 uhci_intr1(uhci_softc_t *sc) 1287 { 1288 int status; 1289 int ack; 1290 1291 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1292 1293 #ifdef UHCI_DEBUG 1294 if (uhcidebug > 15) { 1295 DPRINTF("sc %p", sc, 0, 0, 0); 1296 uhci_dumpregs(sc); 1297 } 1298 #endif 1299 1300 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1301 1302 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1303 if (status == 0) /* The interrupt was not for us. */ 1304 return 0; 1305 1306 if (sc->sc_suspend != PWR_RESUME) { 1307 #ifdef DIAGNOSTIC 1308 printf("%s: interrupt while not operating ignored\n", 1309 device_xname(sc->sc_dev)); 1310 #endif 1311 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1312 return 0; 1313 } 1314 1315 ack = 0; 1316 if (status & UHCI_STS_USBINT) 1317 ack |= UHCI_STS_USBINT; 1318 if (status & UHCI_STS_USBEI) 1319 ack |= UHCI_STS_USBEI; 1320 if (status & UHCI_STS_RD) { 1321 ack |= UHCI_STS_RD; 1322 #ifdef UHCI_DEBUG 1323 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1324 #endif 1325 } 1326 if (status & UHCI_STS_HSE) { 1327 ack |= UHCI_STS_HSE; 1328 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1329 } 1330 if (status & UHCI_STS_HCPE) { 1331 ack |= UHCI_STS_HCPE; 1332 printf("%s: host controller process error\n", 1333 device_xname(sc->sc_dev)); 1334 } 1335 1336 /* When HCHalted=1 and Run/Stop=0 , it is normal */ 1337 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) { 1338 /* no acknowledge needed */ 1339 if (!sc->sc_dying) { 1340 printf("%s: host controller halted\n", 1341 device_xname(sc->sc_dev)); 1342 #ifdef UHCI_DEBUG 1343 uhci_dump_all(sc); 1344 #endif 1345 } 1346 sc->sc_dying = 1; 1347 } 1348 1349 if (!ack) 1350 return 0; /* nothing to acknowledge */ 1351 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1352 1353 usb_schedsoftintr(&sc->sc_bus); 1354 1355 DPRINTFN(15, "sc %p done", sc, 0, 0, 0); 1356 1357 return 1; 1358 } 1359 1360 void 1361 uhci_softintr(void *v) 1362 { 1363 struct usbd_bus *bus = v; 1364 uhci_softc_t *sc = bus->ub_hcpriv; 1365 uhci_intr_info_t *ii, *nextii; 1366 1367 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1368 DPRINTF("sc %p", sc, 0, 0, 0); 1369 1370 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1371 1372 /* 1373 * Interrupts on UHCI really suck. When the host controller 1374 * interrupts because a transfer is completed there is no 1375 * way of knowing which transfer it was. You can scan down 1376 * the TDs and QHs of the previous frame to limit the search, 1377 * but that assumes that the interrupt was not delayed by more 1378 * than 1 ms, which may not always be true (e.g. after debug 1379 * output on a slow console). 1380 * We scan all interrupt descriptors to see if any have 1381 * completed. 1382 */ 1383 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1384 nextii = LIST_NEXT(ii, list); 1385 uhci_check_intr(sc, ii); 1386 } 1387 1388 if (sc->sc_softwake) { 1389 sc->sc_softwake = 0; 1390 cv_broadcast(&sc->sc_softwake_cv); 1391 } 1392 } 1393 1394 /* Check for an interrupt. */ 1395 void 1396 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1397 { 1398 uhci_soft_td_t *std, *lstd; 1399 uint32_t status; 1400 1401 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1402 DPRINTFN(15, "ii %p", ii, 0, 0, 0); 1403 #ifdef DIAGNOSTIC 1404 if (ii == NULL) { 1405 printf("uhci_check_intr: no ii? %p\n", ii); 1406 return; 1407 } 1408 #endif 1409 if (ii->xfer->ux_status == USBD_CANCELLED || 1410 ii->xfer->ux_status == USBD_TIMEOUT) { 1411 DPRINTF("aborted xfer %p", ii->xfer, 0, 0, 0); 1412 return; 1413 } 1414 1415 if (ii->stdstart == NULL) 1416 return; 1417 lstd = ii->stdend; 1418 #ifdef DIAGNOSTIC 1419 if (lstd == NULL) { 1420 printf("uhci_check_intr: std==0\n"); 1421 return; 1422 } 1423 #endif 1424 usb_syncmem(&lstd->dma, 1425 lstd->offs + offsetof(uhci_td_t, td_status), 1426 sizeof(lstd->td.td_status), 1427 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1428 status = le32toh(lstd->td.td_status); 1429 usb_syncmem(&lstd->dma, 1430 lstd->offs + offsetof(uhci_td_t, td_status), 1431 sizeof(lstd->td.td_status), 1432 BUS_DMASYNC_PREREAD); 1433 1434 /* If the last TD is not marked active we can complete */ 1435 if (!(status & UHCI_TD_ACTIVE)) { 1436 done: 1437 DPRINTFN(12, "ii=%p done", ii, 0, 0, 0); 1438 1439 callout_stop(&ii->xfer->ux_callout); 1440 uhci_idone(ii); 1441 return; 1442 } 1443 1444 /* 1445 * If the last TD is still active we need to check whether there 1446 * is an error somewhere in the middle, or whether there was a 1447 * short packet (SPD and not ACTIVE). 1448 */ 1449 DPRINTFN(12, "active ii=%p", ii, 0, 0, 0); 1450 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1451 usb_syncmem(&std->dma, 1452 std->offs + offsetof(uhci_td_t, td_status), 1453 sizeof(std->td.td_status), 1454 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1455 status = le32toh(std->td.td_status); 1456 usb_syncmem(&std->dma, 1457 std->offs + offsetof(uhci_td_t, td_status), 1458 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1459 1460 /* If there's an active TD the xfer isn't done. */ 1461 if (status & UHCI_TD_ACTIVE) { 1462 DPRINTFN(12, "ii=%p std=%p still active", 1463 ii, std, 0, 0); 1464 return; 1465 } 1466 1467 /* Any kind of error makes the xfer done. */ 1468 if (status & UHCI_TD_STALLED) 1469 goto done; 1470 1471 /* 1472 * If the data phase of a control transfer is short, we need 1473 * to complete the status stage 1474 */ 1475 struct usbd_xfer *xfer = ii->xfer; 1476 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 1477 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1478 1479 if ((status & UHCI_TD_SPD) && xfertype == UE_CONTROL) { 1480 struct uhci_pipe *upipe = 1481 (struct uhci_pipe *)xfer->ux_pipe; 1482 uhci_soft_qh_t *sqh = upipe->u.ctl.sqh; 1483 uhci_soft_td_t *stat = upipe->u.ctl.stat; 1484 1485 DPRINTFN(12, "ii=%p std=%p control status" 1486 "phase needs completion", ii, ii->stdstart, 0, 0); 1487 1488 sqh->qh.qh_elink = 1489 htole32(stat->physaddr | UHCI_PTR_TD); 1490 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1491 BUS_DMASYNC_PREWRITE); 1492 break; 1493 } 1494 1495 /* We want short packets, and it is short: it's done */ 1496 usb_syncmem(&std->dma, 1497 std->offs + offsetof(uhci_td_t, td_token), 1498 sizeof(std->td.td_token), 1499 BUS_DMASYNC_POSTWRITE); 1500 1501 if ((status & UHCI_TD_SPD) && 1502 UHCI_TD_GET_ACTLEN(status) < 1503 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) { 1504 goto done; 1505 } 1506 } 1507 } 1508 1509 /* Called with USB lock held. */ 1510 void 1511 uhci_idone(uhci_intr_info_t *ii) 1512 { 1513 struct usbd_xfer *xfer = ii->xfer; 1514 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 1515 #ifdef DIAGNOSTIC 1516 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 1517 #endif 1518 uhci_soft_td_t *std; 1519 uint32_t status = 0, nstatus; 1520 int actlen; 1521 1522 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1523 1524 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1525 DPRINTFN(12, "ii=%p", ii, 0, 0, 0); 1526 1527 #ifdef DIAGNOSTIC 1528 { 1529 /* XXX SMP? */ 1530 int s = splhigh(); 1531 if (ii->isdone) { 1532 splx(s); 1533 #ifdef UHCI_DEBUG 1534 printf("uhci_idone: ii is done!\n "); 1535 uhci_dump_ii(ii); 1536 #else 1537 printf("uhci_idone: ii=%p is done!\n", ii); 1538 #endif 1539 return; 1540 } 1541 ii->isdone = 1; 1542 splx(s); 1543 } 1544 #endif 1545 1546 if (xfer->ux_nframes != 0) { 1547 /* Isoc transfer, do things differently. */ 1548 uhci_soft_td_t **stds = upipe->u.iso.stds; 1549 int i, n, nframes, len; 1550 1551 DPRINTFN(5, "ii=%p isoc ready", ii, 0, 0, 0); 1552 1553 nframes = xfer->ux_nframes; 1554 actlen = 0; 1555 n = UXFER(xfer)->curframe; 1556 for (i = 0; i < nframes; i++) { 1557 std = stds[n]; 1558 #ifdef UHCI_DEBUG 1559 if (uhcidebug > 5) { 1560 DPRINTF("isoc TD %d", i, 0, 0, 0); 1561 uhci_dump_td(std); 1562 } 1563 #endif 1564 if (++n >= UHCI_VFRAMELIST_COUNT) 1565 n = 0; 1566 usb_syncmem(&std->dma, 1567 std->offs + offsetof(uhci_td_t, td_status), 1568 sizeof(std->td.td_status), 1569 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1570 status = le32toh(std->td.td_status); 1571 len = UHCI_TD_GET_ACTLEN(status); 1572 xfer->ux_frlengths[i] = len; 1573 actlen += len; 1574 } 1575 upipe->u.iso.inuse -= nframes; 1576 xfer->ux_actlen = actlen; 1577 xfer->ux_status = USBD_NORMAL_COMPLETION; 1578 goto end; 1579 } 1580 1581 #ifdef UHCI_DEBUG 1582 DPRINTFN(10, "ii=%p, xfer=%p, pipe=%p ready", 1583 ii, xfer, upipe, 0); 1584 if (uhcidebug > 10) 1585 uhci_dump_tds(ii->stdstart); 1586 #endif 1587 1588 /* The transfer is done, compute actual length and status. */ 1589 actlen = 0; 1590 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1591 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1592 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1593 nstatus = le32toh(std->td.td_status); 1594 if (nstatus & UHCI_TD_ACTIVE) 1595 break; 1596 1597 status = nstatus; 1598 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1599 UHCI_TD_PID_SETUP) 1600 actlen += UHCI_TD_GET_ACTLEN(status); 1601 else { 1602 /* 1603 * UHCI will report CRCTO in addition to a STALL or NAK 1604 * for a SETUP transaction. See section 3.2.2, "TD 1605 * CONTROL AND STATUS". 1606 */ 1607 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1608 status &= ~UHCI_TD_CRCTO; 1609 } 1610 } 1611 /* If there are left over TDs we need to update the toggle. */ 1612 if (std != NULL) 1613 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1614 1615 status &= UHCI_TD_ERROR; 1616 DPRINTFN(10, "actlen=%d, status=0x%x", actlen, status, 1617 0, 0); 1618 xfer->ux_actlen = actlen; 1619 if (status != 0) { 1620 1621 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1622 "error, addr=%d, endpt=0x%02x", 1623 xfer->ux_pipe->up_dev->ud_addr, 1624 xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress, 1625 0, 0); 1626 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1627 "bitstuff=%d crcto =%d nak =%d babble =%d", 1628 status & UHCI_TD_BITSTUFF, 1629 status & UHCI_TD_CRCTO, 1630 status & UHCI_TD_NAK, 1631 status & UHCI_TD_BABBLE); 1632 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1633 "dbuffer =%d stalled =%d active =%d", 1634 status & UHCI_TD_DBUFFER, 1635 status & UHCI_TD_STALLED, 1636 status & UHCI_TD_ACTIVE, 1637 0); 1638 1639 if (status == UHCI_TD_STALLED) 1640 xfer->ux_status = USBD_STALLED; 1641 else 1642 xfer->ux_status = USBD_IOERROR; /* more info XXX */ 1643 } else { 1644 xfer->ux_status = USBD_NORMAL_COMPLETION; 1645 } 1646 1647 end: 1648 usb_transfer_complete(xfer); 1649 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1650 DPRINTFN(12, "ii=%p done", ii, 0, 0, 0); 1651 } 1652 1653 /* 1654 * Called when a request does not complete. 1655 */ 1656 void 1657 uhci_timeout(void *addr) 1658 { 1659 uhci_intr_info_t *ii = addr; 1660 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1661 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.ux_pipe; 1662 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 1663 1664 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1665 1666 DPRINTF("uxfer %p", uxfer, 0, 0, 0); 1667 1668 if (sc->sc_dying) { 1669 mutex_enter(&sc->sc_lock); 1670 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1671 mutex_exit(&sc->sc_lock); 1672 return; 1673 } 1674 1675 /* Execute the abort in a process context. */ 1676 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer, 1677 USB_TASKQ_MPSAFE); 1678 usb_add_task(uxfer->xfer.ux_pipe->up_dev, &uxfer->abort_task, 1679 USB_TASKQ_HC); 1680 } 1681 1682 void 1683 uhci_timeout_task(void *addr) 1684 { 1685 struct usbd_xfer *xfer = addr; 1686 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 1687 1688 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1689 1690 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1691 1692 mutex_enter(&sc->sc_lock); 1693 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1694 mutex_exit(&sc->sc_lock); 1695 } 1696 1697 /* 1698 * Wait here until controller claims to have an interrupt. 1699 * Then call uhci_intr and return. Use timeout to avoid waiting 1700 * too long. 1701 * Only used during boot when interrupts are not enabled yet. 1702 */ 1703 void 1704 uhci_waitintr(uhci_softc_t *sc, struct usbd_xfer *xfer) 1705 { 1706 int timo = xfer->ux_timeout; 1707 uhci_intr_info_t *ii; 1708 1709 mutex_enter(&sc->sc_lock); 1710 1711 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1712 DPRINTFN(10, "timeout = %dms", timo, 0, 0, 0); 1713 1714 xfer->ux_status = USBD_IN_PROGRESS; 1715 for (; timo >= 0; timo--) { 1716 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_lock); 1717 DPRINTFN(20, "0x%04x", 1718 UREAD2(sc, UHCI_STS), 0, 0, 0); 1719 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1720 mutex_spin_enter(&sc->sc_intr_lock); 1721 uhci_intr1(sc); 1722 mutex_spin_exit(&sc->sc_intr_lock); 1723 if (xfer->ux_status != USBD_IN_PROGRESS) 1724 goto done; 1725 } 1726 } 1727 1728 /* Timeout */ 1729 DPRINTF("timeout", 0, 0, 0, 0); 1730 for (ii = LIST_FIRST(&sc->sc_intrhead); 1731 ii != NULL && ii->xfer != xfer; 1732 ii = LIST_NEXT(ii, list)) 1733 ; 1734 #ifdef DIAGNOSTIC 1735 if (ii == NULL) 1736 panic("uhci_waitintr: lost intr_info"); 1737 #endif 1738 uhci_idone(ii); 1739 1740 done: 1741 mutex_exit(&sc->sc_lock); 1742 } 1743 1744 void 1745 uhci_poll(struct usbd_bus *bus) 1746 { 1747 uhci_softc_t *sc = bus->ub_hcpriv; 1748 1749 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1750 mutex_spin_enter(&sc->sc_intr_lock); 1751 uhci_intr1(sc); 1752 mutex_spin_exit(&sc->sc_intr_lock); 1753 } 1754 } 1755 1756 void 1757 uhci_reset(uhci_softc_t *sc) 1758 { 1759 int n; 1760 1761 UHCICMD(sc, UHCI_CMD_HCRESET); 1762 /* The reset bit goes low when the controller is done. */ 1763 for (n = 0; n < UHCI_RESET_TIMEOUT && 1764 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1765 usb_delay_ms(&sc->sc_bus, 1); 1766 if (n >= UHCI_RESET_TIMEOUT) 1767 printf("%s: controller did not reset\n", 1768 device_xname(sc->sc_dev)); 1769 } 1770 1771 usbd_status 1772 uhci_run(uhci_softc_t *sc, int run, int locked) 1773 { 1774 int n, running; 1775 uint16_t cmd; 1776 1777 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1778 1779 run = run != 0; 1780 if (!locked) 1781 mutex_spin_enter(&sc->sc_intr_lock); 1782 1783 DPRINTF("setting run=%d", run, 0, 0, 0); 1784 cmd = UREAD2(sc, UHCI_CMD); 1785 if (run) 1786 cmd |= UHCI_CMD_RS; 1787 else 1788 cmd &= ~UHCI_CMD_RS; 1789 UHCICMD(sc, cmd); 1790 for(n = 0; n < 10; n++) { 1791 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1792 /* return when we've entered the state we want */ 1793 if (run == running) { 1794 if (!locked) 1795 mutex_spin_exit(&sc->sc_intr_lock); 1796 DPRINTF("done cmd=0x%x sts=0x%x", 1797 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 0, 0); 1798 return USBD_NORMAL_COMPLETION; 1799 } 1800 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock); 1801 } 1802 if (!locked) 1803 mutex_spin_exit(&sc->sc_intr_lock); 1804 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1805 run ? "start" : "stop"); 1806 return USBD_IOERROR; 1807 } 1808 1809 /* 1810 * Memory management routines. 1811 * uhci_alloc_std allocates TDs 1812 * uhci_alloc_sqh allocates QHs 1813 * These two routines do their own free list management, 1814 * partly for speed, partly because allocating DMAable memory 1815 * has page size granularaity so much memory would be wasted if 1816 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1817 */ 1818 1819 uhci_soft_td_t * 1820 uhci_alloc_std(uhci_softc_t *sc) 1821 { 1822 uhci_soft_td_t *std; 1823 usbd_status err; 1824 int i, offs; 1825 usb_dma_t dma; 1826 1827 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1828 1829 if (sc->sc_freetds == NULL) { 1830 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 1831 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1832 UHCI_TD_ALIGN, &dma); 1833 if (err) 1834 return 0; 1835 for (i = 0; i < UHCI_STD_CHUNK; i++) { 1836 offs = i * UHCI_STD_SIZE; 1837 std = KERNADDR(&dma, offs); 1838 std->physaddr = DMAADDR(&dma, offs); 1839 std->dma = dma; 1840 std->offs = offs; 1841 std->link.std = sc->sc_freetds; 1842 sc->sc_freetds = std; 1843 } 1844 } 1845 std = sc->sc_freetds; 1846 sc->sc_freetds = std->link.std; 1847 memset(&std->td, 0, sizeof(uhci_td_t)); 1848 return std; 1849 } 1850 1851 void 1852 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1853 { 1854 #ifdef DIAGNOSTIC 1855 #define TD_IS_FREE 0x12345678 1856 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1857 printf("uhci_free_std: freeing free TD %p\n", std); 1858 return; 1859 } 1860 std->td.td_token = htole32(TD_IS_FREE); 1861 #endif 1862 std->link.std = sc->sc_freetds; 1863 sc->sc_freetds = std; 1864 } 1865 1866 uhci_soft_qh_t * 1867 uhci_alloc_sqh(uhci_softc_t *sc) 1868 { 1869 uhci_soft_qh_t *sqh; 1870 usbd_status err; 1871 int i, offs; 1872 usb_dma_t dma; 1873 1874 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1875 1876 if (sc->sc_freeqhs == NULL) { 1877 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 1878 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1879 UHCI_QH_ALIGN, &dma); 1880 if (err) 1881 return 0; 1882 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1883 offs = i * UHCI_SQH_SIZE; 1884 sqh = KERNADDR(&dma, offs); 1885 sqh->physaddr = DMAADDR(&dma, offs); 1886 sqh->dma = dma; 1887 sqh->offs = offs; 1888 sqh->hlink = sc->sc_freeqhs; 1889 sc->sc_freeqhs = sqh; 1890 } 1891 } 1892 sqh = sc->sc_freeqhs; 1893 sc->sc_freeqhs = sqh->hlink; 1894 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1895 return sqh; 1896 } 1897 1898 void 1899 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1900 { 1901 sqh->hlink = sc->sc_freeqhs; 1902 sc->sc_freeqhs = sqh; 1903 } 1904 1905 void 1906 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1907 uhci_soft_td_t *stdend) 1908 { 1909 uhci_soft_td_t *p; 1910 uint32_t td_link; 1911 1912 /* 1913 * to avoid race condition with the controller which may be looking 1914 * at this chain, we need to first invalidate all links, and 1915 * then wait for the controller to move to another queue 1916 */ 1917 for (p = std; p != stdend; p = p->link.std) { 1918 usb_syncmem(&p->dma, 1919 p->offs + offsetof(uhci_td_t, td_link), 1920 sizeof(p->td.td_link), 1921 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1922 td_link = le32toh(p->td.td_link); 1923 usb_syncmem(&p->dma, 1924 p->offs + offsetof(uhci_td_t, td_link), 1925 sizeof(p->td.td_link), 1926 BUS_DMASYNC_PREREAD); 1927 if ((td_link & UHCI_PTR_T) == 0) { 1928 p->td.td_link = htole32(UHCI_PTR_T); 1929 usb_syncmem(&p->dma, 1930 p->offs + offsetof(uhci_td_t, td_link), 1931 sizeof(p->td.td_link), 1932 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1933 } 1934 } 1935 delay(UHCI_QH_REMOVE_DELAY); 1936 1937 for (; std != stdend; std = p) { 1938 p = std->link.std; 1939 uhci_free_std(sc, std); 1940 } 1941 } 1942 1943 usbd_status 1944 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1945 int rd, uint16_t flags, usb_dma_t *dma, 1946 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1947 { 1948 uhci_soft_td_t *p, *lastp; 1949 uhci_physaddr_t lastlink; 1950 int i, ntd, l, tog, maxp; 1951 uint32_t status; 1952 int addr = upipe->pipe.up_dev->ud_addr; 1953 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 1954 1955 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1956 1957 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 1958 addr, UE_GET_ADDR(endpt), len, upipe->pipe.up_dev->ud_speed); 1959 1960 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1961 1962 maxp = UGETW(upipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize); 1963 if (maxp == 0) { 1964 printf("uhci_alloc_std_chain: maxp=0\n"); 1965 return USBD_INVAL; 1966 } 1967 ntd = (len + maxp - 1) / maxp; 1968 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1969 ntd++; 1970 DPRINTFN(10, "maxp=%d ntd=%d", 1971 maxp, ntd, 0, 0); 1972 1973 if (ntd == 0) { 1974 *sp = *ep = NULL; 1975 DPRINTF("ntd=0", 0, 0, 0, 0); 1976 return USBD_NORMAL_COMPLETION; 1977 } 1978 tog = upipe->nexttoggle; 1979 if (ntd % 2 == 0) 1980 tog ^= 1; 1981 upipe->nexttoggle = tog ^ 1; 1982 lastp = NULL; 1983 lastlink = UHCI_PTR_T; 1984 ntd--; 1985 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1986 if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW) 1987 status |= UHCI_TD_LS; 1988 if (flags & USBD_SHORT_XFER_OK) 1989 status |= UHCI_TD_SPD; 1990 usb_syncmem(dma, 0, len, 1991 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1992 for (i = ntd; i >= 0; i--) { 1993 p = uhci_alloc_std(sc); 1994 if (p == NULL) { 1995 KASSERT(lastp != NULL); 1996 uhci_free_std_chain(sc, lastp, NULL); 1997 return USBD_NOMEM; 1998 } 1999 p->link.std = lastp; 2000 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 2001 lastp = p; 2002 lastlink = p->physaddr; 2003 p->td.td_status = htole32(status); 2004 if (i == ntd) { 2005 /* last TD */ 2006 l = len % maxp; 2007 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 2008 l = maxp; 2009 *ep = p; 2010 } else 2011 l = maxp; 2012 p->td.td_token = 2013 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 2014 UHCI_TD_OUT(l, endpt, addr, tog)); 2015 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 2016 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 2017 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2018 tog ^= 1; 2019 } 2020 *sp = lastp; 2021 DPRINTFN(10, "nexttog=%d", upipe->nexttoggle, 2022 0, 0, 0); 2023 2024 return USBD_NORMAL_COMPLETION; 2025 } 2026 2027 void 2028 uhci_device_clear_toggle(struct usbd_pipe *pipe) 2029 { 2030 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2031 upipe->nexttoggle = 0; 2032 } 2033 2034 void 2035 uhci_noop(struct usbd_pipe *pipe) 2036 { 2037 } 2038 2039 usbd_status 2040 uhci_device_bulk_transfer(struct usbd_xfer *xfer) 2041 { 2042 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2043 usbd_status err; 2044 2045 /* Insert last in queue. */ 2046 mutex_enter(&sc->sc_lock); 2047 err = usb_insert_transfer(xfer); 2048 mutex_exit(&sc->sc_lock); 2049 if (err) 2050 return err; 2051 2052 /* 2053 * Pipe isn't running (otherwise err would be USBD_INPROG), 2054 * so start it first. 2055 */ 2056 return uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2057 } 2058 2059 usbd_status 2060 uhci_device_bulk_start(struct usbd_xfer *xfer) 2061 { 2062 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2063 struct usbd_device *dev = upipe->pipe.up_dev; 2064 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2065 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2066 uhci_soft_td_t *data, *dataend; 2067 uhci_soft_qh_t *sqh; 2068 usbd_status err; 2069 int len, isread, endpt; 2070 2071 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2072 DPRINTFN(3, "xfer=%p len=%d flags=%d ii=%p", 2073 xfer, xfer->ux_length, xfer->ux_flags, ii); 2074 2075 if (sc->sc_dying) 2076 return USBD_IOERROR; 2077 2078 #ifdef DIAGNOSTIC 2079 if (xfer->ux_rqflags & URQ_REQUEST) 2080 panic("uhci_device_bulk_transfer: a request"); 2081 #endif 2082 2083 mutex_enter(&sc->sc_lock); 2084 2085 len = xfer->ux_length; 2086 endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2087 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2088 sqh = upipe->u.bulk.sqh; 2089 2090 upipe->u.bulk.isread = isread; 2091 upipe->u.bulk.length = len; 2092 2093 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->ux_flags, 2094 &xfer->ux_dmabuf, &data, &dataend); 2095 if (err) { 2096 mutex_exit(&sc->sc_lock); 2097 return err; 2098 } 2099 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2100 usb_syncmem(&dataend->dma, 2101 dataend->offs + offsetof(uhci_td_t, td_status), 2102 sizeof(dataend->td.td_status), 2103 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2104 2105 2106 #ifdef UHCI_DEBUG 2107 if (uhcidebug > 8) { 2108 DPRINTFN(8, "data(1)", 0, 0, 0, 0); 2109 uhci_dump_tds(data); 2110 } 2111 #endif 2112 2113 /* Set up interrupt info. */ 2114 ii->xfer = xfer; 2115 ii->stdstart = data; 2116 ii->stdend = dataend; 2117 #ifdef DIAGNOSTIC 2118 if (!ii->isdone) { 2119 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2120 } 2121 ii->isdone = 0; 2122 #endif 2123 2124 sqh->elink = data; 2125 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2126 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2127 2128 uhci_add_bulk(sc, sqh); 2129 uhci_add_intr_info(sc, ii); 2130 2131 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2132 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2133 uhci_timeout, ii); 2134 } 2135 xfer->ux_status = USBD_IN_PROGRESS; 2136 2137 #ifdef UHCI_DEBUG 2138 if (uhcidebug > 10) { 2139 DPRINTFN(10, "data(2)", 0, 0, 0, 0); 2140 uhci_dump_tds(data); 2141 } 2142 #endif 2143 2144 if (sc->sc_bus.ub_usepolling) 2145 uhci_waitintr(sc, xfer); 2146 2147 mutex_exit(&sc->sc_lock); 2148 return USBD_IN_PROGRESS; 2149 } 2150 2151 /* Abort a device bulk request. */ 2152 void 2153 uhci_device_bulk_abort(struct usbd_xfer *xfer) 2154 { 2155 #ifdef DIAGNOSTIC 2156 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2157 #endif 2158 2159 KASSERT(mutex_owned(&sc->sc_lock)); 2160 2161 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2162 2163 uhci_abort_xfer(xfer, USBD_CANCELLED); 2164 } 2165 2166 /* 2167 * Abort a device request. 2168 * If this routine is called at splusb() it guarantees that the request 2169 * will be removed from the hardware scheduling and that the callback 2170 * for it will be called with USBD_CANCELLED status. 2171 * It's impossible to guarantee that the requested transfer will not 2172 * have happened since the hardware runs concurrently. 2173 * If the transaction has already happened we rely on the ordinary 2174 * interrupt processing to process it. 2175 * XXX This is most probably wrong. 2176 * XXXMRG this doesn't make sense anymore. 2177 */ 2178 void 2179 uhci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2180 { 2181 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2182 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2183 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 2184 uhci_soft_td_t *std; 2185 int wake; 2186 2187 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2188 DPRINTFN(1,"xfer=%p, status=%d", xfer, status, 0, 0); 2189 2190 KASSERT(mutex_owned(&sc->sc_lock)); 2191 ASSERT_SLEEPABLE(); 2192 2193 if (sc->sc_dying) { 2194 /* If we're dying, just do the software part. */ 2195 xfer->ux_status = status; /* make software ignore it */ 2196 callout_stop(&xfer->ux_callout); 2197 usb_transfer_complete(xfer); 2198 return; 2199 } 2200 2201 /* 2202 * If an abort is already in progress then just wait for it to 2203 * complete and return. 2204 */ 2205 if (xfer->ux_hcflags & UXFER_ABORTING) { 2206 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2207 #ifdef DIAGNOSTIC 2208 if (status == USBD_TIMEOUT) 2209 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2210 #endif 2211 /* Override the status which might be USBD_TIMEOUT. */ 2212 xfer->ux_status = status; 2213 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2214 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2215 while (xfer->ux_hcflags & UXFER_ABORTING) 2216 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2217 goto done; 2218 } 2219 xfer->ux_hcflags |= UXFER_ABORTING; 2220 2221 /* 2222 * Step 1: Make interrupt routine and hardware ignore xfer. 2223 */ 2224 xfer->ux_status = status; /* make software ignore it */ 2225 callout_stop(&xfer->ux_callout); 2226 DPRINTF("stop ii=%p", ii, 0, 0, 0); 2227 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2228 usb_syncmem(&std->dma, 2229 std->offs + offsetof(uhci_td_t, td_status), 2230 sizeof(std->td.td_status), 2231 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2232 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2233 usb_syncmem(&std->dma, 2234 std->offs + offsetof(uhci_td_t, td_status), 2235 sizeof(std->td.td_status), 2236 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2237 } 2238 2239 /* 2240 * Step 2: Wait until we know hardware has finished any possible 2241 * use of the xfer. Also make sure the soft interrupt routine 2242 * has run. 2243 */ 2244 /* Hardware finishes in 1ms */ 2245 usb_delay_ms_locked(upipe->pipe.up_dev->ud_bus, 2, &sc->sc_lock); 2246 sc->sc_softwake = 1; 2247 usb_schedsoftintr(&sc->sc_bus); 2248 DPRINTF("cv_wait", 0, 0, 0, 0); 2249 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2250 2251 /* 2252 * Step 3: Execute callback. 2253 */ 2254 DPRINTF("callback", 0, 0, 0, 0); 2255 #ifdef DIAGNOSTIC 2256 ii->isdone = 1; 2257 #endif 2258 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2259 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2260 usb_transfer_complete(xfer); 2261 if (wake) 2262 cv_broadcast(&xfer->ux_hccv); 2263 done: 2264 KASSERT(mutex_owned(&sc->sc_lock)); 2265 } 2266 2267 /* Close a device bulk pipe. */ 2268 void 2269 uhci_device_bulk_close(struct usbd_pipe *pipe) 2270 { 2271 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2272 struct usbd_device *dev = upipe->pipe.up_dev; 2273 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2274 2275 KASSERT(mutex_owned(&sc->sc_lock)); 2276 2277 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2278 2279 pipe->up_endpoint->ue_toggle = upipe->nexttoggle; 2280 } 2281 2282 usbd_status 2283 uhci_device_ctrl_transfer(struct usbd_xfer *xfer) 2284 { 2285 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2286 usbd_status err; 2287 2288 /* Insert last in queue. */ 2289 mutex_enter(&sc->sc_lock); 2290 err = usb_insert_transfer(xfer); 2291 mutex_exit(&sc->sc_lock); 2292 if (err) 2293 return err; 2294 2295 /* 2296 * Pipe isn't running (otherwise err would be USBD_INPROG), 2297 * so start it first. 2298 */ 2299 return uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2300 } 2301 2302 usbd_status 2303 uhci_device_ctrl_start(struct usbd_xfer *xfer) 2304 { 2305 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2306 usbd_status err; 2307 2308 if (sc->sc_dying) 2309 return USBD_IOERROR; 2310 2311 #ifdef DIAGNOSTIC 2312 if (!(xfer->ux_rqflags & URQ_REQUEST)) 2313 panic("uhci_device_ctrl_transfer: not a request"); 2314 #endif 2315 2316 mutex_enter(&sc->sc_lock); 2317 err = uhci_device_request(xfer); 2318 mutex_exit(&sc->sc_lock); 2319 if (err) 2320 return err; 2321 2322 if (sc->sc_bus.ub_usepolling) 2323 uhci_waitintr(sc, xfer); 2324 return USBD_IN_PROGRESS; 2325 } 2326 2327 usbd_status 2328 uhci_device_intr_transfer(struct usbd_xfer *xfer) 2329 { 2330 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2331 usbd_status err; 2332 2333 /* Insert last in queue. */ 2334 mutex_enter(&sc->sc_lock); 2335 err = usb_insert_transfer(xfer); 2336 mutex_exit(&sc->sc_lock); 2337 if (err) 2338 return err; 2339 2340 /* 2341 * Pipe isn't running (otherwise err would be USBD_INPROG), 2342 * so start it first. 2343 */ 2344 return uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2345 } 2346 2347 usbd_status 2348 uhci_device_intr_start(struct usbd_xfer *xfer) 2349 { 2350 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2351 struct usbd_device *dev = upipe->pipe.up_dev; 2352 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2353 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2354 uhci_soft_td_t *data, *dataend; 2355 uhci_soft_qh_t *sqh; 2356 usbd_status err; 2357 int isread, endpt; 2358 int i; 2359 2360 if (sc->sc_dying) 2361 return USBD_IOERROR; 2362 2363 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2364 2365 DPRINTFN(3, "xfer=%p len=%d flags=%d", 2366 xfer, xfer->ux_length, xfer->ux_flags, 0); 2367 2368 #ifdef DIAGNOSTIC 2369 if (xfer->ux_rqflags & URQ_REQUEST) 2370 panic("uhci_device_intr_transfer: a request"); 2371 #endif 2372 2373 mutex_enter(&sc->sc_lock); 2374 2375 endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2376 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2377 2378 upipe->u.intr.isread = isread; 2379 2380 err = uhci_alloc_std_chain(upipe, sc, xfer->ux_length, isread, 2381 xfer->ux_flags, &xfer->ux_dmabuf, &data, 2382 &dataend); 2383 if (err) { 2384 mutex_exit(&sc->sc_lock); 2385 return err; 2386 } 2387 2388 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2389 usb_syncmem(&dataend->dma, 2390 dataend->offs + offsetof(uhci_td_t, td_status), 2391 sizeof(dataend->td.td_status), 2392 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2393 2394 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 2395 #ifdef UHCI_DEBUG 2396 if (uhcidebug > 10) { 2397 uhci_dump_tds(data); 2398 uhci_dump_qh(upipe->u.intr.qhs[0]); 2399 } 2400 #endif 2401 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 2402 2403 /* Set up interrupt info. */ 2404 ii->xfer = xfer; 2405 ii->stdstart = data; 2406 ii->stdend = dataend; 2407 #ifdef DIAGNOSTIC 2408 if (!ii->isdone) { 2409 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2410 } 2411 ii->isdone = 0; 2412 #endif 2413 2414 DPRINTFN(10, "qhs[0]=%p", upipe->u.intr.qhs[0], 0, 0, 0); 2415 for (i = 0; i < upipe->u.intr.npoll; i++) { 2416 sqh = upipe->u.intr.qhs[i]; 2417 sqh->elink = data; 2418 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2419 usb_syncmem(&sqh->dma, 2420 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2421 sizeof(sqh->qh.qh_elink), 2422 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2423 } 2424 uhci_add_intr_info(sc, ii); 2425 xfer->ux_status = USBD_IN_PROGRESS; 2426 mutex_exit(&sc->sc_lock); 2427 2428 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 2429 #ifdef UHCI_DEBUG 2430 if (uhcidebug > 10) { 2431 uhci_dump_tds(data); 2432 uhci_dump_qh(upipe->u.intr.qhs[0]); 2433 } 2434 #endif 2435 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 2436 2437 return USBD_IN_PROGRESS; 2438 } 2439 2440 /* Abort a device control request. */ 2441 void 2442 uhci_device_ctrl_abort(struct usbd_xfer *xfer) 2443 { 2444 #ifdef DIAGNOSTIC 2445 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2446 #endif 2447 2448 KASSERT(mutex_owned(&sc->sc_lock)); 2449 2450 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2451 uhci_abort_xfer(xfer, USBD_CANCELLED); 2452 } 2453 2454 /* Close a device control pipe. */ 2455 void 2456 uhci_device_ctrl_close(struct usbd_pipe *pipe) 2457 { 2458 } 2459 2460 /* Abort a device interrupt request. */ 2461 void 2462 uhci_device_intr_abort(struct usbd_xfer *xfer) 2463 { 2464 #ifdef DIAGNOSTIC 2465 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2466 #endif 2467 2468 KASSERT(mutex_owned(&sc->sc_lock)); 2469 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2470 2471 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2472 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2473 2474 uhci_abort_xfer(xfer, USBD_CANCELLED); 2475 } 2476 2477 /* Close a device interrupt pipe. */ 2478 void 2479 uhci_device_intr_close(struct usbd_pipe *pipe) 2480 { 2481 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2482 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 2483 int i, npoll; 2484 2485 KASSERT(mutex_owned(&sc->sc_lock)); 2486 2487 /* Unlink descriptors from controller data structures. */ 2488 npoll = upipe->u.intr.npoll; 2489 for (i = 0; i < npoll; i++) 2490 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2491 2492 /* 2493 * We now have to wait for any activity on the physical 2494 * descriptors to stop. 2495 */ 2496 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2497 2498 for(i = 0; i < npoll; i++) 2499 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2500 kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *)); 2501 2502 /* XXX free other resources */ 2503 } 2504 2505 usbd_status 2506 uhci_device_request(struct usbd_xfer *xfer) 2507 { 2508 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2509 usb_device_request_t *req = &xfer->ux_request; 2510 struct usbd_device *dev = upipe->pipe.up_dev; 2511 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2512 int addr = dev->ud_addr; 2513 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2514 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2515 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2516 uhci_soft_qh_t *sqh; 2517 int len; 2518 uint32_t ls; 2519 usbd_status err; 2520 int isread; 2521 2522 KASSERT(mutex_owned(&sc->sc_lock)); 2523 2524 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2525 DPRINTFN(3, "type=0x%02x, request=0x%02x, " 2526 "wValue=0x%04x, wIndex=0x%04x", 2527 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2528 UGETW(req->wIndex)); 2529 DPRINTFN(3, "len=%d, addr=%d, endpt=%d", 2530 UGETW(req->wLength), dev->ud_addr, endpt, 0); 2531 2532 ls = dev->ud_speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2533 isread = req->bmRequestType & UT_READ; 2534 len = UGETW(req->wLength); 2535 2536 setup = upipe->u.ctl.setup; 2537 stat = upipe->u.ctl.stat; 2538 sqh = upipe->u.ctl.sqh; 2539 2540 /* Set up data transaction */ 2541 if (len != 0) { 2542 upipe->nexttoggle = 1; 2543 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->ux_flags, 2544 &xfer->ux_dmabuf, &data, &dataend); 2545 if (err) 2546 return err; 2547 next = data; 2548 dataend->link.std = stat; 2549 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_TD); 2550 usb_syncmem(&dataend->dma, 2551 dataend->offs + offsetof(uhci_td_t, td_link), 2552 sizeof(dataend->td.td_link), 2553 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2554 } else { 2555 next = stat; 2556 } 2557 upipe->u.ctl.length = len; 2558 2559 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2560 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2561 2562 setup->link.std = next; 2563 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_TD); 2564 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2565 UHCI_TD_ACTIVE); 2566 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2567 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2568 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2569 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2570 2571 stat->link.std = NULL; 2572 stat->td.td_link = htole32(UHCI_PTR_T); 2573 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2574 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2575 stat->td.td_token = 2576 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2577 UHCI_TD_IN (0, endpt, addr, 1)); 2578 stat->td.td_buffer = htole32(0); 2579 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2580 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2581 2582 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 2583 #ifdef UHCI_DEBUG 2584 if (uhcidebug > 10) { 2585 DPRINTFN(10, "before transfer", 0, 0, 0, 0); 2586 uhci_dump_tds(setup); 2587 } 2588 #endif 2589 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 2590 2591 /* Set up interrupt info. */ 2592 ii->xfer = xfer; 2593 ii->stdstart = setup; 2594 ii->stdend = stat; 2595 #ifdef DIAGNOSTIC 2596 if (!ii->isdone) { 2597 printf("uhci_device_request: not done, ii=%p\n", ii); 2598 } 2599 ii->isdone = 0; 2600 #endif 2601 2602 sqh->elink = setup; 2603 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2604 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2605 2606 if (dev->ud_speed == USB_SPEED_LOW) 2607 uhci_add_ls_ctrl(sc, sqh); 2608 else 2609 uhci_add_hs_ctrl(sc, sqh); 2610 uhci_add_intr_info(sc, ii); 2611 DPRINTFN(12, "--- dump start ---", 0, 0, 0, 0); 2612 #ifdef UHCI_DEBUG 2613 if (uhcidebug > 12) { 2614 uhci_soft_td_t *std; 2615 uhci_soft_qh_t *xqh; 2616 uhci_soft_qh_t *sxqh; 2617 int maxqh = 0; 2618 uhci_physaddr_t link; 2619 DPRINTFN(12, "follow from [0]", 0, 0, 0, 0); 2620 for (std = sc->sc_vframes[0].htd, link = 0; 2621 (link & UHCI_PTR_QH) == 0; 2622 std = std->link.std) { 2623 link = le32toh(std->td.td_link); 2624 uhci_dump_td(std); 2625 } 2626 sxqh = (uhci_soft_qh_t *)std; 2627 uhci_dump_qh(sxqh); 2628 for (xqh = sxqh; 2629 xqh != NULL; 2630 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2631 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2632 uhci_dump_qh(xqh); 2633 } 2634 DPRINTFN(12, "Enqueued QH:", 0, 0, 0, 0); 2635 uhci_dump_qh(sqh); 2636 uhci_dump_tds(sqh->elink); 2637 } 2638 #endif 2639 DPRINTFN(12, "--- dump end ---", 0, 0, 0, 0); 2640 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2641 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2642 uhci_timeout, ii); 2643 } 2644 xfer->ux_status = USBD_IN_PROGRESS; 2645 2646 return USBD_NORMAL_COMPLETION; 2647 } 2648 2649 usbd_status 2650 uhci_device_isoc_transfer(struct usbd_xfer *xfer) 2651 { 2652 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2653 usbd_status err; 2654 2655 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2656 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 2657 2658 /* Put it on our queue, */ 2659 mutex_enter(&sc->sc_lock); 2660 err = usb_insert_transfer(xfer); 2661 mutex_exit(&sc->sc_lock); 2662 2663 /* bail out on error, */ 2664 if (err && err != USBD_IN_PROGRESS) 2665 return err; 2666 2667 /* XXX should check inuse here */ 2668 2669 /* insert into schedule, */ 2670 uhci_device_isoc_enter(xfer); 2671 2672 /* and start if the pipe wasn't running */ 2673 if (!err) 2674 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2675 2676 return err; 2677 } 2678 2679 void 2680 uhci_device_isoc_enter(struct usbd_xfer *xfer) 2681 { 2682 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2683 struct usbd_device *dev = upipe->pipe.up_dev; 2684 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2685 struct iso *iso = &upipe->u.iso; 2686 uhci_soft_td_t *std; 2687 uint32_t buf, len, status, offs; 2688 int i, next, nframes; 2689 int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 2690 2691 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2692 DPRINTFN(5, "used=%d next=%d xfer=%p nframes=%d", 2693 iso->inuse, iso->next, xfer, xfer->ux_nframes); 2694 2695 if (sc->sc_dying) 2696 return; 2697 2698 if (xfer->ux_status == USBD_IN_PROGRESS) { 2699 /* This request has already been entered into the frame list */ 2700 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2701 /* XXX */ 2702 } 2703 2704 #ifdef DIAGNOSTIC 2705 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2706 printf("uhci_device_isoc_enter: overflow!\n"); 2707 #endif 2708 2709 next = iso->next; 2710 if (next == -1) { 2711 /* Not in use yet, schedule it a few frames ahead. */ 2712 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2713 DPRINTFN(2, "start next=%d", next, 0, 0, 0); 2714 } 2715 2716 xfer->ux_status = USBD_IN_PROGRESS; 2717 UXFER(xfer)->curframe = next; 2718 2719 buf = DMAADDR(&xfer->ux_dmabuf, 0); 2720 offs = 0; 2721 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2722 UHCI_TD_ACTIVE | 2723 UHCI_TD_IOS); 2724 nframes = xfer->ux_nframes; 2725 mutex_enter(&sc->sc_lock); 2726 for (i = 0; i < nframes; i++) { 2727 std = iso->stds[next]; 2728 if (++next >= UHCI_VFRAMELIST_COUNT) 2729 next = 0; 2730 len = xfer->ux_frlengths[i]; 2731 std->td.td_buffer = htole32(buf); 2732 usb_syncmem(&xfer->ux_dmabuf, offs, len, 2733 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2734 if (i == nframes - 1) 2735 status |= UHCI_TD_IOC; 2736 std->td.td_status = htole32(status); 2737 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2738 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2739 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2740 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2741 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 2742 #ifdef UHCI_DEBUG 2743 if (uhcidebug > 5) { 2744 DPRINTF("TD %d", i, 0, 0, 0); 2745 uhci_dump_td(std); 2746 } 2747 #endif 2748 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 2749 buf += len; 2750 offs += len; 2751 } 2752 iso->next = next; 2753 iso->inuse += xfer->ux_nframes; 2754 2755 mutex_exit(&sc->sc_lock); 2756 } 2757 2758 usbd_status 2759 uhci_device_isoc_start(struct usbd_xfer *xfer) 2760 { 2761 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2762 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 2763 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2764 uhci_soft_td_t *end; 2765 int i; 2766 2767 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2768 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 2769 2770 mutex_enter(&sc->sc_lock); 2771 2772 if (sc->sc_dying) { 2773 mutex_exit(&sc->sc_lock); 2774 return USBD_IOERROR; 2775 } 2776 2777 #ifdef DIAGNOSTIC 2778 if (xfer->ux_status != USBD_IN_PROGRESS) 2779 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2780 #endif 2781 2782 /* Find the last TD */ 2783 i = UXFER(xfer)->curframe + xfer->ux_nframes; 2784 if (i >= UHCI_VFRAMELIST_COUNT) 2785 i -= UHCI_VFRAMELIST_COUNT; 2786 end = upipe->u.iso.stds[i]; 2787 2788 #ifdef DIAGNOSTIC 2789 if (end == NULL) { 2790 printf("uhci_device_isoc_start: end == NULL\n"); 2791 return USBD_INVAL; 2792 } 2793 #endif 2794 2795 /* Set up interrupt info. */ 2796 ii->xfer = xfer; 2797 ii->stdstart = end; 2798 ii->stdend = end; 2799 #ifdef DIAGNOSTIC 2800 if (!ii->isdone) 2801 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2802 ii->isdone = 0; 2803 #endif 2804 uhci_add_intr_info(sc, ii); 2805 2806 mutex_exit(&sc->sc_lock); 2807 2808 return USBD_IN_PROGRESS; 2809 } 2810 2811 void 2812 uhci_device_isoc_abort(struct usbd_xfer *xfer) 2813 { 2814 #ifdef DIAGNOSTIC 2815 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2816 #endif 2817 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2818 uhci_soft_td_t **stds = upipe->u.iso.stds; 2819 uhci_soft_td_t *std; 2820 int i, n, nframes, maxlen, len; 2821 2822 KASSERT(mutex_owned(&sc->sc_lock)); 2823 2824 /* Transfer is already done. */ 2825 if (xfer->ux_status != USBD_NOT_STARTED && 2826 xfer->ux_status != USBD_IN_PROGRESS) { 2827 return; 2828 } 2829 2830 /* Give xfer the requested abort code. */ 2831 xfer->ux_status = USBD_CANCELLED; 2832 2833 /* make hardware ignore it, */ 2834 nframes = xfer->ux_nframes; 2835 n = UXFER(xfer)->curframe; 2836 maxlen = 0; 2837 for (i = 0; i < nframes; i++) { 2838 std = stds[n]; 2839 usb_syncmem(&std->dma, 2840 std->offs + offsetof(uhci_td_t, td_status), 2841 sizeof(std->td.td_status), 2842 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2843 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2844 usb_syncmem(&std->dma, 2845 std->offs + offsetof(uhci_td_t, td_status), 2846 sizeof(std->td.td_status), 2847 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2848 usb_syncmem(&std->dma, 2849 std->offs + offsetof(uhci_td_t, td_token), 2850 sizeof(std->td.td_token), 2851 BUS_DMASYNC_POSTWRITE); 2852 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2853 if (len > maxlen) 2854 maxlen = len; 2855 if (++n >= UHCI_VFRAMELIST_COUNT) 2856 n = 0; 2857 } 2858 2859 /* and wait until we are sure the hardware has finished. */ 2860 delay(maxlen); 2861 2862 #ifdef DIAGNOSTIC 2863 UXFER(xfer)->iinfo.isdone = 1; 2864 #endif 2865 /* Run callback and remove from interrupt list. */ 2866 usb_transfer_complete(xfer); 2867 2868 KASSERT(mutex_owned(&sc->sc_lock)); 2869 } 2870 2871 void 2872 uhci_device_isoc_close(struct usbd_pipe *pipe) 2873 { 2874 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2875 struct usbd_device *dev = upipe->pipe.up_dev; 2876 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2877 uhci_soft_td_t *std, *vstd; 2878 struct iso *iso; 2879 int i; 2880 2881 KASSERT(mutex_owned(&sc->sc_lock)); 2882 2883 /* 2884 * Make sure all TDs are marked as inactive. 2885 * Wait for completion. 2886 * Unschedule. 2887 * Deallocate. 2888 */ 2889 iso = &upipe->u.iso; 2890 2891 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2892 std = iso->stds[i]; 2893 usb_syncmem(&std->dma, 2894 std->offs + offsetof(uhci_td_t, td_status), 2895 sizeof(std->td.td_status), 2896 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2897 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2898 usb_syncmem(&std->dma, 2899 std->offs + offsetof(uhci_td_t, td_status), 2900 sizeof(std->td.td_status), 2901 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2902 } 2903 /* wait for completion */ 2904 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2905 2906 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2907 std = iso->stds[i]; 2908 for (vstd = sc->sc_vframes[i].htd; 2909 vstd != NULL && vstd->link.std != std; 2910 vstd = vstd->link.std) 2911 ; 2912 if (vstd == NULL) { 2913 /*panic*/ 2914 printf("uhci_device_isoc_close: %p not found\n", std); 2915 mutex_exit(&sc->sc_lock); 2916 return; 2917 } 2918 vstd->link = std->link; 2919 usb_syncmem(&std->dma, 2920 std->offs + offsetof(uhci_td_t, td_link), 2921 sizeof(std->td.td_link), 2922 BUS_DMASYNC_POSTWRITE); 2923 vstd->td.td_link = std->td.td_link; 2924 usb_syncmem(&vstd->dma, 2925 vstd->offs + offsetof(uhci_td_t, td_link), 2926 sizeof(vstd->td.td_link), 2927 BUS_DMASYNC_PREWRITE); 2928 uhci_free_std(sc, std); 2929 } 2930 2931 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2932 } 2933 2934 usbd_status 2935 uhci_setup_isoc(struct usbd_pipe *pipe) 2936 { 2937 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2938 struct usbd_device *dev = upipe->pipe.up_dev; 2939 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2940 int addr = upipe->pipe.up_dev->ud_addr; 2941 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2942 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2943 uhci_soft_td_t *std, *vstd; 2944 uint32_t token; 2945 struct iso *iso; 2946 int i; 2947 2948 iso = &upipe->u.iso; 2949 iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT * 2950 sizeof (uhci_soft_td_t *), 2951 KM_SLEEP); 2952 if (iso->stds == NULL) 2953 return USBD_NOMEM; 2954 2955 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2956 UHCI_TD_OUT(0, endpt, addr, 0); 2957 2958 mutex_enter(&sc->sc_lock); 2959 2960 /* Allocate the TDs and mark as inactive; */ 2961 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2962 std = uhci_alloc_std(sc); 2963 if (std == 0) 2964 goto bad; 2965 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2966 std->td.td_token = htole32(token); 2967 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2968 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2969 iso->stds[i] = std; 2970 } 2971 2972 /* Insert TDs into schedule. */ 2973 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2974 std = iso->stds[i]; 2975 vstd = sc->sc_vframes[i].htd; 2976 usb_syncmem(&vstd->dma, 2977 vstd->offs + offsetof(uhci_td_t, td_link), 2978 sizeof(vstd->td.td_link), 2979 BUS_DMASYNC_POSTWRITE); 2980 std->link = vstd->link; 2981 std->td.td_link = vstd->td.td_link; 2982 usb_syncmem(&std->dma, 2983 std->offs + offsetof(uhci_td_t, td_link), 2984 sizeof(std->td.td_link), 2985 BUS_DMASYNC_PREWRITE); 2986 vstd->link.std = std; 2987 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2988 usb_syncmem(&vstd->dma, 2989 vstd->offs + offsetof(uhci_td_t, td_link), 2990 sizeof(vstd->td.td_link), 2991 BUS_DMASYNC_PREWRITE); 2992 } 2993 mutex_exit(&sc->sc_lock); 2994 2995 iso->next = -1; 2996 iso->inuse = 0; 2997 2998 return USBD_NORMAL_COMPLETION; 2999 3000 bad: 3001 while (--i >= 0) 3002 uhci_free_std(sc, iso->stds[i]); 3003 mutex_exit(&sc->sc_lock); 3004 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 3005 return USBD_NOMEM; 3006 } 3007 3008 void 3009 uhci_device_isoc_done(struct usbd_xfer *xfer) 3010 { 3011 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3012 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3013 int i, offs; 3014 int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 3015 3016 3017 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3018 DPRINTFN(4, "length=%d, ux_state=0x%08x", 3019 xfer->ux_actlen, xfer->ux_state, 0, 0); 3020 3021 if (ii->xfer != xfer) 3022 /* Not on interrupt list, ignore it. */ 3023 return; 3024 3025 if (!uhci_active_intr_info(ii)) 3026 return; 3027 3028 #ifdef DIAGNOSTIC 3029 if (ii->stdend == NULL) { 3030 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 3031 #ifdef UHCI_DEBUG 3032 uhci_dump_ii(ii); 3033 #endif 3034 return; 3035 } 3036 #endif 3037 3038 /* Turn off the interrupt since it is active even if the TD is not. */ 3039 usb_syncmem(&ii->stdend->dma, 3040 ii->stdend->offs + offsetof(uhci_td_t, td_status), 3041 sizeof(ii->stdend->td.td_status), 3042 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3043 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 3044 usb_syncmem(&ii->stdend->dma, 3045 ii->stdend->offs + offsetof(uhci_td_t, td_status), 3046 sizeof(ii->stdend->td.td_status), 3047 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3048 3049 uhci_del_intr_info(ii); /* remove from active list */ 3050 3051 offs = 0; 3052 for (i = 0; i < xfer->ux_nframes; i++) { 3053 usb_syncmem(&xfer->ux_dmabuf, offs, xfer->ux_frlengths[i], 3054 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3055 offs += xfer->ux_frlengths[i]; 3056 } 3057 } 3058 3059 void 3060 uhci_device_intr_done(struct usbd_xfer *xfer) 3061 { 3062 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3063 uhci_softc_t *sc = ii->sc; 3064 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3065 uhci_soft_qh_t *sqh; 3066 int i, npoll, isread; 3067 3068 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3069 DPRINTFN(5, "length=%d", xfer->ux_actlen, 0, 0, 0); 3070 3071 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 3072 3073 npoll = upipe->u.intr.npoll; 3074 for(i = 0; i < npoll; i++) { 3075 sqh = upipe->u.intr.qhs[i]; 3076 sqh->elink = NULL; 3077 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3078 usb_syncmem(&sqh->dma, 3079 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3080 sizeof(sqh->qh.qh_elink), 3081 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3082 } 3083 uhci_free_std_chain(sc, ii->stdstart, NULL); 3084 3085 isread = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 3086 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 3087 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3088 3089 /* XXX Wasteful. */ 3090 if (xfer->ux_pipe->up_repeat) { 3091 uhci_soft_td_t *data, *dataend; 3092 3093 DPRINTFN(5, "re-queueing", 0, 0, 0, 0); 3094 3095 /* This alloc cannot fail since we freed the chain above. */ 3096 uhci_alloc_std_chain(upipe, sc, xfer->ux_length, 3097 upipe->u.intr.isread, xfer->ux_flags, 3098 &xfer->ux_dmabuf, &data, &dataend); 3099 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3100 usb_syncmem(&dataend->dma, 3101 dataend->offs + offsetof(uhci_td_t, td_status), 3102 sizeof(dataend->td.td_status), 3103 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3104 3105 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 3106 #ifdef UHCI_DEBUG 3107 if (uhcidebug > 10) { 3108 uhci_dump_tds(data); 3109 uhci_dump_qh(upipe->u.intr.qhs[0]); 3110 } 3111 #endif 3112 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 3113 3114 ii->stdstart = data; 3115 ii->stdend = dataend; 3116 #ifdef DIAGNOSTIC 3117 if (!ii->isdone) { 3118 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3119 } 3120 ii->isdone = 0; 3121 #endif 3122 for (i = 0; i < npoll; i++) { 3123 sqh = upipe->u.intr.qhs[i]; 3124 sqh->elink = data; 3125 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3126 usb_syncmem(&sqh->dma, 3127 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3128 sizeof(sqh->qh.qh_elink), 3129 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3130 } 3131 xfer->ux_status = USBD_IN_PROGRESS; 3132 /* The ii is already on the examined list, just leave it. */ 3133 } else { 3134 DPRINTFN(5, "removing", 0, 0, 0, 0); 3135 if (uhci_active_intr_info(ii)) 3136 uhci_del_intr_info(ii); 3137 } 3138 } 3139 3140 /* Deallocate request data structures */ 3141 void 3142 uhci_device_ctrl_done(struct usbd_xfer *xfer) 3143 { 3144 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3145 uhci_softc_t *sc = ii->sc; 3146 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3147 int len = UGETW(xfer->ux_request.wLength); 3148 int isread = (xfer->ux_request.bmRequestType & UT_READ); 3149 3150 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 3151 3152 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3153 #ifdef DIAGNOSTIC 3154 if (!(xfer->ux_rqflags & URQ_REQUEST)) 3155 panic("uhci_device_ctrl_done: not a request"); 3156 #endif 3157 3158 if (!uhci_active_intr_info(ii)) 3159 return; 3160 3161 uhci_del_intr_info(ii); /* remove from active list */ 3162 3163 if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW) 3164 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3165 else 3166 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3167 3168 if (upipe->u.ctl.length != 0) 3169 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3170 3171 if (len) { 3172 usb_syncmem(&xfer->ux_dmabuf, 0, len, 3173 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3174 } 3175 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3176 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3177 3178 DPRINTF("length=%d", xfer->ux_actlen, 0, 0, 0); 3179 } 3180 3181 /* Deallocate request data structures */ 3182 void 3183 uhci_device_bulk_done(struct usbd_xfer *xfer) 3184 { 3185 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3186 uhci_softc_t *sc = ii->sc; 3187 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3188 3189 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3190 DPRINTFN(5, "xfer=%p ii=%p sc=%p upipe=%p", xfer, ii, sc, 3191 upipe); 3192 3193 KASSERT(mutex_owned(&sc->sc_lock)); 3194 3195 if (!uhci_active_intr_info(ii)) 3196 return; 3197 3198 uhci_del_intr_info(ii); /* remove from active list */ 3199 3200 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3201 3202 uhci_free_std_chain(sc, ii->stdstart, NULL); 3203 3204 DPRINTFN(5, "length=%d", xfer->ux_actlen, 0, 0, 0); 3205 } 3206 3207 /* Add interrupt QH, called with vflock. */ 3208 void 3209 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3210 { 3211 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3212 uhci_soft_qh_t *eqh; 3213 3214 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3215 DPRINTFN(4, "n=%d sqh=%p", sqh->pos, sqh, 0, 0); 3216 3217 eqh = vf->eqh; 3218 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3219 sizeof(eqh->qh.qh_hlink), 3220 BUS_DMASYNC_POSTWRITE); 3221 sqh->hlink = eqh->hlink; 3222 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3223 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3224 sizeof(sqh->qh.qh_hlink), 3225 BUS_DMASYNC_PREWRITE); 3226 eqh->hlink = sqh; 3227 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3228 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3229 sizeof(eqh->qh.qh_hlink), 3230 BUS_DMASYNC_PREWRITE); 3231 vf->eqh = sqh; 3232 vf->bandwidth++; 3233 } 3234 3235 /* Remove interrupt QH. */ 3236 void 3237 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3238 { 3239 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3240 uhci_soft_qh_t *pqh; 3241 3242 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3243 DPRINTFN(4, "n=%d sqh=%p", sqh->pos, sqh, 0, 0); 3244 3245 /* See comment in uhci_remove_ctrl() */ 3246 3247 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3248 sizeof(sqh->qh.qh_elink), 3249 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3250 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3251 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3252 usb_syncmem(&sqh->dma, 3253 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3254 sizeof(sqh->qh.qh_elink), 3255 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3256 delay(UHCI_QH_REMOVE_DELAY); 3257 } 3258 3259 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3260 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3261 sizeof(sqh->qh.qh_hlink), 3262 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3263 pqh->hlink = sqh->hlink; 3264 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3265 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3266 sizeof(pqh->qh.qh_hlink), 3267 BUS_DMASYNC_PREWRITE); 3268 delay(UHCI_QH_REMOVE_DELAY); 3269 if (vf->eqh == sqh) 3270 vf->eqh = pqh; 3271 vf->bandwidth--; 3272 } 3273 3274 usbd_status 3275 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3276 { 3277 uhci_soft_qh_t *sqh; 3278 int i, npoll; 3279 u_int bestbw, bw, bestoffs, offs; 3280 3281 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3282 DPRINTFN(2, "pipe=%p", upipe, 0, 0, 0); 3283 if (ival == 0) { 3284 printf("uhci_device_setintr: 0 interval\n"); 3285 return USBD_INVAL; 3286 } 3287 3288 if (ival > UHCI_VFRAMELIST_COUNT) 3289 ival = UHCI_VFRAMELIST_COUNT; 3290 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3291 DPRINTF("ival=%d npoll=%d", ival, npoll, 0, 0); 3292 3293 upipe->u.intr.npoll = npoll; 3294 upipe->u.intr.qhs = 3295 kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP); 3296 if (upipe->u.intr.qhs == NULL) 3297 return USBD_NOMEM; 3298 3299 /* 3300 * Figure out which offset in the schedule that has most 3301 * bandwidth left over. 3302 */ 3303 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3304 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3305 for (bw = i = 0; i < npoll; i++) 3306 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3307 if (bw < bestbw) { 3308 bestbw = bw; 3309 bestoffs = offs; 3310 } 3311 } 3312 DPRINTF("bw=%d offs=%d", bestbw, bestoffs, 0, 0); 3313 mutex_enter(&sc->sc_lock); 3314 for(i = 0; i < npoll; i++) { 3315 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3316 sqh->elink = NULL; 3317 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3318 usb_syncmem(&sqh->dma, 3319 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3320 sizeof(sqh->qh.qh_elink), 3321 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3322 sqh->pos = MOD(i * ival + bestoffs); 3323 } 3324 #undef MOD 3325 3326 /* Enter QHs into the controller data structures. */ 3327 for(i = 0; i < npoll; i++) 3328 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3329 mutex_exit(&sc->sc_lock); 3330 3331 DPRINTFN(5, "returns %p", upipe, 0, 0, 0); 3332 3333 return USBD_NORMAL_COMPLETION; 3334 } 3335 3336 /* Open a new pipe. */ 3337 usbd_status 3338 uhci_open(struct usbd_pipe *pipe) 3339 { 3340 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3341 struct usbd_bus *bus = pipe->up_dev->ud_bus; 3342 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3343 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 3344 usbd_status err = USBD_NOMEM; 3345 int ival; 3346 3347 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3348 DPRINTF("pipe=%p, addr=%d, endpt=%d (%d)", 3349 pipe, pipe->up_dev->ud_addr, ed->bEndpointAddress, bus->ub_rhaddr); 3350 3351 if (sc->sc_dying) 3352 return USBD_IOERROR; 3353 3354 upipe->aborting = 0; 3355 /* toggle state needed for bulk endpoints */ 3356 upipe->nexttoggle = pipe->up_endpoint->ue_toggle; 3357 3358 if (pipe->up_dev->ud_addr == bus->ub_rhaddr) { 3359 switch (ed->bEndpointAddress) { 3360 case USB_CONTROL_ENDPOINT: 3361 pipe->up_methods = &roothub_ctrl_methods; 3362 break; 3363 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 3364 pipe->up_methods = &uhci_root_intr_methods; 3365 break; 3366 default: 3367 return USBD_INVAL; 3368 } 3369 } else { 3370 switch (ed->bmAttributes & UE_XFERTYPE) { 3371 case UE_CONTROL: 3372 pipe->up_methods = &uhci_device_ctrl_methods; 3373 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3374 if (upipe->u.ctl.sqh == NULL) 3375 goto bad; 3376 upipe->u.ctl.setup = uhci_alloc_std(sc); 3377 if (upipe->u.ctl.setup == NULL) { 3378 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3379 goto bad; 3380 } 3381 upipe->u.ctl.stat = uhci_alloc_std(sc); 3382 if (upipe->u.ctl.stat == NULL) { 3383 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3384 uhci_free_std(sc, upipe->u.ctl.setup); 3385 goto bad; 3386 } 3387 err = usb_allocmem(&sc->sc_bus, 3388 sizeof(usb_device_request_t), 3389 0, &upipe->u.ctl.reqdma); 3390 if (err) { 3391 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3392 uhci_free_std(sc, upipe->u.ctl.setup); 3393 uhci_free_std(sc, upipe->u.ctl.stat); 3394 goto bad; 3395 } 3396 break; 3397 case UE_INTERRUPT: 3398 pipe->up_methods = &uhci_device_intr_methods; 3399 ival = pipe->up_interval; 3400 if (ival == USBD_DEFAULT_INTERVAL) 3401 ival = ed->bInterval; 3402 return uhci_device_setintr(sc, upipe, ival); 3403 case UE_ISOCHRONOUS: 3404 pipe->up_methods = &uhci_device_isoc_methods; 3405 return uhci_setup_isoc(pipe); 3406 case UE_BULK: 3407 pipe->up_methods = &uhci_device_bulk_methods; 3408 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3409 if (upipe->u.bulk.sqh == NULL) 3410 goto bad; 3411 break; 3412 } 3413 } 3414 return USBD_NORMAL_COMPLETION; 3415 3416 bad: 3417 return USBD_NOMEM; 3418 } 3419 3420 /* 3421 * Data structures and routines to emulate the root hub. 3422 */ 3423 /* 3424 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3425 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3426 * should not be used by the USB subsystem. As we cannot issue a 3427 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3428 * will be enabled as part of the reset. 3429 * 3430 * On the VT83C572, the port cannot be successfully enabled until the 3431 * outstanding "port enable change" and "connection status change" 3432 * events have been reset. 3433 */ 3434 Static usbd_status 3435 uhci_portreset(uhci_softc_t *sc, int index) 3436 { 3437 int lim, port, x; 3438 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3439 3440 if (index == 1) 3441 port = UHCI_PORTSC1; 3442 else if (index == 2) 3443 port = UHCI_PORTSC2; 3444 else 3445 return USBD_IOERROR; 3446 3447 x = URWMASK(UREAD2(sc, port)); 3448 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3449 3450 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3451 3452 DPRINTF("uhci port %d reset, status0 = 0x%04x", index, 3453 UREAD2(sc, port), 0, 0); 3454 3455 x = URWMASK(UREAD2(sc, port)); 3456 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3457 3458 delay(100); 3459 3460 DPRINTF("uhci port %d reset, status1 = 0x%04x", index, 3461 UREAD2(sc, port), 0, 0); 3462 3463 x = URWMASK(UREAD2(sc, port)); 3464 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3465 3466 for (lim = 10; --lim > 0;) { 3467 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3468 3469 x = UREAD2(sc, port); 3470 DPRINTF("uhci port %d iteration %u, status = 0x%04x", index, 3471 lim, x, 0); 3472 3473 if (!(x & UHCI_PORTSC_CCS)) { 3474 /* 3475 * No device is connected (or was disconnected 3476 * during reset). Consider the port reset. 3477 * The delay must be long enough to ensure on 3478 * the initial iteration that the device 3479 * connection will have been registered. 50ms 3480 * appears to be sufficient, but 20ms is not. 3481 */ 3482 DPRINTFN(3, "uhci port %d loop %u, device detached", 3483 index, lim, 0, 0); 3484 break; 3485 } 3486 3487 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3488 /* 3489 * Port enabled changed and/or connection 3490 * status changed were set. Reset either or 3491 * both raised flags (by writing a 1 to that 3492 * bit), and wait again for state to settle. 3493 */ 3494 UWRITE2(sc, port, URWMASK(x) | 3495 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3496 continue; 3497 } 3498 3499 if (x & UHCI_PORTSC_PE) 3500 /* Port is enabled */ 3501 break; 3502 3503 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3504 } 3505 3506 DPRINTFN(3, "uhci port %d reset, status2 = 0x%04x", index, 3507 UREAD2(sc, port), 0, 0); 3508 3509 if (lim <= 0) { 3510 DPRINTF("uhci port %d reset timed out", index, 3511 0, 0, 0); 3512 return USBD_TIMEOUT; 3513 } 3514 3515 sc->sc_isreset = 1; 3516 return USBD_NORMAL_COMPLETION; 3517 } 3518 3519 Static int 3520 uhci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 3521 void *buf, int buflen) 3522 { 3523 uhci_softc_t *sc = bus->ub_hcpriv; 3524 int port, x; 3525 int status, change, totlen = 0; 3526 uint16_t len, value, index; 3527 usb_port_status_t ps; 3528 usbd_status err; 3529 3530 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3531 3532 if (sc->sc_dying) 3533 return -1; 3534 3535 DPRINTF("type=0x%02x request=%02x", req->bmRequestType, 3536 req->bRequest, 0, 0); 3537 3538 len = UGETW(req->wLength); 3539 value = UGETW(req->wValue); 3540 index = UGETW(req->wIndex); 3541 3542 #define C(x,y) ((x) | ((y) << 8)) 3543 switch (C(req->bRequest, req->bmRequestType)) { 3544 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3545 DPRINTF("wValue=0x%04x", value, 0, 0, 0); 3546 if (len == 0) 3547 break; 3548 switch (value) { 3549 case C(0, UDESC_DEVICE): { 3550 usb_device_descriptor_t devd; 3551 3552 totlen = min(buflen, sizeof(devd)); 3553 memcpy(&devd, buf, totlen); 3554 USETW(devd.idVendor, sc->sc_id_vendor); 3555 memcpy(buf, &devd, totlen); 3556 break; 3557 } 3558 case C(1, UDESC_STRING): 3559 #define sd ((usb_string_descriptor_t *)buf) 3560 /* Vendor */ 3561 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 3562 break; 3563 case C(2, UDESC_STRING): 3564 /* Product */ 3565 totlen = usb_makestrdesc(sd, len, "UHCI root hub"); 3566 break; 3567 #undef sd 3568 default: 3569 /* default from usbroothub */ 3570 return buflen; 3571 } 3572 break; 3573 3574 /* Hub requests */ 3575 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3576 break; 3577 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3578 DPRINTF("UR_CLEAR_PORT_FEATURE port=%d feature=%d", index, 3579 value, 0, 0); 3580 if (index == 1) 3581 port = UHCI_PORTSC1; 3582 else if (index == 2) 3583 port = UHCI_PORTSC2; 3584 else { 3585 return -1; 3586 } 3587 switch(value) { 3588 case UHF_PORT_ENABLE: 3589 x = URWMASK(UREAD2(sc, port)); 3590 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3591 break; 3592 case UHF_PORT_SUSPEND: 3593 x = URWMASK(UREAD2(sc, port)); 3594 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3595 break; 3596 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3597 /* see USB2 spec ch. 7.1.7.7 */ 3598 usb_delay_ms(&sc->sc_bus, 20); 3599 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3600 /* 10ms resume delay must be provided by caller */ 3601 break; 3602 case UHF_PORT_RESET: 3603 x = URWMASK(UREAD2(sc, port)); 3604 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3605 break; 3606 case UHF_C_PORT_CONNECTION: 3607 x = URWMASK(UREAD2(sc, port)); 3608 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3609 break; 3610 case UHF_C_PORT_ENABLE: 3611 x = URWMASK(UREAD2(sc, port)); 3612 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3613 break; 3614 case UHF_C_PORT_OVER_CURRENT: 3615 x = URWMASK(UREAD2(sc, port)); 3616 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3617 break; 3618 case UHF_C_PORT_RESET: 3619 sc->sc_isreset = 0; 3620 break; 3621 case UHF_PORT_CONNECTION: 3622 case UHF_PORT_OVER_CURRENT: 3623 case UHF_PORT_POWER: 3624 case UHF_PORT_LOW_SPEED: 3625 case UHF_C_PORT_SUSPEND: 3626 default: 3627 return -1; 3628 } 3629 break; 3630 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3631 if (index == 1) 3632 port = UHCI_PORTSC1; 3633 else if (index == 2) 3634 port = UHCI_PORTSC2; 3635 else { 3636 return -1; 3637 } 3638 if (len > 0) { 3639 *(uint8_t *)buf = 3640 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3641 UHCI_PORTSC_LS_SHIFT; 3642 totlen = 1; 3643 } 3644 break; 3645 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3646 if (len == 0) 3647 break; 3648 if ((value & 0xff) != 0) { 3649 return -1; 3650 } 3651 usb_hub_descriptor_t hubd; 3652 3653 totlen = min(buflen, sizeof(hubd)); 3654 memcpy(&hubd, buf, totlen); 3655 hubd.bNbrPorts = 2; 3656 memcpy(buf, &hubd, totlen); 3657 break; 3658 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3659 if (len != 4) { 3660 return -1; 3661 } 3662 memset(buf, 0, len); 3663 totlen = len; 3664 break; 3665 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3666 if (index == 1) 3667 port = UHCI_PORTSC1; 3668 else if (index == 2) 3669 port = UHCI_PORTSC2; 3670 else { 3671 return -1; 3672 } 3673 if (len != 4) { 3674 return -1; 3675 } 3676 x = UREAD2(sc, port); 3677 status = change = 0; 3678 if (x & UHCI_PORTSC_CCS) 3679 status |= UPS_CURRENT_CONNECT_STATUS; 3680 if (x & UHCI_PORTSC_CSC) 3681 change |= UPS_C_CONNECT_STATUS; 3682 if (x & UHCI_PORTSC_PE) 3683 status |= UPS_PORT_ENABLED; 3684 if (x & UHCI_PORTSC_POEDC) 3685 change |= UPS_C_PORT_ENABLED; 3686 if (x & UHCI_PORTSC_OCI) 3687 status |= UPS_OVERCURRENT_INDICATOR; 3688 if (x & UHCI_PORTSC_OCIC) 3689 change |= UPS_C_OVERCURRENT_INDICATOR; 3690 if (x & UHCI_PORTSC_SUSP) 3691 status |= UPS_SUSPEND; 3692 if (x & UHCI_PORTSC_LSDA) 3693 status |= UPS_LOW_SPEED; 3694 status |= UPS_PORT_POWER; 3695 if (sc->sc_isreset) 3696 change |= UPS_C_PORT_RESET; 3697 USETW(ps.wPortStatus, status); 3698 USETW(ps.wPortChange, change); 3699 totlen = min(len, sizeof(ps)); 3700 memcpy(buf, &ps, totlen); 3701 break; 3702 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3703 return -1; 3704 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3705 break; 3706 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3707 if (index == 1) 3708 port = UHCI_PORTSC1; 3709 else if (index == 2) 3710 port = UHCI_PORTSC2; 3711 else { 3712 return -1; 3713 } 3714 switch(value) { 3715 case UHF_PORT_ENABLE: 3716 x = URWMASK(UREAD2(sc, port)); 3717 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3718 break; 3719 case UHF_PORT_SUSPEND: 3720 x = URWMASK(UREAD2(sc, port)); 3721 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3722 break; 3723 case UHF_PORT_RESET: 3724 err = uhci_portreset(sc, index); 3725 if (err != USBD_NORMAL_COMPLETION) 3726 return -1; 3727 return 0; 3728 case UHF_PORT_POWER: 3729 /* Pretend we turned on power */ 3730 return 0; 3731 case UHF_C_PORT_CONNECTION: 3732 case UHF_C_PORT_ENABLE: 3733 case UHF_C_PORT_OVER_CURRENT: 3734 case UHF_PORT_CONNECTION: 3735 case UHF_PORT_OVER_CURRENT: 3736 case UHF_PORT_LOW_SPEED: 3737 case UHF_C_PORT_SUSPEND: 3738 case UHF_C_PORT_RESET: 3739 default: 3740 return -1; 3741 } 3742 break; 3743 default: 3744 /* default from usbroothub */ 3745 DPRINTF("returning %d (usbroothub default)", 3746 buflen, 0, 0, 0); 3747 return buflen; 3748 } 3749 3750 DPRINTF("returning %d", totlen, 0, 0, 0); 3751 3752 return totlen; 3753 } 3754 3755 /* Abort a root interrupt request. */ 3756 void 3757 uhci_root_intr_abort(struct usbd_xfer *xfer) 3758 { 3759 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 3760 3761 KASSERT(mutex_owned(&sc->sc_lock)); 3762 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3763 3764 callout_stop(&sc->sc_poll_handle); 3765 sc->sc_intr_xfer = NULL; 3766 3767 xfer->ux_status = USBD_CANCELLED; 3768 #ifdef DIAGNOSTIC 3769 UXFER(xfer)->iinfo.isdone = 1; 3770 #endif 3771 usb_transfer_complete(xfer); 3772 } 3773 3774 usbd_status 3775 uhci_root_intr_transfer(struct usbd_xfer *xfer) 3776 { 3777 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 3778 usbd_status err; 3779 3780 /* Insert last in queue. */ 3781 mutex_enter(&sc->sc_lock); 3782 err = usb_insert_transfer(xfer); 3783 mutex_exit(&sc->sc_lock); 3784 if (err) 3785 return err; 3786 3787 /* 3788 * Pipe isn't running (otherwise err would be USBD_INPROG), 3789 * start first 3790 */ 3791 return uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3792 } 3793 3794 /* Start a transfer on the root interrupt pipe */ 3795 usbd_status 3796 uhci_root_intr_start(struct usbd_xfer *xfer) 3797 { 3798 struct usbd_pipe *pipe = xfer->ux_pipe; 3799 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3800 unsigned int ival; 3801 3802 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3803 DPRINTF("xfer=%p len=%d flags=%d", xfer, xfer->ux_length, 3804 xfer->ux_flags, 0); 3805 3806 if (sc->sc_dying) 3807 return USBD_IOERROR; 3808 3809 /* XXX temporary variable needed to avoid gcc3 warning */ 3810 ival = xfer->ux_pipe->up_endpoint->ue_edesc->bInterval; 3811 sc->sc_ival = mstohz(ival); 3812 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3813 sc->sc_intr_xfer = xfer; 3814 return USBD_IN_PROGRESS; 3815 } 3816 3817 /* Close the root interrupt pipe. */ 3818 void 3819 uhci_root_intr_close(struct usbd_pipe *pipe) 3820 { 3821 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3822 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3823 3824 KASSERT(mutex_owned(&sc->sc_lock)); 3825 3826 callout_stop(&sc->sc_poll_handle); 3827 sc->sc_intr_xfer = NULL; 3828 } 3829
Indexes created Tue Sep 30 20:09:53 GMT 2025