uhci.c revision 1.264.4.30
1 /* $NetBSD: uhci.c,v 1.264.4.30 2015/04/01 05:39:51 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 39 * USB spec: http://www.usb.org/developers/docs/ 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.264.4.30 2015/04/01 05:39:51 skrll Exp $"); 46 47 #include "opt_usb.h" 48 49 #include <sys/param.h> 50 51 #include <sys/bus.h> 52 #include <sys/cpu.h> 53 #include <sys/device.h> 54 #include <sys/kernel.h> 55 #include <sys/kmem.h> 56 #include <sys/mutex.h> 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 #include <sys/sysctl.h> 61 #include <sys/systm.h> 62 63 #include <machine/endian.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdivar.h> 68 #include <dev/usb/usb_mem.h> 69 70 #include <dev/usb/uhcireg.h> 71 #include <dev/usb/uhcivar.h> 72 #include <dev/usb/usbroothub.h> 73 #include <dev/usb/usbhist.h> 74 75 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 76 /*#define UHCI_CTL_LOOP */ 77 78 #ifdef UHCI_DEBUG 79 uhci_softc_t *thesc; 80 int uhcinoloop = 0; 81 #endif 82 83 #ifdef USB_DEBUG 84 #ifndef UHCI_DEBUG 85 #define uhcidebug 0 86 #else 87 static int uhcidebug = 0; 88 89 SYSCTL_SETUP(sysctl_hw_uhci_setup, "sysctl hw.uhci setup") 90 { 91 int err; 92 const struct sysctlnode *rnode; 93 const struct sysctlnode *cnode; 94 95 err = sysctl_createv(clog, 0, NULL, &rnode, 96 CTLFLAG_PERMANENT, CTLTYPE_NODE, "uhci", 97 SYSCTL_DESCR("uhci global controls"), 98 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 99 100 if (err) 101 goto fail; 102 103 /* control debugging printfs */ 104 err = sysctl_createv(clog, 0, &rnode, &cnode, 105 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 106 "debug", SYSCTL_DESCR("Enable debugging output"), 107 NULL, 0, &uhcidebug, sizeof(uhcidebug), CTL_CREATE, CTL_EOL); 108 if (err) 109 goto fail; 110 111 return; 112 fail: 113 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 114 } 115 116 #endif /* UHCI_DEBUG */ 117 #endif /* USB_DEBUG */ 118 119 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOGN(uhcidebug,1,FMT,A,B,C,D) 120 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(uhcidebug,N,FMT,A,B,C,D) 121 #define UHCIHIST_FUNC() USBHIST_FUNC() 122 #define UHCIHIST_CALLED(name) USBHIST_CALLED(uhcidebug) 123 124 /* 125 * The UHCI controller is little endian, so on big endian machines 126 * the data stored in memory needs to be swapped. 127 */ 128 129 struct uhci_pipe { 130 struct usbd_pipe pipe; 131 int nexttoggle; 132 133 u_char aborting; 134 struct usbd_xfer *abortstart, abortend; 135 136 /* Info needed for different pipe kinds. */ 137 union { 138 /* Control pipe */ 139 struct { 140 uhci_soft_qh_t *sqh; 141 usb_dma_t reqdma; 142 uhci_soft_td_t *setup, *stat; 143 u_int length; 144 } ctl; 145 /* Interrupt pipe */ 146 struct { 147 int npoll; 148 int isread; 149 uhci_soft_qh_t **qhs; 150 } intr; 151 /* Bulk pipe */ 152 struct { 153 uhci_soft_qh_t *sqh; 154 u_int length; 155 int isread; 156 } bulk; 157 /* Iso pipe */ 158 struct iso { 159 uhci_soft_td_t **stds; 160 int next, inuse; 161 } iso; 162 } u; 163 }; 164 165 Static void uhci_globalreset(uhci_softc_t *); 166 Static usbd_status uhci_portreset(uhci_softc_t*, int); 167 Static void uhci_reset(uhci_softc_t *); 168 Static usbd_status uhci_run(uhci_softc_t *, int, int); 169 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 170 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 171 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 172 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 173 #if 0 174 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 175 uhci_intr_info_t *); 176 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 177 #endif 178 179 Static void uhci_free_std_chain(uhci_softc_t *, 180 uhci_soft_td_t *, uhci_soft_td_t *); 181 Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 182 uhci_softc_t *, int, int, uint16_t, usb_dma_t *, 183 uhci_soft_td_t **, uhci_soft_td_t **); 184 Static void uhci_poll_hub(void *); 185 Static void uhci_waitintr(uhci_softc_t *, struct usbd_xfer *); 186 Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 187 Static void uhci_idone(uhci_intr_info_t *); 188 189 Static void uhci_abort_xfer(struct usbd_xfer *, usbd_status); 190 191 Static void uhci_timeout(void *); 192 Static void uhci_timeout_task(void *); 193 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 194 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 195 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 196 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 197 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 198 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 199 Static void uhci_add_loop(uhci_softc_t *); 200 Static void uhci_rem_loop(uhci_softc_t *); 201 202 Static usbd_status uhci_setup_isoc(struct usbd_pipe *); 203 Static void uhci_device_isoc_enter(struct usbd_xfer *); 204 205 Static struct usbd_xfer * uhci_allocx(struct usbd_bus *); 206 Static void uhci_freex(struct usbd_bus *, struct usbd_xfer *); 207 Static void uhci_get_lock(struct usbd_bus *, kmutex_t **); 208 Static int uhci_roothub_ctrl(struct usbd_bus *, 209 usb_device_request_t *, void *, int); 210 211 Static usbd_status uhci_device_ctrl_transfer(struct usbd_xfer *); 212 Static usbd_status uhci_device_ctrl_start(struct usbd_xfer *); 213 Static void uhci_device_ctrl_abort(struct usbd_xfer *); 214 Static void uhci_device_ctrl_close(struct usbd_pipe *); 215 Static void uhci_device_ctrl_done(struct usbd_xfer *); 216 217 Static usbd_status uhci_device_intr_transfer(struct usbd_xfer *); 218 Static usbd_status uhci_device_intr_start(struct usbd_xfer *); 219 Static void uhci_device_intr_abort(struct usbd_xfer *); 220 Static void uhci_device_intr_close(struct usbd_pipe *); 221 Static void uhci_device_intr_done(struct usbd_xfer *); 222 223 Static usbd_status uhci_device_bulk_transfer(struct usbd_xfer *); 224 Static usbd_status uhci_device_bulk_start(struct usbd_xfer *); 225 Static void uhci_device_bulk_abort(struct usbd_xfer *); 226 Static void uhci_device_bulk_close(struct usbd_pipe *); 227 Static void uhci_device_bulk_done(struct usbd_xfer *); 228 229 Static usbd_status uhci_device_isoc_transfer(struct usbd_xfer *); 230 Static usbd_status uhci_device_isoc_start(struct usbd_xfer *); 231 Static void uhci_device_isoc_abort(struct usbd_xfer *); 232 Static void uhci_device_isoc_close(struct usbd_pipe *); 233 Static void uhci_device_isoc_done(struct usbd_xfer *); 234 235 Static usbd_status uhci_root_intr_transfer(struct usbd_xfer *); 236 Static usbd_status uhci_root_intr_start(struct usbd_xfer *); 237 Static void uhci_root_intr_abort(struct usbd_xfer *); 238 Static void uhci_root_intr_close(struct usbd_pipe *); 239 Static void uhci_root_intr_done(struct usbd_xfer *); 240 241 Static usbd_status uhci_open(struct usbd_pipe *); 242 Static void uhci_poll(struct usbd_bus *); 243 Static void uhci_softintr(void *); 244 245 Static usbd_status uhci_device_request(struct usbd_xfer *); 246 247 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 248 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 249 Static usbd_status uhci_device_setintr(uhci_softc_t *, 250 struct uhci_pipe *, int); 251 252 Static void uhci_device_clear_toggle(struct usbd_pipe *); 253 Static void uhci_noop(struct usbd_pipe *); 254 255 static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 256 uhci_soft_qh_t *); 257 258 #ifdef UHCI_DEBUG 259 Static void uhci_dump_all(uhci_softc_t *); 260 Static void uhci_dumpregs(uhci_softc_t *); 261 Static void uhci_dump_qhs(uhci_soft_qh_t *); 262 Static void uhci_dump_qh(uhci_soft_qh_t *); 263 Static void uhci_dump_tds(uhci_soft_td_t *); 264 Static void uhci_dump_td(uhci_soft_td_t *); 265 Static void uhci_dump_ii(uhci_intr_info_t *); 266 void uhci_dump(void); 267 #endif 268 269 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 270 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 271 #define UWRITE1(sc, r, x) \ 272 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 273 } while (/*CONSTCOND*/0) 274 #define UWRITE2(sc, r, x) \ 275 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 276 } while (/*CONSTCOND*/0) 277 #define UWRITE4(sc, r, x) \ 278 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 279 } while (/*CONSTCOND*/0) 280 static __inline uint8_t 281 UREAD1(uhci_softc_t *sc, bus_size_t r) 282 { 283 284 UBARR(sc); 285 return bus_space_read_1(sc->iot, sc->ioh, r); 286 } 287 288 static __inline uint16_t 289 UREAD2(uhci_softc_t *sc, bus_size_t r) 290 { 291 292 UBARR(sc); 293 return bus_space_read_2(sc->iot, sc->ioh, r); 294 } 295 296 #ifdef UHCI_DEBUG 297 static __inline uint32_t 298 UREAD4(uhci_softc_t *sc, bus_size_t r) 299 { 300 301 UBARR(sc); 302 return bus_space_read_4(sc->iot, sc->ioh, r); 303 } 304 #endif 305 306 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 307 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 308 309 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 310 311 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 312 313 const struct usbd_bus_methods uhci_bus_methods = { 314 .ubm_open = uhci_open, 315 .ubm_softint = uhci_softintr, 316 .ubm_dopoll = uhci_poll, 317 .ubm_allocx = uhci_allocx, 318 .ubm_freex = uhci_freex, 319 .ubm_getlock = uhci_get_lock, 320 .ubm_rhctrl = uhci_roothub_ctrl, 321 }; 322 323 const struct usbd_pipe_methods uhci_root_intr_methods = { 324 .upm_transfer = uhci_root_intr_transfer, 325 .upm_start = uhci_root_intr_start, 326 .upm_abort = uhci_root_intr_abort, 327 .upm_close = uhci_root_intr_close, 328 .upm_cleartoggle = uhci_noop, 329 .upm_done = uhci_root_intr_done, 330 }; 331 332 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 333 .upm_transfer = uhci_device_ctrl_transfer, 334 .upm_start = uhci_device_ctrl_start, 335 .upm_abort = uhci_device_ctrl_abort, 336 .upm_close = uhci_device_ctrl_close, 337 .upm_cleartoggle = uhci_noop, 338 .upm_done = uhci_device_ctrl_done, 339 }; 340 341 const struct usbd_pipe_methods uhci_device_intr_methods = { 342 .upm_transfer = uhci_device_intr_transfer, 343 .upm_start = uhci_device_intr_start, 344 .upm_abort = uhci_device_intr_abort, 345 .upm_close = uhci_device_intr_close, 346 .upm_cleartoggle = uhci_device_clear_toggle, 347 .upm_done = uhci_device_intr_done, 348 }; 349 350 const struct usbd_pipe_methods uhci_device_bulk_methods = { 351 .upm_transfer = uhci_device_bulk_transfer, 352 .upm_start = uhci_device_bulk_start, 353 .upm_abort = uhci_device_bulk_abort, 354 .upm_close = uhci_device_bulk_close, 355 .upm_cleartoggle = uhci_device_clear_toggle, 356 .upm_done = uhci_device_bulk_done, 357 }; 358 359 const struct usbd_pipe_methods uhci_device_isoc_methods = { 360 .upm_transfer = uhci_device_isoc_transfer, 361 .upm_start = uhci_device_isoc_start, 362 .upm_abort = uhci_device_isoc_abort, 363 .upm_close = uhci_device_isoc_close, 364 .upm_cleartoggle = uhci_noop, 365 .upm_done = uhci_device_isoc_done, 366 }; 367 368 #define uhci_add_intr_info(sc, ii) \ 369 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 370 #define uhci_del_intr_info(ii) \ 371 do { \ 372 LIST_REMOVE((ii), list); \ 373 (ii)->list.le_prev = NULL; \ 374 } while (0) 375 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 376 377 static inline uhci_soft_qh_t * 378 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 379 { 380 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 381 DPRINTFN(15, "pqh=%p sqh=%p", pqh, sqh, 0, 0); 382 383 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 384 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 385 usb_syncmem(&pqh->dma, 386 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 387 sizeof(pqh->qh.qh_hlink), 388 BUS_DMASYNC_POSTWRITE); 389 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 390 printf("uhci_find_prev_qh: QH not found\n"); 391 return NULL; 392 } 393 #endif 394 } 395 return pqh; 396 } 397 398 void 399 uhci_globalreset(uhci_softc_t *sc) 400 { 401 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 402 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 403 UHCICMD(sc, 0); /* do nothing */ 404 } 405 406 int 407 uhci_init(uhci_softc_t *sc) 408 { 409 usbd_status err; 410 int i, j; 411 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 412 uhci_soft_td_t *std; 413 414 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 415 416 #ifdef UHCI_DEBUG 417 thesc = sc; 418 419 if (uhcidebug > 2) 420 uhci_dumpregs(sc); 421 #endif 422 423 sc->sc_suspend = PWR_RESUME; 424 425 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 426 uhci_globalreset(sc); /* reset the controller */ 427 uhci_reset(sc); 428 429 /* Allocate and initialize real frame array. */ 430 err = usb_allocmem(&sc->sc_bus, 431 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 432 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 433 if (err) 434 return err; 435 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 436 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 437 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 438 439 /* 440 * Allocate a TD, inactive, that hangs from the last QH. 441 * This is to avoid a bug in the PIIX that makes it run berserk 442 * otherwise. 443 */ 444 std = uhci_alloc_std(sc); 445 if (std == NULL) 446 return ENOMEM; 447 std->link.std = NULL; 448 std->td.td_link = htole32(UHCI_PTR_T); 449 std->td.td_status = htole32(0); /* inactive */ 450 std->td.td_token = htole32(0); 451 std->td.td_buffer = htole32(0); 452 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 453 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 454 455 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 456 lsqh = uhci_alloc_sqh(sc); 457 if (lsqh == NULL) 458 return ENOMEM; 459 lsqh->hlink = NULL; 460 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 461 lsqh->elink = std; 462 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 463 sc->sc_last_qh = lsqh; 464 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 465 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 466 467 /* Allocate the dummy QH where bulk traffic will be queued. */ 468 bsqh = uhci_alloc_sqh(sc); 469 if (bsqh == NULL) 470 return ENOMEM; 471 bsqh->hlink = lsqh; 472 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 473 bsqh->elink = NULL; 474 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 475 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 476 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 477 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 478 479 /* Allocate dummy QH where high speed control traffic will be queued. */ 480 chsqh = uhci_alloc_sqh(sc); 481 if (chsqh == NULL) 482 return ENOMEM; 483 chsqh->hlink = bsqh; 484 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 485 chsqh->elink = NULL; 486 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 487 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 488 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 489 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 490 491 /* Allocate dummy QH where control traffic will be queued. */ 492 clsqh = uhci_alloc_sqh(sc); 493 if (clsqh == NULL) 494 return ENOMEM; 495 clsqh->hlink = chsqh; 496 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 497 clsqh->elink = NULL; 498 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 499 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 500 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 501 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 502 503 /* 504 * Make all (virtual) frame list pointers point to the interrupt 505 * queue heads and the interrupt queue heads at the control 506 * queue head and point the physical frame list to the virtual. 507 */ 508 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 509 std = uhci_alloc_std(sc); 510 sqh = uhci_alloc_sqh(sc); 511 if (std == NULL || sqh == NULL) 512 return USBD_NOMEM; 513 std->link.sqh = sqh; 514 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 515 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 516 std->td.td_token = htole32(0); 517 std->td.td_buffer = htole32(0); 518 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 519 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 520 sqh->hlink = clsqh; 521 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 522 sqh->elink = NULL; 523 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 524 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 525 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 526 sc->sc_vframes[i].htd = std; 527 sc->sc_vframes[i].etd = std; 528 sc->sc_vframes[i].hqh = sqh; 529 sc->sc_vframes[i].eqh = sqh; 530 for (j = i; 531 j < UHCI_FRAMELIST_COUNT; 532 j += UHCI_VFRAMELIST_COUNT) 533 sc->sc_pframes[j] = htole32(std->physaddr); 534 } 535 usb_syncmem(&sc->sc_dma, 0, 536 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 537 BUS_DMASYNC_PREWRITE); 538 539 540 LIST_INIT(&sc->sc_intrhead); 541 542 sc->sc_xferpool = pool_cache_init(sizeof(struct uhci_xfer), 0, 0, 0, 543 "uhcixfer", NULL, IPL_USB, NULL, NULL, NULL); 544 545 callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE); 546 547 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 548 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 549 cv_init(&sc->sc_softwake_cv, "uhciab"); 550 551 /* Set up the bus struct. */ 552 sc->sc_bus.ub_methods = &uhci_bus_methods; 553 sc->sc_bus.ub_pipesize = sizeof(struct uhci_pipe); 554 sc->sc_bus.ub_usedma = true; 555 556 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 557 558 DPRINTF("Enabling...", 0, 0, 0, 0); 559 560 err = uhci_run(sc, 1, 0); /* and here we go... */ 561 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 562 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 563 return err; 564 } 565 566 int 567 uhci_activate(device_t self, enum devact act) 568 { 569 struct uhci_softc *sc = device_private(self); 570 571 switch (act) { 572 case DVACT_DEACTIVATE: 573 sc->sc_dying = 1; 574 return 0; 575 default: 576 return EOPNOTSUPP; 577 } 578 } 579 580 void 581 uhci_childdet(device_t self, device_t child) 582 { 583 struct uhci_softc *sc = device_private(self); 584 585 KASSERT(sc->sc_child == child); 586 sc->sc_child = NULL; 587 } 588 589 int 590 uhci_detach(struct uhci_softc *sc, int flags) 591 { 592 int rv = 0; 593 594 if (sc->sc_child != NULL) 595 rv = config_detach(sc->sc_child, flags); 596 597 if (rv != 0) 598 return rv; 599 600 callout_halt(&sc->sc_poll_handle, NULL); 601 callout_destroy(&sc->sc_poll_handle); 602 603 cv_destroy(&sc->sc_softwake_cv); 604 605 mutex_destroy(&sc->sc_lock); 606 mutex_destroy(&sc->sc_intr_lock); 607 608 pool_cache_destroy(sc->sc_xferpool); 609 610 /* XXX free other data structures XXX */ 611 612 return rv; 613 } 614 615 struct usbd_xfer * 616 uhci_allocx(struct usbd_bus *bus) 617 { 618 struct uhci_softc *sc = bus->ub_hcpriv; 619 struct usbd_xfer *xfer; 620 621 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 622 if (xfer != NULL) { 623 memset(xfer, 0, sizeof(struct uhci_xfer)); 624 UXFER(xfer)->iinfo.sc = sc; 625 #ifdef DIAGNOSTIC 626 UXFER(xfer)->iinfo.isdone = 1; 627 xfer->ux_state = XFER_BUSY; 628 #endif 629 } 630 return xfer; 631 } 632 633 void 634 uhci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 635 { 636 struct uhci_softc *sc = bus->ub_hcpriv; 637 638 #ifdef DIAGNOSTIC 639 if (xfer->ux_state != XFER_BUSY) { 640 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 641 xfer->ux_state); 642 } 643 xfer->ux_state = XFER_FREE; 644 if (!UXFER(xfer)->iinfo.isdone) { 645 printf("uhci_freex: !isdone\n"); 646 } 647 #endif 648 pool_cache_put(sc->sc_xferpool, xfer); 649 } 650 651 Static void 652 uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 653 { 654 struct uhci_softc *sc = bus->ub_hcpriv; 655 656 *lock = &sc->sc_lock; 657 } 658 659 660 /* 661 * Handle suspend/resume. 662 * 663 * We need to switch to polling mode here, because this routine is 664 * called from an interrupt context. This is all right since we 665 * are almost suspended anyway. 666 */ 667 bool 668 uhci_resume(device_t dv, const pmf_qual_t *qual) 669 { 670 uhci_softc_t *sc = device_private(dv); 671 int cmd; 672 673 mutex_spin_enter(&sc->sc_intr_lock); 674 675 cmd = UREAD2(sc, UHCI_CMD); 676 sc->sc_bus.ub_usepolling++; 677 UWRITE2(sc, UHCI_INTR, 0); 678 uhci_globalreset(sc); 679 uhci_reset(sc); 680 if (cmd & UHCI_CMD_RS) 681 uhci_run(sc, 0, 1); 682 683 /* restore saved state */ 684 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 685 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 686 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 687 688 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 689 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock); 690 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 691 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 692 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 693 UHCICMD(sc, UHCI_CMD_MAXP); 694 uhci_run(sc, 1, 1); /* and start traffic again */ 695 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock); 696 sc->sc_bus.ub_usepolling--; 697 if (sc->sc_intr_xfer != NULL) 698 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 699 sc->sc_intr_xfer); 700 #ifdef UHCI_DEBUG 701 if (uhcidebug > 2) 702 uhci_dumpregs(sc); 703 #endif 704 705 sc->sc_suspend = PWR_RESUME; 706 mutex_spin_exit(&sc->sc_intr_lock); 707 708 return true; 709 } 710 711 bool 712 uhci_suspend(device_t dv, const pmf_qual_t *qual) 713 { 714 uhci_softc_t *sc = device_private(dv); 715 int cmd; 716 717 mutex_spin_enter(&sc->sc_intr_lock); 718 719 cmd = UREAD2(sc, UHCI_CMD); 720 721 #ifdef UHCI_DEBUG 722 if (uhcidebug > 2) 723 uhci_dumpregs(sc); 724 #endif 725 if (sc->sc_intr_xfer != NULL) 726 callout_stop(&sc->sc_poll_handle); 727 sc->sc_suspend = PWR_SUSPEND; 728 sc->sc_bus.ub_usepolling++; 729 730 uhci_run(sc, 0, 1); /* stop the controller */ 731 cmd &= ~UHCI_CMD_RS; 732 733 /* save some state if BIOS doesn't */ 734 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 735 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 736 737 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 738 739 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 740 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock); 741 sc->sc_bus.ub_usepolling--; 742 743 mutex_spin_exit(&sc->sc_intr_lock); 744 745 return true; 746 } 747 748 #ifdef UHCI_DEBUG 749 Static void 750 uhci_dumpregs(uhci_softc_t *sc) 751 { 752 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 753 DPRINTF("cmd =%04x sts =%04x intr =%04x frnum =%04x", 754 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 755 UREAD2(sc, UHCI_INTR), UREAD2(sc, UHCI_FRNUM)); 756 DPRINTF("sof =%04x portsc1=%04x portsc2=%04x flbase=%08x", 757 UREAD1(sc, UHCI_SOF), UREAD2(sc, UHCI_PORTSC1), 758 UREAD2(sc, UHCI_PORTSC2), UREAD4(sc, UHCI_FLBASEADDR)); 759 } 760 761 void 762 uhci_dump_td(uhci_soft_td_t *p) 763 { 764 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 765 766 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 767 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 768 769 DPRINTF("TD(%p) at %08x", p, p->physaddr, 0, 0); 770 DPRINTF(" link=0x%08x status=0x%08x " 771 "token=0x%08x buffer=0x%08x", 772 le32toh(p->td.td_link), 773 le32toh(p->td.td_status), 774 le32toh(p->td.td_token), 775 le32toh(p->td.td_buffer)); 776 777 DPRINTF("bitstuff=%d crcto =%d nak =%d babble =%d", 778 !!(le32toh(p->td.td_status) & UHCI_TD_BITSTUFF), 779 !!(le32toh(p->td.td_status) & UHCI_TD_CRCTO), 780 !!(le32toh(p->td.td_status) & UHCI_TD_NAK), 781 !!(le32toh(p->td.td_status) & UHCI_TD_BABBLE)); 782 DPRINTF("dbuffer =%d stalled =%d active =%d ioc =%d", 783 !!(le32toh(p->td.td_status) & UHCI_TD_DBUFFER), 784 !!(le32toh(p->td.td_status) & UHCI_TD_STALLED), 785 !!(le32toh(p->td.td_status) & UHCI_TD_ACTIVE), 786 !!(le32toh(p->td.td_status) & UHCI_TD_IOC)); 787 DPRINTF("ios =%d ls =%d spd =%d", 788 !!(le32toh(p->td.td_status) & UHCI_TD_IOS), 789 !!(le32toh(p->td.td_status) & UHCI_TD_LS), 790 !!(le32toh(p->td.td_status) & UHCI_TD_SPD), 0); 791 DPRINTF("errcnt =%d actlen =%d pid=%02x", 792 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 793 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 794 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 0); 795 DPRINTF("addr=%d endpt=%d D=%d maxlen=%d,", 796 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 797 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 798 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 799 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))); 800 } 801 802 void 803 uhci_dump_qh(uhci_soft_qh_t *sqh) 804 { 805 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 806 807 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 808 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 809 810 DPRINTF("QH(%p) at %08x: hlink=%08x elink=%08x", sqh, 811 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 812 le32toh(sqh->qh.qh_elink)); 813 814 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 815 } 816 817 818 #if 1 819 void 820 uhci_dump(void) 821 { 822 uhci_dump_all(thesc); 823 } 824 #endif 825 826 void 827 uhci_dump_all(uhci_softc_t *sc) 828 { 829 uhci_dumpregs(sc); 830 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 831 uhci_dump_qhs(sc->sc_lctl_start); 832 } 833 834 835 void 836 uhci_dump_qhs(uhci_soft_qh_t *sqh) 837 { 838 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 839 840 uhci_dump_qh(sqh); 841 842 /* 843 * uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 844 * Traverses sideways first, then down. 845 * 846 * QH1 847 * QH2 848 * No QH 849 * TD2.1 850 * TD2.2 851 * TD1.1 852 * etc. 853 * 854 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 855 */ 856 857 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 858 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 859 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 860 uhci_dump_qhs(sqh->hlink); 861 else 862 DPRINTF("No QH", 0, 0, 0, 0); 863 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 864 865 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 866 uhci_dump_tds(sqh->elink); 867 else 868 DPRINTF("No QH", 0, 0, 0, 0); 869 } 870 871 void 872 uhci_dump_tds(uhci_soft_td_t *std) 873 { 874 uhci_soft_td_t *td; 875 int stop; 876 877 for (td = std; td != NULL; td = td->link.std) { 878 uhci_dump_td(td); 879 880 /* 881 * Check whether the link pointer in this TD marks 882 * the link pointer as end of queue. This avoids 883 * printing the free list in case the queue/TD has 884 * already been moved there (seatbelt). 885 */ 886 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 887 sizeof(td->td.td_link), 888 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 889 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 890 le32toh(td->td.td_link) == 0); 891 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 892 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 893 if (stop) 894 break; 895 } 896 } 897 898 Static void 899 uhci_dump_ii(uhci_intr_info_t *ii) 900 { 901 struct usbd_pipe *pipe; 902 usb_endpoint_descriptor_t *ed; 903 struct usbd_device *dev; 904 905 #ifdef DIAGNOSTIC 906 #define DONE ii->isdone 907 #else 908 #define DONE 0 909 #endif 910 if (ii == NULL) { 911 printf("ii NULL\n"); 912 return; 913 } 914 if (ii->xfer == NULL) { 915 printf("ii %p: done=%d xfer=NULL\n", 916 ii, DONE); 917 return; 918 } 919 pipe = ii->xfer->ux_pipe; 920 if (pipe == NULL) { 921 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 922 ii, DONE, ii->xfer); 923 return; 924 } 925 if (pipe->up_endpoint == NULL) { 926 printf("ii %p: done=%d xfer=%p pipe=%p pipe->up_endpoint=NULL\n", 927 ii, DONE, ii->xfer, pipe); 928 return; 929 } 930 if (pipe->up_dev == NULL) { 931 printf("ii %p: done=%d xfer=%p pipe=%p pipe->up_dev=NULL\n", 932 ii, DONE, ii->xfer, pipe); 933 return; 934 } 935 ed = pipe->up_endpoint->ue_edesc; 936 dev = pipe->up_dev; 937 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 938 ii, DONE, ii->xfer, dev, 939 UGETW(dev->ud_ddesc.idVendor), 940 UGETW(dev->ud_ddesc.idProduct), 941 dev->ud_addr, pipe, 942 ed->bEndpointAddress, ed->bmAttributes); 943 #undef DONE 944 } 945 946 void uhci_dump_iis(struct uhci_softc *sc); 947 void 948 uhci_dump_iis(struct uhci_softc *sc) 949 { 950 uhci_intr_info_t *ii; 951 952 printf("intr_info list:\n"); 953 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 954 uhci_dump_ii(ii); 955 } 956 957 void iidump(void); 958 void iidump(void) { uhci_dump_iis(thesc); } 959 960 #endif 961 962 /* 963 * This routine is executed periodically and simulates interrupts 964 * from the root controller interrupt pipe for port status change. 965 */ 966 void 967 uhci_poll_hub(void *addr) 968 { 969 struct usbd_xfer *xfer = addr; 970 struct usbd_pipe *pipe = xfer->ux_pipe; 971 uhci_softc_t *sc; 972 u_char *p; 973 974 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 975 976 if (__predict_false(pipe->up_dev == NULL || pipe->up_dev->ud_bus == NULL)) 977 return; /* device has detached */ 978 sc = pipe->up_dev->ud_bus->ub_hcpriv; 979 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 980 981 p = xfer->ux_buf; 982 p[0] = 0; 983 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 984 p[0] |= 1<<1; 985 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 986 p[0] |= 1<<2; 987 if (p[0] == 0) 988 /* No change, try again in a while */ 989 return; 990 991 xfer->ux_actlen = 1; 992 xfer->ux_status = USBD_NORMAL_COMPLETION; 993 mutex_enter(&sc->sc_lock); 994 usb_transfer_complete(xfer); 995 mutex_exit(&sc->sc_lock); 996 } 997 998 void 999 uhci_root_intr_done(struct usbd_xfer *xfer) 1000 { 1001 } 1002 1003 /* 1004 * Let the last QH loop back to the high speed control transfer QH. 1005 * This is what intel calls "bandwidth reclamation" and improves 1006 * USB performance a lot for some devices. 1007 * If we are already looping, just count it. 1008 */ 1009 void 1010 uhci_add_loop(uhci_softc_t *sc) 1011 { 1012 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1013 1014 #ifdef UHCI_DEBUG 1015 if (uhcinoloop) 1016 return; 1017 #endif 1018 if (++sc->sc_loops == 1) { 1019 DPRINTFN(5, "add loop", 0, 0, 0, 0); 1020 /* Note, we don't loop back the soft pointer. */ 1021 sc->sc_last_qh->qh.qh_hlink = 1022 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1023 usb_syncmem(&sc->sc_last_qh->dma, 1024 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1025 sizeof(sc->sc_last_qh->qh.qh_hlink), 1026 BUS_DMASYNC_PREWRITE); 1027 } 1028 } 1029 1030 void 1031 uhci_rem_loop(uhci_softc_t *sc) 1032 { 1033 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1034 1035 #ifdef UHCI_DEBUG 1036 if (uhcinoloop) 1037 return; 1038 #endif 1039 if (--sc->sc_loops == 0) { 1040 DPRINTFN(5, "remove loop", 0, 0, 0, 0); 1041 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1042 usb_syncmem(&sc->sc_last_qh->dma, 1043 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1044 sizeof(sc->sc_last_qh->qh.qh_hlink), 1045 BUS_DMASYNC_PREWRITE); 1046 } 1047 } 1048 1049 /* Add high speed control QH, called with lock held. */ 1050 void 1051 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1052 { 1053 uhci_soft_qh_t *eqh; 1054 1055 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1056 1057 KASSERT(mutex_owned(&sc->sc_lock)); 1058 1059 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1060 eqh = sc->sc_hctl_end; 1061 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1062 sizeof(eqh->qh.qh_hlink), 1063 BUS_DMASYNC_POSTWRITE); 1064 sqh->hlink = eqh->hlink; 1065 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1066 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1067 BUS_DMASYNC_PREWRITE); 1068 eqh->hlink = sqh; 1069 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1070 sc->sc_hctl_end = sqh; 1071 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1072 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1073 #ifdef UHCI_CTL_LOOP 1074 uhci_add_loop(sc); 1075 #endif 1076 } 1077 1078 /* Remove high speed control QH, called with lock held. */ 1079 void 1080 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1081 { 1082 uhci_soft_qh_t *pqh; 1083 uint32_t elink; 1084 1085 KASSERT(mutex_owned(&sc->sc_lock)); 1086 1087 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1088 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1089 #ifdef UHCI_CTL_LOOP 1090 uhci_rem_loop(sc); 1091 #endif 1092 /* 1093 * The T bit should be set in the elink of the QH so that the HC 1094 * doesn't follow the pointer. This condition may fail if the 1095 * the transferred packet was short so that the QH still points 1096 * at the last used TD. 1097 * In this case we set the T bit and wait a little for the HC 1098 * to stop looking at the TD. 1099 * Note that if the TD chain is large enough, the controller 1100 * may still be looking at the chain at the end of this function. 1101 * uhci_free_std_chain() will make sure the controller stops 1102 * looking at it quickly, but until then we should not change 1103 * sqh->hlink. 1104 */ 1105 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1106 sizeof(sqh->qh.qh_elink), 1107 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1108 elink = le32toh(sqh->qh.qh_elink); 1109 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1110 sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD); 1111 if (!(elink & UHCI_PTR_T)) { 1112 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1113 usb_syncmem(&sqh->dma, 1114 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1115 sizeof(sqh->qh.qh_elink), 1116 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1117 delay(UHCI_QH_REMOVE_DELAY); 1118 } 1119 1120 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1121 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1122 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1123 pqh->hlink = sqh->hlink; 1124 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1125 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1126 sizeof(pqh->qh.qh_hlink), 1127 BUS_DMASYNC_PREWRITE); 1128 delay(UHCI_QH_REMOVE_DELAY); 1129 if (sc->sc_hctl_end == sqh) 1130 sc->sc_hctl_end = pqh; 1131 } 1132 1133 /* Add low speed control QH, called with lock held. */ 1134 void 1135 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1136 { 1137 uhci_soft_qh_t *eqh; 1138 1139 KASSERT(mutex_owned(&sc->sc_lock)); 1140 1141 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1142 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1143 1144 eqh = sc->sc_lctl_end; 1145 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1146 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1147 sqh->hlink = eqh->hlink; 1148 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1149 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1150 BUS_DMASYNC_PREWRITE); 1151 eqh->hlink = sqh; 1152 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1153 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1154 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1155 sc->sc_lctl_end = sqh; 1156 } 1157 1158 /* Remove low speed control QH, called with lock held. */ 1159 void 1160 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1161 { 1162 uhci_soft_qh_t *pqh; 1163 uint32_t elink; 1164 1165 KASSERT(mutex_owned(&sc->sc_lock)); 1166 1167 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1168 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1169 1170 /* See comment in uhci_remove_hs_ctrl() */ 1171 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1172 sizeof(sqh->qh.qh_elink), 1173 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1174 elink = le32toh(sqh->qh.qh_elink); 1175 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1176 sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD); 1177 if (!(elink & UHCI_PTR_T)) { 1178 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1179 usb_syncmem(&sqh->dma, 1180 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1181 sizeof(sqh->qh.qh_elink), 1182 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1183 delay(UHCI_QH_REMOVE_DELAY); 1184 } 1185 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1186 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1187 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1188 pqh->hlink = sqh->hlink; 1189 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1190 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1191 sizeof(pqh->qh.qh_hlink), 1192 BUS_DMASYNC_PREWRITE); 1193 delay(UHCI_QH_REMOVE_DELAY); 1194 if (sc->sc_lctl_end == sqh) 1195 sc->sc_lctl_end = pqh; 1196 } 1197 1198 /* Add bulk QH, called with lock held. */ 1199 void 1200 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1201 { 1202 uhci_soft_qh_t *eqh; 1203 1204 KASSERT(mutex_owned(&sc->sc_lock)); 1205 1206 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1207 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1208 1209 eqh = sc->sc_bulk_end; 1210 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1211 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1212 sqh->hlink = eqh->hlink; 1213 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1214 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1215 BUS_DMASYNC_PREWRITE); 1216 eqh->hlink = sqh; 1217 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1218 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1219 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1220 sc->sc_bulk_end = sqh; 1221 uhci_add_loop(sc); 1222 } 1223 1224 /* Remove bulk QH, called with lock held. */ 1225 void 1226 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1227 { 1228 uhci_soft_qh_t *pqh; 1229 1230 KASSERT(mutex_owned(&sc->sc_lock)); 1231 1232 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1233 DPRINTFN(10, "sqh %p", sqh, 0, 0, 0); 1234 1235 uhci_rem_loop(sc); 1236 /* See comment in uhci_remove_hs_ctrl() */ 1237 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1238 sizeof(sqh->qh.qh_elink), 1239 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1240 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1241 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1242 usb_syncmem(&sqh->dma, 1243 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1244 sizeof(sqh->qh.qh_elink), 1245 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1246 delay(UHCI_QH_REMOVE_DELAY); 1247 } 1248 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1249 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1250 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1251 pqh->hlink = sqh->hlink; 1252 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1253 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1254 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1255 delay(UHCI_QH_REMOVE_DELAY); 1256 if (sc->sc_bulk_end == sqh) 1257 sc->sc_bulk_end = pqh; 1258 } 1259 1260 Static int uhci_intr1(uhci_softc_t *); 1261 1262 int 1263 uhci_intr(void *arg) 1264 { 1265 uhci_softc_t *sc = arg; 1266 int ret = 0; 1267 1268 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1269 1270 mutex_spin_enter(&sc->sc_intr_lock); 1271 1272 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1273 goto done; 1274 1275 if (sc->sc_bus.ub_usepolling || UREAD2(sc, UHCI_INTR) == 0) { 1276 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1277 goto done; 1278 } 1279 1280 ret = uhci_intr1(sc); 1281 1282 done: 1283 mutex_spin_exit(&sc->sc_intr_lock); 1284 return ret; 1285 } 1286 1287 int 1288 uhci_intr1(uhci_softc_t *sc) 1289 { 1290 int status; 1291 int ack; 1292 1293 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1294 1295 #ifdef UHCI_DEBUG 1296 if (uhcidebug > 15) { 1297 DPRINTF("sc %p", sc, 0, 0, 0); 1298 uhci_dumpregs(sc); 1299 } 1300 #endif 1301 1302 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1303 1304 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1305 if (status == 0) /* The interrupt was not for us. */ 1306 return 0; 1307 1308 if (sc->sc_suspend != PWR_RESUME) { 1309 #ifdef DIAGNOSTIC 1310 printf("%s: interrupt while not operating ignored\n", 1311 device_xname(sc->sc_dev)); 1312 #endif 1313 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1314 return 0; 1315 } 1316 1317 ack = 0; 1318 if (status & UHCI_STS_USBINT) 1319 ack |= UHCI_STS_USBINT; 1320 if (status & UHCI_STS_USBEI) 1321 ack |= UHCI_STS_USBEI; 1322 if (status & UHCI_STS_RD) { 1323 ack |= UHCI_STS_RD; 1324 #ifdef UHCI_DEBUG 1325 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1326 #endif 1327 } 1328 if (status & UHCI_STS_HSE) { 1329 ack |= UHCI_STS_HSE; 1330 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1331 } 1332 if (status & UHCI_STS_HCPE) { 1333 ack |= UHCI_STS_HCPE; 1334 printf("%s: host controller process error\n", 1335 device_xname(sc->sc_dev)); 1336 } 1337 1338 /* When HCHalted=1 and Run/Stop=0 , it is normal */ 1339 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) { 1340 /* no acknowledge needed */ 1341 if (!sc->sc_dying) { 1342 printf("%s: host controller halted\n", 1343 device_xname(sc->sc_dev)); 1344 #ifdef UHCI_DEBUG 1345 uhci_dump_all(sc); 1346 #endif 1347 } 1348 sc->sc_dying = 1; 1349 } 1350 1351 if (!ack) 1352 return 0; /* nothing to acknowledge */ 1353 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1354 1355 usb_schedsoftintr(&sc->sc_bus); 1356 1357 DPRINTFN(15, "sc %p done", sc, 0, 0, 0); 1358 1359 return 1; 1360 } 1361 1362 void 1363 uhci_softintr(void *v) 1364 { 1365 struct usbd_bus *bus = v; 1366 uhci_softc_t *sc = bus->ub_hcpriv; 1367 uhci_intr_info_t *ii, *nextii; 1368 1369 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1370 DPRINTF("sc %p", sc, 0, 0, 0); 1371 1372 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1373 1374 /* 1375 * Interrupts on UHCI really suck. When the host controller 1376 * interrupts because a transfer is completed there is no 1377 * way of knowing which transfer it was. You can scan down 1378 * the TDs and QHs of the previous frame to limit the search, 1379 * but that assumes that the interrupt was not delayed by more 1380 * than 1 ms, which may not always be true (e.g. after debug 1381 * output on a slow console). 1382 * We scan all interrupt descriptors to see if any have 1383 * completed. 1384 */ 1385 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1386 nextii = LIST_NEXT(ii, list); 1387 uhci_check_intr(sc, ii); 1388 } 1389 1390 if (sc->sc_softwake) { 1391 sc->sc_softwake = 0; 1392 cv_broadcast(&sc->sc_softwake_cv); 1393 } 1394 } 1395 1396 /* Check for an interrupt. */ 1397 void 1398 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1399 { 1400 uhci_soft_td_t *std, *lstd; 1401 uint32_t status; 1402 1403 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1404 DPRINTFN(15, "ii %p", ii, 0, 0, 0); 1405 #ifdef DIAGNOSTIC 1406 if (ii == NULL) { 1407 printf("uhci_check_intr: no ii? %p\n", ii); 1408 return; 1409 } 1410 #endif 1411 if (ii->xfer->ux_status == USBD_CANCELLED || 1412 ii->xfer->ux_status == USBD_TIMEOUT) { 1413 DPRINTF("aborted xfer %p", ii->xfer, 0, 0, 0); 1414 return; 1415 } 1416 1417 if (ii->stdstart == NULL) 1418 return; 1419 lstd = ii->stdend; 1420 #ifdef DIAGNOSTIC 1421 if (lstd == NULL) { 1422 printf("uhci_check_intr: std==0\n"); 1423 return; 1424 } 1425 #endif 1426 usb_syncmem(&lstd->dma, 1427 lstd->offs + offsetof(uhci_td_t, td_status), 1428 sizeof(lstd->td.td_status), 1429 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1430 status = le32toh(lstd->td.td_status); 1431 usb_syncmem(&lstd->dma, 1432 lstd->offs + offsetof(uhci_td_t, td_status), 1433 sizeof(lstd->td.td_status), 1434 BUS_DMASYNC_PREREAD); 1435 1436 /* If the last TD is not marked active we can complete */ 1437 if (!(status & UHCI_TD_ACTIVE)) { 1438 done: 1439 DPRINTFN(12, "ii=%p done", ii, 0, 0, 0); 1440 1441 callout_stop(&ii->xfer->ux_callout); 1442 uhci_idone(ii); 1443 return; 1444 } 1445 1446 /* 1447 * If the last TD is still active we need to check whether there 1448 * is an error somewhere in the middle, or whether there was a 1449 * short packet (SPD and not ACTIVE). 1450 */ 1451 DPRINTFN(12, "active ii=%p", ii, 0, 0, 0); 1452 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1453 usb_syncmem(&std->dma, 1454 std->offs + offsetof(uhci_td_t, td_status), 1455 sizeof(std->td.td_status), 1456 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1457 status = le32toh(std->td.td_status); 1458 usb_syncmem(&std->dma, 1459 std->offs + offsetof(uhci_td_t, td_status), 1460 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1461 1462 /* If there's an active TD the xfer isn't done. */ 1463 if (status & UHCI_TD_ACTIVE) { 1464 DPRINTFN(12, "ii=%p std=%p still active", 1465 ii, std, 0, 0); 1466 return; 1467 } 1468 1469 /* Any kind of error makes the xfer done. */ 1470 if (status & UHCI_TD_STALLED) 1471 goto done; 1472 1473 /* 1474 * If the data phase of a control transfer is short, we need 1475 * to complete the status stage 1476 */ 1477 struct usbd_xfer *xfer = ii->xfer; 1478 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 1479 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1480 1481 if ((status & UHCI_TD_SPD) && xfertype == UE_CONTROL) { 1482 struct uhci_pipe *upipe = 1483 (struct uhci_pipe *)xfer->ux_pipe; 1484 uhci_soft_qh_t *sqh = upipe->u.ctl.sqh; 1485 uhci_soft_td_t *stat = upipe->u.ctl.stat; 1486 1487 DPRINTFN(12, "ii=%p std=%p control status" 1488 "phase needs completion", ii, ii->stdstart, 0, 0); 1489 1490 sqh->qh.qh_elink = 1491 htole32(stat->physaddr | UHCI_PTR_TD); 1492 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1493 BUS_DMASYNC_PREWRITE); 1494 break; 1495 } 1496 1497 /* We want short packets, and it is short: it's done */ 1498 usb_syncmem(&std->dma, 1499 std->offs + offsetof(uhci_td_t, td_token), 1500 sizeof(std->td.td_token), 1501 BUS_DMASYNC_POSTWRITE); 1502 1503 if ((status & UHCI_TD_SPD) && 1504 UHCI_TD_GET_ACTLEN(status) < 1505 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) { 1506 goto done; 1507 } 1508 } 1509 } 1510 1511 /* Called with USB lock held. */ 1512 void 1513 uhci_idone(uhci_intr_info_t *ii) 1514 { 1515 struct usbd_xfer *xfer = ii->xfer; 1516 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 1517 #ifdef DIAGNOSTIC 1518 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 1519 #endif 1520 uhci_soft_td_t *std; 1521 uint32_t status = 0, nstatus; 1522 int actlen; 1523 1524 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1525 1526 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1527 DPRINTFN(12, "ii=%p", ii, 0, 0, 0); 1528 1529 #ifdef DIAGNOSTIC 1530 { 1531 /* XXX SMP? */ 1532 int s = splhigh(); 1533 if (ii->isdone) { 1534 splx(s); 1535 #ifdef UHCI_DEBUG 1536 printf("uhci_idone: ii is done!\n "); 1537 uhci_dump_ii(ii); 1538 #else 1539 printf("uhci_idone: ii=%p is done!\n", ii); 1540 #endif 1541 return; 1542 } 1543 ii->isdone = 1; 1544 splx(s); 1545 } 1546 #endif 1547 1548 if (xfer->ux_nframes != 0) { 1549 /* Isoc transfer, do things differently. */ 1550 uhci_soft_td_t **stds = upipe->u.iso.stds; 1551 int i, n, nframes, len; 1552 1553 DPRINTFN(5, "ii=%p isoc ready", ii, 0, 0, 0); 1554 1555 nframes = xfer->ux_nframes; 1556 actlen = 0; 1557 n = UXFER(xfer)->curframe; 1558 for (i = 0; i < nframes; i++) { 1559 std = stds[n]; 1560 #ifdef UHCI_DEBUG 1561 if (uhcidebug > 5) { 1562 DPRINTF("isoc TD %d", i, 0, 0, 0); 1563 uhci_dump_td(std); 1564 } 1565 #endif 1566 if (++n >= UHCI_VFRAMELIST_COUNT) 1567 n = 0; 1568 usb_syncmem(&std->dma, 1569 std->offs + offsetof(uhci_td_t, td_status), 1570 sizeof(std->td.td_status), 1571 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1572 status = le32toh(std->td.td_status); 1573 len = UHCI_TD_GET_ACTLEN(status); 1574 xfer->ux_frlengths[i] = len; 1575 actlen += len; 1576 } 1577 upipe->u.iso.inuse -= nframes; 1578 xfer->ux_actlen = actlen; 1579 xfer->ux_status = USBD_NORMAL_COMPLETION; 1580 goto end; 1581 } 1582 1583 #ifdef UHCI_DEBUG 1584 DPRINTFN(10, "ii=%p, xfer=%p, pipe=%p ready", 1585 ii, xfer, upipe, 0); 1586 if (uhcidebug > 10) 1587 uhci_dump_tds(ii->stdstart); 1588 #endif 1589 1590 /* The transfer is done, compute actual length and status. */ 1591 actlen = 0; 1592 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1593 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1594 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1595 nstatus = le32toh(std->td.td_status); 1596 if (nstatus & UHCI_TD_ACTIVE) 1597 break; 1598 1599 status = nstatus; 1600 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1601 UHCI_TD_PID_SETUP) 1602 actlen += UHCI_TD_GET_ACTLEN(status); 1603 else { 1604 /* 1605 * UHCI will report CRCTO in addition to a STALL or NAK 1606 * for a SETUP transaction. See section 3.2.2, "TD 1607 * CONTROL AND STATUS". 1608 */ 1609 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1610 status &= ~UHCI_TD_CRCTO; 1611 } 1612 } 1613 /* If there are left over TDs we need to update the toggle. */ 1614 if (std != NULL) 1615 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1616 1617 status &= UHCI_TD_ERROR; 1618 DPRINTFN(10, "actlen=%d, status=0x%x", actlen, status, 0, 0); 1619 xfer->ux_actlen = actlen; 1620 if (status != 0) { 1621 1622 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1623 "error, addr=%d, endpt=0x%02x", 1624 xfer->ux_pipe->up_dev->ud_addr, 1625 xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress, 1626 0, 0); 1627 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1628 "bitstuff=%d crcto =%d nak =%d babble =%d", 1629 status & UHCI_TD_BITSTUFF, 1630 status & UHCI_TD_CRCTO, 1631 status & UHCI_TD_NAK, 1632 status & UHCI_TD_BABBLE); 1633 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1634 "dbuffer =%d stalled =%d active =%d", 1635 status & UHCI_TD_DBUFFER, 1636 status & UHCI_TD_STALLED, 1637 status & UHCI_TD_ACTIVE, 1638 0); 1639 1640 if (status == UHCI_TD_STALLED) 1641 xfer->ux_status = USBD_STALLED; 1642 else 1643 xfer->ux_status = USBD_IOERROR; /* more info XXX */ 1644 } else { 1645 xfer->ux_status = USBD_NORMAL_COMPLETION; 1646 } 1647 1648 end: 1649 usb_transfer_complete(xfer); 1650 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1651 DPRINTFN(12, "ii=%p done", ii, 0, 0, 0); 1652 } 1653 1654 /* 1655 * Called when a request does not complete. 1656 */ 1657 void 1658 uhci_timeout(void *addr) 1659 { 1660 uhci_intr_info_t *ii = addr; 1661 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1662 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.ux_pipe; 1663 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 1664 1665 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1666 1667 DPRINTF("uxfer %p", uxfer, 0, 0, 0); 1668 1669 if (sc->sc_dying) { 1670 mutex_enter(&sc->sc_lock); 1671 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1672 mutex_exit(&sc->sc_lock); 1673 return; 1674 } 1675 1676 /* Execute the abort in a process context. */ 1677 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer, 1678 USB_TASKQ_MPSAFE); 1679 usb_add_task(uxfer->xfer.ux_pipe->up_dev, &uxfer->abort_task, 1680 USB_TASKQ_HC); 1681 } 1682 1683 void 1684 uhci_timeout_task(void *addr) 1685 { 1686 struct usbd_xfer *xfer = addr; 1687 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 1688 1689 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1690 1691 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1692 1693 mutex_enter(&sc->sc_lock); 1694 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1695 mutex_exit(&sc->sc_lock); 1696 } 1697 1698 /* 1699 * Wait here until controller claims to have an interrupt. 1700 * Then call uhci_intr and return. Use timeout to avoid waiting 1701 * too long. 1702 * Only used during boot when interrupts are not enabled yet. 1703 */ 1704 void 1705 uhci_waitintr(uhci_softc_t *sc, struct usbd_xfer *xfer) 1706 { 1707 int timo = xfer->ux_timeout; 1708 uhci_intr_info_t *ii; 1709 1710 mutex_enter(&sc->sc_lock); 1711 1712 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1713 DPRINTFN(10, "timeout = %dms", timo, 0, 0, 0); 1714 1715 xfer->ux_status = USBD_IN_PROGRESS; 1716 for (; timo >= 0; timo--) { 1717 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_lock); 1718 DPRINTFN(20, "0x%04x", 1719 UREAD2(sc, UHCI_STS), 0, 0, 0); 1720 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1721 mutex_spin_enter(&sc->sc_intr_lock); 1722 uhci_intr1(sc); 1723 mutex_spin_exit(&sc->sc_intr_lock); 1724 if (xfer->ux_status != USBD_IN_PROGRESS) 1725 goto done; 1726 } 1727 } 1728 1729 /* Timeout */ 1730 DPRINTF("timeout", 0, 0, 0, 0); 1731 for (ii = LIST_FIRST(&sc->sc_intrhead); 1732 ii != NULL && ii->xfer != xfer; 1733 ii = LIST_NEXT(ii, list)) 1734 ; 1735 #ifdef DIAGNOSTIC 1736 if (ii == NULL) 1737 panic("uhci_waitintr: lost intr_info"); 1738 #endif 1739 uhci_idone(ii); 1740 1741 done: 1742 mutex_exit(&sc->sc_lock); 1743 } 1744 1745 void 1746 uhci_poll(struct usbd_bus *bus) 1747 { 1748 uhci_softc_t *sc = bus->ub_hcpriv; 1749 1750 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1751 mutex_spin_enter(&sc->sc_intr_lock); 1752 uhci_intr1(sc); 1753 mutex_spin_exit(&sc->sc_intr_lock); 1754 } 1755 } 1756 1757 void 1758 uhci_reset(uhci_softc_t *sc) 1759 { 1760 int n; 1761 1762 UHCICMD(sc, UHCI_CMD_HCRESET); 1763 /* The reset bit goes low when the controller is done. */ 1764 for (n = 0; n < UHCI_RESET_TIMEOUT && 1765 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1766 usb_delay_ms(&sc->sc_bus, 1); 1767 if (n >= UHCI_RESET_TIMEOUT) 1768 printf("%s: controller did not reset\n", 1769 device_xname(sc->sc_dev)); 1770 } 1771 1772 usbd_status 1773 uhci_run(uhci_softc_t *sc, int run, int locked) 1774 { 1775 int n, running; 1776 uint16_t cmd; 1777 1778 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1779 1780 run = run != 0; 1781 if (!locked) 1782 mutex_spin_enter(&sc->sc_intr_lock); 1783 1784 DPRINTF("setting run=%d", run, 0, 0, 0); 1785 cmd = UREAD2(sc, UHCI_CMD); 1786 if (run) 1787 cmd |= UHCI_CMD_RS; 1788 else 1789 cmd &= ~UHCI_CMD_RS; 1790 UHCICMD(sc, cmd); 1791 for(n = 0; n < 10; n++) { 1792 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1793 /* return when we've entered the state we want */ 1794 if (run == running) { 1795 if (!locked) 1796 mutex_spin_exit(&sc->sc_intr_lock); 1797 DPRINTF("done cmd=0x%x sts=0x%x", 1798 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 0, 0); 1799 return USBD_NORMAL_COMPLETION; 1800 } 1801 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock); 1802 } 1803 if (!locked) 1804 mutex_spin_exit(&sc->sc_intr_lock); 1805 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1806 run ? "start" : "stop"); 1807 return USBD_IOERROR; 1808 } 1809 1810 /* 1811 * Memory management routines. 1812 * uhci_alloc_std allocates TDs 1813 * uhci_alloc_sqh allocates QHs 1814 * These two routines do their own free list management, 1815 * partly for speed, partly because allocating DMAable memory 1816 * has page size granularity so much memory would be wasted if 1817 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1818 */ 1819 1820 uhci_soft_td_t * 1821 uhci_alloc_std(uhci_softc_t *sc) 1822 { 1823 uhci_soft_td_t *std; 1824 usbd_status err; 1825 int i, offs; 1826 usb_dma_t dma; 1827 1828 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1829 1830 if (sc->sc_freetds == NULL) { 1831 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 1832 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1833 UHCI_TD_ALIGN, &dma); 1834 if (err) 1835 return 0; 1836 for (i = 0; i < UHCI_STD_CHUNK; i++) { 1837 offs = i * UHCI_STD_SIZE; 1838 std = KERNADDR(&dma, offs); 1839 std->physaddr = DMAADDR(&dma, offs); 1840 std->dma = dma; 1841 std->offs = offs; 1842 std->link.std = sc->sc_freetds; 1843 sc->sc_freetds = std; 1844 } 1845 } 1846 std = sc->sc_freetds; 1847 sc->sc_freetds = std->link.std; 1848 memset(&std->td, 0, sizeof(uhci_td_t)); 1849 return std; 1850 } 1851 1852 void 1853 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1854 { 1855 #ifdef DIAGNOSTIC 1856 #define TD_IS_FREE 0x12345678 1857 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1858 printf("uhci_free_std: freeing free TD %p\n", std); 1859 return; 1860 } 1861 std->td.td_token = htole32(TD_IS_FREE); 1862 #endif 1863 std->link.std = sc->sc_freetds; 1864 sc->sc_freetds = std; 1865 } 1866 1867 uhci_soft_qh_t * 1868 uhci_alloc_sqh(uhci_softc_t *sc) 1869 { 1870 uhci_soft_qh_t *sqh; 1871 usbd_status err; 1872 int i, offs; 1873 usb_dma_t dma; 1874 1875 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1876 1877 if (sc->sc_freeqhs == NULL) { 1878 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 1879 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1880 UHCI_QH_ALIGN, &dma); 1881 if (err) 1882 return 0; 1883 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1884 offs = i * UHCI_SQH_SIZE; 1885 sqh = KERNADDR(&dma, offs); 1886 sqh->physaddr = DMAADDR(&dma, offs); 1887 sqh->dma = dma; 1888 sqh->offs = offs; 1889 sqh->hlink = sc->sc_freeqhs; 1890 sc->sc_freeqhs = sqh; 1891 } 1892 } 1893 sqh = sc->sc_freeqhs; 1894 sc->sc_freeqhs = sqh->hlink; 1895 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1896 return sqh; 1897 } 1898 1899 void 1900 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1901 { 1902 sqh->hlink = sc->sc_freeqhs; 1903 sc->sc_freeqhs = sqh; 1904 } 1905 1906 void 1907 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1908 uhci_soft_td_t *stdend) 1909 { 1910 uhci_soft_td_t *p; 1911 uint32_t td_link; 1912 1913 /* 1914 * to avoid race condition with the controller which may be looking 1915 * at this chain, we need to first invalidate all links, and 1916 * then wait for the controller to move to another queue 1917 */ 1918 for (p = std; p != stdend; p = p->link.std) { 1919 usb_syncmem(&p->dma, 1920 p->offs + offsetof(uhci_td_t, td_link), 1921 sizeof(p->td.td_link), 1922 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1923 td_link = le32toh(p->td.td_link); 1924 usb_syncmem(&p->dma, 1925 p->offs + offsetof(uhci_td_t, td_link), 1926 sizeof(p->td.td_link), 1927 BUS_DMASYNC_PREREAD); 1928 if ((td_link & UHCI_PTR_T) == 0) { 1929 p->td.td_link = htole32(UHCI_PTR_T); 1930 usb_syncmem(&p->dma, 1931 p->offs + offsetof(uhci_td_t, td_link), 1932 sizeof(p->td.td_link), 1933 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1934 } 1935 } 1936 delay(UHCI_QH_REMOVE_DELAY); 1937 1938 for (; std != stdend; std = p) { 1939 p = std->link.std; 1940 uhci_free_std(sc, std); 1941 } 1942 } 1943 1944 usbd_status 1945 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1946 int rd, uint16_t flags, usb_dma_t *dma, 1947 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1948 { 1949 uhci_soft_td_t *p, *lastp; 1950 uhci_physaddr_t lastlink; 1951 int i, ntd, l, tog, maxp; 1952 uint32_t status; 1953 int addr = upipe->pipe.up_dev->ud_addr; 1954 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 1955 1956 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1957 1958 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 1959 addr, UE_GET_ADDR(endpt), len, upipe->pipe.up_dev->ud_speed); 1960 1961 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1962 1963 maxp = UGETW(upipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize); 1964 if (maxp == 0) { 1965 printf("uhci_alloc_std_chain: maxp=0\n"); 1966 return USBD_INVAL; 1967 } 1968 ntd = (len + maxp - 1) / maxp; 1969 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1970 ntd++; 1971 DPRINTFN(10, "maxp=%d ntd=%d", 1972 maxp, ntd, 0, 0); 1973 1974 if (ntd == 0) { 1975 *sp = *ep = NULL; 1976 DPRINTF("ntd=0", 0, 0, 0, 0); 1977 return USBD_NORMAL_COMPLETION; 1978 } 1979 tog = upipe->nexttoggle; 1980 if (ntd % 2 == 0) 1981 tog ^= 1; 1982 upipe->nexttoggle = tog ^ 1; 1983 lastp = NULL; 1984 lastlink = UHCI_PTR_T; 1985 ntd--; 1986 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1987 if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW) 1988 status |= UHCI_TD_LS; 1989 if (flags & USBD_SHORT_XFER_OK) 1990 status |= UHCI_TD_SPD; 1991 usb_syncmem(dma, 0, len, 1992 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1993 for (i = ntd; i >= 0; i--) { 1994 p = uhci_alloc_std(sc); 1995 if (p == NULL) { 1996 KASSERT(lastp != NULL); 1997 uhci_free_std_chain(sc, lastp, NULL); 1998 return USBD_NOMEM; 1999 } 2000 p->link.std = lastp; 2001 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 2002 lastp = p; 2003 lastlink = p->physaddr; 2004 p->td.td_status = htole32(status); 2005 if (i == ntd) { 2006 /* last TD */ 2007 l = len % maxp; 2008 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 2009 l = maxp; 2010 *ep = p; 2011 } else 2012 l = maxp; 2013 p->td.td_token = 2014 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 2015 UHCI_TD_OUT(l, endpt, addr, tog)); 2016 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 2017 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 2018 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2019 tog ^= 1; 2020 } 2021 *sp = lastp; 2022 DPRINTFN(10, "nexttog=%d", upipe->nexttoggle, 2023 0, 0, 0); 2024 2025 return USBD_NORMAL_COMPLETION; 2026 } 2027 2028 void 2029 uhci_device_clear_toggle(struct usbd_pipe *pipe) 2030 { 2031 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2032 upipe->nexttoggle = 0; 2033 } 2034 2035 void 2036 uhci_noop(struct usbd_pipe *pipe) 2037 { 2038 } 2039 2040 usbd_status 2041 uhci_device_bulk_transfer(struct usbd_xfer *xfer) 2042 { 2043 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2044 usbd_status err; 2045 2046 /* Insert last in queue. */ 2047 mutex_enter(&sc->sc_lock); 2048 err = usb_insert_transfer(xfer); 2049 mutex_exit(&sc->sc_lock); 2050 if (err) 2051 return err; 2052 2053 /* 2054 * Pipe isn't running (otherwise err would be USBD_INPROG), 2055 * so start it first. 2056 */ 2057 return uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2058 } 2059 2060 usbd_status 2061 uhci_device_bulk_start(struct usbd_xfer *xfer) 2062 { 2063 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2064 struct usbd_device *dev = upipe->pipe.up_dev; 2065 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2066 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2067 uhci_soft_td_t *data, *dataend; 2068 uhci_soft_qh_t *sqh; 2069 usbd_status err; 2070 int len, isread, endpt; 2071 2072 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2073 DPRINTFN(3, "xfer=%p len=%d flags=%d ii=%p", 2074 xfer, xfer->ux_length, xfer->ux_flags, ii); 2075 2076 if (sc->sc_dying) 2077 return USBD_IOERROR; 2078 2079 #ifdef DIAGNOSTIC 2080 if (xfer->ux_rqflags & URQ_REQUEST) 2081 panic("uhci_device_bulk_transfer: a request"); 2082 #endif 2083 2084 mutex_enter(&sc->sc_lock); 2085 2086 len = xfer->ux_length; 2087 endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2088 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2089 sqh = upipe->u.bulk.sqh; 2090 2091 upipe->u.bulk.isread = isread; 2092 upipe->u.bulk.length = len; 2093 2094 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->ux_flags, 2095 &xfer->ux_dmabuf, &data, &dataend); 2096 if (err) { 2097 mutex_exit(&sc->sc_lock); 2098 return err; 2099 } 2100 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2101 usb_syncmem(&dataend->dma, 2102 dataend->offs + offsetof(uhci_td_t, td_status), 2103 sizeof(dataend->td.td_status), 2104 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2105 2106 2107 #ifdef UHCI_DEBUG 2108 if (uhcidebug > 8) { 2109 DPRINTFN(8, "data(1)", 0, 0, 0, 0); 2110 uhci_dump_tds(data); 2111 } 2112 #endif 2113 2114 /* Set up interrupt info. */ 2115 ii->xfer = xfer; 2116 ii->stdstart = data; 2117 ii->stdend = dataend; 2118 #ifdef DIAGNOSTIC 2119 if (!ii->isdone) { 2120 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2121 } 2122 ii->isdone = 0; 2123 #endif 2124 2125 sqh->elink = data; 2126 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2127 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2128 2129 uhci_add_bulk(sc, sqh); 2130 uhci_add_intr_info(sc, ii); 2131 2132 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2133 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2134 uhci_timeout, ii); 2135 } 2136 xfer->ux_status = USBD_IN_PROGRESS; 2137 2138 #ifdef UHCI_DEBUG 2139 if (uhcidebug > 10) { 2140 DPRINTFN(10, "data(2)", 0, 0, 0, 0); 2141 uhci_dump_tds(data); 2142 } 2143 #endif 2144 2145 if (sc->sc_bus.ub_usepolling) 2146 uhci_waitintr(sc, xfer); 2147 2148 mutex_exit(&sc->sc_lock); 2149 return USBD_IN_PROGRESS; 2150 } 2151 2152 /* Abort a device bulk request. */ 2153 void 2154 uhci_device_bulk_abort(struct usbd_xfer *xfer) 2155 { 2156 #ifdef DIAGNOSTIC 2157 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2158 #endif 2159 2160 KASSERT(mutex_owned(&sc->sc_lock)); 2161 2162 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2163 2164 uhci_abort_xfer(xfer, USBD_CANCELLED); 2165 } 2166 2167 /* 2168 * Abort a device request. 2169 * If this routine is called at splusb() it guarantees that the request 2170 * will be removed from the hardware scheduling and that the callback 2171 * for it will be called with USBD_CANCELLED status. 2172 * It's impossible to guarantee that the requested transfer will not 2173 * have happened since the hardware runs concurrently. 2174 * If the transaction has already happened we rely on the ordinary 2175 * interrupt processing to process it. 2176 * XXX This is most probably wrong. 2177 * XXXMRG this doesn't make sense anymore. 2178 */ 2179 void 2180 uhci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2181 { 2182 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2183 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2184 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 2185 uhci_soft_td_t *std; 2186 int wake; 2187 2188 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2189 DPRINTFN(1,"xfer=%p, status=%d", xfer, status, 0, 0); 2190 2191 KASSERT(mutex_owned(&sc->sc_lock)); 2192 ASSERT_SLEEPABLE(); 2193 2194 if (sc->sc_dying) { 2195 /* If we're dying, just do the software part. */ 2196 xfer->ux_status = status; /* make software ignore it */ 2197 callout_stop(&xfer->ux_callout); 2198 usb_transfer_complete(xfer); 2199 return; 2200 } 2201 2202 /* 2203 * If an abort is already in progress then just wait for it to 2204 * complete and return. 2205 */ 2206 if (xfer->ux_hcflags & UXFER_ABORTING) { 2207 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2208 #ifdef DIAGNOSTIC 2209 if (status == USBD_TIMEOUT) 2210 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2211 #endif 2212 /* Override the status which might be USBD_TIMEOUT. */ 2213 xfer->ux_status = status; 2214 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2215 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2216 while (xfer->ux_hcflags & UXFER_ABORTING) 2217 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2218 goto done; 2219 } 2220 xfer->ux_hcflags |= UXFER_ABORTING; 2221 2222 /* 2223 * Step 1: Make interrupt routine and hardware ignore xfer. 2224 */ 2225 xfer->ux_status = status; /* make software ignore it */ 2226 callout_stop(&xfer->ux_callout); 2227 DPRINTF("stop ii=%p", ii, 0, 0, 0); 2228 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2229 usb_syncmem(&std->dma, 2230 std->offs + offsetof(uhci_td_t, td_status), 2231 sizeof(std->td.td_status), 2232 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2233 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2234 usb_syncmem(&std->dma, 2235 std->offs + offsetof(uhci_td_t, td_status), 2236 sizeof(std->td.td_status), 2237 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2238 } 2239 2240 /* 2241 * Step 2: Wait until we know hardware has finished any possible 2242 * use of the xfer. Also make sure the soft interrupt routine 2243 * has run. 2244 */ 2245 /* Hardware finishes in 1ms */ 2246 usb_delay_ms_locked(upipe->pipe.up_dev->ud_bus, 2, &sc->sc_lock); 2247 sc->sc_softwake = 1; 2248 usb_schedsoftintr(&sc->sc_bus); 2249 DPRINTF("cv_wait", 0, 0, 0, 0); 2250 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2251 2252 /* 2253 * Step 3: Execute callback. 2254 */ 2255 DPRINTF("callback", 0, 0, 0, 0); 2256 #ifdef DIAGNOSTIC 2257 ii->isdone = 1; 2258 #endif 2259 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2260 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2261 usb_transfer_complete(xfer); 2262 if (wake) 2263 cv_broadcast(&xfer->ux_hccv); 2264 done: 2265 KASSERT(mutex_owned(&sc->sc_lock)); 2266 } 2267 2268 /* Close a device bulk pipe. */ 2269 void 2270 uhci_device_bulk_close(struct usbd_pipe *pipe) 2271 { 2272 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2273 struct usbd_device *dev = upipe->pipe.up_dev; 2274 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2275 2276 KASSERT(mutex_owned(&sc->sc_lock)); 2277 2278 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2279 2280 pipe->up_endpoint->ue_toggle = upipe->nexttoggle; 2281 } 2282 2283 usbd_status 2284 uhci_device_ctrl_transfer(struct usbd_xfer *xfer) 2285 { 2286 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2287 usbd_status err; 2288 2289 /* Insert last in queue. */ 2290 mutex_enter(&sc->sc_lock); 2291 err = usb_insert_transfer(xfer); 2292 mutex_exit(&sc->sc_lock); 2293 if (err) 2294 return err; 2295 2296 /* 2297 * Pipe isn't running (otherwise err would be USBD_INPROG), 2298 * so start it first. 2299 */ 2300 return uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2301 } 2302 2303 usbd_status 2304 uhci_device_ctrl_start(struct usbd_xfer *xfer) 2305 { 2306 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2307 usbd_status err; 2308 2309 if (sc->sc_dying) 2310 return USBD_IOERROR; 2311 2312 #ifdef DIAGNOSTIC 2313 if (!(xfer->ux_rqflags & URQ_REQUEST)) 2314 panic("uhci_device_ctrl_transfer: not a request"); 2315 #endif 2316 2317 mutex_enter(&sc->sc_lock); 2318 err = uhci_device_request(xfer); 2319 mutex_exit(&sc->sc_lock); 2320 if (err) 2321 return err; 2322 2323 if (sc->sc_bus.ub_usepolling) 2324 uhci_waitintr(sc, xfer); 2325 return USBD_IN_PROGRESS; 2326 } 2327 2328 usbd_status 2329 uhci_device_intr_transfer(struct usbd_xfer *xfer) 2330 { 2331 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2332 usbd_status err; 2333 2334 /* Insert last in queue. */ 2335 mutex_enter(&sc->sc_lock); 2336 err = usb_insert_transfer(xfer); 2337 mutex_exit(&sc->sc_lock); 2338 if (err) 2339 return err; 2340 2341 /* 2342 * Pipe isn't running (otherwise err would be USBD_INPROG), 2343 * so start it first. 2344 */ 2345 return uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2346 } 2347 2348 usbd_status 2349 uhci_device_intr_start(struct usbd_xfer *xfer) 2350 { 2351 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2352 struct usbd_device *dev = upipe->pipe.up_dev; 2353 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2354 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2355 uhci_soft_td_t *data, *dataend; 2356 uhci_soft_qh_t *sqh; 2357 usbd_status err; 2358 int isread, endpt; 2359 int i; 2360 2361 if (sc->sc_dying) 2362 return USBD_IOERROR; 2363 2364 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2365 2366 DPRINTFN(3, "xfer=%p len=%d flags=%d", 2367 xfer, xfer->ux_length, xfer->ux_flags, 0); 2368 2369 #ifdef DIAGNOSTIC 2370 if (xfer->ux_rqflags & URQ_REQUEST) 2371 panic("uhci_device_intr_transfer: a request"); 2372 #endif 2373 2374 mutex_enter(&sc->sc_lock); 2375 2376 endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2377 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2378 2379 upipe->u.intr.isread = isread; 2380 2381 err = uhci_alloc_std_chain(upipe, sc, xfer->ux_length, isread, 2382 xfer->ux_flags, &xfer->ux_dmabuf, &data, 2383 &dataend); 2384 if (err) { 2385 mutex_exit(&sc->sc_lock); 2386 return err; 2387 } 2388 2389 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2390 usb_syncmem(&dataend->dma, 2391 dataend->offs + offsetof(uhci_td_t, td_status), 2392 sizeof(dataend->td.td_status), 2393 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2394 2395 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 2396 #ifdef UHCI_DEBUG 2397 if (uhcidebug > 10) { 2398 uhci_dump_tds(data); 2399 uhci_dump_qh(upipe->u.intr.qhs[0]); 2400 } 2401 #endif 2402 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 2403 2404 /* Set up interrupt info. */ 2405 ii->xfer = xfer; 2406 ii->stdstart = data; 2407 ii->stdend = dataend; 2408 #ifdef DIAGNOSTIC 2409 if (!ii->isdone) { 2410 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2411 } 2412 ii->isdone = 0; 2413 #endif 2414 2415 DPRINTFN(10, "qhs[0]=%p", upipe->u.intr.qhs[0], 0, 0, 0); 2416 for (i = 0; i < upipe->u.intr.npoll; i++) { 2417 sqh = upipe->u.intr.qhs[i]; 2418 sqh->elink = data; 2419 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2420 usb_syncmem(&sqh->dma, 2421 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2422 sizeof(sqh->qh.qh_elink), 2423 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2424 } 2425 uhci_add_intr_info(sc, ii); 2426 xfer->ux_status = USBD_IN_PROGRESS; 2427 mutex_exit(&sc->sc_lock); 2428 2429 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 2430 #ifdef UHCI_DEBUG 2431 if (uhcidebug > 10) { 2432 uhci_dump_tds(data); 2433 uhci_dump_qh(upipe->u.intr.qhs[0]); 2434 } 2435 #endif 2436 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 2437 2438 return USBD_IN_PROGRESS; 2439 } 2440 2441 /* Abort a device control request. */ 2442 void 2443 uhci_device_ctrl_abort(struct usbd_xfer *xfer) 2444 { 2445 #ifdef DIAGNOSTIC 2446 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2447 #endif 2448 2449 KASSERT(mutex_owned(&sc->sc_lock)); 2450 2451 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2452 uhci_abort_xfer(xfer, USBD_CANCELLED); 2453 } 2454 2455 /* Close a device control pipe. */ 2456 void 2457 uhci_device_ctrl_close(struct usbd_pipe *pipe) 2458 { 2459 } 2460 2461 /* Abort a device interrupt request. */ 2462 void 2463 uhci_device_intr_abort(struct usbd_xfer *xfer) 2464 { 2465 #ifdef DIAGNOSTIC 2466 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2467 #endif 2468 2469 KASSERT(mutex_owned(&sc->sc_lock)); 2470 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2471 2472 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2473 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2474 2475 uhci_abort_xfer(xfer, USBD_CANCELLED); 2476 } 2477 2478 /* Close a device interrupt pipe. */ 2479 void 2480 uhci_device_intr_close(struct usbd_pipe *pipe) 2481 { 2482 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2483 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 2484 int i, npoll; 2485 2486 KASSERT(mutex_owned(&sc->sc_lock)); 2487 2488 /* Unlink descriptors from controller data structures. */ 2489 npoll = upipe->u.intr.npoll; 2490 for (i = 0; i < npoll; i++) 2491 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2492 2493 /* 2494 * We now have to wait for any activity on the physical 2495 * descriptors to stop. 2496 */ 2497 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2498 2499 for(i = 0; i < npoll; i++) 2500 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2501 kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *)); 2502 2503 /* XXX free other resources */ 2504 } 2505 2506 usbd_status 2507 uhci_device_request(struct usbd_xfer *xfer) 2508 { 2509 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2510 usb_device_request_t *req = &xfer->ux_request; 2511 struct usbd_device *dev = upipe->pipe.up_dev; 2512 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2513 int addr = dev->ud_addr; 2514 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2515 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2516 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2517 uhci_soft_qh_t *sqh; 2518 int len; 2519 uint32_t ls; 2520 usbd_status err; 2521 int isread; 2522 2523 KASSERT(mutex_owned(&sc->sc_lock)); 2524 2525 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2526 DPRINTFN(3, "type=0x%02x, request=0x%02x, " 2527 "wValue=0x%04x, wIndex=0x%04x", 2528 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2529 UGETW(req->wIndex)); 2530 DPRINTFN(3, "len=%d, addr=%d, endpt=%d", 2531 UGETW(req->wLength), dev->ud_addr, endpt, 0); 2532 2533 ls = dev->ud_speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2534 isread = req->bmRequestType & UT_READ; 2535 len = UGETW(req->wLength); 2536 2537 setup = upipe->u.ctl.setup; 2538 stat = upipe->u.ctl.stat; 2539 sqh = upipe->u.ctl.sqh; 2540 2541 /* Set up data transaction */ 2542 if (len != 0) { 2543 upipe->nexttoggle = 1; 2544 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->ux_flags, 2545 &xfer->ux_dmabuf, &data, &dataend); 2546 if (err) 2547 return err; 2548 next = data; 2549 dataend->link.std = stat; 2550 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_TD); 2551 usb_syncmem(&dataend->dma, 2552 dataend->offs + offsetof(uhci_td_t, td_link), 2553 sizeof(dataend->td.td_link), 2554 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2555 } else { 2556 next = stat; 2557 } 2558 upipe->u.ctl.length = len; 2559 2560 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2561 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2562 2563 setup->link.std = next; 2564 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_TD); 2565 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2566 UHCI_TD_ACTIVE); 2567 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2568 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2569 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2570 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2571 2572 stat->link.std = NULL; 2573 stat->td.td_link = htole32(UHCI_PTR_T); 2574 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2575 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2576 stat->td.td_token = 2577 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2578 UHCI_TD_IN (0, endpt, addr, 1)); 2579 stat->td.td_buffer = htole32(0); 2580 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2581 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2582 2583 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 2584 #ifdef UHCI_DEBUG 2585 if (uhcidebug > 10) { 2586 DPRINTFN(10, "before transfer", 0, 0, 0, 0); 2587 uhci_dump_tds(setup); 2588 } 2589 #endif 2590 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 2591 2592 /* Set up interrupt info. */ 2593 ii->xfer = xfer; 2594 ii->stdstart = setup; 2595 ii->stdend = stat; 2596 #ifdef DIAGNOSTIC 2597 if (!ii->isdone) { 2598 printf("uhci_device_request: not done, ii=%p\n", ii); 2599 } 2600 ii->isdone = 0; 2601 #endif 2602 2603 sqh->elink = setup; 2604 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2605 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2606 2607 if (dev->ud_speed == USB_SPEED_LOW) 2608 uhci_add_ls_ctrl(sc, sqh); 2609 else 2610 uhci_add_hs_ctrl(sc, sqh); 2611 uhci_add_intr_info(sc, ii); 2612 DPRINTFN(12, "--- dump start ---", 0, 0, 0, 0); 2613 #ifdef UHCI_DEBUG 2614 if (uhcidebug > 12) { 2615 uhci_soft_td_t *std; 2616 uhci_soft_qh_t *xqh; 2617 uhci_soft_qh_t *sxqh; 2618 int maxqh = 0; 2619 uhci_physaddr_t link; 2620 DPRINTFN(12, "follow from [0]", 0, 0, 0, 0); 2621 for (std = sc->sc_vframes[0].htd, link = 0; 2622 (link & UHCI_PTR_QH) == 0; 2623 std = std->link.std) { 2624 link = le32toh(std->td.td_link); 2625 uhci_dump_td(std); 2626 } 2627 sxqh = (uhci_soft_qh_t *)std; 2628 uhci_dump_qh(sxqh); 2629 for (xqh = sxqh; 2630 xqh != NULL; 2631 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2632 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2633 uhci_dump_qh(xqh); 2634 } 2635 DPRINTFN(12, "Enqueued QH:", 0, 0, 0, 0); 2636 uhci_dump_qh(sqh); 2637 uhci_dump_tds(sqh->elink); 2638 } 2639 #endif 2640 DPRINTFN(12, "--- dump end ---", 0, 0, 0, 0); 2641 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2642 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2643 uhci_timeout, ii); 2644 } 2645 xfer->ux_status = USBD_IN_PROGRESS; 2646 2647 return USBD_NORMAL_COMPLETION; 2648 } 2649 2650 usbd_status 2651 uhci_device_isoc_transfer(struct usbd_xfer *xfer) 2652 { 2653 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2654 usbd_status err; 2655 2656 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2657 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 2658 2659 /* Put it on our queue, */ 2660 mutex_enter(&sc->sc_lock); 2661 err = usb_insert_transfer(xfer); 2662 mutex_exit(&sc->sc_lock); 2663 2664 /* bail out on error, */ 2665 if (err && err != USBD_IN_PROGRESS) 2666 return err; 2667 2668 /* XXX should check inuse here */ 2669 2670 /* insert into schedule, */ 2671 uhci_device_isoc_enter(xfer); 2672 2673 /* and start if the pipe wasn't running */ 2674 if (!err) 2675 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2676 2677 return err; 2678 } 2679 2680 void 2681 uhci_device_isoc_enter(struct usbd_xfer *xfer) 2682 { 2683 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2684 struct usbd_device *dev = upipe->pipe.up_dev; 2685 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2686 struct iso *iso = &upipe->u.iso; 2687 uhci_soft_td_t *std; 2688 uint32_t buf, len, status, offs; 2689 int i, next, nframes; 2690 int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 2691 2692 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2693 DPRINTFN(5, "used=%d next=%d xfer=%p nframes=%d", 2694 iso->inuse, iso->next, xfer, xfer->ux_nframes); 2695 2696 if (sc->sc_dying) 2697 return; 2698 2699 if (xfer->ux_status == USBD_IN_PROGRESS) { 2700 /* This request has already been entered into the frame list */ 2701 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2702 /* XXX */ 2703 } 2704 2705 #ifdef DIAGNOSTIC 2706 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2707 printf("uhci_device_isoc_enter: overflow!\n"); 2708 #endif 2709 2710 next = iso->next; 2711 if (next == -1) { 2712 /* Not in use yet, schedule it a few frames ahead. */ 2713 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2714 DPRINTFN(2, "start next=%d", next, 0, 0, 0); 2715 } 2716 2717 xfer->ux_status = USBD_IN_PROGRESS; 2718 UXFER(xfer)->curframe = next; 2719 2720 buf = DMAADDR(&xfer->ux_dmabuf, 0); 2721 offs = 0; 2722 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2723 UHCI_TD_ACTIVE | 2724 UHCI_TD_IOS); 2725 nframes = xfer->ux_nframes; 2726 mutex_enter(&sc->sc_lock); 2727 for (i = 0; i < nframes; i++) { 2728 std = iso->stds[next]; 2729 if (++next >= UHCI_VFRAMELIST_COUNT) 2730 next = 0; 2731 len = xfer->ux_frlengths[i]; 2732 std->td.td_buffer = htole32(buf); 2733 usb_syncmem(&xfer->ux_dmabuf, offs, len, 2734 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2735 if (i == nframes - 1) 2736 status |= UHCI_TD_IOC; 2737 std->td.td_status = htole32(status); 2738 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2739 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2740 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2741 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2742 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 2743 #ifdef UHCI_DEBUG 2744 if (uhcidebug > 5) { 2745 DPRINTF("TD %d", i, 0, 0, 0); 2746 uhci_dump_td(std); 2747 } 2748 #endif 2749 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 2750 buf += len; 2751 offs += len; 2752 } 2753 iso->next = next; 2754 iso->inuse += xfer->ux_nframes; 2755 2756 mutex_exit(&sc->sc_lock); 2757 } 2758 2759 usbd_status 2760 uhci_device_isoc_start(struct usbd_xfer *xfer) 2761 { 2762 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2763 uhci_softc_t *sc = upipe->pipe.up_dev->ud_bus->ub_hcpriv; 2764 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2765 uhci_soft_td_t *end; 2766 int i; 2767 2768 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2769 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 2770 2771 mutex_enter(&sc->sc_lock); 2772 2773 if (sc->sc_dying) { 2774 mutex_exit(&sc->sc_lock); 2775 return USBD_IOERROR; 2776 } 2777 2778 #ifdef DIAGNOSTIC 2779 if (xfer->ux_status != USBD_IN_PROGRESS) 2780 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2781 #endif 2782 2783 /* Find the last TD */ 2784 i = UXFER(xfer)->curframe + xfer->ux_nframes; 2785 if (i >= UHCI_VFRAMELIST_COUNT) 2786 i -= UHCI_VFRAMELIST_COUNT; 2787 end = upipe->u.iso.stds[i]; 2788 2789 #ifdef DIAGNOSTIC 2790 if (end == NULL) { 2791 printf("uhci_device_isoc_start: end == NULL\n"); 2792 return USBD_INVAL; 2793 } 2794 #endif 2795 2796 /* Set up interrupt info. */ 2797 ii->xfer = xfer; 2798 ii->stdstart = end; 2799 ii->stdend = end; 2800 #ifdef DIAGNOSTIC 2801 if (!ii->isdone) 2802 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2803 ii->isdone = 0; 2804 #endif 2805 uhci_add_intr_info(sc, ii); 2806 2807 mutex_exit(&sc->sc_lock); 2808 2809 return USBD_IN_PROGRESS; 2810 } 2811 2812 void 2813 uhci_device_isoc_abort(struct usbd_xfer *xfer) 2814 { 2815 #ifdef DIAGNOSTIC 2816 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 2817 #endif 2818 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 2819 uhci_soft_td_t **stds = upipe->u.iso.stds; 2820 uhci_soft_td_t *std; 2821 int i, n, nframes, maxlen, len; 2822 2823 KASSERT(mutex_owned(&sc->sc_lock)); 2824 2825 /* Transfer is already done. */ 2826 if (xfer->ux_status != USBD_NOT_STARTED && 2827 xfer->ux_status != USBD_IN_PROGRESS) { 2828 return; 2829 } 2830 2831 /* Give xfer the requested abort code. */ 2832 xfer->ux_status = USBD_CANCELLED; 2833 2834 /* make hardware ignore it, */ 2835 nframes = xfer->ux_nframes; 2836 n = UXFER(xfer)->curframe; 2837 maxlen = 0; 2838 for (i = 0; i < nframes; i++) { 2839 std = stds[n]; 2840 usb_syncmem(&std->dma, 2841 std->offs + offsetof(uhci_td_t, td_status), 2842 sizeof(std->td.td_status), 2843 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2844 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2845 usb_syncmem(&std->dma, 2846 std->offs + offsetof(uhci_td_t, td_status), 2847 sizeof(std->td.td_status), 2848 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2849 usb_syncmem(&std->dma, 2850 std->offs + offsetof(uhci_td_t, td_token), 2851 sizeof(std->td.td_token), 2852 BUS_DMASYNC_POSTWRITE); 2853 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2854 if (len > maxlen) 2855 maxlen = len; 2856 if (++n >= UHCI_VFRAMELIST_COUNT) 2857 n = 0; 2858 } 2859 2860 /* and wait until we are sure the hardware has finished. */ 2861 delay(maxlen); 2862 2863 #ifdef DIAGNOSTIC 2864 UXFER(xfer)->iinfo.isdone = 1; 2865 #endif 2866 /* Run callback and remove from interrupt list. */ 2867 usb_transfer_complete(xfer); 2868 2869 KASSERT(mutex_owned(&sc->sc_lock)); 2870 } 2871 2872 void 2873 uhci_device_isoc_close(struct usbd_pipe *pipe) 2874 { 2875 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2876 struct usbd_device *dev = upipe->pipe.up_dev; 2877 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2878 uhci_soft_td_t *std, *vstd; 2879 struct iso *iso; 2880 int i; 2881 2882 KASSERT(mutex_owned(&sc->sc_lock)); 2883 2884 /* 2885 * Make sure all TDs are marked as inactive. 2886 * Wait for completion. 2887 * Unschedule. 2888 * Deallocate. 2889 */ 2890 iso = &upipe->u.iso; 2891 2892 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2893 std = iso->stds[i]; 2894 usb_syncmem(&std->dma, 2895 std->offs + offsetof(uhci_td_t, td_status), 2896 sizeof(std->td.td_status), 2897 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2898 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2899 usb_syncmem(&std->dma, 2900 std->offs + offsetof(uhci_td_t, td_status), 2901 sizeof(std->td.td_status), 2902 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2903 } 2904 /* wait for completion */ 2905 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2906 2907 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2908 std = iso->stds[i]; 2909 for (vstd = sc->sc_vframes[i].htd; 2910 vstd != NULL && vstd->link.std != std; 2911 vstd = vstd->link.std) 2912 ; 2913 if (vstd == NULL) { 2914 /*panic*/ 2915 printf("uhci_device_isoc_close: %p not found\n", std); 2916 mutex_exit(&sc->sc_lock); 2917 return; 2918 } 2919 vstd->link = std->link; 2920 usb_syncmem(&std->dma, 2921 std->offs + offsetof(uhci_td_t, td_link), 2922 sizeof(std->td.td_link), 2923 BUS_DMASYNC_POSTWRITE); 2924 vstd->td.td_link = std->td.td_link; 2925 usb_syncmem(&vstd->dma, 2926 vstd->offs + offsetof(uhci_td_t, td_link), 2927 sizeof(vstd->td.td_link), 2928 BUS_DMASYNC_PREWRITE); 2929 uhci_free_std(sc, std); 2930 } 2931 2932 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 2933 } 2934 2935 usbd_status 2936 uhci_setup_isoc(struct usbd_pipe *pipe) 2937 { 2938 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2939 struct usbd_device *dev = upipe->pipe.up_dev; 2940 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2941 int addr = upipe->pipe.up_dev->ud_addr; 2942 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2943 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2944 uhci_soft_td_t *std, *vstd; 2945 uint32_t token; 2946 struct iso *iso; 2947 int i; 2948 2949 iso = &upipe->u.iso; 2950 iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT * 2951 sizeof (uhci_soft_td_t *), 2952 KM_SLEEP); 2953 if (iso->stds == NULL) 2954 return USBD_NOMEM; 2955 2956 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2957 UHCI_TD_OUT(0, endpt, addr, 0); 2958 2959 mutex_enter(&sc->sc_lock); 2960 2961 /* Allocate the TDs and mark as inactive; */ 2962 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2963 std = uhci_alloc_std(sc); 2964 if (std == 0) 2965 goto bad; 2966 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2967 std->td.td_token = htole32(token); 2968 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2969 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2970 iso->stds[i] = std; 2971 } 2972 2973 /* Insert TDs into schedule. */ 2974 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2975 std = iso->stds[i]; 2976 vstd = sc->sc_vframes[i].htd; 2977 usb_syncmem(&vstd->dma, 2978 vstd->offs + offsetof(uhci_td_t, td_link), 2979 sizeof(vstd->td.td_link), 2980 BUS_DMASYNC_POSTWRITE); 2981 std->link = vstd->link; 2982 std->td.td_link = vstd->td.td_link; 2983 usb_syncmem(&std->dma, 2984 std->offs + offsetof(uhci_td_t, td_link), 2985 sizeof(std->td.td_link), 2986 BUS_DMASYNC_PREWRITE); 2987 vstd->link.std = std; 2988 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2989 usb_syncmem(&vstd->dma, 2990 vstd->offs + offsetof(uhci_td_t, td_link), 2991 sizeof(vstd->td.td_link), 2992 BUS_DMASYNC_PREWRITE); 2993 } 2994 mutex_exit(&sc->sc_lock); 2995 2996 iso->next = -1; 2997 iso->inuse = 0; 2998 2999 return USBD_NORMAL_COMPLETION; 3000 3001 bad: 3002 while (--i >= 0) 3003 uhci_free_std(sc, iso->stds[i]); 3004 mutex_exit(&sc->sc_lock); 3005 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *)); 3006 return USBD_NOMEM; 3007 } 3008 3009 void 3010 uhci_device_isoc_done(struct usbd_xfer *xfer) 3011 { 3012 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3013 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3014 int i, offs; 3015 int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 3016 3017 3018 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3019 DPRINTFN(4, "length=%d, ux_state=0x%08x", 3020 xfer->ux_actlen, xfer->ux_state, 0, 0); 3021 3022 if (ii->xfer != xfer) 3023 /* Not on interrupt list, ignore it. */ 3024 return; 3025 3026 if (!uhci_active_intr_info(ii)) 3027 return; 3028 3029 #ifdef DIAGNOSTIC 3030 if (ii->stdend == NULL) { 3031 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 3032 #ifdef UHCI_DEBUG 3033 uhci_dump_ii(ii); 3034 #endif 3035 return; 3036 } 3037 #endif 3038 3039 /* Turn off the interrupt since it is active even if the TD is not. */ 3040 usb_syncmem(&ii->stdend->dma, 3041 ii->stdend->offs + offsetof(uhci_td_t, td_status), 3042 sizeof(ii->stdend->td.td_status), 3043 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3044 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 3045 usb_syncmem(&ii->stdend->dma, 3046 ii->stdend->offs + offsetof(uhci_td_t, td_status), 3047 sizeof(ii->stdend->td.td_status), 3048 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3049 3050 uhci_del_intr_info(ii); /* remove from active list */ 3051 3052 offs = 0; 3053 for (i = 0; i < xfer->ux_nframes; i++) { 3054 usb_syncmem(&xfer->ux_dmabuf, offs, xfer->ux_frlengths[i], 3055 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3056 offs += xfer->ux_frlengths[i]; 3057 } 3058 } 3059 3060 void 3061 uhci_device_intr_done(struct usbd_xfer *xfer) 3062 { 3063 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3064 uhci_softc_t *sc = ii->sc; 3065 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3066 uhci_soft_qh_t *sqh; 3067 int i, npoll, isread; 3068 3069 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3070 DPRINTFN(5, "length=%d", xfer->ux_actlen, 0, 0, 0); 3071 3072 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 3073 3074 npoll = upipe->u.intr.npoll; 3075 for(i = 0; i < npoll; i++) { 3076 sqh = upipe->u.intr.qhs[i]; 3077 sqh->elink = NULL; 3078 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3079 usb_syncmem(&sqh->dma, 3080 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3081 sizeof(sqh->qh.qh_elink), 3082 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3083 } 3084 uhci_free_std_chain(sc, ii->stdstart, NULL); 3085 3086 isread = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 3087 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 3088 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3089 3090 /* XXX Wasteful. */ 3091 if (xfer->ux_pipe->up_repeat) { 3092 uhci_soft_td_t *data, *dataend; 3093 3094 DPRINTFN(5, "re-queueing", 0, 0, 0, 0); 3095 3096 /* This alloc cannot fail since we freed the chain above. */ 3097 uhci_alloc_std_chain(upipe, sc, xfer->ux_length, 3098 upipe->u.intr.isread, xfer->ux_flags, 3099 &xfer->ux_dmabuf, &data, &dataend); 3100 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3101 usb_syncmem(&dataend->dma, 3102 dataend->offs + offsetof(uhci_td_t, td_status), 3103 sizeof(dataend->td.td_status), 3104 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3105 3106 DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0); 3107 #ifdef UHCI_DEBUG 3108 if (uhcidebug > 10) { 3109 uhci_dump_tds(data); 3110 uhci_dump_qh(upipe->u.intr.qhs[0]); 3111 } 3112 #endif 3113 DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0); 3114 3115 ii->stdstart = data; 3116 ii->stdend = dataend; 3117 #ifdef DIAGNOSTIC 3118 if (!ii->isdone) { 3119 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3120 } 3121 ii->isdone = 0; 3122 #endif 3123 for (i = 0; i < npoll; i++) { 3124 sqh = upipe->u.intr.qhs[i]; 3125 sqh->elink = data; 3126 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3127 usb_syncmem(&sqh->dma, 3128 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3129 sizeof(sqh->qh.qh_elink), 3130 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3131 } 3132 xfer->ux_status = USBD_IN_PROGRESS; 3133 /* The ii is already on the examined list, just leave it. */ 3134 } else { 3135 DPRINTFN(5, "removing", 0, 0, 0, 0); 3136 if (uhci_active_intr_info(ii)) 3137 uhci_del_intr_info(ii); 3138 } 3139 } 3140 3141 /* Deallocate request data structures */ 3142 void 3143 uhci_device_ctrl_done(struct usbd_xfer *xfer) 3144 { 3145 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3146 uhci_softc_t *sc = ii->sc; 3147 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3148 int len = UGETW(xfer->ux_request.wLength); 3149 int isread = (xfer->ux_request.bmRequestType & UT_READ); 3150 3151 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 3152 3153 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3154 #ifdef DIAGNOSTIC 3155 if (!(xfer->ux_rqflags & URQ_REQUEST)) 3156 panic("uhci_device_ctrl_done: not a request"); 3157 #endif 3158 3159 if (!uhci_active_intr_info(ii)) 3160 return; 3161 3162 uhci_del_intr_info(ii); /* remove from active list */ 3163 3164 if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW) 3165 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3166 else 3167 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3168 3169 if (upipe->u.ctl.length != 0) 3170 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3171 3172 if (len) { 3173 usb_syncmem(&xfer->ux_dmabuf, 0, len, 3174 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3175 } 3176 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3177 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3178 3179 DPRINTF("length=%d", xfer->ux_actlen, 0, 0, 0); 3180 } 3181 3182 /* Deallocate request data structures */ 3183 void 3184 uhci_device_bulk_done(struct usbd_xfer *xfer) 3185 { 3186 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3187 uhci_softc_t *sc = ii->sc; 3188 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->ux_pipe; 3189 3190 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3191 DPRINTFN(5, "xfer=%p ii=%p sc=%p upipe=%p", xfer, ii, sc, 3192 upipe); 3193 3194 KASSERT(mutex_owned(&sc->sc_lock)); 3195 3196 if (!uhci_active_intr_info(ii)) 3197 return; 3198 3199 uhci_del_intr_info(ii); /* remove from active list */ 3200 3201 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3202 3203 uhci_free_std_chain(sc, ii->stdstart, NULL); 3204 3205 DPRINTFN(5, "length=%d", xfer->ux_actlen, 0, 0, 0); 3206 } 3207 3208 /* Add interrupt QH, called with vflock. */ 3209 void 3210 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3211 { 3212 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3213 uhci_soft_qh_t *eqh; 3214 3215 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3216 DPRINTFN(4, "n=%d sqh=%p", sqh->pos, sqh, 0, 0); 3217 3218 eqh = vf->eqh; 3219 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3220 sizeof(eqh->qh.qh_hlink), 3221 BUS_DMASYNC_POSTWRITE); 3222 sqh->hlink = eqh->hlink; 3223 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3224 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3225 sizeof(sqh->qh.qh_hlink), 3226 BUS_DMASYNC_PREWRITE); 3227 eqh->hlink = sqh; 3228 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3229 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3230 sizeof(eqh->qh.qh_hlink), 3231 BUS_DMASYNC_PREWRITE); 3232 vf->eqh = sqh; 3233 vf->bandwidth++; 3234 } 3235 3236 /* Remove interrupt QH. */ 3237 void 3238 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3239 { 3240 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3241 uhci_soft_qh_t *pqh; 3242 3243 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3244 DPRINTFN(4, "n=%d sqh=%p", sqh->pos, sqh, 0, 0); 3245 3246 /* See comment in uhci_remove_ctrl() */ 3247 3248 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3249 sizeof(sqh->qh.qh_elink), 3250 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3251 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3252 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3253 usb_syncmem(&sqh->dma, 3254 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3255 sizeof(sqh->qh.qh_elink), 3256 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3257 delay(UHCI_QH_REMOVE_DELAY); 3258 } 3259 3260 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3261 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3262 sizeof(sqh->qh.qh_hlink), 3263 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3264 pqh->hlink = sqh->hlink; 3265 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3266 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3267 sizeof(pqh->qh.qh_hlink), 3268 BUS_DMASYNC_PREWRITE); 3269 delay(UHCI_QH_REMOVE_DELAY); 3270 if (vf->eqh == sqh) 3271 vf->eqh = pqh; 3272 vf->bandwidth--; 3273 } 3274 3275 usbd_status 3276 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3277 { 3278 uhci_soft_qh_t *sqh; 3279 int i, npoll; 3280 u_int bestbw, bw, bestoffs, offs; 3281 3282 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3283 DPRINTFN(2, "pipe=%p", upipe, 0, 0, 0); 3284 if (ival == 0) { 3285 printf("uhci_device_setintr: 0 interval\n"); 3286 return USBD_INVAL; 3287 } 3288 3289 if (ival > UHCI_VFRAMELIST_COUNT) 3290 ival = UHCI_VFRAMELIST_COUNT; 3291 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3292 DPRINTF("ival=%d npoll=%d", ival, npoll, 0, 0); 3293 3294 upipe->u.intr.npoll = npoll; 3295 upipe->u.intr.qhs = 3296 kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP); 3297 if (upipe->u.intr.qhs == NULL) 3298 return USBD_NOMEM; 3299 3300 /* 3301 * Figure out which offset in the schedule that has most 3302 * bandwidth left over. 3303 */ 3304 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3305 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3306 for (bw = i = 0; i < npoll; i++) 3307 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3308 if (bw < bestbw) { 3309 bestbw = bw; 3310 bestoffs = offs; 3311 } 3312 } 3313 DPRINTF("bw=%d offs=%d", bestbw, bestoffs, 0, 0); 3314 mutex_enter(&sc->sc_lock); 3315 for(i = 0; i < npoll; i++) { 3316 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3317 sqh->elink = NULL; 3318 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3319 usb_syncmem(&sqh->dma, 3320 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3321 sizeof(sqh->qh.qh_elink), 3322 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3323 sqh->pos = MOD(i * ival + bestoffs); 3324 } 3325 #undef MOD 3326 3327 /* Enter QHs into the controller data structures. */ 3328 for(i = 0; i < npoll; i++) 3329 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3330 mutex_exit(&sc->sc_lock); 3331 3332 DPRINTFN(5, "returns %p", upipe, 0, 0, 0); 3333 3334 return USBD_NORMAL_COMPLETION; 3335 } 3336 3337 /* Open a new pipe. */ 3338 usbd_status 3339 uhci_open(struct usbd_pipe *pipe) 3340 { 3341 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3342 struct usbd_bus *bus = pipe->up_dev->ud_bus; 3343 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3344 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 3345 usbd_status err = USBD_NOMEM; 3346 int ival; 3347 3348 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3349 DPRINTF("pipe=%p, addr=%d, endpt=%d (%d)", 3350 pipe, pipe->up_dev->ud_addr, ed->bEndpointAddress, bus->ub_rhaddr); 3351 3352 if (sc->sc_dying) 3353 return USBD_IOERROR; 3354 3355 upipe->aborting = 0; 3356 /* toggle state needed for bulk endpoints */ 3357 upipe->nexttoggle = pipe->up_endpoint->ue_toggle; 3358 3359 if (pipe->up_dev->ud_addr == bus->ub_rhaddr) { 3360 switch (ed->bEndpointAddress) { 3361 case USB_CONTROL_ENDPOINT: 3362 pipe->up_methods = &roothub_ctrl_methods; 3363 break; 3364 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 3365 pipe->up_methods = &uhci_root_intr_methods; 3366 break; 3367 default: 3368 return USBD_INVAL; 3369 } 3370 } else { 3371 switch (ed->bmAttributes & UE_XFERTYPE) { 3372 case UE_CONTROL: 3373 pipe->up_methods = &uhci_device_ctrl_methods; 3374 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3375 if (upipe->u.ctl.sqh == NULL) 3376 goto bad; 3377 upipe->u.ctl.setup = uhci_alloc_std(sc); 3378 if (upipe->u.ctl.setup == NULL) { 3379 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3380 goto bad; 3381 } 3382 upipe->u.ctl.stat = uhci_alloc_std(sc); 3383 if (upipe->u.ctl.stat == NULL) { 3384 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3385 uhci_free_std(sc, upipe->u.ctl.setup); 3386 goto bad; 3387 } 3388 err = usb_allocmem(&sc->sc_bus, 3389 sizeof(usb_device_request_t), 3390 0, &upipe->u.ctl.reqdma); 3391 if (err) { 3392 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3393 uhci_free_std(sc, upipe->u.ctl.setup); 3394 uhci_free_std(sc, upipe->u.ctl.stat); 3395 goto bad; 3396 } 3397 break; 3398 case UE_INTERRUPT: 3399 pipe->up_methods = &uhci_device_intr_methods; 3400 ival = pipe->up_interval; 3401 if (ival == USBD_DEFAULT_INTERVAL) 3402 ival = ed->bInterval; 3403 return uhci_device_setintr(sc, upipe, ival); 3404 case UE_ISOCHRONOUS: 3405 pipe->up_methods = &uhci_device_isoc_methods; 3406 return uhci_setup_isoc(pipe); 3407 case UE_BULK: 3408 pipe->up_methods = &uhci_device_bulk_methods; 3409 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3410 if (upipe->u.bulk.sqh == NULL) 3411 goto bad; 3412 break; 3413 } 3414 } 3415 return USBD_NORMAL_COMPLETION; 3416 3417 bad: 3418 return USBD_NOMEM; 3419 } 3420 3421 /* 3422 * Data structures and routines to emulate the root hub. 3423 */ 3424 /* 3425 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3426 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3427 * should not be used by the USB subsystem. As we cannot issue a 3428 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3429 * will be enabled as part of the reset. 3430 * 3431 * On the VT83C572, the port cannot be successfully enabled until the 3432 * outstanding "port enable change" and "connection status change" 3433 * events have been reset. 3434 */ 3435 Static usbd_status 3436 uhci_portreset(uhci_softc_t *sc, int index) 3437 { 3438 int lim, port, x; 3439 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3440 3441 if (index == 1) 3442 port = UHCI_PORTSC1; 3443 else if (index == 2) 3444 port = UHCI_PORTSC2; 3445 else 3446 return USBD_IOERROR; 3447 3448 x = URWMASK(UREAD2(sc, port)); 3449 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3450 3451 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3452 3453 DPRINTF("uhci port %d reset, status0 = 0x%04x", index, 3454 UREAD2(sc, port), 0, 0); 3455 3456 x = URWMASK(UREAD2(sc, port)); 3457 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3458 3459 delay(100); 3460 3461 DPRINTF("uhci port %d reset, status1 = 0x%04x", index, 3462 UREAD2(sc, port), 0, 0); 3463 3464 x = URWMASK(UREAD2(sc, port)); 3465 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3466 3467 for (lim = 10; --lim > 0;) { 3468 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3469 3470 x = UREAD2(sc, port); 3471 DPRINTF("uhci port %d iteration %u, status = 0x%04x", index, 3472 lim, x, 0); 3473 3474 if (!(x & UHCI_PORTSC_CCS)) { 3475 /* 3476 * No device is connected (or was disconnected 3477 * during reset). Consider the port reset. 3478 * The delay must be long enough to ensure on 3479 * the initial iteration that the device 3480 * connection will have been registered. 50ms 3481 * appears to be sufficient, but 20ms is not. 3482 */ 3483 DPRINTFN(3, "uhci port %d loop %u, device detached", 3484 index, lim, 0, 0); 3485 break; 3486 } 3487 3488 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3489 /* 3490 * Port enabled changed and/or connection 3491 * status changed were set. Reset either or 3492 * both raised flags (by writing a 1 to that 3493 * bit), and wait again for state to settle. 3494 */ 3495 UWRITE2(sc, port, URWMASK(x) | 3496 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3497 continue; 3498 } 3499 3500 if (x & UHCI_PORTSC_PE) 3501 /* Port is enabled */ 3502 break; 3503 3504 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3505 } 3506 3507 DPRINTFN(3, "uhci port %d reset, status2 = 0x%04x", index, 3508 UREAD2(sc, port), 0, 0); 3509 3510 if (lim <= 0) { 3511 DPRINTF("uhci port %d reset timed out", index, 3512 0, 0, 0); 3513 return USBD_TIMEOUT; 3514 } 3515 3516 sc->sc_isreset = 1; 3517 return USBD_NORMAL_COMPLETION; 3518 } 3519 3520 Static int 3521 uhci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 3522 void *buf, int buflen) 3523 { 3524 uhci_softc_t *sc = bus->ub_hcpriv; 3525 int port, x; 3526 int status, change, totlen = 0; 3527 uint16_t len, value, index; 3528 usb_port_status_t ps; 3529 usbd_status err; 3530 3531 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3532 3533 if (sc->sc_dying) 3534 return -1; 3535 3536 DPRINTF("type=0x%02x request=%02x", req->bmRequestType, 3537 req->bRequest, 0, 0); 3538 3539 len = UGETW(req->wLength); 3540 value = UGETW(req->wValue); 3541 index = UGETW(req->wIndex); 3542 3543 #define C(x,y) ((x) | ((y) << 8)) 3544 switch (C(req->bRequest, req->bmRequestType)) { 3545 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3546 DPRINTF("wValue=0x%04x", value, 0, 0, 0); 3547 if (len == 0) 3548 break; 3549 switch (value) { 3550 case C(0, UDESC_DEVICE): { 3551 usb_device_descriptor_t devd; 3552 3553 totlen = min(buflen, sizeof(devd)); 3554 memcpy(&devd, buf, totlen); 3555 USETW(devd.idVendor, sc->sc_id_vendor); 3556 memcpy(buf, &devd, totlen); 3557 break; 3558 } 3559 case C(1, UDESC_STRING): 3560 #define sd ((usb_string_descriptor_t *)buf) 3561 /* Vendor */ 3562 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 3563 break; 3564 case C(2, UDESC_STRING): 3565 /* Product */ 3566 totlen = usb_makestrdesc(sd, len, "UHCI root hub"); 3567 break; 3568 #undef sd 3569 default: 3570 /* default from usbroothub */ 3571 return buflen; 3572 } 3573 break; 3574 3575 /* Hub requests */ 3576 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3577 break; 3578 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3579 DPRINTF("UR_CLEAR_PORT_FEATURE port=%d feature=%d", index, 3580 value, 0, 0); 3581 if (index == 1) 3582 port = UHCI_PORTSC1; 3583 else if (index == 2) 3584 port = UHCI_PORTSC2; 3585 else { 3586 return -1; 3587 } 3588 switch(value) { 3589 case UHF_PORT_ENABLE: 3590 x = URWMASK(UREAD2(sc, port)); 3591 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3592 break; 3593 case UHF_PORT_SUSPEND: 3594 x = URWMASK(UREAD2(sc, port)); 3595 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3596 break; 3597 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3598 /* see USB2 spec ch. 7.1.7.7 */ 3599 usb_delay_ms(&sc->sc_bus, 20); 3600 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3601 /* 10ms resume delay must be provided by caller */ 3602 break; 3603 case UHF_PORT_RESET: 3604 x = URWMASK(UREAD2(sc, port)); 3605 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3606 break; 3607 case UHF_C_PORT_CONNECTION: 3608 x = URWMASK(UREAD2(sc, port)); 3609 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3610 break; 3611 case UHF_C_PORT_ENABLE: 3612 x = URWMASK(UREAD2(sc, port)); 3613 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3614 break; 3615 case UHF_C_PORT_OVER_CURRENT: 3616 x = URWMASK(UREAD2(sc, port)); 3617 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3618 break; 3619 case UHF_C_PORT_RESET: 3620 sc->sc_isreset = 0; 3621 break; 3622 case UHF_PORT_CONNECTION: 3623 case UHF_PORT_OVER_CURRENT: 3624 case UHF_PORT_POWER: 3625 case UHF_PORT_LOW_SPEED: 3626 case UHF_C_PORT_SUSPEND: 3627 default: 3628 return -1; 3629 } 3630 break; 3631 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3632 if (index == 1) 3633 port = UHCI_PORTSC1; 3634 else if (index == 2) 3635 port = UHCI_PORTSC2; 3636 else { 3637 return -1; 3638 } 3639 if (len > 0) { 3640 *(uint8_t *)buf = 3641 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3642 UHCI_PORTSC_LS_SHIFT; 3643 totlen = 1; 3644 } 3645 break; 3646 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3647 if (len == 0) 3648 break; 3649 if ((value & 0xff) != 0) { 3650 return -1; 3651 } 3652 usb_hub_descriptor_t hubd; 3653 3654 totlen = min(buflen, sizeof(hubd)); 3655 memcpy(&hubd, buf, totlen); 3656 hubd.bNbrPorts = 2; 3657 memcpy(buf, &hubd, totlen); 3658 break; 3659 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3660 if (len != 4) { 3661 return -1; 3662 } 3663 memset(buf, 0, len); 3664 totlen = len; 3665 break; 3666 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3667 if (index == 1) 3668 port = UHCI_PORTSC1; 3669 else if (index == 2) 3670 port = UHCI_PORTSC2; 3671 else { 3672 return -1; 3673 } 3674 if (len != 4) { 3675 return -1; 3676 } 3677 x = UREAD2(sc, port); 3678 status = change = 0; 3679 if (x & UHCI_PORTSC_CCS) 3680 status |= UPS_CURRENT_CONNECT_STATUS; 3681 if (x & UHCI_PORTSC_CSC) 3682 change |= UPS_C_CONNECT_STATUS; 3683 if (x & UHCI_PORTSC_PE) 3684 status |= UPS_PORT_ENABLED; 3685 if (x & UHCI_PORTSC_POEDC) 3686 change |= UPS_C_PORT_ENABLED; 3687 if (x & UHCI_PORTSC_OCI) 3688 status |= UPS_OVERCURRENT_INDICATOR; 3689 if (x & UHCI_PORTSC_OCIC) 3690 change |= UPS_C_OVERCURRENT_INDICATOR; 3691 if (x & UHCI_PORTSC_SUSP) 3692 status |= UPS_SUSPEND; 3693 if (x & UHCI_PORTSC_LSDA) 3694 status |= UPS_LOW_SPEED; 3695 status |= UPS_PORT_POWER; 3696 if (sc->sc_isreset) 3697 change |= UPS_C_PORT_RESET; 3698 USETW(ps.wPortStatus, status); 3699 USETW(ps.wPortChange, change); 3700 totlen = min(len, sizeof(ps)); 3701 memcpy(buf, &ps, totlen); 3702 break; 3703 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3704 return -1; 3705 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3706 break; 3707 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3708 if (index == 1) 3709 port = UHCI_PORTSC1; 3710 else if (index == 2) 3711 port = UHCI_PORTSC2; 3712 else { 3713 return -1; 3714 } 3715 switch(value) { 3716 case UHF_PORT_ENABLE: 3717 x = URWMASK(UREAD2(sc, port)); 3718 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3719 break; 3720 case UHF_PORT_SUSPEND: 3721 x = URWMASK(UREAD2(sc, port)); 3722 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3723 break; 3724 case UHF_PORT_RESET: 3725 err = uhci_portreset(sc, index); 3726 if (err != USBD_NORMAL_COMPLETION) 3727 return -1; 3728 return 0; 3729 case UHF_PORT_POWER: 3730 /* Pretend we turned on power */ 3731 return 0; 3732 case UHF_C_PORT_CONNECTION: 3733 case UHF_C_PORT_ENABLE: 3734 case UHF_C_PORT_OVER_CURRENT: 3735 case UHF_PORT_CONNECTION: 3736 case UHF_PORT_OVER_CURRENT: 3737 case UHF_PORT_LOW_SPEED: 3738 case UHF_C_PORT_SUSPEND: 3739 case UHF_C_PORT_RESET: 3740 default: 3741 return -1; 3742 } 3743 break; 3744 default: 3745 /* default from usbroothub */ 3746 DPRINTF("returning %d (usbroothub default)", 3747 buflen, 0, 0, 0); 3748 return buflen; 3749 } 3750 3751 DPRINTF("returning %d", totlen, 0, 0, 0); 3752 3753 return totlen; 3754 } 3755 3756 /* Abort a root interrupt request. */ 3757 void 3758 uhci_root_intr_abort(struct usbd_xfer *xfer) 3759 { 3760 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 3761 3762 KASSERT(mutex_owned(&sc->sc_lock)); 3763 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3764 3765 callout_stop(&sc->sc_poll_handle); 3766 sc->sc_intr_xfer = NULL; 3767 3768 xfer->ux_status = USBD_CANCELLED; 3769 #ifdef DIAGNOSTIC 3770 UXFER(xfer)->iinfo.isdone = 1; 3771 #endif 3772 usb_transfer_complete(xfer); 3773 } 3774 3775 usbd_status 3776 uhci_root_intr_transfer(struct usbd_xfer *xfer) 3777 { 3778 uhci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv; 3779 usbd_status err; 3780 3781 /* Insert last in queue. */ 3782 mutex_enter(&sc->sc_lock); 3783 err = usb_insert_transfer(xfer); 3784 mutex_exit(&sc->sc_lock); 3785 if (err) 3786 return err; 3787 3788 /* 3789 * Pipe isn't running (otherwise err would be USBD_INPROG), 3790 * start first 3791 */ 3792 return uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3793 } 3794 3795 /* Start a transfer on the root interrupt pipe */ 3796 usbd_status 3797 uhci_root_intr_start(struct usbd_xfer *xfer) 3798 { 3799 struct usbd_pipe *pipe = xfer->ux_pipe; 3800 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3801 unsigned int ival; 3802 3803 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3804 DPRINTF("xfer=%p len=%d flags=%d", xfer, xfer->ux_length, 3805 xfer->ux_flags, 0); 3806 3807 if (sc->sc_dying) 3808 return USBD_IOERROR; 3809 3810 /* XXX temporary variable needed to avoid gcc3 warning */ 3811 ival = xfer->ux_pipe->up_endpoint->ue_edesc->bInterval; 3812 sc->sc_ival = mstohz(ival); 3813 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3814 sc->sc_intr_xfer = xfer; 3815 return USBD_IN_PROGRESS; 3816 } 3817 3818 /* Close the root interrupt pipe. */ 3819 void 3820 uhci_root_intr_close(struct usbd_pipe *pipe) 3821 { 3822 uhci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv; 3823 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3824 3825 KASSERT(mutex_owned(&sc->sc_lock)); 3826 3827 callout_stop(&sc->sc_poll_handle); 3828 sc->sc_intr_xfer = NULL; 3829 } 3830
Indexes created Tue Sep 30 20:09:53 GMT 2025