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uhci.c revision 1.280
      1 /*	$NetBSD: uhci.c,v 1.280 2018/04/09 16:21:11 jakllsch Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10  * and Matthew R. Green (mrg (at) eterna.com.au).
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * USB Universal Host Controller driver.
     36  * Handles e.g. PIIX3 and PIIX4.
     37  *
     38  * UHCI spec: http://www.intel.com/technology/usb/spec.htm
     39  * USB spec: http://www.usb.org/developers/docs/
     40  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     41  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     42  */
     43 
     44 #include <sys/cdefs.h>
     45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.280 2018/04/09 16:21:11 jakllsch Exp $");
     46 
     47 #ifdef _KERNEL_OPT
     48 #include "opt_usb.h"
     49 #endif
     50 
     51 #include <sys/param.h>
     52 
     53 #include <sys/bus.h>
     54 #include <sys/cpu.h>
     55 #include <sys/device.h>
     56 #include <sys/kernel.h>
     57 #include <sys/kmem.h>
     58 #include <sys/mutex.h>
     59 #include <sys/proc.h>
     60 #include <sys/queue.h>
     61 #include <sys/select.h>
     62 #include <sys/sysctl.h>
     63 #include <sys/systm.h>
     64 
     65 #include <machine/endian.h>
     66 
     67 #include <dev/usb/usb.h>
     68 #include <dev/usb/usbdi.h>
     69 #include <dev/usb/usbdivar.h>
     70 #include <dev/usb/usb_mem.h>
     71 
     72 #include <dev/usb/uhcireg.h>
     73 #include <dev/usb/uhcivar.h>
     74 #include <dev/usb/usbroothub.h>
     75 #include <dev/usb/usbhist.h>
     76 
     77 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     78 /*#define UHCI_CTL_LOOP */
     79 
     80 #ifdef UHCI_DEBUG
     81 uhci_softc_t *thesc;
     82 int uhcinoloop = 0;
     83 #endif
     84 
     85 #ifdef USB_DEBUG
     86 #ifndef UHCI_DEBUG
     87 #define uhcidebug 0
     88 #else
     89 static int uhcidebug = 0;
     90 
     91 SYSCTL_SETUP(sysctl_hw_uhci_setup, "sysctl hw.uhci setup")
     92 {
     93 	int err;
     94 	const struct sysctlnode *rnode;
     95 	const struct sysctlnode *cnode;
     96 
     97 	err = sysctl_createv(clog, 0, NULL, &rnode,
     98 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "uhci",
     99 	    SYSCTL_DESCR("uhci global controls"),
    100 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
    101 
    102 	if (err)
    103 		goto fail;
    104 
    105 	/* control debugging printfs */
    106 	err = sysctl_createv(clog, 0, &rnode, &cnode,
    107 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
    108 	    "debug", SYSCTL_DESCR("Enable debugging output"),
    109 	    NULL, 0, &uhcidebug, sizeof(uhcidebug), CTL_CREATE, CTL_EOL);
    110 	if (err)
    111 		goto fail;
    112 
    113 	return;
    114 fail:
    115 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
    116 }
    117 
    118 #endif /* UHCI_DEBUG */
    119 #endif /* USB_DEBUG */
    120 
    121 #define	DPRINTF(FMT,A,B,C,D)	USBHIST_LOGN(uhcidebug,1,FMT,A,B,C,D)
    122 #define	DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGN(uhcidebug,N,FMT,A,B,C,D)
    123 #define	UHCIHIST_FUNC()		USBHIST_FUNC()
    124 #define	UHCIHIST_CALLED(name)	USBHIST_CALLED(uhcidebug)
    125 
    126 /*
    127  * The UHCI controller is little endian, so on big endian machines
    128  * the data stored in memory needs to be swapped.
    129  */
    130 
    131 struct uhci_pipe {
    132 	struct usbd_pipe pipe;
    133 	int nexttoggle;
    134 
    135 	u_char aborting;
    136 	struct usbd_xfer *abortstart, abortend;
    137 
    138 	/* Info needed for different pipe kinds. */
    139 	union {
    140 		/* Control pipe */
    141 		struct {
    142 			uhci_soft_qh_t *sqh;
    143 			usb_dma_t reqdma;
    144 			uhci_soft_td_t *setup;
    145 			uhci_soft_td_t *stat;
    146 		} ctrl;
    147 		/* Interrupt pipe */
    148 		struct {
    149 			int npoll;
    150 			uhci_soft_qh_t **qhs;
    151 		} intr;
    152 		/* Bulk pipe */
    153 		struct {
    154 			uhci_soft_qh_t *sqh;
    155 		} bulk;
    156 		/* Isochronous pipe */
    157 		struct isoc {
    158 			uhci_soft_td_t **stds;
    159 			int next, inuse;
    160 		} isoc;
    161 	};
    162 };
    163 
    164 typedef TAILQ_HEAD(ux_completeq, uhci_xfer) ux_completeq_t;
    165 
    166 Static void		uhci_globalreset(uhci_softc_t *);
    167 Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    168 Static void		uhci_reset(uhci_softc_t *);
    169 Static usbd_status	uhci_run(uhci_softc_t *, int, int);
    170 Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    171 Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    172 Static void		uhci_free_std_locked(uhci_softc_t *, uhci_soft_td_t *);
    173 Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    174 Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    175 #if 0
    176 Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    177 			    uhci_intr_info_t *);
    178 Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    179 #endif
    180 
    181 #if 0
    182 Static void		uhci_free_std_chain(uhci_softc_t *, uhci_soft_td_t *,
    183 			    uhci_soft_td_t *);
    184 #endif
    185 Static int		uhci_alloc_std_chain(uhci_softc_t *, struct usbd_xfer *,
    186 			    int, int, uhci_soft_td_t **);
    187 Static void		uhci_free_stds(uhci_softc_t *, struct uhci_xfer *);
    188 
    189 Static void		uhci_reset_std_chain(uhci_softc_t *, struct usbd_xfer *,
    190 			    int, int, int *, uhci_soft_td_t **);
    191 
    192 Static void		uhci_poll_hub(void *);
    193 Static void		uhci_check_intr(uhci_softc_t *, struct uhci_xfer *,
    194 			    ux_completeq_t *);
    195 Static void		uhci_idone(struct uhci_xfer *, ux_completeq_t *);
    196 
    197 Static void		uhci_abort_xfer(struct usbd_xfer *, usbd_status);
    198 
    199 Static void		uhci_timeout(void *);
    200 Static void		uhci_timeout_task(void *);
    201 Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    202 Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    203 Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    204 Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    205 Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    206 Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    207 Static void		uhci_add_loop(uhci_softc_t *);
    208 Static void		uhci_rem_loop(uhci_softc_t *);
    209 
    210 Static usbd_status	uhci_setup_isoc(struct usbd_pipe *);
    211 
    212 Static struct usbd_xfer *
    213 			uhci_allocx(struct usbd_bus *, unsigned int);
    214 Static void		uhci_freex(struct usbd_bus *, struct usbd_xfer *);
    215 Static void		uhci_get_lock(struct usbd_bus *, kmutex_t **);
    216 Static int		uhci_roothub_ctrl(struct usbd_bus *,
    217 			    usb_device_request_t *, void *, int);
    218 
    219 Static int		uhci_device_ctrl_init(struct usbd_xfer *);
    220 Static void		uhci_device_ctrl_fini(struct usbd_xfer *);
    221 Static usbd_status	uhci_device_ctrl_transfer(struct usbd_xfer *);
    222 Static usbd_status	uhci_device_ctrl_start(struct usbd_xfer *);
    223 Static void		uhci_device_ctrl_abort(struct usbd_xfer *);
    224 Static void		uhci_device_ctrl_close(struct usbd_pipe *);
    225 Static void		uhci_device_ctrl_done(struct usbd_xfer *);
    226 
    227 Static int		uhci_device_intr_init(struct usbd_xfer *);
    228 Static void		uhci_device_intr_fini(struct usbd_xfer *);
    229 Static usbd_status	uhci_device_intr_transfer(struct usbd_xfer *);
    230 Static usbd_status	uhci_device_intr_start(struct usbd_xfer *);
    231 Static void		uhci_device_intr_abort(struct usbd_xfer *);
    232 Static void		uhci_device_intr_close(struct usbd_pipe *);
    233 Static void		uhci_device_intr_done(struct usbd_xfer *);
    234 
    235 Static int		uhci_device_bulk_init(struct usbd_xfer *);
    236 Static void		uhci_device_bulk_fini(struct usbd_xfer *);
    237 Static usbd_status	uhci_device_bulk_transfer(struct usbd_xfer *);
    238 Static usbd_status	uhci_device_bulk_start(struct usbd_xfer *);
    239 Static void		uhci_device_bulk_abort(struct usbd_xfer *);
    240 Static void		uhci_device_bulk_close(struct usbd_pipe *);
    241 Static void		uhci_device_bulk_done(struct usbd_xfer *);
    242 
    243 Static int		uhci_device_isoc_init(struct usbd_xfer *);
    244 Static void		uhci_device_isoc_fini(struct usbd_xfer *);
    245 Static usbd_status	uhci_device_isoc_transfer(struct usbd_xfer *);
    246 Static void		uhci_device_isoc_abort(struct usbd_xfer *);
    247 Static void		uhci_device_isoc_close(struct usbd_pipe *);
    248 Static void		uhci_device_isoc_done(struct usbd_xfer *);
    249 
    250 Static usbd_status	uhci_root_intr_transfer(struct usbd_xfer *);
    251 Static usbd_status	uhci_root_intr_start(struct usbd_xfer *);
    252 Static void		uhci_root_intr_abort(struct usbd_xfer *);
    253 Static void		uhci_root_intr_close(struct usbd_pipe *);
    254 Static void		uhci_root_intr_done(struct usbd_xfer *);
    255 
    256 Static usbd_status	uhci_open(struct usbd_pipe *);
    257 Static void		uhci_poll(struct usbd_bus *);
    258 Static void		uhci_softintr(void *);
    259 
    260 Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    261 Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    262 Static usbd_status	uhci_device_setintr(uhci_softc_t *,
    263 			    struct uhci_pipe *, int);
    264 
    265 Static void		uhci_device_clear_toggle(struct usbd_pipe *);
    266 Static void		uhci_noop(struct usbd_pipe *);
    267 
    268 static inline uhci_soft_qh_t *
    269 			uhci_find_prev_qh(uhci_soft_qh_t *, uhci_soft_qh_t *);
    270 
    271 #ifdef UHCI_DEBUG
    272 Static void		uhci_dump_all(uhci_softc_t *);
    273 Static void		uhci_dumpregs(uhci_softc_t *);
    274 Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    275 Static void		uhci_dump_qh(uhci_soft_qh_t *);
    276 Static void		uhci_dump_tds(uhci_soft_td_t *);
    277 Static void		uhci_dump_td(uhci_soft_td_t *);
    278 Static void		uhci_dump_ii(struct uhci_xfer *);
    279 void			uhci_dump(void);
    280 #endif
    281 
    282 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    283 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    284 #define UWRITE1(sc, r, x) \
    285  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    286  } while (/*CONSTCOND*/0)
    287 #define UWRITE2(sc, r, x) \
    288  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    289  } while (/*CONSTCOND*/0)
    290 #define UWRITE4(sc, r, x) \
    291  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    292  } while (/*CONSTCOND*/0)
    293 
    294 static __inline uint8_t
    295 UREAD1(uhci_softc_t *sc, bus_size_t r)
    296 {
    297 
    298 	UBARR(sc);
    299 	return bus_space_read_1(sc->iot, sc->ioh, r);
    300 }
    301 
    302 static __inline uint16_t
    303 UREAD2(uhci_softc_t *sc, bus_size_t r)
    304 {
    305 
    306 	UBARR(sc);
    307 	return bus_space_read_2(sc->iot, sc->ioh, r);
    308 }
    309 
    310 #ifdef UHCI_DEBUG
    311 static __inline uint32_t
    312 UREAD4(uhci_softc_t *sc, bus_size_t r)
    313 {
    314 
    315 	UBARR(sc);
    316 	return bus_space_read_4(sc->iot, sc->ioh, r);
    317 }
    318 #endif
    319 
    320 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    321 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    322 
    323 #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    324 
    325 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    326 
    327 const struct usbd_bus_methods uhci_bus_methods = {
    328 	.ubm_open =	uhci_open,
    329 	.ubm_softint =	uhci_softintr,
    330 	.ubm_dopoll =	uhci_poll,
    331 	.ubm_allocx =	uhci_allocx,
    332 	.ubm_freex =	uhci_freex,
    333 	.ubm_getlock =	uhci_get_lock,
    334 	.ubm_rhctrl =	uhci_roothub_ctrl,
    335 };
    336 
    337 const struct usbd_pipe_methods uhci_root_intr_methods = {
    338 	.upm_transfer =	uhci_root_intr_transfer,
    339 	.upm_start =	uhci_root_intr_start,
    340 	.upm_abort =	uhci_root_intr_abort,
    341 	.upm_close =	uhci_root_intr_close,
    342 	.upm_cleartoggle =	uhci_noop,
    343 	.upm_done =	uhci_root_intr_done,
    344 };
    345 
    346 const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    347 	.upm_init =	uhci_device_ctrl_init,
    348 	.upm_fini =	uhci_device_ctrl_fini,
    349 	.upm_transfer =	uhci_device_ctrl_transfer,
    350 	.upm_start =	uhci_device_ctrl_start,
    351 	.upm_abort =	uhci_device_ctrl_abort,
    352 	.upm_close =	uhci_device_ctrl_close,
    353 	.upm_cleartoggle =	uhci_noop,
    354 	.upm_done =	uhci_device_ctrl_done,
    355 };
    356 
    357 const struct usbd_pipe_methods uhci_device_intr_methods = {
    358 	.upm_init =	uhci_device_intr_init,
    359 	.upm_fini =	uhci_device_intr_fini,
    360 	.upm_transfer =	uhci_device_intr_transfer,
    361 	.upm_start =	uhci_device_intr_start,
    362 	.upm_abort =	uhci_device_intr_abort,
    363 	.upm_close =	uhci_device_intr_close,
    364 	.upm_cleartoggle =	uhci_device_clear_toggle,
    365 	.upm_done =	uhci_device_intr_done,
    366 };
    367 
    368 const struct usbd_pipe_methods uhci_device_bulk_methods = {
    369 	.upm_init =	uhci_device_bulk_init,
    370 	.upm_fini =	uhci_device_bulk_fini,
    371 	.upm_transfer =	uhci_device_bulk_transfer,
    372 	.upm_start =	uhci_device_bulk_start,
    373 	.upm_abort =	uhci_device_bulk_abort,
    374 	.upm_close =	uhci_device_bulk_close,
    375 	.upm_cleartoggle =	uhci_device_clear_toggle,
    376 	.upm_done =	uhci_device_bulk_done,
    377 };
    378 
    379 const struct usbd_pipe_methods uhci_device_isoc_methods = {
    380 	.upm_init =	uhci_device_isoc_init,
    381 	.upm_fini =	uhci_device_isoc_fini,
    382 	.upm_transfer =	uhci_device_isoc_transfer,
    383 	.upm_abort =	uhci_device_isoc_abort,
    384 	.upm_close =	uhci_device_isoc_close,
    385 	.upm_cleartoggle =	uhci_noop,
    386 	.upm_done =	uhci_device_isoc_done,
    387 };
    388 
    389 static inline void
    390 uhci_add_intr_list(uhci_softc_t *sc, struct uhci_xfer *ux)
    391 {
    392 
    393 	TAILQ_INSERT_TAIL(&sc->sc_intrhead, ux, ux_list);
    394 }
    395 
    396 static inline void
    397 uhci_del_intr_list(uhci_softc_t *sc, struct uhci_xfer *ux)
    398 {
    399 
    400 	TAILQ_REMOVE(&sc->sc_intrhead, ux, ux_list);
    401 }
    402 
    403 static inline uhci_soft_qh_t *
    404 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    405 {
    406 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    407 	DPRINTFN(15, "pqh=%#jx sqh=%#jx", (uintptr_t)pqh, (uintptr_t)sqh, 0, 0);
    408 
    409 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    410 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    411 		usb_syncmem(&pqh->dma,
    412 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    413 		    sizeof(pqh->qh.qh_hlink),
    414 		    BUS_DMASYNC_POSTWRITE);
    415 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    416 			printf("%s: QH not found\n", __func__);
    417 			return NULL;
    418 		}
    419 #endif
    420 	}
    421 	return pqh;
    422 }
    423 
    424 void
    425 uhci_globalreset(uhci_softc_t *sc)
    426 {
    427 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    428 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    429 	UHCICMD(sc, 0);			/* do nothing */
    430 }
    431 
    432 int
    433 uhci_init(uhci_softc_t *sc)
    434 {
    435 	usbd_status err;
    436 	int i, j;
    437 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    438 	uhci_soft_td_t *std;
    439 
    440 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    441 
    442 #ifdef UHCI_DEBUG
    443 	thesc = sc;
    444 
    445 	if (uhcidebug >= 2)
    446 		uhci_dumpregs(sc);
    447 #endif
    448 
    449 	sc->sc_suspend = PWR_RESUME;
    450 
    451 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    452 	uhci_globalreset(sc);			/* reset the controller */
    453 	uhci_reset(sc);
    454 
    455 	/* Allocate and initialize real frame array. */
    456 	err = usb_allocmem(&sc->sc_bus,
    457 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    458 	    UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    459 	if (err)
    460 		return err;
    461 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    462 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    463 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    464 
    465 	/* Initialise mutex early for uhci_alloc_* */
    466 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    467 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
    468 
    469 	/*
    470 	 * Allocate a TD, inactive, that hangs from the last QH.
    471 	 * This is to avoid a bug in the PIIX that makes it run berserk
    472 	 * otherwise.
    473 	 */
    474 	std = uhci_alloc_std(sc);
    475 	if (std == NULL)
    476 		return ENOMEM;
    477 	std->link.std = NULL;
    478 	std->td.td_link = htole32(UHCI_PTR_T);
    479 	std->td.td_status = htole32(0); /* inactive */
    480 	std->td.td_token = htole32(0);
    481 	std->td.td_buffer = htole32(0);
    482 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    483 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    484 
    485 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    486 	lsqh = uhci_alloc_sqh(sc);
    487 	if (lsqh == NULL)
    488 		goto fail1;
    489 	lsqh->hlink = NULL;
    490 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    491 	lsqh->elink = std;
    492 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    493 	sc->sc_last_qh = lsqh;
    494 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    495 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    496 
    497 	/* Allocate the dummy QH where bulk traffic will be queued. */
    498 	bsqh = uhci_alloc_sqh(sc);
    499 	if (bsqh == NULL)
    500 		goto fail2;
    501 	bsqh->hlink = lsqh;
    502 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    503 	bsqh->elink = NULL;
    504 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    505 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    506 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    507 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    508 
    509 	/* Allocate dummy QH where high speed control traffic will be queued. */
    510 	chsqh = uhci_alloc_sqh(sc);
    511 	if (chsqh == NULL)
    512 		goto fail3;
    513 	chsqh->hlink = bsqh;
    514 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    515 	chsqh->elink = NULL;
    516 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    517 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    518 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    519 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    520 
    521 	/* Allocate dummy QH where control traffic will be queued. */
    522 	clsqh = uhci_alloc_sqh(sc);
    523 	if (clsqh == NULL)
    524 		goto fail4;
    525 	clsqh->hlink = chsqh;
    526 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    527 	clsqh->elink = NULL;
    528 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    529 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    530 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    531 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    532 
    533 	/*
    534 	 * Make all (virtual) frame list pointers point to the interrupt
    535 	 * queue heads and the interrupt queue heads at the control
    536 	 * queue head and point the physical frame list to the virtual.
    537 	 */
    538 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    539 		std = uhci_alloc_std(sc);
    540 		sqh = uhci_alloc_sqh(sc);
    541 		if (std == NULL || sqh == NULL)
    542 			return USBD_NOMEM;
    543 		std->link.sqh = sqh;
    544 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    545 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    546 		std->td.td_token = htole32(0);
    547 		std->td.td_buffer = htole32(0);
    548 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    549 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    550 		sqh->hlink = clsqh;
    551 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    552 		sqh->elink = NULL;
    553 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    554 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    555 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    556 		sc->sc_vframes[i].htd = std;
    557 		sc->sc_vframes[i].etd = std;
    558 		sc->sc_vframes[i].hqh = sqh;
    559 		sc->sc_vframes[i].eqh = sqh;
    560 		for (j = i;
    561 		     j < UHCI_FRAMELIST_COUNT;
    562 		     j += UHCI_VFRAMELIST_COUNT)
    563 			sc->sc_pframes[j] = htole32(std->physaddr);
    564 	}
    565 	usb_syncmem(&sc->sc_dma, 0,
    566 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    567 	    BUS_DMASYNC_PREWRITE);
    568 
    569 
    570 	TAILQ_INIT(&sc->sc_intrhead);
    571 
    572 	sc->sc_xferpool = pool_cache_init(sizeof(struct uhci_xfer), 0, 0, 0,
    573 	    "uhcixfer", NULL, IPL_USB, NULL, NULL, NULL);
    574 
    575 	callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE);
    576 
    577 	cv_init(&sc->sc_softwake_cv, "uhciab");
    578 
    579 	/* Set up the bus struct. */
    580 	sc->sc_bus.ub_methods = &uhci_bus_methods;
    581 	sc->sc_bus.ub_pipesize = sizeof(struct uhci_pipe);
    582 	sc->sc_bus.ub_usedma = true;
    583 
    584 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    585 
    586 	DPRINTF("Enabling...", 0, 0, 0, 0);
    587 
    588 	err = uhci_run(sc, 1, 0);		/* and here we go... */
    589 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    590 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    591 	return err;
    592 
    593 fail4:
    594 	uhci_free_sqh(sc, chsqh);
    595 fail3:
    596 	uhci_free_sqh(sc, lsqh);
    597 fail2:
    598 	uhci_free_sqh(sc, lsqh);
    599 fail1:
    600 	uhci_free_std(sc, std);
    601 
    602 	return ENOMEM;
    603 }
    604 
    605 int
    606 uhci_activate(device_t self, enum devact act)
    607 {
    608 	struct uhci_softc *sc = device_private(self);
    609 
    610 	switch (act) {
    611 	case DVACT_DEACTIVATE:
    612 		sc->sc_dying = 1;
    613 		return 0;
    614 	default:
    615 		return EOPNOTSUPP;
    616 	}
    617 }
    618 
    619 void
    620 uhci_childdet(device_t self, device_t child)
    621 {
    622 	struct uhci_softc *sc = device_private(self);
    623 
    624 	KASSERT(sc->sc_child == child);
    625 	sc->sc_child = NULL;
    626 }
    627 
    628 int
    629 uhci_detach(struct uhci_softc *sc, int flags)
    630 {
    631 	int rv = 0;
    632 
    633 	if (sc->sc_child != NULL)
    634 		rv = config_detach(sc->sc_child, flags);
    635 
    636 	if (rv != 0)
    637 		return rv;
    638 
    639 	callout_halt(&sc->sc_poll_handle, NULL);
    640 	callout_destroy(&sc->sc_poll_handle);
    641 
    642 	cv_destroy(&sc->sc_softwake_cv);
    643 
    644 	mutex_destroy(&sc->sc_lock);
    645 	mutex_destroy(&sc->sc_intr_lock);
    646 
    647 	pool_cache_destroy(sc->sc_xferpool);
    648 
    649 	/* XXX free other data structures XXX */
    650 
    651 	return rv;
    652 }
    653 
    654 struct usbd_xfer *
    655 uhci_allocx(struct usbd_bus *bus, unsigned int nframes)
    656 {
    657 	struct uhci_softc *sc = UHCI_BUS2SC(bus);
    658 	struct usbd_xfer *xfer;
    659 
    660 	xfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK);
    661 	if (xfer != NULL) {
    662 		memset(xfer, 0, sizeof(struct uhci_xfer));
    663 
    664 #ifdef DIAGNOSTIC
    665 		struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
    666 		uxfer->ux_isdone = true;
    667 		xfer->ux_state = XFER_BUSY;
    668 #endif
    669 	}
    670 	return xfer;
    671 }
    672 
    673 void
    674 uhci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
    675 {
    676 	struct uhci_softc *sc = UHCI_BUS2SC(bus);
    677 	struct uhci_xfer *uxfer __diagused = UHCI_XFER2UXFER(xfer);
    678 
    679 	KASSERTMSG(xfer->ux_state == XFER_BUSY, "xfer %p state %d\n", xfer,
    680 	    xfer->ux_state);
    681 	KASSERTMSG(uxfer->ux_isdone, "xfer %p not done\n", xfer);
    682 #ifdef DIAGNOSTIC
    683 	xfer->ux_state = XFER_FREE;
    684 #endif
    685 	pool_cache_put(sc->sc_xferpool, xfer);
    686 }
    687 
    688 Static void
    689 uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
    690 {
    691 	struct uhci_softc *sc = UHCI_BUS2SC(bus);
    692 
    693 	*lock = &sc->sc_lock;
    694 }
    695 
    696 
    697 /*
    698  * Handle suspend/resume.
    699  *
    700  * We need to switch to polling mode here, because this routine is
    701  * called from an interrupt context.  This is all right since we
    702  * are almost suspended anyway.
    703  */
    704 bool
    705 uhci_resume(device_t dv, const pmf_qual_t *qual)
    706 {
    707 	uhci_softc_t *sc = device_private(dv);
    708 	int cmd;
    709 
    710 	mutex_spin_enter(&sc->sc_intr_lock);
    711 
    712 	cmd = UREAD2(sc, UHCI_CMD);
    713 	sc->sc_bus.ub_usepolling++;
    714 	UWRITE2(sc, UHCI_INTR, 0);
    715 	uhci_globalreset(sc);
    716 	uhci_reset(sc);
    717 	if (cmd & UHCI_CMD_RS)
    718 		uhci_run(sc, 0, 1);
    719 
    720 	/* restore saved state */
    721 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    722 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    723 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    724 
    725 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
    726 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock);
    727 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    728 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
    729 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
    730 	UHCICMD(sc, UHCI_CMD_MAXP);
    731 	uhci_run(sc, 1, 1); /* and start traffic again */
    732 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock);
    733 	sc->sc_bus.ub_usepolling--;
    734 	if (sc->sc_intr_xfer != NULL)
    735 		callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
    736 		    sc->sc_intr_xfer);
    737 #ifdef UHCI_DEBUG
    738 	if (uhcidebug >= 2)
    739 		uhci_dumpregs(sc);
    740 #endif
    741 
    742 	sc->sc_suspend = PWR_RESUME;
    743 	mutex_spin_exit(&sc->sc_intr_lock);
    744 
    745 	return true;
    746 }
    747 
    748 bool
    749 uhci_suspend(device_t dv, const pmf_qual_t *qual)
    750 {
    751 	uhci_softc_t *sc = device_private(dv);
    752 	int cmd;
    753 
    754 	mutex_spin_enter(&sc->sc_intr_lock);
    755 
    756 	cmd = UREAD2(sc, UHCI_CMD);
    757 
    758 #ifdef UHCI_DEBUG
    759 	if (uhcidebug >= 2)
    760 		uhci_dumpregs(sc);
    761 #endif
    762 	if (sc->sc_intr_xfer != NULL)
    763 		callout_stop(&sc->sc_poll_handle);
    764 	sc->sc_suspend = PWR_SUSPEND;
    765 	sc->sc_bus.ub_usepolling++;
    766 
    767 	uhci_run(sc, 0, 1); /* stop the controller */
    768 	cmd &= ~UHCI_CMD_RS;
    769 
    770 	/* save some state if BIOS doesn't */
    771 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    772 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    773 
    774 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    775 
    776 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
    777 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock);
    778 	sc->sc_bus.ub_usepolling--;
    779 
    780 	mutex_spin_exit(&sc->sc_intr_lock);
    781 
    782 	return true;
    783 }
    784 
    785 #ifdef UHCI_DEBUG
    786 Static void
    787 uhci_dumpregs(uhci_softc_t *sc)
    788 {
    789 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    790 	DPRINTF("cmd =%04jx  sts    =%04jx  intr   =%04jx  frnum =%04jx",
    791 	    UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS),
    792 	    UREAD2(sc, UHCI_INTR), UREAD2(sc, UHCI_FRNUM));
    793 	DPRINTF("sof =%04jx  portsc1=%04jx  portsc2=%04jx  flbase=%08jx",
    794 	    UREAD1(sc, UHCI_SOF), UREAD2(sc, UHCI_PORTSC1),
    795 	    UREAD2(sc, UHCI_PORTSC2), UREAD4(sc, UHCI_FLBASEADDR));
    796 }
    797 
    798 void
    799 uhci_dump_td(uhci_soft_td_t *p)
    800 {
    801 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    802 
    803 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    804 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    805 
    806 	DPRINTF("TD(%#jx) at 0x%08jx", (uintptr_t)p, p->physaddr, 0, 0);
    807 	DPRINTF("   link=0x%08jx status=0x%08jx "
    808 	    "token=0x%08x buffer=0x%08x",
    809 	     le32toh(p->td.td_link),
    810 	     le32toh(p->td.td_status),
    811 	     le32toh(p->td.td_token),
    812 	     le32toh(p->td.td_buffer));
    813 
    814 	DPRINTF("bitstuff=%jd crcto   =%jd nak     =%jd babble  =%jd",
    815 	    !!(le32toh(p->td.td_status) & UHCI_TD_BITSTUFF),
    816 	    !!(le32toh(p->td.td_status) & UHCI_TD_CRCTO),
    817 	    !!(le32toh(p->td.td_status) & UHCI_TD_NAK),
    818 	    !!(le32toh(p->td.td_status) & UHCI_TD_BABBLE));
    819 	DPRINTF("dbuffer =%jd stalled =%jd active  =%jd ioc     =%jd",
    820 	    !!(le32toh(p->td.td_status) & UHCI_TD_DBUFFER),
    821 	    !!(le32toh(p->td.td_status) & UHCI_TD_STALLED),
    822 	    !!(le32toh(p->td.td_status) & UHCI_TD_ACTIVE),
    823 	    !!(le32toh(p->td.td_status) & UHCI_TD_IOC));
    824 	DPRINTF("ios     =%jd ls      =%jd spd     =%jd",
    825 	    !!(le32toh(p->td.td_status) & UHCI_TD_IOS),
    826 	    !!(le32toh(p->td.td_status) & UHCI_TD_LS),
    827 	    !!(le32toh(p->td.td_status) & UHCI_TD_SPD), 0);
    828 	DPRINTF("errcnt  =%d actlen  =%d pid=%02x",
    829 	    UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    830 	    UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    831 	    UHCI_TD_GET_PID(le32toh(p->td.td_token)), 0);
    832 	DPRINTF("addr=%jd  endpt=%jd  D=%jd  maxlen=%jd,",
    833 	    UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    834 	    UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    835 	    UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    836 	    UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)));
    837 }
    838 
    839 void
    840 uhci_dump_qh(uhci_soft_qh_t *sqh)
    841 {
    842 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    843 
    844 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    845 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    846 
    847 	DPRINTF("QH(%#jx) at 0x%08jx: hlink=%08jx elink=%08jx", (uintptr_t)sqh,
    848 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    849 	    le32toh(sqh->qh.qh_elink));
    850 
    851 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    852 }
    853 
    854 
    855 #if 1
    856 void
    857 uhci_dump(void)
    858 {
    859 	uhci_dump_all(thesc);
    860 }
    861 #endif
    862 
    863 void
    864 uhci_dump_all(uhci_softc_t *sc)
    865 {
    866 	uhci_dumpregs(sc);
    867 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    868 	uhci_dump_qhs(sc->sc_lctl_start);
    869 }
    870 
    871 
    872 void
    873 uhci_dump_qhs(uhci_soft_qh_t *sqh)
    874 {
    875 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    876 
    877 	uhci_dump_qh(sqh);
    878 
    879 	/*
    880 	 * uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    881 	 * Traverses sideways first, then down.
    882 	 *
    883 	 * QH1
    884 	 * QH2
    885 	 * No QH
    886 	 * TD2.1
    887 	 * TD2.2
    888 	 * TD1.1
    889 	 * etc.
    890 	 *
    891 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    892 	 */
    893 
    894 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    895 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    896 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    897 		uhci_dump_qhs(sqh->hlink);
    898 	else
    899 		DPRINTF("No QH", 0, 0, 0, 0);
    900 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    901 
    902 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    903 		uhci_dump_tds(sqh->elink);
    904 	else
    905 		DPRINTF("No QH", 0, 0, 0, 0);
    906 }
    907 
    908 void
    909 uhci_dump_tds(uhci_soft_td_t *std)
    910 {
    911 	uhci_soft_td_t *td;
    912 	int stop;
    913 
    914 	for (td = std; td != NULL; td = td->link.std) {
    915 		uhci_dump_td(td);
    916 
    917 		/*
    918 		 * Check whether the link pointer in this TD marks
    919 		 * the link pointer as end of queue. This avoids
    920 		 * printing the free list in case the queue/TD has
    921 		 * already been moved there (seatbelt).
    922 		 */
    923 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    924 		    sizeof(td->td.td_link),
    925 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    926 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    927 			le32toh(td->td.td_link) == 0);
    928 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    929 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    930 		if (stop)
    931 			break;
    932 	}
    933 }
    934 
    935 Static void
    936 uhci_dump_ii(struct uhci_xfer *ux)
    937 {
    938 	struct usbd_pipe *pipe;
    939 	usb_endpoint_descriptor_t *ed;
    940 	struct usbd_device *dev;
    941 
    942 	if (ux == NULL) {
    943 		printf("ux NULL\n");
    944 		return;
    945 	}
    946 	pipe = ux->ux_xfer.ux_pipe;
    947 	if (pipe == NULL) {
    948 		printf("ux %p: done=%d pipe=NULL\n", ux, ux->ux_isdone);
    949 		return;
    950 	}
    951 	if (pipe->up_endpoint == NULL) {
    952 		printf("ux %p: done=%d pipe=%p pipe->up_endpoint=NULL\n",
    953 		       ux, ux->ux_isdone, pipe);
    954 		return;
    955 	}
    956 	if (pipe->up_dev == NULL) {
    957 		printf("ux %p: done=%d pipe=%p pipe->up_dev=NULL\n",
    958 		       ux, ux->ux_isdone, pipe);
    959 		return;
    960 	}
    961 	ed = pipe->up_endpoint->ue_edesc;
    962 	dev = pipe->up_dev;
    963 	printf("ux %p: done=%d dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    964 	       ux, ux->ux_isdone, dev,
    965 	       UGETW(dev->ud_ddesc.idVendor),
    966 	       UGETW(dev->ud_ddesc.idProduct),
    967 	       dev->ud_addr, pipe,
    968 	       ed->bEndpointAddress, ed->bmAttributes);
    969 }
    970 
    971 void uhci_dump_iis(struct uhci_softc *sc);
    972 void
    973 uhci_dump_iis(struct uhci_softc *sc)
    974 {
    975 	struct uhci_xfer *ux;
    976 
    977 	printf("interrupt list:\n");
    978 	TAILQ_FOREACH(ux, &sc->sc_intrhead, ux_list)
    979 		uhci_dump_ii(ux);
    980 }
    981 
    982 void iidump(void);
    983 void iidump(void) { uhci_dump_iis(thesc); }
    984 
    985 #endif
    986 
    987 /*
    988  * This routine is executed periodically and simulates interrupts
    989  * from the root controller interrupt pipe for port status change.
    990  */
    991 void
    992 uhci_poll_hub(void *addr)
    993 {
    994 	struct usbd_xfer *xfer = addr;
    995 	struct usbd_pipe *pipe = xfer->ux_pipe;
    996 	uhci_softc_t *sc;
    997 	u_char *p;
    998 
    999 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1000 
   1001 	if (__predict_false(pipe->up_dev == NULL || pipe->up_dev->ud_bus == NULL))
   1002 		return;	/* device has detached */
   1003 	sc = UHCI_PIPE2SC(pipe);
   1004 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1005 
   1006 	p = xfer->ux_buf;
   1007 	p[0] = 0;
   1008 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1009 		p[0] |= 1<<1;
   1010 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1011 		p[0] |= 1<<2;
   1012 	if (p[0] == 0)
   1013 		/* No change, try again in a while */
   1014 		return;
   1015 
   1016 	xfer->ux_actlen = 1;
   1017 	xfer->ux_status = USBD_NORMAL_COMPLETION;
   1018 	mutex_enter(&sc->sc_lock);
   1019 	usb_transfer_complete(xfer);
   1020 	mutex_exit(&sc->sc_lock);
   1021 }
   1022 
   1023 void
   1024 uhci_root_intr_done(struct usbd_xfer *xfer)
   1025 {
   1026 }
   1027 
   1028 /*
   1029  * Let the last QH loop back to the high speed control transfer QH.
   1030  * This is what intel calls "bandwidth reclamation" and improves
   1031  * USB performance a lot for some devices.
   1032  * If we are already looping, just count it.
   1033  */
   1034 void
   1035 uhci_add_loop(uhci_softc_t *sc)
   1036 {
   1037 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1038 
   1039 #ifdef UHCI_DEBUG
   1040 	if (uhcinoloop)
   1041 		return;
   1042 #endif
   1043 	if (++sc->sc_loops == 1) {
   1044 		DPRINTFN(5, "add loop", 0, 0, 0, 0);
   1045 		/* Note, we don't loop back the soft pointer. */
   1046 		sc->sc_last_qh->qh.qh_hlink =
   1047 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1048 		usb_syncmem(&sc->sc_last_qh->dma,
   1049 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1050 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1051 		    BUS_DMASYNC_PREWRITE);
   1052 	}
   1053 }
   1054 
   1055 void
   1056 uhci_rem_loop(uhci_softc_t *sc)
   1057 {
   1058 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1059 
   1060 #ifdef UHCI_DEBUG
   1061 	if (uhcinoloop)
   1062 		return;
   1063 #endif
   1064 	if (--sc->sc_loops == 0) {
   1065 		DPRINTFN(5, "remove loop", 0, 0, 0, 0);
   1066 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1067 		usb_syncmem(&sc->sc_last_qh->dma,
   1068 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1069 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1070 		    BUS_DMASYNC_PREWRITE);
   1071 	}
   1072 }
   1073 
   1074 /* Add high speed control QH, called with lock held. */
   1075 void
   1076 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1077 {
   1078 	uhci_soft_qh_t *eqh;
   1079 
   1080 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1081 
   1082 	KASSERT(mutex_owned(&sc->sc_lock));
   1083 
   1084 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1085 	eqh = sc->sc_hctl_end;
   1086 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1087 	    sizeof(eqh->qh.qh_hlink),
   1088 	    BUS_DMASYNC_POSTWRITE);
   1089 	sqh->hlink       = eqh->hlink;
   1090 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1091 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1092 	    BUS_DMASYNC_PREWRITE);
   1093 	eqh->hlink       = sqh;
   1094 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1095 	sc->sc_hctl_end = sqh;
   1096 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1097 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1098 #ifdef UHCI_CTL_LOOP
   1099 	uhci_add_loop(sc);
   1100 #endif
   1101 }
   1102 
   1103 /* Remove high speed control QH, called with lock held. */
   1104 void
   1105 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1106 {
   1107 	uhci_soft_qh_t *pqh;
   1108 	uint32_t elink;
   1109 
   1110 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1111 
   1112 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1113 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1114 #ifdef UHCI_CTL_LOOP
   1115 	uhci_rem_loop(sc);
   1116 #endif
   1117 	/*
   1118 	 * The T bit should be set in the elink of the QH so that the HC
   1119 	 * doesn't follow the pointer.  This condition may fail if the
   1120 	 * the transferred packet was short so that the QH still points
   1121 	 * at the last used TD.
   1122 	 * In this case we set the T bit and wait a little for the HC
   1123 	 * to stop looking at the TD.
   1124 	 * Note that if the TD chain is large enough, the controller
   1125 	 * may still be looking at the chain at the end of this function.
   1126 	 * uhci_free_std_chain() will make sure the controller stops
   1127 	 * looking at it quickly, but until then we should not change
   1128 	 * sqh->hlink.
   1129 	 */
   1130 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1131 	    sizeof(sqh->qh.qh_elink),
   1132 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1133 	elink = le32toh(sqh->qh.qh_elink);
   1134 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1135 	    sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD);
   1136 	if (!(elink & UHCI_PTR_T)) {
   1137 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1138 		usb_syncmem(&sqh->dma,
   1139 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1140 		    sizeof(sqh->qh.qh_elink),
   1141 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1142 		delay(UHCI_QH_REMOVE_DELAY);
   1143 	}
   1144 
   1145 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1146 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1147 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1148 	pqh->hlink = sqh->hlink;
   1149 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1150 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1151 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1152 	delay(UHCI_QH_REMOVE_DELAY);
   1153 	if (sc->sc_hctl_end == sqh)
   1154 		sc->sc_hctl_end = pqh;
   1155 }
   1156 
   1157 /* Add low speed control QH, called with lock held. */
   1158 void
   1159 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1160 {
   1161 	uhci_soft_qh_t *eqh;
   1162 
   1163 	KASSERT(mutex_owned(&sc->sc_lock));
   1164 
   1165 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1166 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1167 
   1168 	eqh = sc->sc_lctl_end;
   1169 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1170 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1171 	sqh->hlink = eqh->hlink;
   1172 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1173 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1174 	    BUS_DMASYNC_PREWRITE);
   1175 	eqh->hlink = sqh;
   1176 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1177 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1178 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1179 	sc->sc_lctl_end = sqh;
   1180 }
   1181 
   1182 /* Remove low speed control QH, called with lock held. */
   1183 void
   1184 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1185 {
   1186 	uhci_soft_qh_t *pqh;
   1187 	uint32_t elink;
   1188 
   1189 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1190 
   1191 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1192 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1193 
   1194 	/* See comment in uhci_remove_hs_ctrl() */
   1195 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1196 	    sizeof(sqh->qh.qh_elink),
   1197 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1198 	elink = le32toh(sqh->qh.qh_elink);
   1199 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1200 	    sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD);
   1201 	if (!(elink & UHCI_PTR_T)) {
   1202 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1203 		usb_syncmem(&sqh->dma,
   1204 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1205 		    sizeof(sqh->qh.qh_elink),
   1206 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1207 		delay(UHCI_QH_REMOVE_DELAY);
   1208 	}
   1209 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1210 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1211 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1212 	pqh->hlink = sqh->hlink;
   1213 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1214 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1215 	    sizeof(pqh->qh.qh_hlink),
   1216 	    BUS_DMASYNC_PREWRITE);
   1217 	delay(UHCI_QH_REMOVE_DELAY);
   1218 	if (sc->sc_lctl_end == sqh)
   1219 		sc->sc_lctl_end = pqh;
   1220 }
   1221 
   1222 /* Add bulk QH, called with lock held. */
   1223 void
   1224 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1225 {
   1226 	uhci_soft_qh_t *eqh;
   1227 
   1228 	KASSERT(mutex_owned(&sc->sc_lock));
   1229 
   1230 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1231 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1232 
   1233 	eqh = sc->sc_bulk_end;
   1234 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1235 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1236 	sqh->hlink = eqh->hlink;
   1237 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1238 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1239 	    BUS_DMASYNC_PREWRITE);
   1240 	eqh->hlink = sqh;
   1241 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1242 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1243 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1244 	sc->sc_bulk_end = sqh;
   1245 	uhci_add_loop(sc);
   1246 }
   1247 
   1248 /* Remove bulk QH, called with lock held. */
   1249 void
   1250 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1251 {
   1252 	uhci_soft_qh_t *pqh;
   1253 
   1254 	KASSERT(mutex_owned(&sc->sc_lock));
   1255 
   1256 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1257 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1258 
   1259 	uhci_rem_loop(sc);
   1260 	/* See comment in uhci_remove_hs_ctrl() */
   1261 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1262 	    sizeof(sqh->qh.qh_elink),
   1263 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1264 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1265 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1266 		usb_syncmem(&sqh->dma,
   1267 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1268 		    sizeof(sqh->qh.qh_elink),
   1269 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1270 		delay(UHCI_QH_REMOVE_DELAY);
   1271 	}
   1272 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1273 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1274 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1275 	pqh->hlink       = sqh->hlink;
   1276 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1277 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1278 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1279 	delay(UHCI_QH_REMOVE_DELAY);
   1280 	if (sc->sc_bulk_end == sqh)
   1281 		sc->sc_bulk_end = pqh;
   1282 }
   1283 
   1284 Static int uhci_intr1(uhci_softc_t *);
   1285 
   1286 int
   1287 uhci_intr(void *arg)
   1288 {
   1289 	uhci_softc_t *sc = arg;
   1290 	int ret = 0;
   1291 
   1292 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1293 
   1294 	mutex_spin_enter(&sc->sc_intr_lock);
   1295 
   1296 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1297 		goto done;
   1298 
   1299 	if (sc->sc_bus.ub_usepolling || UREAD2(sc, UHCI_INTR) == 0) {
   1300 		DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0);
   1301 		goto done;
   1302 	}
   1303 
   1304 	ret = uhci_intr1(sc);
   1305 
   1306  done:
   1307 	mutex_spin_exit(&sc->sc_intr_lock);
   1308 	return ret;
   1309 }
   1310 
   1311 int
   1312 uhci_intr1(uhci_softc_t *sc)
   1313 {
   1314 	int status;
   1315 	int ack;
   1316 
   1317 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1318 
   1319 #ifdef UHCI_DEBUG
   1320 	if (uhcidebug >= 15) {
   1321 		DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0);
   1322 		uhci_dumpregs(sc);
   1323 	}
   1324 #endif
   1325 
   1326 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1327 
   1328 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1329 	/* Check if the interrupt was for us. */
   1330 	if (status == 0)
   1331 		return 0;
   1332 
   1333 	if (sc->sc_suspend != PWR_RESUME) {
   1334 #ifdef DIAGNOSTIC
   1335 		printf("%s: interrupt while not operating ignored\n",
   1336 		       device_xname(sc->sc_dev));
   1337 #endif
   1338 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1339 		return 0;
   1340 	}
   1341 
   1342 	ack = 0;
   1343 	if (status & UHCI_STS_USBINT)
   1344 		ack |= UHCI_STS_USBINT;
   1345 	if (status & UHCI_STS_USBEI)
   1346 		ack |= UHCI_STS_USBEI;
   1347 	if (status & UHCI_STS_RD) {
   1348 		ack |= UHCI_STS_RD;
   1349 #ifdef UHCI_DEBUG
   1350 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1351 #endif
   1352 	}
   1353 	if (status & UHCI_STS_HSE) {
   1354 		ack |= UHCI_STS_HSE;
   1355 		printf("%s: host system error\n", device_xname(sc->sc_dev));
   1356 	}
   1357 	if (status & UHCI_STS_HCPE) {
   1358 		ack |= UHCI_STS_HCPE;
   1359 		printf("%s: host controller process error\n",
   1360 		       device_xname(sc->sc_dev));
   1361 	}
   1362 
   1363 	/* When HCHalted=1 and Run/Stop=0 , it is normal */
   1364 	if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) {
   1365 		/* no acknowledge needed */
   1366 		if (!sc->sc_dying) {
   1367 			printf("%s: host controller halted\n",
   1368 			    device_xname(sc->sc_dev));
   1369 #ifdef UHCI_DEBUG
   1370 			uhci_dump_all(sc);
   1371 #endif
   1372 		}
   1373 		sc->sc_dying = 1;
   1374 	}
   1375 
   1376 	if (!ack)
   1377 		return 0;	/* nothing to acknowledge */
   1378 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1379 
   1380 	usb_schedsoftintr(&sc->sc_bus);
   1381 
   1382 	DPRINTFN(15, "sc %#jx done", (uintptr_t)sc, 0, 0, 0);
   1383 
   1384 	return 1;
   1385 }
   1386 
   1387 void
   1388 uhci_softintr(void *v)
   1389 {
   1390 	struct usbd_bus *bus = v;
   1391 	uhci_softc_t *sc = UHCI_BUS2SC(bus);
   1392 	struct uhci_xfer *ux, *nextux;
   1393 	ux_completeq_t cq;
   1394 
   1395 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1396 	DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0);
   1397 
   1398 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1399 
   1400 	TAILQ_INIT(&cq);
   1401 	/*
   1402 	 * Interrupts on UHCI really suck.  When the host controller
   1403 	 * interrupts because a transfer is completed there is no
   1404 	 * way of knowing which transfer it was.  You can scan down
   1405 	 * the TDs and QHs of the previous frame to limit the search,
   1406 	 * but that assumes that the interrupt was not delayed by more
   1407 	 * than 1 ms, which may not always be true (e.g. after debug
   1408 	 * output on a slow console).
   1409 	 * We scan all interrupt descriptors to see if any have
   1410 	 * completed.
   1411 	 */
   1412 	TAILQ_FOREACH_SAFE(ux, &sc->sc_intrhead, ux_list, nextux) {
   1413 		uhci_check_intr(sc, ux, &cq);
   1414 	}
   1415 
   1416 	/*
   1417 	 * We abuse ux_list for the interrupt and complete lists and
   1418 	 * interrupt transfers will get re-added here so use
   1419 	 * the _SAFE version of TAILQ_FOREACH.
   1420 	 */
   1421 	TAILQ_FOREACH_SAFE(ux, &cq, ux_list, nextux) {
   1422 		DPRINTF("ux %#jx", (uintptr_t)ux, 0, 0, 0);
   1423 		usb_transfer_complete(&ux->ux_xfer);
   1424 	}
   1425 
   1426 	if (sc->sc_softwake) {
   1427 		sc->sc_softwake = 0;
   1428 		cv_broadcast(&sc->sc_softwake_cv);
   1429 	}
   1430 }
   1431 
   1432 /* Check for an interrupt. */
   1433 void
   1434 uhci_check_intr(uhci_softc_t *sc, struct uhci_xfer *ux, ux_completeq_t *cqp)
   1435 {
   1436 	uhci_soft_td_t *std, *fstd = NULL, *lstd = NULL;
   1437 	uint32_t status;
   1438 
   1439 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1440 	DPRINTFN(15, "ux %#jx", (uintptr_t)ux, 0, 0, 0);
   1441 
   1442 	KASSERT(ux != NULL);
   1443 
   1444 	struct usbd_xfer *xfer = &ux->ux_xfer;
   1445 	if (xfer->ux_status == USBD_CANCELLED ||
   1446 	    xfer->ux_status == USBD_TIMEOUT) {
   1447 		DPRINTF("aborted xfer %#jx", (uintptr_t)xfer, 0, 0, 0);
   1448 		return;
   1449 	}
   1450 
   1451 	switch (ux->ux_type) {
   1452 	case UX_CTRL:
   1453 		fstd = ux->ux_setup;
   1454 		lstd = ux->ux_stat;
   1455 		break;
   1456 	case UX_BULK:
   1457 	case UX_INTR:
   1458 	case UX_ISOC:
   1459 		fstd = ux->ux_stdstart;
   1460 		lstd = ux->ux_stdend;
   1461 		break;
   1462 	default:
   1463 		KASSERT(false);
   1464 		break;
   1465 	}
   1466 	if (fstd == NULL)
   1467 		return;
   1468 
   1469 	KASSERT(lstd != NULL);
   1470 
   1471 	usb_syncmem(&lstd->dma,
   1472 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1473 	    sizeof(lstd->td.td_status),
   1474 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1475 	status = le32toh(lstd->td.td_status);
   1476 	usb_syncmem(&lstd->dma,
   1477 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1478 	    sizeof(lstd->td.td_status),
   1479 	    BUS_DMASYNC_PREREAD);
   1480 
   1481 	/* If the last TD is not marked active we can complete */
   1482 	if (!(status & UHCI_TD_ACTIVE)) {
   1483  done:
   1484 		DPRINTFN(12, "ux=%#jx done", (uintptr_t)ux, 0, 0, 0);
   1485 
   1486 		callout_stop(&xfer->ux_callout);
   1487 		uhci_idone(ux, cqp);
   1488 		return;
   1489 	}
   1490 
   1491 	/*
   1492 	 * If the last TD is still active we need to check whether there
   1493 	 * is an error somewhere in the middle, or whether there was a
   1494 	 * short packet (SPD and not ACTIVE).
   1495 	 */
   1496 	DPRINTFN(12, "active ux=%#jx", (uintptr_t)ux, 0, 0, 0);
   1497 	for (std = fstd; std != lstd; std = std->link.std) {
   1498 		usb_syncmem(&std->dma,
   1499 		    std->offs + offsetof(uhci_td_t, td_status),
   1500 		    sizeof(std->td.td_status),
   1501 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1502 		status = le32toh(std->td.td_status);
   1503 		usb_syncmem(&std->dma,
   1504 		    std->offs + offsetof(uhci_td_t, td_status),
   1505 		    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1506 
   1507 		/* If there's an active TD the xfer isn't done. */
   1508 		if (status & UHCI_TD_ACTIVE) {
   1509 			DPRINTFN(12, "ux=%#jx std=%#jx still active",
   1510 			    (uintptr_t)ux, (uintptr_t)std, 0, 0);
   1511 			return;
   1512 		}
   1513 
   1514 		/* Any kind of error makes the xfer done. */
   1515 		if (status & UHCI_TD_STALLED)
   1516 			goto done;
   1517 
   1518 		/*
   1519 		 * If the data phase of a control transfer is short, we need
   1520 		 * to complete the status stage
   1521 		 */
   1522 
   1523 		if ((status & UHCI_TD_SPD) && ux->ux_type == UX_CTRL) {
   1524 			struct uhci_pipe *upipe =
   1525 			    UHCI_PIPE2UPIPE(xfer->ux_pipe);
   1526 			uhci_soft_qh_t *sqh = upipe->ctrl.sqh;
   1527 			uhci_soft_td_t *stat = upipe->ctrl.stat;
   1528 
   1529 			DPRINTFN(12, "ux=%#jx std=%#jx control status"
   1530 			    "phase needs completion", (uintptr_t)ux,
   1531 			    (uintptr_t)ux->ux_stdstart, 0, 0);
   1532 
   1533 			sqh->qh.qh_elink =
   1534 			    htole32(stat->physaddr | UHCI_PTR_TD);
   1535 			usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1536 			    BUS_DMASYNC_PREWRITE);
   1537 			break;
   1538 		}
   1539 
   1540 		/* We want short packets, and it is short: it's done */
   1541 		usb_syncmem(&std->dma,
   1542 		    std->offs + offsetof(uhci_td_t, td_token),
   1543 		    sizeof(std->td.td_token),
   1544 		    BUS_DMASYNC_POSTWRITE);
   1545 
   1546 		if ((status & UHCI_TD_SPD) &&
   1547 			UHCI_TD_GET_ACTLEN(status) <
   1548 			UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) {
   1549 			goto done;
   1550 		}
   1551 	}
   1552 }
   1553 
   1554 /* Called with USB lock held. */
   1555 void
   1556 uhci_idone(struct uhci_xfer *ux, ux_completeq_t *cqp)
   1557 {
   1558 	struct usbd_xfer *xfer = &ux->ux_xfer;
   1559 	uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer);
   1560 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   1561 	uhci_soft_td_t *std;
   1562 	uint32_t status = 0, nstatus;
   1563 	int actlen;
   1564 
   1565 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1566 
   1567 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1568 	DPRINTFN(12, "ux=%#jx", (uintptr_t)ux, 0, 0, 0);
   1569 
   1570 #ifdef DIAGNOSTIC
   1571 #ifdef UHCI_DEBUG
   1572 	if (ux->ux_isdone) {
   1573 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   1574 		uhci_dump_ii(ux);
   1575 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   1576 	}
   1577 #endif
   1578 	KASSERT(!ux->ux_isdone);
   1579 	KASSERTMSG(!ux->ux_isdone, "xfer %p type %d status %d", xfer,
   1580 	    ux->ux_type, xfer->ux_status);
   1581 	ux->ux_isdone = true;
   1582 #endif
   1583 
   1584 	if (xfer->ux_nframes != 0) {
   1585 		/* Isoc transfer, do things differently. */
   1586 		uhci_soft_td_t **stds = upipe->isoc.stds;
   1587 		int i, n, nframes, len;
   1588 
   1589 		DPRINTFN(5, "ux=%#jx isoc ready", (uintptr_t)ux, 0, 0, 0);
   1590 
   1591 		nframes = xfer->ux_nframes;
   1592 		actlen = 0;
   1593 		n = ux->ux_curframe;
   1594 		for (i = 0; i < nframes; i++) {
   1595 			std = stds[n];
   1596 #ifdef UHCI_DEBUG
   1597 			if (uhcidebug >= 5) {
   1598 				DPRINTF("isoc TD %jd", i, 0, 0, 0);
   1599 				DPRINTF("--- dump start ---", 0, 0, 0, 0);
   1600 				uhci_dump_td(std);
   1601 				DPRINTF("--- dump end ---", 0, 0, 0, 0);
   1602 			}
   1603 #endif
   1604 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1605 				n = 0;
   1606 			usb_syncmem(&std->dma,
   1607 			    std->offs + offsetof(uhci_td_t, td_status),
   1608 			    sizeof(std->td.td_status),
   1609 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1610 			status = le32toh(std->td.td_status);
   1611 			len = UHCI_TD_GET_ACTLEN(status);
   1612 			xfer->ux_frlengths[i] = len;
   1613 			actlen += len;
   1614 		}
   1615 		upipe->isoc.inuse -= nframes;
   1616 		xfer->ux_actlen = actlen;
   1617 		xfer->ux_status = USBD_NORMAL_COMPLETION;
   1618 		goto end;
   1619 	}
   1620 
   1621 #ifdef UHCI_DEBUG
   1622 	DPRINTFN(10, "ux=%#jx, xfer=%#jx, pipe=%#jx ready", (uintptr_t)ux,
   1623 	    (uintptr_t)xfer, (uintptr_t)upipe, 0);
   1624 	if (uhcidebug >= 10) {
   1625 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   1626 		uhci_dump_tds(ux->ux_stdstart);
   1627 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   1628 	}
   1629 #endif
   1630 
   1631 	/* The transfer is done, compute actual length and status. */
   1632 	actlen = 0;
   1633 	for (std = ux->ux_stdstart; std != NULL; std = std->link.std) {
   1634 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1635 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1636 		nstatus = le32toh(std->td.td_status);
   1637 		if (nstatus & UHCI_TD_ACTIVE)
   1638 			break;
   1639 
   1640 		status = nstatus;
   1641 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1642 			UHCI_TD_PID_SETUP)
   1643 			actlen += UHCI_TD_GET_ACTLEN(status);
   1644 		else {
   1645 			/*
   1646 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1647 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1648 			 * CONTROL AND STATUS".
   1649 			 */
   1650 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1651 				status &= ~UHCI_TD_CRCTO;
   1652 		}
   1653 	}
   1654 	/* If there are left over TDs we need to update the toggle. */
   1655 	if (std != NULL)
   1656 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1657 
   1658 	status &= UHCI_TD_ERROR;
   1659 	DPRINTFN(10, "actlen=%jd, status=0x%jx", actlen, status, 0, 0);
   1660 	xfer->ux_actlen = actlen;
   1661 	if (status != 0) {
   1662 
   1663 		DPRINTFN((status == UHCI_TD_STALLED) * 10,
   1664 		    "error, addr=%jd, endpt=0x%02jx",
   1665 		    xfer->ux_pipe->up_dev->ud_addr,
   1666 		    xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress,
   1667 		    0, 0);
   1668 		DPRINTFN((status == UHCI_TD_STALLED) * 10,
   1669 		    "bitstuff=%jd crcto   =%jd nak     =%jd babble  =%jd",
   1670 		    !!(status & UHCI_TD_BITSTUFF),
   1671 		    !!(status & UHCI_TD_CRCTO),
   1672 		    !!(status & UHCI_TD_NAK),
   1673 		    !!(status & UHCI_TD_BABBLE));
   1674 		DPRINTFN((status == UHCI_TD_STALLED) * 10,
   1675 		    "dbuffer =%jd stalled =%jd active  =%jd",
   1676 		    !!(status & UHCI_TD_DBUFFER),
   1677 		    !!(status & UHCI_TD_STALLED),
   1678 		    !!(status & UHCI_TD_ACTIVE),
   1679 		    0);
   1680 
   1681 		if (status == UHCI_TD_STALLED)
   1682 			xfer->ux_status = USBD_STALLED;
   1683 		else
   1684 			xfer->ux_status = USBD_IOERROR; /* more info XXX */
   1685 	} else {
   1686 		xfer->ux_status = USBD_NORMAL_COMPLETION;
   1687 	}
   1688 
   1689  end:
   1690 	uhci_del_intr_list(sc, ux);
   1691 	if (cqp)
   1692 		TAILQ_INSERT_TAIL(cqp, ux, ux_list);
   1693 
   1694 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1695 	DPRINTFN(12, "ux=%#jx done", (uintptr_t)ux, 0, 0, 0);
   1696 }
   1697 
   1698 /*
   1699  * Called when a request does not complete.
   1700  */
   1701 void
   1702 uhci_timeout(void *addr)
   1703 {
   1704 	struct usbd_xfer *xfer = addr;
   1705 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   1706 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   1707 
   1708 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1709 
   1710 	DPRINTF("uxfer %#jx", (uintptr_t)uxfer, 0, 0, 0);
   1711 
   1712 	if (sc->sc_dying) {
   1713 		mutex_enter(&sc->sc_lock);
   1714 		uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1715 		mutex_exit(&sc->sc_lock);
   1716 		return;
   1717 	}
   1718 
   1719 	/* Execute the abort in a process context. */
   1720 	usb_init_task(&uxfer->ux_aborttask, uhci_timeout_task, xfer,
   1721 	    USB_TASKQ_MPSAFE);
   1722 	usb_add_task(uxfer->ux_xfer.ux_pipe->up_dev, &uxfer->ux_aborttask,
   1723 	    USB_TASKQ_HC);
   1724 }
   1725 
   1726 void
   1727 uhci_timeout_task(void *addr)
   1728 {
   1729 	struct usbd_xfer *xfer = addr;
   1730 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   1731 
   1732 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1733 
   1734 	DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   1735 
   1736 	mutex_enter(&sc->sc_lock);
   1737 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1738 	mutex_exit(&sc->sc_lock);
   1739 }
   1740 
   1741 void
   1742 uhci_poll(struct usbd_bus *bus)
   1743 {
   1744 	uhci_softc_t *sc = UHCI_BUS2SC(bus);
   1745 
   1746 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1747 		mutex_spin_enter(&sc->sc_intr_lock);
   1748 		uhci_intr1(sc);
   1749 		mutex_spin_exit(&sc->sc_intr_lock);
   1750 	}
   1751 }
   1752 
   1753 void
   1754 uhci_reset(uhci_softc_t *sc)
   1755 {
   1756 	int n;
   1757 
   1758 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1759 	/* The reset bit goes low when the controller is done. */
   1760 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1761 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1762 		usb_delay_ms(&sc->sc_bus, 1);
   1763 	if (n >= UHCI_RESET_TIMEOUT)
   1764 		printf("%s: controller did not reset\n",
   1765 		       device_xname(sc->sc_dev));
   1766 }
   1767 
   1768 usbd_status
   1769 uhci_run(uhci_softc_t *sc, int run, int locked)
   1770 {
   1771 	int n, running;
   1772 	uint16_t cmd;
   1773 
   1774 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1775 
   1776 	run = run != 0;
   1777 	if (!locked)
   1778 		mutex_spin_enter(&sc->sc_intr_lock);
   1779 
   1780 	DPRINTF("setting run=%jd", run, 0, 0, 0);
   1781 	cmd = UREAD2(sc, UHCI_CMD);
   1782 	if (run)
   1783 		cmd |= UHCI_CMD_RS;
   1784 	else
   1785 		cmd &= ~UHCI_CMD_RS;
   1786 	UHCICMD(sc, cmd);
   1787 	for (n = 0; n < 10; n++) {
   1788 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1789 		/* return when we've entered the state we want */
   1790 		if (run == running) {
   1791 			if (!locked)
   1792 				mutex_spin_exit(&sc->sc_intr_lock);
   1793 			DPRINTF("done cmd=0x%jx sts=0x%jx",
   1794 			    UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 0, 0);
   1795 			return USBD_NORMAL_COMPLETION;
   1796 		}
   1797 		usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock);
   1798 	}
   1799 	if (!locked)
   1800 		mutex_spin_exit(&sc->sc_intr_lock);
   1801 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
   1802 	       run ? "start" : "stop");
   1803 	return USBD_IOERROR;
   1804 }
   1805 
   1806 /*
   1807  * Memory management routines.
   1808  *  uhci_alloc_std allocates TDs
   1809  *  uhci_alloc_sqh allocates QHs
   1810  * These two routines do their own free list management,
   1811  * partly for speed, partly because allocating DMAable memory
   1812  * has page size granularity so much memory would be wasted if
   1813  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1814  */
   1815 
   1816 uhci_soft_td_t *
   1817 uhci_alloc_std(uhci_softc_t *sc)
   1818 {
   1819 	uhci_soft_td_t *std;
   1820 	usbd_status err;
   1821 	int i, offs;
   1822 	usb_dma_t dma;
   1823 
   1824 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1825 
   1826 	mutex_enter(&sc->sc_lock);
   1827 	if (sc->sc_freetds == NULL) {
   1828 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
   1829 		mutex_exit(&sc->sc_lock);
   1830 
   1831 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1832 			  UHCI_TD_ALIGN, &dma);
   1833 		if (err)
   1834 			return NULL;
   1835 
   1836 		mutex_enter(&sc->sc_lock);
   1837 		for (i = 0; i < UHCI_STD_CHUNK; i++) {
   1838 			offs = i * UHCI_STD_SIZE;
   1839 			std = KERNADDR(&dma, offs);
   1840 			std->physaddr = DMAADDR(&dma, offs);
   1841 			std->dma = dma;
   1842 			std->offs = offs;
   1843 			std->link.std = sc->sc_freetds;
   1844 			sc->sc_freetds = std;
   1845 		}
   1846 	}
   1847 	std = sc->sc_freetds;
   1848 	sc->sc_freetds = std->link.std;
   1849 	mutex_exit(&sc->sc_lock);
   1850 
   1851 	memset(&std->td, 0, sizeof(uhci_td_t));
   1852 
   1853 	return std;
   1854 }
   1855 
   1856 #define TD_IS_FREE 0x12345678
   1857 
   1858 void
   1859 uhci_free_std_locked(uhci_softc_t *sc, uhci_soft_td_t *std)
   1860 {
   1861 	KASSERT(mutex_owned(&sc->sc_lock));
   1862 
   1863 #ifdef DIAGNOSTIC
   1864 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1865 		printf("%s: freeing free TD %p\n", __func__, std);
   1866 		return;
   1867 	}
   1868 	std->td.td_token = htole32(TD_IS_FREE);
   1869 #endif
   1870 
   1871 	std->link.std = sc->sc_freetds;
   1872 	sc->sc_freetds = std;
   1873 }
   1874 
   1875 void
   1876 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1877 {
   1878 	mutex_enter(&sc->sc_lock);
   1879 	uhci_free_std_locked(sc, std);
   1880 	mutex_exit(&sc->sc_lock);
   1881 }
   1882 
   1883 uhci_soft_qh_t *
   1884 uhci_alloc_sqh(uhci_softc_t *sc)
   1885 {
   1886 	uhci_soft_qh_t *sqh;
   1887 	usbd_status err;
   1888 	int i, offs;
   1889 	usb_dma_t dma;
   1890 
   1891 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1892 
   1893 	mutex_enter(&sc->sc_lock);
   1894 	if (sc->sc_freeqhs == NULL) {
   1895 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
   1896 		mutex_exit(&sc->sc_lock);
   1897 
   1898 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1899 			  UHCI_QH_ALIGN, &dma);
   1900 		if (err)
   1901 			return NULL;
   1902 
   1903 		mutex_enter(&sc->sc_lock);
   1904 		for (i = 0; i < UHCI_SQH_CHUNK; i++) {
   1905 			offs = i * UHCI_SQH_SIZE;
   1906 			sqh = KERNADDR(&dma, offs);
   1907 			sqh->physaddr = DMAADDR(&dma, offs);
   1908 			sqh->dma = dma;
   1909 			sqh->offs = offs;
   1910 			sqh->hlink = sc->sc_freeqhs;
   1911 			sc->sc_freeqhs = sqh;
   1912 		}
   1913 	}
   1914 	sqh = sc->sc_freeqhs;
   1915 	sc->sc_freeqhs = sqh->hlink;
   1916 	mutex_exit(&sc->sc_lock);
   1917 
   1918 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1919 
   1920 	return sqh;
   1921 }
   1922 
   1923 void
   1924 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1925 {
   1926 	KASSERT(mutex_owned(&sc->sc_lock));
   1927 
   1928 	sqh->hlink = sc->sc_freeqhs;
   1929 	sc->sc_freeqhs = sqh;
   1930 }
   1931 
   1932 #if 0
   1933 void
   1934 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1935 		    uhci_soft_td_t *stdend)
   1936 {
   1937 	uhci_soft_td_t *p;
   1938 	uint32_t td_link;
   1939 
   1940 	/*
   1941 	 * to avoid race condition with the controller which may be looking
   1942 	 * at this chain, we need to first invalidate all links, and
   1943 	 * then wait for the controller to move to another queue
   1944 	 */
   1945 	for (p = std; p != stdend; p = p->link.std) {
   1946 		usb_syncmem(&p->dma,
   1947 		    p->offs + offsetof(uhci_td_t, td_link),
   1948 		    sizeof(p->td.td_link),
   1949 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1950 		td_link = le32toh(p->td.td_link);
   1951 		usb_syncmem(&p->dma,
   1952 		    p->offs + offsetof(uhci_td_t, td_link),
   1953 		    sizeof(p->td.td_link),
   1954 		    BUS_DMASYNC_PREREAD);
   1955 		if ((td_link & UHCI_PTR_T) == 0) {
   1956 			p->td.td_link = htole32(UHCI_PTR_T);
   1957 			usb_syncmem(&p->dma,
   1958 			    p->offs + offsetof(uhci_td_t, td_link),
   1959 			    sizeof(p->td.td_link),
   1960 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1961 		}
   1962 	}
   1963 	delay(UHCI_QH_REMOVE_DELAY);
   1964 
   1965 	for (; std != stdend; std = p) {
   1966 		p = std->link.std;
   1967 		uhci_free_std(sc, std);
   1968 	}
   1969 }
   1970 #endif
   1971 
   1972 int
   1973 uhci_alloc_std_chain(uhci_softc_t *sc, struct usbd_xfer *xfer, int len,
   1974     int rd, uhci_soft_td_t **sp)
   1975 {
   1976 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   1977 	uint16_t flags = xfer->ux_flags;
   1978 	uhci_soft_td_t *p;
   1979 
   1980 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1981 
   1982 	DPRINTFN(8, "xfer=%#jx pipe=%#jx", (uintptr_t)xfer,
   1983 	    (uintptr_t)xfer->ux_pipe, 0, 0);
   1984 
   1985 	ASSERT_SLEEPABLE();
   1986 	KASSERT(sp);
   1987 
   1988 	int maxp = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize);
   1989 	if (maxp == 0) {
   1990 		printf("%s: maxp=0\n", __func__);
   1991 		return EINVAL;
   1992 	}
   1993 	size_t ntd = (len + maxp - 1) / maxp;
   1994 	if (!rd && (flags & USBD_FORCE_SHORT_XFER)) {
   1995 		ntd++;
   1996 	}
   1997 	DPRINTFN(10, "maxp=%jd ntd=%jd", maxp, ntd, 0, 0);
   1998 
   1999 	uxfer->ux_stds = NULL;
   2000 	uxfer->ux_nstd = ntd;
   2001 	if (ntd == 0) {
   2002 		*sp = NULL;
   2003 		DPRINTF("ntd=0", 0, 0, 0, 0);
   2004 		return 0;
   2005 	}
   2006 	uxfer->ux_stds = kmem_alloc(sizeof(uhci_soft_td_t *) * ntd,
   2007 	    KM_SLEEP);
   2008 
   2009 	for (int i = 0; i < ntd; i++) {
   2010 		p = uhci_alloc_std(sc);
   2011 		if (p == NULL) {
   2012 			if (i != 0) {
   2013 				uxfer->ux_nstd = i;
   2014 				uhci_free_stds(sc, uxfer);
   2015 			}
   2016 			kmem_free(uxfer->ux_stds,
   2017 			    sizeof(uhci_soft_td_t *) * ntd);
   2018 			return ENOMEM;
   2019 		}
   2020 		uxfer->ux_stds[i] = p;
   2021 	}
   2022 
   2023 	*sp = uxfer->ux_stds[0];
   2024 
   2025 	return 0;
   2026 }
   2027 
   2028 Static void
   2029 uhci_free_stds(uhci_softc_t *sc, struct uhci_xfer *ux)
   2030 {
   2031 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2032 
   2033 	DPRINTFN(8, "ux=%#jx", (uintptr_t)ux, 0, 0, 0);
   2034 
   2035 	mutex_enter(&sc->sc_lock);
   2036 	for (size_t i = 0; i < ux->ux_nstd; i++) {
   2037 		uhci_soft_td_t *std = ux->ux_stds[i];
   2038 #ifdef DIAGNOSTIC
   2039 		if (le32toh(std->td.td_token) == TD_IS_FREE) {
   2040 			printf("%s: freeing free TD %p\n", __func__, std);
   2041 			return;
   2042 		}
   2043 		std->td.td_token = htole32(TD_IS_FREE);
   2044 #endif
   2045 		ux->ux_stds[i]->link.std = sc->sc_freetds;
   2046 		sc->sc_freetds = std;
   2047 	}
   2048 	mutex_exit(&sc->sc_lock);
   2049 }
   2050 
   2051 
   2052 Static void
   2053 uhci_reset_std_chain(uhci_softc_t *sc, struct usbd_xfer *xfer,
   2054     int length, int isread, int *toggle, uhci_soft_td_t **lstd)
   2055 {
   2056 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   2057 	struct usbd_pipe *pipe = xfer->ux_pipe;
   2058 	usb_dma_t *dma = &xfer->ux_dmabuf;
   2059 	uint16_t flags = xfer->ux_flags;
   2060 	uhci_soft_td_t *std, *prev;
   2061 	int len = length;
   2062 	int tog = *toggle;
   2063 	int maxp;
   2064 	uint32_t status;
   2065 	size_t i;
   2066 
   2067 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2068 	DPRINTFN(8, "xfer=%#jx len %jd isread %jd toggle %jd", (uintptr_t)xfer,
   2069 	    len, isread, *toggle);
   2070 
   2071 	KASSERT(len != 0 || (!isread && (flags & USBD_FORCE_SHORT_XFER)));
   2072 
   2073 	maxp = UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize);
   2074 	KASSERT(maxp != 0);
   2075 
   2076 	int addr = xfer->ux_pipe->up_dev->ud_addr;
   2077 	int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   2078 
   2079 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   2080 	if (pipe->up_dev->ud_speed == USB_SPEED_LOW)
   2081 		status |= UHCI_TD_LS;
   2082 	if (flags & USBD_SHORT_XFER_OK)
   2083 		status |= UHCI_TD_SPD;
   2084 	usb_syncmem(dma, 0, len,
   2085 	    isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2086 	std = prev = NULL;
   2087 	for (i = 0; len != 0 && i < uxfer->ux_nstd; i++, prev = std) {
   2088 		int l = len;
   2089 		std = uxfer->ux_stds[i];
   2090 		if (l > maxp)
   2091 			l = maxp;
   2092 
   2093 		if (prev) {
   2094 			prev->link.std = std;
   2095 			prev->td.td_link = htole32(
   2096 			    std->physaddr | UHCI_PTR_VF | UHCI_PTR_TD
   2097 			    );
   2098 			usb_syncmem(&prev->dma, prev->offs, sizeof(prev->td),
   2099 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2100 		}
   2101 
   2102 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2103 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2104 
   2105 		std->td.td_link = htole32(UHCI_PTR_T | UHCI_PTR_VF | UHCI_PTR_TD);
   2106 		std->td.td_status = htole32(status);
   2107 		std->td.td_token = htole32(
   2108 		    UHCI_TD_SET_ENDPT(UE_GET_ADDR(endpt)) |
   2109 		    UHCI_TD_SET_DEVADDR(addr) |
   2110 		    UHCI_TD_SET_PID(isread ? UHCI_TD_PID_IN : UHCI_TD_PID_OUT) |
   2111 		    UHCI_TD_SET_DT(tog) |
   2112 		    UHCI_TD_SET_MAXLEN(l)
   2113 		    );
   2114 		std->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   2115 
   2116 		std->link.std = NULL;
   2117 
   2118 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2119 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2120 		tog ^= 1;
   2121 
   2122 		len -= l;
   2123 	}
   2124 	KASSERTMSG(len == 0, "xfer %p alen %d len %d mps %d ux_nqtd %zu i %zu",
   2125 	    xfer, length, len, maxp, uxfer->ux_nstd, i);
   2126 
   2127 	if (!isread &&
   2128 	    (flags & USBD_FORCE_SHORT_XFER) &&
   2129 	    length % maxp == 0) {
   2130 		/* Force a 0 length transfer at the end. */
   2131 		KASSERTMSG(i < uxfer->ux_nstd, "i=%zu nstd=%zu", i,
   2132 		    uxfer->ux_nstd);
   2133 		std = uxfer->ux_stds[i++];
   2134 
   2135 		std->td.td_link = htole32(UHCI_PTR_T | UHCI_PTR_VF | UHCI_PTR_TD);
   2136 		std->td.td_status = htole32(status);
   2137 		std->td.td_token = htole32(
   2138 		    UHCI_TD_SET_ENDPT(UE_GET_ADDR(endpt)) |
   2139 		    UHCI_TD_SET_DEVADDR(addr) |
   2140 		    UHCI_TD_SET_PID(UHCI_TD_PID_OUT) |
   2141 		    UHCI_TD_SET_DT(tog) |
   2142 		    UHCI_TD_SET_MAXLEN(0)
   2143 		    );
   2144 		std->td.td_buffer = 0;
   2145 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2146 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2147 
   2148 		std->link.std = NULL;
   2149 		if (prev) {
   2150 			prev->link.std = std;
   2151 			prev->td.td_link = htole32(
   2152 			    std->physaddr | UHCI_PTR_VF | UHCI_PTR_TD
   2153 			    );
   2154 			usb_syncmem(&prev->dma, prev->offs, sizeof(prev->td),
   2155 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2156 		}
   2157 		tog ^= 1;
   2158 	}
   2159 	*lstd = std;
   2160 	*toggle = tog;
   2161 }
   2162 
   2163 void
   2164 uhci_device_clear_toggle(struct usbd_pipe *pipe)
   2165 {
   2166 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   2167 	upipe->nexttoggle = 0;
   2168 }
   2169 
   2170 void
   2171 uhci_noop(struct usbd_pipe *pipe)
   2172 {
   2173 }
   2174 
   2175 int
   2176 uhci_device_bulk_init(struct usbd_xfer *xfer)
   2177 {
   2178 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2179 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   2180 	usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc;
   2181 	int endpt = ed->bEndpointAddress;
   2182 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2183 	int len = xfer->ux_bufsize;
   2184 	int err = 0;
   2185 
   2186 
   2187 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2188 	DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer, len,
   2189 	    xfer->ux_flags, 0);
   2190 
   2191 	if (sc->sc_dying)
   2192 		return USBD_IOERROR;
   2193 
   2194 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2195 
   2196 	uxfer->ux_type = UX_BULK;
   2197 	err = uhci_alloc_std_chain(sc, xfer, len, isread, &uxfer->ux_stdstart);
   2198 	if (err)
   2199 		return err;
   2200 
   2201 #ifdef UHCI_DEBUG
   2202 	if (uhcidebug >= 10) {
   2203 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2204 		uhci_dump_tds(uxfer->ux_stdstart);
   2205 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2206 	}
   2207 #endif
   2208 
   2209 	return 0;
   2210 }
   2211 
   2212 Static void
   2213 uhci_device_bulk_fini(struct usbd_xfer *xfer)
   2214 {
   2215 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2216 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2217 
   2218 	KASSERT(ux->ux_type == UX_BULK);
   2219 
   2220 	if (ux->ux_nstd) {
   2221 		uhci_free_stds(sc, ux);
   2222 		kmem_free(ux->ux_stds, sizeof(uhci_soft_td_t *) * ux->ux_nstd);
   2223 	}
   2224 }
   2225 
   2226 usbd_status
   2227 uhci_device_bulk_transfer(struct usbd_xfer *xfer)
   2228 {
   2229 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2230 	usbd_status err;
   2231 
   2232 	/* Insert last in queue. */
   2233 	mutex_enter(&sc->sc_lock);
   2234 	err = usb_insert_transfer(xfer);
   2235 	mutex_exit(&sc->sc_lock);
   2236 	if (err)
   2237 		return err;
   2238 
   2239 	/*
   2240 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2241 	 * so start it first.
   2242 	 */
   2243 	return uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2244 }
   2245 
   2246 usbd_status
   2247 uhci_device_bulk_start(struct usbd_xfer *xfer)
   2248 {
   2249 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2250 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2251 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2252 	uhci_soft_td_t *data, *dataend;
   2253 	uhci_soft_qh_t *sqh;
   2254 	int len;
   2255 	int endpt;
   2256 	int isread;
   2257 
   2258 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2259 	DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer,
   2260 	    xfer->ux_length, xfer->ux_flags, 0);
   2261 
   2262 	if (sc->sc_dying)
   2263 		return USBD_IOERROR;
   2264 
   2265 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2266 	KASSERT(xfer->ux_length <= xfer->ux_bufsize);
   2267 
   2268 	len = xfer->ux_length;
   2269 	endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2270 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2271 	sqh = upipe->bulk.sqh;
   2272 
   2273 	/* Take lock here to protect nexttoggle */
   2274 	mutex_enter(&sc->sc_lock);
   2275 
   2276 	uhci_reset_std_chain(sc, xfer, len, isread, &upipe->nexttoggle,
   2277 	    &dataend);
   2278 
   2279 	data = ux->ux_stdstart;
   2280 	ux->ux_stdend = dataend;
   2281 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2282 	usb_syncmem(&dataend->dma,
   2283 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2284 	    sizeof(dataend->td.td_status),
   2285 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2286 
   2287 #ifdef UHCI_DEBUG
   2288 	if (uhcidebug >= 10) {
   2289 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2290 		DPRINTFN(10, "before transfer", 0, 0, 0, 0);
   2291 		uhci_dump_tds(data);
   2292 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2293 	}
   2294 #endif
   2295 
   2296 	KASSERT(ux->ux_isdone);
   2297 #ifdef DIAGNOSTIC
   2298 	ux->ux_isdone = false;
   2299 #endif
   2300 
   2301 	sqh->elink = data;
   2302 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2303 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2304 
   2305 	uhci_add_bulk(sc, sqh);
   2306 	uhci_add_intr_list(sc, ux);
   2307 
   2308 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   2309 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   2310 			    uhci_timeout, xfer);
   2311 	}
   2312 	xfer->ux_status = USBD_IN_PROGRESS;
   2313 	mutex_exit(&sc->sc_lock);
   2314 
   2315 	return USBD_IN_PROGRESS;
   2316 }
   2317 
   2318 /* Abort a device bulk request. */
   2319 void
   2320 uhci_device_bulk_abort(struct usbd_xfer *xfer)
   2321 {
   2322 	uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer);
   2323 
   2324 	KASSERT(mutex_owned(&sc->sc_lock));
   2325 
   2326 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2327 
   2328 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2329 }
   2330 
   2331 /*
   2332  * Abort a device request.
   2333  * If this routine is called at splusb() it guarantees that the request
   2334  * will be removed from the hardware scheduling and that the callback
   2335  * for it will be called with USBD_CANCELLED status.
   2336  * It's impossible to guarantee that the requested transfer will not
   2337  * have happened since the hardware runs concurrently.
   2338  * If the transaction has already happened we rely on the ordinary
   2339  * interrupt processing to process it.
   2340  * XXX This is most probably wrong.
   2341  * XXXMRG this doesn't make sense anymore.
   2342  */
   2343 void
   2344 uhci_abort_xfer(struct usbd_xfer *xfer, usbd_status status)
   2345 {
   2346 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2347 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2348 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2349 	uhci_soft_td_t *std;
   2350 	int wake;
   2351 
   2352 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2353 	DPRINTFN(1,"xfer=%#jx, status=%jd", (uintptr_t)xfer, status, 0, 0);
   2354 
   2355 	KASSERT(mutex_owned(&sc->sc_lock));
   2356 	ASSERT_SLEEPABLE();
   2357 
   2358 	if (sc->sc_dying) {
   2359 		/* If we're dying, just do the software part. */
   2360 		xfer->ux_status = status;	/* make software ignore it */
   2361 		callout_stop(&xfer->ux_callout);
   2362 		usb_transfer_complete(xfer);
   2363 		return;
   2364 	}
   2365 
   2366 	/*
   2367 	 * If an abort is already in progress then just wait for it to
   2368 	 * complete and return.
   2369 	 */
   2370 	if (xfer->ux_hcflags & UXFER_ABORTING) {
   2371 		DPRINTFN(2, "already aborting", 0, 0, 0, 0);
   2372 #ifdef DIAGNOSTIC
   2373 		if (status == USBD_TIMEOUT)
   2374 			printf("%s: TIMEOUT while aborting\n", __func__);
   2375 #endif
   2376 		/* Override the status which might be USBD_TIMEOUT. */
   2377 		xfer->ux_status = status;
   2378 		DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0);
   2379 		xfer->ux_hcflags |= UXFER_ABORTWAIT;
   2380 		while (xfer->ux_hcflags & UXFER_ABORTING)
   2381 			cv_wait(&xfer->ux_hccv, &sc->sc_lock);
   2382 		goto done;
   2383 	}
   2384 	xfer->ux_hcflags |= UXFER_ABORTING;
   2385 
   2386 	/*
   2387 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2388 	 */
   2389 	xfer->ux_status = status;	/* make software ignore it */
   2390 	callout_stop(&xfer->ux_callout);
   2391 	uhci_del_intr_list(sc, ux);
   2392 
   2393 	DPRINTF("stop ux=%#jx", (uintptr_t)ux, 0, 0, 0);
   2394 	for (std = ux->ux_stdstart; std != NULL; std = std->link.std) {
   2395 		usb_syncmem(&std->dma,
   2396 		    std->offs + offsetof(uhci_td_t, td_status),
   2397 		    sizeof(std->td.td_status),
   2398 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2399 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2400 		usb_syncmem(&std->dma,
   2401 		    std->offs + offsetof(uhci_td_t, td_status),
   2402 		    sizeof(std->td.td_status),
   2403 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2404 	}
   2405 
   2406 	/*
   2407 	 * Step 2: Wait until we know hardware has finished any possible
   2408 	 * use of the xfer.  Also make sure the soft interrupt routine
   2409 	 * has run.
   2410 	 */
   2411 	/* Hardware finishes in 1ms */
   2412 	usb_delay_ms_locked(upipe->pipe.up_dev->ud_bus, 2, &sc->sc_lock);
   2413 	sc->sc_softwake = 1;
   2414 	usb_schedsoftintr(&sc->sc_bus);
   2415 	DPRINTF("cv_wait", 0, 0, 0, 0);
   2416 	cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
   2417 
   2418 	/*
   2419 	 * Step 3: Execute callback.
   2420 	 */
   2421 	DPRINTF("callback", 0, 0, 0, 0);
   2422 #ifdef DIAGNOSTIC
   2423 	ux->ux_isdone = true;
   2424 #endif
   2425 	wake = xfer->ux_hcflags & UXFER_ABORTWAIT;
   2426 	xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2427 	usb_transfer_complete(xfer);
   2428 	if (wake)
   2429 		cv_broadcast(&xfer->ux_hccv);
   2430 done:
   2431 	KASSERT(mutex_owned(&sc->sc_lock));
   2432 }
   2433 
   2434 /* Close a device bulk pipe. */
   2435 void
   2436 uhci_device_bulk_close(struct usbd_pipe *pipe)
   2437 {
   2438 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   2439 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   2440 
   2441 	KASSERT(mutex_owned(&sc->sc_lock));
   2442 
   2443 	uhci_free_sqh(sc, upipe->bulk.sqh);
   2444 
   2445 	pipe->up_endpoint->ue_toggle = upipe->nexttoggle;
   2446 }
   2447 
   2448 int
   2449 uhci_device_ctrl_init(struct usbd_xfer *xfer)
   2450 {
   2451 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   2452 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2453 	usb_device_request_t *req = &xfer->ux_request;
   2454 	struct usbd_device *dev = upipe->pipe.up_dev;
   2455 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2456 	uhci_soft_td_t *data = NULL;
   2457 	int len;
   2458 	usbd_status err;
   2459 	int isread;
   2460 
   2461 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2462 	DPRINTFN(3, "xfer=%#jx len=%jd, addr=%jd, endpt=%jd",
   2463 	    (uintptr_t)xfer, xfer->ux_bufsize, dev->ud_addr,
   2464 	    upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress);
   2465 
   2466 	isread = req->bmRequestType & UT_READ;
   2467 	len = xfer->ux_bufsize;
   2468 
   2469 	uxfer->ux_type = UX_CTRL;
   2470 	/* Set up data transaction */
   2471 	if (len != 0) {
   2472 		err = uhci_alloc_std_chain(sc, xfer, len, isread, &data);
   2473 		if (err)
   2474 			return err;
   2475 	}
   2476 	/* Set up interrupt info. */
   2477 	uxfer->ux_setup = upipe->ctrl.setup;
   2478 	uxfer->ux_stat = upipe->ctrl.stat;
   2479 	uxfer->ux_data = data;
   2480 
   2481 	return 0;
   2482 }
   2483 
   2484 Static void
   2485 uhci_device_ctrl_fini(struct usbd_xfer *xfer)
   2486 {
   2487 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2488 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2489 
   2490 	KASSERT(ux->ux_type == UX_CTRL);
   2491 
   2492 	if (ux->ux_nstd) {
   2493 		uhci_free_stds(sc, ux);
   2494 		kmem_free(ux->ux_stds, sizeof(uhci_soft_td_t *) * ux->ux_nstd);
   2495 	}
   2496 }
   2497 
   2498 usbd_status
   2499 uhci_device_ctrl_transfer(struct usbd_xfer *xfer)
   2500 {
   2501 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2502 	usbd_status err;
   2503 
   2504 	/* Insert last in queue. */
   2505 	mutex_enter(&sc->sc_lock);
   2506 	err = usb_insert_transfer(xfer);
   2507 	mutex_exit(&sc->sc_lock);
   2508 	if (err)
   2509 		return err;
   2510 
   2511 	/*
   2512 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2513 	 * so start it first.
   2514 	 */
   2515 	return uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2516 }
   2517 
   2518 usbd_status
   2519 uhci_device_ctrl_start(struct usbd_xfer *xfer)
   2520 {
   2521 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2522 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   2523 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2524 	usb_device_request_t *req = &xfer->ux_request;
   2525 	struct usbd_device *dev = upipe->pipe.up_dev;
   2526 	int addr = dev->ud_addr;
   2527 	int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2528 	uhci_soft_td_t *setup, *stat, *next, *dataend;
   2529 	uhci_soft_qh_t *sqh;
   2530 	int len;
   2531 	int isread;
   2532 
   2533 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2534 
   2535 	if (sc->sc_dying)
   2536 		return USBD_IOERROR;
   2537 
   2538 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   2539 
   2540 	DPRINTFN(3, "type=0x%02jx, request=0x%02jx, "
   2541 	    "wValue=0x%04jx, wIndex=0x%04jx",
   2542 	    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2543 	    UGETW(req->wIndex));
   2544 	DPRINTFN(3, "len=%jd, addr=%jd, endpt=%jd",
   2545 	    UGETW(req->wLength), dev->ud_addr, endpt, 0);
   2546 
   2547 	isread = req->bmRequestType & UT_READ;
   2548 	len = UGETW(req->wLength);
   2549 
   2550 	setup = upipe->ctrl.setup;
   2551 	stat = upipe->ctrl.stat;
   2552 	sqh = upipe->ctrl.sqh;
   2553 
   2554 	memcpy(KERNADDR(&upipe->ctrl.reqdma, 0), req, sizeof(*req));
   2555 	usb_syncmem(&upipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE);
   2556 
   2557 	mutex_enter(&sc->sc_lock);
   2558 
   2559 	/* Set up data transaction */
   2560 	if (len != 0) {
   2561 		upipe->nexttoggle = 1;
   2562 		next = uxfer->ux_data;
   2563 		uhci_reset_std_chain(sc, xfer, len, isread,
   2564 		    &upipe->nexttoggle, &dataend);
   2565 		dataend->link.std = stat;
   2566 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_TD);
   2567 		usb_syncmem(&dataend->dma,
   2568 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2569 		    sizeof(dataend->td.td_link),
   2570 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2571 	} else {
   2572 		next = stat;
   2573 	}
   2574 
   2575 	const uint32_t status = UHCI_TD_ZERO_ACTLEN(
   2576 	    UHCI_TD_SET_ERRCNT(3) |
   2577 	    UHCI_TD_ACTIVE |
   2578 	    (dev->ud_speed == USB_SPEED_LOW ? UHCI_TD_LS : 0)
   2579 	    );
   2580 	setup->link.std = next;
   2581 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_TD);
   2582 	setup->td.td_status = htole32(status);
   2583 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof(*req), endpt, addr));
   2584 	setup->td.td_buffer = htole32(DMAADDR(&upipe->ctrl.reqdma, 0));
   2585 
   2586 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2587 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2588 
   2589 	stat->link.std = NULL;
   2590 	stat->td.td_link = htole32(UHCI_PTR_T);
   2591 	stat->td.td_status = htole32(status | UHCI_TD_IOC);
   2592 	stat->td.td_token =
   2593 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2594 				 UHCI_TD_IN (0, endpt, addr, 1));
   2595 	stat->td.td_buffer = htole32(0);
   2596 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2597 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2598 
   2599 #ifdef UHCI_DEBUG
   2600 	if (uhcidebug >= 10) {
   2601 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2602 		DPRINTF("before transfer", 0, 0, 0, 0);
   2603 		uhci_dump_tds(setup);
   2604 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2605 	}
   2606 #endif
   2607 
   2608 	/* Set up interrupt info. */
   2609 	uxfer->ux_setup = setup;
   2610 	uxfer->ux_stat = stat;
   2611 	KASSERT(uxfer->ux_isdone);
   2612 #ifdef DIAGNOSTIC
   2613 	uxfer->ux_isdone = false;
   2614 #endif
   2615 
   2616 	sqh->elink = setup;
   2617 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2618 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2619 
   2620 	if (dev->ud_speed == USB_SPEED_LOW)
   2621 		uhci_add_ls_ctrl(sc, sqh);
   2622 	else
   2623 		uhci_add_hs_ctrl(sc, sqh);
   2624 	uhci_add_intr_list(sc, uxfer);
   2625 #ifdef UHCI_DEBUG
   2626 	if (uhcidebug >= 12) {
   2627 		uhci_soft_td_t *std;
   2628 		uhci_soft_qh_t *xqh;
   2629 		uhci_soft_qh_t *sxqh;
   2630 		int maxqh = 0;
   2631 		uhci_physaddr_t link;
   2632 		DPRINTFN(12, "--- dump start ---", 0, 0, 0, 0);
   2633 		DPRINTFN(12, "follow from [0]", 0, 0, 0, 0);
   2634 		for (std = sc->sc_vframes[0].htd, link = 0;
   2635 		     (link & UHCI_PTR_QH) == 0;
   2636 		     std = std->link.std) {
   2637 			link = le32toh(std->td.td_link);
   2638 			uhci_dump_td(std);
   2639 		}
   2640 		sxqh = (uhci_soft_qh_t *)std;
   2641 		uhci_dump_qh(sxqh);
   2642 		for (xqh = sxqh;
   2643 		     xqh != NULL;
   2644 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2645 			xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2646 			uhci_dump_qh(xqh);
   2647 		}
   2648 		DPRINTFN(12, "Enqueued QH:", 0, 0, 0, 0);
   2649 		uhci_dump_qh(sqh);
   2650 		uhci_dump_tds(sqh->elink);
   2651 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2652 	}
   2653 #endif
   2654 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   2655 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   2656 			    uhci_timeout, xfer);
   2657 	}
   2658 	xfer->ux_status = USBD_IN_PROGRESS;
   2659 	mutex_exit(&sc->sc_lock);
   2660 
   2661 	return USBD_IN_PROGRESS;
   2662 }
   2663 
   2664 int
   2665 uhci_device_intr_init(struct usbd_xfer *xfer)
   2666 {
   2667 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2668 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2669 	usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc;
   2670 	int endpt = ed->bEndpointAddress;
   2671 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2672 	int len = xfer->ux_bufsize;
   2673 	int err;
   2674 
   2675 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2676 
   2677 	DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer,
   2678 	    xfer->ux_length, xfer->ux_flags, 0);
   2679 
   2680 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2681 	KASSERT(len != 0);
   2682 
   2683 	ux->ux_type = UX_INTR;
   2684 	ux->ux_nstd = 0;
   2685 	err = uhci_alloc_std_chain(sc, xfer, len, isread, &ux->ux_stdstart);
   2686 
   2687 	return err;
   2688 }
   2689 
   2690 Static void
   2691 uhci_device_intr_fini(struct usbd_xfer *xfer)
   2692 {
   2693 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2694 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2695 
   2696 	KASSERT(ux->ux_type == UX_INTR);
   2697 
   2698 	if (ux->ux_nstd) {
   2699 		uhci_free_stds(sc, ux);
   2700 		kmem_free(ux->ux_stds, sizeof(uhci_soft_td_t *) * ux->ux_nstd);
   2701 	}
   2702 }
   2703 
   2704 usbd_status
   2705 uhci_device_intr_transfer(struct usbd_xfer *xfer)
   2706 {
   2707 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2708 	usbd_status err;
   2709 
   2710 	/* Insert last in queue. */
   2711 	mutex_enter(&sc->sc_lock);
   2712 	err = usb_insert_transfer(xfer);
   2713 	mutex_exit(&sc->sc_lock);
   2714 	if (err)
   2715 		return err;
   2716 
   2717 	/*
   2718 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2719 	 * so start it first.
   2720 	 */
   2721 	return uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2722 }
   2723 
   2724 usbd_status
   2725 uhci_device_intr_start(struct usbd_xfer *xfer)
   2726 {
   2727 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2728 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2729 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2730 	uhci_soft_td_t *data, *dataend;
   2731 	uhci_soft_qh_t *sqh;
   2732 	int isread, endpt;
   2733 	int i;
   2734 
   2735 	if (sc->sc_dying)
   2736 		return USBD_IOERROR;
   2737 
   2738 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2739 
   2740 	DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer,
   2741 	    xfer->ux_length, xfer->ux_flags, 0);
   2742 
   2743 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2744 	KASSERT(xfer->ux_length <= xfer->ux_bufsize);
   2745 
   2746 	endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2747 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2748 
   2749 	data = ux->ux_stdstart;
   2750 
   2751 	KASSERT(ux->ux_isdone);
   2752 #ifdef DIAGNOSTIC
   2753 	ux->ux_isdone = false;
   2754 #endif
   2755 
   2756 	/* Take lock to protect nexttoggle */
   2757 	if (!sc->sc_bus.ub_usepolling)
   2758 		mutex_enter(&sc->sc_lock);
   2759 	uhci_reset_std_chain(sc, xfer, xfer->ux_length, isread,
   2760 	    &upipe->nexttoggle, &dataend);
   2761 
   2762 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2763 	usb_syncmem(&dataend->dma,
   2764 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2765 	    sizeof(dataend->td.td_status),
   2766 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2767 	ux->ux_stdend = dataend;
   2768 
   2769 #ifdef UHCI_DEBUG
   2770 	if (uhcidebug >= 10) {
   2771 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2772 		uhci_dump_tds(data);
   2773 		uhci_dump_qh(upipe->intr.qhs[0]);
   2774 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2775 	}
   2776 #endif
   2777 
   2778 	DPRINTFN(10, "qhs[0]=%#jx", (uintptr_t)upipe->intr.qhs[0], 0, 0, 0);
   2779 	for (i = 0; i < upipe->intr.npoll; i++) {
   2780 		sqh = upipe->intr.qhs[i];
   2781 		sqh->elink = data;
   2782 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2783 		usb_syncmem(&sqh->dma,
   2784 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2785 		    sizeof(sqh->qh.qh_elink),
   2786 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2787 	}
   2788 	uhci_add_intr_list(sc, ux);
   2789 	xfer->ux_status = USBD_IN_PROGRESS;
   2790 	if (!sc->sc_bus.ub_usepolling)
   2791 		mutex_exit(&sc->sc_lock);
   2792 
   2793 #ifdef UHCI_DEBUG
   2794 	if (uhcidebug >= 10) {
   2795 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2796 		uhci_dump_tds(data);
   2797 		uhci_dump_qh(upipe->intr.qhs[0]);
   2798 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2799 	}
   2800 #endif
   2801 
   2802 	return USBD_IN_PROGRESS;
   2803 }
   2804 
   2805 /* Abort a device control request. */
   2806 void
   2807 uhci_device_ctrl_abort(struct usbd_xfer *xfer)
   2808 {
   2809 	uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer);
   2810 
   2811 	KASSERT(mutex_owned(&sc->sc_lock));
   2812 
   2813 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2814 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2815 }
   2816 
   2817 /* Close a device control pipe. */
   2818 void
   2819 uhci_device_ctrl_close(struct usbd_pipe *pipe)
   2820 {
   2821 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   2822 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   2823 
   2824 	uhci_free_sqh(sc, upipe->ctrl.sqh);
   2825 	uhci_free_std_locked(sc, upipe->ctrl.setup);
   2826 	uhci_free_std_locked(sc, upipe->ctrl.stat);
   2827 
   2828 }
   2829 
   2830 /* Abort a device interrupt request. */
   2831 void
   2832 uhci_device_intr_abort(struct usbd_xfer *xfer)
   2833 {
   2834 	uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer);
   2835 
   2836 	KASSERT(mutex_owned(&sc->sc_lock));
   2837 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   2838 
   2839 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2840 	DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   2841 
   2842 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2843 }
   2844 
   2845 /* Close a device interrupt pipe. */
   2846 void
   2847 uhci_device_intr_close(struct usbd_pipe *pipe)
   2848 {
   2849 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   2850 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   2851 	int i, npoll;
   2852 
   2853 	KASSERT(mutex_owned(&sc->sc_lock));
   2854 
   2855 	/* Unlink descriptors from controller data structures. */
   2856 	npoll = upipe->intr.npoll;
   2857 	for (i = 0; i < npoll; i++)
   2858 		uhci_remove_intr(sc, upipe->intr.qhs[i]);
   2859 
   2860 	/*
   2861 	 * We now have to wait for any activity on the physical
   2862 	 * descriptors to stop.
   2863 	 */
   2864 	usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   2865 
   2866 	for (i = 0; i < npoll; i++)
   2867 		uhci_free_sqh(sc, upipe->intr.qhs[i]);
   2868 	kmem_free(upipe->intr.qhs, npoll * sizeof(uhci_soft_qh_t *));
   2869 }
   2870 
   2871 int
   2872 uhci_device_isoc_init(struct usbd_xfer *xfer)
   2873 {
   2874 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2875 
   2876 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2877 	KASSERT(xfer->ux_nframes != 0);
   2878 	KASSERT(ux->ux_isdone);
   2879 
   2880 	ux->ux_type = UX_ISOC;
   2881 	return 0;
   2882 }
   2883 
   2884 Static void
   2885 uhci_device_isoc_fini(struct usbd_xfer *xfer)
   2886 {
   2887 	struct uhci_xfer *ux __diagused = UHCI_XFER2UXFER(xfer);
   2888 
   2889 	KASSERT(ux->ux_type == UX_ISOC);
   2890 }
   2891 
   2892 usbd_status
   2893 uhci_device_isoc_transfer(struct usbd_xfer *xfer)
   2894 {
   2895 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2896 	usbd_status err __diagused;
   2897 
   2898 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2899 	DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   2900 
   2901 	/* Put it on our queue, */
   2902 	mutex_enter(&sc->sc_lock);
   2903 	err = usb_insert_transfer(xfer);
   2904 	mutex_exit(&sc->sc_lock);
   2905 
   2906 	KASSERT(err == USBD_NORMAL_COMPLETION);
   2907 
   2908 	/* insert into schedule, */
   2909 
   2910 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2911 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2912 	struct isoc *isoc = &upipe->isoc;
   2913 	uhci_soft_td_t *std = NULL;
   2914 	uint32_t buf, len, status, offs;
   2915 	int i, next, nframes;
   2916 	int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN;
   2917 
   2918 	DPRINTFN(5, "used=%jd next=%jd xfer=%#jx nframes=%jd",
   2919 	    isoc->inuse, isoc->next, (uintptr_t)xfer, xfer->ux_nframes);
   2920 
   2921 	if (sc->sc_dying)
   2922 		return USBD_IOERROR;
   2923 
   2924 	if (xfer->ux_status == USBD_IN_PROGRESS) {
   2925 		/* This request has already been entered into the frame list */
   2926 		printf("%s: xfer=%p in frame list\n", __func__, xfer);
   2927 		/* XXX */
   2928 	}
   2929 
   2930 #ifdef DIAGNOSTIC
   2931 	if (isoc->inuse >= UHCI_VFRAMELIST_COUNT)
   2932 		printf("%s: overflow!\n", __func__);
   2933 #endif
   2934 
   2935 	KASSERT(xfer->ux_nframes != 0);
   2936 
   2937 	mutex_enter(&sc->sc_lock);
   2938 	next = isoc->next;
   2939 	if (next == -1) {
   2940 		/* Not in use yet, schedule it a few frames ahead. */
   2941 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2942 		DPRINTFN(2, "start next=%jd", next, 0, 0, 0);
   2943 	}
   2944 
   2945 	xfer->ux_status = USBD_IN_PROGRESS;
   2946 	ux->ux_curframe = next;
   2947 
   2948 	buf = DMAADDR(&xfer->ux_dmabuf, 0);
   2949 	offs = 0;
   2950 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2951 				     UHCI_TD_ACTIVE |
   2952 				     UHCI_TD_IOS);
   2953 	nframes = xfer->ux_nframes;
   2954 	for (i = 0; i < nframes; i++) {
   2955 		std = isoc->stds[next];
   2956 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2957 			next = 0;
   2958 		len = xfer->ux_frlengths[i];
   2959 		std->td.td_buffer = htole32(buf);
   2960 		usb_syncmem(&xfer->ux_dmabuf, offs, len,
   2961 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2962 		if (i == nframes - 1)
   2963 			status |= UHCI_TD_IOC;
   2964 		std->td.td_status = htole32(status);
   2965 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2966 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2967 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2968 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2969 #ifdef UHCI_DEBUG
   2970 		if (uhcidebug >= 5) {
   2971 			DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2972 			DPRINTF("TD %jd", i, 0, 0, 0);
   2973 			uhci_dump_td(std);
   2974 			DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2975 		}
   2976 #endif
   2977 		buf += len;
   2978 		offs += len;
   2979 	}
   2980 	isoc->next = next;
   2981 	isoc->inuse += xfer->ux_nframes;
   2982 
   2983 	/* Set up interrupt info. */
   2984 	ux->ux_stdstart = std;
   2985 	ux->ux_stdend = std;
   2986 
   2987 	KASSERT(ux->ux_isdone);
   2988 #ifdef DIAGNOSTIC
   2989 	ux->ux_isdone = false;
   2990 #endif
   2991 	uhci_add_intr_list(sc, ux);
   2992 
   2993 	mutex_exit(&sc->sc_lock);
   2994 
   2995 	return USBD_IN_PROGRESS;
   2996 }
   2997 
   2998 void
   2999 uhci_device_isoc_abort(struct usbd_xfer *xfer)
   3000 {
   3001 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   3002 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   3003 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   3004 	uhci_soft_td_t **stds = upipe->isoc.stds;
   3005 	uhci_soft_td_t *std;
   3006 	int i, n, nframes, maxlen, len;
   3007 
   3008 	KASSERT(mutex_owned(&sc->sc_lock));
   3009 
   3010 	/* Transfer is already done. */
   3011 	if (xfer->ux_status != USBD_NOT_STARTED &&
   3012 	    xfer->ux_status != USBD_IN_PROGRESS) {
   3013 		return;
   3014 	}
   3015 
   3016 	/* Give xfer the requested abort code. */
   3017 	xfer->ux_status = USBD_CANCELLED;
   3018 
   3019 	/* make hardware ignore it, */
   3020 	nframes = xfer->ux_nframes;
   3021 	n = ux->ux_curframe;
   3022 	maxlen = 0;
   3023 	for (i = 0; i < nframes; i++) {
   3024 		std = stds[n];
   3025 		usb_syncmem(&std->dma,
   3026 		    std->offs + offsetof(uhci_td_t, td_status),
   3027 		    sizeof(std->td.td_status),
   3028 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3029 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   3030 		usb_syncmem(&std->dma,
   3031 		    std->offs + offsetof(uhci_td_t, td_status),
   3032 		    sizeof(std->td.td_status),
   3033 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3034 		usb_syncmem(&std->dma,
   3035 		    std->offs + offsetof(uhci_td_t, td_token),
   3036 		    sizeof(std->td.td_token),
   3037 		    BUS_DMASYNC_POSTWRITE);
   3038 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   3039 		if (len > maxlen)
   3040 			maxlen = len;
   3041 		if (++n >= UHCI_VFRAMELIST_COUNT)
   3042 			n = 0;
   3043 	}
   3044 
   3045 	/* and wait until we are sure the hardware has finished. */
   3046 	delay(maxlen);
   3047 
   3048 #ifdef DIAGNOSTIC
   3049 	ux->ux_isdone = true;
   3050 #endif
   3051 	/* Remove from interrupt list. */
   3052 	uhci_del_intr_list(sc, ux);
   3053 
   3054 	/* Run callback. */
   3055 	usb_transfer_complete(xfer);
   3056 
   3057 	KASSERT(mutex_owned(&sc->sc_lock));
   3058 }
   3059 
   3060 void
   3061 uhci_device_isoc_close(struct usbd_pipe *pipe)
   3062 {
   3063 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   3064 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   3065 	uhci_soft_td_t *std, *vstd;
   3066 	struct isoc *isoc;
   3067 	int i;
   3068 
   3069 	KASSERT(mutex_owned(&sc->sc_lock));
   3070 
   3071 	/*
   3072 	 * Make sure all TDs are marked as inactive.
   3073 	 * Wait for completion.
   3074 	 * Unschedule.
   3075 	 * Deallocate.
   3076 	 */
   3077 	isoc = &upipe->isoc;
   3078 
   3079 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3080 		std = isoc->stds[i];
   3081 		usb_syncmem(&std->dma,
   3082 		    std->offs + offsetof(uhci_td_t, td_status),
   3083 		    sizeof(std->td.td_status),
   3084 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3085 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   3086 		usb_syncmem(&std->dma,
   3087 		    std->offs + offsetof(uhci_td_t, td_status),
   3088 		    sizeof(std->td.td_status),
   3089 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3090 	}
   3091 	/* wait for completion */
   3092 	usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   3093 
   3094 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3095 		std = isoc->stds[i];
   3096 		for (vstd = sc->sc_vframes[i].htd;
   3097 		     vstd != NULL && vstd->link.std != std;
   3098 		     vstd = vstd->link.std)
   3099 			;
   3100 		if (vstd == NULL) {
   3101 			/*panic*/
   3102 			printf("%s: %p not found\n", __func__, std);
   3103 			mutex_exit(&sc->sc_lock);
   3104 			return;
   3105 		}
   3106 		vstd->link = std->link;
   3107 		usb_syncmem(&std->dma,
   3108 		    std->offs + offsetof(uhci_td_t, td_link),
   3109 		    sizeof(std->td.td_link),
   3110 		    BUS_DMASYNC_POSTWRITE);
   3111 		vstd->td.td_link = std->td.td_link;
   3112 		usb_syncmem(&vstd->dma,
   3113 		    vstd->offs + offsetof(uhci_td_t, td_link),
   3114 		    sizeof(vstd->td.td_link),
   3115 		    BUS_DMASYNC_PREWRITE);
   3116 		uhci_free_std_locked(sc, std);
   3117 	}
   3118 
   3119 	kmem_free(isoc->stds, UHCI_VFRAMELIST_COUNT * sizeof(uhci_soft_td_t *));
   3120 }
   3121 
   3122 usbd_status
   3123 uhci_setup_isoc(struct usbd_pipe *pipe)
   3124 {
   3125 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   3126 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   3127 	int addr = upipe->pipe.up_dev->ud_addr;
   3128 	int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   3129 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   3130 	uhci_soft_td_t *std, *vstd;
   3131 	uint32_t token;
   3132 	struct isoc *isoc;
   3133 	int i;
   3134 
   3135 	isoc = &upipe->isoc;
   3136 
   3137 	isoc->stds = kmem_alloc(
   3138 	    UHCI_VFRAMELIST_COUNT * sizeof(uhci_soft_td_t *), KM_SLEEP);
   3139 	if (isoc->stds == NULL)
   3140 		return USBD_NOMEM;
   3141 
   3142 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   3143 		     UHCI_TD_OUT(0, endpt, addr, 0);
   3144 
   3145 	/* Allocate the TDs and mark as inactive; */
   3146 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3147 		std = uhci_alloc_std(sc);
   3148 		if (std == 0)
   3149 			goto bad;
   3150 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   3151 		std->td.td_token = htole32(token);
   3152 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   3153 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3154 		isoc->stds[i] = std;
   3155 	}
   3156 
   3157 	mutex_enter(&sc->sc_lock);
   3158 
   3159 	/* Insert TDs into schedule. */
   3160 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3161 		std = isoc->stds[i];
   3162 		vstd = sc->sc_vframes[i].htd;
   3163 		usb_syncmem(&vstd->dma,
   3164 		    vstd->offs + offsetof(uhci_td_t, td_link),
   3165 		    sizeof(vstd->td.td_link),
   3166 		    BUS_DMASYNC_POSTWRITE);
   3167 		std->link = vstd->link;
   3168 		std->td.td_link = vstd->td.td_link;
   3169 		usb_syncmem(&std->dma,
   3170 		    std->offs + offsetof(uhci_td_t, td_link),
   3171 		    sizeof(std->td.td_link),
   3172 		    BUS_DMASYNC_PREWRITE);
   3173 		vstd->link.std = std;
   3174 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   3175 		usb_syncmem(&vstd->dma,
   3176 		    vstd->offs + offsetof(uhci_td_t, td_link),
   3177 		    sizeof(vstd->td.td_link),
   3178 		    BUS_DMASYNC_PREWRITE);
   3179 	}
   3180 	mutex_exit(&sc->sc_lock);
   3181 
   3182 	isoc->next = -1;
   3183 	isoc->inuse = 0;
   3184 
   3185 	return USBD_NORMAL_COMPLETION;
   3186 
   3187  bad:
   3188 	while (--i >= 0)
   3189 		uhci_free_std(sc, isoc->stds[i]);
   3190 	kmem_free(isoc->stds, UHCI_VFRAMELIST_COUNT * sizeof(uhci_soft_td_t *));
   3191 	return USBD_NOMEM;
   3192 }
   3193 
   3194 void
   3195 uhci_device_isoc_done(struct usbd_xfer *xfer)
   3196 {
   3197 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   3198 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   3199 	int i, offs;
   3200 	int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN;
   3201 
   3202 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3203 	DPRINTFN(4, "length=%jd, ux_state=0x%08jx",
   3204 	    xfer->ux_actlen, xfer->ux_state, 0, 0);
   3205 
   3206 #ifdef DIAGNOSTIC
   3207 	if (ux->ux_stdend == NULL) {
   3208 		printf("%s: xfer=%p stdend==NULL\n", __func__, xfer);
   3209 #ifdef UHCI_DEBUG
   3210 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   3211 		uhci_dump_ii(ux);
   3212 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   3213 #endif
   3214 		return;
   3215 	}
   3216 #endif
   3217 
   3218 	/* Turn off the interrupt since it is active even if the TD is not. */
   3219 	usb_syncmem(&ux->ux_stdend->dma,
   3220 	    ux->ux_stdend->offs + offsetof(uhci_td_t, td_status),
   3221 	    sizeof(ux->ux_stdend->td.td_status),
   3222 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3223 	ux->ux_stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   3224 	usb_syncmem(&ux->ux_stdend->dma,
   3225 	    ux->ux_stdend->offs + offsetof(uhci_td_t, td_status),
   3226 	    sizeof(ux->ux_stdend->td.td_status),
   3227 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3228 
   3229 	offs = 0;
   3230 	for (i = 0; i < xfer->ux_nframes; i++) {
   3231 		usb_syncmem(&xfer->ux_dmabuf, offs, xfer->ux_frlengths[i],
   3232 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3233 		offs += xfer->ux_frlengths[i];
   3234 	}
   3235 }
   3236 
   3237 void
   3238 uhci_device_intr_done(struct usbd_xfer *xfer)
   3239 {
   3240 	uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer);
   3241 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   3242 	uhci_soft_qh_t *sqh;
   3243 	int i, npoll;
   3244 
   3245 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3246 	DPRINTFN(5, "length=%jd", xfer->ux_actlen, 0, 0, 0);
   3247 
   3248 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   3249 
   3250 	npoll = upipe->intr.npoll;
   3251 	for (i = 0; i < npoll; i++) {
   3252 		sqh = upipe->intr.qhs[i];
   3253 		sqh->elink = NULL;
   3254 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3255 		usb_syncmem(&sqh->dma,
   3256 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3257 		    sizeof(sqh->qh.qh_elink),
   3258 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3259 	}
   3260 	const int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   3261 	const bool isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3262 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   3263 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3264 }
   3265 
   3266 /* Deallocate request data structures */
   3267 void
   3268 uhci_device_ctrl_done(struct usbd_xfer *xfer)
   3269 {
   3270 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   3271 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   3272 	int len = UGETW(xfer->ux_request.wLength);
   3273 	int isread = (xfer->ux_request.bmRequestType & UT_READ);
   3274 
   3275 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   3276 
   3277 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3278 
   3279 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   3280 
   3281 	/* XXXNH move to uhci_idone??? */
   3282 	if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW)
   3283 		uhci_remove_ls_ctrl(sc, upipe->ctrl.sqh);
   3284 	else
   3285 		uhci_remove_hs_ctrl(sc, upipe->ctrl.sqh);
   3286 
   3287 	if (len) {
   3288 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   3289 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3290 	}
   3291 	usb_syncmem(&upipe->ctrl.reqdma, 0,
   3292 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3293 
   3294 	DPRINTF("length=%jd", xfer->ux_actlen, 0, 0, 0);
   3295 }
   3296 
   3297 /* Deallocate request data structures */
   3298 void
   3299 uhci_device_bulk_done(struct usbd_xfer *xfer)
   3300 {
   3301 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   3302 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   3303 	usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc;
   3304 	int endpt = ed->bEndpointAddress;
   3305 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3306 
   3307 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3308 	DPRINTFN(5, "xfer=%#jx sc=%#jx upipe=%#jx", (uintptr_t)xfer,
   3309 	    (uintptr_t)sc, (uintptr_t)upipe, 0);
   3310 
   3311 	KASSERT(mutex_owned(&sc->sc_lock));
   3312 
   3313 	uhci_remove_bulk(sc, upipe->bulk.sqh);
   3314 
   3315 	if (xfer->ux_length) {
   3316 		usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   3317 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3318 	}
   3319 
   3320 	DPRINTFN(5, "length=%jd", xfer->ux_actlen, 0, 0, 0);
   3321 }
   3322 
   3323 /* Add interrupt QH, called with vflock. */
   3324 void
   3325 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3326 {
   3327 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3328 	uhci_soft_qh_t *eqh;
   3329 
   3330 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3331 	DPRINTFN(4, "n=%jd sqh=%#jx", sqh->pos, (uintptr_t)sqh, 0, 0);
   3332 
   3333 	eqh = vf->eqh;
   3334 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3335 	    sizeof(eqh->qh.qh_hlink),
   3336 	    BUS_DMASYNC_POSTWRITE);
   3337 	sqh->hlink       = eqh->hlink;
   3338 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3339 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3340 	    sizeof(sqh->qh.qh_hlink),
   3341 	    BUS_DMASYNC_PREWRITE);
   3342 	eqh->hlink       = sqh;
   3343 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3344 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3345 	    sizeof(eqh->qh.qh_hlink),
   3346 	    BUS_DMASYNC_PREWRITE);
   3347 	vf->eqh = sqh;
   3348 	vf->bandwidth++;
   3349 }
   3350 
   3351 /* Remove interrupt QH. */
   3352 void
   3353 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3354 {
   3355 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3356 	uhci_soft_qh_t *pqh;
   3357 
   3358 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3359 	DPRINTFN(4, "n=%jd sqh=%#jx", sqh->pos, (uintptr_t)sqh, 0, 0);
   3360 
   3361 	/* See comment in uhci_remove_ctrl() */
   3362 
   3363 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3364 	    sizeof(sqh->qh.qh_elink),
   3365 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3366 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3367 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3368 		usb_syncmem(&sqh->dma,
   3369 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3370 		    sizeof(sqh->qh.qh_elink),
   3371 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3372 		delay(UHCI_QH_REMOVE_DELAY);
   3373 	}
   3374 
   3375 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3376 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3377 	    sizeof(sqh->qh.qh_hlink),
   3378 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3379 	pqh->hlink       = sqh->hlink;
   3380 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3381 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3382 	    sizeof(pqh->qh.qh_hlink),
   3383 	    BUS_DMASYNC_PREWRITE);
   3384 	delay(UHCI_QH_REMOVE_DELAY);
   3385 	if (vf->eqh == sqh)
   3386 		vf->eqh = pqh;
   3387 	vf->bandwidth--;
   3388 }
   3389 
   3390 usbd_status
   3391 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3392 {
   3393 	uhci_soft_qh_t *sqh;
   3394 	int i, npoll;
   3395 	u_int bestbw, bw, bestoffs, offs;
   3396 
   3397 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3398 	DPRINTFN(2, "pipe=%#jx", (uintptr_t)upipe, 0, 0, 0);
   3399 	if (ival == 0) {
   3400 		printf("%s: 0 interval\n", __func__);
   3401 		return USBD_INVAL;
   3402 	}
   3403 
   3404 	if (ival > UHCI_VFRAMELIST_COUNT)
   3405 		ival = UHCI_VFRAMELIST_COUNT;
   3406 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3407 	DPRINTF("ival=%jd npoll=%jd", ival, npoll, 0, 0);
   3408 
   3409 	upipe->intr.npoll = npoll;
   3410 	upipe->intr.qhs =
   3411 		kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP);
   3412 
   3413 	/*
   3414 	 * Figure out which offset in the schedule that has most
   3415 	 * bandwidth left over.
   3416 	 */
   3417 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3418 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3419 		for (bw = i = 0; i < npoll; i++)
   3420 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3421 		if (bw < bestbw) {
   3422 			bestbw = bw;
   3423 			bestoffs = offs;
   3424 		}
   3425 	}
   3426 	DPRINTF("bw=%jd offs=%jd", bestbw, bestoffs, 0, 0);
   3427 	for (i = 0; i < npoll; i++) {
   3428 		upipe->intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3429 		sqh->elink = NULL;
   3430 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3431 		usb_syncmem(&sqh->dma,
   3432 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3433 		    sizeof(sqh->qh.qh_elink),
   3434 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3435 		sqh->pos = MOD(i * ival + bestoffs);
   3436 	}
   3437 #undef MOD
   3438 
   3439 	mutex_enter(&sc->sc_lock);
   3440 	/* Enter QHs into the controller data structures. */
   3441 	for (i = 0; i < npoll; i++)
   3442 		uhci_add_intr(sc, upipe->intr.qhs[i]);
   3443 	mutex_exit(&sc->sc_lock);
   3444 
   3445 	DPRINTFN(5, "returns %#jx", (uintptr_t)upipe, 0, 0, 0);
   3446 
   3447 	return USBD_NORMAL_COMPLETION;
   3448 }
   3449 
   3450 /* Open a new pipe. */
   3451 usbd_status
   3452 uhci_open(struct usbd_pipe *pipe)
   3453 {
   3454 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   3455 	struct usbd_bus *bus = pipe->up_dev->ud_bus;
   3456 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   3457 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
   3458 	usbd_status err = USBD_NOMEM;
   3459 	int ival;
   3460 
   3461 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3462 	DPRINTF("pipe=%#jx, addr=%jd, endpt=%jd (%jd)",
   3463 	    (uintptr_t)pipe, pipe->up_dev->ud_addr, ed->bEndpointAddress,
   3464 	    bus->ub_rhaddr);
   3465 
   3466 	if (sc->sc_dying)
   3467 		return USBD_IOERROR;
   3468 
   3469 	upipe->aborting = 0;
   3470 	/* toggle state needed for bulk endpoints */
   3471 	upipe->nexttoggle = pipe->up_endpoint->ue_toggle;
   3472 
   3473 	if (pipe->up_dev->ud_addr == bus->ub_rhaddr) {
   3474 		switch (ed->bEndpointAddress) {
   3475 		case USB_CONTROL_ENDPOINT:
   3476 			pipe->up_methods = &roothub_ctrl_methods;
   3477 			break;
   3478 		case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
   3479 			pipe->up_methods = &uhci_root_intr_methods;
   3480 			break;
   3481 		default:
   3482 			return USBD_INVAL;
   3483 		}
   3484 	} else {
   3485 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3486 		case UE_CONTROL:
   3487 			pipe->up_methods = &uhci_device_ctrl_methods;
   3488 			upipe->ctrl.sqh = uhci_alloc_sqh(sc);
   3489 			if (upipe->ctrl.sqh == NULL)
   3490 				goto bad;
   3491 			upipe->ctrl.setup = uhci_alloc_std(sc);
   3492 			if (upipe->ctrl.setup == NULL) {
   3493 				uhci_free_sqh(sc, upipe->ctrl.sqh);
   3494 				goto bad;
   3495 			}
   3496 			upipe->ctrl.stat = uhci_alloc_std(sc);
   3497 			if (upipe->ctrl.stat == NULL) {
   3498 				uhci_free_sqh(sc, upipe->ctrl.sqh);
   3499 				uhci_free_std(sc, upipe->ctrl.setup);
   3500 				goto bad;
   3501 			}
   3502 			err = usb_allocmem(&sc->sc_bus,
   3503 				  sizeof(usb_device_request_t),
   3504 				  0, &upipe->ctrl.reqdma);
   3505 			if (err) {
   3506 				uhci_free_sqh(sc, upipe->ctrl.sqh);
   3507 				uhci_free_std(sc, upipe->ctrl.setup);
   3508 				uhci_free_std(sc, upipe->ctrl.stat);
   3509 				goto bad;
   3510 			}
   3511 			break;
   3512 		case UE_INTERRUPT:
   3513 			pipe->up_methods = &uhci_device_intr_methods;
   3514 			ival = pipe->up_interval;
   3515 			if (ival == USBD_DEFAULT_INTERVAL)
   3516 				ival = ed->bInterval;
   3517 			return uhci_device_setintr(sc, upipe, ival);
   3518 		case UE_ISOCHRONOUS:
   3519 			pipe->up_serialise = false;
   3520 			pipe->up_methods = &uhci_device_isoc_methods;
   3521 			return uhci_setup_isoc(pipe);
   3522 		case UE_BULK:
   3523 			pipe->up_methods = &uhci_device_bulk_methods;
   3524 			upipe->bulk.sqh = uhci_alloc_sqh(sc);
   3525 			if (upipe->bulk.sqh == NULL)
   3526 				goto bad;
   3527 			break;
   3528 		}
   3529 	}
   3530 	return USBD_NORMAL_COMPLETION;
   3531 
   3532  bad:
   3533 	return USBD_NOMEM;
   3534 }
   3535 
   3536 /*
   3537  * Data structures and routines to emulate the root hub.
   3538  */
   3539 /*
   3540  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3541  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3542  * should not be used by the USB subsystem.  As we cannot issue a
   3543  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3544  * will be enabled as part of the reset.
   3545  *
   3546  * On the VT83C572, the port cannot be successfully enabled until the
   3547  * outstanding "port enable change" and "connection status change"
   3548  * events have been reset.
   3549  */
   3550 Static usbd_status
   3551 uhci_portreset(uhci_softc_t *sc, int index)
   3552 {
   3553 	int lim, port, x;
   3554 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3555 
   3556 	if (index == 1)
   3557 		port = UHCI_PORTSC1;
   3558 	else if (index == 2)
   3559 		port = UHCI_PORTSC2;
   3560 	else
   3561 		return USBD_IOERROR;
   3562 
   3563 	x = URWMASK(UREAD2(sc, port));
   3564 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3565 
   3566 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3567 
   3568 	DPRINTF("uhci port %jd reset, status0 = 0x%04jx", index,
   3569 	    UREAD2(sc, port), 0, 0);
   3570 
   3571 	x = URWMASK(UREAD2(sc, port));
   3572 	UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
   3573 
   3574 	delay(100);
   3575 
   3576 	DPRINTF("uhci port %jd reset, status1 = 0x%04jx", index,
   3577 	    UREAD2(sc, port), 0, 0);
   3578 
   3579 	x = URWMASK(UREAD2(sc, port));
   3580 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3581 
   3582 	for (lim = 10; --lim > 0;) {
   3583 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3584 
   3585 		x = UREAD2(sc, port);
   3586 		DPRINTF("uhci port %jd iteration %ju, status = 0x%04jx", index,
   3587 		    lim, x, 0);
   3588 
   3589 		if (!(x & UHCI_PORTSC_CCS)) {
   3590 			/*
   3591 			 * No device is connected (or was disconnected
   3592 			 * during reset).  Consider the port reset.
   3593 			 * The delay must be long enough to ensure on
   3594 			 * the initial iteration that the device
   3595 			 * connection will have been registered.  50ms
   3596 			 * appears to be sufficient, but 20ms is not.
   3597 			 */
   3598 			DPRINTFN(3, "uhci port %jd loop %ju, device detached",
   3599 			    index, lim, 0, 0);
   3600 			break;
   3601 		}
   3602 
   3603 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3604 			/*
   3605 			 * Port enabled changed and/or connection
   3606 			 * status changed were set.  Reset either or
   3607 			 * both raised flags (by writing a 1 to that
   3608 			 * bit), and wait again for state to settle.
   3609 			 */
   3610 			UWRITE2(sc, port, URWMASK(x) |
   3611 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3612 			continue;
   3613 		}
   3614 
   3615 		if (x & UHCI_PORTSC_PE)
   3616 			/* Port is enabled */
   3617 			break;
   3618 
   3619 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3620 	}
   3621 
   3622 	DPRINTFN(3, "uhci port %jd reset, status2 = 0x%04jx", index,
   3623 	    UREAD2(sc, port), 0, 0);
   3624 
   3625 	if (lim <= 0) {
   3626 		DPRINTF("uhci port %jd reset timed out", index,
   3627 		    0, 0, 0);
   3628 		return USBD_TIMEOUT;
   3629 	}
   3630 
   3631 	sc->sc_isreset = 1;
   3632 	return USBD_NORMAL_COMPLETION;
   3633 }
   3634 
   3635 Static int
   3636 uhci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
   3637     void *buf, int buflen)
   3638 {
   3639 	uhci_softc_t *sc = UHCI_BUS2SC(bus);
   3640 	int port, x;
   3641 	int status, change, totlen = 0;
   3642 	uint16_t len, value, index;
   3643 	usb_port_status_t ps;
   3644 	usbd_status err;
   3645 
   3646 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3647 
   3648 	if (sc->sc_dying)
   3649 		return -1;
   3650 
   3651 	DPRINTF("type=0x%02jx request=%02jx", req->bmRequestType,
   3652 	    req->bRequest, 0, 0);
   3653 
   3654 	len = UGETW(req->wLength);
   3655 	value = UGETW(req->wValue);
   3656 	index = UGETW(req->wIndex);
   3657 
   3658 #define C(x,y) ((x) | ((y) << 8))
   3659 	switch (C(req->bRequest, req->bmRequestType)) {
   3660 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3661 		DPRINTF("wValue=0x%04jx", value, 0, 0, 0);
   3662 		if (len == 0)
   3663 			break;
   3664 		switch (value) {
   3665 #define sd ((usb_string_descriptor_t *)buf)
   3666 		case C(2, UDESC_STRING):
   3667 			/* Product */
   3668 			totlen = usb_makestrdesc(sd, len, "UHCI root hub");
   3669 			break;
   3670 #undef sd
   3671 		default:
   3672 			/* default from usbroothub */
   3673 			return buflen;
   3674 		}
   3675 		break;
   3676 
   3677 	/* Hub requests */
   3678 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3679 		break;
   3680 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3681 		DPRINTF("UR_CLEAR_PORT_FEATURE port=%jd feature=%jd", index,
   3682 		    value, 0, 0);
   3683 		if (index == 1)
   3684 			port = UHCI_PORTSC1;
   3685 		else if (index == 2)
   3686 			port = UHCI_PORTSC2;
   3687 		else {
   3688 			return -1;
   3689 		}
   3690 		switch(value) {
   3691 		case UHF_PORT_ENABLE:
   3692 			x = URWMASK(UREAD2(sc, port));
   3693 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3694 			break;
   3695 		case UHF_PORT_SUSPEND:
   3696 			x = URWMASK(UREAD2(sc, port));
   3697 			if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
   3698 				break;
   3699 			UWRITE2(sc, port, x | UHCI_PORTSC_RD);
   3700 			/* see USB2 spec ch. 7.1.7.7 */
   3701 			usb_delay_ms(&sc->sc_bus, 20);
   3702 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3703 			/* 10ms resume delay must be provided by caller */
   3704 			break;
   3705 		case UHF_PORT_RESET:
   3706 			x = URWMASK(UREAD2(sc, port));
   3707 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3708 			break;
   3709 		case UHF_C_PORT_CONNECTION:
   3710 			x = URWMASK(UREAD2(sc, port));
   3711 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3712 			break;
   3713 		case UHF_C_PORT_ENABLE:
   3714 			x = URWMASK(UREAD2(sc, port));
   3715 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3716 			break;
   3717 		case UHF_C_PORT_OVER_CURRENT:
   3718 			x = URWMASK(UREAD2(sc, port));
   3719 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3720 			break;
   3721 		case UHF_C_PORT_RESET:
   3722 			sc->sc_isreset = 0;
   3723 			break;
   3724 		case UHF_PORT_CONNECTION:
   3725 		case UHF_PORT_OVER_CURRENT:
   3726 		case UHF_PORT_POWER:
   3727 		case UHF_PORT_LOW_SPEED:
   3728 		case UHF_C_PORT_SUSPEND:
   3729 		default:
   3730 			return -1;
   3731 		}
   3732 		break;
   3733 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3734 		if (index == 1)
   3735 			port = UHCI_PORTSC1;
   3736 		else if (index == 2)
   3737 			port = UHCI_PORTSC2;
   3738 		else {
   3739 			return -1;
   3740 		}
   3741 		if (len > 0) {
   3742 			*(uint8_t *)buf =
   3743 			    UHCI_PORTSC_GET_LS(UREAD2(sc, port));
   3744 			totlen = 1;
   3745 		}
   3746 		break;
   3747 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3748 		if (len == 0)
   3749 			break;
   3750 		if ((value & 0xff) != 0) {
   3751 			return -1;
   3752 		}
   3753 		usb_hub_descriptor_t hubd;
   3754 
   3755 		totlen = min(buflen, sizeof(hubd));
   3756 		memcpy(&hubd, buf, totlen);
   3757 		hubd.bNbrPorts = 2;
   3758 		memcpy(buf, &hubd, totlen);
   3759 		break;
   3760 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3761 		if (len != 4) {
   3762 			return -1;
   3763 		}
   3764 		memset(buf, 0, len);
   3765 		totlen = len;
   3766 		break;
   3767 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3768 		if (index == 1)
   3769 			port = UHCI_PORTSC1;
   3770 		else if (index == 2)
   3771 			port = UHCI_PORTSC2;
   3772 		else {
   3773 			return -1;
   3774 		}
   3775 		if (len != 4) {
   3776 			return -1;
   3777 		}
   3778 		x = UREAD2(sc, port);
   3779 		status = change = 0;
   3780 		if (x & UHCI_PORTSC_CCS)
   3781 			status |= UPS_CURRENT_CONNECT_STATUS;
   3782 		if (x & UHCI_PORTSC_CSC)
   3783 			change |= UPS_C_CONNECT_STATUS;
   3784 		if (x & UHCI_PORTSC_PE)
   3785 			status |= UPS_PORT_ENABLED;
   3786 		if (x & UHCI_PORTSC_POEDC)
   3787 			change |= UPS_C_PORT_ENABLED;
   3788 		if (x & UHCI_PORTSC_OCI)
   3789 			status |= UPS_OVERCURRENT_INDICATOR;
   3790 		if (x & UHCI_PORTSC_OCIC)
   3791 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3792 		if (x & UHCI_PORTSC_SUSP)
   3793 			status |= UPS_SUSPEND;
   3794 		if (x & UHCI_PORTSC_LSDA)
   3795 			status |= UPS_LOW_SPEED;
   3796 		status |= UPS_PORT_POWER;
   3797 		if (sc->sc_isreset)
   3798 			change |= UPS_C_PORT_RESET;
   3799 		USETW(ps.wPortStatus, status);
   3800 		USETW(ps.wPortChange, change);
   3801 		totlen = min(len, sizeof(ps));
   3802 		memcpy(buf, &ps, totlen);
   3803 		break;
   3804 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3805 		return -1;
   3806 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3807 		break;
   3808 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3809 		if (index == 1)
   3810 			port = UHCI_PORTSC1;
   3811 		else if (index == 2)
   3812 			port = UHCI_PORTSC2;
   3813 		else {
   3814 			return -1;
   3815 		}
   3816 		switch(value) {
   3817 		case UHF_PORT_ENABLE:
   3818 			x = URWMASK(UREAD2(sc, port));
   3819 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3820 			break;
   3821 		case UHF_PORT_SUSPEND:
   3822 			x = URWMASK(UREAD2(sc, port));
   3823 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3824 			break;
   3825 		case UHF_PORT_RESET:
   3826 			err = uhci_portreset(sc, index);
   3827 			if (err != USBD_NORMAL_COMPLETION)
   3828 				return -1;
   3829 			return 0;
   3830 		case UHF_PORT_POWER:
   3831 			/* Pretend we turned on power */
   3832 			return 0;
   3833 		case UHF_C_PORT_CONNECTION:
   3834 		case UHF_C_PORT_ENABLE:
   3835 		case UHF_C_PORT_OVER_CURRENT:
   3836 		case UHF_PORT_CONNECTION:
   3837 		case UHF_PORT_OVER_CURRENT:
   3838 		case UHF_PORT_LOW_SPEED:
   3839 		case UHF_C_PORT_SUSPEND:
   3840 		case UHF_C_PORT_RESET:
   3841 		default:
   3842 			return -1;
   3843 		}
   3844 		break;
   3845 	default:
   3846 		/* default from usbroothub */
   3847 		DPRINTF("returning %jd (usbroothub default)",
   3848 		    buflen, 0, 0, 0);
   3849 		return buflen;
   3850 	}
   3851 
   3852 	DPRINTF("returning %jd", totlen, 0, 0, 0);
   3853 
   3854 	return totlen;
   3855 }
   3856 
   3857 /* Abort a root interrupt request. */
   3858 void
   3859 uhci_root_intr_abort(struct usbd_xfer *xfer)
   3860 {
   3861 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   3862 
   3863 	KASSERT(mutex_owned(&sc->sc_lock));
   3864 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   3865 
   3866 	callout_stop(&sc->sc_poll_handle);
   3867 	sc->sc_intr_xfer = NULL;
   3868 
   3869 	xfer->ux_status = USBD_CANCELLED;
   3870 #ifdef DIAGNOSTIC
   3871 	UHCI_XFER2UXFER(xfer)->ux_isdone = true;
   3872 #endif
   3873 	usb_transfer_complete(xfer);
   3874 }
   3875 
   3876 usbd_status
   3877 uhci_root_intr_transfer(struct usbd_xfer *xfer)
   3878 {
   3879 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   3880 	usbd_status err;
   3881 
   3882 	/* Insert last in queue. */
   3883 	mutex_enter(&sc->sc_lock);
   3884 	err = usb_insert_transfer(xfer);
   3885 	mutex_exit(&sc->sc_lock);
   3886 	if (err)
   3887 		return err;
   3888 
   3889 	/*
   3890 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3891 	 * start first
   3892 	 */
   3893 	return uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3894 }
   3895 
   3896 /* Start a transfer on the root interrupt pipe */
   3897 usbd_status
   3898 uhci_root_intr_start(struct usbd_xfer *xfer)
   3899 {
   3900 	struct usbd_pipe *pipe = xfer->ux_pipe;
   3901 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   3902 	unsigned int ival;
   3903 
   3904 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3905 	DPRINTF("xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer, xfer->ux_length,
   3906 	    xfer->ux_flags, 0);
   3907 
   3908 	if (sc->sc_dying)
   3909 		return USBD_IOERROR;
   3910 
   3911 	/* XXX temporary variable needed to avoid gcc3 warning */
   3912 	ival = xfer->ux_pipe->up_endpoint->ue_edesc->bInterval;
   3913 	sc->sc_ival = mstohz(ival);
   3914 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3915 	sc->sc_intr_xfer = xfer;
   3916 	return USBD_IN_PROGRESS;
   3917 }
   3918 
   3919 /* Close the root interrupt pipe. */
   3920 void
   3921 uhci_root_intr_close(struct usbd_pipe *pipe)
   3922 {
   3923 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   3924 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3925 
   3926 	KASSERT(mutex_owned(&sc->sc_lock));
   3927 
   3928 	callout_stop(&sc->sc_poll_handle);
   3929 	sc->sc_intr_xfer = NULL;
   3930 }
   3931