uhci.c revision 1.285
1 /* $NetBSD: uhci.c,v 1.285 2019/01/22 06:42:33 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * USB Universal Host Controller driver. 36 * Handles e.g. PIIX3 and PIIX4. 37 * 38 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 39 * USB spec: http://www.usb.org/developers/docs/ 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.285 2019/01/22 06:42:33 skrll Exp $"); 46 47 #ifdef _KERNEL_OPT 48 #include "opt_usb.h" 49 #endif 50 51 #include <sys/param.h> 52 53 #include <sys/bus.h> 54 #include <sys/cpu.h> 55 #include <sys/device.h> 56 #include <sys/kernel.h> 57 #include <sys/kmem.h> 58 #include <sys/mutex.h> 59 #include <sys/proc.h> 60 #include <sys/queue.h> 61 #include <sys/select.h> 62 #include <sys/sysctl.h> 63 #include <sys/systm.h> 64 65 #include <machine/endian.h> 66 67 #include <dev/usb/usb.h> 68 #include <dev/usb/usbdi.h> 69 #include <dev/usb/usbdivar.h> 70 #include <dev/usb/usb_mem.h> 71 72 #include <dev/usb/uhcireg.h> 73 #include <dev/usb/uhcivar.h> 74 #include <dev/usb/usbroothub.h> 75 #include <dev/usb/usbhist.h> 76 77 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 78 /*#define UHCI_CTL_LOOP */ 79 80 #ifdef UHCI_DEBUG 81 uhci_softc_t *thesc; 82 int uhcinoloop = 0; 83 #endif 84 85 #ifdef USB_DEBUG 86 #ifndef UHCI_DEBUG 87 #define uhcidebug 0 88 #else 89 static int uhcidebug = 0; 90 91 SYSCTL_SETUP(sysctl_hw_uhci_setup, "sysctl hw.uhci setup") 92 { 93 int err; 94 const struct sysctlnode *rnode; 95 const struct sysctlnode *cnode; 96 97 err = sysctl_createv(clog, 0, NULL, &rnode, 98 CTLFLAG_PERMANENT, CTLTYPE_NODE, "uhci", 99 SYSCTL_DESCR("uhci global controls"), 100 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 101 102 if (err) 103 goto fail; 104 105 /* control debugging printfs */ 106 err = sysctl_createv(clog, 0, &rnode, &cnode, 107 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 108 "debug", SYSCTL_DESCR("Enable debugging output"), 109 NULL, 0, &uhcidebug, sizeof(uhcidebug), CTL_CREATE, CTL_EOL); 110 if (err) 111 goto fail; 112 113 return; 114 fail: 115 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 116 } 117 118 #endif /* UHCI_DEBUG */ 119 #endif /* USB_DEBUG */ 120 121 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOGN(uhcidebug,1,FMT,A,B,C,D) 122 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(uhcidebug,N,FMT,A,B,C,D) 123 #define UHCIHIST_FUNC() USBHIST_FUNC() 124 #define UHCIHIST_CALLED(name) USBHIST_CALLED(uhcidebug) 125 126 /* 127 * The UHCI controller is little endian, so on big endian machines 128 * the data stored in memory needs to be swapped. 129 */ 130 131 struct uhci_pipe { 132 struct usbd_pipe pipe; 133 int nexttoggle; 134 135 u_char aborting; 136 struct usbd_xfer *abortstart, abortend; 137 138 /* Info needed for different pipe kinds. */ 139 union { 140 /* Control pipe */ 141 struct { 142 uhci_soft_qh_t *sqh; 143 usb_dma_t reqdma; 144 uhci_soft_td_t *setup; 145 uhci_soft_td_t *stat; 146 } ctrl; 147 /* Interrupt pipe */ 148 struct { 149 int npoll; 150 uhci_soft_qh_t **qhs; 151 } intr; 152 /* Bulk pipe */ 153 struct { 154 uhci_soft_qh_t *sqh; 155 } bulk; 156 /* Isochronous pipe */ 157 struct isoc { 158 uhci_soft_td_t **stds; 159 int next, inuse; 160 } isoc; 161 }; 162 }; 163 164 typedef TAILQ_HEAD(ux_completeq, uhci_xfer) ux_completeq_t; 165 166 Static void uhci_globalreset(uhci_softc_t *); 167 Static usbd_status uhci_portreset(uhci_softc_t*, int); 168 Static void uhci_reset(uhci_softc_t *); 169 Static usbd_status uhci_run(uhci_softc_t *, int, int); 170 Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 171 Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 172 Static void uhci_free_std_locked(uhci_softc_t *, uhci_soft_td_t *); 173 Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 174 Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 175 #if 0 176 Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 177 uhci_intr_info_t *); 178 Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 179 #endif 180 181 #if 0 182 Static void uhci_free_std_chain(uhci_softc_t *, uhci_soft_td_t *, 183 uhci_soft_td_t *); 184 #endif 185 Static int uhci_alloc_std_chain(uhci_softc_t *, struct usbd_xfer *, 186 int, int, uhci_soft_td_t **); 187 Static void uhci_free_stds(uhci_softc_t *, struct uhci_xfer *); 188 189 Static void uhci_reset_std_chain(uhci_softc_t *, struct usbd_xfer *, 190 int, int, int *, uhci_soft_td_t **); 191 192 Static void uhci_poll_hub(void *); 193 Static void uhci_check_intr(uhci_softc_t *, struct uhci_xfer *, 194 ux_completeq_t *); 195 Static void uhci_idone(struct uhci_xfer *, ux_completeq_t *); 196 197 Static void uhci_abort_xfer(struct usbd_xfer *, usbd_status); 198 199 Static void uhci_timeout(void *); 200 Static void uhci_timeout_task(void *); 201 Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 202 Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 203 Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 204 Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 205 Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 206 Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 207 Static void uhci_add_loop(uhci_softc_t *); 208 Static void uhci_rem_loop(uhci_softc_t *); 209 210 Static usbd_status uhci_setup_isoc(struct usbd_pipe *); 211 212 Static struct usbd_xfer * 213 uhci_allocx(struct usbd_bus *, unsigned int); 214 Static void uhci_freex(struct usbd_bus *, struct usbd_xfer *); 215 Static void uhci_get_lock(struct usbd_bus *, kmutex_t **); 216 Static int uhci_roothub_ctrl(struct usbd_bus *, 217 usb_device_request_t *, void *, int); 218 219 Static int uhci_device_ctrl_init(struct usbd_xfer *); 220 Static void uhci_device_ctrl_fini(struct usbd_xfer *); 221 Static usbd_status uhci_device_ctrl_transfer(struct usbd_xfer *); 222 Static usbd_status uhci_device_ctrl_start(struct usbd_xfer *); 223 Static void uhci_device_ctrl_abort(struct usbd_xfer *); 224 Static void uhci_device_ctrl_close(struct usbd_pipe *); 225 Static void uhci_device_ctrl_done(struct usbd_xfer *); 226 227 Static int uhci_device_intr_init(struct usbd_xfer *); 228 Static void uhci_device_intr_fini(struct usbd_xfer *); 229 Static usbd_status uhci_device_intr_transfer(struct usbd_xfer *); 230 Static usbd_status uhci_device_intr_start(struct usbd_xfer *); 231 Static void uhci_device_intr_abort(struct usbd_xfer *); 232 Static void uhci_device_intr_close(struct usbd_pipe *); 233 Static void uhci_device_intr_done(struct usbd_xfer *); 234 235 Static int uhci_device_bulk_init(struct usbd_xfer *); 236 Static void uhci_device_bulk_fini(struct usbd_xfer *); 237 Static usbd_status uhci_device_bulk_transfer(struct usbd_xfer *); 238 Static usbd_status uhci_device_bulk_start(struct usbd_xfer *); 239 Static void uhci_device_bulk_abort(struct usbd_xfer *); 240 Static void uhci_device_bulk_close(struct usbd_pipe *); 241 Static void uhci_device_bulk_done(struct usbd_xfer *); 242 243 Static int uhci_device_isoc_init(struct usbd_xfer *); 244 Static void uhci_device_isoc_fini(struct usbd_xfer *); 245 Static usbd_status uhci_device_isoc_transfer(struct usbd_xfer *); 246 Static void uhci_device_isoc_abort(struct usbd_xfer *); 247 Static void uhci_device_isoc_close(struct usbd_pipe *); 248 Static void uhci_device_isoc_done(struct usbd_xfer *); 249 250 Static usbd_status uhci_root_intr_transfer(struct usbd_xfer *); 251 Static usbd_status uhci_root_intr_start(struct usbd_xfer *); 252 Static void uhci_root_intr_abort(struct usbd_xfer *); 253 Static void uhci_root_intr_close(struct usbd_pipe *); 254 Static void uhci_root_intr_done(struct usbd_xfer *); 255 256 Static usbd_status uhci_open(struct usbd_pipe *); 257 Static void uhci_poll(struct usbd_bus *); 258 Static void uhci_softintr(void *); 259 260 Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 261 Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 262 Static usbd_status uhci_device_setintr(uhci_softc_t *, 263 struct uhci_pipe *, int); 264 265 Static void uhci_device_clear_toggle(struct usbd_pipe *); 266 Static void uhci_noop(struct usbd_pipe *); 267 268 static inline uhci_soft_qh_t * 269 uhci_find_prev_qh(uhci_soft_qh_t *, uhci_soft_qh_t *); 270 271 #ifdef UHCI_DEBUG 272 Static void uhci_dump_all(uhci_softc_t *); 273 Static void uhci_dumpregs(uhci_softc_t *); 274 Static void uhci_dump_qhs(uhci_soft_qh_t *); 275 Static void uhci_dump_qh(uhci_soft_qh_t *); 276 Static void uhci_dump_tds(uhci_soft_td_t *); 277 Static void uhci_dump_td(uhci_soft_td_t *); 278 Static void uhci_dump_ii(struct uhci_xfer *); 279 void uhci_dump(void); 280 #endif 281 282 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 283 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 284 #define UWRITE1(sc, r, x) \ 285 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 286 } while (/*CONSTCOND*/0) 287 #define UWRITE2(sc, r, x) \ 288 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 289 } while (/*CONSTCOND*/0) 290 #define UWRITE4(sc, r, x) \ 291 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 292 } while (/*CONSTCOND*/0) 293 294 static __inline uint8_t 295 UREAD1(uhci_softc_t *sc, bus_size_t r) 296 { 297 298 UBARR(sc); 299 return bus_space_read_1(sc->iot, sc->ioh, r); 300 } 301 302 static __inline uint16_t 303 UREAD2(uhci_softc_t *sc, bus_size_t r) 304 { 305 306 UBARR(sc); 307 return bus_space_read_2(sc->iot, sc->ioh, r); 308 } 309 310 #ifdef UHCI_DEBUG 311 static __inline uint32_t 312 UREAD4(uhci_softc_t *sc, bus_size_t r) 313 { 314 315 UBARR(sc); 316 return bus_space_read_4(sc->iot, sc->ioh, r); 317 } 318 #endif 319 320 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 321 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 322 323 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 324 325 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 326 327 const struct usbd_bus_methods uhci_bus_methods = { 328 .ubm_open = uhci_open, 329 .ubm_softint = uhci_softintr, 330 .ubm_dopoll = uhci_poll, 331 .ubm_allocx = uhci_allocx, 332 .ubm_freex = uhci_freex, 333 .ubm_getlock = uhci_get_lock, 334 .ubm_rhctrl = uhci_roothub_ctrl, 335 }; 336 337 const struct usbd_pipe_methods uhci_root_intr_methods = { 338 .upm_transfer = uhci_root_intr_transfer, 339 .upm_start = uhci_root_intr_start, 340 .upm_abort = uhci_root_intr_abort, 341 .upm_close = uhci_root_intr_close, 342 .upm_cleartoggle = uhci_noop, 343 .upm_done = uhci_root_intr_done, 344 }; 345 346 const struct usbd_pipe_methods uhci_device_ctrl_methods = { 347 .upm_init = uhci_device_ctrl_init, 348 .upm_fini = uhci_device_ctrl_fini, 349 .upm_transfer = uhci_device_ctrl_transfer, 350 .upm_start = uhci_device_ctrl_start, 351 .upm_abort = uhci_device_ctrl_abort, 352 .upm_close = uhci_device_ctrl_close, 353 .upm_cleartoggle = uhci_noop, 354 .upm_done = uhci_device_ctrl_done, 355 }; 356 357 const struct usbd_pipe_methods uhci_device_intr_methods = { 358 .upm_init = uhci_device_intr_init, 359 .upm_fini = uhci_device_intr_fini, 360 .upm_transfer = uhci_device_intr_transfer, 361 .upm_start = uhci_device_intr_start, 362 .upm_abort = uhci_device_intr_abort, 363 .upm_close = uhci_device_intr_close, 364 .upm_cleartoggle = uhci_device_clear_toggle, 365 .upm_done = uhci_device_intr_done, 366 }; 367 368 const struct usbd_pipe_methods uhci_device_bulk_methods = { 369 .upm_init = uhci_device_bulk_init, 370 .upm_fini = uhci_device_bulk_fini, 371 .upm_transfer = uhci_device_bulk_transfer, 372 .upm_start = uhci_device_bulk_start, 373 .upm_abort = uhci_device_bulk_abort, 374 .upm_close = uhci_device_bulk_close, 375 .upm_cleartoggle = uhci_device_clear_toggle, 376 .upm_done = uhci_device_bulk_done, 377 }; 378 379 const struct usbd_pipe_methods uhci_device_isoc_methods = { 380 .upm_init = uhci_device_isoc_init, 381 .upm_fini = uhci_device_isoc_fini, 382 .upm_transfer = uhci_device_isoc_transfer, 383 .upm_abort = uhci_device_isoc_abort, 384 .upm_close = uhci_device_isoc_close, 385 .upm_cleartoggle = uhci_noop, 386 .upm_done = uhci_device_isoc_done, 387 }; 388 389 static inline void 390 uhci_add_intr_list(uhci_softc_t *sc, struct uhci_xfer *ux) 391 { 392 393 TAILQ_INSERT_TAIL(&sc->sc_intrhead, ux, ux_list); 394 } 395 396 static inline void 397 uhci_del_intr_list(uhci_softc_t *sc, struct uhci_xfer *ux) 398 { 399 400 TAILQ_REMOVE(&sc->sc_intrhead, ux, ux_list); 401 } 402 403 static inline uhci_soft_qh_t * 404 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 405 { 406 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 407 DPRINTFN(15, "pqh=%#jx sqh=%#jx", (uintptr_t)pqh, (uintptr_t)sqh, 0, 0); 408 409 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 410 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 411 usb_syncmem(&pqh->dma, 412 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 413 sizeof(pqh->qh.qh_hlink), 414 BUS_DMASYNC_POSTWRITE); 415 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 416 printf("%s: QH not found\n", __func__); 417 return NULL; 418 } 419 #endif 420 } 421 return pqh; 422 } 423 424 void 425 uhci_globalreset(uhci_softc_t *sc) 426 { 427 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 428 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 429 UHCICMD(sc, 0); /* do nothing */ 430 } 431 432 int 433 uhci_init(uhci_softc_t *sc) 434 { 435 usbd_status err; 436 int i, j; 437 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 438 uhci_soft_td_t *std; 439 440 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 441 442 #ifdef UHCI_DEBUG 443 thesc = sc; 444 445 if (uhcidebug >= 2) 446 uhci_dumpregs(sc); 447 #endif 448 449 sc->sc_suspend = PWR_RESUME; 450 451 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 452 uhci_globalreset(sc); /* reset the controller */ 453 uhci_reset(sc); 454 455 /* Allocate and initialize real frame array. */ 456 err = usb_allocmem(&sc->sc_bus, 457 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 458 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 459 if (err) 460 return err; 461 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 462 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 463 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 464 465 /* Initialise mutex early for uhci_alloc_* */ 466 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 467 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 468 469 /* 470 * Allocate a TD, inactive, that hangs from the last QH. 471 * This is to avoid a bug in the PIIX that makes it run berserk 472 * otherwise. 473 */ 474 std = uhci_alloc_std(sc); 475 if (std == NULL) 476 return ENOMEM; 477 std->link.std = NULL; 478 std->td.td_link = htole32(UHCI_PTR_T); 479 std->td.td_status = htole32(0); /* inactive */ 480 std->td.td_token = htole32(0); 481 std->td.td_buffer = htole32(0); 482 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 483 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 484 485 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 486 lsqh = uhci_alloc_sqh(sc); 487 if (lsqh == NULL) 488 goto fail1; 489 lsqh->hlink = NULL; 490 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 491 lsqh->elink = std; 492 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 493 sc->sc_last_qh = lsqh; 494 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 495 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 496 497 /* Allocate the dummy QH where bulk traffic will be queued. */ 498 bsqh = uhci_alloc_sqh(sc); 499 if (bsqh == NULL) 500 goto fail2; 501 bsqh->hlink = lsqh; 502 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 503 bsqh->elink = NULL; 504 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 505 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 506 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 507 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 508 509 /* Allocate dummy QH where high speed control traffic will be queued. */ 510 chsqh = uhci_alloc_sqh(sc); 511 if (chsqh == NULL) 512 goto fail3; 513 chsqh->hlink = bsqh; 514 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 515 chsqh->elink = NULL; 516 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 517 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 518 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 519 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 520 521 /* Allocate dummy QH where control traffic will be queued. */ 522 clsqh = uhci_alloc_sqh(sc); 523 if (clsqh == NULL) 524 goto fail4; 525 clsqh->hlink = chsqh; 526 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 527 clsqh->elink = NULL; 528 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 529 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 530 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 531 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 532 533 /* 534 * Make all (virtual) frame list pointers point to the interrupt 535 * queue heads and the interrupt queue heads at the control 536 * queue head and point the physical frame list to the virtual. 537 */ 538 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 539 std = uhci_alloc_std(sc); 540 sqh = uhci_alloc_sqh(sc); 541 if (std == NULL || sqh == NULL) 542 return USBD_NOMEM; 543 std->link.sqh = sqh; 544 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 545 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 546 std->td.td_token = htole32(0); 547 std->td.td_buffer = htole32(0); 548 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 549 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 550 sqh->hlink = clsqh; 551 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 552 sqh->elink = NULL; 553 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 554 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 555 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 556 sc->sc_vframes[i].htd = std; 557 sc->sc_vframes[i].etd = std; 558 sc->sc_vframes[i].hqh = sqh; 559 sc->sc_vframes[i].eqh = sqh; 560 for (j = i; 561 j < UHCI_FRAMELIST_COUNT; 562 j += UHCI_VFRAMELIST_COUNT) 563 sc->sc_pframes[j] = htole32(std->physaddr); 564 } 565 usb_syncmem(&sc->sc_dma, 0, 566 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 567 BUS_DMASYNC_PREWRITE); 568 569 570 TAILQ_INIT(&sc->sc_intrhead); 571 572 sc->sc_xferpool = pool_cache_init(sizeof(struct uhci_xfer), 0, 0, 0, 573 "uhcixfer", NULL, IPL_USB, NULL, NULL, NULL); 574 575 callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE); 576 577 /* Set up the bus struct. */ 578 sc->sc_bus.ub_methods = &uhci_bus_methods; 579 sc->sc_bus.ub_pipesize = sizeof(struct uhci_pipe); 580 sc->sc_bus.ub_usedma = true; 581 582 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 583 584 DPRINTF("Enabling...", 0, 0, 0, 0); 585 586 err = uhci_run(sc, 1, 0); /* and here we go... */ 587 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 588 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 589 return err; 590 591 fail4: 592 uhci_free_sqh(sc, chsqh); 593 fail3: 594 uhci_free_sqh(sc, lsqh); 595 fail2: 596 uhci_free_sqh(sc, lsqh); 597 fail1: 598 uhci_free_std(sc, std); 599 600 return ENOMEM; 601 } 602 603 int 604 uhci_activate(device_t self, enum devact act) 605 { 606 struct uhci_softc *sc = device_private(self); 607 608 switch (act) { 609 case DVACT_DEACTIVATE: 610 sc->sc_dying = 1; 611 return 0; 612 default: 613 return EOPNOTSUPP; 614 } 615 } 616 617 void 618 uhci_childdet(device_t self, device_t child) 619 { 620 struct uhci_softc *sc = device_private(self); 621 622 KASSERT(sc->sc_child == child); 623 sc->sc_child = NULL; 624 } 625 626 int 627 uhci_detach(struct uhci_softc *sc, int flags) 628 { 629 int rv = 0; 630 631 if (sc->sc_child != NULL) 632 rv = config_detach(sc->sc_child, flags); 633 634 if (rv != 0) 635 return rv; 636 637 callout_halt(&sc->sc_poll_handle, NULL); 638 callout_destroy(&sc->sc_poll_handle); 639 640 mutex_destroy(&sc->sc_lock); 641 mutex_destroy(&sc->sc_intr_lock); 642 643 pool_cache_destroy(sc->sc_xferpool); 644 645 /* XXX free other data structures XXX */ 646 647 return rv; 648 } 649 650 struct usbd_xfer * 651 uhci_allocx(struct usbd_bus *bus, unsigned int nframes) 652 { 653 struct uhci_softc *sc = UHCI_BUS2SC(bus); 654 struct usbd_xfer *xfer; 655 656 xfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK); 657 if (xfer != NULL) { 658 memset(xfer, 0, sizeof(struct uhci_xfer)); 659 660 /* Initialise this always so we can call remove on it. */ 661 usb_init_task(&xfer->ux_aborttask, uhci_timeout_task, xfer, 662 USB_TASKQ_MPSAFE); 663 #ifdef DIAGNOSTIC 664 struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer); 665 uxfer->ux_isdone = true; 666 xfer->ux_state = XFER_BUSY; 667 #endif 668 } 669 return xfer; 670 } 671 672 void 673 uhci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 674 { 675 struct uhci_softc *sc = UHCI_BUS2SC(bus); 676 struct uhci_xfer *uxfer __diagused = UHCI_XFER2UXFER(xfer); 677 678 KASSERTMSG(xfer->ux_state == XFER_BUSY, "xfer %p state %d\n", xfer, 679 xfer->ux_state); 680 KASSERTMSG(uxfer->ux_isdone, "xfer %p not done\n", xfer); 681 #ifdef DIAGNOSTIC 682 xfer->ux_state = XFER_FREE; 683 #endif 684 pool_cache_put(sc->sc_xferpool, xfer); 685 } 686 687 Static void 688 uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 689 { 690 struct uhci_softc *sc = UHCI_BUS2SC(bus); 691 692 *lock = &sc->sc_lock; 693 } 694 695 696 /* 697 * Handle suspend/resume. 698 * 699 * We need to switch to polling mode here, because this routine is 700 * called from an interrupt context. This is all right since we 701 * are almost suspended anyway. 702 */ 703 bool 704 uhci_resume(device_t dv, const pmf_qual_t *qual) 705 { 706 uhci_softc_t *sc = device_private(dv); 707 int cmd; 708 709 mutex_spin_enter(&sc->sc_intr_lock); 710 711 cmd = UREAD2(sc, UHCI_CMD); 712 sc->sc_bus.ub_usepolling++; 713 UWRITE2(sc, UHCI_INTR, 0); 714 uhci_globalreset(sc); 715 uhci_reset(sc); 716 if (cmd & UHCI_CMD_RS) 717 uhci_run(sc, 0, 1); 718 719 /* restore saved state */ 720 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 721 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 722 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 723 724 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 725 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock); 726 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 727 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 728 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 729 UHCICMD(sc, UHCI_CMD_MAXP); 730 uhci_run(sc, 1, 1); /* and start traffic again */ 731 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock); 732 sc->sc_bus.ub_usepolling--; 733 if (sc->sc_intr_xfer != NULL) 734 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 735 sc->sc_intr_xfer); 736 #ifdef UHCI_DEBUG 737 if (uhcidebug >= 2) 738 uhci_dumpregs(sc); 739 #endif 740 741 sc->sc_suspend = PWR_RESUME; 742 mutex_spin_exit(&sc->sc_intr_lock); 743 744 return true; 745 } 746 747 bool 748 uhci_suspend(device_t dv, const pmf_qual_t *qual) 749 { 750 uhci_softc_t *sc = device_private(dv); 751 int cmd; 752 753 mutex_spin_enter(&sc->sc_intr_lock); 754 755 cmd = UREAD2(sc, UHCI_CMD); 756 757 #ifdef UHCI_DEBUG 758 if (uhcidebug >= 2) 759 uhci_dumpregs(sc); 760 #endif 761 if (sc->sc_intr_xfer != NULL) 762 callout_stop(&sc->sc_poll_handle); 763 sc->sc_suspend = PWR_SUSPEND; 764 sc->sc_bus.ub_usepolling++; 765 766 uhci_run(sc, 0, 1); /* stop the controller */ 767 cmd &= ~UHCI_CMD_RS; 768 769 /* save some state if BIOS doesn't */ 770 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 771 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 772 773 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 774 775 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 776 usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock); 777 sc->sc_bus.ub_usepolling--; 778 779 mutex_spin_exit(&sc->sc_intr_lock); 780 781 return true; 782 } 783 784 #ifdef UHCI_DEBUG 785 Static void 786 uhci_dumpregs(uhci_softc_t *sc) 787 { 788 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 789 DPRINTF("cmd =%04jx sts =%04jx intr =%04jx frnum =%04jx", 790 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 791 UREAD2(sc, UHCI_INTR), UREAD2(sc, UHCI_FRNUM)); 792 DPRINTF("sof =%04jx portsc1=%04jx portsc2=%04jx flbase=%08jx", 793 UREAD1(sc, UHCI_SOF), UREAD2(sc, UHCI_PORTSC1), 794 UREAD2(sc, UHCI_PORTSC2), UREAD4(sc, UHCI_FLBASEADDR)); 795 } 796 797 void 798 uhci_dump_td(uhci_soft_td_t *p) 799 { 800 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 801 802 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 803 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 804 805 DPRINTF("TD(%#jx) at 0x%08jx", (uintptr_t)p, p->physaddr, 0, 0); 806 DPRINTF(" link=0x%08jx status=0x%08jx " 807 "token=0x%08x buffer=0x%08x", 808 le32toh(p->td.td_link), 809 le32toh(p->td.td_status), 810 le32toh(p->td.td_token), 811 le32toh(p->td.td_buffer)); 812 813 DPRINTF("bitstuff=%jd crcto =%jd nak =%jd babble =%jd", 814 !!(le32toh(p->td.td_status) & UHCI_TD_BITSTUFF), 815 !!(le32toh(p->td.td_status) & UHCI_TD_CRCTO), 816 !!(le32toh(p->td.td_status) & UHCI_TD_NAK), 817 !!(le32toh(p->td.td_status) & UHCI_TD_BABBLE)); 818 DPRINTF("dbuffer =%jd stalled =%jd active =%jd ioc =%jd", 819 !!(le32toh(p->td.td_status) & UHCI_TD_DBUFFER), 820 !!(le32toh(p->td.td_status) & UHCI_TD_STALLED), 821 !!(le32toh(p->td.td_status) & UHCI_TD_ACTIVE), 822 !!(le32toh(p->td.td_status) & UHCI_TD_IOC)); 823 DPRINTF("ios =%jd ls =%jd spd =%jd", 824 !!(le32toh(p->td.td_status) & UHCI_TD_IOS), 825 !!(le32toh(p->td.td_status) & UHCI_TD_LS), 826 !!(le32toh(p->td.td_status) & UHCI_TD_SPD), 0); 827 DPRINTF("errcnt =%d actlen =%d pid=%02x", 828 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 829 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 830 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 0); 831 DPRINTF("addr=%jd endpt=%jd D=%jd maxlen=%jd,", 832 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 833 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 834 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 835 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))); 836 } 837 838 void 839 uhci_dump_qh(uhci_soft_qh_t *sqh) 840 { 841 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 842 843 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 844 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 845 846 DPRINTF("QH(%#jx) at 0x%08jx: hlink=%08jx elink=%08jx", (uintptr_t)sqh, 847 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 848 le32toh(sqh->qh.qh_elink)); 849 850 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 851 } 852 853 854 #if 1 855 void 856 uhci_dump(void) 857 { 858 uhci_dump_all(thesc); 859 } 860 #endif 861 862 void 863 uhci_dump_all(uhci_softc_t *sc) 864 { 865 uhci_dumpregs(sc); 866 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 867 uhci_dump_qhs(sc->sc_lctl_start); 868 } 869 870 871 void 872 uhci_dump_qhs(uhci_soft_qh_t *sqh) 873 { 874 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 875 876 uhci_dump_qh(sqh); 877 878 /* 879 * uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 880 * Traverses sideways first, then down. 881 * 882 * QH1 883 * QH2 884 * No QH 885 * TD2.1 886 * TD2.2 887 * TD1.1 888 * etc. 889 * 890 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 891 */ 892 893 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 894 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 895 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 896 uhci_dump_qhs(sqh->hlink); 897 else 898 DPRINTF("No QH", 0, 0, 0, 0); 899 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 900 901 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 902 uhci_dump_tds(sqh->elink); 903 else 904 DPRINTF("No QH", 0, 0, 0, 0); 905 } 906 907 void 908 uhci_dump_tds(uhci_soft_td_t *std) 909 { 910 uhci_soft_td_t *td; 911 int stop; 912 913 for (td = std; td != NULL; td = td->link.std) { 914 uhci_dump_td(td); 915 916 /* 917 * Check whether the link pointer in this TD marks 918 * the link pointer as end of queue. This avoids 919 * printing the free list in case the queue/TD has 920 * already been moved there (seatbelt). 921 */ 922 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 923 sizeof(td->td.td_link), 924 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 925 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 926 le32toh(td->td.td_link) == 0); 927 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 928 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 929 if (stop) 930 break; 931 } 932 } 933 934 Static void 935 uhci_dump_ii(struct uhci_xfer *ux) 936 { 937 struct usbd_pipe *pipe; 938 usb_endpoint_descriptor_t *ed; 939 struct usbd_device *dev; 940 941 if (ux == NULL) { 942 printf("ux NULL\n"); 943 return; 944 } 945 pipe = ux->ux_xfer.ux_pipe; 946 if (pipe == NULL) { 947 printf("ux %p: done=%d pipe=NULL\n", ux, ux->ux_isdone); 948 return; 949 } 950 if (pipe->up_endpoint == NULL) { 951 printf("ux %p: done=%d pipe=%p pipe->up_endpoint=NULL\n", 952 ux, ux->ux_isdone, pipe); 953 return; 954 } 955 if (pipe->up_dev == NULL) { 956 printf("ux %p: done=%d pipe=%p pipe->up_dev=NULL\n", 957 ux, ux->ux_isdone, pipe); 958 return; 959 } 960 ed = pipe->up_endpoint->ue_edesc; 961 dev = pipe->up_dev; 962 printf("ux %p: done=%d dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 963 ux, ux->ux_isdone, dev, 964 UGETW(dev->ud_ddesc.idVendor), 965 UGETW(dev->ud_ddesc.idProduct), 966 dev->ud_addr, pipe, 967 ed->bEndpointAddress, ed->bmAttributes); 968 } 969 970 void uhci_dump_iis(struct uhci_softc *sc); 971 void 972 uhci_dump_iis(struct uhci_softc *sc) 973 { 974 struct uhci_xfer *ux; 975 976 printf("interrupt list:\n"); 977 TAILQ_FOREACH(ux, &sc->sc_intrhead, ux_list) 978 uhci_dump_ii(ux); 979 } 980 981 void iidump(void); 982 void iidump(void) { uhci_dump_iis(thesc); } 983 984 #endif 985 986 /* 987 * This routine is executed periodically and simulates interrupts 988 * from the root controller interrupt pipe for port status change. 989 */ 990 void 991 uhci_poll_hub(void *addr) 992 { 993 struct usbd_xfer *xfer = addr; 994 struct usbd_pipe *pipe = xfer->ux_pipe; 995 uhci_softc_t *sc; 996 u_char *p; 997 998 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 999 1000 if (__predict_false(pipe->up_dev == NULL || pipe->up_dev->ud_bus == NULL)) 1001 return; /* device has detached */ 1002 sc = UHCI_PIPE2SC(pipe); 1003 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1004 1005 p = xfer->ux_buf; 1006 p[0] = 0; 1007 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1008 p[0] |= 1<<1; 1009 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1010 p[0] |= 1<<2; 1011 if (p[0] == 0) 1012 /* No change, try again in a while */ 1013 return; 1014 1015 xfer->ux_actlen = 1; 1016 xfer->ux_status = USBD_NORMAL_COMPLETION; 1017 mutex_enter(&sc->sc_lock); 1018 usb_transfer_complete(xfer); 1019 mutex_exit(&sc->sc_lock); 1020 } 1021 1022 void 1023 uhci_root_intr_done(struct usbd_xfer *xfer) 1024 { 1025 } 1026 1027 /* 1028 * Let the last QH loop back to the high speed control transfer QH. 1029 * This is what intel calls "bandwidth reclamation" and improves 1030 * USB performance a lot for some devices. 1031 * If we are already looping, just count it. 1032 */ 1033 void 1034 uhci_add_loop(uhci_softc_t *sc) 1035 { 1036 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1037 1038 #ifdef UHCI_DEBUG 1039 if (uhcinoloop) 1040 return; 1041 #endif 1042 if (++sc->sc_loops == 1) { 1043 DPRINTFN(5, "add loop", 0, 0, 0, 0); 1044 /* Note, we don't loop back the soft pointer. */ 1045 sc->sc_last_qh->qh.qh_hlink = 1046 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1047 usb_syncmem(&sc->sc_last_qh->dma, 1048 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1049 sizeof(sc->sc_last_qh->qh.qh_hlink), 1050 BUS_DMASYNC_PREWRITE); 1051 } 1052 } 1053 1054 void 1055 uhci_rem_loop(uhci_softc_t *sc) 1056 { 1057 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1058 1059 #ifdef UHCI_DEBUG 1060 if (uhcinoloop) 1061 return; 1062 #endif 1063 if (--sc->sc_loops == 0) { 1064 DPRINTFN(5, "remove loop", 0, 0, 0, 0); 1065 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1066 usb_syncmem(&sc->sc_last_qh->dma, 1067 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1068 sizeof(sc->sc_last_qh->qh.qh_hlink), 1069 BUS_DMASYNC_PREWRITE); 1070 } 1071 } 1072 1073 /* Add high speed control QH, called with lock held. */ 1074 void 1075 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1076 { 1077 uhci_soft_qh_t *eqh; 1078 1079 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1080 1081 KASSERT(mutex_owned(&sc->sc_lock)); 1082 1083 DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0); 1084 eqh = sc->sc_hctl_end; 1085 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1086 sizeof(eqh->qh.qh_hlink), 1087 BUS_DMASYNC_POSTWRITE); 1088 sqh->hlink = eqh->hlink; 1089 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1090 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1091 BUS_DMASYNC_PREWRITE); 1092 eqh->hlink = sqh; 1093 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1094 sc->sc_hctl_end = sqh; 1095 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1096 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1097 #ifdef UHCI_CTL_LOOP 1098 uhci_add_loop(sc); 1099 #endif 1100 } 1101 1102 /* Remove high speed control QH, called with lock held. */ 1103 void 1104 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1105 { 1106 uhci_soft_qh_t *pqh; 1107 uint32_t elink; 1108 1109 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1110 1111 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1112 DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0); 1113 #ifdef UHCI_CTL_LOOP 1114 uhci_rem_loop(sc); 1115 #endif 1116 /* 1117 * The T bit should be set in the elink of the QH so that the HC 1118 * doesn't follow the pointer. This condition may fail if the 1119 * the transferred packet was short so that the QH still points 1120 * at the last used TD. 1121 * In this case we set the T bit and wait a little for the HC 1122 * to stop looking at the TD. 1123 * Note that if the TD chain is large enough, the controller 1124 * may still be looking at the chain at the end of this function. 1125 * uhci_free_std_chain() will make sure the controller stops 1126 * looking at it quickly, but until then we should not change 1127 * sqh->hlink. 1128 */ 1129 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1130 sizeof(sqh->qh.qh_elink), 1131 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1132 elink = le32toh(sqh->qh.qh_elink); 1133 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1134 sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD); 1135 if (!(elink & UHCI_PTR_T)) { 1136 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1137 usb_syncmem(&sqh->dma, 1138 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1139 sizeof(sqh->qh.qh_elink), 1140 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1141 delay(UHCI_QH_REMOVE_DELAY); 1142 } 1143 1144 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1145 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1146 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1147 pqh->hlink = sqh->hlink; 1148 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1149 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1150 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1151 delay(UHCI_QH_REMOVE_DELAY); 1152 if (sc->sc_hctl_end == sqh) 1153 sc->sc_hctl_end = pqh; 1154 } 1155 1156 /* Add low speed control QH, called with lock held. */ 1157 void 1158 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1159 { 1160 uhci_soft_qh_t *eqh; 1161 1162 KASSERT(mutex_owned(&sc->sc_lock)); 1163 1164 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1165 DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0); 1166 1167 eqh = sc->sc_lctl_end; 1168 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1169 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1170 sqh->hlink = eqh->hlink; 1171 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1172 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1173 BUS_DMASYNC_PREWRITE); 1174 eqh->hlink = sqh; 1175 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1176 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1177 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1178 sc->sc_lctl_end = sqh; 1179 } 1180 1181 /* Remove low speed control QH, called with lock held. */ 1182 void 1183 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1184 { 1185 uhci_soft_qh_t *pqh; 1186 uint32_t elink; 1187 1188 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1189 1190 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1191 DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0); 1192 1193 /* See comment in uhci_remove_hs_ctrl() */ 1194 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1195 sizeof(sqh->qh.qh_elink), 1196 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1197 elink = le32toh(sqh->qh.qh_elink); 1198 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1199 sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD); 1200 if (!(elink & UHCI_PTR_T)) { 1201 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1202 usb_syncmem(&sqh->dma, 1203 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1204 sizeof(sqh->qh.qh_elink), 1205 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1206 delay(UHCI_QH_REMOVE_DELAY); 1207 } 1208 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1209 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1210 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1211 pqh->hlink = sqh->hlink; 1212 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1213 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1214 sizeof(pqh->qh.qh_hlink), 1215 BUS_DMASYNC_PREWRITE); 1216 delay(UHCI_QH_REMOVE_DELAY); 1217 if (sc->sc_lctl_end == sqh) 1218 sc->sc_lctl_end = pqh; 1219 } 1220 1221 /* Add bulk QH, called with lock held. */ 1222 void 1223 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1224 { 1225 uhci_soft_qh_t *eqh; 1226 1227 KASSERT(mutex_owned(&sc->sc_lock)); 1228 1229 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1230 DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0); 1231 1232 eqh = sc->sc_bulk_end; 1233 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1234 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1235 sqh->hlink = eqh->hlink; 1236 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1237 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1238 BUS_DMASYNC_PREWRITE); 1239 eqh->hlink = sqh; 1240 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1241 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1242 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1243 sc->sc_bulk_end = sqh; 1244 uhci_add_loop(sc); 1245 } 1246 1247 /* Remove bulk QH, called with lock held. */ 1248 void 1249 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1250 { 1251 uhci_soft_qh_t *pqh; 1252 1253 KASSERT(mutex_owned(&sc->sc_lock)); 1254 1255 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1256 DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0); 1257 1258 uhci_rem_loop(sc); 1259 /* See comment in uhci_remove_hs_ctrl() */ 1260 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1261 sizeof(sqh->qh.qh_elink), 1262 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1263 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1264 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1265 usb_syncmem(&sqh->dma, 1266 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1267 sizeof(sqh->qh.qh_elink), 1268 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1269 delay(UHCI_QH_REMOVE_DELAY); 1270 } 1271 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1272 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1273 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1274 pqh->hlink = sqh->hlink; 1275 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1276 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1277 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1278 delay(UHCI_QH_REMOVE_DELAY); 1279 if (sc->sc_bulk_end == sqh) 1280 sc->sc_bulk_end = pqh; 1281 } 1282 1283 Static int uhci_intr1(uhci_softc_t *); 1284 1285 int 1286 uhci_intr(void *arg) 1287 { 1288 uhci_softc_t *sc = arg; 1289 int ret = 0; 1290 1291 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1292 1293 mutex_spin_enter(&sc->sc_intr_lock); 1294 1295 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1296 goto done; 1297 1298 if (sc->sc_bus.ub_usepolling || UREAD2(sc, UHCI_INTR) == 0) { 1299 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1300 goto done; 1301 } 1302 1303 ret = uhci_intr1(sc); 1304 1305 done: 1306 mutex_spin_exit(&sc->sc_intr_lock); 1307 return ret; 1308 } 1309 1310 int 1311 uhci_intr1(uhci_softc_t *sc) 1312 { 1313 int status; 1314 int ack; 1315 1316 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1317 1318 #ifdef UHCI_DEBUG 1319 if (uhcidebug >= 15) { 1320 DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0); 1321 uhci_dumpregs(sc); 1322 } 1323 #endif 1324 1325 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1326 1327 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1328 /* Check if the interrupt was for us. */ 1329 if (status == 0) 1330 return 0; 1331 1332 if (sc->sc_suspend != PWR_RESUME) { 1333 #ifdef DIAGNOSTIC 1334 printf("%s: interrupt while not operating ignored\n", 1335 device_xname(sc->sc_dev)); 1336 #endif 1337 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1338 return 0; 1339 } 1340 1341 ack = 0; 1342 if (status & UHCI_STS_USBINT) 1343 ack |= UHCI_STS_USBINT; 1344 if (status & UHCI_STS_USBEI) 1345 ack |= UHCI_STS_USBEI; 1346 if (status & UHCI_STS_RD) { 1347 ack |= UHCI_STS_RD; 1348 #ifdef UHCI_DEBUG 1349 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1350 #endif 1351 } 1352 if (status & UHCI_STS_HSE) { 1353 ack |= UHCI_STS_HSE; 1354 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1355 } 1356 if (status & UHCI_STS_HCPE) { 1357 ack |= UHCI_STS_HCPE; 1358 printf("%s: host controller process error\n", 1359 device_xname(sc->sc_dev)); 1360 } 1361 1362 /* When HCHalted=1 and Run/Stop=0 , it is normal */ 1363 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) { 1364 /* no acknowledge needed */ 1365 if (!sc->sc_dying) { 1366 printf("%s: host controller halted\n", 1367 device_xname(sc->sc_dev)); 1368 #ifdef UHCI_DEBUG 1369 uhci_dump_all(sc); 1370 #endif 1371 } 1372 sc->sc_dying = 1; 1373 } 1374 1375 if (!ack) 1376 return 0; /* nothing to acknowledge */ 1377 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1378 1379 usb_schedsoftintr(&sc->sc_bus); 1380 1381 DPRINTFN(15, "sc %#jx done", (uintptr_t)sc, 0, 0, 0); 1382 1383 return 1; 1384 } 1385 1386 void 1387 uhci_softintr(void *v) 1388 { 1389 struct usbd_bus *bus = v; 1390 uhci_softc_t *sc = UHCI_BUS2SC(bus); 1391 struct uhci_xfer *ux, *nextux; 1392 ux_completeq_t cq; 1393 1394 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1395 DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0); 1396 1397 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1398 1399 TAILQ_INIT(&cq); 1400 /* 1401 * Interrupts on UHCI really suck. When the host controller 1402 * interrupts because a transfer is completed there is no 1403 * way of knowing which transfer it was. You can scan down 1404 * the TDs and QHs of the previous frame to limit the search, 1405 * but that assumes that the interrupt was not delayed by more 1406 * than 1 ms, which may not always be true (e.g. after debug 1407 * output on a slow console). 1408 * We scan all interrupt descriptors to see if any have 1409 * completed. 1410 */ 1411 TAILQ_FOREACH_SAFE(ux, &sc->sc_intrhead, ux_list, nextux) { 1412 uhci_check_intr(sc, ux, &cq); 1413 } 1414 1415 /* 1416 * We abuse ux_list for the interrupt and complete lists and 1417 * interrupt transfers will get re-added here so use 1418 * the _SAFE version of TAILQ_FOREACH. 1419 */ 1420 TAILQ_FOREACH_SAFE(ux, &cq, ux_list, nextux) { 1421 DPRINTF("ux %#jx", (uintptr_t)ux, 0, 0, 0); 1422 usb_transfer_complete(&ux->ux_xfer); 1423 } 1424 1425 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1426 } 1427 1428 /* Check for an interrupt. */ 1429 void 1430 uhci_check_intr(uhci_softc_t *sc, struct uhci_xfer *ux, ux_completeq_t *cqp) 1431 { 1432 uhci_soft_td_t *std, *fstd = NULL, *lstd = NULL; 1433 uint32_t status; 1434 1435 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1436 DPRINTFN(15, "ux %#jx", (uintptr_t)ux, 0, 0, 0); 1437 1438 KASSERT(ux != NULL); 1439 1440 struct usbd_xfer *xfer = &ux->ux_xfer; 1441 if (xfer->ux_status == USBD_CANCELLED || 1442 xfer->ux_status == USBD_TIMEOUT) { 1443 DPRINTF("aborted xfer %#jx", (uintptr_t)xfer, 0, 0, 0); 1444 return; 1445 } 1446 1447 switch (ux->ux_type) { 1448 case UX_CTRL: 1449 fstd = ux->ux_setup; 1450 lstd = ux->ux_stat; 1451 break; 1452 case UX_BULK: 1453 case UX_INTR: 1454 case UX_ISOC: 1455 fstd = ux->ux_stdstart; 1456 lstd = ux->ux_stdend; 1457 break; 1458 default: 1459 KASSERT(false); 1460 break; 1461 } 1462 if (fstd == NULL) 1463 return; 1464 1465 KASSERT(lstd != NULL); 1466 1467 usb_syncmem(&lstd->dma, 1468 lstd->offs + offsetof(uhci_td_t, td_status), 1469 sizeof(lstd->td.td_status), 1470 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1471 status = le32toh(lstd->td.td_status); 1472 usb_syncmem(&lstd->dma, 1473 lstd->offs + offsetof(uhci_td_t, td_status), 1474 sizeof(lstd->td.td_status), 1475 BUS_DMASYNC_PREREAD); 1476 1477 /* If the last TD is not marked active we can complete */ 1478 if (!(status & UHCI_TD_ACTIVE)) { 1479 done: 1480 DPRINTFN(12, "ux=%#jx done", (uintptr_t)ux, 0, 0, 0); 1481 uhci_idone(ux, cqp); 1482 return; 1483 } 1484 1485 /* 1486 * If the last TD is still active we need to check whether there 1487 * is an error somewhere in the middle, or whether there was a 1488 * short packet (SPD and not ACTIVE). 1489 */ 1490 DPRINTFN(12, "active ux=%#jx", (uintptr_t)ux, 0, 0, 0); 1491 for (std = fstd; std != lstd; std = std->link.std) { 1492 usb_syncmem(&std->dma, 1493 std->offs + offsetof(uhci_td_t, td_status), 1494 sizeof(std->td.td_status), 1495 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1496 status = le32toh(std->td.td_status); 1497 usb_syncmem(&std->dma, 1498 std->offs + offsetof(uhci_td_t, td_status), 1499 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1500 1501 /* If there's an active TD the xfer isn't done. */ 1502 if (status & UHCI_TD_ACTIVE) { 1503 DPRINTFN(12, "ux=%#jx std=%#jx still active", 1504 (uintptr_t)ux, (uintptr_t)std, 0, 0); 1505 return; 1506 } 1507 1508 /* Any kind of error makes the xfer done. */ 1509 if (status & UHCI_TD_STALLED) 1510 goto done; 1511 1512 /* 1513 * If the data phase of a control transfer is short, we need 1514 * to complete the status stage 1515 */ 1516 1517 if ((status & UHCI_TD_SPD) && ux->ux_type == UX_CTRL) { 1518 struct uhci_pipe *upipe = 1519 UHCI_PIPE2UPIPE(xfer->ux_pipe); 1520 uhci_soft_qh_t *sqh = upipe->ctrl.sqh; 1521 uhci_soft_td_t *stat = upipe->ctrl.stat; 1522 1523 DPRINTFN(12, "ux=%#jx std=%#jx control status" 1524 "phase needs completion", (uintptr_t)ux, 1525 (uintptr_t)ux->ux_stdstart, 0, 0); 1526 1527 sqh->qh.qh_elink = 1528 htole32(stat->physaddr | UHCI_PTR_TD); 1529 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1530 BUS_DMASYNC_PREWRITE); 1531 break; 1532 } 1533 1534 /* We want short packets, and it is short: it's done */ 1535 usb_syncmem(&std->dma, 1536 std->offs + offsetof(uhci_td_t, td_token), 1537 sizeof(std->td.td_token), 1538 BUS_DMASYNC_POSTWRITE); 1539 1540 if ((status & UHCI_TD_SPD) && 1541 UHCI_TD_GET_ACTLEN(status) < 1542 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) { 1543 goto done; 1544 } 1545 } 1546 } 1547 1548 /* Called with USB lock held. */ 1549 void 1550 uhci_idone(struct uhci_xfer *ux, ux_completeq_t *cqp) 1551 { 1552 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1553 struct usbd_xfer *xfer = &ux->ux_xfer; 1554 uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer); 1555 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 1556 uhci_soft_td_t *std; 1557 uint32_t status = 0, nstatus; 1558 const bool polling __diagused = sc->sc_bus.ub_usepolling; 1559 int actlen; 1560 1561 KASSERT(polling || mutex_owned(&sc->sc_lock)); 1562 1563 DPRINTFN(12, "ux=%#jx", (uintptr_t)ux, 0, 0, 0); 1564 1565 /* 1566 * If software has completed it, either by cancellation 1567 * or timeout, drop it on the floor. 1568 */ 1569 if (xfer->ux_status != USBD_IN_PROGRESS) { 1570 KASSERT(xfer->ux_status == USBD_CANCELLED || 1571 xfer->ux_status == USBD_TIMEOUT); 1572 DPRINTF("aborted xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1573 return; 1574 } 1575 1576 /* 1577 * Cancel the timeout and the task, which have not yet 1578 * run. If they have already fired, at worst they are 1579 * waiting for the lock. They will see that the xfer 1580 * is no longer in progress and give up. 1581 */ 1582 callout_stop(&xfer->ux_callout); 1583 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1584 1585 #ifdef DIAGNOSTIC 1586 #ifdef UHCI_DEBUG 1587 if (ux->ux_isdone) { 1588 DPRINTF("--- dump start ---", 0, 0, 0, 0); 1589 uhci_dump_ii(ux); 1590 DPRINTF("--- dump end ---", 0, 0, 0, 0); 1591 } 1592 #endif 1593 KASSERT(!ux->ux_isdone); 1594 KASSERTMSG(!ux->ux_isdone, "xfer %p type %d status %d", xfer, 1595 ux->ux_type, xfer->ux_status); 1596 ux->ux_isdone = true; 1597 #endif 1598 1599 if (xfer->ux_nframes != 0) { 1600 /* Isoc transfer, do things differently. */ 1601 uhci_soft_td_t **stds = upipe->isoc.stds; 1602 int i, n, nframes, len; 1603 1604 DPRINTFN(5, "ux=%#jx isoc ready", (uintptr_t)ux, 0, 0, 0); 1605 1606 nframes = xfer->ux_nframes; 1607 actlen = 0; 1608 n = ux->ux_curframe; 1609 for (i = 0; i < nframes; i++) { 1610 std = stds[n]; 1611 #ifdef UHCI_DEBUG 1612 if (uhcidebug >= 5) { 1613 DPRINTF("isoc TD %jd", i, 0, 0, 0); 1614 DPRINTF("--- dump start ---", 0, 0, 0, 0); 1615 uhci_dump_td(std); 1616 DPRINTF("--- dump end ---", 0, 0, 0, 0); 1617 } 1618 #endif 1619 if (++n >= UHCI_VFRAMELIST_COUNT) 1620 n = 0; 1621 usb_syncmem(&std->dma, 1622 std->offs + offsetof(uhci_td_t, td_status), 1623 sizeof(std->td.td_status), 1624 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1625 status = le32toh(std->td.td_status); 1626 len = UHCI_TD_GET_ACTLEN(status); 1627 xfer->ux_frlengths[i] = len; 1628 actlen += len; 1629 } 1630 upipe->isoc.inuse -= nframes; 1631 xfer->ux_actlen = actlen; 1632 xfer->ux_status = USBD_NORMAL_COMPLETION; 1633 goto end; 1634 } 1635 1636 #ifdef UHCI_DEBUG 1637 DPRINTFN(10, "ux=%#jx, xfer=%#jx, pipe=%#jx ready", (uintptr_t)ux, 1638 (uintptr_t)xfer, (uintptr_t)upipe, 0); 1639 if (uhcidebug >= 10) { 1640 DPRINTF("--- dump start ---", 0, 0, 0, 0); 1641 uhci_dump_tds(ux->ux_stdstart); 1642 DPRINTF("--- dump end ---", 0, 0, 0, 0); 1643 } 1644 #endif 1645 1646 /* The transfer is done, compute actual length and status. */ 1647 actlen = 0; 1648 for (std = ux->ux_stdstart; std != NULL; std = std->link.std) { 1649 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1650 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1651 nstatus = le32toh(std->td.td_status); 1652 if (nstatus & UHCI_TD_ACTIVE) 1653 break; 1654 1655 status = nstatus; 1656 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1657 UHCI_TD_PID_SETUP) 1658 actlen += UHCI_TD_GET_ACTLEN(status); 1659 else { 1660 /* 1661 * UHCI will report CRCTO in addition to a STALL or NAK 1662 * for a SETUP transaction. See section 3.2.2, "TD 1663 * CONTROL AND STATUS". 1664 */ 1665 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1666 status &= ~UHCI_TD_CRCTO; 1667 } 1668 } 1669 /* If there are left over TDs we need to update the toggle. */ 1670 if (std != NULL) 1671 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1672 1673 status &= UHCI_TD_ERROR; 1674 DPRINTFN(10, "actlen=%jd, status=0x%jx", actlen, status, 0, 0); 1675 xfer->ux_actlen = actlen; 1676 if (status != 0) { 1677 1678 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1679 "error, addr=%jd, endpt=0x%02jx", 1680 xfer->ux_pipe->up_dev->ud_addr, 1681 xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress, 1682 0, 0); 1683 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1684 "bitstuff=%jd crcto =%jd nak =%jd babble =%jd", 1685 !!(status & UHCI_TD_BITSTUFF), 1686 !!(status & UHCI_TD_CRCTO), 1687 !!(status & UHCI_TD_NAK), 1688 !!(status & UHCI_TD_BABBLE)); 1689 DPRINTFN((status == UHCI_TD_STALLED) * 10, 1690 "dbuffer =%jd stalled =%jd active =%jd", 1691 !!(status & UHCI_TD_DBUFFER), 1692 !!(status & UHCI_TD_STALLED), 1693 !!(status & UHCI_TD_ACTIVE), 1694 0); 1695 1696 if (status == UHCI_TD_STALLED) 1697 xfer->ux_status = USBD_STALLED; 1698 else 1699 xfer->ux_status = USBD_IOERROR; /* more info XXX */ 1700 } else { 1701 xfer->ux_status = USBD_NORMAL_COMPLETION; 1702 } 1703 1704 end: 1705 uhci_del_intr_list(sc, ux); 1706 if (cqp) 1707 TAILQ_INSERT_TAIL(cqp, ux, ux_list); 1708 1709 KASSERT(polling || mutex_owned(&sc->sc_lock)); 1710 DPRINTFN(12, "ux=%#jx done", (uintptr_t)ux, 0, 0, 0); 1711 } 1712 1713 /* 1714 * Called when a request does not complete. 1715 */ 1716 void 1717 uhci_timeout(void *addr) 1718 { 1719 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1720 struct usbd_xfer *xfer = addr; 1721 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 1722 struct usbd_device *dev = xfer->ux_pipe->up_dev; 1723 1724 DPRINTF("xfer %#jx", (uintptr_t)xfer, 0, 0, 0); 1725 1726 mutex_enter(&sc->sc_lock); 1727 if (!sc->sc_dying && xfer->ux_status == USBD_IN_PROGRESS) 1728 usb_add_task(dev, &xfer->ux_aborttask, USB_TASKQ_HC); 1729 mutex_exit(&sc->sc_lock); 1730 } 1731 1732 void 1733 uhci_timeout_task(void *addr) 1734 { 1735 struct usbd_xfer *xfer = addr; 1736 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 1737 1738 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1739 1740 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1741 1742 mutex_enter(&sc->sc_lock); 1743 KASSERT(xfer->ux_status == USBD_TIMEOUT); 1744 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1745 mutex_exit(&sc->sc_lock); 1746 } 1747 1748 void 1749 uhci_poll(struct usbd_bus *bus) 1750 { 1751 uhci_softc_t *sc = UHCI_BUS2SC(bus); 1752 1753 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1754 mutex_spin_enter(&sc->sc_intr_lock); 1755 uhci_intr1(sc); 1756 mutex_spin_exit(&sc->sc_intr_lock); 1757 } 1758 } 1759 1760 void 1761 uhci_reset(uhci_softc_t *sc) 1762 { 1763 int n; 1764 1765 UHCICMD(sc, UHCI_CMD_HCRESET); 1766 /* The reset bit goes low when the controller is done. */ 1767 for (n = 0; n < UHCI_RESET_TIMEOUT && 1768 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1769 usb_delay_ms(&sc->sc_bus, 1); 1770 if (n >= UHCI_RESET_TIMEOUT) 1771 printf("%s: controller did not reset\n", 1772 device_xname(sc->sc_dev)); 1773 } 1774 1775 usbd_status 1776 uhci_run(uhci_softc_t *sc, int run, int locked) 1777 { 1778 int n, running; 1779 uint16_t cmd; 1780 1781 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1782 1783 run = run != 0; 1784 if (!locked) 1785 mutex_spin_enter(&sc->sc_intr_lock); 1786 1787 DPRINTF("setting run=%jd", run, 0, 0, 0); 1788 cmd = UREAD2(sc, UHCI_CMD); 1789 if (run) 1790 cmd |= UHCI_CMD_RS; 1791 else 1792 cmd &= ~UHCI_CMD_RS; 1793 UHCICMD(sc, cmd); 1794 for (n = 0; n < 10; n++) { 1795 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1796 /* return when we've entered the state we want */ 1797 if (run == running) { 1798 if (!locked) 1799 mutex_spin_exit(&sc->sc_intr_lock); 1800 DPRINTF("done cmd=0x%jx sts=0x%jx", 1801 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 0, 0); 1802 return USBD_NORMAL_COMPLETION; 1803 } 1804 usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock); 1805 } 1806 if (!locked) 1807 mutex_spin_exit(&sc->sc_intr_lock); 1808 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1809 run ? "start" : "stop"); 1810 return USBD_IOERROR; 1811 } 1812 1813 /* 1814 * Memory management routines. 1815 * uhci_alloc_std allocates TDs 1816 * uhci_alloc_sqh allocates QHs 1817 * These two routines do their own free list management, 1818 * partly for speed, partly because allocating DMAable memory 1819 * has page size granularity so much memory would be wasted if 1820 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1821 */ 1822 1823 uhci_soft_td_t * 1824 uhci_alloc_std(uhci_softc_t *sc) 1825 { 1826 uhci_soft_td_t *std; 1827 usbd_status err; 1828 int i, offs; 1829 usb_dma_t dma; 1830 1831 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1832 1833 mutex_enter(&sc->sc_lock); 1834 if (sc->sc_freetds == NULL) { 1835 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 1836 mutex_exit(&sc->sc_lock); 1837 1838 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1839 UHCI_TD_ALIGN, &dma); 1840 if (err) 1841 return NULL; 1842 1843 mutex_enter(&sc->sc_lock); 1844 for (i = 0; i < UHCI_STD_CHUNK; i++) { 1845 offs = i * UHCI_STD_SIZE; 1846 std = KERNADDR(&dma, offs); 1847 std->physaddr = DMAADDR(&dma, offs); 1848 std->dma = dma; 1849 std->offs = offs; 1850 std->link.std = sc->sc_freetds; 1851 sc->sc_freetds = std; 1852 } 1853 } 1854 std = sc->sc_freetds; 1855 sc->sc_freetds = std->link.std; 1856 mutex_exit(&sc->sc_lock); 1857 1858 memset(&std->td, 0, sizeof(uhci_td_t)); 1859 1860 return std; 1861 } 1862 1863 #define TD_IS_FREE 0x12345678 1864 1865 void 1866 uhci_free_std_locked(uhci_softc_t *sc, uhci_soft_td_t *std) 1867 { 1868 KASSERT(mutex_owned(&sc->sc_lock)); 1869 1870 #ifdef DIAGNOSTIC 1871 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1872 printf("%s: freeing free TD %p\n", __func__, std); 1873 return; 1874 } 1875 std->td.td_token = htole32(TD_IS_FREE); 1876 #endif 1877 1878 std->link.std = sc->sc_freetds; 1879 sc->sc_freetds = std; 1880 } 1881 1882 void 1883 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1884 { 1885 mutex_enter(&sc->sc_lock); 1886 uhci_free_std_locked(sc, std); 1887 mutex_exit(&sc->sc_lock); 1888 } 1889 1890 uhci_soft_qh_t * 1891 uhci_alloc_sqh(uhci_softc_t *sc) 1892 { 1893 uhci_soft_qh_t *sqh; 1894 usbd_status err; 1895 int i, offs; 1896 usb_dma_t dma; 1897 1898 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1899 1900 mutex_enter(&sc->sc_lock); 1901 if (sc->sc_freeqhs == NULL) { 1902 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 1903 mutex_exit(&sc->sc_lock); 1904 1905 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1906 UHCI_QH_ALIGN, &dma); 1907 if (err) 1908 return NULL; 1909 1910 mutex_enter(&sc->sc_lock); 1911 for (i = 0; i < UHCI_SQH_CHUNK; i++) { 1912 offs = i * UHCI_SQH_SIZE; 1913 sqh = KERNADDR(&dma, offs); 1914 sqh->physaddr = DMAADDR(&dma, offs); 1915 sqh->dma = dma; 1916 sqh->offs = offs; 1917 sqh->hlink = sc->sc_freeqhs; 1918 sc->sc_freeqhs = sqh; 1919 } 1920 } 1921 sqh = sc->sc_freeqhs; 1922 sc->sc_freeqhs = sqh->hlink; 1923 mutex_exit(&sc->sc_lock); 1924 1925 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1926 1927 return sqh; 1928 } 1929 1930 void 1931 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1932 { 1933 KASSERT(mutex_owned(&sc->sc_lock)); 1934 1935 sqh->hlink = sc->sc_freeqhs; 1936 sc->sc_freeqhs = sqh; 1937 } 1938 1939 #if 0 1940 void 1941 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1942 uhci_soft_td_t *stdend) 1943 { 1944 uhci_soft_td_t *p; 1945 uint32_t td_link; 1946 1947 /* 1948 * to avoid race condition with the controller which may be looking 1949 * at this chain, we need to first invalidate all links, and 1950 * then wait for the controller to move to another queue 1951 */ 1952 for (p = std; p != stdend; p = p->link.std) { 1953 usb_syncmem(&p->dma, 1954 p->offs + offsetof(uhci_td_t, td_link), 1955 sizeof(p->td.td_link), 1956 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1957 td_link = le32toh(p->td.td_link); 1958 usb_syncmem(&p->dma, 1959 p->offs + offsetof(uhci_td_t, td_link), 1960 sizeof(p->td.td_link), 1961 BUS_DMASYNC_PREREAD); 1962 if ((td_link & UHCI_PTR_T) == 0) { 1963 p->td.td_link = htole32(UHCI_PTR_T); 1964 usb_syncmem(&p->dma, 1965 p->offs + offsetof(uhci_td_t, td_link), 1966 sizeof(p->td.td_link), 1967 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1968 } 1969 } 1970 delay(UHCI_QH_REMOVE_DELAY); 1971 1972 for (; std != stdend; std = p) { 1973 p = std->link.std; 1974 uhci_free_std(sc, std); 1975 } 1976 } 1977 #endif 1978 1979 int 1980 uhci_alloc_std_chain(uhci_softc_t *sc, struct usbd_xfer *xfer, int len, 1981 int rd, uhci_soft_td_t **sp) 1982 { 1983 struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer); 1984 uint16_t flags = xfer->ux_flags; 1985 uhci_soft_td_t *p; 1986 1987 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 1988 1989 DPRINTFN(8, "xfer=%#jx pipe=%#jx", (uintptr_t)xfer, 1990 (uintptr_t)xfer->ux_pipe, 0, 0); 1991 1992 ASSERT_SLEEPABLE(); 1993 KASSERT(sp); 1994 1995 int maxp = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 1996 if (maxp == 0) { 1997 printf("%s: maxp=0\n", __func__); 1998 return EINVAL; 1999 } 2000 size_t ntd = (len + maxp - 1) / maxp; 2001 if (!rd && (flags & USBD_FORCE_SHORT_XFER)) { 2002 ntd++; 2003 } 2004 DPRINTFN(10, "maxp=%jd ntd=%jd", maxp, ntd, 0, 0); 2005 2006 uxfer->ux_stds = NULL; 2007 uxfer->ux_nstd = ntd; 2008 if (ntd == 0) { 2009 *sp = NULL; 2010 DPRINTF("ntd=0", 0, 0, 0, 0); 2011 return 0; 2012 } 2013 uxfer->ux_stds = kmem_alloc(sizeof(uhci_soft_td_t *) * ntd, 2014 KM_SLEEP); 2015 2016 for (int i = 0; i < ntd; i++) { 2017 p = uhci_alloc_std(sc); 2018 if (p == NULL) { 2019 if (i != 0) { 2020 uxfer->ux_nstd = i; 2021 uhci_free_stds(sc, uxfer); 2022 } 2023 kmem_free(uxfer->ux_stds, 2024 sizeof(uhci_soft_td_t *) * ntd); 2025 return ENOMEM; 2026 } 2027 uxfer->ux_stds[i] = p; 2028 } 2029 2030 *sp = uxfer->ux_stds[0]; 2031 2032 return 0; 2033 } 2034 2035 Static void 2036 uhci_free_stds(uhci_softc_t *sc, struct uhci_xfer *ux) 2037 { 2038 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2039 2040 DPRINTFN(8, "ux=%#jx", (uintptr_t)ux, 0, 0, 0); 2041 2042 mutex_enter(&sc->sc_lock); 2043 for (size_t i = 0; i < ux->ux_nstd; i++) { 2044 uhci_soft_td_t *std = ux->ux_stds[i]; 2045 #ifdef DIAGNOSTIC 2046 if (le32toh(std->td.td_token) == TD_IS_FREE) { 2047 printf("%s: freeing free TD %p\n", __func__, std); 2048 return; 2049 } 2050 std->td.td_token = htole32(TD_IS_FREE); 2051 #endif 2052 ux->ux_stds[i]->link.std = sc->sc_freetds; 2053 sc->sc_freetds = std; 2054 } 2055 mutex_exit(&sc->sc_lock); 2056 } 2057 2058 2059 Static void 2060 uhci_reset_std_chain(uhci_softc_t *sc, struct usbd_xfer *xfer, 2061 int length, int isread, int *toggle, uhci_soft_td_t **lstd) 2062 { 2063 struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer); 2064 struct usbd_pipe *pipe = xfer->ux_pipe; 2065 usb_dma_t *dma = &xfer->ux_dmabuf; 2066 uint16_t flags = xfer->ux_flags; 2067 uhci_soft_td_t *std, *prev; 2068 int len = length; 2069 int tog = *toggle; 2070 int maxp; 2071 uint32_t status; 2072 size_t i; 2073 2074 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2075 DPRINTFN(8, "xfer=%#jx len %jd isread %jd toggle %jd", (uintptr_t)xfer, 2076 len, isread, *toggle); 2077 2078 KASSERT(len != 0 || (!isread && (flags & USBD_FORCE_SHORT_XFER))); 2079 2080 maxp = UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize); 2081 KASSERT(maxp != 0); 2082 2083 int addr = xfer->ux_pipe->up_dev->ud_addr; 2084 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 2085 2086 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 2087 if (pipe->up_dev->ud_speed == USB_SPEED_LOW) 2088 status |= UHCI_TD_LS; 2089 if (flags & USBD_SHORT_XFER_OK) 2090 status |= UHCI_TD_SPD; 2091 usb_syncmem(dma, 0, len, 2092 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2093 std = prev = NULL; 2094 for (i = 0; len != 0 && i < uxfer->ux_nstd; i++, prev = std) { 2095 int l = len; 2096 std = uxfer->ux_stds[i]; 2097 if (l > maxp) 2098 l = maxp; 2099 2100 if (prev) { 2101 prev->link.std = std; 2102 prev->td.td_link = htole32( 2103 std->physaddr | UHCI_PTR_VF | UHCI_PTR_TD 2104 ); 2105 usb_syncmem(&prev->dma, prev->offs, sizeof(prev->td), 2106 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2107 } 2108 2109 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2110 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2111 2112 std->td.td_link = htole32(UHCI_PTR_T | UHCI_PTR_VF | UHCI_PTR_TD); 2113 std->td.td_status = htole32(status); 2114 std->td.td_token = htole32( 2115 UHCI_TD_SET_ENDPT(UE_GET_ADDR(endpt)) | 2116 UHCI_TD_SET_DEVADDR(addr) | 2117 UHCI_TD_SET_PID(isread ? UHCI_TD_PID_IN : UHCI_TD_PID_OUT) | 2118 UHCI_TD_SET_DT(tog) | 2119 UHCI_TD_SET_MAXLEN(l) 2120 ); 2121 std->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 2122 2123 std->link.std = NULL; 2124 2125 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2126 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2127 tog ^= 1; 2128 2129 len -= l; 2130 } 2131 KASSERTMSG(len == 0, "xfer %p alen %d len %d mps %d ux_nqtd %zu i %zu", 2132 xfer, length, len, maxp, uxfer->ux_nstd, i); 2133 2134 if (!isread && 2135 (flags & USBD_FORCE_SHORT_XFER) && 2136 length % maxp == 0) { 2137 /* Force a 0 length transfer at the end. */ 2138 KASSERTMSG(i < uxfer->ux_nstd, "i=%zu nstd=%zu", i, 2139 uxfer->ux_nstd); 2140 std = uxfer->ux_stds[i++]; 2141 2142 std->td.td_link = htole32(UHCI_PTR_T | UHCI_PTR_VF | UHCI_PTR_TD); 2143 std->td.td_status = htole32(status); 2144 std->td.td_token = htole32( 2145 UHCI_TD_SET_ENDPT(UE_GET_ADDR(endpt)) | 2146 UHCI_TD_SET_DEVADDR(addr) | 2147 UHCI_TD_SET_PID(UHCI_TD_PID_OUT) | 2148 UHCI_TD_SET_DT(tog) | 2149 UHCI_TD_SET_MAXLEN(0) 2150 ); 2151 std->td.td_buffer = 0; 2152 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2153 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2154 2155 std->link.std = NULL; 2156 if (prev) { 2157 prev->link.std = std; 2158 prev->td.td_link = htole32( 2159 std->physaddr | UHCI_PTR_VF | UHCI_PTR_TD 2160 ); 2161 usb_syncmem(&prev->dma, prev->offs, sizeof(prev->td), 2162 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2163 } 2164 tog ^= 1; 2165 } 2166 *lstd = std; 2167 *toggle = tog; 2168 } 2169 2170 void 2171 uhci_device_clear_toggle(struct usbd_pipe *pipe) 2172 { 2173 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe); 2174 upipe->nexttoggle = 0; 2175 } 2176 2177 void 2178 uhci_noop(struct usbd_pipe *pipe) 2179 { 2180 } 2181 2182 int 2183 uhci_device_bulk_init(struct usbd_xfer *xfer) 2184 { 2185 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2186 struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer); 2187 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 2188 int endpt = ed->bEndpointAddress; 2189 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2190 int len = xfer->ux_bufsize; 2191 int err = 0; 2192 2193 2194 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2195 DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer, len, 2196 xfer->ux_flags, 0); 2197 2198 if (sc->sc_dying) 2199 return USBD_IOERROR; 2200 2201 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2202 2203 uxfer->ux_type = UX_BULK; 2204 err = uhci_alloc_std_chain(sc, xfer, len, isread, &uxfer->ux_stdstart); 2205 if (err) 2206 return err; 2207 2208 #ifdef UHCI_DEBUG 2209 if (uhcidebug >= 10) { 2210 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2211 uhci_dump_tds(uxfer->ux_stdstart); 2212 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2213 } 2214 #endif 2215 2216 return 0; 2217 } 2218 2219 Static void 2220 uhci_device_bulk_fini(struct usbd_xfer *xfer) 2221 { 2222 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2223 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 2224 2225 KASSERT(ux->ux_type == UX_BULK); 2226 2227 if (ux->ux_nstd) { 2228 uhci_free_stds(sc, ux); 2229 kmem_free(ux->ux_stds, sizeof(uhci_soft_td_t *) * ux->ux_nstd); 2230 } 2231 } 2232 2233 usbd_status 2234 uhci_device_bulk_transfer(struct usbd_xfer *xfer) 2235 { 2236 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2237 usbd_status err; 2238 2239 /* Insert last in queue. */ 2240 mutex_enter(&sc->sc_lock); 2241 err = usb_insert_transfer(xfer); 2242 mutex_exit(&sc->sc_lock); 2243 if (err) 2244 return err; 2245 2246 /* 2247 * Pipe isn't running (otherwise err would be USBD_INPROG), 2248 * so start it first. 2249 */ 2250 return uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2251 } 2252 2253 usbd_status 2254 uhci_device_bulk_start(struct usbd_xfer *xfer) 2255 { 2256 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 2257 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 2258 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2259 uhci_soft_td_t *data, *dataend; 2260 uhci_soft_qh_t *sqh; 2261 const bool polling = sc->sc_bus.ub_usepolling; 2262 int len; 2263 int endpt; 2264 int isread; 2265 2266 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2267 DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer, 2268 xfer->ux_length, xfer->ux_flags, 0); 2269 2270 if (sc->sc_dying) 2271 return USBD_IOERROR; 2272 2273 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2274 KASSERT(xfer->ux_length <= xfer->ux_bufsize); 2275 2276 len = xfer->ux_length; 2277 endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2278 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2279 sqh = upipe->bulk.sqh; 2280 2281 /* Take lock here to protect nexttoggle */ 2282 if (!polling) 2283 mutex_enter(&sc->sc_lock); 2284 2285 uhci_reset_std_chain(sc, xfer, len, isread, &upipe->nexttoggle, 2286 &dataend); 2287 2288 data = ux->ux_stdstart; 2289 ux->ux_stdend = dataend; 2290 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2291 usb_syncmem(&dataend->dma, 2292 dataend->offs + offsetof(uhci_td_t, td_status), 2293 sizeof(dataend->td.td_status), 2294 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2295 2296 #ifdef UHCI_DEBUG 2297 if (uhcidebug >= 10) { 2298 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2299 DPRINTFN(10, "before transfer", 0, 0, 0, 0); 2300 uhci_dump_tds(data); 2301 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2302 } 2303 #endif 2304 2305 KASSERT(ux->ux_isdone); 2306 #ifdef DIAGNOSTIC 2307 ux->ux_isdone = false; 2308 #endif 2309 2310 sqh->elink = data; 2311 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2312 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2313 2314 uhci_add_bulk(sc, sqh); 2315 uhci_add_intr_list(sc, ux); 2316 2317 if (xfer->ux_timeout && !polling) { 2318 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2319 uhci_timeout, xfer); 2320 } 2321 xfer->ux_status = USBD_IN_PROGRESS; 2322 if (!polling) 2323 mutex_exit(&sc->sc_lock); 2324 2325 return USBD_IN_PROGRESS; 2326 } 2327 2328 /* Abort a device bulk request. */ 2329 void 2330 uhci_device_bulk_abort(struct usbd_xfer *xfer) 2331 { 2332 uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer); 2333 2334 KASSERT(mutex_owned(&sc->sc_lock)); 2335 2336 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2337 2338 uhci_abort_xfer(xfer, USBD_CANCELLED); 2339 } 2340 2341 /* 2342 * Cancel or timeout a device request. We have two cases to deal with 2343 * 2344 * 1) A driver wants to stop scheduled or inflight transfers 2345 * 2) A transfer has timed out 2346 * 2347 * It's impossible to guarantee that the requested transfer will not 2348 * have (partially) happened since the hardware runs concurrently. 2349 * 2350 * Transfer state is protected by the bus lock and we set the transfer status 2351 * as soon as either of the above happens (with bus lock held). 2352 * 2353 * To allow the hardware time to notice we simply wait. 2354 */ 2355 void 2356 uhci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2357 { 2358 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2359 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 2360 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 2361 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2362 uhci_soft_td_t *std; 2363 2364 KASSERTMSG((status == USBD_CANCELLED || status == USBD_TIMEOUT), 2365 "invalid status for abort: %d", (int)status); 2366 2367 DPRINTFN(1,"xfer=%#jx, status=%jd", (uintptr_t)xfer, status, 0, 0); 2368 2369 KASSERT(mutex_owned(&sc->sc_lock)); 2370 ASSERT_SLEEPABLE(); 2371 2372 if (status == USBD_CANCELLED) { 2373 /* 2374 * We are synchronously aborting. Try to stop the 2375 * callout and task, but if we can't, wait for them to 2376 * complete. 2377 */ 2378 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2379 usb_rem_task_wait(xfer->ux_pipe->up_dev, &xfer->ux_aborttask, 2380 USB_TASKQ_HC, &sc->sc_lock); 2381 } else { 2382 /* Otherwise, we are timing out. */ 2383 KASSERT(status == USBD_TIMEOUT); 2384 } 2385 2386 /* 2387 * The xfer cannot have been cancelled already. It is the 2388 * responsibility of the caller of usbd_abort_pipe not to try 2389 * to abort a pipe multiple times, whether concurrently or 2390 * sequentially. 2391 */ 2392 KASSERT(xfer->ux_status != USBD_CANCELLED); 2393 2394 /* Only the timeout, which runs only once, can time it out. */ 2395 KASSERT(xfer->ux_status != USBD_TIMEOUT); 2396 2397 /* If anyone else beat us, we're done. */ 2398 if (xfer->ux_status != USBD_IN_PROGRESS) 2399 return; 2400 2401 /* We beat everyone else. Claim the status. */ 2402 xfer->ux_status = status; 2403 2404 /* 2405 * If we're dying, skip the hardware action and just notify the 2406 * software that we're done. 2407 */ 2408 if (sc->sc_dying) { 2409 DPRINTFN(4, "xfer %#jx dying %ju", (uintptr_t)xfer, 2410 xfer->ux_status, 0, 0); 2411 goto dying; 2412 } 2413 2414 /* 2415 * HC Step 1: Make interrupt routine and hardware ignore xfer. 2416 */ 2417 uhci_del_intr_list(sc, ux); 2418 2419 DPRINTF("stop ux=%#jx", (uintptr_t)ux, 0, 0, 0); 2420 for (std = ux->ux_stdstart; std != NULL; std = std->link.std) { 2421 usb_syncmem(&std->dma, 2422 std->offs + offsetof(uhci_td_t, td_status), 2423 sizeof(std->td.td_status), 2424 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2425 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2426 usb_syncmem(&std->dma, 2427 std->offs + offsetof(uhci_td_t, td_status), 2428 sizeof(std->td.td_status), 2429 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2430 } 2431 2432 /* 2433 * HC Step 2: Wait until we know hardware has finished any possible 2434 * use of the xfer. 2435 */ 2436 /* Hardware finishes in 1ms */ 2437 usb_delay_ms_locked(upipe->pipe.up_dev->ud_bus, 2, &sc->sc_lock); 2438 2439 /* 2440 * HC Step 3: Notify completion to waiting xfers. 2441 */ 2442 dying: 2443 #ifdef DIAGNOSTIC 2444 ux->ux_isdone = true; 2445 #endif 2446 usb_transfer_complete(xfer); 2447 DPRINTFN(14, "end", 0, 0, 0, 0); 2448 2449 KASSERT(mutex_owned(&sc->sc_lock)); 2450 } 2451 2452 /* Close a device bulk pipe. */ 2453 void 2454 uhci_device_bulk_close(struct usbd_pipe *pipe) 2455 { 2456 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe); 2457 uhci_softc_t *sc = UHCI_PIPE2SC(pipe); 2458 2459 KASSERT(mutex_owned(&sc->sc_lock)); 2460 2461 uhci_free_sqh(sc, upipe->bulk.sqh); 2462 2463 pipe->up_endpoint->ue_toggle = upipe->nexttoggle; 2464 } 2465 2466 int 2467 uhci_device_ctrl_init(struct usbd_xfer *xfer) 2468 { 2469 struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer); 2470 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 2471 usb_device_request_t *req = &xfer->ux_request; 2472 struct usbd_device *dev = upipe->pipe.up_dev; 2473 uhci_softc_t *sc = dev->ud_bus->ub_hcpriv; 2474 uhci_soft_td_t *data = NULL; 2475 int len; 2476 usbd_status err; 2477 int isread; 2478 2479 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2480 DPRINTFN(3, "xfer=%#jx len=%jd, addr=%jd, endpt=%jd", 2481 (uintptr_t)xfer, xfer->ux_bufsize, dev->ud_addr, 2482 upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2483 2484 isread = req->bmRequestType & UT_READ; 2485 len = xfer->ux_bufsize; 2486 2487 uxfer->ux_type = UX_CTRL; 2488 /* Set up data transaction */ 2489 if (len != 0) { 2490 err = uhci_alloc_std_chain(sc, xfer, len, isread, &data); 2491 if (err) 2492 return err; 2493 } 2494 /* Set up interrupt info. */ 2495 uxfer->ux_setup = upipe->ctrl.setup; 2496 uxfer->ux_stat = upipe->ctrl.stat; 2497 uxfer->ux_data = data; 2498 2499 return 0; 2500 } 2501 2502 Static void 2503 uhci_device_ctrl_fini(struct usbd_xfer *xfer) 2504 { 2505 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2506 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 2507 2508 KASSERT(ux->ux_type == UX_CTRL); 2509 2510 if (ux->ux_nstd) { 2511 uhci_free_stds(sc, ux); 2512 kmem_free(ux->ux_stds, sizeof(uhci_soft_td_t *) * ux->ux_nstd); 2513 } 2514 } 2515 2516 usbd_status 2517 uhci_device_ctrl_transfer(struct usbd_xfer *xfer) 2518 { 2519 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2520 usbd_status err; 2521 2522 /* Insert last in queue. */ 2523 mutex_enter(&sc->sc_lock); 2524 err = usb_insert_transfer(xfer); 2525 mutex_exit(&sc->sc_lock); 2526 if (err) 2527 return err; 2528 2529 /* 2530 * Pipe isn't running (otherwise err would be USBD_INPROG), 2531 * so start it first. 2532 */ 2533 return uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2534 } 2535 2536 usbd_status 2537 uhci_device_ctrl_start(struct usbd_xfer *xfer) 2538 { 2539 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2540 struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer); 2541 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 2542 usb_device_request_t *req = &xfer->ux_request; 2543 struct usbd_device *dev = upipe->pipe.up_dev; 2544 int addr = dev->ud_addr; 2545 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2546 uhci_soft_td_t *setup, *stat, *next, *dataend; 2547 uhci_soft_qh_t *sqh; 2548 const bool polling = sc->sc_bus.ub_usepolling; 2549 int len; 2550 int isread; 2551 2552 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2553 2554 if (sc->sc_dying) 2555 return USBD_IOERROR; 2556 2557 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2558 2559 DPRINTFN(3, "type=0x%02jx, request=0x%02jx, " 2560 "wValue=0x%04jx, wIndex=0x%04jx", 2561 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2562 UGETW(req->wIndex)); 2563 DPRINTFN(3, "len=%jd, addr=%jd, endpt=%jd", 2564 UGETW(req->wLength), dev->ud_addr, endpt, 0); 2565 2566 isread = req->bmRequestType & UT_READ; 2567 len = UGETW(req->wLength); 2568 2569 setup = upipe->ctrl.setup; 2570 stat = upipe->ctrl.stat; 2571 sqh = upipe->ctrl.sqh; 2572 2573 memcpy(KERNADDR(&upipe->ctrl.reqdma, 0), req, sizeof(*req)); 2574 usb_syncmem(&upipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2575 2576 if (!polling) 2577 mutex_enter(&sc->sc_lock); 2578 2579 /* Set up data transaction */ 2580 if (len != 0) { 2581 upipe->nexttoggle = 1; 2582 next = uxfer->ux_data; 2583 uhci_reset_std_chain(sc, xfer, len, isread, 2584 &upipe->nexttoggle, &dataend); 2585 dataend->link.std = stat; 2586 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_TD); 2587 usb_syncmem(&dataend->dma, 2588 dataend->offs + offsetof(uhci_td_t, td_link), 2589 sizeof(dataend->td.td_link), 2590 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2591 } else { 2592 next = stat; 2593 } 2594 2595 const uint32_t status = UHCI_TD_ZERO_ACTLEN( 2596 UHCI_TD_SET_ERRCNT(3) | 2597 UHCI_TD_ACTIVE | 2598 (dev->ud_speed == USB_SPEED_LOW ? UHCI_TD_LS : 0) 2599 ); 2600 setup->link.std = next; 2601 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_TD); 2602 setup->td.td_status = htole32(status); 2603 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof(*req), endpt, addr)); 2604 setup->td.td_buffer = htole32(DMAADDR(&upipe->ctrl.reqdma, 0)); 2605 2606 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2607 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2608 2609 stat->link.std = NULL; 2610 stat->td.td_link = htole32(UHCI_PTR_T); 2611 stat->td.td_status = htole32(status | UHCI_TD_IOC); 2612 stat->td.td_token = 2613 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2614 UHCI_TD_IN (0, endpt, addr, 1)); 2615 stat->td.td_buffer = htole32(0); 2616 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2617 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2618 2619 #ifdef UHCI_DEBUG 2620 if (uhcidebug >= 10) { 2621 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2622 DPRINTF("before transfer", 0, 0, 0, 0); 2623 uhci_dump_tds(setup); 2624 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2625 } 2626 #endif 2627 2628 /* Set up interrupt info. */ 2629 uxfer->ux_setup = setup; 2630 uxfer->ux_stat = stat; 2631 KASSERT(uxfer->ux_isdone); 2632 #ifdef DIAGNOSTIC 2633 uxfer->ux_isdone = false; 2634 #endif 2635 2636 sqh->elink = setup; 2637 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2638 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2639 2640 if (dev->ud_speed == USB_SPEED_LOW) 2641 uhci_add_ls_ctrl(sc, sqh); 2642 else 2643 uhci_add_hs_ctrl(sc, sqh); 2644 uhci_add_intr_list(sc, uxfer); 2645 #ifdef UHCI_DEBUG 2646 if (uhcidebug >= 12) { 2647 uhci_soft_td_t *std; 2648 uhci_soft_qh_t *xqh; 2649 uhci_soft_qh_t *sxqh; 2650 int maxqh = 0; 2651 uhci_physaddr_t link; 2652 DPRINTFN(12, "--- dump start ---", 0, 0, 0, 0); 2653 DPRINTFN(12, "follow from [0]", 0, 0, 0, 0); 2654 for (std = sc->sc_vframes[0].htd, link = 0; 2655 (link & UHCI_PTR_QH) == 0; 2656 std = std->link.std) { 2657 link = le32toh(std->td.td_link); 2658 uhci_dump_td(std); 2659 } 2660 sxqh = (uhci_soft_qh_t *)std; 2661 uhci_dump_qh(sxqh); 2662 for (xqh = sxqh; 2663 xqh != NULL; 2664 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2665 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2666 uhci_dump_qh(xqh); 2667 } 2668 DPRINTFN(12, "Enqueued QH:", 0, 0, 0, 0); 2669 uhci_dump_qh(sqh); 2670 uhci_dump_tds(sqh->elink); 2671 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2672 } 2673 #endif 2674 if (xfer->ux_timeout && !polling) { 2675 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2676 uhci_timeout, xfer); 2677 } 2678 xfer->ux_status = USBD_IN_PROGRESS; 2679 if (!polling) 2680 mutex_exit(&sc->sc_lock); 2681 2682 return USBD_IN_PROGRESS; 2683 } 2684 2685 int 2686 uhci_device_intr_init(struct usbd_xfer *xfer) 2687 { 2688 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2689 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 2690 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 2691 int endpt = ed->bEndpointAddress; 2692 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2693 int len = xfer->ux_bufsize; 2694 int err; 2695 2696 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2697 2698 DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer, 2699 xfer->ux_length, xfer->ux_flags, 0); 2700 2701 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2702 KASSERT(len != 0); 2703 2704 ux->ux_type = UX_INTR; 2705 ux->ux_nstd = 0; 2706 err = uhci_alloc_std_chain(sc, xfer, len, isread, &ux->ux_stdstart); 2707 2708 return err; 2709 } 2710 2711 Static void 2712 uhci_device_intr_fini(struct usbd_xfer *xfer) 2713 { 2714 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2715 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 2716 2717 KASSERT(ux->ux_type == UX_INTR); 2718 2719 if (ux->ux_nstd) { 2720 uhci_free_stds(sc, ux); 2721 kmem_free(ux->ux_stds, sizeof(uhci_soft_td_t *) * ux->ux_nstd); 2722 } 2723 } 2724 2725 usbd_status 2726 uhci_device_intr_transfer(struct usbd_xfer *xfer) 2727 { 2728 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2729 usbd_status err; 2730 2731 /* Insert last in queue. */ 2732 mutex_enter(&sc->sc_lock); 2733 err = usb_insert_transfer(xfer); 2734 mutex_exit(&sc->sc_lock); 2735 if (err) 2736 return err; 2737 2738 /* 2739 * Pipe isn't running (otherwise err would be USBD_INPROG), 2740 * so start it first. 2741 */ 2742 return uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2743 } 2744 2745 usbd_status 2746 uhci_device_intr_start(struct usbd_xfer *xfer) 2747 { 2748 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 2749 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 2750 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2751 uhci_soft_td_t *data, *dataend; 2752 uhci_soft_qh_t *sqh; 2753 const bool polling = sc->sc_bus.ub_usepolling; 2754 int isread, endpt; 2755 int i; 2756 2757 if (sc->sc_dying) 2758 return USBD_IOERROR; 2759 2760 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2761 2762 DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer, 2763 xfer->ux_length, xfer->ux_flags, 0); 2764 2765 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2766 KASSERT(xfer->ux_length <= xfer->ux_bufsize); 2767 2768 endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 2769 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2770 2771 data = ux->ux_stdstart; 2772 2773 KASSERT(ux->ux_isdone); 2774 #ifdef DIAGNOSTIC 2775 ux->ux_isdone = false; 2776 #endif 2777 2778 /* Take lock to protect nexttoggle */ 2779 if (!polling) 2780 mutex_enter(&sc->sc_lock); 2781 uhci_reset_std_chain(sc, xfer, xfer->ux_length, isread, 2782 &upipe->nexttoggle, &dataend); 2783 2784 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2785 usb_syncmem(&dataend->dma, 2786 dataend->offs + offsetof(uhci_td_t, td_status), 2787 sizeof(dataend->td.td_status), 2788 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2789 ux->ux_stdend = dataend; 2790 2791 #ifdef UHCI_DEBUG 2792 if (uhcidebug >= 10) { 2793 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2794 uhci_dump_tds(data); 2795 uhci_dump_qh(upipe->intr.qhs[0]); 2796 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2797 } 2798 #endif 2799 2800 DPRINTFN(10, "qhs[0]=%#jx", (uintptr_t)upipe->intr.qhs[0], 0, 0, 0); 2801 for (i = 0; i < upipe->intr.npoll; i++) { 2802 sqh = upipe->intr.qhs[i]; 2803 sqh->elink = data; 2804 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2805 usb_syncmem(&sqh->dma, 2806 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2807 sizeof(sqh->qh.qh_elink), 2808 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2809 } 2810 uhci_add_intr_list(sc, ux); 2811 xfer->ux_status = USBD_IN_PROGRESS; 2812 if (!polling) 2813 mutex_exit(&sc->sc_lock); 2814 2815 #ifdef UHCI_DEBUG 2816 if (uhcidebug >= 10) { 2817 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2818 uhci_dump_tds(data); 2819 uhci_dump_qh(upipe->intr.qhs[0]); 2820 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2821 } 2822 #endif 2823 2824 return USBD_IN_PROGRESS; 2825 } 2826 2827 /* Abort a device control request. */ 2828 void 2829 uhci_device_ctrl_abort(struct usbd_xfer *xfer) 2830 { 2831 uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer); 2832 2833 KASSERT(mutex_owned(&sc->sc_lock)); 2834 2835 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2836 uhci_abort_xfer(xfer, USBD_CANCELLED); 2837 } 2838 2839 /* Close a device control pipe. */ 2840 void 2841 uhci_device_ctrl_close(struct usbd_pipe *pipe) 2842 { 2843 uhci_softc_t *sc = UHCI_PIPE2SC(pipe); 2844 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe); 2845 2846 uhci_free_sqh(sc, upipe->ctrl.sqh); 2847 uhci_free_std_locked(sc, upipe->ctrl.setup); 2848 uhci_free_std_locked(sc, upipe->ctrl.stat); 2849 2850 } 2851 2852 /* Abort a device interrupt request. */ 2853 void 2854 uhci_device_intr_abort(struct usbd_xfer *xfer) 2855 { 2856 uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer); 2857 2858 KASSERT(mutex_owned(&sc->sc_lock)); 2859 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2860 2861 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2862 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 2863 2864 uhci_abort_xfer(xfer, USBD_CANCELLED); 2865 } 2866 2867 /* Close a device interrupt pipe. */ 2868 void 2869 uhci_device_intr_close(struct usbd_pipe *pipe) 2870 { 2871 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe); 2872 uhci_softc_t *sc = UHCI_PIPE2SC(pipe); 2873 int i, npoll; 2874 2875 KASSERT(mutex_owned(&sc->sc_lock)); 2876 2877 /* Unlink descriptors from controller data structures. */ 2878 npoll = upipe->intr.npoll; 2879 for (i = 0; i < npoll; i++) 2880 uhci_remove_intr(sc, upipe->intr.qhs[i]); 2881 2882 /* 2883 * We now have to wait for any activity on the physical 2884 * descriptors to stop. 2885 */ 2886 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 2887 2888 for (i = 0; i < npoll; i++) 2889 uhci_free_sqh(sc, upipe->intr.qhs[i]); 2890 kmem_free(upipe->intr.qhs, npoll * sizeof(uhci_soft_qh_t *)); 2891 } 2892 2893 int 2894 uhci_device_isoc_init(struct usbd_xfer *xfer) 2895 { 2896 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 2897 2898 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2899 KASSERT(xfer->ux_nframes != 0); 2900 KASSERT(ux->ux_isdone); 2901 2902 ux->ux_type = UX_ISOC; 2903 return 0; 2904 } 2905 2906 Static void 2907 uhci_device_isoc_fini(struct usbd_xfer *xfer) 2908 { 2909 struct uhci_xfer *ux __diagused = UHCI_XFER2UXFER(xfer); 2910 2911 KASSERT(ux->ux_type == UX_ISOC); 2912 } 2913 2914 usbd_status 2915 uhci_device_isoc_transfer(struct usbd_xfer *xfer) 2916 { 2917 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 2918 usbd_status err __diagused; 2919 2920 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 2921 DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 2922 2923 /* Put it on our queue, */ 2924 mutex_enter(&sc->sc_lock); 2925 err = usb_insert_transfer(xfer); 2926 mutex_exit(&sc->sc_lock); 2927 2928 KASSERT(err == USBD_NORMAL_COMPLETION); 2929 2930 /* insert into schedule, */ 2931 2932 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 2933 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 2934 struct isoc *isoc = &upipe->isoc; 2935 uhci_soft_td_t *std = NULL; 2936 uint32_t buf, len, status, offs; 2937 int i, next, nframes; 2938 int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 2939 2940 DPRINTFN(5, "used=%jd next=%jd xfer=%#jx nframes=%jd", 2941 isoc->inuse, isoc->next, (uintptr_t)xfer, xfer->ux_nframes); 2942 2943 if (sc->sc_dying) 2944 return USBD_IOERROR; 2945 2946 if (xfer->ux_status == USBD_IN_PROGRESS) { 2947 /* This request has already been entered into the frame list */ 2948 printf("%s: xfer=%p in frame list\n", __func__, xfer); 2949 /* XXX */ 2950 } 2951 2952 #ifdef DIAGNOSTIC 2953 if (isoc->inuse >= UHCI_VFRAMELIST_COUNT) 2954 printf("%s: overflow!\n", __func__); 2955 #endif 2956 2957 KASSERT(xfer->ux_nframes != 0); 2958 2959 mutex_enter(&sc->sc_lock); 2960 next = isoc->next; 2961 if (next == -1) { 2962 /* Not in use yet, schedule it a few frames ahead. */ 2963 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2964 DPRINTFN(2, "start next=%jd", next, 0, 0, 0); 2965 } 2966 2967 xfer->ux_status = USBD_IN_PROGRESS; 2968 ux->ux_curframe = next; 2969 2970 buf = DMAADDR(&xfer->ux_dmabuf, 0); 2971 offs = 0; 2972 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2973 UHCI_TD_ACTIVE | 2974 UHCI_TD_IOS); 2975 nframes = xfer->ux_nframes; 2976 for (i = 0; i < nframes; i++) { 2977 std = isoc->stds[next]; 2978 if (++next >= UHCI_VFRAMELIST_COUNT) 2979 next = 0; 2980 len = xfer->ux_frlengths[i]; 2981 std->td.td_buffer = htole32(buf); 2982 usb_syncmem(&xfer->ux_dmabuf, offs, len, 2983 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2984 if (i == nframes - 1) 2985 status |= UHCI_TD_IOC; 2986 std->td.td_status = htole32(status); 2987 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2988 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2989 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2990 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2991 #ifdef UHCI_DEBUG 2992 if (uhcidebug >= 5) { 2993 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2994 DPRINTF("TD %jd", i, 0, 0, 0); 2995 uhci_dump_td(std); 2996 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2997 } 2998 #endif 2999 buf += len; 3000 offs += len; 3001 } 3002 isoc->next = next; 3003 isoc->inuse += xfer->ux_nframes; 3004 3005 /* Set up interrupt info. */ 3006 ux->ux_stdstart = std; 3007 ux->ux_stdend = std; 3008 3009 KASSERT(ux->ux_isdone); 3010 #ifdef DIAGNOSTIC 3011 ux->ux_isdone = false; 3012 #endif 3013 uhci_add_intr_list(sc, ux); 3014 3015 mutex_exit(&sc->sc_lock); 3016 3017 return USBD_IN_PROGRESS; 3018 } 3019 3020 void 3021 uhci_device_isoc_abort(struct usbd_xfer *xfer) 3022 { 3023 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 3024 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 3025 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 3026 uhci_soft_td_t **stds = upipe->isoc.stds; 3027 uhci_soft_td_t *std; 3028 int i, n, nframes, maxlen, len; 3029 3030 KASSERT(mutex_owned(&sc->sc_lock)); 3031 3032 /* Transfer is already done. */ 3033 if (xfer->ux_status != USBD_NOT_STARTED && 3034 xfer->ux_status != USBD_IN_PROGRESS) { 3035 return; 3036 } 3037 3038 /* Give xfer the requested abort code. */ 3039 xfer->ux_status = USBD_CANCELLED; 3040 3041 /* make hardware ignore it, */ 3042 nframes = xfer->ux_nframes; 3043 n = ux->ux_curframe; 3044 maxlen = 0; 3045 for (i = 0; i < nframes; i++) { 3046 std = stds[n]; 3047 usb_syncmem(&std->dma, 3048 std->offs + offsetof(uhci_td_t, td_status), 3049 sizeof(std->td.td_status), 3050 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3051 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 3052 usb_syncmem(&std->dma, 3053 std->offs + offsetof(uhci_td_t, td_status), 3054 sizeof(std->td.td_status), 3055 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3056 usb_syncmem(&std->dma, 3057 std->offs + offsetof(uhci_td_t, td_token), 3058 sizeof(std->td.td_token), 3059 BUS_DMASYNC_POSTWRITE); 3060 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 3061 if (len > maxlen) 3062 maxlen = len; 3063 if (++n >= UHCI_VFRAMELIST_COUNT) 3064 n = 0; 3065 } 3066 3067 /* and wait until we are sure the hardware has finished. */ 3068 delay(maxlen); 3069 3070 #ifdef DIAGNOSTIC 3071 ux->ux_isdone = true; 3072 #endif 3073 /* Remove from interrupt list. */ 3074 uhci_del_intr_list(sc, ux); 3075 3076 /* Run callback. */ 3077 usb_transfer_complete(xfer); 3078 3079 KASSERT(mutex_owned(&sc->sc_lock)); 3080 } 3081 3082 void 3083 uhci_device_isoc_close(struct usbd_pipe *pipe) 3084 { 3085 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe); 3086 uhci_softc_t *sc = UHCI_PIPE2SC(pipe); 3087 uhci_soft_td_t *std, *vstd; 3088 struct isoc *isoc; 3089 int i; 3090 3091 KASSERT(mutex_owned(&sc->sc_lock)); 3092 3093 /* 3094 * Make sure all TDs are marked as inactive. 3095 * Wait for completion. 3096 * Unschedule. 3097 * Deallocate. 3098 */ 3099 isoc = &upipe->isoc; 3100 3101 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3102 std = isoc->stds[i]; 3103 usb_syncmem(&std->dma, 3104 std->offs + offsetof(uhci_td_t, td_status), 3105 sizeof(std->td.td_status), 3106 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3107 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 3108 usb_syncmem(&std->dma, 3109 std->offs + offsetof(uhci_td_t, td_status), 3110 sizeof(std->td.td_status), 3111 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3112 } 3113 /* wait for completion */ 3114 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3115 3116 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3117 std = isoc->stds[i]; 3118 for (vstd = sc->sc_vframes[i].htd; 3119 vstd != NULL && vstd->link.std != std; 3120 vstd = vstd->link.std) 3121 ; 3122 if (vstd == NULL) { 3123 /*panic*/ 3124 printf("%s: %p not found\n", __func__, std); 3125 mutex_exit(&sc->sc_lock); 3126 return; 3127 } 3128 vstd->link = std->link; 3129 usb_syncmem(&std->dma, 3130 std->offs + offsetof(uhci_td_t, td_link), 3131 sizeof(std->td.td_link), 3132 BUS_DMASYNC_POSTWRITE); 3133 vstd->td.td_link = std->td.td_link; 3134 usb_syncmem(&vstd->dma, 3135 vstd->offs + offsetof(uhci_td_t, td_link), 3136 sizeof(vstd->td.td_link), 3137 BUS_DMASYNC_PREWRITE); 3138 uhci_free_std_locked(sc, std); 3139 } 3140 3141 kmem_free(isoc->stds, UHCI_VFRAMELIST_COUNT * sizeof(uhci_soft_td_t *)); 3142 } 3143 3144 usbd_status 3145 uhci_setup_isoc(struct usbd_pipe *pipe) 3146 { 3147 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe); 3148 uhci_softc_t *sc = UHCI_PIPE2SC(pipe); 3149 int addr = upipe->pipe.up_dev->ud_addr; 3150 int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 3151 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 3152 uhci_soft_td_t *std, *vstd; 3153 uint32_t token; 3154 struct isoc *isoc; 3155 int i; 3156 3157 isoc = &upipe->isoc; 3158 3159 isoc->stds = kmem_alloc( 3160 UHCI_VFRAMELIST_COUNT * sizeof(uhci_soft_td_t *), KM_SLEEP); 3161 if (isoc->stds == NULL) 3162 return USBD_NOMEM; 3163 3164 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 3165 UHCI_TD_OUT(0, endpt, addr, 0); 3166 3167 /* Allocate the TDs and mark as inactive; */ 3168 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3169 std = uhci_alloc_std(sc); 3170 if (std == 0) 3171 goto bad; 3172 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 3173 std->td.td_token = htole32(token); 3174 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 3175 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3176 isoc->stds[i] = std; 3177 } 3178 3179 mutex_enter(&sc->sc_lock); 3180 3181 /* Insert TDs into schedule. */ 3182 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 3183 std = isoc->stds[i]; 3184 vstd = sc->sc_vframes[i].htd; 3185 usb_syncmem(&vstd->dma, 3186 vstd->offs + offsetof(uhci_td_t, td_link), 3187 sizeof(vstd->td.td_link), 3188 BUS_DMASYNC_POSTWRITE); 3189 std->link = vstd->link; 3190 std->td.td_link = vstd->td.td_link; 3191 usb_syncmem(&std->dma, 3192 std->offs + offsetof(uhci_td_t, td_link), 3193 sizeof(std->td.td_link), 3194 BUS_DMASYNC_PREWRITE); 3195 vstd->link.std = std; 3196 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 3197 usb_syncmem(&vstd->dma, 3198 vstd->offs + offsetof(uhci_td_t, td_link), 3199 sizeof(vstd->td.td_link), 3200 BUS_DMASYNC_PREWRITE); 3201 } 3202 mutex_exit(&sc->sc_lock); 3203 3204 isoc->next = -1; 3205 isoc->inuse = 0; 3206 3207 return USBD_NORMAL_COMPLETION; 3208 3209 bad: 3210 while (--i >= 0) 3211 uhci_free_std(sc, isoc->stds[i]); 3212 kmem_free(isoc->stds, UHCI_VFRAMELIST_COUNT * sizeof(uhci_soft_td_t *)); 3213 return USBD_NOMEM; 3214 } 3215 3216 void 3217 uhci_device_isoc_done(struct usbd_xfer *xfer) 3218 { 3219 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 3220 struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer); 3221 int i, offs; 3222 int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN; 3223 3224 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3225 DPRINTFN(4, "length=%jd, ux_state=0x%08jx", 3226 xfer->ux_actlen, xfer->ux_state, 0, 0); 3227 3228 #ifdef DIAGNOSTIC 3229 if (ux->ux_stdend == NULL) { 3230 printf("%s: xfer=%p stdend==NULL\n", __func__, xfer); 3231 #ifdef UHCI_DEBUG 3232 DPRINTF("--- dump start ---", 0, 0, 0, 0); 3233 uhci_dump_ii(ux); 3234 DPRINTF("--- dump end ---", 0, 0, 0, 0); 3235 #endif 3236 return; 3237 } 3238 #endif 3239 3240 /* Turn off the interrupt since it is active even if the TD is not. */ 3241 usb_syncmem(&ux->ux_stdend->dma, 3242 ux->ux_stdend->offs + offsetof(uhci_td_t, td_status), 3243 sizeof(ux->ux_stdend->td.td_status), 3244 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3245 ux->ux_stdend->td.td_status &= htole32(~UHCI_TD_IOC); 3246 usb_syncmem(&ux->ux_stdend->dma, 3247 ux->ux_stdend->offs + offsetof(uhci_td_t, td_status), 3248 sizeof(ux->ux_stdend->td.td_status), 3249 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3250 3251 offs = 0; 3252 for (i = 0; i < xfer->ux_nframes; i++) { 3253 usb_syncmem(&xfer->ux_dmabuf, offs, xfer->ux_frlengths[i], 3254 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3255 offs += xfer->ux_frlengths[i]; 3256 } 3257 } 3258 3259 void 3260 uhci_device_intr_done(struct usbd_xfer *xfer) 3261 { 3262 uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer); 3263 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 3264 uhci_soft_qh_t *sqh; 3265 int i, npoll; 3266 3267 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3268 DPRINTFN(5, "length=%jd", xfer->ux_actlen, 0, 0, 0); 3269 3270 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 3271 3272 npoll = upipe->intr.npoll; 3273 for (i = 0; i < npoll; i++) { 3274 sqh = upipe->intr.qhs[i]; 3275 sqh->elink = NULL; 3276 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3277 usb_syncmem(&sqh->dma, 3278 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3279 sizeof(sqh->qh.qh_elink), 3280 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3281 } 3282 const int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress; 3283 const bool isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3284 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 3285 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3286 } 3287 3288 /* Deallocate request data structures */ 3289 void 3290 uhci_device_ctrl_done(struct usbd_xfer *xfer) 3291 { 3292 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 3293 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 3294 int len = UGETW(xfer->ux_request.wLength); 3295 int isread = (xfer->ux_request.bmRequestType & UT_READ); 3296 3297 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 3298 3299 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3300 3301 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 3302 3303 /* XXXNH move to uhci_idone??? */ 3304 if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW) 3305 uhci_remove_ls_ctrl(sc, upipe->ctrl.sqh); 3306 else 3307 uhci_remove_hs_ctrl(sc, upipe->ctrl.sqh); 3308 3309 if (len) { 3310 usb_syncmem(&xfer->ux_dmabuf, 0, len, 3311 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3312 } 3313 usb_syncmem(&upipe->ctrl.reqdma, 0, 3314 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3315 3316 DPRINTF("length=%jd", xfer->ux_actlen, 0, 0, 0); 3317 } 3318 3319 /* Deallocate request data structures */ 3320 void 3321 uhci_device_bulk_done(struct usbd_xfer *xfer) 3322 { 3323 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 3324 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe); 3325 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 3326 int endpt = ed->bEndpointAddress; 3327 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3328 3329 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3330 DPRINTFN(5, "xfer=%#jx sc=%#jx upipe=%#jx", (uintptr_t)xfer, 3331 (uintptr_t)sc, (uintptr_t)upipe, 0); 3332 3333 KASSERT(mutex_owned(&sc->sc_lock)); 3334 3335 uhci_remove_bulk(sc, upipe->bulk.sqh); 3336 3337 if (xfer->ux_length) { 3338 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 3339 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3340 } 3341 3342 DPRINTFN(5, "length=%jd", xfer->ux_actlen, 0, 0, 0); 3343 } 3344 3345 /* Add interrupt QH, called with vflock. */ 3346 void 3347 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3348 { 3349 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3350 uhci_soft_qh_t *eqh; 3351 3352 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3353 DPRINTFN(4, "n=%jd sqh=%#jx", sqh->pos, (uintptr_t)sqh, 0, 0); 3354 3355 eqh = vf->eqh; 3356 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3357 sizeof(eqh->qh.qh_hlink), 3358 BUS_DMASYNC_POSTWRITE); 3359 sqh->hlink = eqh->hlink; 3360 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3361 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3362 sizeof(sqh->qh.qh_hlink), 3363 BUS_DMASYNC_PREWRITE); 3364 eqh->hlink = sqh; 3365 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3366 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3367 sizeof(eqh->qh.qh_hlink), 3368 BUS_DMASYNC_PREWRITE); 3369 vf->eqh = sqh; 3370 vf->bandwidth++; 3371 } 3372 3373 /* Remove interrupt QH. */ 3374 void 3375 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3376 { 3377 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3378 uhci_soft_qh_t *pqh; 3379 3380 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3381 DPRINTFN(4, "n=%jd sqh=%#jx", sqh->pos, (uintptr_t)sqh, 0, 0); 3382 3383 /* See comment in uhci_remove_ctrl() */ 3384 3385 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3386 sizeof(sqh->qh.qh_elink), 3387 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3388 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3389 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3390 usb_syncmem(&sqh->dma, 3391 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3392 sizeof(sqh->qh.qh_elink), 3393 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3394 delay(UHCI_QH_REMOVE_DELAY); 3395 } 3396 3397 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3398 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3399 sizeof(sqh->qh.qh_hlink), 3400 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3401 pqh->hlink = sqh->hlink; 3402 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3403 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3404 sizeof(pqh->qh.qh_hlink), 3405 BUS_DMASYNC_PREWRITE); 3406 delay(UHCI_QH_REMOVE_DELAY); 3407 if (vf->eqh == sqh) 3408 vf->eqh = pqh; 3409 vf->bandwidth--; 3410 } 3411 3412 usbd_status 3413 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3414 { 3415 uhci_soft_qh_t *sqh; 3416 int i, npoll; 3417 u_int bestbw, bw, bestoffs, offs; 3418 3419 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3420 DPRINTFN(2, "pipe=%#jx", (uintptr_t)upipe, 0, 0, 0); 3421 if (ival == 0) { 3422 printf("%s: 0 interval\n", __func__); 3423 return USBD_INVAL; 3424 } 3425 3426 if (ival > UHCI_VFRAMELIST_COUNT) 3427 ival = UHCI_VFRAMELIST_COUNT; 3428 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3429 DPRINTF("ival=%jd npoll=%jd", ival, npoll, 0, 0); 3430 3431 upipe->intr.npoll = npoll; 3432 upipe->intr.qhs = 3433 kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP); 3434 3435 /* 3436 * Figure out which offset in the schedule that has most 3437 * bandwidth left over. 3438 */ 3439 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3440 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3441 for (bw = i = 0; i < npoll; i++) 3442 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3443 if (bw < bestbw) { 3444 bestbw = bw; 3445 bestoffs = offs; 3446 } 3447 } 3448 DPRINTF("bw=%jd offs=%jd", bestbw, bestoffs, 0, 0); 3449 for (i = 0; i < npoll; i++) { 3450 upipe->intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3451 sqh->elink = NULL; 3452 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3453 usb_syncmem(&sqh->dma, 3454 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3455 sizeof(sqh->qh.qh_elink), 3456 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3457 sqh->pos = MOD(i * ival + bestoffs); 3458 } 3459 #undef MOD 3460 3461 mutex_enter(&sc->sc_lock); 3462 /* Enter QHs into the controller data structures. */ 3463 for (i = 0; i < npoll; i++) 3464 uhci_add_intr(sc, upipe->intr.qhs[i]); 3465 mutex_exit(&sc->sc_lock); 3466 3467 DPRINTFN(5, "returns %#jx", (uintptr_t)upipe, 0, 0, 0); 3468 3469 return USBD_NORMAL_COMPLETION; 3470 } 3471 3472 /* Open a new pipe. */ 3473 usbd_status 3474 uhci_open(struct usbd_pipe *pipe) 3475 { 3476 uhci_softc_t *sc = UHCI_PIPE2SC(pipe); 3477 struct usbd_bus *bus = pipe->up_dev->ud_bus; 3478 struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe); 3479 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 3480 usbd_status err = USBD_NOMEM; 3481 int ival; 3482 3483 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3484 DPRINTF("pipe=%#jx, addr=%jd, endpt=%jd (%jd)", 3485 (uintptr_t)pipe, pipe->up_dev->ud_addr, ed->bEndpointAddress, 3486 bus->ub_rhaddr); 3487 3488 if (sc->sc_dying) 3489 return USBD_IOERROR; 3490 3491 upipe->aborting = 0; 3492 /* toggle state needed for bulk endpoints */ 3493 upipe->nexttoggle = pipe->up_endpoint->ue_toggle; 3494 3495 if (pipe->up_dev->ud_addr == bus->ub_rhaddr) { 3496 switch (ed->bEndpointAddress) { 3497 case USB_CONTROL_ENDPOINT: 3498 pipe->up_methods = &roothub_ctrl_methods; 3499 break; 3500 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 3501 pipe->up_methods = &uhci_root_intr_methods; 3502 break; 3503 default: 3504 return USBD_INVAL; 3505 } 3506 } else { 3507 switch (ed->bmAttributes & UE_XFERTYPE) { 3508 case UE_CONTROL: 3509 pipe->up_methods = &uhci_device_ctrl_methods; 3510 upipe->ctrl.sqh = uhci_alloc_sqh(sc); 3511 if (upipe->ctrl.sqh == NULL) 3512 goto bad; 3513 upipe->ctrl.setup = uhci_alloc_std(sc); 3514 if (upipe->ctrl.setup == NULL) { 3515 uhci_free_sqh(sc, upipe->ctrl.sqh); 3516 goto bad; 3517 } 3518 upipe->ctrl.stat = uhci_alloc_std(sc); 3519 if (upipe->ctrl.stat == NULL) { 3520 uhci_free_sqh(sc, upipe->ctrl.sqh); 3521 uhci_free_std(sc, upipe->ctrl.setup); 3522 goto bad; 3523 } 3524 err = usb_allocmem(&sc->sc_bus, 3525 sizeof(usb_device_request_t), 3526 0, &upipe->ctrl.reqdma); 3527 if (err) { 3528 uhci_free_sqh(sc, upipe->ctrl.sqh); 3529 uhci_free_std(sc, upipe->ctrl.setup); 3530 uhci_free_std(sc, upipe->ctrl.stat); 3531 goto bad; 3532 } 3533 break; 3534 case UE_INTERRUPT: 3535 pipe->up_methods = &uhci_device_intr_methods; 3536 ival = pipe->up_interval; 3537 if (ival == USBD_DEFAULT_INTERVAL) 3538 ival = ed->bInterval; 3539 return uhci_device_setintr(sc, upipe, ival); 3540 case UE_ISOCHRONOUS: 3541 pipe->up_serialise = false; 3542 pipe->up_methods = &uhci_device_isoc_methods; 3543 return uhci_setup_isoc(pipe); 3544 case UE_BULK: 3545 pipe->up_methods = &uhci_device_bulk_methods; 3546 upipe->bulk.sqh = uhci_alloc_sqh(sc); 3547 if (upipe->bulk.sqh == NULL) 3548 goto bad; 3549 break; 3550 } 3551 } 3552 return USBD_NORMAL_COMPLETION; 3553 3554 bad: 3555 return USBD_NOMEM; 3556 } 3557 3558 /* 3559 * Data structures and routines to emulate the root hub. 3560 */ 3561 /* 3562 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3563 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3564 * should not be used by the USB subsystem. As we cannot issue a 3565 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3566 * will be enabled as part of the reset. 3567 * 3568 * On the VT83C572, the port cannot be successfully enabled until the 3569 * outstanding "port enable change" and "connection status change" 3570 * events have been reset. 3571 */ 3572 Static usbd_status 3573 uhci_portreset(uhci_softc_t *sc, int index) 3574 { 3575 int lim, port, x; 3576 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3577 3578 if (index == 1) 3579 port = UHCI_PORTSC1; 3580 else if (index == 2) 3581 port = UHCI_PORTSC2; 3582 else 3583 return USBD_IOERROR; 3584 3585 x = URWMASK(UREAD2(sc, port)); 3586 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3587 3588 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3589 3590 DPRINTF("uhci port %jd reset, status0 = 0x%04jx", index, 3591 UREAD2(sc, port), 0, 0); 3592 3593 x = URWMASK(UREAD2(sc, port)); 3594 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3595 3596 delay(100); 3597 3598 DPRINTF("uhci port %jd reset, status1 = 0x%04jx", index, 3599 UREAD2(sc, port), 0, 0); 3600 3601 x = URWMASK(UREAD2(sc, port)); 3602 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3603 3604 for (lim = 10; --lim > 0;) { 3605 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3606 3607 x = UREAD2(sc, port); 3608 DPRINTF("uhci port %jd iteration %ju, status = 0x%04jx", index, 3609 lim, x, 0); 3610 3611 if (!(x & UHCI_PORTSC_CCS)) { 3612 /* 3613 * No device is connected (or was disconnected 3614 * during reset). Consider the port reset. 3615 * The delay must be long enough to ensure on 3616 * the initial iteration that the device 3617 * connection will have been registered. 50ms 3618 * appears to be sufficient, but 20ms is not. 3619 */ 3620 DPRINTFN(3, "uhci port %jd loop %ju, device detached", 3621 index, lim, 0, 0); 3622 break; 3623 } 3624 3625 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3626 /* 3627 * Port enabled changed and/or connection 3628 * status changed were set. Reset either or 3629 * both raised flags (by writing a 1 to that 3630 * bit), and wait again for state to settle. 3631 */ 3632 UWRITE2(sc, port, URWMASK(x) | 3633 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3634 continue; 3635 } 3636 3637 if (x & UHCI_PORTSC_PE) 3638 /* Port is enabled */ 3639 break; 3640 3641 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3642 } 3643 3644 DPRINTFN(3, "uhci port %jd reset, status2 = 0x%04jx", index, 3645 UREAD2(sc, port), 0, 0); 3646 3647 if (lim <= 0) { 3648 DPRINTF("uhci port %jd reset timed out", index, 3649 0, 0, 0); 3650 return USBD_TIMEOUT; 3651 } 3652 3653 sc->sc_isreset = 1; 3654 return USBD_NORMAL_COMPLETION; 3655 } 3656 3657 Static int 3658 uhci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 3659 void *buf, int buflen) 3660 { 3661 uhci_softc_t *sc = UHCI_BUS2SC(bus); 3662 int port, x; 3663 int status, change, totlen = 0; 3664 uint16_t len, value, index; 3665 usb_port_status_t ps; 3666 usbd_status err; 3667 3668 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3669 3670 if (sc->sc_dying) 3671 return -1; 3672 3673 DPRINTF("type=0x%02jx request=%02jx", req->bmRequestType, 3674 req->bRequest, 0, 0); 3675 3676 len = UGETW(req->wLength); 3677 value = UGETW(req->wValue); 3678 index = UGETW(req->wIndex); 3679 3680 #define C(x,y) ((x) | ((y) << 8)) 3681 switch (C(req->bRequest, req->bmRequestType)) { 3682 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3683 DPRINTF("wValue=0x%04jx", value, 0, 0, 0); 3684 if (len == 0) 3685 break; 3686 switch (value) { 3687 #define sd ((usb_string_descriptor_t *)buf) 3688 case C(2, UDESC_STRING): 3689 /* Product */ 3690 totlen = usb_makestrdesc(sd, len, "UHCI root hub"); 3691 break; 3692 #undef sd 3693 default: 3694 /* default from usbroothub */ 3695 return buflen; 3696 } 3697 break; 3698 3699 /* Hub requests */ 3700 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3701 break; 3702 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3703 DPRINTF("UR_CLEAR_PORT_FEATURE port=%jd feature=%jd", index, 3704 value, 0, 0); 3705 if (index == 1) 3706 port = UHCI_PORTSC1; 3707 else if (index == 2) 3708 port = UHCI_PORTSC2; 3709 else { 3710 return -1; 3711 } 3712 switch(value) { 3713 case UHF_PORT_ENABLE: 3714 x = URWMASK(UREAD2(sc, port)); 3715 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3716 break; 3717 case UHF_PORT_SUSPEND: 3718 x = URWMASK(UREAD2(sc, port)); 3719 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3720 break; 3721 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3722 /* see USB2 spec ch. 7.1.7.7 */ 3723 usb_delay_ms(&sc->sc_bus, 20); 3724 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3725 /* 10ms resume delay must be provided by caller */ 3726 break; 3727 case UHF_PORT_RESET: 3728 x = URWMASK(UREAD2(sc, port)); 3729 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3730 break; 3731 case UHF_C_PORT_CONNECTION: 3732 x = URWMASK(UREAD2(sc, port)); 3733 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3734 break; 3735 case UHF_C_PORT_ENABLE: 3736 x = URWMASK(UREAD2(sc, port)); 3737 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3738 break; 3739 case UHF_C_PORT_OVER_CURRENT: 3740 x = URWMASK(UREAD2(sc, port)); 3741 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3742 break; 3743 case UHF_C_PORT_RESET: 3744 sc->sc_isreset = 0; 3745 break; 3746 case UHF_PORT_CONNECTION: 3747 case UHF_PORT_OVER_CURRENT: 3748 case UHF_PORT_POWER: 3749 case UHF_PORT_LOW_SPEED: 3750 case UHF_C_PORT_SUSPEND: 3751 default: 3752 return -1; 3753 } 3754 break; 3755 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3756 if (index == 1) 3757 port = UHCI_PORTSC1; 3758 else if (index == 2) 3759 port = UHCI_PORTSC2; 3760 else { 3761 return -1; 3762 } 3763 if (len > 0) { 3764 *(uint8_t *)buf = 3765 UHCI_PORTSC_GET_LS(UREAD2(sc, port)); 3766 totlen = 1; 3767 } 3768 break; 3769 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3770 if (len == 0) 3771 break; 3772 if ((value & 0xff) != 0) { 3773 return -1; 3774 } 3775 usb_hub_descriptor_t hubd; 3776 3777 totlen = uimin(buflen, sizeof(hubd)); 3778 memcpy(&hubd, buf, totlen); 3779 hubd.bNbrPorts = 2; 3780 memcpy(buf, &hubd, totlen); 3781 break; 3782 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3783 if (len != 4) { 3784 return -1; 3785 } 3786 memset(buf, 0, len); 3787 totlen = len; 3788 break; 3789 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3790 if (index == 1) 3791 port = UHCI_PORTSC1; 3792 else if (index == 2) 3793 port = UHCI_PORTSC2; 3794 else { 3795 return -1; 3796 } 3797 if (len != 4) { 3798 return -1; 3799 } 3800 x = UREAD2(sc, port); 3801 status = change = 0; 3802 if (x & UHCI_PORTSC_CCS) 3803 status |= UPS_CURRENT_CONNECT_STATUS; 3804 if (x & UHCI_PORTSC_CSC) 3805 change |= UPS_C_CONNECT_STATUS; 3806 if (x & UHCI_PORTSC_PE) 3807 status |= UPS_PORT_ENABLED; 3808 if (x & UHCI_PORTSC_POEDC) 3809 change |= UPS_C_PORT_ENABLED; 3810 if (x & UHCI_PORTSC_OCI) 3811 status |= UPS_OVERCURRENT_INDICATOR; 3812 if (x & UHCI_PORTSC_OCIC) 3813 change |= UPS_C_OVERCURRENT_INDICATOR; 3814 if (x & UHCI_PORTSC_SUSP) 3815 status |= UPS_SUSPEND; 3816 if (x & UHCI_PORTSC_LSDA) 3817 status |= UPS_LOW_SPEED; 3818 status |= UPS_PORT_POWER; 3819 if (sc->sc_isreset) 3820 change |= UPS_C_PORT_RESET; 3821 USETW(ps.wPortStatus, status); 3822 USETW(ps.wPortChange, change); 3823 totlen = uimin(len, sizeof(ps)); 3824 memcpy(buf, &ps, totlen); 3825 break; 3826 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3827 return -1; 3828 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3829 break; 3830 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3831 if (index == 1) 3832 port = UHCI_PORTSC1; 3833 else if (index == 2) 3834 port = UHCI_PORTSC2; 3835 else { 3836 return -1; 3837 } 3838 switch(value) { 3839 case UHF_PORT_ENABLE: 3840 x = URWMASK(UREAD2(sc, port)); 3841 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3842 break; 3843 case UHF_PORT_SUSPEND: 3844 x = URWMASK(UREAD2(sc, port)); 3845 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3846 break; 3847 case UHF_PORT_RESET: 3848 err = uhci_portreset(sc, index); 3849 if (err != USBD_NORMAL_COMPLETION) 3850 return -1; 3851 return 0; 3852 case UHF_PORT_POWER: 3853 /* Pretend we turned on power */ 3854 return 0; 3855 case UHF_C_PORT_CONNECTION: 3856 case UHF_C_PORT_ENABLE: 3857 case UHF_C_PORT_OVER_CURRENT: 3858 case UHF_PORT_CONNECTION: 3859 case UHF_PORT_OVER_CURRENT: 3860 case UHF_PORT_LOW_SPEED: 3861 case UHF_C_PORT_SUSPEND: 3862 case UHF_C_PORT_RESET: 3863 default: 3864 return -1; 3865 } 3866 break; 3867 default: 3868 /* default from usbroothub */ 3869 DPRINTF("returning %jd (usbroothub default)", 3870 buflen, 0, 0, 0); 3871 return buflen; 3872 } 3873 3874 DPRINTF("returning %jd", totlen, 0, 0, 0); 3875 3876 return totlen; 3877 } 3878 3879 /* Abort a root interrupt request. */ 3880 void 3881 uhci_root_intr_abort(struct usbd_xfer *xfer) 3882 { 3883 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 3884 3885 KASSERT(mutex_owned(&sc->sc_lock)); 3886 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3887 3888 callout_stop(&sc->sc_poll_handle); 3889 sc->sc_intr_xfer = NULL; 3890 3891 xfer->ux_status = USBD_CANCELLED; 3892 #ifdef DIAGNOSTIC 3893 UHCI_XFER2UXFER(xfer)->ux_isdone = true; 3894 #endif 3895 usb_transfer_complete(xfer); 3896 } 3897 3898 usbd_status 3899 uhci_root_intr_transfer(struct usbd_xfer *xfer) 3900 { 3901 uhci_softc_t *sc = UHCI_XFER2SC(xfer); 3902 usbd_status err; 3903 3904 /* Insert last in queue. */ 3905 mutex_enter(&sc->sc_lock); 3906 err = usb_insert_transfer(xfer); 3907 mutex_exit(&sc->sc_lock); 3908 if (err) 3909 return err; 3910 3911 /* 3912 * Pipe isn't running (otherwise err would be USBD_INPROG), 3913 * start first 3914 */ 3915 return uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3916 } 3917 3918 /* Start a transfer on the root interrupt pipe */ 3919 usbd_status 3920 uhci_root_intr_start(struct usbd_xfer *xfer) 3921 { 3922 struct usbd_pipe *pipe = xfer->ux_pipe; 3923 uhci_softc_t *sc = UHCI_PIPE2SC(pipe); 3924 unsigned int ival; 3925 3926 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3927 DPRINTF("xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer, xfer->ux_length, 3928 xfer->ux_flags, 0); 3929 3930 if (sc->sc_dying) 3931 return USBD_IOERROR; 3932 3933 /* XXX temporary variable needed to avoid gcc3 warning */ 3934 ival = xfer->ux_pipe->up_endpoint->ue_edesc->bInterval; 3935 sc->sc_ival = mstohz(ival); 3936 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3937 sc->sc_intr_xfer = xfer; 3938 return USBD_IN_PROGRESS; 3939 } 3940 3941 /* Close the root interrupt pipe. */ 3942 void 3943 uhci_root_intr_close(struct usbd_pipe *pipe) 3944 { 3945 uhci_softc_t *sc = UHCI_PIPE2SC(pipe); 3946 UHCIHIST_FUNC(); UHCIHIST_CALLED(); 3947 3948 KASSERT(mutex_owned(&sc->sc_lock)); 3949 3950 callout_stop(&sc->sc_poll_handle); 3951 sc->sc_intr_xfer = NULL; 3952 } 3953
Indexes created Tue Sep 30 17:09:57 GMT 2025