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uhci.c revision 1.288
      1 /*	$NetBSD: uhci.c,v 1.288 2019/02/17 04:17:52 rin Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10  * and Matthew R. Green (mrg (at) eterna.com.au).
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * USB Universal Host Controller driver.
     36  * Handles e.g. PIIX3 and PIIX4.
     37  *
     38  * UHCI spec: http://www.intel.com/technology/usb/spec.htm
     39  * USB spec: http://www.usb.org/developers/docs/
     40  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     41  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     42  */
     43 
     44 #include <sys/cdefs.h>
     45 __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.288 2019/02/17 04:17:52 rin Exp $");
     46 
     47 #ifdef _KERNEL_OPT
     48 #include "opt_usb.h"
     49 #endif
     50 
     51 #include <sys/param.h>
     52 
     53 #include <sys/bus.h>
     54 #include <sys/cpu.h>
     55 #include <sys/device.h>
     56 #include <sys/kernel.h>
     57 #include <sys/kmem.h>
     58 #include <sys/mutex.h>
     59 #include <sys/proc.h>
     60 #include <sys/queue.h>
     61 #include <sys/select.h>
     62 #include <sys/sysctl.h>
     63 #include <sys/systm.h>
     64 
     65 #include <machine/endian.h>
     66 
     67 #include <dev/usb/usb.h>
     68 #include <dev/usb/usbdi.h>
     69 #include <dev/usb/usbdivar.h>
     70 #include <dev/usb/usb_mem.h>
     71 
     72 #include <dev/usb/uhcireg.h>
     73 #include <dev/usb/uhcivar.h>
     74 #include <dev/usb/usbroothub.h>
     75 #include <dev/usb/usbhist.h>
     76 
     77 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     78 /*#define UHCI_CTL_LOOP */
     79 
     80 #ifdef UHCI_DEBUG
     81 uhci_softc_t *thesc;
     82 int uhcinoloop = 0;
     83 #endif
     84 
     85 #ifdef USB_DEBUG
     86 #ifndef UHCI_DEBUG
     87 #define uhcidebug 0
     88 #else
     89 static int uhcidebug = 0;
     90 
     91 SYSCTL_SETUP(sysctl_hw_uhci_setup, "sysctl hw.uhci setup")
     92 {
     93 	int err;
     94 	const struct sysctlnode *rnode;
     95 	const struct sysctlnode *cnode;
     96 
     97 	err = sysctl_createv(clog, 0, NULL, &rnode,
     98 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "uhci",
     99 	    SYSCTL_DESCR("uhci global controls"),
    100 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
    101 
    102 	if (err)
    103 		goto fail;
    104 
    105 	/* control debugging printfs */
    106 	err = sysctl_createv(clog, 0, &rnode, &cnode,
    107 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
    108 	    "debug", SYSCTL_DESCR("Enable debugging output"),
    109 	    NULL, 0, &uhcidebug, sizeof(uhcidebug), CTL_CREATE, CTL_EOL);
    110 	if (err)
    111 		goto fail;
    112 
    113 	return;
    114 fail:
    115 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
    116 }
    117 
    118 #endif /* UHCI_DEBUG */
    119 #endif /* USB_DEBUG */
    120 
    121 #define	DPRINTF(FMT,A,B,C,D)	USBHIST_LOGN(uhcidebug,1,FMT,A,B,C,D)
    122 #define	DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGN(uhcidebug,N,FMT,A,B,C,D)
    123 #define	UHCIHIST_FUNC()		USBHIST_FUNC()
    124 #define	UHCIHIST_CALLED(name)	USBHIST_CALLED(uhcidebug)
    125 
    126 /*
    127  * The UHCI controller is little endian, so on big endian machines
    128  * the data stored in memory needs to be swapped.
    129  */
    130 
    131 struct uhci_pipe {
    132 	struct usbd_pipe pipe;
    133 	int nexttoggle;
    134 
    135 	u_char aborting;
    136 	struct usbd_xfer *abortstart, abortend;
    137 
    138 	/* Info needed for different pipe kinds. */
    139 	union {
    140 		/* Control pipe */
    141 		struct {
    142 			uhci_soft_qh_t *sqh;
    143 			usb_dma_t reqdma;
    144 			uhci_soft_td_t *setup;
    145 			uhci_soft_td_t *stat;
    146 		} ctrl;
    147 		/* Interrupt pipe */
    148 		struct {
    149 			int npoll;
    150 			uhci_soft_qh_t **qhs;
    151 		} intr;
    152 		/* Bulk pipe */
    153 		struct {
    154 			uhci_soft_qh_t *sqh;
    155 		} bulk;
    156 		/* Isochronous pipe */
    157 		struct isoc {
    158 			uhci_soft_td_t **stds;
    159 			int next, inuse;
    160 		} isoc;
    161 	};
    162 };
    163 
    164 typedef TAILQ_HEAD(ux_completeq, uhci_xfer) ux_completeq_t;
    165 
    166 Static void		uhci_globalreset(uhci_softc_t *);
    167 Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    168 Static void		uhci_reset(uhci_softc_t *);
    169 Static usbd_status	uhci_run(uhci_softc_t *, int, int);
    170 Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    171 Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    172 Static void		uhci_free_std_locked(uhci_softc_t *, uhci_soft_td_t *);
    173 Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    174 Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    175 #if 0
    176 Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    177 			    uhci_intr_info_t *);
    178 Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    179 #endif
    180 
    181 #if 0
    182 Static void		uhci_free_std_chain(uhci_softc_t *, uhci_soft_td_t *,
    183 			    uhci_soft_td_t *);
    184 #endif
    185 Static int		uhci_alloc_std_chain(uhci_softc_t *, struct usbd_xfer *,
    186 			    int, int, uhci_soft_td_t **);
    187 Static void		uhci_free_stds(uhci_softc_t *, struct uhci_xfer *);
    188 
    189 Static void		uhci_reset_std_chain(uhci_softc_t *, struct usbd_xfer *,
    190 			    int, int, int *, uhci_soft_td_t **);
    191 
    192 Static void		uhci_poll_hub(void *);
    193 Static void		uhci_check_intr(uhci_softc_t *, struct uhci_xfer *,
    194 			    ux_completeq_t *);
    195 Static void		uhci_idone(struct uhci_xfer *, ux_completeq_t *);
    196 
    197 Static void		uhci_abort_xfer(struct usbd_xfer *, usbd_status);
    198 
    199 Static void		uhci_timeout(void *);
    200 Static void		uhci_timeout_task(void *);
    201 Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    202 Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    203 Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    204 Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    205 Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    206 Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    207 Static void		uhci_add_loop(uhci_softc_t *);
    208 Static void		uhci_rem_loop(uhci_softc_t *);
    209 
    210 Static usbd_status	uhci_setup_isoc(struct usbd_pipe *);
    211 
    212 Static struct usbd_xfer *
    213 			uhci_allocx(struct usbd_bus *, unsigned int);
    214 Static void		uhci_freex(struct usbd_bus *, struct usbd_xfer *);
    215 Static void		uhci_get_lock(struct usbd_bus *, kmutex_t **);
    216 Static int		uhci_roothub_ctrl(struct usbd_bus *,
    217 			    usb_device_request_t *, void *, int);
    218 
    219 Static int		uhci_device_ctrl_init(struct usbd_xfer *);
    220 Static void		uhci_device_ctrl_fini(struct usbd_xfer *);
    221 Static usbd_status	uhci_device_ctrl_transfer(struct usbd_xfer *);
    222 Static usbd_status	uhci_device_ctrl_start(struct usbd_xfer *);
    223 Static void		uhci_device_ctrl_abort(struct usbd_xfer *);
    224 Static void		uhci_device_ctrl_close(struct usbd_pipe *);
    225 Static void		uhci_device_ctrl_done(struct usbd_xfer *);
    226 
    227 Static int		uhci_device_intr_init(struct usbd_xfer *);
    228 Static void		uhci_device_intr_fini(struct usbd_xfer *);
    229 Static usbd_status	uhci_device_intr_transfer(struct usbd_xfer *);
    230 Static usbd_status	uhci_device_intr_start(struct usbd_xfer *);
    231 Static void		uhci_device_intr_abort(struct usbd_xfer *);
    232 Static void		uhci_device_intr_close(struct usbd_pipe *);
    233 Static void		uhci_device_intr_done(struct usbd_xfer *);
    234 
    235 Static int		uhci_device_bulk_init(struct usbd_xfer *);
    236 Static void		uhci_device_bulk_fini(struct usbd_xfer *);
    237 Static usbd_status	uhci_device_bulk_transfer(struct usbd_xfer *);
    238 Static usbd_status	uhci_device_bulk_start(struct usbd_xfer *);
    239 Static void		uhci_device_bulk_abort(struct usbd_xfer *);
    240 Static void		uhci_device_bulk_close(struct usbd_pipe *);
    241 Static void		uhci_device_bulk_done(struct usbd_xfer *);
    242 
    243 Static int		uhci_device_isoc_init(struct usbd_xfer *);
    244 Static void		uhci_device_isoc_fini(struct usbd_xfer *);
    245 Static usbd_status	uhci_device_isoc_transfer(struct usbd_xfer *);
    246 Static void		uhci_device_isoc_abort(struct usbd_xfer *);
    247 Static void		uhci_device_isoc_close(struct usbd_pipe *);
    248 Static void		uhci_device_isoc_done(struct usbd_xfer *);
    249 
    250 Static usbd_status	uhci_root_intr_transfer(struct usbd_xfer *);
    251 Static usbd_status	uhci_root_intr_start(struct usbd_xfer *);
    252 Static void		uhci_root_intr_abort(struct usbd_xfer *);
    253 Static void		uhci_root_intr_close(struct usbd_pipe *);
    254 Static void		uhci_root_intr_done(struct usbd_xfer *);
    255 
    256 Static usbd_status	uhci_open(struct usbd_pipe *);
    257 Static void		uhci_poll(struct usbd_bus *);
    258 Static void		uhci_softintr(void *);
    259 
    260 Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    261 Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    262 Static usbd_status	uhci_device_setintr(uhci_softc_t *,
    263 			    struct uhci_pipe *, int);
    264 
    265 Static void		uhci_device_clear_toggle(struct usbd_pipe *);
    266 Static void		uhci_noop(struct usbd_pipe *);
    267 
    268 static inline uhci_soft_qh_t *
    269 			uhci_find_prev_qh(uhci_soft_qh_t *, uhci_soft_qh_t *);
    270 
    271 #ifdef UHCI_DEBUG
    272 Static void		uhci_dump_all(uhci_softc_t *);
    273 Static void		uhci_dumpregs(uhci_softc_t *);
    274 Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    275 Static void		uhci_dump_qh(uhci_soft_qh_t *);
    276 Static void		uhci_dump_tds(uhci_soft_td_t *);
    277 Static void		uhci_dump_td(uhci_soft_td_t *);
    278 Static void		uhci_dump_ii(struct uhci_xfer *);
    279 void			uhci_dump(void);
    280 #endif
    281 
    282 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    283 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    284 #define UWRITE1(sc, r, x) \
    285  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    286  } while (/*CONSTCOND*/0)
    287 #define UWRITE2(sc, r, x) \
    288  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    289  } while (/*CONSTCOND*/0)
    290 #define UWRITE4(sc, r, x) \
    291  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    292  } while (/*CONSTCOND*/0)
    293 
    294 static __inline uint8_t
    295 UREAD1(uhci_softc_t *sc, bus_size_t r)
    296 {
    297 
    298 	UBARR(sc);
    299 	return bus_space_read_1(sc->iot, sc->ioh, r);
    300 }
    301 
    302 static __inline uint16_t
    303 UREAD2(uhci_softc_t *sc, bus_size_t r)
    304 {
    305 
    306 	UBARR(sc);
    307 	return bus_space_read_2(sc->iot, sc->ioh, r);
    308 }
    309 
    310 #ifdef UHCI_DEBUG
    311 static __inline uint32_t
    312 UREAD4(uhci_softc_t *sc, bus_size_t r)
    313 {
    314 
    315 	UBARR(sc);
    316 	return bus_space_read_4(sc->iot, sc->ioh, r);
    317 }
    318 #endif
    319 
    320 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    321 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    322 
    323 #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    324 
    325 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    326 
    327 const struct usbd_bus_methods uhci_bus_methods = {
    328 	.ubm_open =	uhci_open,
    329 	.ubm_softint =	uhci_softintr,
    330 	.ubm_dopoll =	uhci_poll,
    331 	.ubm_allocx =	uhci_allocx,
    332 	.ubm_freex =	uhci_freex,
    333 	.ubm_getlock =	uhci_get_lock,
    334 	.ubm_rhctrl =	uhci_roothub_ctrl,
    335 };
    336 
    337 const struct usbd_pipe_methods uhci_root_intr_methods = {
    338 	.upm_transfer =	uhci_root_intr_transfer,
    339 	.upm_start =	uhci_root_intr_start,
    340 	.upm_abort =	uhci_root_intr_abort,
    341 	.upm_close =	uhci_root_intr_close,
    342 	.upm_cleartoggle =	uhci_noop,
    343 	.upm_done =	uhci_root_intr_done,
    344 };
    345 
    346 const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    347 	.upm_init =	uhci_device_ctrl_init,
    348 	.upm_fini =	uhci_device_ctrl_fini,
    349 	.upm_transfer =	uhci_device_ctrl_transfer,
    350 	.upm_start =	uhci_device_ctrl_start,
    351 	.upm_abort =	uhci_device_ctrl_abort,
    352 	.upm_close =	uhci_device_ctrl_close,
    353 	.upm_cleartoggle =	uhci_noop,
    354 	.upm_done =	uhci_device_ctrl_done,
    355 };
    356 
    357 const struct usbd_pipe_methods uhci_device_intr_methods = {
    358 	.upm_init =	uhci_device_intr_init,
    359 	.upm_fini =	uhci_device_intr_fini,
    360 	.upm_transfer =	uhci_device_intr_transfer,
    361 	.upm_start =	uhci_device_intr_start,
    362 	.upm_abort =	uhci_device_intr_abort,
    363 	.upm_close =	uhci_device_intr_close,
    364 	.upm_cleartoggle =	uhci_device_clear_toggle,
    365 	.upm_done =	uhci_device_intr_done,
    366 };
    367 
    368 const struct usbd_pipe_methods uhci_device_bulk_methods = {
    369 	.upm_init =	uhci_device_bulk_init,
    370 	.upm_fini =	uhci_device_bulk_fini,
    371 	.upm_transfer =	uhci_device_bulk_transfer,
    372 	.upm_start =	uhci_device_bulk_start,
    373 	.upm_abort =	uhci_device_bulk_abort,
    374 	.upm_close =	uhci_device_bulk_close,
    375 	.upm_cleartoggle =	uhci_device_clear_toggle,
    376 	.upm_done =	uhci_device_bulk_done,
    377 };
    378 
    379 const struct usbd_pipe_methods uhci_device_isoc_methods = {
    380 	.upm_init =	uhci_device_isoc_init,
    381 	.upm_fini =	uhci_device_isoc_fini,
    382 	.upm_transfer =	uhci_device_isoc_transfer,
    383 	.upm_abort =	uhci_device_isoc_abort,
    384 	.upm_close =	uhci_device_isoc_close,
    385 	.upm_cleartoggle =	uhci_noop,
    386 	.upm_done =	uhci_device_isoc_done,
    387 };
    388 
    389 static inline void
    390 uhci_add_intr_list(uhci_softc_t *sc, struct uhci_xfer *ux)
    391 {
    392 
    393 	TAILQ_INSERT_TAIL(&sc->sc_intrhead, ux, ux_list);
    394 }
    395 
    396 static inline void
    397 uhci_del_intr_list(uhci_softc_t *sc, struct uhci_xfer *ux)
    398 {
    399 
    400 	TAILQ_REMOVE(&sc->sc_intrhead, ux, ux_list);
    401 }
    402 
    403 static inline uhci_soft_qh_t *
    404 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    405 {
    406 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    407 	DPRINTFN(15, "pqh=%#jx sqh=%#jx", (uintptr_t)pqh, (uintptr_t)sqh, 0, 0);
    408 
    409 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    410 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    411 		usb_syncmem(&pqh->dma,
    412 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    413 		    sizeof(pqh->qh.qh_hlink),
    414 		    BUS_DMASYNC_POSTWRITE);
    415 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    416 			printf("%s: QH not found\n", __func__);
    417 			return NULL;
    418 		}
    419 #endif
    420 	}
    421 	return pqh;
    422 }
    423 
    424 void
    425 uhci_globalreset(uhci_softc_t *sc)
    426 {
    427 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    428 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    429 	UHCICMD(sc, 0);			/* do nothing */
    430 }
    431 
    432 int
    433 uhci_init(uhci_softc_t *sc)
    434 {
    435 	usbd_status err;
    436 	int i, j;
    437 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    438 	uhci_soft_td_t *std;
    439 
    440 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    441 
    442 #ifdef UHCI_DEBUG
    443 	thesc = sc;
    444 
    445 	if (uhcidebug >= 2)
    446 		uhci_dumpregs(sc);
    447 #endif
    448 
    449 	sc->sc_suspend = PWR_RESUME;
    450 
    451 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    452 	uhci_globalreset(sc);			/* reset the controller */
    453 	uhci_reset(sc);
    454 
    455 	/* Allocate and initialize real frame array. */
    456 	err = usb_allocmem(&sc->sc_bus,
    457 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    458 	    UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    459 	if (err)
    460 		return err;
    461 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    462 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    463 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    464 
    465 	/* Initialise mutex early for uhci_alloc_* */
    466 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    467 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
    468 
    469 	/*
    470 	 * Allocate a TD, inactive, that hangs from the last QH.
    471 	 * This is to avoid a bug in the PIIX that makes it run berserk
    472 	 * otherwise.
    473 	 */
    474 	std = uhci_alloc_std(sc);
    475 	if (std == NULL)
    476 		return ENOMEM;
    477 	std->link.std = NULL;
    478 	std->td.td_link = htole32(UHCI_PTR_T);
    479 	std->td.td_status = htole32(0); /* inactive */
    480 	std->td.td_token = htole32(0);
    481 	std->td.td_buffer = htole32(0);
    482 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    483 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    484 
    485 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    486 	lsqh = uhci_alloc_sqh(sc);
    487 	if (lsqh == NULL)
    488 		goto fail1;
    489 	lsqh->hlink = NULL;
    490 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    491 	lsqh->elink = std;
    492 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    493 	sc->sc_last_qh = lsqh;
    494 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    495 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    496 
    497 	/* Allocate the dummy QH where bulk traffic will be queued. */
    498 	bsqh = uhci_alloc_sqh(sc);
    499 	if (bsqh == NULL)
    500 		goto fail2;
    501 	bsqh->hlink = lsqh;
    502 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    503 	bsqh->elink = NULL;
    504 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    505 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    506 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    507 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    508 
    509 	/* Allocate dummy QH where high speed control traffic will be queued. */
    510 	chsqh = uhci_alloc_sqh(sc);
    511 	if (chsqh == NULL)
    512 		goto fail3;
    513 	chsqh->hlink = bsqh;
    514 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    515 	chsqh->elink = NULL;
    516 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    517 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    518 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    519 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    520 
    521 	/* Allocate dummy QH where control traffic will be queued. */
    522 	clsqh = uhci_alloc_sqh(sc);
    523 	if (clsqh == NULL)
    524 		goto fail4;
    525 	clsqh->hlink = chsqh;
    526 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    527 	clsqh->elink = NULL;
    528 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    529 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    530 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    531 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    532 
    533 	/*
    534 	 * Make all (virtual) frame list pointers point to the interrupt
    535 	 * queue heads and the interrupt queue heads at the control
    536 	 * queue head and point the physical frame list to the virtual.
    537 	 */
    538 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    539 		std = uhci_alloc_std(sc);
    540 		sqh = uhci_alloc_sqh(sc);
    541 		if (std == NULL || sqh == NULL)
    542 			return USBD_NOMEM;
    543 		std->link.sqh = sqh;
    544 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    545 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    546 		std->td.td_token = htole32(0);
    547 		std->td.td_buffer = htole32(0);
    548 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    549 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    550 		sqh->hlink = clsqh;
    551 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    552 		sqh->elink = NULL;
    553 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    554 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    555 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    556 		sc->sc_vframes[i].htd = std;
    557 		sc->sc_vframes[i].etd = std;
    558 		sc->sc_vframes[i].hqh = sqh;
    559 		sc->sc_vframes[i].eqh = sqh;
    560 		for (j = i;
    561 		     j < UHCI_FRAMELIST_COUNT;
    562 		     j += UHCI_VFRAMELIST_COUNT)
    563 			sc->sc_pframes[j] = htole32(std->physaddr);
    564 	}
    565 	usb_syncmem(&sc->sc_dma, 0,
    566 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    567 	    BUS_DMASYNC_PREWRITE);
    568 
    569 
    570 	TAILQ_INIT(&sc->sc_intrhead);
    571 
    572 	sc->sc_xferpool = pool_cache_init(sizeof(struct uhci_xfer), 0, 0, 0,
    573 	    "uhcixfer", NULL, IPL_USB, NULL, NULL, NULL);
    574 
    575 	callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE);
    576 
    577 	/* Set up the bus struct. */
    578 	sc->sc_bus.ub_methods = &uhci_bus_methods;
    579 	sc->sc_bus.ub_pipesize = sizeof(struct uhci_pipe);
    580 	sc->sc_bus.ub_usedma = true;
    581 
    582 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    583 
    584 	DPRINTF("Enabling...", 0, 0, 0, 0);
    585 
    586 	err = uhci_run(sc, 1, 0);		/* and here we go... */
    587 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    588 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    589 	return err;
    590 
    591 fail4:
    592 	uhci_free_sqh(sc, chsqh);
    593 fail3:
    594 	uhci_free_sqh(sc, lsqh);
    595 fail2:
    596 	uhci_free_sqh(sc, lsqh);
    597 fail1:
    598 	uhci_free_std(sc, std);
    599 
    600 	return ENOMEM;
    601 }
    602 
    603 int
    604 uhci_activate(device_t self, enum devact act)
    605 {
    606 	struct uhci_softc *sc = device_private(self);
    607 
    608 	switch (act) {
    609 	case DVACT_DEACTIVATE:
    610 		sc->sc_dying = 1;
    611 		return 0;
    612 	default:
    613 		return EOPNOTSUPP;
    614 	}
    615 }
    616 
    617 void
    618 uhci_childdet(device_t self, device_t child)
    619 {
    620 	struct uhci_softc *sc = device_private(self);
    621 
    622 	KASSERT(sc->sc_child == child);
    623 	sc->sc_child = NULL;
    624 }
    625 
    626 int
    627 uhci_detach(struct uhci_softc *sc, int flags)
    628 {
    629 	int rv = 0;
    630 
    631 	if (sc->sc_child != NULL)
    632 		rv = config_detach(sc->sc_child, flags);
    633 
    634 	if (rv != 0)
    635 		return rv;
    636 
    637 	callout_halt(&sc->sc_poll_handle, NULL);
    638 	callout_destroy(&sc->sc_poll_handle);
    639 
    640 	mutex_destroy(&sc->sc_lock);
    641 	mutex_destroy(&sc->sc_intr_lock);
    642 
    643 	pool_cache_destroy(sc->sc_xferpool);
    644 
    645 	/* XXX free other data structures XXX */
    646 
    647 	return rv;
    648 }
    649 
    650 struct usbd_xfer *
    651 uhci_allocx(struct usbd_bus *bus, unsigned int nframes)
    652 {
    653 	struct uhci_softc *sc = UHCI_BUS2SC(bus);
    654 	struct usbd_xfer *xfer;
    655 
    656 	xfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK);
    657 	if (xfer != NULL) {
    658 		memset(xfer, 0, sizeof(struct uhci_xfer));
    659 
    660 		/* Initialise this always so we can call remove on it. */
    661 		usb_init_task(&xfer->ux_aborttask, uhci_timeout_task, xfer,
    662 		    USB_TASKQ_MPSAFE);
    663 #ifdef DIAGNOSTIC
    664 		struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
    665 		uxfer->ux_isdone = true;
    666 		xfer->ux_state = XFER_BUSY;
    667 #endif
    668 	}
    669 	return xfer;
    670 }
    671 
    672 void
    673 uhci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
    674 {
    675 	struct uhci_softc *sc = UHCI_BUS2SC(bus);
    676 	struct uhci_xfer *uxfer __diagused = UHCI_XFER2UXFER(xfer);
    677 
    678 	KASSERTMSG(xfer->ux_state == XFER_BUSY ||
    679 	    xfer->ux_status == USBD_NOT_STARTED,
    680 	    "xfer %p state %d\n", xfer, xfer->ux_state);
    681 	KASSERTMSG(uxfer->ux_isdone || xfer->ux_status == USBD_NOT_STARTED,
    682 	    "xfer %p not done\n", xfer);
    683 #ifdef DIAGNOSTIC
    684 	xfer->ux_state = XFER_FREE;
    685 #endif
    686 	pool_cache_put(sc->sc_xferpool, xfer);
    687 }
    688 
    689 Static void
    690 uhci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
    691 {
    692 	struct uhci_softc *sc = UHCI_BUS2SC(bus);
    693 
    694 	*lock = &sc->sc_lock;
    695 }
    696 
    697 
    698 /*
    699  * Handle suspend/resume.
    700  *
    701  * We need to switch to polling mode here, because this routine is
    702  * called from an interrupt context.  This is all right since we
    703  * are almost suspended anyway.
    704  */
    705 bool
    706 uhci_resume(device_t dv, const pmf_qual_t *qual)
    707 {
    708 	uhci_softc_t *sc = device_private(dv);
    709 	int cmd;
    710 
    711 	mutex_spin_enter(&sc->sc_intr_lock);
    712 
    713 	cmd = UREAD2(sc, UHCI_CMD);
    714 	sc->sc_bus.ub_usepolling++;
    715 	UWRITE2(sc, UHCI_INTR, 0);
    716 	uhci_globalreset(sc);
    717 	uhci_reset(sc);
    718 	if (cmd & UHCI_CMD_RS)
    719 		uhci_run(sc, 0, 1);
    720 
    721 	/* restore saved state */
    722 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    723 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    724 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    725 
    726 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
    727 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_DELAY, &sc->sc_intr_lock);
    728 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    729 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
    730 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
    731 	UHCICMD(sc, UHCI_CMD_MAXP);
    732 	uhci_run(sc, 1, 1); /* and start traffic again */
    733 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_RECOVERY, &sc->sc_intr_lock);
    734 	sc->sc_bus.ub_usepolling--;
    735 	if (sc->sc_intr_xfer != NULL)
    736 		callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
    737 		    sc->sc_intr_xfer);
    738 #ifdef UHCI_DEBUG
    739 	if (uhcidebug >= 2)
    740 		uhci_dumpregs(sc);
    741 #endif
    742 
    743 	sc->sc_suspend = PWR_RESUME;
    744 	mutex_spin_exit(&sc->sc_intr_lock);
    745 
    746 	return true;
    747 }
    748 
    749 bool
    750 uhci_suspend(device_t dv, const pmf_qual_t *qual)
    751 {
    752 	uhci_softc_t *sc = device_private(dv);
    753 	int cmd;
    754 
    755 	mutex_spin_enter(&sc->sc_intr_lock);
    756 
    757 	cmd = UREAD2(sc, UHCI_CMD);
    758 
    759 #ifdef UHCI_DEBUG
    760 	if (uhcidebug >= 2)
    761 		uhci_dumpregs(sc);
    762 #endif
    763 	if (sc->sc_intr_xfer != NULL)
    764 		callout_stop(&sc->sc_poll_handle);
    765 	sc->sc_suspend = PWR_SUSPEND;
    766 	sc->sc_bus.ub_usepolling++;
    767 
    768 	uhci_run(sc, 0, 1); /* stop the controller */
    769 	cmd &= ~UHCI_CMD_RS;
    770 
    771 	/* save some state if BIOS doesn't */
    772 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    773 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    774 
    775 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    776 
    777 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
    778 	usb_delay_ms_locked(&sc->sc_bus, USB_RESUME_WAIT, &sc->sc_intr_lock);
    779 	sc->sc_bus.ub_usepolling--;
    780 
    781 	mutex_spin_exit(&sc->sc_intr_lock);
    782 
    783 	return true;
    784 }
    785 
    786 #ifdef UHCI_DEBUG
    787 Static void
    788 uhci_dumpregs(uhci_softc_t *sc)
    789 {
    790 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    791 	DPRINTF("cmd =%04jx  sts    =%04jx  intr   =%04jx  frnum =%04jx",
    792 	    UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS),
    793 	    UREAD2(sc, UHCI_INTR), UREAD2(sc, UHCI_FRNUM));
    794 	DPRINTF("sof =%04jx  portsc1=%04jx  portsc2=%04jx  flbase=%08jx",
    795 	    UREAD1(sc, UHCI_SOF), UREAD2(sc, UHCI_PORTSC1),
    796 	    UREAD2(sc, UHCI_PORTSC2), UREAD4(sc, UHCI_FLBASEADDR));
    797 }
    798 
    799 void
    800 uhci_dump_td(uhci_soft_td_t *p)
    801 {
    802 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    803 
    804 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    805 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    806 
    807 	DPRINTF("TD(%#jx) at 0x%08jx", (uintptr_t)p, p->physaddr, 0, 0);
    808 	DPRINTF("   link=0x%08jx status=0x%08jx "
    809 	    "token=0x%08x buffer=0x%08x",
    810 	     le32toh(p->td.td_link),
    811 	     le32toh(p->td.td_status),
    812 	     le32toh(p->td.td_token),
    813 	     le32toh(p->td.td_buffer));
    814 
    815 	DPRINTF("bitstuff=%jd crcto   =%jd nak     =%jd babble  =%jd",
    816 	    !!(le32toh(p->td.td_status) & UHCI_TD_BITSTUFF),
    817 	    !!(le32toh(p->td.td_status) & UHCI_TD_CRCTO),
    818 	    !!(le32toh(p->td.td_status) & UHCI_TD_NAK),
    819 	    !!(le32toh(p->td.td_status) & UHCI_TD_BABBLE));
    820 	DPRINTF("dbuffer =%jd stalled =%jd active  =%jd ioc     =%jd",
    821 	    !!(le32toh(p->td.td_status) & UHCI_TD_DBUFFER),
    822 	    !!(le32toh(p->td.td_status) & UHCI_TD_STALLED),
    823 	    !!(le32toh(p->td.td_status) & UHCI_TD_ACTIVE),
    824 	    !!(le32toh(p->td.td_status) & UHCI_TD_IOC));
    825 	DPRINTF("ios     =%jd ls      =%jd spd     =%jd",
    826 	    !!(le32toh(p->td.td_status) & UHCI_TD_IOS),
    827 	    !!(le32toh(p->td.td_status) & UHCI_TD_LS),
    828 	    !!(le32toh(p->td.td_status) & UHCI_TD_SPD), 0);
    829 	DPRINTF("errcnt  =%d actlen  =%d pid=%02x",
    830 	    UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    831 	    UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    832 	    UHCI_TD_GET_PID(le32toh(p->td.td_token)), 0);
    833 	DPRINTF("addr=%jd  endpt=%jd  D=%jd  maxlen=%jd,",
    834 	    UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    835 	    UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    836 	    UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    837 	    UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)));
    838 }
    839 
    840 void
    841 uhci_dump_qh(uhci_soft_qh_t *sqh)
    842 {
    843 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    844 
    845 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    846 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    847 
    848 	DPRINTF("QH(%#jx) at 0x%08jx: hlink=%08jx elink=%08jx", (uintptr_t)sqh,
    849 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    850 	    le32toh(sqh->qh.qh_elink));
    851 
    852 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    853 }
    854 
    855 
    856 #if 1
    857 void
    858 uhci_dump(void)
    859 {
    860 	uhci_dump_all(thesc);
    861 }
    862 #endif
    863 
    864 void
    865 uhci_dump_all(uhci_softc_t *sc)
    866 {
    867 	uhci_dumpregs(sc);
    868 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    869 	uhci_dump_qhs(sc->sc_lctl_start);
    870 }
    871 
    872 
    873 void
    874 uhci_dump_qhs(uhci_soft_qh_t *sqh)
    875 {
    876 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
    877 
    878 	uhci_dump_qh(sqh);
    879 
    880 	/*
    881 	 * uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    882 	 * Traverses sideways first, then down.
    883 	 *
    884 	 * QH1
    885 	 * QH2
    886 	 * No QH
    887 	 * TD2.1
    888 	 * TD2.2
    889 	 * TD1.1
    890 	 * etc.
    891 	 *
    892 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    893 	 */
    894 
    895 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    896 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    897 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    898 		uhci_dump_qhs(sqh->hlink);
    899 	else
    900 		DPRINTF("No QH", 0, 0, 0, 0);
    901 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    902 
    903 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    904 		uhci_dump_tds(sqh->elink);
    905 	else
    906 		DPRINTF("No QH", 0, 0, 0, 0);
    907 }
    908 
    909 void
    910 uhci_dump_tds(uhci_soft_td_t *std)
    911 {
    912 	uhci_soft_td_t *td;
    913 	int stop;
    914 
    915 	for (td = std; td != NULL; td = td->link.std) {
    916 		uhci_dump_td(td);
    917 
    918 		/*
    919 		 * Check whether the link pointer in this TD marks
    920 		 * the link pointer as end of queue. This avoids
    921 		 * printing the free list in case the queue/TD has
    922 		 * already been moved there (seatbelt).
    923 		 */
    924 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    925 		    sizeof(td->td.td_link),
    926 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    927 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    928 			le32toh(td->td.td_link) == 0);
    929 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    930 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    931 		if (stop)
    932 			break;
    933 	}
    934 }
    935 
    936 Static void
    937 uhci_dump_ii(struct uhci_xfer *ux)
    938 {
    939 	struct usbd_pipe *pipe;
    940 	usb_endpoint_descriptor_t *ed;
    941 	struct usbd_device *dev;
    942 
    943 	if (ux == NULL) {
    944 		printf("ux NULL\n");
    945 		return;
    946 	}
    947 	pipe = ux->ux_xfer.ux_pipe;
    948 	if (pipe == NULL) {
    949 		printf("ux %p: done=%d pipe=NULL\n", ux, ux->ux_isdone);
    950 		return;
    951 	}
    952 	if (pipe->up_endpoint == NULL) {
    953 		printf("ux %p: done=%d pipe=%p pipe->up_endpoint=NULL\n",
    954 		       ux, ux->ux_isdone, pipe);
    955 		return;
    956 	}
    957 	if (pipe->up_dev == NULL) {
    958 		printf("ux %p: done=%d pipe=%p pipe->up_dev=NULL\n",
    959 		       ux, ux->ux_isdone, pipe);
    960 		return;
    961 	}
    962 	ed = pipe->up_endpoint->ue_edesc;
    963 	dev = pipe->up_dev;
    964 	printf("ux %p: done=%d dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    965 	       ux, ux->ux_isdone, dev,
    966 	       UGETW(dev->ud_ddesc.idVendor),
    967 	       UGETW(dev->ud_ddesc.idProduct),
    968 	       dev->ud_addr, pipe,
    969 	       ed->bEndpointAddress, ed->bmAttributes);
    970 }
    971 
    972 void uhci_dump_iis(struct uhci_softc *sc);
    973 void
    974 uhci_dump_iis(struct uhci_softc *sc)
    975 {
    976 	struct uhci_xfer *ux;
    977 
    978 	printf("interrupt list:\n");
    979 	TAILQ_FOREACH(ux, &sc->sc_intrhead, ux_list)
    980 		uhci_dump_ii(ux);
    981 }
    982 
    983 void iidump(void);
    984 void iidump(void) { uhci_dump_iis(thesc); }
    985 
    986 #endif
    987 
    988 /*
    989  * This routine is executed periodically and simulates interrupts
    990  * from the root controller interrupt pipe for port status change.
    991  */
    992 void
    993 uhci_poll_hub(void *addr)
    994 {
    995 	struct usbd_xfer *xfer = addr;
    996 	struct usbd_pipe *pipe = xfer->ux_pipe;
    997 	uhci_softc_t *sc;
    998 	u_char *p;
    999 
   1000 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1001 
   1002 	if (__predict_false(pipe->up_dev == NULL || pipe->up_dev->ud_bus == NULL))
   1003 		return;	/* device has detached */
   1004 	sc = UHCI_PIPE2SC(pipe);
   1005 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1006 
   1007 	p = xfer->ux_buf;
   1008 	p[0] = 0;
   1009 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1010 		p[0] |= 1<<1;
   1011 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1012 		p[0] |= 1<<2;
   1013 	if (p[0] == 0)
   1014 		/* No change, try again in a while */
   1015 		return;
   1016 
   1017 	xfer->ux_actlen = 1;
   1018 	xfer->ux_status = USBD_NORMAL_COMPLETION;
   1019 	mutex_enter(&sc->sc_lock);
   1020 	usb_transfer_complete(xfer);
   1021 	mutex_exit(&sc->sc_lock);
   1022 }
   1023 
   1024 void
   1025 uhci_root_intr_done(struct usbd_xfer *xfer)
   1026 {
   1027 }
   1028 
   1029 /*
   1030  * Let the last QH loop back to the high speed control transfer QH.
   1031  * This is what intel calls "bandwidth reclamation" and improves
   1032  * USB performance a lot for some devices.
   1033  * If we are already looping, just count it.
   1034  */
   1035 void
   1036 uhci_add_loop(uhci_softc_t *sc)
   1037 {
   1038 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1039 
   1040 #ifdef UHCI_DEBUG
   1041 	if (uhcinoloop)
   1042 		return;
   1043 #endif
   1044 	if (++sc->sc_loops == 1) {
   1045 		DPRINTFN(5, "add loop", 0, 0, 0, 0);
   1046 		/* Note, we don't loop back the soft pointer. */
   1047 		sc->sc_last_qh->qh.qh_hlink =
   1048 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1049 		usb_syncmem(&sc->sc_last_qh->dma,
   1050 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1051 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1052 		    BUS_DMASYNC_PREWRITE);
   1053 	}
   1054 }
   1055 
   1056 void
   1057 uhci_rem_loop(uhci_softc_t *sc)
   1058 {
   1059 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1060 
   1061 #ifdef UHCI_DEBUG
   1062 	if (uhcinoloop)
   1063 		return;
   1064 #endif
   1065 	if (--sc->sc_loops == 0) {
   1066 		DPRINTFN(5, "remove loop", 0, 0, 0, 0);
   1067 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1068 		usb_syncmem(&sc->sc_last_qh->dma,
   1069 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1070 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1071 		    BUS_DMASYNC_PREWRITE);
   1072 	}
   1073 }
   1074 
   1075 /* Add high speed control QH, called with lock held. */
   1076 void
   1077 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1078 {
   1079 	uhci_soft_qh_t *eqh;
   1080 
   1081 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1082 
   1083 	KASSERT(mutex_owned(&sc->sc_lock));
   1084 
   1085 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1086 	eqh = sc->sc_hctl_end;
   1087 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1088 	    sizeof(eqh->qh.qh_hlink),
   1089 	    BUS_DMASYNC_POSTWRITE);
   1090 	sqh->hlink       = eqh->hlink;
   1091 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1092 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1093 	    BUS_DMASYNC_PREWRITE);
   1094 	eqh->hlink       = sqh;
   1095 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1096 	sc->sc_hctl_end = sqh;
   1097 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1098 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1099 #ifdef UHCI_CTL_LOOP
   1100 	uhci_add_loop(sc);
   1101 #endif
   1102 }
   1103 
   1104 /* Remove high speed control QH, called with lock held. */
   1105 void
   1106 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1107 {
   1108 	uhci_soft_qh_t *pqh;
   1109 	uint32_t elink;
   1110 
   1111 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1112 
   1113 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1114 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1115 #ifdef UHCI_CTL_LOOP
   1116 	uhci_rem_loop(sc);
   1117 #endif
   1118 	/*
   1119 	 * The T bit should be set in the elink of the QH so that the HC
   1120 	 * doesn't follow the pointer.  This condition may fail if the
   1121 	 * the transferred packet was short so that the QH still points
   1122 	 * at the last used TD.
   1123 	 * In this case we set the T bit and wait a little for the HC
   1124 	 * to stop looking at the TD.
   1125 	 * Note that if the TD chain is large enough, the controller
   1126 	 * may still be looking at the chain at the end of this function.
   1127 	 * uhci_free_std_chain() will make sure the controller stops
   1128 	 * looking at it quickly, but until then we should not change
   1129 	 * sqh->hlink.
   1130 	 */
   1131 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1132 	    sizeof(sqh->qh.qh_elink),
   1133 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1134 	elink = le32toh(sqh->qh.qh_elink);
   1135 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1136 	    sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD);
   1137 	if (!(elink & UHCI_PTR_T)) {
   1138 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1139 		usb_syncmem(&sqh->dma,
   1140 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1141 		    sizeof(sqh->qh.qh_elink),
   1142 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1143 		delay(UHCI_QH_REMOVE_DELAY);
   1144 	}
   1145 
   1146 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1147 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1148 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1149 	pqh->hlink = sqh->hlink;
   1150 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1151 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1152 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1153 	delay(UHCI_QH_REMOVE_DELAY);
   1154 	if (sc->sc_hctl_end == sqh)
   1155 		sc->sc_hctl_end = pqh;
   1156 }
   1157 
   1158 /* Add low speed control QH, called with lock held. */
   1159 void
   1160 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1161 {
   1162 	uhci_soft_qh_t *eqh;
   1163 
   1164 	KASSERT(mutex_owned(&sc->sc_lock));
   1165 
   1166 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1167 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1168 
   1169 	eqh = sc->sc_lctl_end;
   1170 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1171 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1172 	sqh->hlink = eqh->hlink;
   1173 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1174 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1175 	    BUS_DMASYNC_PREWRITE);
   1176 	eqh->hlink = sqh;
   1177 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1178 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1179 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1180 	sc->sc_lctl_end = sqh;
   1181 }
   1182 
   1183 /* Remove low speed control QH, called with lock held. */
   1184 void
   1185 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1186 {
   1187 	uhci_soft_qh_t *pqh;
   1188 	uint32_t elink;
   1189 
   1190 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1191 
   1192 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1193 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1194 
   1195 	/* See comment in uhci_remove_hs_ctrl() */
   1196 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1197 	    sizeof(sqh->qh.qh_elink),
   1198 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1199 	elink = le32toh(sqh->qh.qh_elink);
   1200 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1201 	    sizeof(sqh->qh.qh_elink), BUS_DMASYNC_PREREAD);
   1202 	if (!(elink & UHCI_PTR_T)) {
   1203 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1204 		usb_syncmem(&sqh->dma,
   1205 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1206 		    sizeof(sqh->qh.qh_elink),
   1207 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1208 		delay(UHCI_QH_REMOVE_DELAY);
   1209 	}
   1210 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1211 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1212 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1213 	pqh->hlink = sqh->hlink;
   1214 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1215 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1216 	    sizeof(pqh->qh.qh_hlink),
   1217 	    BUS_DMASYNC_PREWRITE);
   1218 	delay(UHCI_QH_REMOVE_DELAY);
   1219 	if (sc->sc_lctl_end == sqh)
   1220 		sc->sc_lctl_end = pqh;
   1221 }
   1222 
   1223 /* Add bulk QH, called with lock held. */
   1224 void
   1225 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1226 {
   1227 	uhci_soft_qh_t *eqh;
   1228 
   1229 	KASSERT(mutex_owned(&sc->sc_lock));
   1230 
   1231 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1232 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1233 
   1234 	eqh = sc->sc_bulk_end;
   1235 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1236 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1237 	sqh->hlink = eqh->hlink;
   1238 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1239 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1240 	    BUS_DMASYNC_PREWRITE);
   1241 	eqh->hlink = sqh;
   1242 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1243 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1244 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1245 	sc->sc_bulk_end = sqh;
   1246 	uhci_add_loop(sc);
   1247 }
   1248 
   1249 /* Remove bulk QH, called with lock held. */
   1250 void
   1251 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1252 {
   1253 	uhci_soft_qh_t *pqh;
   1254 
   1255 	KASSERT(mutex_owned(&sc->sc_lock));
   1256 
   1257 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1258 	DPRINTFN(10, "sqh %#jx", (uintptr_t)sqh, 0, 0, 0);
   1259 
   1260 	uhci_rem_loop(sc);
   1261 	/* See comment in uhci_remove_hs_ctrl() */
   1262 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1263 	    sizeof(sqh->qh.qh_elink),
   1264 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1265 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1266 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1267 		usb_syncmem(&sqh->dma,
   1268 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1269 		    sizeof(sqh->qh.qh_elink),
   1270 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1271 		delay(UHCI_QH_REMOVE_DELAY);
   1272 	}
   1273 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1274 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1275 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1276 	pqh->hlink       = sqh->hlink;
   1277 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1278 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1279 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1280 	delay(UHCI_QH_REMOVE_DELAY);
   1281 	if (sc->sc_bulk_end == sqh)
   1282 		sc->sc_bulk_end = pqh;
   1283 }
   1284 
   1285 Static int uhci_intr1(uhci_softc_t *);
   1286 
   1287 int
   1288 uhci_intr(void *arg)
   1289 {
   1290 	uhci_softc_t *sc = arg;
   1291 	int ret = 0;
   1292 
   1293 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1294 
   1295 	mutex_spin_enter(&sc->sc_intr_lock);
   1296 
   1297 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1298 		goto done;
   1299 
   1300 	if (sc->sc_bus.ub_usepolling || UREAD2(sc, UHCI_INTR) == 0) {
   1301 		DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0);
   1302 		goto done;
   1303 	}
   1304 
   1305 	ret = uhci_intr1(sc);
   1306 
   1307  done:
   1308 	mutex_spin_exit(&sc->sc_intr_lock);
   1309 	return ret;
   1310 }
   1311 
   1312 int
   1313 uhci_intr1(uhci_softc_t *sc)
   1314 {
   1315 	int status;
   1316 	int ack;
   1317 
   1318 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1319 
   1320 #ifdef UHCI_DEBUG
   1321 	if (uhcidebug >= 15) {
   1322 		DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0);
   1323 		uhci_dumpregs(sc);
   1324 	}
   1325 #endif
   1326 
   1327 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1328 
   1329 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1330 	/* Check if the interrupt was for us. */
   1331 	if (status == 0)
   1332 		return 0;
   1333 
   1334 	if (sc->sc_suspend != PWR_RESUME) {
   1335 #ifdef DIAGNOSTIC
   1336 		printf("%s: interrupt while not operating ignored\n",
   1337 		       device_xname(sc->sc_dev));
   1338 #endif
   1339 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1340 		return 0;
   1341 	}
   1342 
   1343 	ack = 0;
   1344 	if (status & UHCI_STS_USBINT)
   1345 		ack |= UHCI_STS_USBINT;
   1346 	if (status & UHCI_STS_USBEI)
   1347 		ack |= UHCI_STS_USBEI;
   1348 	if (status & UHCI_STS_RD) {
   1349 		ack |= UHCI_STS_RD;
   1350 #ifdef UHCI_DEBUG
   1351 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1352 #endif
   1353 	}
   1354 	if (status & UHCI_STS_HSE) {
   1355 		ack |= UHCI_STS_HSE;
   1356 		printf("%s: host system error\n", device_xname(sc->sc_dev));
   1357 	}
   1358 	if (status & UHCI_STS_HCPE) {
   1359 		ack |= UHCI_STS_HCPE;
   1360 		printf("%s: host controller process error\n",
   1361 		       device_xname(sc->sc_dev));
   1362 	}
   1363 
   1364 	/* When HCHalted=1 and Run/Stop=0 , it is normal */
   1365 	if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) {
   1366 		/* no acknowledge needed */
   1367 		if (!sc->sc_dying) {
   1368 			printf("%s: host controller halted\n",
   1369 			    device_xname(sc->sc_dev));
   1370 #ifdef UHCI_DEBUG
   1371 			uhci_dump_all(sc);
   1372 #endif
   1373 		}
   1374 		sc->sc_dying = 1;
   1375 	}
   1376 
   1377 	if (!ack)
   1378 		return 0;	/* nothing to acknowledge */
   1379 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1380 
   1381 	usb_schedsoftintr(&sc->sc_bus);
   1382 
   1383 	DPRINTFN(15, "sc %#jx done", (uintptr_t)sc, 0, 0, 0);
   1384 
   1385 	return 1;
   1386 }
   1387 
   1388 void
   1389 uhci_softintr(void *v)
   1390 {
   1391 	struct usbd_bus *bus = v;
   1392 	uhci_softc_t *sc = UHCI_BUS2SC(bus);
   1393 	struct uhci_xfer *ux, *nextux;
   1394 	ux_completeq_t cq;
   1395 
   1396 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1397 	DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0);
   1398 
   1399 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1400 
   1401 	TAILQ_INIT(&cq);
   1402 	/*
   1403 	 * Interrupts on UHCI really suck.  When the host controller
   1404 	 * interrupts because a transfer is completed there is no
   1405 	 * way of knowing which transfer it was.  You can scan down
   1406 	 * the TDs and QHs of the previous frame to limit the search,
   1407 	 * but that assumes that the interrupt was not delayed by more
   1408 	 * than 1 ms, which may not always be true (e.g. after debug
   1409 	 * output on a slow console).
   1410 	 * We scan all interrupt descriptors to see if any have
   1411 	 * completed.
   1412 	 */
   1413 	TAILQ_FOREACH_SAFE(ux, &sc->sc_intrhead, ux_list, nextux) {
   1414 		uhci_check_intr(sc, ux, &cq);
   1415 	}
   1416 
   1417 	/*
   1418 	 * We abuse ux_list for the interrupt and complete lists and
   1419 	 * interrupt transfers will get re-added here so use
   1420 	 * the _SAFE version of TAILQ_FOREACH.
   1421 	 */
   1422 	TAILQ_FOREACH_SAFE(ux, &cq, ux_list, nextux) {
   1423 		DPRINTF("ux %#jx", (uintptr_t)ux, 0, 0, 0);
   1424 		usb_transfer_complete(&ux->ux_xfer);
   1425 	}
   1426 
   1427 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1428 }
   1429 
   1430 /* Check for an interrupt. */
   1431 void
   1432 uhci_check_intr(uhci_softc_t *sc, struct uhci_xfer *ux, ux_completeq_t *cqp)
   1433 {
   1434 	uhci_soft_td_t *std, *fstd = NULL, *lstd = NULL;
   1435 	uint32_t status;
   1436 
   1437 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1438 	DPRINTFN(15, "ux %#jx", (uintptr_t)ux, 0, 0, 0);
   1439 
   1440 	KASSERT(ux != NULL);
   1441 
   1442 	struct usbd_xfer *xfer = &ux->ux_xfer;
   1443 	if (xfer->ux_status == USBD_CANCELLED ||
   1444 	    xfer->ux_status == USBD_TIMEOUT) {
   1445 		DPRINTF("aborted xfer %#jx", (uintptr_t)xfer, 0, 0, 0);
   1446 		return;
   1447 	}
   1448 
   1449 	switch (ux->ux_type) {
   1450 	case UX_CTRL:
   1451 		fstd = ux->ux_setup;
   1452 		lstd = ux->ux_stat;
   1453 		break;
   1454 	case UX_BULK:
   1455 	case UX_INTR:
   1456 	case UX_ISOC:
   1457 		fstd = ux->ux_stdstart;
   1458 		lstd = ux->ux_stdend;
   1459 		break;
   1460 	default:
   1461 		KASSERT(false);
   1462 		break;
   1463 	}
   1464 	if (fstd == NULL)
   1465 		return;
   1466 
   1467 	KASSERT(lstd != NULL);
   1468 
   1469 	usb_syncmem(&lstd->dma,
   1470 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1471 	    sizeof(lstd->td.td_status),
   1472 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1473 	status = le32toh(lstd->td.td_status);
   1474 	usb_syncmem(&lstd->dma,
   1475 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1476 	    sizeof(lstd->td.td_status),
   1477 	    BUS_DMASYNC_PREREAD);
   1478 
   1479 	/* If the last TD is not marked active we can complete */
   1480 	if (!(status & UHCI_TD_ACTIVE)) {
   1481  done:
   1482 		DPRINTFN(12, "ux=%#jx done", (uintptr_t)ux, 0, 0, 0);
   1483 		uhci_idone(ux, cqp);
   1484 		return;
   1485 	}
   1486 
   1487 	/*
   1488 	 * If the last TD is still active we need to check whether there
   1489 	 * is an error somewhere in the middle, or whether there was a
   1490 	 * short packet (SPD and not ACTIVE).
   1491 	 */
   1492 	DPRINTFN(12, "active ux=%#jx", (uintptr_t)ux, 0, 0, 0);
   1493 	for (std = fstd; std != lstd; std = std->link.std) {
   1494 		usb_syncmem(&std->dma,
   1495 		    std->offs + offsetof(uhci_td_t, td_status),
   1496 		    sizeof(std->td.td_status),
   1497 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1498 		status = le32toh(std->td.td_status);
   1499 		usb_syncmem(&std->dma,
   1500 		    std->offs + offsetof(uhci_td_t, td_status),
   1501 		    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1502 
   1503 		/* If there's an active TD the xfer isn't done. */
   1504 		if (status & UHCI_TD_ACTIVE) {
   1505 			DPRINTFN(12, "ux=%#jx std=%#jx still active",
   1506 			    (uintptr_t)ux, (uintptr_t)std, 0, 0);
   1507 			return;
   1508 		}
   1509 
   1510 		/* Any kind of error makes the xfer done. */
   1511 		if (status & UHCI_TD_STALLED)
   1512 			goto done;
   1513 
   1514 		/*
   1515 		 * If the data phase of a control transfer is short, we need
   1516 		 * to complete the status stage
   1517 		 */
   1518 
   1519 		if ((status & UHCI_TD_SPD) && ux->ux_type == UX_CTRL) {
   1520 			struct uhci_pipe *upipe =
   1521 			    UHCI_PIPE2UPIPE(xfer->ux_pipe);
   1522 			uhci_soft_qh_t *sqh = upipe->ctrl.sqh;
   1523 			uhci_soft_td_t *stat = upipe->ctrl.stat;
   1524 
   1525 			DPRINTFN(12, "ux=%#jx std=%#jx control status"
   1526 			    "phase needs completion", (uintptr_t)ux,
   1527 			    (uintptr_t)ux->ux_stdstart, 0, 0);
   1528 
   1529 			sqh->qh.qh_elink =
   1530 			    htole32(stat->physaddr | UHCI_PTR_TD);
   1531 			usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1532 			    BUS_DMASYNC_PREWRITE);
   1533 			break;
   1534 		}
   1535 
   1536 		/* We want short packets, and it is short: it's done */
   1537 		usb_syncmem(&std->dma,
   1538 		    std->offs + offsetof(uhci_td_t, td_token),
   1539 		    sizeof(std->td.td_token),
   1540 		    BUS_DMASYNC_POSTWRITE);
   1541 
   1542 		if ((status & UHCI_TD_SPD) &&
   1543 			UHCI_TD_GET_ACTLEN(status) <
   1544 			UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) {
   1545 			goto done;
   1546 		}
   1547 	}
   1548 }
   1549 
   1550 /* Called with USB lock held. */
   1551 void
   1552 uhci_idone(struct uhci_xfer *ux, ux_completeq_t *cqp)
   1553 {
   1554 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1555 	struct usbd_xfer *xfer = &ux->ux_xfer;
   1556 	uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer);
   1557 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   1558 	uhci_soft_td_t *std;
   1559 	uint32_t status = 0, nstatus;
   1560 	const bool polling __diagused = sc->sc_bus.ub_usepolling;
   1561 	int actlen;
   1562 
   1563 	KASSERT(polling || mutex_owned(&sc->sc_lock));
   1564 
   1565 	DPRINTFN(12, "ux=%#jx", (uintptr_t)ux, 0, 0, 0);
   1566 
   1567 	/*
   1568 	 * If software has completed it, either by cancellation
   1569 	 * or timeout, drop it on the floor.
   1570 	 */
   1571 	if (xfer->ux_status != USBD_IN_PROGRESS) {
   1572 		KASSERT(xfer->ux_status == USBD_CANCELLED ||
   1573 		    xfer->ux_status == USBD_TIMEOUT);
   1574 		DPRINTF("aborted xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   1575 		return;
   1576 	}
   1577 
   1578 	/*
   1579 	 * Cancel the timeout and the task, which have not yet
   1580 	 * run.  If they have already fired, at worst they are
   1581 	 * waiting for the lock.  They will see that the xfer
   1582 	 * is no longer in progress and give up.
   1583 	 */
   1584 	callout_stop(&xfer->ux_callout);
   1585 	usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask);
   1586 
   1587 #ifdef DIAGNOSTIC
   1588 #ifdef UHCI_DEBUG
   1589 	if (ux->ux_isdone) {
   1590 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   1591 		uhci_dump_ii(ux);
   1592 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   1593 	}
   1594 #endif
   1595 	KASSERT(!ux->ux_isdone);
   1596 	KASSERTMSG(!ux->ux_isdone, "xfer %p type %d status %d", xfer,
   1597 	    ux->ux_type, xfer->ux_status);
   1598 	ux->ux_isdone = true;
   1599 #endif
   1600 
   1601 	if (xfer->ux_nframes != 0) {
   1602 		/* Isoc transfer, do things differently. */
   1603 		uhci_soft_td_t **stds = upipe->isoc.stds;
   1604 		int i, n, nframes, len;
   1605 
   1606 		DPRINTFN(5, "ux=%#jx isoc ready", (uintptr_t)ux, 0, 0, 0);
   1607 
   1608 		nframes = xfer->ux_nframes;
   1609 		actlen = 0;
   1610 		n = ux->ux_curframe;
   1611 		for (i = 0; i < nframes; i++) {
   1612 			std = stds[n];
   1613 #ifdef UHCI_DEBUG
   1614 			if (uhcidebug >= 5) {
   1615 				DPRINTF("isoc TD %jd", i, 0, 0, 0);
   1616 				DPRINTF("--- dump start ---", 0, 0, 0, 0);
   1617 				uhci_dump_td(std);
   1618 				DPRINTF("--- dump end ---", 0, 0, 0, 0);
   1619 			}
   1620 #endif
   1621 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1622 				n = 0;
   1623 			usb_syncmem(&std->dma,
   1624 			    std->offs + offsetof(uhci_td_t, td_status),
   1625 			    sizeof(std->td.td_status),
   1626 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1627 			status = le32toh(std->td.td_status);
   1628 			len = UHCI_TD_GET_ACTLEN(status);
   1629 			xfer->ux_frlengths[i] = len;
   1630 			actlen += len;
   1631 		}
   1632 		upipe->isoc.inuse -= nframes;
   1633 		xfer->ux_actlen = actlen;
   1634 		xfer->ux_status = USBD_NORMAL_COMPLETION;
   1635 		goto end;
   1636 	}
   1637 
   1638 #ifdef UHCI_DEBUG
   1639 	DPRINTFN(10, "ux=%#jx, xfer=%#jx, pipe=%#jx ready", (uintptr_t)ux,
   1640 	    (uintptr_t)xfer, (uintptr_t)upipe, 0);
   1641 	if (uhcidebug >= 10) {
   1642 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   1643 		uhci_dump_tds(ux->ux_stdstart);
   1644 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   1645 	}
   1646 #endif
   1647 
   1648 	/* The transfer is done, compute actual length and status. */
   1649 	actlen = 0;
   1650 	for (std = ux->ux_stdstart; std != NULL; std = std->link.std) {
   1651 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1652 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1653 		nstatus = le32toh(std->td.td_status);
   1654 		if (nstatus & UHCI_TD_ACTIVE)
   1655 			break;
   1656 
   1657 		status = nstatus;
   1658 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1659 			UHCI_TD_PID_SETUP)
   1660 			actlen += UHCI_TD_GET_ACTLEN(status);
   1661 		else {
   1662 			/*
   1663 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1664 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1665 			 * CONTROL AND STATUS".
   1666 			 */
   1667 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1668 				status &= ~UHCI_TD_CRCTO;
   1669 		}
   1670 	}
   1671 	/* If there are left over TDs we need to update the toggle. */
   1672 	if (std != NULL)
   1673 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1674 
   1675 	status &= UHCI_TD_ERROR;
   1676 	DPRINTFN(10, "actlen=%jd, status=0x%jx", actlen, status, 0, 0);
   1677 	xfer->ux_actlen = actlen;
   1678 	if (status != 0) {
   1679 
   1680 		DPRINTFN((status == UHCI_TD_STALLED) * 10,
   1681 		    "error, addr=%jd, endpt=0x%02jx",
   1682 		    xfer->ux_pipe->up_dev->ud_addr,
   1683 		    xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress,
   1684 		    0, 0);
   1685 		DPRINTFN((status == UHCI_TD_STALLED) * 10,
   1686 		    "bitstuff=%jd crcto   =%jd nak     =%jd babble  =%jd",
   1687 		    !!(status & UHCI_TD_BITSTUFF),
   1688 		    !!(status & UHCI_TD_CRCTO),
   1689 		    !!(status & UHCI_TD_NAK),
   1690 		    !!(status & UHCI_TD_BABBLE));
   1691 		DPRINTFN((status == UHCI_TD_STALLED) * 10,
   1692 		    "dbuffer =%jd stalled =%jd active  =%jd",
   1693 		    !!(status & UHCI_TD_DBUFFER),
   1694 		    !!(status & UHCI_TD_STALLED),
   1695 		    !!(status & UHCI_TD_ACTIVE),
   1696 		    0);
   1697 
   1698 		if (status == UHCI_TD_STALLED)
   1699 			xfer->ux_status = USBD_STALLED;
   1700 		else
   1701 			xfer->ux_status = USBD_IOERROR; /* more info XXX */
   1702 	} else {
   1703 		xfer->ux_status = USBD_NORMAL_COMPLETION;
   1704 	}
   1705 
   1706  end:
   1707 	uhci_del_intr_list(sc, ux);
   1708 	if (cqp)
   1709 		TAILQ_INSERT_TAIL(cqp, ux, ux_list);
   1710 
   1711 	KASSERT(polling || mutex_owned(&sc->sc_lock));
   1712 	DPRINTFN(12, "ux=%#jx done", (uintptr_t)ux, 0, 0, 0);
   1713 }
   1714 
   1715 /*
   1716  * Called when a request does not complete.
   1717  */
   1718 void
   1719 uhci_timeout(void *addr)
   1720 {
   1721 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1722 	struct usbd_xfer *xfer = addr;
   1723 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   1724 	struct usbd_device *dev = xfer->ux_pipe->up_dev;
   1725 
   1726 	DPRINTF("xfer %#jx", (uintptr_t)xfer, 0, 0, 0);
   1727 
   1728 	mutex_enter(&sc->sc_lock);
   1729 	if (!sc->sc_dying && xfer->ux_status == USBD_IN_PROGRESS)
   1730 		usb_add_task(dev, &xfer->ux_aborttask, USB_TASKQ_HC);
   1731 	mutex_exit(&sc->sc_lock);
   1732 }
   1733 
   1734 void
   1735 uhci_timeout_task(void *addr)
   1736 {
   1737 	struct usbd_xfer *xfer = addr;
   1738 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   1739 
   1740 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1741 
   1742 	DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   1743 
   1744 	mutex_enter(&sc->sc_lock);
   1745 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1746 	mutex_exit(&sc->sc_lock);
   1747 }
   1748 
   1749 void
   1750 uhci_poll(struct usbd_bus *bus)
   1751 {
   1752 	uhci_softc_t *sc = UHCI_BUS2SC(bus);
   1753 
   1754 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1755 		mutex_spin_enter(&sc->sc_intr_lock);
   1756 		uhci_intr1(sc);
   1757 		mutex_spin_exit(&sc->sc_intr_lock);
   1758 	}
   1759 }
   1760 
   1761 void
   1762 uhci_reset(uhci_softc_t *sc)
   1763 {
   1764 	int n;
   1765 
   1766 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1767 	/* The reset bit goes low when the controller is done. */
   1768 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1769 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1770 		usb_delay_ms(&sc->sc_bus, 1);
   1771 	if (n >= UHCI_RESET_TIMEOUT)
   1772 		printf("%s: controller did not reset\n",
   1773 		       device_xname(sc->sc_dev));
   1774 }
   1775 
   1776 usbd_status
   1777 uhci_run(uhci_softc_t *sc, int run, int locked)
   1778 {
   1779 	int n, running;
   1780 	uint16_t cmd;
   1781 
   1782 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1783 
   1784 	run = run != 0;
   1785 	if (!locked)
   1786 		mutex_spin_enter(&sc->sc_intr_lock);
   1787 
   1788 	DPRINTF("setting run=%jd", run, 0, 0, 0);
   1789 	cmd = UREAD2(sc, UHCI_CMD);
   1790 	if (run)
   1791 		cmd |= UHCI_CMD_RS;
   1792 	else
   1793 		cmd &= ~UHCI_CMD_RS;
   1794 	UHCICMD(sc, cmd);
   1795 	for (n = 0; n < 10; n++) {
   1796 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1797 		/* return when we've entered the state we want */
   1798 		if (run == running) {
   1799 			if (!locked)
   1800 				mutex_spin_exit(&sc->sc_intr_lock);
   1801 			DPRINTF("done cmd=0x%jx sts=0x%jx",
   1802 			    UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS), 0, 0);
   1803 			return USBD_NORMAL_COMPLETION;
   1804 		}
   1805 		usb_delay_ms_locked(&sc->sc_bus, 1, &sc->sc_intr_lock);
   1806 	}
   1807 	if (!locked)
   1808 		mutex_spin_exit(&sc->sc_intr_lock);
   1809 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
   1810 	       run ? "start" : "stop");
   1811 	return USBD_IOERROR;
   1812 }
   1813 
   1814 /*
   1815  * Memory management routines.
   1816  *  uhci_alloc_std allocates TDs
   1817  *  uhci_alloc_sqh allocates QHs
   1818  * These two routines do their own free list management,
   1819  * partly for speed, partly because allocating DMAable memory
   1820  * has page size granularity so much memory would be wasted if
   1821  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1822  */
   1823 
   1824 uhci_soft_td_t *
   1825 uhci_alloc_std(uhci_softc_t *sc)
   1826 {
   1827 	uhci_soft_td_t *std;
   1828 	usbd_status err;
   1829 	int i, offs;
   1830 	usb_dma_t dma;
   1831 
   1832 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1833 
   1834 	mutex_enter(&sc->sc_lock);
   1835 	if (sc->sc_freetds == NULL) {
   1836 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
   1837 		mutex_exit(&sc->sc_lock);
   1838 
   1839 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1840 			  UHCI_TD_ALIGN, &dma);
   1841 		if (err)
   1842 			return NULL;
   1843 
   1844 		mutex_enter(&sc->sc_lock);
   1845 		for (i = 0; i < UHCI_STD_CHUNK; i++) {
   1846 			offs = i * UHCI_STD_SIZE;
   1847 			std = KERNADDR(&dma, offs);
   1848 			std->physaddr = DMAADDR(&dma, offs);
   1849 			std->dma = dma;
   1850 			std->offs = offs;
   1851 			std->link.std = sc->sc_freetds;
   1852 			sc->sc_freetds = std;
   1853 		}
   1854 	}
   1855 	std = sc->sc_freetds;
   1856 	sc->sc_freetds = std->link.std;
   1857 	mutex_exit(&sc->sc_lock);
   1858 
   1859 	memset(&std->td, 0, sizeof(uhci_td_t));
   1860 
   1861 	return std;
   1862 }
   1863 
   1864 #define TD_IS_FREE 0x12345678
   1865 
   1866 void
   1867 uhci_free_std_locked(uhci_softc_t *sc, uhci_soft_td_t *std)
   1868 {
   1869 	KASSERT(mutex_owned(&sc->sc_lock));
   1870 
   1871 #ifdef DIAGNOSTIC
   1872 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1873 		printf("%s: freeing free TD %p\n", __func__, std);
   1874 		return;
   1875 	}
   1876 	std->td.td_token = htole32(TD_IS_FREE);
   1877 #endif
   1878 
   1879 	std->link.std = sc->sc_freetds;
   1880 	sc->sc_freetds = std;
   1881 }
   1882 
   1883 void
   1884 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1885 {
   1886 	mutex_enter(&sc->sc_lock);
   1887 	uhci_free_std_locked(sc, std);
   1888 	mutex_exit(&sc->sc_lock);
   1889 }
   1890 
   1891 uhci_soft_qh_t *
   1892 uhci_alloc_sqh(uhci_softc_t *sc)
   1893 {
   1894 	uhci_soft_qh_t *sqh;
   1895 	usbd_status err;
   1896 	int i, offs;
   1897 	usb_dma_t dma;
   1898 
   1899 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1900 
   1901 	mutex_enter(&sc->sc_lock);
   1902 	if (sc->sc_freeqhs == NULL) {
   1903 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
   1904 		mutex_exit(&sc->sc_lock);
   1905 
   1906 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1907 			  UHCI_QH_ALIGN, &dma);
   1908 		if (err)
   1909 			return NULL;
   1910 
   1911 		mutex_enter(&sc->sc_lock);
   1912 		for (i = 0; i < UHCI_SQH_CHUNK; i++) {
   1913 			offs = i * UHCI_SQH_SIZE;
   1914 			sqh = KERNADDR(&dma, offs);
   1915 			sqh->physaddr = DMAADDR(&dma, offs);
   1916 			sqh->dma = dma;
   1917 			sqh->offs = offs;
   1918 			sqh->hlink = sc->sc_freeqhs;
   1919 			sc->sc_freeqhs = sqh;
   1920 		}
   1921 	}
   1922 	sqh = sc->sc_freeqhs;
   1923 	sc->sc_freeqhs = sqh->hlink;
   1924 	mutex_exit(&sc->sc_lock);
   1925 
   1926 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1927 
   1928 	return sqh;
   1929 }
   1930 
   1931 void
   1932 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1933 {
   1934 	KASSERT(mutex_owned(&sc->sc_lock));
   1935 
   1936 	sqh->hlink = sc->sc_freeqhs;
   1937 	sc->sc_freeqhs = sqh;
   1938 }
   1939 
   1940 #if 0
   1941 void
   1942 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1943 		    uhci_soft_td_t *stdend)
   1944 {
   1945 	uhci_soft_td_t *p;
   1946 	uint32_t td_link;
   1947 
   1948 	/*
   1949 	 * to avoid race condition with the controller which may be looking
   1950 	 * at this chain, we need to first invalidate all links, and
   1951 	 * then wait for the controller to move to another queue
   1952 	 */
   1953 	for (p = std; p != stdend; p = p->link.std) {
   1954 		usb_syncmem(&p->dma,
   1955 		    p->offs + offsetof(uhci_td_t, td_link),
   1956 		    sizeof(p->td.td_link),
   1957 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1958 		td_link = le32toh(p->td.td_link);
   1959 		usb_syncmem(&p->dma,
   1960 		    p->offs + offsetof(uhci_td_t, td_link),
   1961 		    sizeof(p->td.td_link),
   1962 		    BUS_DMASYNC_PREREAD);
   1963 		if ((td_link & UHCI_PTR_T) == 0) {
   1964 			p->td.td_link = htole32(UHCI_PTR_T);
   1965 			usb_syncmem(&p->dma,
   1966 			    p->offs + offsetof(uhci_td_t, td_link),
   1967 			    sizeof(p->td.td_link),
   1968 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1969 		}
   1970 	}
   1971 	delay(UHCI_QH_REMOVE_DELAY);
   1972 
   1973 	for (; std != stdend; std = p) {
   1974 		p = std->link.std;
   1975 		uhci_free_std(sc, std);
   1976 	}
   1977 }
   1978 #endif
   1979 
   1980 int
   1981 uhci_alloc_std_chain(uhci_softc_t *sc, struct usbd_xfer *xfer, int len,
   1982     int rd, uhci_soft_td_t **sp)
   1983 {
   1984 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   1985 	uint16_t flags = xfer->ux_flags;
   1986 	uhci_soft_td_t *p;
   1987 
   1988 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   1989 
   1990 	DPRINTFN(8, "xfer=%#jx pipe=%#jx", (uintptr_t)xfer,
   1991 	    (uintptr_t)xfer->ux_pipe, 0, 0);
   1992 
   1993 	ASSERT_SLEEPABLE();
   1994 	KASSERT(sp);
   1995 
   1996 	int maxp = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize);
   1997 	if (maxp == 0) {
   1998 		printf("%s: maxp=0\n", __func__);
   1999 		return EINVAL;
   2000 	}
   2001 	size_t ntd = (len + maxp - 1) / maxp;
   2002 	if (!rd && (flags & USBD_FORCE_SHORT_XFER)) {
   2003 		ntd++;
   2004 	}
   2005 	DPRINTFN(10, "maxp=%jd ntd=%jd", maxp, ntd, 0, 0);
   2006 
   2007 	uxfer->ux_stds = NULL;
   2008 	uxfer->ux_nstd = ntd;
   2009 	if (ntd == 0) {
   2010 		*sp = NULL;
   2011 		DPRINTF("ntd=0", 0, 0, 0, 0);
   2012 		return 0;
   2013 	}
   2014 	uxfer->ux_stds = kmem_alloc(sizeof(uhci_soft_td_t *) * ntd,
   2015 	    KM_SLEEP);
   2016 
   2017 	for (int i = 0; i < ntd; i++) {
   2018 		p = uhci_alloc_std(sc);
   2019 		if (p == NULL) {
   2020 			if (i != 0) {
   2021 				uxfer->ux_nstd = i;
   2022 				uhci_free_stds(sc, uxfer);
   2023 			}
   2024 			kmem_free(uxfer->ux_stds,
   2025 			    sizeof(uhci_soft_td_t *) * ntd);
   2026 			return ENOMEM;
   2027 		}
   2028 		uxfer->ux_stds[i] = p;
   2029 	}
   2030 
   2031 	*sp = uxfer->ux_stds[0];
   2032 
   2033 	return 0;
   2034 }
   2035 
   2036 Static void
   2037 uhci_free_stds(uhci_softc_t *sc, struct uhci_xfer *ux)
   2038 {
   2039 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2040 
   2041 	DPRINTFN(8, "ux=%#jx", (uintptr_t)ux, 0, 0, 0);
   2042 
   2043 	mutex_enter(&sc->sc_lock);
   2044 	for (size_t i = 0; i < ux->ux_nstd; i++) {
   2045 		uhci_soft_td_t *std = ux->ux_stds[i];
   2046 #ifdef DIAGNOSTIC
   2047 		if (le32toh(std->td.td_token) == TD_IS_FREE) {
   2048 			printf("%s: freeing free TD %p\n", __func__, std);
   2049 			return;
   2050 		}
   2051 		std->td.td_token = htole32(TD_IS_FREE);
   2052 #endif
   2053 		ux->ux_stds[i]->link.std = sc->sc_freetds;
   2054 		sc->sc_freetds = std;
   2055 	}
   2056 	mutex_exit(&sc->sc_lock);
   2057 }
   2058 
   2059 
   2060 Static void
   2061 uhci_reset_std_chain(uhci_softc_t *sc, struct usbd_xfer *xfer,
   2062     int length, int isread, int *toggle, uhci_soft_td_t **lstd)
   2063 {
   2064 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   2065 	struct usbd_pipe *pipe = xfer->ux_pipe;
   2066 	usb_dma_t *dma = &xfer->ux_dmabuf;
   2067 	uint16_t flags = xfer->ux_flags;
   2068 	uhci_soft_td_t *std, *prev;
   2069 	int len = length;
   2070 	int tog = *toggle;
   2071 	int maxp;
   2072 	uint32_t status;
   2073 	size_t i;
   2074 
   2075 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2076 	DPRINTFN(8, "xfer=%#jx len %jd isread %jd toggle %jd", (uintptr_t)xfer,
   2077 	    len, isread, *toggle);
   2078 
   2079 	KASSERT(len != 0 || (!isread && (flags & USBD_FORCE_SHORT_XFER)));
   2080 
   2081 	maxp = UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize);
   2082 	KASSERT(maxp != 0);
   2083 
   2084 	int addr = xfer->ux_pipe->up_dev->ud_addr;
   2085 	int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   2086 
   2087 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   2088 	if (pipe->up_dev->ud_speed == USB_SPEED_LOW)
   2089 		status |= UHCI_TD_LS;
   2090 	if (flags & USBD_SHORT_XFER_OK)
   2091 		status |= UHCI_TD_SPD;
   2092 	usb_syncmem(dma, 0, len,
   2093 	    isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2094 	std = prev = NULL;
   2095 	for (i = 0; len != 0 && i < uxfer->ux_nstd; i++, prev = std) {
   2096 		int l = len;
   2097 		std = uxfer->ux_stds[i];
   2098 		if (l > maxp)
   2099 			l = maxp;
   2100 
   2101 		if (prev) {
   2102 			prev->link.std = std;
   2103 			prev->td.td_link = htole32(
   2104 			    std->physaddr | UHCI_PTR_VF | UHCI_PTR_TD
   2105 			    );
   2106 			usb_syncmem(&prev->dma, prev->offs, sizeof(prev->td),
   2107 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2108 		}
   2109 
   2110 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2111 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2112 
   2113 		std->td.td_link = htole32(UHCI_PTR_T | UHCI_PTR_VF | UHCI_PTR_TD);
   2114 		std->td.td_status = htole32(status);
   2115 		std->td.td_token = htole32(
   2116 		    UHCI_TD_SET_ENDPT(UE_GET_ADDR(endpt)) |
   2117 		    UHCI_TD_SET_DEVADDR(addr) |
   2118 		    UHCI_TD_SET_PID(isread ? UHCI_TD_PID_IN : UHCI_TD_PID_OUT) |
   2119 		    UHCI_TD_SET_DT(tog) |
   2120 		    UHCI_TD_SET_MAXLEN(l)
   2121 		    );
   2122 		std->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   2123 
   2124 		std->link.std = NULL;
   2125 
   2126 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2127 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2128 		tog ^= 1;
   2129 
   2130 		len -= l;
   2131 	}
   2132 	KASSERTMSG(len == 0, "xfer %p alen %d len %d mps %d ux_nqtd %zu i %zu",
   2133 	    xfer, length, len, maxp, uxfer->ux_nstd, i);
   2134 
   2135 	if (!isread &&
   2136 	    (flags & USBD_FORCE_SHORT_XFER) &&
   2137 	    length % maxp == 0) {
   2138 		/* Force a 0 length transfer at the end. */
   2139 		KASSERTMSG(i < uxfer->ux_nstd, "i=%zu nstd=%zu", i,
   2140 		    uxfer->ux_nstd);
   2141 		std = uxfer->ux_stds[i++];
   2142 
   2143 		std->td.td_link = htole32(UHCI_PTR_T | UHCI_PTR_VF | UHCI_PTR_TD);
   2144 		std->td.td_status = htole32(status);
   2145 		std->td.td_token = htole32(
   2146 		    UHCI_TD_SET_ENDPT(UE_GET_ADDR(endpt)) |
   2147 		    UHCI_TD_SET_DEVADDR(addr) |
   2148 		    UHCI_TD_SET_PID(UHCI_TD_PID_OUT) |
   2149 		    UHCI_TD_SET_DT(tog) |
   2150 		    UHCI_TD_SET_MAXLEN(0)
   2151 		    );
   2152 		std->td.td_buffer = 0;
   2153 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2154 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2155 
   2156 		std->link.std = NULL;
   2157 		if (prev) {
   2158 			prev->link.std = std;
   2159 			prev->td.td_link = htole32(
   2160 			    std->physaddr | UHCI_PTR_VF | UHCI_PTR_TD
   2161 			    );
   2162 			usb_syncmem(&prev->dma, prev->offs, sizeof(prev->td),
   2163 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2164 		}
   2165 		tog ^= 1;
   2166 	}
   2167 	*lstd = std;
   2168 	*toggle = tog;
   2169 }
   2170 
   2171 void
   2172 uhci_device_clear_toggle(struct usbd_pipe *pipe)
   2173 {
   2174 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   2175 	upipe->nexttoggle = 0;
   2176 }
   2177 
   2178 void
   2179 uhci_noop(struct usbd_pipe *pipe)
   2180 {
   2181 }
   2182 
   2183 int
   2184 uhci_device_bulk_init(struct usbd_xfer *xfer)
   2185 {
   2186 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2187 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   2188 	usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc;
   2189 	int endpt = ed->bEndpointAddress;
   2190 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2191 	int len = xfer->ux_bufsize;
   2192 	int err = 0;
   2193 
   2194 
   2195 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2196 	DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer, len,
   2197 	    xfer->ux_flags, 0);
   2198 
   2199 	if (sc->sc_dying)
   2200 		return USBD_IOERROR;
   2201 
   2202 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2203 
   2204 	uxfer->ux_type = UX_BULK;
   2205 	err = uhci_alloc_std_chain(sc, xfer, len, isread, &uxfer->ux_stdstart);
   2206 	if (err)
   2207 		return err;
   2208 
   2209 #ifdef UHCI_DEBUG
   2210 	if (uhcidebug >= 10) {
   2211 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2212 		uhci_dump_tds(uxfer->ux_stdstart);
   2213 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2214 	}
   2215 #endif
   2216 
   2217 	return 0;
   2218 }
   2219 
   2220 Static void
   2221 uhci_device_bulk_fini(struct usbd_xfer *xfer)
   2222 {
   2223 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2224 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2225 
   2226 	KASSERT(ux->ux_type == UX_BULK);
   2227 
   2228 	if (ux->ux_nstd) {
   2229 		uhci_free_stds(sc, ux);
   2230 		kmem_free(ux->ux_stds, sizeof(uhci_soft_td_t *) * ux->ux_nstd);
   2231 	}
   2232 }
   2233 
   2234 usbd_status
   2235 uhci_device_bulk_transfer(struct usbd_xfer *xfer)
   2236 {
   2237 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2238 	usbd_status err;
   2239 
   2240 	/* Insert last in queue. */
   2241 	mutex_enter(&sc->sc_lock);
   2242 	err = usb_insert_transfer(xfer);
   2243 	mutex_exit(&sc->sc_lock);
   2244 	if (err)
   2245 		return err;
   2246 
   2247 	/*
   2248 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2249 	 * so start it first.
   2250 	 */
   2251 	return uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2252 }
   2253 
   2254 usbd_status
   2255 uhci_device_bulk_start(struct usbd_xfer *xfer)
   2256 {
   2257 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2258 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2259 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2260 	uhci_soft_td_t *data, *dataend;
   2261 	uhci_soft_qh_t *sqh;
   2262 	const bool polling = sc->sc_bus.ub_usepolling;
   2263 	int len;
   2264 	int endpt;
   2265 	int isread;
   2266 
   2267 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2268 	DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer,
   2269 	    xfer->ux_length, xfer->ux_flags, 0);
   2270 
   2271 	if (sc->sc_dying)
   2272 		return USBD_IOERROR;
   2273 
   2274 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2275 	KASSERT(xfer->ux_length <= xfer->ux_bufsize);
   2276 
   2277 	len = xfer->ux_length;
   2278 	endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2279 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2280 	sqh = upipe->bulk.sqh;
   2281 
   2282 	/* Take lock here to protect nexttoggle */
   2283 	if (!polling)
   2284 		mutex_enter(&sc->sc_lock);
   2285 
   2286 	uhci_reset_std_chain(sc, xfer, len, isread, &upipe->nexttoggle,
   2287 	    &dataend);
   2288 
   2289 	data = ux->ux_stdstart;
   2290 	ux->ux_stdend = dataend;
   2291 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2292 	usb_syncmem(&dataend->dma,
   2293 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2294 	    sizeof(dataend->td.td_status),
   2295 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2296 
   2297 #ifdef UHCI_DEBUG
   2298 	if (uhcidebug >= 10) {
   2299 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2300 		DPRINTFN(10, "before transfer", 0, 0, 0, 0);
   2301 		uhci_dump_tds(data);
   2302 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2303 	}
   2304 #endif
   2305 
   2306 	KASSERT(ux->ux_isdone);
   2307 #ifdef DIAGNOSTIC
   2308 	ux->ux_isdone = false;
   2309 #endif
   2310 
   2311 	sqh->elink = data;
   2312 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2313 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2314 
   2315 	uhci_add_bulk(sc, sqh);
   2316 	uhci_add_intr_list(sc, ux);
   2317 
   2318 	if (xfer->ux_timeout && !polling) {
   2319 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   2320 			    uhci_timeout, xfer);
   2321 	}
   2322 	xfer->ux_status = USBD_IN_PROGRESS;
   2323 	if (!polling)
   2324 		mutex_exit(&sc->sc_lock);
   2325 
   2326 	return USBD_IN_PROGRESS;
   2327 }
   2328 
   2329 /* Abort a device bulk request. */
   2330 void
   2331 uhci_device_bulk_abort(struct usbd_xfer *xfer)
   2332 {
   2333 	uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer);
   2334 
   2335 	KASSERT(mutex_owned(&sc->sc_lock));
   2336 
   2337 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2338 
   2339 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2340 }
   2341 
   2342 /*
   2343  * Cancel or timeout a device request.  We have two cases to deal with
   2344  *
   2345  * 1) A driver wants to stop scheduled or inflight transfers
   2346  * 2) A transfer has timed out
   2347  *
   2348  * It's impossible to guarantee that the requested transfer will not
   2349  * have (partially) happened since the hardware runs concurrently.
   2350  *
   2351  * Transfer state is protected by the bus lock and we set the transfer status
   2352  * as soon as either of the above happens (with bus lock held).
   2353  *
   2354  * To allow the hardware time to notice we simply wait.
   2355  */
   2356 void
   2357 uhci_abort_xfer(struct usbd_xfer *xfer, usbd_status status)
   2358 {
   2359 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2360 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2361 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2362 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2363 	uhci_soft_td_t *std;
   2364 
   2365 	KASSERTMSG((status == USBD_CANCELLED || status == USBD_TIMEOUT),
   2366 	    "invalid status for abort: %d", (int)status);
   2367 
   2368 	DPRINTFN(1,"xfer=%#jx, status=%jd", (uintptr_t)xfer, status, 0, 0);
   2369 
   2370 	KASSERT(mutex_owned(&sc->sc_lock));
   2371 	ASSERT_SLEEPABLE();
   2372 
   2373 	if (status == USBD_CANCELLED) {
   2374 		/*
   2375 		 * We are synchronously aborting.  Try to stop the
   2376 		 * callout and task, but if we can't, wait for them to
   2377 		 * complete.
   2378 		 */
   2379 		callout_halt(&xfer->ux_callout, &sc->sc_lock);
   2380 		usb_rem_task_wait(xfer->ux_pipe->up_dev, &xfer->ux_aborttask,
   2381 		    USB_TASKQ_HC, &sc->sc_lock);
   2382 	} else {
   2383 		/* Otherwise, we are timing out.  */
   2384 		KASSERT(status == USBD_TIMEOUT);
   2385 	}
   2386 
   2387 	/*
   2388 	 * The xfer cannot have been cancelled already.  It is the
   2389 	 * responsibility of the caller of usbd_abort_pipe not to try
   2390 	 * to abort a pipe multiple times, whether concurrently or
   2391 	 * sequentially.
   2392 	 */
   2393 	KASSERT(xfer->ux_status != USBD_CANCELLED);
   2394 
   2395 	/* Only the timeout, which runs only once, can time it out.  */
   2396 	KASSERT(xfer->ux_status != USBD_TIMEOUT);
   2397 
   2398 	/* If anyone else beat us, we're done.  */
   2399 	if (xfer->ux_status != USBD_IN_PROGRESS)
   2400 		return;
   2401 
   2402 	/* We beat everyone else.  Claim the status.  */
   2403 	xfer->ux_status = status;
   2404 
   2405 	/*
   2406 	 * If we're dying, skip the hardware action and just notify the
   2407 	 * software that we're done.
   2408 	 */
   2409 	if (sc->sc_dying) {
   2410 		DPRINTFN(4, "xfer %#jx dying %ju", (uintptr_t)xfer,
   2411 		    xfer->ux_status, 0, 0);
   2412 		goto dying;
   2413 	}
   2414 
   2415 	/*
   2416 	 * HC Step 1: Make interrupt routine and hardware ignore xfer.
   2417 	 */
   2418 	uhci_del_intr_list(sc, ux);
   2419 
   2420 	DPRINTF("stop ux=%#jx", (uintptr_t)ux, 0, 0, 0);
   2421 	for (std = ux->ux_stdstart; std != NULL; std = std->link.std) {
   2422 		usb_syncmem(&std->dma,
   2423 		    std->offs + offsetof(uhci_td_t, td_status),
   2424 		    sizeof(std->td.td_status),
   2425 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2426 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2427 		usb_syncmem(&std->dma,
   2428 		    std->offs + offsetof(uhci_td_t, td_status),
   2429 		    sizeof(std->td.td_status),
   2430 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2431 	}
   2432 
   2433 	/*
   2434 	 * HC Step 2: Wait until we know hardware has finished any possible
   2435 	 * use of the xfer.
   2436 	 */
   2437 	/* Hardware finishes in 1ms */
   2438 	usb_delay_ms_locked(upipe->pipe.up_dev->ud_bus, 2, &sc->sc_lock);
   2439 
   2440 	/*
   2441 	 * HC Step 3: Notify completion to waiting xfers.
   2442 	 */
   2443 dying:
   2444 #ifdef DIAGNOSTIC
   2445 	ux->ux_isdone = true;
   2446 #endif
   2447 	usb_transfer_complete(xfer);
   2448 	DPRINTFN(14, "end", 0, 0, 0, 0);
   2449 
   2450 	KASSERT(mutex_owned(&sc->sc_lock));
   2451 }
   2452 
   2453 /* Close a device bulk pipe. */
   2454 void
   2455 uhci_device_bulk_close(struct usbd_pipe *pipe)
   2456 {
   2457 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   2458 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   2459 
   2460 	KASSERT(mutex_owned(&sc->sc_lock));
   2461 
   2462 	uhci_free_sqh(sc, upipe->bulk.sqh);
   2463 
   2464 	pipe->up_endpoint->ue_toggle = upipe->nexttoggle;
   2465 }
   2466 
   2467 int
   2468 uhci_device_ctrl_init(struct usbd_xfer *xfer)
   2469 {
   2470 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   2471 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2472 	usb_device_request_t *req = &xfer->ux_request;
   2473 	struct usbd_device *dev = upipe->pipe.up_dev;
   2474 	uhci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2475 	uhci_soft_td_t *data = NULL;
   2476 	int len;
   2477 	usbd_status err;
   2478 	int isread;
   2479 
   2480 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2481 	DPRINTFN(3, "xfer=%#jx len=%jd, addr=%jd, endpt=%jd",
   2482 	    (uintptr_t)xfer, xfer->ux_bufsize, dev->ud_addr,
   2483 	    upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress);
   2484 
   2485 	isread = req->bmRequestType & UT_READ;
   2486 	len = xfer->ux_bufsize;
   2487 
   2488 	uxfer->ux_type = UX_CTRL;
   2489 	/* Set up data transaction */
   2490 	if (len != 0) {
   2491 		err = uhci_alloc_std_chain(sc, xfer, len, isread, &data);
   2492 		if (err)
   2493 			return err;
   2494 	}
   2495 	/* Set up interrupt info. */
   2496 	uxfer->ux_setup = upipe->ctrl.setup;
   2497 	uxfer->ux_stat = upipe->ctrl.stat;
   2498 	uxfer->ux_data = data;
   2499 
   2500 	return 0;
   2501 }
   2502 
   2503 Static void
   2504 uhci_device_ctrl_fini(struct usbd_xfer *xfer)
   2505 {
   2506 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2507 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2508 
   2509 	KASSERT(ux->ux_type == UX_CTRL);
   2510 
   2511 	if (ux->ux_nstd) {
   2512 		uhci_free_stds(sc, ux);
   2513 		kmem_free(ux->ux_stds, sizeof(uhci_soft_td_t *) * ux->ux_nstd);
   2514 	}
   2515 }
   2516 
   2517 usbd_status
   2518 uhci_device_ctrl_transfer(struct usbd_xfer *xfer)
   2519 {
   2520 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2521 	usbd_status err;
   2522 
   2523 	/* Insert last in queue. */
   2524 	mutex_enter(&sc->sc_lock);
   2525 	err = usb_insert_transfer(xfer);
   2526 	mutex_exit(&sc->sc_lock);
   2527 	if (err)
   2528 		return err;
   2529 
   2530 	/*
   2531 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2532 	 * so start it first.
   2533 	 */
   2534 	return uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2535 }
   2536 
   2537 usbd_status
   2538 uhci_device_ctrl_start(struct usbd_xfer *xfer)
   2539 {
   2540 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2541 	struct uhci_xfer *uxfer = UHCI_XFER2UXFER(xfer);
   2542 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2543 	usb_device_request_t *req = &xfer->ux_request;
   2544 	struct usbd_device *dev = upipe->pipe.up_dev;
   2545 	int addr = dev->ud_addr;
   2546 	int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2547 	uhci_soft_td_t *setup, *stat, *next, *dataend;
   2548 	uhci_soft_qh_t *sqh;
   2549 	const bool polling = sc->sc_bus.ub_usepolling;
   2550 	int len;
   2551 	int isread;
   2552 
   2553 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2554 
   2555 	if (sc->sc_dying)
   2556 		return USBD_IOERROR;
   2557 
   2558 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   2559 
   2560 	DPRINTFN(3, "type=0x%02jx, request=0x%02jx, "
   2561 	    "wValue=0x%04jx, wIndex=0x%04jx",
   2562 	    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2563 	    UGETW(req->wIndex));
   2564 	DPRINTFN(3, "len=%jd, addr=%jd, endpt=%jd",
   2565 	    UGETW(req->wLength), dev->ud_addr, endpt, 0);
   2566 
   2567 	isread = req->bmRequestType & UT_READ;
   2568 	len = UGETW(req->wLength);
   2569 
   2570 	setup = upipe->ctrl.setup;
   2571 	stat = upipe->ctrl.stat;
   2572 	sqh = upipe->ctrl.sqh;
   2573 
   2574 	memcpy(KERNADDR(&upipe->ctrl.reqdma, 0), req, sizeof(*req));
   2575 	usb_syncmem(&upipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE);
   2576 
   2577 	if (!polling)
   2578 		mutex_enter(&sc->sc_lock);
   2579 
   2580 	/* Set up data transaction */
   2581 	if (len != 0) {
   2582 		upipe->nexttoggle = 1;
   2583 		next = uxfer->ux_data;
   2584 		uhci_reset_std_chain(sc, xfer, len, isread,
   2585 		    &upipe->nexttoggle, &dataend);
   2586 		dataend->link.std = stat;
   2587 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_TD);
   2588 		usb_syncmem(&dataend->dma,
   2589 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2590 		    sizeof(dataend->td.td_link),
   2591 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2592 	} else {
   2593 		next = stat;
   2594 	}
   2595 
   2596 	const uint32_t status = UHCI_TD_ZERO_ACTLEN(
   2597 	    UHCI_TD_SET_ERRCNT(3) |
   2598 	    UHCI_TD_ACTIVE |
   2599 	    (dev->ud_speed == USB_SPEED_LOW ? UHCI_TD_LS : 0)
   2600 	    );
   2601 	setup->link.std = next;
   2602 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_TD);
   2603 	setup->td.td_status = htole32(status);
   2604 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof(*req), endpt, addr));
   2605 	setup->td.td_buffer = htole32(DMAADDR(&upipe->ctrl.reqdma, 0));
   2606 
   2607 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2608 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2609 
   2610 	stat->link.std = NULL;
   2611 	stat->td.td_link = htole32(UHCI_PTR_T);
   2612 	stat->td.td_status = htole32(status | UHCI_TD_IOC);
   2613 	stat->td.td_token =
   2614 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2615 				 UHCI_TD_IN (0, endpt, addr, 1));
   2616 	stat->td.td_buffer = htole32(0);
   2617 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2618 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2619 
   2620 #ifdef UHCI_DEBUG
   2621 	if (uhcidebug >= 10) {
   2622 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2623 		DPRINTF("before transfer", 0, 0, 0, 0);
   2624 		uhci_dump_tds(setup);
   2625 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2626 	}
   2627 #endif
   2628 
   2629 	/* Set up interrupt info. */
   2630 	uxfer->ux_setup = setup;
   2631 	uxfer->ux_stat = stat;
   2632 	KASSERT(uxfer->ux_isdone);
   2633 #ifdef DIAGNOSTIC
   2634 	uxfer->ux_isdone = false;
   2635 #endif
   2636 
   2637 	sqh->elink = setup;
   2638 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2639 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2640 
   2641 	if (dev->ud_speed == USB_SPEED_LOW)
   2642 		uhci_add_ls_ctrl(sc, sqh);
   2643 	else
   2644 		uhci_add_hs_ctrl(sc, sqh);
   2645 	uhci_add_intr_list(sc, uxfer);
   2646 #ifdef UHCI_DEBUG
   2647 	if (uhcidebug >= 12) {
   2648 		uhci_soft_td_t *std;
   2649 		uhci_soft_qh_t *xqh;
   2650 		uhci_soft_qh_t *sxqh;
   2651 		int maxqh = 0;
   2652 		uhci_physaddr_t link;
   2653 		DPRINTFN(12, "--- dump start ---", 0, 0, 0, 0);
   2654 		DPRINTFN(12, "follow from [0]", 0, 0, 0, 0);
   2655 		for (std = sc->sc_vframes[0].htd, link = 0;
   2656 		     (link & UHCI_PTR_QH) == 0;
   2657 		     std = std->link.std) {
   2658 			link = le32toh(std->td.td_link);
   2659 			uhci_dump_td(std);
   2660 		}
   2661 		sxqh = (uhci_soft_qh_t *)std;
   2662 		uhci_dump_qh(sxqh);
   2663 		for (xqh = sxqh;
   2664 		     xqh != NULL;
   2665 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2666 			xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2667 			uhci_dump_qh(xqh);
   2668 		}
   2669 		DPRINTFN(12, "Enqueued QH:", 0, 0, 0, 0);
   2670 		uhci_dump_qh(sqh);
   2671 		uhci_dump_tds(sqh->elink);
   2672 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2673 	}
   2674 #endif
   2675 	if (xfer->ux_timeout && !polling) {
   2676 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   2677 			    uhci_timeout, xfer);
   2678 	}
   2679 	xfer->ux_status = USBD_IN_PROGRESS;
   2680 	if (!polling)
   2681 		mutex_exit(&sc->sc_lock);
   2682 
   2683 	return USBD_IN_PROGRESS;
   2684 }
   2685 
   2686 int
   2687 uhci_device_intr_init(struct usbd_xfer *xfer)
   2688 {
   2689 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2690 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2691 	usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc;
   2692 	int endpt = ed->bEndpointAddress;
   2693 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2694 	int len = xfer->ux_bufsize;
   2695 	int err;
   2696 
   2697 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2698 
   2699 	DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer,
   2700 	    xfer->ux_length, xfer->ux_flags, 0);
   2701 
   2702 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2703 	KASSERT(len != 0);
   2704 
   2705 	ux->ux_type = UX_INTR;
   2706 	ux->ux_nstd = 0;
   2707 	err = uhci_alloc_std_chain(sc, xfer, len, isread, &ux->ux_stdstart);
   2708 
   2709 	return err;
   2710 }
   2711 
   2712 Static void
   2713 uhci_device_intr_fini(struct usbd_xfer *xfer)
   2714 {
   2715 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2716 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2717 
   2718 	KASSERT(ux->ux_type == UX_INTR);
   2719 
   2720 	if (ux->ux_nstd) {
   2721 		uhci_free_stds(sc, ux);
   2722 		kmem_free(ux->ux_stds, sizeof(uhci_soft_td_t *) * ux->ux_nstd);
   2723 	}
   2724 }
   2725 
   2726 usbd_status
   2727 uhci_device_intr_transfer(struct usbd_xfer *xfer)
   2728 {
   2729 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2730 	usbd_status err;
   2731 
   2732 	/* Insert last in queue. */
   2733 	mutex_enter(&sc->sc_lock);
   2734 	err = usb_insert_transfer(xfer);
   2735 	mutex_exit(&sc->sc_lock);
   2736 	if (err)
   2737 		return err;
   2738 
   2739 	/*
   2740 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2741 	 * so start it first.
   2742 	 */
   2743 	return uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2744 }
   2745 
   2746 usbd_status
   2747 uhci_device_intr_start(struct usbd_xfer *xfer)
   2748 {
   2749 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2750 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2751 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2752 	uhci_soft_td_t *data, *dataend;
   2753 	uhci_soft_qh_t *sqh;
   2754 	const bool polling = sc->sc_bus.ub_usepolling;
   2755 	int isread, endpt;
   2756 	int i;
   2757 
   2758 	if (sc->sc_dying)
   2759 		return USBD_IOERROR;
   2760 
   2761 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2762 
   2763 	DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer,
   2764 	    xfer->ux_length, xfer->ux_flags, 0);
   2765 
   2766 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2767 	KASSERT(xfer->ux_length <= xfer->ux_bufsize);
   2768 
   2769 	endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   2770 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2771 
   2772 	data = ux->ux_stdstart;
   2773 
   2774 	KASSERT(ux->ux_isdone);
   2775 #ifdef DIAGNOSTIC
   2776 	ux->ux_isdone = false;
   2777 #endif
   2778 
   2779 	/* Take lock to protect nexttoggle */
   2780 	if (!polling)
   2781 		mutex_enter(&sc->sc_lock);
   2782 	uhci_reset_std_chain(sc, xfer, xfer->ux_length, isread,
   2783 	    &upipe->nexttoggle, &dataend);
   2784 
   2785 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2786 	usb_syncmem(&dataend->dma,
   2787 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2788 	    sizeof(dataend->td.td_status),
   2789 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2790 	ux->ux_stdend = dataend;
   2791 
   2792 #ifdef UHCI_DEBUG
   2793 	if (uhcidebug >= 10) {
   2794 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2795 		uhci_dump_tds(data);
   2796 		uhci_dump_qh(upipe->intr.qhs[0]);
   2797 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2798 	}
   2799 #endif
   2800 
   2801 	DPRINTFN(10, "qhs[0]=%#jx", (uintptr_t)upipe->intr.qhs[0], 0, 0, 0);
   2802 	for (i = 0; i < upipe->intr.npoll; i++) {
   2803 		sqh = upipe->intr.qhs[i];
   2804 		sqh->elink = data;
   2805 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2806 		usb_syncmem(&sqh->dma,
   2807 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2808 		    sizeof(sqh->qh.qh_elink),
   2809 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2810 	}
   2811 	uhci_add_intr_list(sc, ux);
   2812 	xfer->ux_status = USBD_IN_PROGRESS;
   2813 	if (!polling)
   2814 		mutex_exit(&sc->sc_lock);
   2815 
   2816 #ifdef UHCI_DEBUG
   2817 	if (uhcidebug >= 10) {
   2818 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2819 		uhci_dump_tds(data);
   2820 		uhci_dump_qh(upipe->intr.qhs[0]);
   2821 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2822 	}
   2823 #endif
   2824 
   2825 	return USBD_IN_PROGRESS;
   2826 }
   2827 
   2828 /* Abort a device control request. */
   2829 void
   2830 uhci_device_ctrl_abort(struct usbd_xfer *xfer)
   2831 {
   2832 	uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer);
   2833 
   2834 	KASSERT(mutex_owned(&sc->sc_lock));
   2835 
   2836 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2837 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2838 }
   2839 
   2840 /* Close a device control pipe. */
   2841 void
   2842 uhci_device_ctrl_close(struct usbd_pipe *pipe)
   2843 {
   2844 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   2845 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   2846 
   2847 	uhci_free_sqh(sc, upipe->ctrl.sqh);
   2848 	uhci_free_std_locked(sc, upipe->ctrl.setup);
   2849 	uhci_free_std_locked(sc, upipe->ctrl.stat);
   2850 
   2851 }
   2852 
   2853 /* Abort a device interrupt request. */
   2854 void
   2855 uhci_device_intr_abort(struct usbd_xfer *xfer)
   2856 {
   2857 	uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer);
   2858 
   2859 	KASSERT(mutex_owned(&sc->sc_lock));
   2860 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   2861 
   2862 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2863 	DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   2864 
   2865 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2866 }
   2867 
   2868 /* Close a device interrupt pipe. */
   2869 void
   2870 uhci_device_intr_close(struct usbd_pipe *pipe)
   2871 {
   2872 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   2873 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   2874 	int i, npoll;
   2875 
   2876 	KASSERT(mutex_owned(&sc->sc_lock));
   2877 
   2878 	/* Unlink descriptors from controller data structures. */
   2879 	npoll = upipe->intr.npoll;
   2880 	for (i = 0; i < npoll; i++)
   2881 		uhci_remove_intr(sc, upipe->intr.qhs[i]);
   2882 
   2883 	/*
   2884 	 * We now have to wait for any activity on the physical
   2885 	 * descriptors to stop.
   2886 	 */
   2887 	usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   2888 
   2889 	for (i = 0; i < npoll; i++)
   2890 		uhci_free_sqh(sc, upipe->intr.qhs[i]);
   2891 	kmem_free(upipe->intr.qhs, npoll * sizeof(uhci_soft_qh_t *));
   2892 }
   2893 
   2894 int
   2895 uhci_device_isoc_init(struct usbd_xfer *xfer)
   2896 {
   2897 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2898 
   2899 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2900 	KASSERT(xfer->ux_nframes != 0);
   2901 	KASSERT(ux->ux_isdone);
   2902 
   2903 	ux->ux_type = UX_ISOC;
   2904 	return 0;
   2905 }
   2906 
   2907 Static void
   2908 uhci_device_isoc_fini(struct usbd_xfer *xfer)
   2909 {
   2910 	struct uhci_xfer *ux __diagused = UHCI_XFER2UXFER(xfer);
   2911 
   2912 	KASSERT(ux->ux_type == UX_ISOC);
   2913 }
   2914 
   2915 usbd_status
   2916 uhci_device_isoc_transfer(struct usbd_xfer *xfer)
   2917 {
   2918 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   2919 	usbd_status err __diagused;
   2920 
   2921 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   2922 	DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   2923 
   2924 	/* Put it on our queue, */
   2925 	mutex_enter(&sc->sc_lock);
   2926 	err = usb_insert_transfer(xfer);
   2927 	mutex_exit(&sc->sc_lock);
   2928 
   2929 	KASSERT(err == USBD_NORMAL_COMPLETION);
   2930 
   2931 	/* insert into schedule, */
   2932 
   2933 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   2934 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   2935 	struct isoc *isoc = &upipe->isoc;
   2936 	uhci_soft_td_t *std = NULL;
   2937 	uint32_t buf, len, status, offs;
   2938 	int i, next, nframes;
   2939 	int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN;
   2940 
   2941 	DPRINTFN(5, "used=%jd next=%jd xfer=%#jx nframes=%jd",
   2942 	    isoc->inuse, isoc->next, (uintptr_t)xfer, xfer->ux_nframes);
   2943 
   2944 	if (sc->sc_dying)
   2945 		return USBD_IOERROR;
   2946 
   2947 	if (xfer->ux_status == USBD_IN_PROGRESS) {
   2948 		/* This request has already been entered into the frame list */
   2949 		printf("%s: xfer=%p in frame list\n", __func__, xfer);
   2950 		/* XXX */
   2951 	}
   2952 
   2953 #ifdef DIAGNOSTIC
   2954 	if (isoc->inuse >= UHCI_VFRAMELIST_COUNT)
   2955 		printf("%s: overflow!\n", __func__);
   2956 #endif
   2957 
   2958 	KASSERT(xfer->ux_nframes != 0);
   2959 
   2960 	mutex_enter(&sc->sc_lock);
   2961 	next = isoc->next;
   2962 	if (next == -1) {
   2963 		/* Not in use yet, schedule it a few frames ahead. */
   2964 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2965 		DPRINTFN(2, "start next=%jd", next, 0, 0, 0);
   2966 	}
   2967 
   2968 	xfer->ux_status = USBD_IN_PROGRESS;
   2969 	ux->ux_curframe = next;
   2970 
   2971 	buf = DMAADDR(&xfer->ux_dmabuf, 0);
   2972 	offs = 0;
   2973 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2974 				     UHCI_TD_ACTIVE |
   2975 				     UHCI_TD_IOS);
   2976 	nframes = xfer->ux_nframes;
   2977 	for (i = 0; i < nframes; i++) {
   2978 		std = isoc->stds[next];
   2979 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2980 			next = 0;
   2981 		len = xfer->ux_frlengths[i];
   2982 		std->td.td_buffer = htole32(buf);
   2983 		usb_syncmem(&xfer->ux_dmabuf, offs, len,
   2984 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2985 		if (i == nframes - 1)
   2986 			status |= UHCI_TD_IOC;
   2987 		std->td.td_status = htole32(status);
   2988 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2989 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2990 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2991 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2992 #ifdef UHCI_DEBUG
   2993 		if (uhcidebug >= 5) {
   2994 			DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2995 			DPRINTF("TD %jd", i, 0, 0, 0);
   2996 			uhci_dump_td(std);
   2997 			DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2998 		}
   2999 #endif
   3000 		buf += len;
   3001 		offs += len;
   3002 	}
   3003 	isoc->next = next;
   3004 	isoc->inuse += xfer->ux_nframes;
   3005 
   3006 	/* Set up interrupt info. */
   3007 	ux->ux_stdstart = std;
   3008 	ux->ux_stdend = std;
   3009 
   3010 	KASSERT(ux->ux_isdone);
   3011 #ifdef DIAGNOSTIC
   3012 	ux->ux_isdone = false;
   3013 #endif
   3014 	uhci_add_intr_list(sc, ux);
   3015 
   3016 	mutex_exit(&sc->sc_lock);
   3017 
   3018 	return USBD_IN_PROGRESS;
   3019 }
   3020 
   3021 void
   3022 uhci_device_isoc_abort(struct usbd_xfer *xfer)
   3023 {
   3024 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   3025 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   3026 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   3027 	uhci_soft_td_t **stds = upipe->isoc.stds;
   3028 	uhci_soft_td_t *std;
   3029 	int i, n, nframes, maxlen, len;
   3030 
   3031 	KASSERT(mutex_owned(&sc->sc_lock));
   3032 
   3033 	/* Transfer is already done. */
   3034 	if (xfer->ux_status != USBD_NOT_STARTED &&
   3035 	    xfer->ux_status != USBD_IN_PROGRESS) {
   3036 		return;
   3037 	}
   3038 
   3039 	/* Give xfer the requested abort code. */
   3040 	xfer->ux_status = USBD_CANCELLED;
   3041 
   3042 	/* make hardware ignore it, */
   3043 	nframes = xfer->ux_nframes;
   3044 	n = ux->ux_curframe;
   3045 	maxlen = 0;
   3046 	for (i = 0; i < nframes; i++) {
   3047 		std = stds[n];
   3048 		usb_syncmem(&std->dma,
   3049 		    std->offs + offsetof(uhci_td_t, td_status),
   3050 		    sizeof(std->td.td_status),
   3051 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3052 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   3053 		usb_syncmem(&std->dma,
   3054 		    std->offs + offsetof(uhci_td_t, td_status),
   3055 		    sizeof(std->td.td_status),
   3056 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3057 		usb_syncmem(&std->dma,
   3058 		    std->offs + offsetof(uhci_td_t, td_token),
   3059 		    sizeof(std->td.td_token),
   3060 		    BUS_DMASYNC_POSTWRITE);
   3061 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   3062 		if (len > maxlen)
   3063 			maxlen = len;
   3064 		if (++n >= UHCI_VFRAMELIST_COUNT)
   3065 			n = 0;
   3066 	}
   3067 
   3068 	/* and wait until we are sure the hardware has finished. */
   3069 	delay(maxlen);
   3070 
   3071 #ifdef DIAGNOSTIC
   3072 	ux->ux_isdone = true;
   3073 #endif
   3074 	/* Remove from interrupt list. */
   3075 	uhci_del_intr_list(sc, ux);
   3076 
   3077 	/* Run callback. */
   3078 	usb_transfer_complete(xfer);
   3079 
   3080 	KASSERT(mutex_owned(&sc->sc_lock));
   3081 }
   3082 
   3083 void
   3084 uhci_device_isoc_close(struct usbd_pipe *pipe)
   3085 {
   3086 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   3087 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   3088 	uhci_soft_td_t *std, *vstd;
   3089 	struct isoc *isoc;
   3090 	int i;
   3091 
   3092 	KASSERT(mutex_owned(&sc->sc_lock));
   3093 
   3094 	/*
   3095 	 * Make sure all TDs are marked as inactive.
   3096 	 * Wait for completion.
   3097 	 * Unschedule.
   3098 	 * Deallocate.
   3099 	 */
   3100 	isoc = &upipe->isoc;
   3101 
   3102 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3103 		std = isoc->stds[i];
   3104 		usb_syncmem(&std->dma,
   3105 		    std->offs + offsetof(uhci_td_t, td_status),
   3106 		    sizeof(std->td.td_status),
   3107 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3108 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   3109 		usb_syncmem(&std->dma,
   3110 		    std->offs + offsetof(uhci_td_t, td_status),
   3111 		    sizeof(std->td.td_status),
   3112 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3113 	}
   3114 	/* wait for completion */
   3115 	usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   3116 
   3117 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3118 		std = isoc->stds[i];
   3119 		for (vstd = sc->sc_vframes[i].htd;
   3120 		     vstd != NULL && vstd->link.std != std;
   3121 		     vstd = vstd->link.std)
   3122 			;
   3123 		if (vstd == NULL) {
   3124 			/*panic*/
   3125 			printf("%s: %p not found\n", __func__, std);
   3126 			mutex_exit(&sc->sc_lock);
   3127 			return;
   3128 		}
   3129 		vstd->link = std->link;
   3130 		usb_syncmem(&std->dma,
   3131 		    std->offs + offsetof(uhci_td_t, td_link),
   3132 		    sizeof(std->td.td_link),
   3133 		    BUS_DMASYNC_POSTWRITE);
   3134 		vstd->td.td_link = std->td.td_link;
   3135 		usb_syncmem(&vstd->dma,
   3136 		    vstd->offs + offsetof(uhci_td_t, td_link),
   3137 		    sizeof(vstd->td.td_link),
   3138 		    BUS_DMASYNC_PREWRITE);
   3139 		uhci_free_std_locked(sc, std);
   3140 	}
   3141 
   3142 	kmem_free(isoc->stds, UHCI_VFRAMELIST_COUNT * sizeof(uhci_soft_td_t *));
   3143 }
   3144 
   3145 usbd_status
   3146 uhci_setup_isoc(struct usbd_pipe *pipe)
   3147 {
   3148 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   3149 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   3150 	int addr = upipe->pipe.up_dev->ud_addr;
   3151 	int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   3152 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   3153 	uhci_soft_td_t *std, *vstd;
   3154 	uint32_t token;
   3155 	struct isoc *isoc;
   3156 	int i;
   3157 
   3158 	isoc = &upipe->isoc;
   3159 
   3160 	isoc->stds = kmem_alloc(
   3161 	    UHCI_VFRAMELIST_COUNT * sizeof(uhci_soft_td_t *), KM_SLEEP);
   3162 	if (isoc->stds == NULL)
   3163 		return USBD_NOMEM;
   3164 
   3165 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   3166 		     UHCI_TD_OUT(0, endpt, addr, 0);
   3167 
   3168 	/* Allocate the TDs and mark as inactive; */
   3169 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3170 		std = uhci_alloc_std(sc);
   3171 		if (std == 0)
   3172 			goto bad;
   3173 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   3174 		std->td.td_token = htole32(token);
   3175 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   3176 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3177 		isoc->stds[i] = std;
   3178 	}
   3179 
   3180 	mutex_enter(&sc->sc_lock);
   3181 
   3182 	/* Insert TDs into schedule. */
   3183 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3184 		std = isoc->stds[i];
   3185 		vstd = sc->sc_vframes[i].htd;
   3186 		usb_syncmem(&vstd->dma,
   3187 		    vstd->offs + offsetof(uhci_td_t, td_link),
   3188 		    sizeof(vstd->td.td_link),
   3189 		    BUS_DMASYNC_POSTWRITE);
   3190 		std->link = vstd->link;
   3191 		std->td.td_link = vstd->td.td_link;
   3192 		usb_syncmem(&std->dma,
   3193 		    std->offs + offsetof(uhci_td_t, td_link),
   3194 		    sizeof(std->td.td_link),
   3195 		    BUS_DMASYNC_PREWRITE);
   3196 		vstd->link.std = std;
   3197 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   3198 		usb_syncmem(&vstd->dma,
   3199 		    vstd->offs + offsetof(uhci_td_t, td_link),
   3200 		    sizeof(vstd->td.td_link),
   3201 		    BUS_DMASYNC_PREWRITE);
   3202 	}
   3203 	mutex_exit(&sc->sc_lock);
   3204 
   3205 	isoc->next = -1;
   3206 	isoc->inuse = 0;
   3207 
   3208 	return USBD_NORMAL_COMPLETION;
   3209 
   3210  bad:
   3211 	while (--i >= 0)
   3212 		uhci_free_std(sc, isoc->stds[i]);
   3213 	kmem_free(isoc->stds, UHCI_VFRAMELIST_COUNT * sizeof(uhci_soft_td_t *));
   3214 	return USBD_NOMEM;
   3215 }
   3216 
   3217 void
   3218 uhci_device_isoc_done(struct usbd_xfer *xfer)
   3219 {
   3220 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   3221 	struct uhci_xfer *ux = UHCI_XFER2UXFER(xfer);
   3222 	int i, offs;
   3223 	int rd = UE_GET_DIR(upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN;
   3224 
   3225 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3226 	DPRINTFN(4, "length=%jd, ux_state=0x%08jx",
   3227 	    xfer->ux_actlen, xfer->ux_state, 0, 0);
   3228 
   3229 #ifdef DIAGNOSTIC
   3230 	if (ux->ux_stdend == NULL) {
   3231 		printf("%s: xfer=%p stdend==NULL\n", __func__, xfer);
   3232 #ifdef UHCI_DEBUG
   3233 		DPRINTF("--- dump start ---", 0, 0, 0, 0);
   3234 		uhci_dump_ii(ux);
   3235 		DPRINTF("--- dump end ---", 0, 0, 0, 0);
   3236 #endif
   3237 		return;
   3238 	}
   3239 #endif
   3240 
   3241 	/* Turn off the interrupt since it is active even if the TD is not. */
   3242 	usb_syncmem(&ux->ux_stdend->dma,
   3243 	    ux->ux_stdend->offs + offsetof(uhci_td_t, td_status),
   3244 	    sizeof(ux->ux_stdend->td.td_status),
   3245 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3246 	ux->ux_stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   3247 	usb_syncmem(&ux->ux_stdend->dma,
   3248 	    ux->ux_stdend->offs + offsetof(uhci_td_t, td_status),
   3249 	    sizeof(ux->ux_stdend->td.td_status),
   3250 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3251 
   3252 	offs = 0;
   3253 	for (i = 0; i < xfer->ux_nframes; i++) {
   3254 		usb_syncmem(&xfer->ux_dmabuf, offs, xfer->ux_frlengths[i],
   3255 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3256 		offs += xfer->ux_frlengths[i];
   3257 	}
   3258 }
   3259 
   3260 void
   3261 uhci_device_intr_done(struct usbd_xfer *xfer)
   3262 {
   3263 	uhci_softc_t *sc __diagused = UHCI_XFER2SC(xfer);
   3264 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   3265 	uhci_soft_qh_t *sqh;
   3266 	int i, npoll;
   3267 
   3268 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3269 	DPRINTFN(5, "length=%jd", xfer->ux_actlen, 0, 0, 0);
   3270 
   3271 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   3272 
   3273 	npoll = upipe->intr.npoll;
   3274 	for (i = 0; i < npoll; i++) {
   3275 		sqh = upipe->intr.qhs[i];
   3276 		sqh->elink = NULL;
   3277 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3278 		usb_syncmem(&sqh->dma,
   3279 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3280 		    sizeof(sqh->qh.qh_elink),
   3281 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3282 	}
   3283 	const int endpt = upipe->pipe.up_endpoint->ue_edesc->bEndpointAddress;
   3284 	const bool isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3285 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   3286 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3287 }
   3288 
   3289 /* Deallocate request data structures */
   3290 void
   3291 uhci_device_ctrl_done(struct usbd_xfer *xfer)
   3292 {
   3293 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   3294 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   3295 	int len = UGETW(xfer->ux_request.wLength);
   3296 	int isread = (xfer->ux_request.bmRequestType & UT_READ);
   3297 
   3298 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   3299 
   3300 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3301 
   3302 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   3303 
   3304 	/* XXXNH move to uhci_idone??? */
   3305 	if (upipe->pipe.up_dev->ud_speed == USB_SPEED_LOW)
   3306 		uhci_remove_ls_ctrl(sc, upipe->ctrl.sqh);
   3307 	else
   3308 		uhci_remove_hs_ctrl(sc, upipe->ctrl.sqh);
   3309 
   3310 	if (len) {
   3311 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   3312 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3313 	}
   3314 	usb_syncmem(&upipe->ctrl.reqdma, 0,
   3315 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3316 
   3317 	DPRINTF("length=%jd", xfer->ux_actlen, 0, 0, 0);
   3318 }
   3319 
   3320 /* Deallocate request data structures */
   3321 void
   3322 uhci_device_bulk_done(struct usbd_xfer *xfer)
   3323 {
   3324 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   3325 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(xfer->ux_pipe);
   3326 	usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc;
   3327 	int endpt = ed->bEndpointAddress;
   3328 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3329 
   3330 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3331 	DPRINTFN(5, "xfer=%#jx sc=%#jx upipe=%#jx", (uintptr_t)xfer,
   3332 	    (uintptr_t)sc, (uintptr_t)upipe, 0);
   3333 
   3334 	KASSERT(mutex_owned(&sc->sc_lock));
   3335 
   3336 	uhci_remove_bulk(sc, upipe->bulk.sqh);
   3337 
   3338 	if (xfer->ux_length) {
   3339 		usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   3340 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3341 	}
   3342 
   3343 	DPRINTFN(5, "length=%jd", xfer->ux_actlen, 0, 0, 0);
   3344 }
   3345 
   3346 /* Add interrupt QH, called with vflock. */
   3347 void
   3348 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3349 {
   3350 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3351 	uhci_soft_qh_t *eqh;
   3352 
   3353 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3354 	DPRINTFN(4, "n=%jd sqh=%#jx", sqh->pos, (uintptr_t)sqh, 0, 0);
   3355 
   3356 	eqh = vf->eqh;
   3357 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3358 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   3359 	sqh->hlink       = eqh->hlink;
   3360 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3361 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3362 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   3363 	eqh->hlink       = sqh;
   3364 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3365 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3366 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   3367 	vf->eqh = sqh;
   3368 	vf->bandwidth++;
   3369 }
   3370 
   3371 /* Remove interrupt QH. */
   3372 void
   3373 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3374 {
   3375 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3376 	uhci_soft_qh_t *pqh;
   3377 
   3378 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3379 	DPRINTFN(4, "n=%jd sqh=%#jx", sqh->pos, (uintptr_t)sqh, 0, 0);
   3380 
   3381 	/* See comment in uhci_remove_ctrl() */
   3382 
   3383 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3384 	    sizeof(sqh->qh.qh_elink),
   3385 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3386 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3387 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3388 		usb_syncmem(&sqh->dma,
   3389 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3390 		    sizeof(sqh->qh.qh_elink),
   3391 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3392 		delay(UHCI_QH_REMOVE_DELAY);
   3393 	}
   3394 
   3395 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3396 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3397 	    sizeof(sqh->qh.qh_hlink),
   3398 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3399 	pqh->hlink       = sqh->hlink;
   3400 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3401 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3402 	    sizeof(pqh->qh.qh_hlink),
   3403 	    BUS_DMASYNC_PREWRITE);
   3404 	delay(UHCI_QH_REMOVE_DELAY);
   3405 	if (vf->eqh == sqh)
   3406 		vf->eqh = pqh;
   3407 	vf->bandwidth--;
   3408 }
   3409 
   3410 usbd_status
   3411 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3412 {
   3413 	uhci_soft_qh_t *sqh;
   3414 	int i, npoll;
   3415 	u_int bestbw, bw, bestoffs, offs;
   3416 
   3417 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3418 	DPRINTFN(2, "pipe=%#jx", (uintptr_t)upipe, 0, 0, 0);
   3419 	if (ival == 0) {
   3420 		printf("%s: 0 interval\n", __func__);
   3421 		return USBD_INVAL;
   3422 	}
   3423 
   3424 	if (ival > UHCI_VFRAMELIST_COUNT)
   3425 		ival = UHCI_VFRAMELIST_COUNT;
   3426 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3427 	DPRINTF("ival=%jd npoll=%jd", ival, npoll, 0, 0);
   3428 
   3429 	upipe->intr.npoll = npoll;
   3430 	upipe->intr.qhs =
   3431 		kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP);
   3432 
   3433 	/*
   3434 	 * Figure out which offset in the schedule that has most
   3435 	 * bandwidth left over.
   3436 	 */
   3437 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3438 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3439 		for (bw = i = 0; i < npoll; i++)
   3440 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3441 		if (bw < bestbw) {
   3442 			bestbw = bw;
   3443 			bestoffs = offs;
   3444 		}
   3445 	}
   3446 	DPRINTF("bw=%jd offs=%jd", bestbw, bestoffs, 0, 0);
   3447 	for (i = 0; i < npoll; i++) {
   3448 		upipe->intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3449 		sqh->elink = NULL;
   3450 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3451 		usb_syncmem(&sqh->dma,
   3452 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3453 		    sizeof(sqh->qh.qh_elink),
   3454 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3455 		sqh->pos = MOD(i * ival + bestoffs);
   3456 	}
   3457 #undef MOD
   3458 
   3459 	mutex_enter(&sc->sc_lock);
   3460 	/* Enter QHs into the controller data structures. */
   3461 	for (i = 0; i < npoll; i++)
   3462 		uhci_add_intr(sc, upipe->intr.qhs[i]);
   3463 	mutex_exit(&sc->sc_lock);
   3464 
   3465 	DPRINTFN(5, "returns %#jx", (uintptr_t)upipe, 0, 0, 0);
   3466 
   3467 	return USBD_NORMAL_COMPLETION;
   3468 }
   3469 
   3470 /* Open a new pipe. */
   3471 usbd_status
   3472 uhci_open(struct usbd_pipe *pipe)
   3473 {
   3474 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   3475 	struct usbd_bus *bus = pipe->up_dev->ud_bus;
   3476 	struct uhci_pipe *upipe = UHCI_PIPE2UPIPE(pipe);
   3477 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
   3478 	usbd_status err = USBD_NOMEM;
   3479 	int ival;
   3480 
   3481 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3482 	DPRINTF("pipe=%#jx, addr=%jd, endpt=%jd (%jd)",
   3483 	    (uintptr_t)pipe, pipe->up_dev->ud_addr, ed->bEndpointAddress,
   3484 	    bus->ub_rhaddr);
   3485 
   3486 	if (sc->sc_dying)
   3487 		return USBD_IOERROR;
   3488 
   3489 	upipe->aborting = 0;
   3490 	/* toggle state needed for bulk endpoints */
   3491 	upipe->nexttoggle = pipe->up_endpoint->ue_toggle;
   3492 
   3493 	if (pipe->up_dev->ud_addr == bus->ub_rhaddr) {
   3494 		switch (ed->bEndpointAddress) {
   3495 		case USB_CONTROL_ENDPOINT:
   3496 			pipe->up_methods = &roothub_ctrl_methods;
   3497 			break;
   3498 		case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
   3499 			pipe->up_methods = &uhci_root_intr_methods;
   3500 			break;
   3501 		default:
   3502 			return USBD_INVAL;
   3503 		}
   3504 	} else {
   3505 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3506 		case UE_CONTROL:
   3507 			pipe->up_methods = &uhci_device_ctrl_methods;
   3508 			upipe->ctrl.sqh = uhci_alloc_sqh(sc);
   3509 			if (upipe->ctrl.sqh == NULL)
   3510 				goto bad;
   3511 			upipe->ctrl.setup = uhci_alloc_std(sc);
   3512 			if (upipe->ctrl.setup == NULL) {
   3513 				uhci_free_sqh(sc, upipe->ctrl.sqh);
   3514 				goto bad;
   3515 			}
   3516 			upipe->ctrl.stat = uhci_alloc_std(sc);
   3517 			if (upipe->ctrl.stat == NULL) {
   3518 				uhci_free_sqh(sc, upipe->ctrl.sqh);
   3519 				uhci_free_std(sc, upipe->ctrl.setup);
   3520 				goto bad;
   3521 			}
   3522 			err = usb_allocmem(&sc->sc_bus,
   3523 				  sizeof(usb_device_request_t),
   3524 				  0, &upipe->ctrl.reqdma);
   3525 			if (err) {
   3526 				uhci_free_sqh(sc, upipe->ctrl.sqh);
   3527 				uhci_free_std(sc, upipe->ctrl.setup);
   3528 				uhci_free_std(sc, upipe->ctrl.stat);
   3529 				goto bad;
   3530 			}
   3531 			break;
   3532 		case UE_INTERRUPT:
   3533 			pipe->up_methods = &uhci_device_intr_methods;
   3534 			ival = pipe->up_interval;
   3535 			if (ival == USBD_DEFAULT_INTERVAL)
   3536 				ival = ed->bInterval;
   3537 			return uhci_device_setintr(sc, upipe, ival);
   3538 		case UE_ISOCHRONOUS:
   3539 			pipe->up_serialise = false;
   3540 			pipe->up_methods = &uhci_device_isoc_methods;
   3541 			return uhci_setup_isoc(pipe);
   3542 		case UE_BULK:
   3543 			pipe->up_methods = &uhci_device_bulk_methods;
   3544 			upipe->bulk.sqh = uhci_alloc_sqh(sc);
   3545 			if (upipe->bulk.sqh == NULL)
   3546 				goto bad;
   3547 			break;
   3548 		}
   3549 	}
   3550 	return USBD_NORMAL_COMPLETION;
   3551 
   3552  bad:
   3553 	return USBD_NOMEM;
   3554 }
   3555 
   3556 /*
   3557  * Data structures and routines to emulate the root hub.
   3558  */
   3559 /*
   3560  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3561  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3562  * should not be used by the USB subsystem.  As we cannot issue a
   3563  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3564  * will be enabled as part of the reset.
   3565  *
   3566  * On the VT83C572, the port cannot be successfully enabled until the
   3567  * outstanding "port enable change" and "connection status change"
   3568  * events have been reset.
   3569  */
   3570 Static usbd_status
   3571 uhci_portreset(uhci_softc_t *sc, int index)
   3572 {
   3573 	int lim, port, x;
   3574 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3575 
   3576 	if (index == 1)
   3577 		port = UHCI_PORTSC1;
   3578 	else if (index == 2)
   3579 		port = UHCI_PORTSC2;
   3580 	else
   3581 		return USBD_IOERROR;
   3582 
   3583 	x = URWMASK(UREAD2(sc, port));
   3584 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3585 
   3586 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3587 
   3588 	DPRINTF("uhci port %jd reset, status0 = 0x%04jx", index,
   3589 	    UREAD2(sc, port), 0, 0);
   3590 
   3591 	x = URWMASK(UREAD2(sc, port));
   3592 	UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
   3593 
   3594 	delay(100);
   3595 
   3596 	DPRINTF("uhci port %jd reset, status1 = 0x%04jx", index,
   3597 	    UREAD2(sc, port), 0, 0);
   3598 
   3599 	x = URWMASK(UREAD2(sc, port));
   3600 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3601 
   3602 	for (lim = 10; --lim > 0;) {
   3603 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3604 
   3605 		x = UREAD2(sc, port);
   3606 		DPRINTF("uhci port %jd iteration %ju, status = 0x%04jx", index,
   3607 		    lim, x, 0);
   3608 
   3609 		if (!(x & UHCI_PORTSC_CCS)) {
   3610 			/*
   3611 			 * No device is connected (or was disconnected
   3612 			 * during reset).  Consider the port reset.
   3613 			 * The delay must be long enough to ensure on
   3614 			 * the initial iteration that the device
   3615 			 * connection will have been registered.  50ms
   3616 			 * appears to be sufficient, but 20ms is not.
   3617 			 */
   3618 			DPRINTFN(3, "uhci port %jd loop %ju, device detached",
   3619 			    index, lim, 0, 0);
   3620 			break;
   3621 		}
   3622 
   3623 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3624 			/*
   3625 			 * Port enabled changed and/or connection
   3626 			 * status changed were set.  Reset either or
   3627 			 * both raised flags (by writing a 1 to that
   3628 			 * bit), and wait again for state to settle.
   3629 			 */
   3630 			UWRITE2(sc, port, URWMASK(x) |
   3631 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3632 			continue;
   3633 		}
   3634 
   3635 		if (x & UHCI_PORTSC_PE)
   3636 			/* Port is enabled */
   3637 			break;
   3638 
   3639 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3640 	}
   3641 
   3642 	DPRINTFN(3, "uhci port %jd reset, status2 = 0x%04jx", index,
   3643 	    UREAD2(sc, port), 0, 0);
   3644 
   3645 	if (lim <= 0) {
   3646 		DPRINTF("uhci port %jd reset timed out", index,
   3647 		    0, 0, 0);
   3648 		return USBD_TIMEOUT;
   3649 	}
   3650 
   3651 	sc->sc_isreset = 1;
   3652 	return USBD_NORMAL_COMPLETION;
   3653 }
   3654 
   3655 Static int
   3656 uhci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
   3657     void *buf, int buflen)
   3658 {
   3659 	uhci_softc_t *sc = UHCI_BUS2SC(bus);
   3660 	int port, x;
   3661 	int status, change, totlen = 0;
   3662 	uint16_t len, value, index;
   3663 	usb_port_status_t ps;
   3664 	usbd_status err;
   3665 
   3666 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3667 
   3668 	if (sc->sc_dying)
   3669 		return -1;
   3670 
   3671 	DPRINTF("type=0x%02jx request=%02jx", req->bmRequestType,
   3672 	    req->bRequest, 0, 0);
   3673 
   3674 	len = UGETW(req->wLength);
   3675 	value = UGETW(req->wValue);
   3676 	index = UGETW(req->wIndex);
   3677 
   3678 #define C(x,y) ((x) | ((y) << 8))
   3679 	switch (C(req->bRequest, req->bmRequestType)) {
   3680 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3681 		DPRINTF("wValue=0x%04jx", value, 0, 0, 0);
   3682 		if (len == 0)
   3683 			break;
   3684 		switch (value) {
   3685 #define sd ((usb_string_descriptor_t *)buf)
   3686 		case C(2, UDESC_STRING):
   3687 			/* Product */
   3688 			totlen = usb_makestrdesc(sd, len, "UHCI root hub");
   3689 			break;
   3690 #undef sd
   3691 		default:
   3692 			/* default from usbroothub */
   3693 			return buflen;
   3694 		}
   3695 		break;
   3696 
   3697 	/* Hub requests */
   3698 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3699 		break;
   3700 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3701 		DPRINTF("UR_CLEAR_PORT_FEATURE port=%jd feature=%jd", index,
   3702 		    value, 0, 0);
   3703 		if (index == 1)
   3704 			port = UHCI_PORTSC1;
   3705 		else if (index == 2)
   3706 			port = UHCI_PORTSC2;
   3707 		else {
   3708 			return -1;
   3709 		}
   3710 		switch(value) {
   3711 		case UHF_PORT_ENABLE:
   3712 			x = URWMASK(UREAD2(sc, port));
   3713 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3714 			break;
   3715 		case UHF_PORT_SUSPEND:
   3716 			x = URWMASK(UREAD2(sc, port));
   3717 			if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
   3718 				break;
   3719 			UWRITE2(sc, port, x | UHCI_PORTSC_RD);
   3720 			/* see USB2 spec ch. 7.1.7.7 */
   3721 			usb_delay_ms(&sc->sc_bus, 20);
   3722 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3723 			/* 10ms resume delay must be provided by caller */
   3724 			break;
   3725 		case UHF_PORT_RESET:
   3726 			x = URWMASK(UREAD2(sc, port));
   3727 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3728 			break;
   3729 		case UHF_C_PORT_CONNECTION:
   3730 			x = URWMASK(UREAD2(sc, port));
   3731 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3732 			break;
   3733 		case UHF_C_PORT_ENABLE:
   3734 			x = URWMASK(UREAD2(sc, port));
   3735 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3736 			break;
   3737 		case UHF_C_PORT_OVER_CURRENT:
   3738 			x = URWMASK(UREAD2(sc, port));
   3739 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3740 			break;
   3741 		case UHF_C_PORT_RESET:
   3742 			sc->sc_isreset = 0;
   3743 			break;
   3744 		case UHF_PORT_CONNECTION:
   3745 		case UHF_PORT_OVER_CURRENT:
   3746 		case UHF_PORT_POWER:
   3747 		case UHF_PORT_LOW_SPEED:
   3748 		case UHF_C_PORT_SUSPEND:
   3749 		default:
   3750 			return -1;
   3751 		}
   3752 		break;
   3753 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3754 		if (index == 1)
   3755 			port = UHCI_PORTSC1;
   3756 		else if (index == 2)
   3757 			port = UHCI_PORTSC2;
   3758 		else {
   3759 			return -1;
   3760 		}
   3761 		if (len > 0) {
   3762 			*(uint8_t *)buf =
   3763 			    UHCI_PORTSC_GET_LS(UREAD2(sc, port));
   3764 			totlen = 1;
   3765 		}
   3766 		break;
   3767 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3768 		if (len == 0)
   3769 			break;
   3770 		if ((value & 0xff) != 0) {
   3771 			return -1;
   3772 		}
   3773 		usb_hub_descriptor_t hubd;
   3774 
   3775 		totlen = uimin(buflen, sizeof(hubd));
   3776 		memcpy(&hubd, buf, totlen);
   3777 		hubd.bNbrPorts = 2;
   3778 		memcpy(buf, &hubd, totlen);
   3779 		break;
   3780 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3781 		if (len != 4) {
   3782 			return -1;
   3783 		}
   3784 		memset(buf, 0, len);
   3785 		totlen = len;
   3786 		break;
   3787 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3788 		if (index == 1)
   3789 			port = UHCI_PORTSC1;
   3790 		else if (index == 2)
   3791 			port = UHCI_PORTSC2;
   3792 		else {
   3793 			return -1;
   3794 		}
   3795 		if (len != 4) {
   3796 			return -1;
   3797 		}
   3798 		x = UREAD2(sc, port);
   3799 		status = change = 0;
   3800 		if (x & UHCI_PORTSC_CCS)
   3801 			status |= UPS_CURRENT_CONNECT_STATUS;
   3802 		if (x & UHCI_PORTSC_CSC)
   3803 			change |= UPS_C_CONNECT_STATUS;
   3804 		if (x & UHCI_PORTSC_PE)
   3805 			status |= UPS_PORT_ENABLED;
   3806 		if (x & UHCI_PORTSC_POEDC)
   3807 			change |= UPS_C_PORT_ENABLED;
   3808 		if (x & UHCI_PORTSC_OCI)
   3809 			status |= UPS_OVERCURRENT_INDICATOR;
   3810 		if (x & UHCI_PORTSC_OCIC)
   3811 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3812 		if (x & UHCI_PORTSC_SUSP)
   3813 			status |= UPS_SUSPEND;
   3814 		if (x & UHCI_PORTSC_LSDA)
   3815 			status |= UPS_LOW_SPEED;
   3816 		status |= UPS_PORT_POWER;
   3817 		if (sc->sc_isreset)
   3818 			change |= UPS_C_PORT_RESET;
   3819 		USETW(ps.wPortStatus, status);
   3820 		USETW(ps.wPortChange, change);
   3821 		totlen = uimin(len, sizeof(ps));
   3822 		memcpy(buf, &ps, totlen);
   3823 		break;
   3824 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3825 		return -1;
   3826 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3827 		break;
   3828 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3829 		if (index == 1)
   3830 			port = UHCI_PORTSC1;
   3831 		else if (index == 2)
   3832 			port = UHCI_PORTSC2;
   3833 		else {
   3834 			return -1;
   3835 		}
   3836 		switch(value) {
   3837 		case UHF_PORT_ENABLE:
   3838 			x = URWMASK(UREAD2(sc, port));
   3839 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3840 			break;
   3841 		case UHF_PORT_SUSPEND:
   3842 			x = URWMASK(UREAD2(sc, port));
   3843 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3844 			break;
   3845 		case UHF_PORT_RESET:
   3846 			err = uhci_portreset(sc, index);
   3847 			if (err != USBD_NORMAL_COMPLETION)
   3848 				return -1;
   3849 			return 0;
   3850 		case UHF_PORT_POWER:
   3851 			/* Pretend we turned on power */
   3852 			return 0;
   3853 		case UHF_C_PORT_CONNECTION:
   3854 		case UHF_C_PORT_ENABLE:
   3855 		case UHF_C_PORT_OVER_CURRENT:
   3856 		case UHF_PORT_CONNECTION:
   3857 		case UHF_PORT_OVER_CURRENT:
   3858 		case UHF_PORT_LOW_SPEED:
   3859 		case UHF_C_PORT_SUSPEND:
   3860 		case UHF_C_PORT_RESET:
   3861 		default:
   3862 			return -1;
   3863 		}
   3864 		break;
   3865 	default:
   3866 		/* default from usbroothub */
   3867 		DPRINTF("returning %jd (usbroothub default)",
   3868 		    buflen, 0, 0, 0);
   3869 		return buflen;
   3870 	}
   3871 
   3872 	DPRINTF("returning %jd", totlen, 0, 0, 0);
   3873 
   3874 	return totlen;
   3875 }
   3876 
   3877 /* Abort a root interrupt request. */
   3878 void
   3879 uhci_root_intr_abort(struct usbd_xfer *xfer)
   3880 {
   3881 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   3882 
   3883 	KASSERT(mutex_owned(&sc->sc_lock));
   3884 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   3885 
   3886 	callout_stop(&sc->sc_poll_handle);
   3887 	sc->sc_intr_xfer = NULL;
   3888 
   3889 	xfer->ux_status = USBD_CANCELLED;
   3890 #ifdef DIAGNOSTIC
   3891 	UHCI_XFER2UXFER(xfer)->ux_isdone = true;
   3892 #endif
   3893 	usb_transfer_complete(xfer);
   3894 }
   3895 
   3896 usbd_status
   3897 uhci_root_intr_transfer(struct usbd_xfer *xfer)
   3898 {
   3899 	uhci_softc_t *sc = UHCI_XFER2SC(xfer);
   3900 	usbd_status err;
   3901 
   3902 	/* Insert last in queue. */
   3903 	mutex_enter(&sc->sc_lock);
   3904 	err = usb_insert_transfer(xfer);
   3905 	mutex_exit(&sc->sc_lock);
   3906 	if (err)
   3907 		return err;
   3908 
   3909 	/*
   3910 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3911 	 * start first
   3912 	 */
   3913 	return uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3914 }
   3915 
   3916 /* Start a transfer on the root interrupt pipe */
   3917 usbd_status
   3918 uhci_root_intr_start(struct usbd_xfer *xfer)
   3919 {
   3920 	struct usbd_pipe *pipe = xfer->ux_pipe;
   3921 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   3922 	unsigned int ival;
   3923 
   3924 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3925 	DPRINTF("xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer, xfer->ux_length,
   3926 	    xfer->ux_flags, 0);
   3927 
   3928 	if (sc->sc_dying)
   3929 		return USBD_IOERROR;
   3930 
   3931 	/* XXX temporary variable needed to avoid gcc3 warning */
   3932 	ival = xfer->ux_pipe->up_endpoint->ue_edesc->bInterval;
   3933 	sc->sc_ival = mstohz(ival);
   3934 	callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3935 	sc->sc_intr_xfer = xfer;
   3936 	return USBD_IN_PROGRESS;
   3937 }
   3938 
   3939 /* Close the root interrupt pipe. */
   3940 void
   3941 uhci_root_intr_close(struct usbd_pipe *pipe)
   3942 {
   3943 	uhci_softc_t *sc = UHCI_PIPE2SC(pipe);
   3944 	UHCIHIST_FUNC(); UHCIHIST_CALLED();
   3945 
   3946 	KASSERT(mutex_owned(&sc->sc_lock));
   3947 
   3948 	callout_stop(&sc->sc_poll_handle);
   3949 	sc->sc_intr_xfer = NULL;
   3950 }
   3951