uhci.c revision 1.35 1 /* $NetBSD: uhci.c,v 1.35 1999/08/14 14:49:32 augustss Exp $ */
2
3 /*
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 * Carlstedt Research & Technology.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * USB Universal Host Controller driver.
42 * Handles e.g. PIIX3 and PIIX4.
43 *
44 * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
45 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
46 * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf
47 * USB spec: http://www.usb.org/developers/data/usb11.pdf
48 */
49
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/kernel.h>
53 #include <sys/malloc.h>
54 #if defined(__NetBSD__)
55 #include <sys/device.h>
56 #elif defined(__FreeBSD__)
57 #include <sys/module.h>
58 #include <sys/bus.h>
59 #endif
60 #include <sys/proc.h>
61 #include <sys/queue.h>
62 #include <sys/select.h>
63
64 #if defined(__FreeBSD__)
65 #include <machine/bus_pio.h>
66 #endif
67 #include <machine/bus.h>
68
69 #include <dev/usb/usb.h>
70 #include <dev/usb/usbdi.h>
71 #include <dev/usb/usbdivar.h>
72 #include <dev/usb/usb_mem.h>
73 #include <dev/usb/usb_quirks.h>
74
75 #include <dev/usb/uhcireg.h>
76 #include <dev/usb/uhcivar.h>
77
78 #if defined(__FreeBSD__)
79 #include <machine/clock.h>
80
81 #define delay(d) DELAY(d)
82 #endif
83
84 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
85
86 struct uhci_pipe {
87 struct usbd_pipe pipe;
88 uhci_intr_info_t *iinfo;
89 int nexttoggle;
90 /* Info needed for different pipe kinds. */
91 union {
92 /* Control pipe */
93 struct {
94 uhci_soft_qh_t *sqh;
95 usb_dma_t reqdma;
96 usb_dma_t datadma;
97 uhci_soft_td_t *setup, *stat;
98 u_int length;
99 } ctl;
100 /* Interrupt pipe */
101 struct {
102 usb_dma_t datadma;
103 int npoll;
104 uhci_soft_qh_t **qhs;
105 } intr;
106 /* Bulk pipe */
107 struct {
108 uhci_soft_qh_t *sqh;
109 usb_dma_t datadma;
110 u_int length;
111 int isread;
112 } bulk;
113 /* Iso pipe */
114 struct iso {
115 u_int bufsize;
116 u_int nbuf;
117 usb_dma_t *bufs;
118 uhci_soft_td_t **stds;
119 } iso;
120 } u;
121 };
122
123 /*
124 * The uhci_intr_info free list can be global since they contain
125 * no dma specific data. The other free lists do.
126 */
127 LIST_HEAD(, uhci_intr_info) uhci_ii_free;
128
129 void uhci_busreset __P((uhci_softc_t *));
130 void uhci_power __P((int, void *));
131 usbd_status uhci_run __P((uhci_softc_t *, int run));
132 uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *));
133 void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *));
134 uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *));
135 void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *));
136 uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *));
137 void uhci_free_intr_info __P((uhci_intr_info_t *ii));
138 #if 0
139 void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *,
140 uhci_intr_info_t *));
141 void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *));
142 #endif
143
144 void uhci_free_std_chain __P((uhci_softc_t *,
145 uhci_soft_td_t *, uhci_soft_td_t *));
146 usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *,
147 int, int, int, usb_dma_t *,
148 uhci_soft_td_t **,
149 uhci_soft_td_t **));
150 void uhci_timo __P((void *));
151 void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle));
152 void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *));
153 void uhci_ii_done __P((uhci_intr_info_t *));
154 void uhci_ii_finish __P((uhci_intr_info_t *));
155 void uhci_abort_req __P((usbd_request_handle, usbd_status status));
156 void uhci_timeout __P((void *));
157 void uhci_wakeup_ctrl __P((void *, int, int, void *, int));
158 void uhci_lock_frames __P((uhci_softc_t *));
159 void uhci_unlock_frames __P((uhci_softc_t *));
160 void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
161 void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
162 void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *));
163 void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *));
164 int uhci_str __P((usb_string_descriptor_t *, int, char *));
165
166 void uhci_wakeup_cb __P((usbd_request_handle reqh));
167
168 usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle));
169 usbd_status uhci_device_ctrl_start __P((usbd_request_handle));
170 void uhci_device_ctrl_abort __P((usbd_request_handle));
171 void uhci_device_ctrl_close __P((usbd_pipe_handle));
172 usbd_status uhci_device_intr_transfer __P((usbd_request_handle));
173 usbd_status uhci_device_intr_start __P((usbd_request_handle));
174 void uhci_device_intr_abort __P((usbd_request_handle));
175 void uhci_device_intr_close __P((usbd_pipe_handle));
176 usbd_status uhci_device_bulk_transfer __P((usbd_request_handle));
177 usbd_status uhci_device_bulk_start __P((usbd_request_handle));
178 void uhci_device_bulk_abort __P((usbd_request_handle));
179 void uhci_device_bulk_close __P((usbd_pipe_handle));
180 usbd_status uhci_device_isoc_transfer __P((usbd_request_handle));
181 usbd_status uhci_device_isoc_start __P((usbd_request_handle));
182 void uhci_device_isoc_abort __P((usbd_request_handle));
183 void uhci_device_isoc_close __P((usbd_pipe_handle));
184 usbd_status uhci_device_isoc_setbuf __P((usbd_pipe_handle, u_int, u_int));
185
186 usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle));
187 usbd_status uhci_root_ctrl_start __P((usbd_request_handle));
188 void uhci_root_ctrl_abort __P((usbd_request_handle));
189 void uhci_root_ctrl_close __P((usbd_pipe_handle));
190 usbd_status uhci_root_intr_transfer __P((usbd_request_handle));
191 usbd_status uhci_root_intr_start __P((usbd_request_handle));
192 void uhci_root_intr_abort __P((usbd_request_handle));
193 void uhci_root_intr_close __P((usbd_pipe_handle));
194
195 usbd_status uhci_open __P((usbd_pipe_handle));
196 void uhci_poll __P((struct usbd_bus *));
197
198 usbd_status uhci_device_request __P((usbd_request_handle reqh));
199 void uhci_ctrl_done __P((uhci_intr_info_t *ii));
200 void uhci_bulk_done __P((uhci_intr_info_t *ii));
201
202 void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
203 void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *));
204 usbd_status uhci_device_setintr __P((uhci_softc_t *sc,
205 struct uhci_pipe *pipe, int ival));
206 void uhci_intr_done __P((uhci_intr_info_t *ii));
207 void uhci_isoc_done __P((uhci_intr_info_t *ii));
208
209 #ifdef USB_DEBUG
210 static void uhci_dumpregs __P((uhci_softc_t *));
211 void uhci_dump_tds __P((uhci_soft_td_t *));
212 void uhci_dump_qh __P((uhci_soft_qh_t *));
213 void uhci_dump __P((void));
214 void uhci_dump_td __P((uhci_soft_td_t *));
215 #endif
216
217 #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
218 #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
219 #define UREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r))
220 #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
221 #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
222
223 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
224 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
225
226 #define UHCI_RESET_TIMEOUT 100 /* reset timeout */
227
228 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
229
230 #define UHCI_INTR_ENDPT 1
231
232 struct usbd_methods uhci_root_ctrl_methods = {
233 uhci_root_ctrl_transfer,
234 uhci_root_ctrl_start,
235 uhci_root_ctrl_abort,
236 uhci_root_ctrl_close,
237 0,
238 };
239
240 struct usbd_methods uhci_root_intr_methods = {
241 uhci_root_intr_transfer,
242 uhci_root_intr_start,
243 uhci_root_intr_abort,
244 uhci_root_intr_close,
245 0,
246 };
247
248 struct usbd_methods uhci_device_ctrl_methods = {
249 uhci_device_ctrl_transfer,
250 uhci_device_ctrl_start,
251 uhci_device_ctrl_abort,
252 uhci_device_ctrl_close,
253 0,
254 };
255
256 struct usbd_methods uhci_device_intr_methods = {
257 uhci_device_intr_transfer,
258 uhci_device_intr_start,
259 uhci_device_intr_abort,
260 uhci_device_intr_close,
261 0,
262 };
263
264 struct usbd_methods uhci_device_bulk_methods = {
265 uhci_device_bulk_transfer,
266 uhci_device_bulk_start,
267 uhci_device_bulk_abort,
268 uhci_device_bulk_close,
269 0,
270 };
271
272 struct usbd_methods uhci_device_isoc_methods = {
273 uhci_device_isoc_transfer,
274 uhci_device_isoc_start,
275 uhci_device_isoc_abort,
276 uhci_device_isoc_close,
277 uhci_device_isoc_setbuf,
278 };
279
280 void
281 uhci_busreset(sc)
282 uhci_softc_t *sc;
283 {
284 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
285 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
286 UHCICMD(sc, 0); /* do nothing */
287 }
288
289 usbd_status
290 uhci_init(sc)
291 uhci_softc_t *sc;
292 {
293 usbd_status r;
294 int i, j;
295 uhci_soft_qh_t *csqh, *bsqh, *sqh;
296 uhci_soft_td_t *std;
297
298 DPRINTFN(1,("uhci_init: start\n"));
299
300 #if defined(USB_DEBUG)
301 if (uhcidebug > 2)
302 uhci_dumpregs(sc);
303 #endif
304
305 uhci_run(sc, 0); /* stop the controller */
306 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
307
308 uhci_busreset(sc);
309
310 /* Allocate and initialize real frame array. */
311 r = usb_allocmem(sc->sc_dmatag,
312 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
313 UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
314 if (r != USBD_NORMAL_COMPLETION)
315 return (r);
316 sc->sc_pframes = KERNADDR(&sc->sc_dma);
317 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
318 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma)); /* set frame list */
319
320 /* Allocate the dummy QH where bulk traffic will be queued. */
321 bsqh = uhci_alloc_sqh(sc);
322 if (!bsqh)
323 return (USBD_NOMEM);
324 bsqh->qh->qh_hlink = UHCI_PTR_T; /* end of QH chain */
325 bsqh->qh->qh_elink = UHCI_PTR_T;
326 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
327
328 /* Allocate the dummy QH where control traffic will be queued. */
329 csqh = uhci_alloc_sqh(sc);
330 if (!csqh)
331 return (USBD_NOMEM);
332 csqh->qh->hlink = bsqh;
333 csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q;
334 csqh->qh->qh_elink = UHCI_PTR_T;
335 sc->sc_ctl_start = sc->sc_ctl_end = csqh;
336
337 /*
338 * Make all (virtual) frame list pointers point to the interrupt
339 * queue heads and the interrupt queue heads at the control
340 * queue head and point the physical frame list to the virtual.
341 */
342 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
343 std = uhci_alloc_std(sc);
344 sqh = uhci_alloc_sqh(sc);
345 if (!std || !sqh)
346 return (USBD_NOMEM);
347 std->td->link.sqh = sqh;
348 std->td->td_link = sqh->physaddr | UHCI_PTR_Q;
349 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */
350 std->td->td_token = 0;
351 std->td->td_buffer = 0;
352 sqh->qh->hlink = csqh;
353 sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q;
354 sqh->qh->elink = 0;
355 sqh->qh->qh_elink = UHCI_PTR_T;
356 sc->sc_vframes[i].htd = std;
357 sc->sc_vframes[i].etd = std;
358 sc->sc_vframes[i].hqh = sqh;
359 sc->sc_vframes[i].eqh = sqh;
360 for (j = i;
361 j < UHCI_FRAMELIST_COUNT;
362 j += UHCI_VFRAMELIST_COUNT)
363 sc->sc_pframes[j] = std->physaddr;
364 }
365
366 LIST_INIT(&sc->sc_intrhead);
367
368 /* Set up the bus struct. */
369 sc->sc_bus.open_pipe = uhci_open;
370 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
371 sc->sc_bus.do_poll = uhci_poll;
372
373 sc->sc_suspend = PWR_RESUME;
374 (void)powerhook_establish(uhci_power, sc);
375
376 DPRINTFN(1,("uhci_init: enabling\n"));
377 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
378 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
379
380 return (uhci_run(sc, 1)); /* and here we go... */
381 }
382
383 /*
384 * Handle suspend/resume.
385 *
386 * Must use delay() here since we are called from an interrupt
387 * context, but since we are close to being inactive anyway
388 * it doesn't matter.
389 */
390 void
391 uhci_power(why, v)
392 int why;
393 void *v;
394 {
395 uhci_softc_t *sc = v;
396 int cmd;
397 int s;
398
399 s = splusb();
400 cmd = UREAD2(sc, UHCI_CMD);
401
402 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
403 sc, why, sc->sc_suspend, cmd));
404
405 if (why != PWR_RESUME) {
406 #if defined(USB_DEBUG)
407 if (uhcidebug > 2)
408 uhci_dumpregs(sc);
409 #endif
410 if (sc->sc_has_timo)
411 usb_untimeout(uhci_timo, sc->sc_has_timo,
412 sc->sc_has_timo->timo_handle);
413 uhci_run(sc, 0); /* stop the controller */
414 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
415 delay(USB_RESUME_WAIT * 1000);
416 sc->sc_suspend = why;
417 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
418 } else {
419 /*
420 * XXX We should really do much more here in case the
421 * controller registers have been lost and BIOS has
422 * not restored them.
423 */
424 sc->sc_suspend = why;
425 if (cmd & UHCI_CMD_RS)
426 uhci_run(sc, 0); /* in case BIOS has started it */
427 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
428 delay(USB_RESUME_DELAY * 1000);
429 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
430 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
431 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
432 uhci_run(sc, 1); /* and start traffic again */
433 delay(USB_RESUME_RECOVERY * 1000);
434 if (sc->sc_has_timo)
435 usb_timeout(uhci_timo, sc->sc_has_timo,
436 sc->sc_ival, sc->sc_has_timo->timo_handle);
437 #if defined(USB_DEBUG)
438 if (uhcidebug > 2)
439 uhci_dumpregs(sc);
440 #endif
441 }
442 splx(s);
443 }
444
445 #ifdef USB_DEBUG
446 static void
447 uhci_dumpregs(sc)
448 uhci_softc_t *sc;
449 {
450 printf("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
451 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
452 USBDEVNAME(sc->sc_bus.bdev),
453 UREAD2(sc, UHCI_CMD),
454 UREAD2(sc, UHCI_STS),
455 UREAD2(sc, UHCI_INTR),
456 UREAD2(sc, UHCI_FRNUM),
457 UREAD4(sc, UHCI_FLBASEADDR),
458 UREAD1(sc, UHCI_SOF),
459 UREAD2(sc, UHCI_PORTSC1),
460 UREAD2(sc, UHCI_PORTSC2));
461 }
462
463 int uhci_longtd = 1;
464
465 void
466 uhci_dump_td(p)
467 uhci_soft_td_t *p;
468 {
469 printf("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
470 "token=0x%08lx buffer=0x%08lx\n",
471 p, (long)p->physaddr,
472 (long)p->td->td_link,
473 (long)p->td->td_status,
474 (long)p->td->td_token,
475 (long)p->td->td_buffer);
476 if (uhci_longtd)
477 printf(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
478 "D=%d,maxlen=%d\n",
479 (int)p->td->td_link,
480 "\20\1T\2Q\3VF",
481 (int)p->td->td_status,
482 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
483 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
484 UHCI_TD_GET_ERRCNT(p->td->td_status),
485 UHCI_TD_GET_ACTLEN(p->td->td_status),
486 UHCI_TD_GET_PID(p->td->td_token),
487 UHCI_TD_GET_DEVADDR(p->td->td_token),
488 UHCI_TD_GET_ENDPT(p->td->td_token),
489 UHCI_TD_GET_DT(p->td->td_token),
490 UHCI_TD_GET_MAXLEN(p->td->td_token));
491 }
492
493 void
494 uhci_dump_qh(p)
495 uhci_soft_qh_t *p;
496 {
497 printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr,
498 p->qh->qh_hlink, p->qh->qh_elink);
499 }
500
501
502 #if 0
503 void
504 uhci_dump()
505 {
506 uhci_softc_t *sc = uhci;
507
508 uhci_dumpregs(sc);
509 printf("intrs=%d\n", sc->sc_intrs);
510 printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);
511 uhci_dump_qh(sc->sc_ctl_start->qh->hlink);
512 }
513 #endif
514
515 void
516 uhci_dump_tds(std)
517 uhci_soft_td_t *std;
518 {
519 uhci_soft_td_t *p;
520
521 for(p = std; p; p = p->td->link.std)
522 uhci_dump_td(p);
523 }
524 #endif
525
526 /*
527 * This routine is executed periodically and simulates interrupts
528 * from the root controller interrupt pipe for port status change.
529 */
530 void
531 uhci_timo(addr)
532 void *addr;
533 {
534 usbd_request_handle reqh = addr;
535 usbd_pipe_handle pipe = reqh->pipe;
536 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
537 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
538 int s;
539 u_char *p;
540
541 DPRINTFN(15, ("uhci_timo\n"));
542
543 p = KERNADDR(&upipe->u.intr.datadma);
544 p[0] = 0;
545 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
546 p[0] |= 1<<1;
547 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
548 p[0] |= 1<<2;
549 s = splusb();
550 if (p[0] != 0) {
551 reqh->actlen = 1;
552 reqh->status = USBD_NORMAL_COMPLETION;
553 reqh->xfercb(reqh);
554 }
555 if (reqh->pipe->repeat) {
556 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
557 } else {
558 usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma);
559 usb_start_next(reqh->pipe);
560 }
561 splx(s);
562 }
563
564
565 void
566 uhci_lock_frames(sc)
567 uhci_softc_t *sc;
568 {
569 int s = splusb();
570 while (sc->sc_vflock) {
571 sc->sc_vflock |= UHCI_WANT_LOCK;
572 tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0);
573 }
574 sc->sc_vflock = UHCI_HAS_LOCK;
575 splx(s);
576 }
577
578 void
579 uhci_unlock_frames(sc)
580 uhci_softc_t *sc;
581 {
582 int s = splusb();
583 sc->sc_vflock &= ~UHCI_HAS_LOCK;
584 if (sc->sc_vflock & UHCI_WANT_LOCK)
585 wakeup(&sc->sc_vflock);
586 splx(s);
587 }
588
589 /*
590 * Allocate an interrupt information struct. A free list is kept
591 * for fast allocation.
592 */
593 uhci_intr_info_t *
594 uhci_alloc_intr_info(sc)
595 uhci_softc_t *sc;
596 {
597 uhci_intr_info_t *ii;
598
599 ii = LIST_FIRST(&uhci_ii_free);
600 if (ii)
601 LIST_REMOVE(ii, list);
602 else {
603 ii = malloc(sizeof(uhci_intr_info_t), M_USBHC, M_NOWAIT);
604 }
605 ii->sc = sc;
606 return ii;
607 }
608
609 void
610 uhci_free_intr_info(ii)
611 uhci_intr_info_t *ii;
612 {
613 LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */
614 }
615
616 /* Add control QH, called at splusb(). */
617 void
618 uhci_add_ctrl(sc, sqh)
619 uhci_softc_t *sc;
620 uhci_soft_qh_t *sqh;
621 {
622 uhci_qh_t *eqh;
623
624 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
625 eqh = sc->sc_ctl_end->qh;
626 sqh->qh->hlink = eqh->hlink;
627 sqh->qh->qh_hlink = eqh->qh_hlink;
628 eqh->hlink = sqh;
629 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
630 sc->sc_ctl_end = sqh;
631 }
632
633 /* Remove control QH, called at splusb(). */
634 void
635 uhci_remove_ctrl(sc, sqh)
636 uhci_softc_t *sc;
637 uhci_soft_qh_t *sqh;
638 {
639 uhci_soft_qh_t *pqh;
640
641 DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh));
642 for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink)
643 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
644 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
645 printf("uhci_remove_ctrl: QH not found\n");
646 return;
647 }
648 #else
649 ;
650 #endif
651 pqh->qh->hlink = sqh->qh->hlink;
652 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
653 if (sc->sc_ctl_end == sqh)
654 sc->sc_ctl_end = pqh;
655 }
656
657 /* Add bulk QH, called at splusb(). */
658 void
659 uhci_add_bulk(sc, sqh)
660 uhci_softc_t *sc;
661 uhci_soft_qh_t *sqh;
662 {
663 uhci_qh_t *eqh;
664
665 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
666 eqh = sc->sc_bulk_end->qh;
667 sqh->qh->hlink = eqh->hlink;
668 sqh->qh->qh_hlink = eqh->qh_hlink;
669 eqh->hlink = sqh;
670 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
671 sc->sc_bulk_end = sqh;
672 }
673
674 /* Remove bulk QH, called at splusb(). */
675 void
676 uhci_remove_bulk(sc, sqh)
677 uhci_softc_t *sc;
678 uhci_soft_qh_t *sqh;
679 {
680 uhci_soft_qh_t *pqh;
681
682 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
683 for (pqh = sc->sc_bulk_start;
684 pqh->qh->hlink != sqh;
685 pqh = pqh->qh->hlink)
686 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
687 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
688 printf("uhci_remove_bulk: QH not found\n");
689 return;
690 }
691 #else
692 ;
693 #endif
694 pqh->qh->hlink = sqh->qh->hlink;
695 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
696 if (sc->sc_bulk_end == sqh)
697 sc->sc_bulk_end = pqh;
698 }
699
700 int
701 uhci_intr(p)
702 void *p;
703 {
704 uhci_softc_t *sc = p;
705 int status, ret;
706 uhci_intr_info_t *ii;
707
708 sc->sc_intrs++;
709 #if defined(USB_DEBUG)
710 if (uhcidebug > 9) {
711 printf("uhci_intr %p\n", sc);
712 uhci_dumpregs(sc);
713 }
714 #endif
715 status = UREAD2(sc, UHCI_STS);
716 #ifdef DIAGNOSTIC
717 if (sc->sc_suspend != PWR_RESUME)
718 printf("uhci_intr: suspended sts=0x%x\n", status);
719 #endif
720 ret = 0;
721 if (status & UHCI_STS_USBINT) {
722 UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */
723 ret = 1;
724 }
725 if (status & UHCI_STS_USBEI) {
726 UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */
727 ret = 1;
728 }
729 if (status & UHCI_STS_RD) {
730 UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */
731 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
732 ret = 1;
733 }
734 if (status & UHCI_STS_HSE) {
735 UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */
736 printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev));
737 ret = 1;
738 }
739 if (status & UHCI_STS_HCPE) {
740 UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */
741 printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev));
742 ret = 1;
743 }
744 if (status & UHCI_STS_HCH)
745 printf("%s: controller halted\n", USBDEVNAME(sc->sc_bus.bdev));
746 if (!ret)
747 return 0;
748
749 /*
750 * Interrupts on UHCI really suck. When the host controller
751 * interrupts because a transfer is completed there is no
752 * way of knowing which transfer it was. You can scan down
753 * the TDs and QHs of the previous frame to limit the search,
754 * but that assumes that the interrupt was not delayed by more
755 * than 1 ms, which may not always be true (e.g. after debug
756 * output on a slow console).
757 * We scan all interrupt descriptors to see if any have
758 * completed.
759 */
760 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
761 uhci_check_intr(sc, ii);
762
763 DPRINTFN(10, ("uhci_intr: exit\n"));
764 return 1;
765 }
766
767 /* Check for an interrupt. */
768 void
769 uhci_check_intr(sc, ii)
770 uhci_softc_t *sc;
771 uhci_intr_info_t *ii;
772 {
773 struct uhci_pipe *upipe;
774 uhci_soft_td_t *std, *lstd;
775 u_int32_t status;
776
777 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
778 #ifdef DIAGNOSTIC
779 if (!ii) {
780 printf("uhci_check_intr: no ii? %p\n", ii);
781 return;
782 }
783 #endif
784 if (!ii->stdstart)
785 return;
786 lstd = ii->stdend;
787 #ifdef DIAGNOSTIC
788 if (!lstd) {
789 printf("uhci_check_intr: std==0\n");
790 return;
791 }
792 #endif
793 /*
794 * If the last TD is still active we need to check whether there
795 * is a an error somewhere in the middle, or whether there was a
796 * short packet (SPD and not ACTIVE).
797 */
798 if (lstd->td->td_status & UHCI_TD_ACTIVE) {
799 DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii));
800 for (std = ii->stdstart; std != lstd; std = std->td->link.std){
801 status = std->td->td_status;
802 if ((status & UHCI_TD_STALLED) ||
803 (status & (UHCI_TD_SPD | UHCI_TD_ACTIVE)) ==
804 UHCI_TD_SPD)
805 goto done;
806 }
807 DPRINTFN(15, ("uhci_check_intr: ii=%p std=%p still active\n",
808 ii, ii->stdstart));
809 return;
810 }
811 done:
812 usb_untimeout(uhci_timeout, ii, ii->timeout_handle);
813 upipe = (struct uhci_pipe *)ii->reqh->pipe;
814 uhci_ii_done(ii);
815 upipe->pipe.endpoint->toggle = upipe->nexttoggle;
816 }
817
818 void
819 uhci_ii_done(ii)
820 uhci_intr_info_t *ii;
821 {
822 usbd_request_handle reqh = ii->reqh;
823 uhci_soft_td_t *std;
824 u_int32_t status;
825 int actlen;
826
827 #ifdef USB_DEBUG
828 DPRINTFN(10, ("uhci_ii_done: ii=%p ready\n", ii));
829 if (uhcidebug > 10)
830 uhci_dump_tds(ii->stdstart);
831 #endif
832
833 if (reqh->status == USBD_CANCELLED ||
834 reqh->status == USBD_TIMEOUT) {
835 DPRINTF(("uhci_ii_done: aborted reqh=%p\n", reqh));
836 return;
837 }
838
839 #ifdef DIAGNOSTIC
840 {
841 int s = splhigh();
842 if (ii->isdone) {
843 splx(s);
844 printf("uhci_ii_done: ii=%p is done!\n", ii);
845 return;
846 }
847 ii->isdone = 1;
848 splx(s);
849 }
850 #endif
851
852 /* The transfer is done, compute actual length and status. */
853 /* XXX Is this correct for control xfers? */
854 actlen = 0;
855 for (std = ii->stdstart; std; std = std->td->link.std) {
856 status = std->td->td_status;
857 if (status & UHCI_TD_ACTIVE)
858 break;
859 if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP)
860 actlen += UHCI_TD_GET_ACTLEN(status);
861 }
862 status &= UHCI_TD_ERROR;
863 DPRINTFN(10, ("uhci_check_intr: actlen=%d, status=0x%x\n",
864 actlen, status));
865 reqh->actlen = actlen;
866 if (status != 0) {
867 DPRINTFN(-1+((status&UHCI_TD_STALLED)!=0),
868 ("uhci_ii_done: error, addr=%d, endpt=0x%02x, "
869 "status 0x%b\n",
870 reqh->pipe->device->address,
871 reqh->pipe->endpoint->edesc->bEndpointAddress,
872 (int)status,
873 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
874 "STALLED\30ACTIVE"));
875 if (status == UHCI_TD_STALLED)
876 reqh->status = USBD_STALLED;
877 else
878 reqh->status = USBD_IOERROR; /* more info XXX */
879 } else {
880 reqh->status = USBD_NORMAL_COMPLETION;
881 }
882 uhci_ii_finish(ii);
883 }
884
885 void
886 uhci_ii_finish(ii)
887 uhci_intr_info_t *ii;
888 {
889 usbd_request_handle reqh = ii->reqh;
890
891 DPRINTFN(5, ("uhci_ii_finish: calling handler ii=%p\n", ii));
892
893 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
894 case UE_CONTROL:
895 uhci_ctrl_done(ii);
896 usb_start_next(reqh->pipe);
897 break;
898 case UE_ISOCHRONOUS:
899 uhci_isoc_done(ii);
900 usb_start_next(reqh->pipe);
901 break;
902 case UE_BULK:
903 uhci_bulk_done(ii);
904 usb_start_next(reqh->pipe);
905 break;
906 case UE_INTERRUPT:
907 uhci_intr_done(ii);
908 break;
909 }
910
911 /* And finally execute callback. */
912 reqh->xfercb(reqh);
913 }
914
915 /*
916 * Called when a request does not complete.
917 */
918 void
919 uhci_timeout(addr)
920 void *addr;
921 {
922 uhci_intr_info_t *ii = addr;
923
924 DPRINTF(("uhci_timeout: ii=%p\n", ii));
925 uhci_abort_req(ii->reqh, USBD_TIMEOUT);
926 }
927
928 /*
929 * Wait here until controller claims to have an interrupt.
930 * Then call uhci_intr and return. Use timeout to avoid waiting
931 * too long.
932 * Only used during boot when interrupts are not enabled yet.
933 */
934 void
935 uhci_waitintr(sc, reqh)
936 uhci_softc_t *sc;
937 usbd_request_handle reqh;
938 {
939 int timo = reqh->timeout;
940 uhci_intr_info_t *ii;
941
942 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
943
944 reqh->status = USBD_IN_PROGRESS;
945 for (; timo >= 0; timo--) {
946 usb_delay_ms(&sc->sc_bus, 1);
947 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
948 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
949 uhci_intr(sc);
950 if (reqh->status != USBD_IN_PROGRESS)
951 return;
952 }
953 }
954
955 /* Timeout */
956 DPRINTF(("uhci_waitintr: timeout\n"));
957 for (ii = LIST_FIRST(&sc->sc_intrhead);
958 ii && ii->reqh != reqh;
959 ii = LIST_NEXT(ii, list))
960 ;
961 if (ii)
962 uhci_ii_done(ii);
963 else
964 panic("uhci_waitintr: lost intr_info\n");
965 }
966
967 void
968 uhci_poll(bus)
969 struct usbd_bus *bus;
970 {
971 uhci_softc_t *sc = (uhci_softc_t *)bus;
972
973 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
974 uhci_intr(sc);
975 }
976
977 #if 0
978 void
979 uhci_reset(p)
980 void *p;
981 {
982 uhci_softc_t *sc = p;
983 int n;
984
985 UHCICMD(sc, UHCI_CMD_HCRESET);
986 /* The reset bit goes low when the controller is done. */
987 for (n = 0; n < UHCI_RESET_TIMEOUT &&
988 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
989 delay(100);
990 if (n >= UHCI_RESET_TIMEOUT)
991 printf("%s: controller did not reset\n",
992 USBDEVNAME(sc->sc_bus.bdev));
993 }
994 #endif
995
996 usbd_status
997 uhci_run(sc, run)
998 uhci_softc_t *sc;
999 int run;
1000 {
1001 int s, n, running;
1002
1003 run = run != 0;
1004 s = splusb();
1005 DPRINTF(("uhci_run: setting run=%d\n", run));
1006 UHCICMD(sc, run ? UHCI_CMD_RS : 0);
1007 for(n = 0; n < 10; n++) {
1008 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1009 /* return when we've entered the state we want */
1010 if (run == running) {
1011 splx(s);
1012 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1013 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1014 return (USBD_NORMAL_COMPLETION);
1015 }
1016 usb_delay_ms(&sc->sc_bus, 1);
1017 }
1018 splx(s);
1019 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1020 run ? "start" : "stop");
1021 return (USBD_IOERROR);
1022 }
1023
1024 /*
1025 * Memory management routines.
1026 * uhci_alloc_std allocates TDs
1027 * uhci_alloc_sqh allocates QHs
1028 * These two routines do their own free list management,
1029 * partly for speed, partly because allocating DMAable memory
1030 * has page size granularaity so much memory would be wasted if
1031 * only one TD/QH (32 bytes) was placed in each allocated chunk.
1032 */
1033
1034 uhci_soft_td_t *
1035 uhci_alloc_std(sc)
1036 uhci_softc_t *sc;
1037 {
1038 uhci_soft_td_t *std;
1039 usbd_status r;
1040 int i;
1041 usb_dma_t dma;
1042
1043 if (!sc->sc_freetds) {
1044 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1045 std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK,
1046 M_USBHC, M_NOWAIT);
1047 if (!std)
1048 return (0);
1049 r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK,
1050 UHCI_TD_ALIGN, &dma);
1051 if (r != USBD_NORMAL_COMPLETION) {
1052 free(std, M_USBHC);
1053 return (0);
1054 }
1055 for(i = 0; i < UHCI_TD_CHUNK; i++, std++) {
1056 std->physaddr = DMAADDR(&dma) + i * UHCI_TD_SIZE;
1057 std->td = (uhci_td_t *)
1058 ((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE);
1059 std->td->link.std = sc->sc_freetds;
1060 sc->sc_freetds = std;
1061 }
1062 }
1063 std = sc->sc_freetds;
1064 sc->sc_freetds = std->td->link.std;
1065 memset(std->td, 0, UHCI_TD_SIZE);
1066 return std;
1067 }
1068
1069 void
1070 uhci_free_std(sc, std)
1071 uhci_softc_t *sc;
1072 uhci_soft_td_t *std;
1073 {
1074 #ifdef DIAGNOSTIC
1075 #define TD_IS_FREE 0x12345678
1076 if (std->td->td_token == TD_IS_FREE) {
1077 printf("uhci_free_std: freeing free TD %p\n", std);
1078 return;
1079 }
1080 std->td->td_token = TD_IS_FREE;
1081 #endif
1082 std->td->link.std = sc->sc_freetds;
1083 sc->sc_freetds = std;
1084 }
1085
1086 uhci_soft_qh_t *
1087 uhci_alloc_sqh(sc)
1088 uhci_softc_t *sc;
1089 {
1090 uhci_soft_qh_t *sqh;
1091 usbd_status r;
1092 int i, offs;
1093 usb_dma_t dma;
1094
1095 if (!sc->sc_freeqhs) {
1096 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1097 sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK,
1098 M_USBHC, M_NOWAIT);
1099 if (!sqh)
1100 return 0;
1101 r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK,
1102 UHCI_QH_ALIGN, &dma);
1103 if (r != USBD_NORMAL_COMPLETION) {
1104 free(sqh, M_USBHC);
1105 return 0;
1106 }
1107 for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) {
1108 offs = i * UHCI_QH_SIZE;
1109 sqh->physaddr = DMAADDR(&dma) + offs;
1110 sqh->qh = (uhci_qh_t *)
1111 ((char *)KERNADDR(&dma) + offs);
1112 sqh->qh->hlink = sc->sc_freeqhs;
1113 sc->sc_freeqhs = sqh;
1114 }
1115 }
1116 sqh = sc->sc_freeqhs;
1117 sc->sc_freeqhs = sqh->qh->hlink;
1118 memset(sqh->qh, 0, UHCI_QH_SIZE);
1119 return (sqh);
1120 }
1121
1122 void
1123 uhci_free_sqh(sc, sqh)
1124 uhci_softc_t *sc;
1125 uhci_soft_qh_t *sqh;
1126 {
1127 sqh->qh->hlink = sc->sc_freeqhs;
1128 sc->sc_freeqhs = sqh;
1129 }
1130
1131 #if 0
1132 /*
1133 * Enter a list of transfers onto a control queue.
1134 * Called at splusb()
1135 */
1136 void
1137 uhci_enter_ctl_q(sc, sqh, ii)
1138 uhci_softc_t *sc;
1139 uhci_soft_qh_t *sqh;
1140 uhci_intr_info_t *ii;
1141 {
1142 DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh));
1143
1144 }
1145 #endif
1146
1147 void
1148 uhci_free_std_chain(sc, std, stdend)
1149 uhci_softc_t *sc;
1150 uhci_soft_td_t *std;
1151 uhci_soft_td_t *stdend;
1152 {
1153 uhci_soft_td_t *p;
1154
1155 for (; std != stdend; std = p) {
1156 p = std->td->link.std;
1157 uhci_free_std(sc, std);
1158 }
1159 }
1160
1161 usbd_status
1162 uhci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep)
1163 struct uhci_pipe *upipe;
1164 uhci_softc_t *sc;
1165 int len, rd, shortok;
1166 usb_dma_t *dma;
1167 uhci_soft_td_t **sp, **ep;
1168 {
1169 uhci_soft_td_t *p, *lastp;
1170 uhci_physaddr_t lastlink;
1171 int i, ntd, l, tog, maxp;
1172 u_int32_t status;
1173 int addr = upipe->pipe.device->address;
1174 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1175
1176 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d "
1177 "shortok=%d\n", addr, UE_GET_ADDR(endpt), len,
1178 upipe->pipe.device->lowspeed, shortok));
1179 if (len == 0) {
1180 *sp = *ep = 0;
1181 DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n"));
1182 return (USBD_NORMAL_COMPLETION);
1183 }
1184 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1185 if (maxp == 0) {
1186 printf("uhci_alloc_std_chain: maxp=0\n");
1187 return (USBD_INVAL);
1188 }
1189 ntd = (len + maxp - 1) / maxp;
1190 tog = upipe->pipe.endpoint->toggle;
1191 if (ntd % 2 == 0)
1192 tog ^= 1;
1193 upipe->nexttoggle = tog ^ 1;
1194 lastp = 0;
1195 lastlink = UHCI_PTR_T;
1196 ntd--;
1197 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1198 if (upipe->pipe.device->lowspeed)
1199 status |= UHCI_TD_LS;
1200 if (shortok)
1201 status |= UHCI_TD_SPD;
1202 for (i = ntd; i >= 0; i--) {
1203 p = uhci_alloc_std(sc);
1204 if (!p) {
1205 uhci_free_std_chain(sc, lastp, 0);
1206 return (USBD_NOMEM);
1207 }
1208 p->td->link.std = lastp;
1209 p->td->td_link = lastlink;
1210 lastp = p;
1211 lastlink = p->physaddr;
1212 p->td->td_status = status;
1213 if (i == ntd) {
1214 /* last TD */
1215 l = len % maxp;
1216 if (l == 0) l = maxp;
1217 *ep = p;
1218 } else
1219 l = maxp;
1220 p->td->td_token =
1221 rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1222 UHCI_TD_OUT(l, endpt, addr, tog);
1223 p->td->td_buffer = DMAADDR(dma) + i * maxp;
1224 tog ^= 1;
1225 }
1226 *sp = lastp;
1227 /*upipe->pipe.endpoint->toggle = tog;*/
1228 DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d nexttog=%d\n",
1229 upipe->pipe.endpoint->toggle, upipe->nexttoggle));
1230 return (USBD_NORMAL_COMPLETION);
1231 }
1232
1233 usbd_status
1234 uhci_device_bulk_transfer(reqh)
1235 usbd_request_handle reqh;
1236 {
1237 int s;
1238 usbd_status r;
1239
1240 s = splusb();
1241 r = usb_insert_transfer(reqh);
1242 splx(s);
1243 if (r != USBD_NORMAL_COMPLETION)
1244 return (r);
1245 else
1246 return (uhci_device_bulk_start(reqh));
1247 }
1248
1249 usbd_status
1250 uhci_device_bulk_start(reqh)
1251 usbd_request_handle reqh;
1252 {
1253 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1254 usbd_device_handle dev = upipe->pipe.device;
1255 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1256 uhci_intr_info_t *ii = upipe->iinfo;
1257 uhci_soft_td_t *xfer, *xferend;
1258 uhci_soft_qh_t *sqh;
1259 usb_dma_t *dmap;
1260 usbd_status r;
1261 int len, isread;
1262 int s;
1263
1264 DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d "
1265 "flags=%d\n",
1266 reqh, reqh->buffer, reqh->length, reqh->flags));
1267
1268 if (reqh->isreq)
1269 panic("uhci_device_bulk_transfer: a request\n");
1270
1271 len = reqh->length;
1272 dmap = &upipe->u.bulk.datadma;
1273 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
1274 sqh = upipe->u.bulk.sqh;
1275
1276 upipe->u.bulk.isread = isread;
1277 upipe->u.bulk.length = len;
1278
1279 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1280 if (r != USBD_NORMAL_COMPLETION)
1281 goto ret1;
1282 r = uhci_alloc_std_chain(upipe, sc, len, isread,
1283 reqh->flags & USBD_SHORT_XFER_OK,
1284 dmap, &xfer, &xferend);
1285 if (r != USBD_NORMAL_COMPLETION)
1286 goto ret2;
1287 xferend->td->td_status |= UHCI_TD_IOC;
1288
1289 if (!isread && len != 0)
1290 memcpy(KERNADDR(dmap), reqh->buffer, len);
1291
1292 #ifdef USB_DEBUG
1293 if (uhcidebug > 8) {
1294 printf("uhci_device_bulk_transfer: xfer(1)\n");
1295 uhci_dump_tds(xfer);
1296 }
1297 #endif
1298
1299 /* Set up interrupt info. */
1300 ii->reqh = reqh;
1301 ii->stdstart = xfer;
1302 ii->stdend = xferend;
1303 #ifdef DIAGNOSTIC
1304 ii->isdone = 0;
1305 #endif
1306
1307 sqh->qh->elink = xfer;
1308 sqh->qh->qh_elink = xfer->physaddr;
1309 sqh->intr_info = ii;
1310
1311 s = splusb();
1312 uhci_add_bulk(sc, sqh);
1313 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1314
1315 if (reqh->timeout && !sc->sc_bus.use_polling) {
1316 usb_timeout(uhci_timeout, ii,
1317 MS_TO_TICKS(reqh->timeout), ii->timeout_handle);
1318 }
1319 splx(s);
1320
1321 #ifdef USB_DEBUG
1322 if (uhcidebug > 10) {
1323 printf("uhci_device_bulk_transfer: xfer(2)\n");
1324 uhci_dump_tds(xfer);
1325 }
1326 #endif
1327
1328 if (sc->sc_bus.use_polling)
1329 uhci_waitintr(sc, reqh);
1330
1331 return (USBD_IN_PROGRESS);
1332
1333 ret2:
1334 if (len != 0)
1335 usb_freemem(sc->sc_dmatag, dmap);
1336 ret1:
1337 return (r);
1338 }
1339
1340 /* Abort a device bulk request. */
1341 void
1342 uhci_device_bulk_abort(reqh)
1343 usbd_request_handle reqh;
1344 {
1345 DPRINTF(("uhci_device_bulk_abort:\n"));
1346 uhci_abort_req(reqh, USBD_CANCELLED);
1347 }
1348
1349 void
1350 uhci_abort_req(reqh, status)
1351 usbd_request_handle reqh;
1352 usbd_status status;
1353 {
1354 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1355 uhci_intr_info_t *ii = upipe->iinfo;
1356 uhci_soft_td_t *std;
1357 int s;
1358
1359 /* Make interrupt routine ignore it, */
1360 reqh->status = USBD_CANCELLED;
1361
1362 /* make hardware ignore it, */
1363 for (std = ii->stdstart; std != 0; std = std->td->link.std)
1364 std->td->td_status &= ~UHCI_TD_ACTIVE;
1365 /* make sure hardware has completed, */
1366 usb_delay_ms(reqh->pipe->device->bus, 1);
1367
1368 /* and call final part of interrupt handler. */
1369 s = splusb();
1370 uhci_ii_finish(ii);
1371 splx(s);
1372 }
1373
1374 /* Close a device bulk pipe. */
1375 void
1376 uhci_device_bulk_close(pipe)
1377 usbd_pipe_handle pipe;
1378 {
1379 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1380 usbd_device_handle dev = upipe->pipe.device;
1381 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1382
1383 uhci_free_sqh(sc, upipe->u.bulk.sqh);
1384 uhci_free_intr_info(upipe->iinfo);
1385 /* XXX free other resources */
1386 }
1387
1388 usbd_status
1389 uhci_device_ctrl_transfer(reqh)
1390 usbd_request_handle reqh;
1391 {
1392 int s;
1393 usbd_status r;
1394
1395 s = splusb();
1396 r = usb_insert_transfer(reqh);
1397 splx(s);
1398 if (r != USBD_NORMAL_COMPLETION)
1399 return (r);
1400 else
1401 return (uhci_device_ctrl_start(reqh));
1402 }
1403
1404 usbd_status
1405 uhci_device_ctrl_start(reqh)
1406 usbd_request_handle reqh;
1407 {
1408 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
1409 usbd_status r;
1410
1411 if (!reqh->isreq)
1412 panic("uhci_device_ctrl_transfer: not a request\n");
1413
1414 r = uhci_device_request(reqh);
1415 if (r != USBD_NORMAL_COMPLETION)
1416 return (r);
1417
1418 if (sc->sc_bus.use_polling)
1419 uhci_waitintr(sc, reqh);
1420 return (USBD_IN_PROGRESS);
1421 }
1422
1423 usbd_status
1424 uhci_device_intr_transfer(reqh)
1425 usbd_request_handle reqh;
1426 {
1427 int s;
1428 usbd_status r;
1429
1430 s = splusb();
1431 r = usb_insert_transfer(reqh);
1432 splx(s);
1433 if (r != USBD_NORMAL_COMPLETION)
1434 return (r);
1435 else
1436 return (uhci_device_intr_start(reqh));
1437 }
1438
1439 usbd_status
1440 uhci_device_intr_start(reqh)
1441 usbd_request_handle reqh;
1442 {
1443 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1444 usbd_device_handle dev = upipe->pipe.device;
1445 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1446 uhci_intr_info_t *ii = upipe->iinfo;
1447 uhci_soft_td_t *xfer, *xferend;
1448 uhci_soft_qh_t *sqh;
1449 usb_dma_t *dmap;
1450 usbd_status r;
1451 int len, i;
1452 int s;
1453
1454 DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d "
1455 "flags=%d\n",
1456 reqh, reqh->buffer, reqh->length, reqh->flags));
1457
1458 if (reqh->isreq)
1459 panic("uhci_device_intr_transfer: a request\n");
1460
1461 len = reqh->length;
1462 dmap = &upipe->u.intr.datadma;
1463 if (len == 0)
1464 return (USBD_INVAL); /* XXX should it be? */
1465
1466 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1467 if (r != USBD_NORMAL_COMPLETION)
1468 goto ret1;
1469 r = uhci_alloc_std_chain(upipe, sc, len, 1,
1470 reqh->flags & USBD_SHORT_XFER_OK,
1471 dmap, &xfer, &xferend);
1472 if (r != USBD_NORMAL_COMPLETION)
1473 goto ret2;
1474 xferend->td->td_status |= UHCI_TD_IOC;
1475
1476 #ifdef USB_DEBUG
1477 if (uhcidebug > 10) {
1478 printf("uhci_device_intr_transfer: xfer(1)\n");
1479 uhci_dump_tds(xfer);
1480 uhci_dump_qh(upipe->u.intr.qhs[0]);
1481 }
1482 #endif
1483
1484 s = splusb();
1485 /* Set up interrupt info. */
1486 ii->reqh = reqh;
1487 ii->stdstart = xfer;
1488 ii->stdend = xferend;
1489 #ifdef DIAGNOSTIC
1490 ii->isdone = 0;
1491 #endif
1492
1493 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
1494 upipe->u.intr.qhs[0]));
1495 for (i = 0; i < upipe->u.intr.npoll; i++) {
1496 sqh = upipe->u.intr.qhs[i];
1497 sqh->qh->elink = xfer;
1498 sqh->qh->qh_elink = xfer->physaddr;
1499 }
1500 splx(s);
1501
1502 #ifdef USB_DEBUG
1503 if (uhcidebug > 10) {
1504 printf("uhci_device_intr_transfer: xfer(2)\n");
1505 uhci_dump_tds(xfer);
1506 uhci_dump_qh(upipe->u.intr.qhs[0]);
1507 }
1508 #endif
1509
1510 return (USBD_IN_PROGRESS);
1511
1512 ret2:
1513 if (len != 0)
1514 usb_freemem(sc->sc_dmatag, dmap);
1515 ret1:
1516 return (r);
1517 }
1518
1519 /* Abort a device control request. */
1520 void
1521 uhci_device_ctrl_abort(reqh)
1522 usbd_request_handle reqh;
1523 {
1524 DPRINTF(("uhci_device_ctrl_abort:\n"));
1525 uhci_abort_req(reqh, USBD_CANCELLED);
1526 }
1527
1528 /* Close a device control pipe. */
1529 void
1530 uhci_device_ctrl_close(pipe)
1531 usbd_pipe_handle pipe;
1532 {
1533 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1534
1535 uhci_free_intr_info(upipe->iinfo);
1536 /* XXX free other resources */
1537 }
1538
1539 /* Abort a device interrupt request. */
1540 void
1541 uhci_device_intr_abort(reqh)
1542 usbd_request_handle reqh;
1543 {
1544 struct uhci_pipe *upipe;
1545
1546 DPRINTFN(1, ("uhci_device_intr_abort: reqh=%p\n", reqh));
1547 /* XXX inactivate */
1548 usb_delay_ms(reqh->pipe->device->bus, 2); /* make sure it is done */
1549 if (reqh->pipe->repeat) {
1550 DPRINTF(("uhci_device_intr_abort: remove\n"));
1551 reqh->pipe->repeat = 0;
1552 upipe = (struct uhci_pipe *)reqh->pipe;
1553 uhci_intr_done(upipe->u.intr.qhs[0]->intr_info);
1554 }
1555 }
1556
1557 /* Close a device interrupt pipe. */
1558 void
1559 uhci_device_intr_close(pipe)
1560 usbd_pipe_handle pipe;
1561 {
1562 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1563 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
1564 int i, s, npoll;
1565
1566 upipe->iinfo->stdstart = 0; /* inactive */
1567
1568 /* Unlink descriptors from controller data structures. */
1569 npoll = upipe->u.intr.npoll;
1570 uhci_lock_frames(sc);
1571 for (i = 0; i < npoll; i++)
1572 uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos,
1573 upipe->u.intr.qhs[i]);
1574 uhci_unlock_frames(sc);
1575
1576 /*
1577 * We now have to wait for any activity on the physical
1578 * descriptors to stop.
1579 */
1580 usb_delay_ms(&sc->sc_bus, 2);
1581
1582 for(i = 0; i < npoll; i++)
1583 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
1584 free(upipe->u.intr.qhs, M_USBHC);
1585
1586 s = splusb();
1587 LIST_REMOVE(upipe->iinfo, list); /* remove from active list */
1588 splx(s);
1589 uhci_free_intr_info(upipe->iinfo);
1590
1591 /* XXX free other resources */
1592 }
1593
1594 usbd_status
1595 uhci_device_request(reqh)
1596 usbd_request_handle reqh;
1597 {
1598 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1599 usb_device_request_t *req = &reqh->request;
1600 usbd_device_handle dev = upipe->pipe.device;
1601 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1602 int addr = dev->address;
1603 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1604 uhci_intr_info_t *ii = upipe->iinfo;
1605 uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend;
1606 uhci_soft_qh_t *sqh;
1607 usb_dma_t *dmap;
1608 int len;
1609 u_int32_t ls;
1610 usbd_status r;
1611 int isread;
1612 int s;
1613
1614 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
1615 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1616 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1617 UGETW(req->wIndex), UGETW(req->wLength),
1618 addr, endpt));
1619
1620 ls = dev->lowspeed ? UHCI_TD_LS : 0;
1621 isread = req->bmRequestType & UT_READ;
1622 len = UGETW(req->wLength);
1623
1624 setup = upipe->u.ctl.setup;
1625 stat = upipe->u.ctl.stat;
1626 sqh = upipe->u.ctl.sqh;
1627 dmap = &upipe->u.ctl.datadma;
1628
1629 /* Set up data transaction */
1630 if (len != 0) {
1631 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1632 if (r != USBD_NORMAL_COMPLETION)
1633 goto ret1;
1634 upipe->pipe.endpoint->toggle = 1;
1635 r = uhci_alloc_std_chain(upipe, sc, len, isread,
1636 reqh->flags & USBD_SHORT_XFER_OK,
1637 dmap, &xfer, &xferend);
1638 if (r != USBD_NORMAL_COMPLETION)
1639 goto ret2;
1640 next = xfer;
1641 xferend->td->link.std = stat;
1642 xferend->td->td_link = stat->physaddr;
1643 } else {
1644 next = stat;
1645 }
1646 upipe->u.ctl.length = len;
1647
1648 memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
1649 if (!isread && len != 0)
1650 memcpy(KERNADDR(dmap), reqh->buffer, len);
1651
1652 setup->td->link.std = next;
1653 setup->td->td_link = next->physaddr;
1654 setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE;
1655 setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr);
1656 setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma);
1657
1658 stat->td->link.std = 0;
1659 stat->td->td_link = UHCI_PTR_T;
1660 stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls |
1661 UHCI_TD_ACTIVE | UHCI_TD_IOC;
1662 stat->td->td_token =
1663 isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
1664 UHCI_TD_IN (0, endpt, addr, 1);
1665 stat->td->td_buffer = 0;
1666
1667 #ifdef USB_DEBUG
1668 if (uhcidebug > 20) {
1669 printf("uhci_device_request: setup\n");
1670 uhci_dump_td(setup);
1671 printf("uhci_device_request: stat\n");
1672 uhci_dump_td(stat);
1673 }
1674 #endif
1675
1676 /* Set up interrupt info. */
1677 ii->reqh = reqh;
1678 ii->stdstart = setup;
1679 ii->stdend = stat;
1680 #ifdef DIAGNOSTIC
1681 ii->isdone = 0;
1682 #endif
1683
1684 sqh->qh->elink = setup;
1685 sqh->qh->qh_elink = setup->physaddr;
1686 sqh->intr_info = ii;
1687
1688 s = splusb();
1689 uhci_add_ctrl(sc, sqh);
1690 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list);
1691 #ifdef USB_DEBUG
1692 if (uhcidebug > 12) {
1693 uhci_soft_td_t *std;
1694 uhci_soft_qh_t *xqh;
1695 uhci_soft_qh_t *sxqh;
1696 int maxqh = 0;
1697 uhci_physaddr_t link;
1698 printf("uhci_enter_ctl_q: follow from [0]\n");
1699 for (std = sc->sc_vframes[0].htd, link = 0;
1700 (link & UHCI_PTR_Q) == 0;
1701 std = std->td->link.std) {
1702 link = std->td->td_link;
1703 uhci_dump_td(std);
1704 }
1705 for (sxqh = xqh = (uhci_soft_qh_t *)std;
1706 xqh;
1707 xqh = (maxqh++ == 5 || xqh->qh->hlink==sxqh ||
1708 xqh->qh->hlink==xqh ? NULL : xqh->qh->hlink)) {
1709 uhci_dump_qh(xqh);
1710 uhci_dump_qh(sxqh);
1711 }
1712 printf("Enqueued QH:\n");
1713 uhci_dump_qh(sqh);
1714 uhci_dump_tds(sqh->qh->elink);
1715 }
1716 #endif
1717 if (reqh->timeout && !sc->sc_bus.use_polling) {
1718 usb_timeout(uhci_timeout, ii,
1719 MS_TO_TICKS(reqh->timeout), ii->timeout_handle);
1720 }
1721 splx(s);
1722
1723 return (USBD_NORMAL_COMPLETION);
1724
1725 ret2:
1726 if (len != 0)
1727 usb_freemem(sc->sc_dmatag, dmap);
1728 ret1:
1729 return (r);
1730 }
1731
1732 usbd_status
1733 uhci_device_isoc_transfer(reqh)
1734 usbd_request_handle reqh;
1735 {
1736 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1737 #ifdef USB_DEBUG
1738 usbd_device_handle dev = upipe->pipe.device;
1739 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1740 #endif
1741
1742 DPRINTFN(1,("uhci_device_isoc_transfer: sc=%p\n", sc));
1743 if (upipe->u.iso.bufsize == 0)
1744 return (USBD_INVAL);
1745
1746 /* XXX copy data */
1747 return (USBD_XXX);
1748 }
1749
1750 usbd_status
1751 uhci_device_isoc_start(reqh)
1752 usbd_request_handle reqh;
1753 {
1754 return (USBD_XXX);
1755 }
1756
1757 void
1758 uhci_device_isoc_abort(reqh)
1759 usbd_request_handle reqh;
1760 {
1761 /* XXX Can't abort this. */
1762 }
1763
1764 void
1765 uhci_device_isoc_close(pipe)
1766 usbd_pipe_handle pipe;
1767 {
1768 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1769 usbd_device_handle dev = upipe->pipe.device;
1770 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1771 struct iso *iso;
1772 int i;
1773
1774 /*
1775 * Make sure all TDs are marked as inactive.
1776 * Wait for completion.
1777 * Unschedule.
1778 * Deallocate.
1779 */
1780 iso = &upipe->u.iso;
1781
1782 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
1783 iso->stds[i]->td->td_status &= ~UHCI_TD_ACTIVE;
1784 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
1785
1786 uhci_lock_frames(sc);
1787 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
1788 uhci_soft_td_t *std, *vstd;
1789
1790 std = iso->stds[i];
1791 for (vstd = sc->sc_vframes[i % UHCI_VFRAMELIST_COUNT].htd;
1792 vstd && vstd->td->link.std != std;
1793 vstd = vstd->td->link.std)
1794 ;
1795 if (!vstd) {
1796 /*panic*/
1797 printf("uhci_device_isoc_close: %p not found\n", std);
1798 uhci_unlock_frames(sc);
1799 return;
1800 }
1801 vstd->td->link = std->td->link;
1802 vstd->td->td_link = std->td->td_link;
1803 uhci_free_std(sc, std);
1804 }
1805 uhci_unlock_frames(sc);
1806
1807 for (i = 0; i < iso->nbuf; i++)
1808 usb_freemem(sc->sc_dmatag, &iso->bufs[i]);
1809 free(iso->stds, M_USBHC);
1810 free(iso->bufs, M_USBHC);
1811
1812 /* XXX what else? */
1813 }
1814
1815 usbd_status
1816 uhci_device_isoc_setbuf(pipe, bufsize, nbuf)
1817 usbd_pipe_handle pipe;
1818 u_int bufsize;
1819 u_int nbuf;
1820 {
1821 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1822 usbd_device_handle dev = upipe->pipe.device;
1823 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1824 int addr = upipe->pipe.device->address;
1825 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1826 int rd = upipe->pipe.endpoint->edesc->bEndpointAddress & UE_IN;
1827 struct iso *iso;
1828 int i;
1829 usbd_status r;
1830
1831 /*
1832 * For simplicity the number of buffers must fit nicely in the frame
1833 * list.
1834 */
1835 if (UHCI_VFRAMELIST_COUNT % nbuf != 0)
1836 return (USBD_INVAL);
1837
1838 iso = &upipe->u.iso;
1839 iso->bufsize = bufsize;
1840 iso->nbuf = nbuf;
1841
1842 /* Allocate memory for buffers. */
1843 iso->bufs = malloc(nbuf * sizeof(usb_dma_t), M_USBHC, M_WAITOK);
1844 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
1845 M_USBHC, M_WAITOK);
1846
1847 for (i = 0; i < nbuf; i++) {
1848 r = usb_allocmem(sc->sc_dmatag, bufsize, 0, &iso->bufs[i]);
1849 if (r != USBD_NORMAL_COMPLETION) {
1850 nbuf = i;
1851 goto bad1;
1852 }
1853 }
1854
1855 /* Allocate the TDs. */
1856 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
1857 iso->stds[i] = uhci_alloc_std(sc);
1858 if (iso->stds[i] == 0)
1859 goto bad2;
1860 }
1861
1862 /* XXX check schedule */
1863
1864 /* XXX interrupts */
1865
1866 /* Insert TDs into schedule, all marked inactive. */
1867 uhci_lock_frames(sc);
1868 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
1869 uhci_soft_td_t *std, *vstd;
1870
1871 std = iso->stds[i];
1872 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */
1873 std->td->td_token =
1874 rd ? UHCI_TD_IN (0, endpt, addr, 0) :
1875 UHCI_TD_OUT(0, endpt, addr, 0);
1876 std->td->td_buffer = DMAADDR(&iso->bufs[i % nbuf]);
1877
1878 vstd = sc->sc_vframes[i % UHCI_VFRAMELIST_COUNT].htd;
1879 std->td->link = vstd->td->link;
1880 std->td->td_link = vstd->td->td_link;
1881 vstd->td->link.std = std;
1882 vstd->td->td_link = std->physaddr;
1883 }
1884 uhci_unlock_frames(sc);
1885
1886 return (USBD_NORMAL_COMPLETION);
1887
1888 bad2:
1889 while (--i >= 0)
1890 uhci_free_std(sc, iso->stds[i]);
1891 bad1:
1892 for (i = 0; i < nbuf; i++)
1893 usb_freemem(sc->sc_dmatag, &iso->bufs[i]);
1894 free(iso->stds, M_USBHC);
1895 free(iso->bufs, M_USBHC);
1896 return (USBD_NOMEM);
1897 }
1898
1899 void
1900 uhci_isoc_done(ii)
1901 uhci_intr_info_t *ii;
1902 {
1903 }
1904
1905 void
1906 uhci_intr_done(ii)
1907 uhci_intr_info_t *ii;
1908 {
1909 uhci_softc_t *sc = ii->sc;
1910 usbd_request_handle reqh = ii->reqh;
1911 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1912 usb_dma_t *dma;
1913 uhci_soft_qh_t *sqh;
1914 int i, npoll;
1915
1916 DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen));
1917
1918 dma = &upipe->u.intr.datadma;
1919 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
1920 npoll = upipe->u.intr.npoll;
1921 for(i = 0; i < npoll; i++) {
1922 sqh = upipe->u.intr.qhs[i];
1923 sqh->qh->elink = 0;
1924 sqh->qh->qh_elink = UHCI_PTR_T;
1925 }
1926 uhci_free_std_chain(sc, ii->stdstart, 0);
1927
1928 /* XXX Wasteful. */
1929 if (reqh->pipe->repeat) {
1930 uhci_soft_td_t *xfer, *xferend;
1931
1932 /* This alloc cannot fail since we freed the chain above. */
1933 uhci_alloc_std_chain(upipe, sc, reqh->length, 1,
1934 reqh->flags & USBD_SHORT_XFER_OK,
1935 dma, &xfer, &xferend);
1936 xferend->td->td_status |= UHCI_TD_IOC;
1937
1938 #ifdef USB_DEBUG
1939 if (uhcidebug > 10) {
1940 printf("uhci_device_intr_done: xfer(1)\n");
1941 uhci_dump_tds(xfer);
1942 uhci_dump_qh(upipe->u.intr.qhs[0]);
1943 }
1944 #endif
1945
1946 ii->stdstart = xfer;
1947 ii->stdend = xferend;
1948 #ifdef DIAGNOSTIC
1949 ii->isdone = 0;
1950 #endif
1951 for (i = 0; i < npoll; i++) {
1952 sqh = upipe->u.intr.qhs[i];
1953 sqh->qh->elink = xfer;
1954 sqh->qh->qh_elink = xfer->physaddr;
1955 }
1956 } else {
1957 usb_freemem(sc->sc_dmatag, dma);
1958 ii->stdstart = 0; /* mark as inactive */
1959 usb_start_next(reqh->pipe);
1960 }
1961 }
1962
1963 /* Deallocate request data structures */
1964 void
1965 uhci_ctrl_done(ii)
1966 uhci_intr_info_t *ii;
1967 {
1968 uhci_softc_t *sc = ii->sc;
1969 usbd_request_handle reqh = ii->reqh;
1970 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
1971 u_int len = upipe->u.ctl.length;
1972 usb_dma_t *dma;
1973 uhci_td_t *htd = ii->stdstart->td;
1974
1975 #ifdef DIAGNOSTIC
1976 if (!reqh->isreq)
1977 panic("uhci_ctrl_done: not a request\n");
1978 #endif
1979
1980 LIST_REMOVE(ii, list); /* remove from active list */
1981
1982 uhci_remove_ctrl(sc, upipe->u.ctl.sqh);
1983
1984 if (len != 0) {
1985 dma = &upipe->u.ctl.datadma;
1986 if (reqh->request.bmRequestType & UT_READ)
1987 memcpy(reqh->buffer, KERNADDR(dma), len);
1988 uhci_free_std_chain(sc, htd->link.std, ii->stdend);
1989 usb_freemem(sc->sc_dmatag, dma);
1990 }
1991 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen));
1992 }
1993
1994 /* Deallocate request data structures */
1995 void
1996 uhci_bulk_done(ii)
1997 uhci_intr_info_t *ii;
1998 {
1999 uhci_softc_t *sc = ii->sc;
2000 usbd_request_handle reqh = ii->reqh;
2001 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe;
2002 uhci_soft_td_t *std;
2003 u_int datalen = upipe->u.bulk.length;
2004 usb_dma_t *dma;
2005
2006 LIST_REMOVE(ii, list); /* remove from active list */
2007
2008 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2009
2010 /* find the toggle for the last transfer and invert it */
2011 for (std = ii->stdstart; std; std = std->td->link.std) {
2012 if (std->td->td_status & UHCI_TD_ACTIVE)
2013 break;
2014 upipe->nexttoggle = UHCI_TD_GET_DT(std->td->td_token);
2015 }
2016 upipe->nexttoggle ^= 1;
2017
2018 /* copy the data from dma memory to userland storage */
2019 dma = &upipe->u.bulk.datadma;
2020 if (upipe->u.bulk.isread)
2021 memcpy(reqh->buffer, KERNADDR(dma), datalen);
2022 uhci_free_std_chain(sc, ii->stdstart, 0);
2023 usb_freemem(sc->sc_dmatag, dma);
2024
2025 DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen));
2026 }
2027
2028 /* Add interrupt QH, called with vflock. */
2029 void
2030 uhci_add_intr(sc, n, sqh)
2031 uhci_softc_t *sc;
2032 int n;
2033 uhci_soft_qh_t *sqh;
2034 {
2035 struct uhci_vframe *vf = &sc->sc_vframes[n];
2036 uhci_qh_t *eqh;
2037
2038 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh));
2039 eqh = vf->eqh->qh;
2040 sqh->qh->hlink = eqh->hlink;
2041 sqh->qh->qh_hlink = eqh->qh_hlink;
2042 eqh->hlink = sqh;
2043 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q;
2044 vf->eqh = sqh;
2045 vf->bandwidth++;
2046 }
2047
2048 /* Remove interrupt QH, called with vflock. */
2049 void
2050 uhci_remove_intr(sc, n, sqh)
2051 uhci_softc_t *sc;
2052 int n;
2053 uhci_soft_qh_t *sqh;
2054 {
2055 struct uhci_vframe *vf = &sc->sc_vframes[n];
2056 uhci_soft_qh_t *pqh;
2057
2058 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh));
2059
2060 for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink)
2061 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
2062 if (pqh->qh->qh_hlink & UHCI_PTR_T) {
2063 printf("uhci_remove_intr: QH not found\n");
2064 return;
2065 }
2066 #else
2067 ;
2068 #endif
2069 pqh->qh->hlink = sqh->qh->hlink;
2070 pqh->qh->qh_hlink = sqh->qh->qh_hlink;
2071 if (vf->eqh == sqh)
2072 vf->eqh = pqh;
2073 vf->bandwidth--;
2074 }
2075
2076 usbd_status
2077 uhci_device_setintr(sc, upipe, ival)
2078 uhci_softc_t *sc;
2079 struct uhci_pipe *upipe;
2080 int ival;
2081 {
2082 uhci_soft_qh_t *sqh;
2083 int i, npoll, s;
2084 u_int bestbw, bw, bestoffs, offs;
2085
2086 DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
2087 if (ival == 0) {
2088 printf("uhci_setintr: 0 interval\n");
2089 return (USBD_INVAL);
2090 }
2091
2092 if (ival > UHCI_VFRAMELIST_COUNT)
2093 ival = UHCI_VFRAMELIST_COUNT;
2094 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2095 DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
2096
2097 upipe->u.intr.npoll = npoll;
2098 upipe->u.intr.qhs =
2099 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2100
2101 /*
2102 * Figure out which offset in the schedule that has most
2103 * bandwidth left over.
2104 */
2105 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2106 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2107 for (bw = i = 0; i < npoll; i++)
2108 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2109 if (bw < bestbw) {
2110 bestbw = bw;
2111 bestoffs = offs;
2112 }
2113 }
2114 DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2115
2116 upipe->iinfo->stdstart = 0;
2117 for(i = 0; i < npoll; i++) {
2118 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2119 sqh->qh->elink = 0;
2120 sqh->qh->qh_elink = UHCI_PTR_T;
2121 sqh->pos = MOD(i * ival + bestoffs);
2122 sqh->intr_info = upipe->iinfo;
2123 }
2124 #undef MOD
2125
2126 s = splusb();
2127 LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list);
2128 splx(s);
2129
2130 uhci_lock_frames(sc);
2131 /* Enter QHs into the controller data structures. */
2132 for(i = 0; i < npoll; i++)
2133 uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos,
2134 upipe->u.intr.qhs[i]);
2135 uhci_unlock_frames(sc);
2136
2137 DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
2138 return (USBD_NORMAL_COMPLETION);
2139 }
2140
2141 /* Open a new pipe. */
2142 usbd_status
2143 uhci_open(pipe)
2144 usbd_pipe_handle pipe;
2145 {
2146 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2147 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2148 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2149 usbd_status r;
2150
2151 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2152 pipe, pipe->device->address,
2153 ed->bEndpointAddress, sc->sc_addr));
2154 if (pipe->device->address == sc->sc_addr) {
2155 switch (ed->bEndpointAddress) {
2156 case USB_CONTROL_ENDPOINT:
2157 pipe->methods = &uhci_root_ctrl_methods;
2158 break;
2159 case UE_IN | UHCI_INTR_ENDPT:
2160 pipe->methods = &uhci_root_intr_methods;
2161 break;
2162 default:
2163 return (USBD_INVAL);
2164 }
2165 } else {
2166 upipe->iinfo = uhci_alloc_intr_info(sc);
2167 if (upipe->iinfo == 0)
2168 return (USBD_NOMEM);
2169 switch (ed->bmAttributes & UE_XFERTYPE) {
2170 case UE_CONTROL:
2171 pipe->methods = &uhci_device_ctrl_methods;
2172 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2173 if (upipe->u.ctl.sqh == 0)
2174 goto bad;
2175 upipe->u.ctl.setup = uhci_alloc_std(sc);
2176 if (upipe->u.ctl.setup == 0) {
2177 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2178 goto bad;
2179 }
2180 upipe->u.ctl.stat = uhci_alloc_std(sc);
2181 if (upipe->u.ctl.stat == 0) {
2182 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2183 uhci_free_std(sc, upipe->u.ctl.setup);
2184 goto bad;
2185 }
2186 r = usb_allocmem(sc->sc_dmatag,
2187 sizeof(usb_device_request_t),
2188 0, &upipe->u.ctl.reqdma);
2189 if (r != USBD_NORMAL_COMPLETION) {
2190 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2191 uhci_free_std(sc, upipe->u.ctl.setup);
2192 uhci_free_std(sc, upipe->u.ctl.stat);
2193 goto bad;
2194 }
2195 break;
2196 case UE_INTERRUPT:
2197 pipe->methods = &uhci_device_intr_methods;
2198 return (uhci_device_setintr(sc, upipe, ed->bInterval));
2199 case UE_ISOCHRONOUS:
2200 pipe->methods = &uhci_device_isoc_methods;
2201 upipe->u.iso.nbuf = 0;
2202 return (USBD_NORMAL_COMPLETION);
2203 case UE_BULK:
2204 pipe->methods = &uhci_device_bulk_methods;
2205 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2206 if (upipe->u.bulk.sqh == 0)
2207 goto bad;
2208 break;
2209 }
2210 }
2211 return (USBD_NORMAL_COMPLETION);
2212
2213 bad:
2214 uhci_free_intr_info(upipe->iinfo);
2215 return (USBD_NOMEM);
2216 }
2217
2218 /*
2219 * Data structures and routines to emulate the root hub.
2220 */
2221 usb_device_descriptor_t uhci_devd = {
2222 USB_DEVICE_DESCRIPTOR_SIZE,
2223 UDESC_DEVICE, /* type */
2224 {0x00, 0x01}, /* USB version */
2225 UCLASS_HUB, /* class */
2226 USUBCLASS_HUB, /* subclass */
2227 0, /* protocol */
2228 64, /* max packet */
2229 {0},{0},{0x00,0x01}, /* device id */
2230 1,2,0, /* string indicies */
2231 1 /* # of configurations */
2232 };
2233
2234 usb_config_descriptor_t uhci_confd = {
2235 USB_CONFIG_DESCRIPTOR_SIZE,
2236 UDESC_CONFIG,
2237 {USB_CONFIG_DESCRIPTOR_SIZE +
2238 USB_INTERFACE_DESCRIPTOR_SIZE +
2239 USB_ENDPOINT_DESCRIPTOR_SIZE},
2240 1,
2241 1,
2242 0,
2243 UC_SELF_POWERED,
2244 0 /* max power */
2245 };
2246
2247 usb_interface_descriptor_t uhci_ifcd = {
2248 USB_INTERFACE_DESCRIPTOR_SIZE,
2249 UDESC_INTERFACE,
2250 0,
2251 0,
2252 1,
2253 UCLASS_HUB,
2254 USUBCLASS_HUB,
2255 0,
2256 0
2257 };
2258
2259 usb_endpoint_descriptor_t uhci_endpd = {
2260 USB_ENDPOINT_DESCRIPTOR_SIZE,
2261 UDESC_ENDPOINT,
2262 UE_IN | UHCI_INTR_ENDPT,
2263 UE_INTERRUPT,
2264 {8},
2265 255
2266 };
2267
2268 usb_hub_descriptor_t uhci_hubd_piix = {
2269 USB_HUB_DESCRIPTOR_SIZE,
2270 UDESC_HUB,
2271 2,
2272 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2273 50, /* power on to power good */
2274 0,
2275 { 0x00 }, /* both ports are removable */
2276 };
2277
2278 int
2279 uhci_str(p, l, s)
2280 usb_string_descriptor_t *p;
2281 int l;
2282 char *s;
2283 {
2284 int i;
2285
2286 if (l == 0)
2287 return (0);
2288 p->bLength = 2 * strlen(s) + 2;
2289 if (l == 1)
2290 return (1);
2291 p->bDescriptorType = UDESC_STRING;
2292 l -= 2;
2293 for (i = 0; s[i] && l > 1; i++, l -= 2)
2294 USETW2(p->bString[i], 0, s[i]);
2295 return (2*i+2);
2296 }
2297
2298 /*
2299 * Simulate a hardware hub by handling all the necessary requests.
2300 */
2301 usbd_status
2302 uhci_root_ctrl_transfer(reqh)
2303 usbd_request_handle reqh;
2304 {
2305 int s;
2306 usbd_status r;
2307
2308 s = splusb();
2309 r = usb_insert_transfer(reqh);
2310 splx(s);
2311 if (r != USBD_NORMAL_COMPLETION)
2312 return (r);
2313 else
2314 return (uhci_root_ctrl_start(reqh));
2315 }
2316
2317 usbd_status
2318 uhci_root_ctrl_start(reqh)
2319 usbd_request_handle reqh;
2320 {
2321 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
2322 usb_device_request_t *req;
2323 void *buf;
2324 int port, x;
2325 int len, value, index, status, change, l, totlen = 0;
2326 usb_port_status_t ps;
2327 usbd_status r;
2328
2329 if (!reqh->isreq)
2330 panic("uhci_root_ctrl_transfer: not a request\n");
2331 req = &reqh->request;
2332 buf = reqh->buffer;
2333
2334 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
2335 req->bmRequestType, req->bRequest));
2336
2337 len = UGETW(req->wLength);
2338 value = UGETW(req->wValue);
2339 index = UGETW(req->wIndex);
2340 #define C(x,y) ((x) | ((y) << 8))
2341 switch(C(req->bRequest, req->bmRequestType)) {
2342 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2343 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2344 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2345 /*
2346 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2347 * for the integrated root hub.
2348 */
2349 break;
2350 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2351 if (len > 0) {
2352 *(u_int8_t *)buf = sc->sc_conf;
2353 totlen = 1;
2354 }
2355 break;
2356 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2357 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
2358 switch(value >> 8) {
2359 case UDESC_DEVICE:
2360 if ((value & 0xff) != 0) {
2361 r = USBD_IOERROR;
2362 goto ret;
2363 }
2364 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2365 USETW(uhci_devd.idVendor, sc->sc_id_vendor);
2366 memcpy(buf, &uhci_devd, l);
2367 break;
2368 case UDESC_CONFIG:
2369 if ((value & 0xff) != 0) {
2370 r = USBD_IOERROR;
2371 goto ret;
2372 }
2373 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2374 memcpy(buf, &uhci_confd, l);
2375 buf = (char *)buf + l;
2376 len -= l;
2377 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2378 totlen += l;
2379 memcpy(buf, &uhci_ifcd, l);
2380 buf = (char *)buf + l;
2381 len -= l;
2382 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2383 totlen += l;
2384 memcpy(buf, &uhci_endpd, l);
2385 break;
2386 case UDESC_STRING:
2387 if (len == 0)
2388 break;
2389 *(u_int8_t *)buf = 0;
2390 totlen = 1;
2391 switch (value & 0xff) {
2392 case 1: /* Vendor */
2393 totlen = uhci_str(buf, len, sc->sc_vendor);
2394 break;
2395 case 2: /* Product */
2396 totlen = uhci_str(buf, len, "UHCI root hub");
2397 break;
2398 }
2399 break;
2400 default:
2401 r = USBD_IOERROR;
2402 goto ret;
2403 }
2404 break;
2405 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2406 if (len > 0) {
2407 *(u_int8_t *)buf = 0;
2408 totlen = 1;
2409 }
2410 break;
2411 case C(UR_GET_STATUS, UT_READ_DEVICE):
2412 if (len > 1) {
2413 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2414 totlen = 2;
2415 }
2416 break;
2417 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2418 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2419 if (len > 1) {
2420 USETW(((usb_status_t *)buf)->wStatus, 0);
2421 totlen = 2;
2422 }
2423 break;
2424 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2425 if (value >= USB_MAX_DEVICES) {
2426 r = USBD_IOERROR;
2427 goto ret;
2428 }
2429 sc->sc_addr = value;
2430 break;
2431 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2432 if (value != 0 && value != 1) {
2433 r = USBD_IOERROR;
2434 goto ret;
2435 }
2436 sc->sc_conf = value;
2437 break;
2438 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2439 break;
2440 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2441 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2442 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2443 r = USBD_IOERROR;
2444 goto ret;
2445 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2446 break;
2447 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2448 break;
2449 /* Hub requests */
2450 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2451 break;
2452 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2453 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2454 "port=%d feature=%d\n",
2455 index, value));
2456 if (index == 1)
2457 port = UHCI_PORTSC1;
2458 else if (index == 2)
2459 port = UHCI_PORTSC2;
2460 else {
2461 r = USBD_IOERROR;
2462 goto ret;
2463 }
2464 switch(value) {
2465 case UHF_PORT_ENABLE:
2466 x = UREAD2(sc, port);
2467 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
2468 break;
2469 case UHF_PORT_SUSPEND:
2470 x = UREAD2(sc, port);
2471 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
2472 break;
2473 case UHF_PORT_RESET:
2474 x = UREAD2(sc, port);
2475 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2476 break;
2477 case UHF_C_PORT_CONNECTION:
2478 x = UREAD2(sc, port);
2479 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
2480 break;
2481 case UHF_C_PORT_ENABLE:
2482 x = UREAD2(sc, port);
2483 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
2484 break;
2485 case UHF_C_PORT_OVER_CURRENT:
2486 x = UREAD2(sc, port);
2487 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
2488 break;
2489 case UHF_C_PORT_RESET:
2490 sc->sc_isreset = 0;
2491 r = USBD_NORMAL_COMPLETION;
2492 goto ret;
2493 case UHF_PORT_CONNECTION:
2494 case UHF_PORT_OVER_CURRENT:
2495 case UHF_PORT_POWER:
2496 case UHF_PORT_LOW_SPEED:
2497 case UHF_C_PORT_SUSPEND:
2498 default:
2499 r = USBD_IOERROR;
2500 goto ret;
2501 }
2502 break;
2503 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
2504 if (index == 1)
2505 port = UHCI_PORTSC1;
2506 else if (index == 2)
2507 port = UHCI_PORTSC2;
2508 else {
2509 r = USBD_IOERROR;
2510 goto ret;
2511 }
2512 if (len > 0) {
2513 *(u_int8_t *)buf =
2514 (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
2515 UHCI_PORTSC_LS_SHIFT;
2516 totlen = 1;
2517 }
2518 break;
2519 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2520 if (value != 0) {
2521 r = USBD_IOERROR;
2522 goto ret;
2523 }
2524 l = min(len, USB_HUB_DESCRIPTOR_SIZE);
2525 totlen = l;
2526 memcpy(buf, &uhci_hubd_piix, l);
2527 break;
2528 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2529 if (len != 4) {
2530 r = USBD_IOERROR;
2531 goto ret;
2532 }
2533 memset(buf, 0, len);
2534 totlen = len;
2535 break;
2536 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2537 if (index == 1)
2538 port = UHCI_PORTSC1;
2539 else if (index == 2)
2540 port = UHCI_PORTSC2;
2541 else {
2542 r = USBD_IOERROR;
2543 goto ret;
2544 }
2545 if (len != 4) {
2546 r = USBD_IOERROR;
2547 goto ret;
2548 }
2549 x = UREAD2(sc, port);
2550 status = change = 0;
2551 if (x & UHCI_PORTSC_CCS )
2552 status |= UPS_CURRENT_CONNECT_STATUS;
2553 if (x & UHCI_PORTSC_CSC )
2554 change |= UPS_C_CONNECT_STATUS;
2555 if (x & UHCI_PORTSC_PE )
2556 status |= UPS_PORT_ENABLED;
2557 if (x & UHCI_PORTSC_POEDC)
2558 change |= UPS_C_PORT_ENABLED;
2559 if (x & UHCI_PORTSC_OCI )
2560 status |= UPS_OVERCURRENT_INDICATOR;
2561 if (x & UHCI_PORTSC_OCIC )
2562 change |= UPS_C_OVERCURRENT_INDICATOR;
2563 if (x & UHCI_PORTSC_SUSP )
2564 status |= UPS_SUSPEND;
2565 if (x & UHCI_PORTSC_LSDA )
2566 status |= UPS_LOW_SPEED;
2567 status |= UPS_PORT_POWER;
2568 if (sc->sc_isreset)
2569 change |= UPS_C_PORT_RESET;
2570 USETW(ps.wPortStatus, status);
2571 USETW(ps.wPortChange, change);
2572 l = min(len, sizeof ps);
2573 memcpy(buf, &ps, l);
2574 totlen = l;
2575 break;
2576 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2577 r = USBD_IOERROR;
2578 goto ret;
2579 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2580 break;
2581 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2582 if (index == 1)
2583 port = UHCI_PORTSC1;
2584 else if (index == 2)
2585 port = UHCI_PORTSC2;
2586 else {
2587 r = USBD_IOERROR;
2588 goto ret;
2589 }
2590 switch(value) {
2591 case UHF_PORT_ENABLE:
2592 x = UREAD2(sc, port);
2593 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2594 break;
2595 case UHF_PORT_SUSPEND:
2596 x = UREAD2(sc, port);
2597 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
2598 break;
2599 case UHF_PORT_RESET:
2600 x = UREAD2(sc, port);
2601 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2602 usb_delay_ms(&sc->sc_bus, 10);
2603 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2604 delay(100);
2605 x = UREAD2(sc, port);
2606 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2607 delay(100);
2608 DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
2609 index, UREAD2(sc, port)));
2610 sc->sc_isreset = 1;
2611 break;
2612 case UHF_C_PORT_CONNECTION:
2613 case UHF_C_PORT_ENABLE:
2614 case UHF_C_PORT_OVER_CURRENT:
2615 case UHF_PORT_CONNECTION:
2616 case UHF_PORT_OVER_CURRENT:
2617 case UHF_PORT_POWER:
2618 case UHF_PORT_LOW_SPEED:
2619 case UHF_C_PORT_SUSPEND:
2620 case UHF_C_PORT_RESET:
2621 default:
2622 r = USBD_IOERROR;
2623 goto ret;
2624 }
2625 break;
2626 default:
2627 r = USBD_IOERROR;
2628 goto ret;
2629 }
2630 reqh->actlen = totlen;
2631 r = USBD_NORMAL_COMPLETION;
2632 ret:
2633 reqh->status = r;
2634 reqh->xfercb(reqh);
2635 usb_start_next(reqh->pipe);
2636 return (USBD_IN_PROGRESS);
2637 }
2638
2639 /* Abort a root control request. */
2640 void
2641 uhci_root_ctrl_abort(reqh)
2642 usbd_request_handle reqh;
2643 {
2644 /* Nothing to do, all transfers are syncronous. */
2645 }
2646
2647 /* Close the root pipe. */
2648 void
2649 uhci_root_ctrl_close(pipe)
2650 usbd_pipe_handle pipe;
2651 {
2652 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2653
2654 usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle);
2655 sc->sc_has_timo = 0;
2656 DPRINTF(("uhci_root_ctrl_close\n"));
2657 }
2658
2659 /* Abort a root interrupt request. */
2660 void
2661 uhci_root_intr_abort(reqh)
2662 usbd_request_handle reqh;
2663 {
2664 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus;
2665
2666 usb_untimeout(uhci_timo, reqh, reqh->timo_handle);
2667 sc->sc_has_timo = 0;
2668 }
2669
2670 usbd_status
2671 uhci_root_intr_transfer(reqh)
2672 usbd_request_handle reqh;
2673 {
2674 int s;
2675 usbd_status r;
2676
2677 s = splusb();
2678 r = usb_insert_transfer(reqh);
2679 splx(s);
2680 if (r != USBD_NORMAL_COMPLETION)
2681 return (r);
2682 else
2683 return (uhci_root_intr_start(reqh));
2684 }
2685
2686 /* Start a transfer on the root interrupt pipe */
2687 usbd_status
2688 uhci_root_intr_start(reqh)
2689 usbd_request_handle reqh;
2690 {
2691 usbd_pipe_handle pipe = reqh->pipe;
2692 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2693 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2694 usb_dma_t *dmap;
2695 usbd_status r;
2696 int len;
2697
2698 DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d "
2699 "flags=%d\n",
2700 reqh, reqh->buffer, reqh->length, reqh->flags));
2701
2702 len = reqh->length;
2703 dmap = &upipe->u.intr.datadma;
2704 if (len == 0)
2705 return (USBD_INVAL); /* XXX should it be? */
2706
2707 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2708 if (r != USBD_NORMAL_COMPLETION)
2709 return (r);
2710
2711 sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval);
2712 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle);
2713 sc->sc_has_timo = reqh;
2714 return (USBD_IN_PROGRESS);
2715 }
2716
2717 /* Close the root interrupt pipe. */
2718 void
2719 uhci_root_intr_close(pipe)
2720 usbd_pipe_handle pipe;
2721 {
2722 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2723
2724 usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle);
2725 sc->sc_has_timo = 0;
2726 DPRINTF(("uhci_root_intr_close\n"));
2727 }
2728
2729