uhci.c revision 1.36
1 /* $NetBSD: uhci.c,v 1.36 1999/08/16 20:24:33 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Universal Host Controller driver. 42 * Handles e.g. PIIX3 and PIIX4. 43 * 44 * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 45 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 46 * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf 47 * USB spec: http://www.usb.org/developers/data/usb11.pdf 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) 55 #include <sys/device.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #endif 60 #include <sys/proc.h> 61 #include <sys/queue.h> 62 #include <sys/select.h> 63 64 #if defined(__FreeBSD__) 65 #include <machine/bus_pio.h> 66 #endif 67 #include <machine/bus.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/uhcireg.h> 76 #include <dev/usb/uhcivar.h> 77 78 #if defined(__FreeBSD__) 79 #include <machine/clock.h> 80 81 #define delay(d) DELAY(d) 82 #endif 83 84 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 85 86 struct uhci_pipe { 87 struct usbd_pipe pipe; 88 uhci_intr_info_t *iinfo; 89 int nexttoggle; 90 /* Info needed for different pipe kinds. */ 91 union { 92 /* Control pipe */ 93 struct { 94 uhci_soft_qh_t *sqh; 95 usb_dma_t reqdma; 96 usb_dma_t datadma; 97 uhci_soft_td_t *setup, *stat; 98 u_int length; 99 } ctl; 100 /* Interrupt pipe */ 101 struct { 102 usb_dma_t datadma; 103 int npoll; 104 uhci_soft_qh_t **qhs; 105 } intr; 106 /* Bulk pipe */ 107 struct { 108 uhci_soft_qh_t *sqh; 109 usb_dma_t datadma; 110 u_int length; 111 int isread; 112 } bulk; 113 /* Iso pipe */ 114 struct iso { 115 u_int bufsize; 116 u_int nbuf; 117 usb_dma_t *bufs; 118 uhci_soft_td_t **stds; 119 } iso; 120 } u; 121 }; 122 123 /* 124 * The uhci_intr_info free list can be global since they contain 125 * no dma specific data. The other free lists do. 126 */ 127 LIST_HEAD(, uhci_intr_info) uhci_ii_free; 128 129 void uhci_busreset __P((uhci_softc_t *)); 130 void uhci_power __P((int, void *)); 131 usbd_status uhci_run __P((uhci_softc_t *, int run)); 132 uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *)); 133 void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *)); 134 uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *)); 135 void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *)); 136 uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *)); 137 void uhci_free_intr_info __P((uhci_intr_info_t *ii)); 138 #if 0 139 void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *, 140 uhci_intr_info_t *)); 141 void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *)); 142 #endif 143 144 void uhci_free_std_chain __P((uhci_softc_t *, 145 uhci_soft_td_t *, uhci_soft_td_t *)); 146 usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *, 147 int, int, int, usb_dma_t *, 148 uhci_soft_td_t **, 149 uhci_soft_td_t **)); 150 void uhci_timo __P((void *)); 151 void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle)); 152 void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *)); 153 void uhci_idone __P((uhci_intr_info_t *)); 154 void uhci_done __P((uhci_intr_info_t *)); 155 void uhci_abort_req __P((usbd_request_handle, usbd_status status)); 156 void uhci_timeout __P((void *)); 157 void uhci_wakeup_ctrl __P((void *, int, int, void *, int)); 158 void uhci_lock_frames __P((uhci_softc_t *)); 159 void uhci_unlock_frames __P((uhci_softc_t *)); 160 void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 161 void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 162 void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 163 void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 164 int uhci_str __P((usb_string_descriptor_t *, int, char *)); 165 166 void uhci_wakeup_cb __P((usbd_request_handle reqh)); 167 168 usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle)); 169 usbd_status uhci_device_ctrl_start __P((usbd_request_handle)); 170 void uhci_device_ctrl_abort __P((usbd_request_handle)); 171 void uhci_device_ctrl_close __P((usbd_pipe_handle)); 172 usbd_status uhci_device_intr_transfer __P((usbd_request_handle)); 173 usbd_status uhci_device_intr_start __P((usbd_request_handle)); 174 void uhci_device_intr_abort __P((usbd_request_handle)); 175 void uhci_device_intr_close __P((usbd_pipe_handle)); 176 usbd_status uhci_device_bulk_transfer __P((usbd_request_handle)); 177 usbd_status uhci_device_bulk_start __P((usbd_request_handle)); 178 void uhci_device_bulk_abort __P((usbd_request_handle)); 179 void uhci_device_bulk_close __P((usbd_pipe_handle)); 180 usbd_status uhci_device_isoc_transfer __P((usbd_request_handle)); 181 usbd_status uhci_device_isoc_start __P((usbd_request_handle)); 182 void uhci_device_isoc_abort __P((usbd_request_handle)); 183 void uhci_device_isoc_close __P((usbd_pipe_handle)); 184 usbd_status uhci_device_isoc_setbuf __P((usbd_pipe_handle, u_int, u_int)); 185 186 usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle)); 187 usbd_status uhci_root_ctrl_start __P((usbd_request_handle)); 188 void uhci_root_ctrl_abort __P((usbd_request_handle)); 189 void uhci_root_ctrl_close __P((usbd_pipe_handle)); 190 usbd_status uhci_root_intr_transfer __P((usbd_request_handle)); 191 usbd_status uhci_root_intr_start __P((usbd_request_handle)); 192 void uhci_root_intr_abort __P((usbd_request_handle)); 193 void uhci_root_intr_close __P((usbd_pipe_handle)); 194 195 usbd_status uhci_open __P((usbd_pipe_handle)); 196 void uhci_poll __P((struct usbd_bus *)); 197 198 usbd_status uhci_device_request __P((usbd_request_handle reqh)); 199 void uhci_ctrl_done __P((uhci_intr_info_t *ii)); 200 void uhci_bulk_done __P((uhci_intr_info_t *ii)); 201 202 void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 203 void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 204 usbd_status uhci_device_setintr __P((uhci_softc_t *sc, 205 struct uhci_pipe *pipe, int ival)); 206 void uhci_intr_done __P((uhci_intr_info_t *ii)); 207 void uhci_isoc_done __P((uhci_intr_info_t *ii)); 208 209 #ifdef USB_DEBUG 210 static void uhci_dumpregs __P((uhci_softc_t *)); 211 void uhci_dump_tds __P((uhci_soft_td_t *)); 212 void uhci_dump_qh __P((uhci_soft_qh_t *)); 213 void uhci_dump __P((void)); 214 void uhci_dump_td __P((uhci_soft_td_t *)); 215 #endif 216 217 #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)) 218 #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 219 #define UREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r)) 220 #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 221 #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 222 223 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 224 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 225 226 #define UHCI_RESET_TIMEOUT 100 /* reset timeout */ 227 228 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 229 230 #define UHCI_INTR_ENDPT 1 231 232 struct usbd_methods uhci_root_ctrl_methods = { 233 uhci_root_ctrl_transfer, 234 uhci_root_ctrl_start, 235 uhci_root_ctrl_abort, 236 uhci_root_ctrl_close, 237 0, 238 }; 239 240 struct usbd_methods uhci_root_intr_methods = { 241 uhci_root_intr_transfer, 242 uhci_root_intr_start, 243 uhci_root_intr_abort, 244 uhci_root_intr_close, 245 0, 246 }; 247 248 struct usbd_methods uhci_device_ctrl_methods = { 249 uhci_device_ctrl_transfer, 250 uhci_device_ctrl_start, 251 uhci_device_ctrl_abort, 252 uhci_device_ctrl_close, 253 0, 254 }; 255 256 struct usbd_methods uhci_device_intr_methods = { 257 uhci_device_intr_transfer, 258 uhci_device_intr_start, 259 uhci_device_intr_abort, 260 uhci_device_intr_close, 261 0, 262 }; 263 264 struct usbd_methods uhci_device_bulk_methods = { 265 uhci_device_bulk_transfer, 266 uhci_device_bulk_start, 267 uhci_device_bulk_abort, 268 uhci_device_bulk_close, 269 0, 270 }; 271 272 struct usbd_methods uhci_device_isoc_methods = { 273 uhci_device_isoc_transfer, 274 uhci_device_isoc_start, 275 uhci_device_isoc_abort, 276 uhci_device_isoc_close, 277 uhci_device_isoc_setbuf, 278 }; 279 280 void 281 uhci_busreset(sc) 282 uhci_softc_t *sc; 283 { 284 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 285 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 286 UHCICMD(sc, 0); /* do nothing */ 287 } 288 289 usbd_status 290 uhci_init(sc) 291 uhci_softc_t *sc; 292 { 293 usbd_status r; 294 int i, j; 295 uhci_soft_qh_t *csqh, *bsqh, *sqh; 296 uhci_soft_td_t *std; 297 298 DPRINTFN(1,("uhci_init: start\n")); 299 300 #if defined(USB_DEBUG) 301 if (uhcidebug > 2) 302 uhci_dumpregs(sc); 303 #endif 304 305 uhci_run(sc, 0); /* stop the controller */ 306 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 307 308 uhci_busreset(sc); 309 310 /* Allocate and initialize real frame array. */ 311 r = usb_allocmem(sc->sc_dmatag, 312 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 313 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 314 if (r != USBD_NORMAL_COMPLETION) 315 return (r); 316 sc->sc_pframes = KERNADDR(&sc->sc_dma); 317 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 318 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma)); /* set frame list*/ 319 320 /* Allocate the dummy QH where bulk traffic will be queued. */ 321 bsqh = uhci_alloc_sqh(sc); 322 if (!bsqh) 323 return (USBD_NOMEM); 324 bsqh->qh->qh_hlink = UHCI_PTR_T; /* end of QH chain */ 325 bsqh->qh->qh_elink = UHCI_PTR_T; 326 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 327 328 /* Allocate the dummy QH where control traffic will be queued. */ 329 csqh = uhci_alloc_sqh(sc); 330 if (!csqh) 331 return (USBD_NOMEM); 332 csqh->qh->hlink = bsqh; 333 csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q; 334 csqh->qh->qh_elink = UHCI_PTR_T; 335 sc->sc_ctl_start = sc->sc_ctl_end = csqh; 336 337 /* 338 * Make all (virtual) frame list pointers point to the interrupt 339 * queue heads and the interrupt queue heads at the control 340 * queue head and point the physical frame list to the virtual. 341 */ 342 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 343 std = uhci_alloc_std(sc); 344 sqh = uhci_alloc_sqh(sc); 345 if (!std || !sqh) 346 return (USBD_NOMEM); 347 std->td->link.sqh = sqh; 348 std->td->td_link = sqh->physaddr | UHCI_PTR_Q; 349 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */ 350 std->td->td_token = 0; 351 std->td->td_buffer = 0; 352 sqh->qh->hlink = csqh; 353 sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q; 354 sqh->qh->elink = 0; 355 sqh->qh->qh_elink = UHCI_PTR_T; 356 sc->sc_vframes[i].htd = std; 357 sc->sc_vframes[i].etd = std; 358 sc->sc_vframes[i].hqh = sqh; 359 sc->sc_vframes[i].eqh = sqh; 360 for (j = i; 361 j < UHCI_FRAMELIST_COUNT; 362 j += UHCI_VFRAMELIST_COUNT) 363 sc->sc_pframes[j] = std->physaddr; 364 } 365 366 LIST_INIT(&sc->sc_intrhead); 367 368 /* Set up the bus struct. */ 369 sc->sc_bus.open_pipe = uhci_open; 370 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 371 sc->sc_bus.do_poll = uhci_poll; 372 373 sc->sc_suspend = PWR_RESUME; 374 (void)powerhook_establish(uhci_power, sc); 375 376 DPRINTFN(1,("uhci_init: enabling\n")); 377 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 378 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 379 380 return (uhci_run(sc, 1)); /* and here we go... */ 381 } 382 383 /* 384 * Handle suspend/resume. 385 * 386 * Must use delay() here since we are called from an interrupt 387 * context, but since we are close to being inactive anyway 388 * it doesn't matter. 389 */ 390 void 391 uhci_power(why, v) 392 int why; 393 void *v; 394 { 395 uhci_softc_t *sc = v; 396 int cmd; 397 int s; 398 399 s = splusb(); 400 cmd = UREAD2(sc, UHCI_CMD); 401 402 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n", 403 sc, why, sc->sc_suspend, cmd)); 404 405 if (why != PWR_RESUME) { 406 #if defined(USB_DEBUG) 407 if (uhcidebug > 2) 408 uhci_dumpregs(sc); 409 #endif 410 if (sc->sc_has_timo) 411 usb_untimeout(uhci_timo, sc->sc_has_timo, 412 sc->sc_has_timo->timo_handle); 413 uhci_run(sc, 0); /* stop the controller */ 414 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 415 delay(USB_RESUME_WAIT * 1000); 416 sc->sc_suspend = why; 417 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 418 } else { 419 /* 420 * XXX We should really do much more here in case the 421 * controller registers have been lost and BIOS has 422 * not restored them. 423 */ 424 sc->sc_suspend = why; 425 if (cmd & UHCI_CMD_RS) 426 uhci_run(sc, 0); /* in case BIOS has started it */ 427 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 428 delay(USB_RESUME_DELAY * 1000); 429 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 430 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 431 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 432 uhci_run(sc, 1); /* and start traffic again */ 433 delay(USB_RESUME_RECOVERY * 1000); 434 if (sc->sc_has_timo) 435 usb_timeout(uhci_timo, sc->sc_has_timo, 436 sc->sc_ival, sc->sc_has_timo->timo_handle); 437 #if defined(USB_DEBUG) 438 if (uhcidebug > 2) 439 uhci_dumpregs(sc); 440 #endif 441 } 442 splx(s); 443 } 444 445 #ifdef USB_DEBUG 446 static void 447 uhci_dumpregs(sc) 448 uhci_softc_t *sc; 449 { 450 printf("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 451 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 452 USBDEVNAME(sc->sc_bus.bdev), 453 UREAD2(sc, UHCI_CMD), 454 UREAD2(sc, UHCI_STS), 455 UREAD2(sc, UHCI_INTR), 456 UREAD2(sc, UHCI_FRNUM), 457 UREAD4(sc, UHCI_FLBASEADDR), 458 UREAD1(sc, UHCI_SOF), 459 UREAD2(sc, UHCI_PORTSC1), 460 UREAD2(sc, UHCI_PORTSC2)); 461 } 462 463 int uhci_longtd = 1; 464 465 void 466 uhci_dump_td(p) 467 uhci_soft_td_t *p; 468 { 469 printf("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 470 "token=0x%08lx buffer=0x%08lx\n", 471 p, (long)p->physaddr, 472 (long)p->td->td_link, 473 (long)p->td->td_status, 474 (long)p->td->td_token, 475 (long)p->td->td_buffer); 476 if (uhci_longtd) 477 printf(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 478 "D=%d,maxlen=%d\n", 479 (int)p->td->td_link, 480 "\20\1T\2Q\3VF", 481 (int)p->td->td_status, 482 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 483 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 484 UHCI_TD_GET_ERRCNT(p->td->td_status), 485 UHCI_TD_GET_ACTLEN(p->td->td_status), 486 UHCI_TD_GET_PID(p->td->td_token), 487 UHCI_TD_GET_DEVADDR(p->td->td_token), 488 UHCI_TD_GET_ENDPT(p->td->td_token), 489 UHCI_TD_GET_DT(p->td->td_token), 490 UHCI_TD_GET_MAXLEN(p->td->td_token)); 491 } 492 493 void 494 uhci_dump_qh(p) 495 uhci_soft_qh_t *p; 496 { 497 printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr, 498 p->qh->qh_hlink, p->qh->qh_elink); 499 } 500 501 502 #if 0 503 void 504 uhci_dump() 505 { 506 uhci_softc_t *sc = uhci; 507 508 uhci_dumpregs(sc); 509 printf("intrs=%d\n", sc->sc_intrs); 510 printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link); 511 uhci_dump_qh(sc->sc_ctl_start->qh->hlink); 512 } 513 #endif 514 515 void 516 uhci_dump_tds(std) 517 uhci_soft_td_t *std; 518 { 519 uhci_soft_td_t *p; 520 521 for(p = std; p; p = p->td->link.std) 522 uhci_dump_td(p); 523 } 524 #endif 525 526 /* 527 * This routine is executed periodically and simulates interrupts 528 * from the root controller interrupt pipe for port status change. 529 */ 530 void 531 uhci_timo(addr) 532 void *addr; 533 { 534 usbd_request_handle reqh = addr; 535 usbd_pipe_handle pipe = reqh->pipe; 536 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 537 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 538 int s; 539 u_char *p; 540 541 DPRINTFN(15, ("uhci_timo\n")); 542 543 p = KERNADDR(&upipe->u.intr.datadma); 544 p[0] = 0; 545 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 546 p[0] |= 1<<1; 547 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 548 p[0] |= 1<<2; 549 s = splusb(); 550 if (!reqh->pipe->repeat) 551 SIMPLEQ_REMOVE_HEAD(&pipe->queue, reqh, next); 552 if (p[0] != 0) { 553 reqh->actlen = 1; 554 reqh->status = USBD_NORMAL_COMPLETION; 555 reqh->xfercb(reqh); 556 } 557 if (reqh->pipe->repeat) { 558 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle); 559 } else { 560 usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma); 561 usb_start_next(reqh->pipe); 562 } 563 splx(s); 564 } 565 566 567 void 568 uhci_lock_frames(sc) 569 uhci_softc_t *sc; 570 { 571 int s = splusb(); 572 while (sc->sc_vflock) { 573 sc->sc_vflock |= UHCI_WANT_LOCK; 574 tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0); 575 } 576 sc->sc_vflock = UHCI_HAS_LOCK; 577 splx(s); 578 } 579 580 void 581 uhci_unlock_frames(sc) 582 uhci_softc_t *sc; 583 { 584 int s = splusb(); 585 sc->sc_vflock &= ~UHCI_HAS_LOCK; 586 if (sc->sc_vflock & UHCI_WANT_LOCK) 587 wakeup(&sc->sc_vflock); 588 splx(s); 589 } 590 591 /* 592 * Allocate an interrupt information struct. A free list is kept 593 * for fast allocation. 594 */ 595 uhci_intr_info_t * 596 uhci_alloc_intr_info(sc) 597 uhci_softc_t *sc; 598 { 599 uhci_intr_info_t *ii; 600 601 ii = LIST_FIRST(&uhci_ii_free); 602 if (ii) 603 LIST_REMOVE(ii, list); 604 else { 605 ii = malloc(sizeof(uhci_intr_info_t), M_USBHC, M_NOWAIT); 606 } 607 ii->sc = sc; 608 return ii; 609 } 610 611 void 612 uhci_free_intr_info(ii) 613 uhci_intr_info_t *ii; 614 { 615 LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */ 616 } 617 618 /* Add control QH, called at splusb(). */ 619 void 620 uhci_add_ctrl(sc, sqh) 621 uhci_softc_t *sc; 622 uhci_soft_qh_t *sqh; 623 { 624 uhci_qh_t *eqh; 625 626 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 627 eqh = sc->sc_ctl_end->qh; 628 sqh->qh->hlink = eqh->hlink; 629 sqh->qh->qh_hlink = eqh->qh_hlink; 630 eqh->hlink = sqh; 631 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 632 sc->sc_ctl_end = sqh; 633 } 634 635 /* Remove control QH, called at splusb(). */ 636 void 637 uhci_remove_ctrl(sc, sqh) 638 uhci_softc_t *sc; 639 uhci_soft_qh_t *sqh; 640 { 641 uhci_soft_qh_t *pqh; 642 643 DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh)); 644 for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink) 645 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 646 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 647 printf("uhci_remove_ctrl: QH not found\n"); 648 return; 649 } 650 #else 651 ; 652 #endif 653 pqh->qh->hlink = sqh->qh->hlink; 654 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 655 if (sc->sc_ctl_end == sqh) 656 sc->sc_ctl_end = pqh; 657 } 658 659 /* Add bulk QH, called at splusb(). */ 660 void 661 uhci_add_bulk(sc, sqh) 662 uhci_softc_t *sc; 663 uhci_soft_qh_t *sqh; 664 { 665 uhci_qh_t *eqh; 666 667 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 668 eqh = sc->sc_bulk_end->qh; 669 sqh->qh->hlink = eqh->hlink; 670 sqh->qh->qh_hlink = eqh->qh_hlink; 671 eqh->hlink = sqh; 672 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 673 sc->sc_bulk_end = sqh; 674 } 675 676 /* Remove bulk QH, called at splusb(). */ 677 void 678 uhci_remove_bulk(sc, sqh) 679 uhci_softc_t *sc; 680 uhci_soft_qh_t *sqh; 681 { 682 uhci_soft_qh_t *pqh; 683 684 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 685 for (pqh = sc->sc_bulk_start; 686 pqh->qh->hlink != sqh; 687 pqh = pqh->qh->hlink) 688 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 689 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 690 printf("uhci_remove_bulk: QH not found\n"); 691 return; 692 } 693 #else 694 ; 695 #endif 696 pqh->qh->hlink = sqh->qh->hlink; 697 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 698 if (sc->sc_bulk_end == sqh) 699 sc->sc_bulk_end = pqh; 700 } 701 702 int 703 uhci_intr(p) 704 void *p; 705 { 706 uhci_softc_t *sc = p; 707 int status, ret; 708 uhci_intr_info_t *ii; 709 710 sc->sc_intrs++; 711 #if defined(USB_DEBUG) 712 if (uhcidebug > 9) { 713 printf("uhci_intr %p\n", sc); 714 uhci_dumpregs(sc); 715 } 716 #endif 717 status = UREAD2(sc, UHCI_STS); 718 #ifdef DIAGNOSTIC 719 if (sc->sc_suspend != PWR_RESUME) 720 printf("uhci_intr: suspended sts=0x%x\n", status); 721 #endif 722 ret = 0; 723 if (status & UHCI_STS_USBINT) { 724 UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */ 725 ret = 1; 726 } 727 if (status & UHCI_STS_USBEI) { 728 UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */ 729 ret = 1; 730 } 731 if (status & UHCI_STS_RD) { 732 UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */ 733 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 734 ret = 1; 735 } 736 if (status & UHCI_STS_HSE) { 737 UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */ 738 printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev)); 739 ret = 1; 740 } 741 if (status & UHCI_STS_HCPE) { 742 UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */ 743 printf("%s: Host System Error\n", USBDEVNAME(sc->sc_bus.bdev)); 744 ret = 1; 745 } 746 if (status & UHCI_STS_HCH) 747 printf("%s: controller halted\n", USBDEVNAME(sc->sc_bus.bdev)); 748 if (!ret) 749 return 0; 750 751 /* 752 * Interrupts on UHCI really suck. When the host controller 753 * interrupts because a transfer is completed there is no 754 * way of knowing which transfer it was. You can scan down 755 * the TDs and QHs of the previous frame to limit the search, 756 * but that assumes that the interrupt was not delayed by more 757 * than 1 ms, which may not always be true (e.g. after debug 758 * output on a slow console). 759 * We scan all interrupt descriptors to see if any have 760 * completed. 761 */ 762 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 763 uhci_check_intr(sc, ii); 764 765 DPRINTFN(10, ("uhci_intr: exit\n")); 766 return 1; 767 } 768 769 /* Check for an interrupt. */ 770 void 771 uhci_check_intr(sc, ii) 772 uhci_softc_t *sc; 773 uhci_intr_info_t *ii; 774 { 775 struct uhci_pipe *upipe; 776 uhci_soft_td_t *std, *lstd; 777 u_int32_t status; 778 779 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 780 #ifdef DIAGNOSTIC 781 if (!ii) { 782 printf("uhci_check_intr: no ii? %p\n", ii); 783 return; 784 } 785 #endif 786 if (!ii->stdstart) 787 return; 788 lstd = ii->stdend; 789 #ifdef DIAGNOSTIC 790 if (!lstd) { 791 printf("uhci_check_intr: std==0\n"); 792 return; 793 } 794 #endif 795 /* 796 * If the last TD is still active we need to check whether there 797 * is a an error somewhere in the middle, or whether there was a 798 * short packet (SPD and not ACTIVE). 799 */ 800 if (lstd->td->td_status & UHCI_TD_ACTIVE) { 801 DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii)); 802 for (std = ii->stdstart; std != lstd; std = std->td->link.std){ 803 status = std->td->td_status; 804 if ((status & UHCI_TD_STALLED) || 805 (status & (UHCI_TD_SPD | UHCI_TD_ACTIVE)) == 806 UHCI_TD_SPD) 807 goto done; 808 } 809 DPRINTFN(15, ("uhci_check_intr: ii=%p std=%p still active\n", 810 ii, ii->stdstart)); 811 return; 812 } 813 done: 814 usb_untimeout(uhci_timeout, ii, ii->timeout_handle); 815 upipe = (struct uhci_pipe *)ii->reqh->pipe; 816 uhci_idone(ii); 817 upipe->pipe.endpoint->toggle = upipe->nexttoggle; 818 } 819 820 void 821 uhci_idone(ii) 822 uhci_intr_info_t *ii; 823 { 824 usbd_request_handle reqh = ii->reqh; 825 uhci_soft_td_t *std; 826 u_int32_t status; 827 int actlen; 828 829 #ifdef USB_DEBUG 830 DPRINTFN(10, ("uhci_idone: ii=%p ready\n", ii)); 831 if (uhcidebug > 10) 832 uhci_dump_tds(ii->stdstart); 833 #endif 834 835 if (reqh->status == USBD_CANCELLED || 836 reqh->status == USBD_TIMEOUT) { 837 DPRINTF(("uhci_idone: aborted reqh=%p\n", reqh)); 838 return; 839 } 840 841 #ifdef DIAGNOSTIC 842 { 843 int s = splhigh(); 844 if (ii->isdone) { 845 splx(s); 846 printf("uhci_idone: ii=%p is done!\n", ii); 847 return; 848 } 849 ii->isdone = 1; 850 splx(s); 851 } 852 #endif 853 854 /* The transfer is done, compute actual length and status. */ 855 /* XXX Is this correct for control xfers? */ 856 actlen = 0; 857 for (std = ii->stdstart; std; std = std->td->link.std) { 858 status = std->td->td_status; 859 if (status & UHCI_TD_ACTIVE) 860 break; 861 if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP) 862 actlen += UHCI_TD_GET_ACTLEN(status); 863 } 864 status &= UHCI_TD_ERROR; 865 DPRINTFN(10, ("uhci_check_intr: actlen=%d, status=0x%x\n", 866 actlen, status)); 867 reqh->actlen = actlen; 868 if (status != 0) { 869 DPRINTFN(-1+((status&UHCI_TD_STALLED)!=0), 870 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 871 "status 0x%b\n", 872 reqh->pipe->device->address, 873 reqh->pipe->endpoint->edesc->bEndpointAddress, 874 (int)status, 875 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 876 "STALLED\30ACTIVE")); 877 if (status == UHCI_TD_STALLED) 878 reqh->status = USBD_STALLED; 879 else 880 reqh->status = USBD_IOERROR; /* more info XXX */ 881 } else { 882 reqh->status = USBD_NORMAL_COMPLETION; 883 } 884 885 uhci_done(ii); 886 if (ii->reqh->pipe->intrreqh != ii->reqh) 887 usb_start_next(ii->reqh->pipe); 888 } 889 890 void 891 uhci_done(ii) 892 uhci_intr_info_t *ii; 893 { 894 usbd_request_handle reqh = ii->reqh; 895 usbd_pipe_handle pipe = reqh->pipe; 896 897 DPRINTFN(5, ("uhci_ii_finish: calling handler ii=%p\n", ii)); 898 899 switch (pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) { 900 case UE_CONTROL: 901 uhci_ctrl_done(ii); 902 break; 903 case UE_ISOCHRONOUS: 904 uhci_isoc_done(ii); 905 break; 906 case UE_BULK: 907 uhci_bulk_done(ii); 908 break; 909 case UE_INTERRUPT: 910 uhci_intr_done(ii); 911 break; 912 } 913 914 /* Remove request from queue. */ 915 SIMPLEQ_REMOVE_HEAD(&pipe->queue, reqh, next); 916 917 /* And finally execute callback. */ 918 reqh->xfercb(reqh); 919 } 920 921 /* 922 * Called when a request does not complete. 923 */ 924 void 925 uhci_timeout(addr) 926 void *addr; 927 { 928 uhci_intr_info_t *ii = addr; 929 930 DPRINTF(("uhci_timeout: ii=%p\n", ii)); 931 uhci_abort_req(ii->reqh, USBD_TIMEOUT); 932 } 933 934 /* 935 * Wait here until controller claims to have an interrupt. 936 * Then call uhci_intr and return. Use timeout to avoid waiting 937 * too long. 938 * Only used during boot when interrupts are not enabled yet. 939 */ 940 void 941 uhci_waitintr(sc, reqh) 942 uhci_softc_t *sc; 943 usbd_request_handle reqh; 944 { 945 int timo = reqh->timeout; 946 uhci_intr_info_t *ii; 947 948 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 949 950 reqh->status = USBD_IN_PROGRESS; 951 for (; timo >= 0; timo--) { 952 usb_delay_ms(&sc->sc_bus, 1); 953 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 954 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 955 uhci_intr(sc); 956 if (reqh->status != USBD_IN_PROGRESS) 957 return; 958 } 959 } 960 961 /* Timeout */ 962 DPRINTF(("uhci_waitintr: timeout\n")); 963 for (ii = LIST_FIRST(&sc->sc_intrhead); 964 ii && ii->reqh != reqh; 965 ii = LIST_NEXT(ii, list)) 966 ; 967 if (ii) 968 uhci_idone(ii); 969 else 970 panic("uhci_waitintr: lost intr_info\n"); 971 } 972 973 void 974 uhci_poll(bus) 975 struct usbd_bus *bus; 976 { 977 uhci_softc_t *sc = (uhci_softc_t *)bus; 978 979 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 980 uhci_intr(sc); 981 } 982 983 #if 0 984 void 985 uhci_reset(p) 986 void *p; 987 { 988 uhci_softc_t *sc = p; 989 int n; 990 991 UHCICMD(sc, UHCI_CMD_HCRESET); 992 /* The reset bit goes low when the controller is done. */ 993 for (n = 0; n < UHCI_RESET_TIMEOUT && 994 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 995 delay(100); 996 if (n >= UHCI_RESET_TIMEOUT) 997 printf("%s: controller did not reset\n", 998 USBDEVNAME(sc->sc_bus.bdev)); 999 } 1000 #endif 1001 1002 usbd_status 1003 uhci_run(sc, run) 1004 uhci_softc_t *sc; 1005 int run; 1006 { 1007 int s, n, running; 1008 1009 run = run != 0; 1010 s = splusb(); 1011 DPRINTF(("uhci_run: setting run=%d\n", run)); 1012 UHCICMD(sc, run ? UHCI_CMD_RS : 0); 1013 for(n = 0; n < 10; n++) { 1014 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1015 /* return when we've entered the state we want */ 1016 if (run == running) { 1017 splx(s); 1018 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1019 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1020 return (USBD_NORMAL_COMPLETION); 1021 } 1022 usb_delay_ms(&sc->sc_bus, 1); 1023 } 1024 splx(s); 1025 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev), 1026 run ? "start" : "stop"); 1027 return (USBD_IOERROR); 1028 } 1029 1030 /* 1031 * Memory management routines. 1032 * uhci_alloc_std allocates TDs 1033 * uhci_alloc_sqh allocates QHs 1034 * These two routines do their own free list management, 1035 * partly for speed, partly because allocating DMAable memory 1036 * has page size granularaity so much memory would be wasted if 1037 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1038 */ 1039 1040 uhci_soft_td_t * 1041 uhci_alloc_std(sc) 1042 uhci_softc_t *sc; 1043 { 1044 uhci_soft_td_t *std; 1045 usbd_status r; 1046 int i; 1047 usb_dma_t dma; 1048 1049 if (!sc->sc_freetds) { 1050 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1051 std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK, 1052 M_USBHC, M_NOWAIT); 1053 if (!std) 1054 return (0); 1055 r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK, 1056 UHCI_TD_ALIGN, &dma); 1057 if (r != USBD_NORMAL_COMPLETION) { 1058 free(std, M_USBHC); 1059 return (0); 1060 } 1061 for(i = 0; i < UHCI_TD_CHUNK; i++, std++) { 1062 std->physaddr = DMAADDR(&dma) + i * UHCI_TD_SIZE; 1063 std->td = (uhci_td_t *) 1064 ((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE); 1065 std->td->link.std = sc->sc_freetds; 1066 sc->sc_freetds = std; 1067 } 1068 } 1069 std = sc->sc_freetds; 1070 sc->sc_freetds = std->td->link.std; 1071 memset(std->td, 0, UHCI_TD_SIZE); 1072 return std; 1073 } 1074 1075 void 1076 uhci_free_std(sc, std) 1077 uhci_softc_t *sc; 1078 uhci_soft_td_t *std; 1079 { 1080 #ifdef DIAGNOSTIC 1081 #define TD_IS_FREE 0x12345678 1082 if (std->td->td_token == TD_IS_FREE) { 1083 printf("uhci_free_std: freeing free TD %p\n", std); 1084 return; 1085 } 1086 std->td->td_token = TD_IS_FREE; 1087 #endif 1088 std->td->link.std = sc->sc_freetds; 1089 sc->sc_freetds = std; 1090 } 1091 1092 uhci_soft_qh_t * 1093 uhci_alloc_sqh(sc) 1094 uhci_softc_t *sc; 1095 { 1096 uhci_soft_qh_t *sqh; 1097 usbd_status r; 1098 int i, offs; 1099 usb_dma_t dma; 1100 1101 if (!sc->sc_freeqhs) { 1102 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1103 sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK, 1104 M_USBHC, M_NOWAIT); 1105 if (!sqh) 1106 return 0; 1107 r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK, 1108 UHCI_QH_ALIGN, &dma); 1109 if (r != USBD_NORMAL_COMPLETION) { 1110 free(sqh, M_USBHC); 1111 return 0; 1112 } 1113 for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) { 1114 offs = i * UHCI_QH_SIZE; 1115 sqh->physaddr = DMAADDR(&dma) + offs; 1116 sqh->qh = (uhci_qh_t *) 1117 ((char *)KERNADDR(&dma) + offs); 1118 sqh->qh->hlink = sc->sc_freeqhs; 1119 sc->sc_freeqhs = sqh; 1120 } 1121 } 1122 sqh = sc->sc_freeqhs; 1123 sc->sc_freeqhs = sqh->qh->hlink; 1124 memset(sqh->qh, 0, UHCI_QH_SIZE); 1125 return (sqh); 1126 } 1127 1128 void 1129 uhci_free_sqh(sc, sqh) 1130 uhci_softc_t *sc; 1131 uhci_soft_qh_t *sqh; 1132 { 1133 sqh->qh->hlink = sc->sc_freeqhs; 1134 sc->sc_freeqhs = sqh; 1135 } 1136 1137 #if 0 1138 /* 1139 * Enter a list of transfers onto a control queue. 1140 * Called at splusb() 1141 */ 1142 void 1143 uhci_enter_ctl_q(sc, sqh, ii) 1144 uhci_softc_t *sc; 1145 uhci_soft_qh_t *sqh; 1146 uhci_intr_info_t *ii; 1147 { 1148 DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh)); 1149 1150 } 1151 #endif 1152 1153 void 1154 uhci_free_std_chain(sc, std, stdend) 1155 uhci_softc_t *sc; 1156 uhci_soft_td_t *std; 1157 uhci_soft_td_t *stdend; 1158 { 1159 uhci_soft_td_t *p; 1160 1161 for (; std != stdend; std = p) { 1162 p = std->td->link.std; 1163 uhci_free_std(sc, std); 1164 } 1165 } 1166 1167 usbd_status 1168 uhci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep) 1169 struct uhci_pipe *upipe; 1170 uhci_softc_t *sc; 1171 int len, rd, shortok; 1172 usb_dma_t *dma; 1173 uhci_soft_td_t **sp, **ep; 1174 { 1175 uhci_soft_td_t *p, *lastp; 1176 uhci_physaddr_t lastlink; 1177 int i, ntd, l, tog, maxp; 1178 u_int32_t status; 1179 int addr = upipe->pipe.device->address; 1180 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1181 1182 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d " 1183 "shortok=%d\n", addr, UE_GET_ADDR(endpt), len, 1184 upipe->pipe.device->lowspeed, shortok)); 1185 if (len == 0) { 1186 *sp = *ep = 0; 1187 DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n")); 1188 return (USBD_NORMAL_COMPLETION); 1189 } 1190 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1191 if (maxp == 0) { 1192 printf("uhci_alloc_std_chain: maxp=0\n"); 1193 return (USBD_INVAL); 1194 } 1195 ntd = (len + maxp - 1) / maxp; 1196 tog = upipe->pipe.endpoint->toggle; 1197 if (ntd % 2 == 0) 1198 tog ^= 1; 1199 upipe->nexttoggle = tog ^ 1; 1200 lastp = 0; 1201 lastlink = UHCI_PTR_T; 1202 ntd--; 1203 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1204 if (upipe->pipe.device->lowspeed) 1205 status |= UHCI_TD_LS; 1206 if (shortok) 1207 status |= UHCI_TD_SPD; 1208 for (i = ntd; i >= 0; i--) { 1209 p = uhci_alloc_std(sc); 1210 if (!p) { 1211 uhci_free_std_chain(sc, lastp, 0); 1212 return (USBD_NOMEM); 1213 } 1214 p->td->link.std = lastp; 1215 p->td->td_link = lastlink; 1216 lastp = p; 1217 lastlink = p->physaddr; 1218 p->td->td_status = status; 1219 if (i == ntd) { 1220 /* last TD */ 1221 l = len % maxp; 1222 if (l == 0) l = maxp; 1223 *ep = p; 1224 } else 1225 l = maxp; 1226 p->td->td_token = 1227 rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1228 UHCI_TD_OUT(l, endpt, addr, tog); 1229 p->td->td_buffer = DMAADDR(dma) + i * maxp; 1230 tog ^= 1; 1231 } 1232 *sp = lastp; 1233 /*upipe->pipe.endpoint->toggle = tog;*/ 1234 DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d nexttog=%d\n", 1235 upipe->pipe.endpoint->toggle, upipe->nexttoggle)); 1236 return (USBD_NORMAL_COMPLETION); 1237 } 1238 1239 usbd_status 1240 uhci_device_bulk_transfer(reqh) 1241 usbd_request_handle reqh; 1242 { 1243 int s; 1244 usbd_status r; 1245 1246 s = splusb(); 1247 r = usb_insert_transfer(reqh); 1248 splx(s); 1249 if (r != USBD_NORMAL_COMPLETION) 1250 return (r); 1251 else 1252 return (uhci_device_bulk_start(reqh)); 1253 } 1254 1255 usbd_status 1256 uhci_device_bulk_start(reqh) 1257 usbd_request_handle reqh; 1258 { 1259 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1260 usbd_device_handle dev = upipe->pipe.device; 1261 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1262 uhci_intr_info_t *ii = upipe->iinfo; 1263 uhci_soft_td_t *xfer, *xferend; 1264 uhci_soft_qh_t *sqh; 1265 usb_dma_t *dmap; 1266 usbd_status r; 1267 int len, isread; 1268 int s; 1269 1270 DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d " 1271 "flags=%d\n", 1272 reqh, reqh->buffer, reqh->length, reqh->flags)); 1273 1274 if (reqh->isreq) 1275 panic("uhci_device_bulk_transfer: a request\n"); 1276 1277 len = reqh->length; 1278 dmap = &upipe->u.bulk.datadma; 1279 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 1280 sqh = upipe->u.bulk.sqh; 1281 1282 upipe->u.bulk.isread = isread; 1283 upipe->u.bulk.length = len; 1284 1285 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1286 if (r != USBD_NORMAL_COMPLETION) 1287 goto ret1; 1288 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1289 reqh->flags & USBD_SHORT_XFER_OK, 1290 dmap, &xfer, &xferend); 1291 if (r != USBD_NORMAL_COMPLETION) 1292 goto ret2; 1293 xferend->td->td_status |= UHCI_TD_IOC; 1294 1295 if (!isread && len != 0) 1296 memcpy(KERNADDR(dmap), reqh->buffer, len); 1297 1298 #ifdef USB_DEBUG 1299 if (uhcidebug > 8) { 1300 printf("uhci_device_bulk_transfer: xfer(1)\n"); 1301 uhci_dump_tds(xfer); 1302 } 1303 #endif 1304 1305 /* Set up interrupt info. */ 1306 ii->reqh = reqh; 1307 ii->stdstart = xfer; 1308 ii->stdend = xferend; 1309 #ifdef DIAGNOSTIC 1310 ii->isdone = 0; 1311 #endif 1312 1313 sqh->qh->elink = xfer; 1314 sqh->qh->qh_elink = xfer->physaddr; 1315 sqh->intr_info = ii; 1316 1317 s = splusb(); 1318 uhci_add_bulk(sc, sqh); 1319 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1320 1321 if (reqh->timeout && !sc->sc_bus.use_polling) { 1322 usb_timeout(uhci_timeout, ii, 1323 MS_TO_TICKS(reqh->timeout), ii->timeout_handle); 1324 } 1325 splx(s); 1326 1327 #ifdef USB_DEBUG 1328 if (uhcidebug > 10) { 1329 printf("uhci_device_bulk_transfer: xfer(2)\n"); 1330 uhci_dump_tds(xfer); 1331 } 1332 #endif 1333 1334 if (sc->sc_bus.use_polling) 1335 uhci_waitintr(sc, reqh); 1336 1337 return (USBD_IN_PROGRESS); 1338 1339 ret2: 1340 if (len != 0) 1341 usb_freemem(sc->sc_dmatag, dmap); 1342 ret1: 1343 return (r); 1344 } 1345 1346 /* Abort a device bulk request. */ 1347 void 1348 uhci_device_bulk_abort(reqh) 1349 usbd_request_handle reqh; 1350 { 1351 DPRINTF(("uhci_device_bulk_abort:\n")); 1352 uhci_abort_req(reqh, USBD_CANCELLED); 1353 } 1354 1355 void 1356 uhci_abort_req(reqh, status) 1357 usbd_request_handle reqh; 1358 usbd_status status; 1359 { 1360 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1361 uhci_intr_info_t *ii = upipe->iinfo; 1362 uhci_soft_td_t *std; 1363 int s; 1364 1365 /* Make interrupt routine ignore it, */ 1366 reqh->status = USBD_CANCELLED; 1367 1368 /* make hardware ignore it, */ 1369 for (std = ii->stdstart; std != 0; std = std->td->link.std) 1370 std->td->td_status &= ~UHCI_TD_ACTIVE; 1371 /* make sure hardware has completed, */ 1372 usb_delay_ms(reqh->pipe->device->bus, 1); 1373 1374 /* and call final part of interrupt handler. */ 1375 s = splusb(); 1376 uhci_done(ii); 1377 splx(s); 1378 } 1379 1380 /* Close a device bulk pipe. */ 1381 void 1382 uhci_device_bulk_close(pipe) 1383 usbd_pipe_handle pipe; 1384 { 1385 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1386 usbd_device_handle dev = upipe->pipe.device; 1387 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1388 1389 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1390 uhci_free_intr_info(upipe->iinfo); 1391 /* XXX free other resources */ 1392 } 1393 1394 usbd_status 1395 uhci_device_ctrl_transfer(reqh) 1396 usbd_request_handle reqh; 1397 { 1398 int s; 1399 usbd_status r; 1400 1401 s = splusb(); 1402 r = usb_insert_transfer(reqh); 1403 splx(s); 1404 if (r != USBD_NORMAL_COMPLETION) 1405 return (r); 1406 else 1407 return (uhci_device_ctrl_start(reqh)); 1408 } 1409 1410 usbd_status 1411 uhci_device_ctrl_start(reqh) 1412 usbd_request_handle reqh; 1413 { 1414 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 1415 usbd_status r; 1416 1417 if (!reqh->isreq) 1418 panic("uhci_device_ctrl_transfer: not a request\n"); 1419 1420 r = uhci_device_request(reqh); 1421 if (r != USBD_NORMAL_COMPLETION) 1422 return (r); 1423 1424 if (sc->sc_bus.use_polling) 1425 uhci_waitintr(sc, reqh); 1426 return (USBD_IN_PROGRESS); 1427 } 1428 1429 usbd_status 1430 uhci_device_intr_transfer(reqh) 1431 usbd_request_handle reqh; 1432 { 1433 int s; 1434 usbd_status r; 1435 1436 s = splusb(); 1437 r = usb_insert_transfer(reqh); 1438 splx(s); 1439 if (r != USBD_NORMAL_COMPLETION) 1440 return (r); 1441 else 1442 return (uhci_device_intr_start(reqh)); 1443 } 1444 1445 usbd_status 1446 uhci_device_intr_start(reqh) 1447 usbd_request_handle reqh; 1448 { 1449 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1450 usbd_device_handle dev = upipe->pipe.device; 1451 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1452 uhci_intr_info_t *ii = upipe->iinfo; 1453 uhci_soft_td_t *xfer, *xferend; 1454 uhci_soft_qh_t *sqh; 1455 usb_dma_t *dmap; 1456 usbd_status r; 1457 int len, i; 1458 int s; 1459 1460 DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d " 1461 "flags=%d\n", 1462 reqh, reqh->buffer, reqh->length, reqh->flags)); 1463 1464 if (reqh->isreq) 1465 panic("uhci_device_intr_transfer: a request\n"); 1466 1467 len = reqh->length; 1468 dmap = &upipe->u.intr.datadma; 1469 if (len == 0) 1470 return (USBD_INVAL); /* XXX should it be? */ 1471 1472 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1473 if (r != USBD_NORMAL_COMPLETION) 1474 goto ret1; 1475 r = uhci_alloc_std_chain(upipe, sc, len, 1, 1476 reqh->flags & USBD_SHORT_XFER_OK, 1477 dmap, &xfer, &xferend); 1478 if (r != USBD_NORMAL_COMPLETION) 1479 goto ret2; 1480 xferend->td->td_status |= UHCI_TD_IOC; 1481 1482 #ifdef USB_DEBUG 1483 if (uhcidebug > 10) { 1484 printf("uhci_device_intr_transfer: xfer(1)\n"); 1485 uhci_dump_tds(xfer); 1486 uhci_dump_qh(upipe->u.intr.qhs[0]); 1487 } 1488 #endif 1489 1490 s = splusb(); 1491 /* Set up interrupt info. */ 1492 ii->reqh = reqh; 1493 ii->stdstart = xfer; 1494 ii->stdend = xferend; 1495 #ifdef DIAGNOSTIC 1496 ii->isdone = 0; 1497 #endif 1498 1499 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 1500 upipe->u.intr.qhs[0])); 1501 for (i = 0; i < upipe->u.intr.npoll; i++) { 1502 sqh = upipe->u.intr.qhs[i]; 1503 sqh->qh->elink = xfer; 1504 sqh->qh->qh_elink = xfer->physaddr; 1505 } 1506 splx(s); 1507 1508 #ifdef USB_DEBUG 1509 if (uhcidebug > 10) { 1510 printf("uhci_device_intr_transfer: xfer(2)\n"); 1511 uhci_dump_tds(xfer); 1512 uhci_dump_qh(upipe->u.intr.qhs[0]); 1513 } 1514 #endif 1515 1516 return (USBD_IN_PROGRESS); 1517 1518 ret2: 1519 if (len != 0) 1520 usb_freemem(sc->sc_dmatag, dmap); 1521 ret1: 1522 return (r); 1523 } 1524 1525 /* Abort a device control request. */ 1526 void 1527 uhci_device_ctrl_abort(reqh) 1528 usbd_request_handle reqh; 1529 { 1530 DPRINTF(("uhci_device_ctrl_abort:\n")); 1531 uhci_abort_req(reqh, USBD_CANCELLED); 1532 } 1533 1534 /* Close a device control pipe. */ 1535 void 1536 uhci_device_ctrl_close(pipe) 1537 usbd_pipe_handle pipe; 1538 { 1539 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1540 1541 uhci_free_intr_info(upipe->iinfo); 1542 /* XXX free other resources */ 1543 } 1544 1545 /* Abort a device interrupt request. */ 1546 void 1547 uhci_device_intr_abort(reqh) 1548 usbd_request_handle reqh; 1549 { 1550 DPRINTFN(1,("uhci_device_intr_abort: reqh=%p\n", reqh)); 1551 if (reqh->pipe->intrreqh == reqh) { 1552 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 1553 reqh->pipe->intrreqh = 0; 1554 } 1555 uhci_abort_req(reqh, USBD_CANCELLED); 1556 } 1557 1558 /* Close a device interrupt pipe. */ 1559 void 1560 uhci_device_intr_close(pipe) 1561 usbd_pipe_handle pipe; 1562 { 1563 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1564 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 1565 int i, s, npoll; 1566 1567 upipe->iinfo->stdstart = 0; /* inactive */ 1568 1569 /* Unlink descriptors from controller data structures. */ 1570 npoll = upipe->u.intr.npoll; 1571 uhci_lock_frames(sc); 1572 for (i = 0; i < npoll; i++) 1573 uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos, 1574 upipe->u.intr.qhs[i]); 1575 uhci_unlock_frames(sc); 1576 1577 /* 1578 * We now have to wait for any activity on the physical 1579 * descriptors to stop. 1580 */ 1581 usb_delay_ms(&sc->sc_bus, 2); 1582 1583 for(i = 0; i < npoll; i++) 1584 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 1585 free(upipe->u.intr.qhs, M_USBHC); 1586 1587 s = splusb(); 1588 LIST_REMOVE(upipe->iinfo, list); /* remove from active list */ 1589 splx(s); 1590 uhci_free_intr_info(upipe->iinfo); 1591 1592 /* XXX free other resources */ 1593 } 1594 1595 usbd_status 1596 uhci_device_request(reqh) 1597 usbd_request_handle reqh; 1598 { 1599 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1600 usb_device_request_t *req = &reqh->request; 1601 usbd_device_handle dev = upipe->pipe.device; 1602 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1603 int addr = dev->address; 1604 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1605 uhci_intr_info_t *ii = upipe->iinfo; 1606 uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend; 1607 uhci_soft_qh_t *sqh; 1608 usb_dma_t *dmap; 1609 int len; 1610 u_int32_t ls; 1611 usbd_status r; 1612 int isread; 1613 int s; 1614 1615 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 1616 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1617 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1618 UGETW(req->wIndex), UGETW(req->wLength), 1619 addr, endpt)); 1620 1621 ls = dev->lowspeed ? UHCI_TD_LS : 0; 1622 isread = req->bmRequestType & UT_READ; 1623 len = UGETW(req->wLength); 1624 1625 setup = upipe->u.ctl.setup; 1626 stat = upipe->u.ctl.stat; 1627 sqh = upipe->u.ctl.sqh; 1628 dmap = &upipe->u.ctl.datadma; 1629 1630 /* Set up data transaction */ 1631 if (len != 0) { 1632 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1633 if (r != USBD_NORMAL_COMPLETION) 1634 goto ret1; 1635 upipe->pipe.endpoint->toggle = 1; 1636 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1637 reqh->flags & USBD_SHORT_XFER_OK, 1638 dmap, &xfer, &xferend); 1639 if (r != USBD_NORMAL_COMPLETION) 1640 goto ret2; 1641 next = xfer; 1642 xferend->td->link.std = stat; 1643 xferend->td->td_link = stat->physaddr; 1644 } else { 1645 next = stat; 1646 } 1647 upipe->u.ctl.length = len; 1648 1649 memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req); 1650 if (!isread && len != 0) 1651 memcpy(KERNADDR(dmap), reqh->buffer, len); 1652 1653 setup->td->link.std = next; 1654 setup->td->td_link = next->physaddr; 1655 setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE; 1656 setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr); 1657 setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma); 1658 1659 stat->td->link.std = 0; 1660 stat->td->td_link = UHCI_PTR_T; 1661 stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | 1662 UHCI_TD_ACTIVE | UHCI_TD_IOC; 1663 stat->td->td_token = 1664 isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 1665 UHCI_TD_IN (0, endpt, addr, 1); 1666 stat->td->td_buffer = 0; 1667 1668 #ifdef USB_DEBUG 1669 if (uhcidebug > 20) { 1670 printf("uhci_device_request: setup\n"); 1671 uhci_dump_td(setup); 1672 printf("uhci_device_request: stat\n"); 1673 uhci_dump_td(stat); 1674 } 1675 #endif 1676 1677 /* Set up interrupt info. */ 1678 ii->reqh = reqh; 1679 ii->stdstart = setup; 1680 ii->stdend = stat; 1681 #ifdef DIAGNOSTIC 1682 ii->isdone = 0; 1683 #endif 1684 1685 sqh->qh->elink = setup; 1686 sqh->qh->qh_elink = setup->physaddr; 1687 sqh->intr_info = ii; 1688 1689 s = splusb(); 1690 uhci_add_ctrl(sc, sqh); 1691 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1692 #ifdef USB_DEBUG 1693 if (uhcidebug > 12) { 1694 uhci_soft_td_t *std; 1695 uhci_soft_qh_t *xqh; 1696 uhci_soft_qh_t *sxqh; 1697 int maxqh = 0; 1698 uhci_physaddr_t link; 1699 printf("uhci_enter_ctl_q: follow from [0]\n"); 1700 for (std = sc->sc_vframes[0].htd, link = 0; 1701 (link & UHCI_PTR_Q) == 0; 1702 std = std->td->link.std) { 1703 link = std->td->td_link; 1704 uhci_dump_td(std); 1705 } 1706 for (sxqh = xqh = (uhci_soft_qh_t *)std; 1707 xqh; 1708 xqh = (maxqh++ == 5 || xqh->qh->hlink==sxqh || 1709 xqh->qh->hlink==xqh ? NULL : xqh->qh->hlink)) { 1710 uhci_dump_qh(xqh); 1711 uhci_dump_qh(sxqh); 1712 } 1713 printf("Enqueued QH:\n"); 1714 uhci_dump_qh(sqh); 1715 uhci_dump_tds(sqh->qh->elink); 1716 } 1717 #endif 1718 if (reqh->timeout && !sc->sc_bus.use_polling) { 1719 usb_timeout(uhci_timeout, ii, 1720 MS_TO_TICKS(reqh->timeout), ii->timeout_handle); 1721 } 1722 splx(s); 1723 1724 return (USBD_NORMAL_COMPLETION); 1725 1726 ret2: 1727 if (len != 0) 1728 usb_freemem(sc->sc_dmatag, dmap); 1729 ret1: 1730 return (r); 1731 } 1732 1733 usbd_status 1734 uhci_device_isoc_transfer(reqh) 1735 usbd_request_handle reqh; 1736 { 1737 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1738 #ifdef USB_DEBUG 1739 usbd_device_handle dev = upipe->pipe.device; 1740 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1741 #endif 1742 1743 DPRINTFN(1,("uhci_device_isoc_transfer: sc=%p\n", sc)); 1744 if (upipe->u.iso.bufsize == 0) 1745 return (USBD_INVAL); 1746 1747 /* XXX copy data */ 1748 return (USBD_XXX); 1749 } 1750 1751 usbd_status 1752 uhci_device_isoc_start(reqh) 1753 usbd_request_handle reqh; 1754 { 1755 return (USBD_XXX); 1756 } 1757 1758 void 1759 uhci_device_isoc_abort(reqh) 1760 usbd_request_handle reqh; 1761 { 1762 /* XXX Can't abort this. */ 1763 } 1764 1765 void 1766 uhci_device_isoc_close(pipe) 1767 usbd_pipe_handle pipe; 1768 { 1769 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1770 usbd_device_handle dev = upipe->pipe.device; 1771 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1772 struct iso *iso; 1773 int i; 1774 1775 /* 1776 * Make sure all TDs are marked as inactive. 1777 * Wait for completion. 1778 * Unschedule. 1779 * Deallocate. 1780 */ 1781 iso = &upipe->u.iso; 1782 1783 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 1784 iso->stds[i]->td->td_status &= ~UHCI_TD_ACTIVE; 1785 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 1786 1787 uhci_lock_frames(sc); 1788 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 1789 uhci_soft_td_t *std, *vstd; 1790 1791 std = iso->stds[i]; 1792 for (vstd = sc->sc_vframes[i % UHCI_VFRAMELIST_COUNT].htd; 1793 vstd && vstd->td->link.std != std; 1794 vstd = vstd->td->link.std) 1795 ; 1796 if (!vstd) { 1797 /*panic*/ 1798 printf("uhci_device_isoc_close: %p not found\n", std); 1799 uhci_unlock_frames(sc); 1800 return; 1801 } 1802 vstd->td->link = std->td->link; 1803 vstd->td->td_link = std->td->td_link; 1804 uhci_free_std(sc, std); 1805 } 1806 uhci_unlock_frames(sc); 1807 1808 for (i = 0; i < iso->nbuf; i++) 1809 usb_freemem(sc->sc_dmatag, &iso->bufs[i]); 1810 free(iso->stds, M_USBHC); 1811 free(iso->bufs, M_USBHC); 1812 1813 /* XXX what else? */ 1814 } 1815 1816 usbd_status 1817 uhci_device_isoc_setbuf(pipe, bufsize, nbuf) 1818 usbd_pipe_handle pipe; 1819 u_int bufsize; 1820 u_int nbuf; 1821 { 1822 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1823 usbd_device_handle dev = upipe->pipe.device; 1824 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1825 int addr = upipe->pipe.device->address; 1826 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1827 int rd = upipe->pipe.endpoint->edesc->bEndpointAddress & UE_IN; 1828 struct iso *iso; 1829 int i; 1830 usbd_status r; 1831 1832 /* 1833 * For simplicity the number of buffers must fit nicely in the frame 1834 * list. 1835 */ 1836 if (UHCI_VFRAMELIST_COUNT % nbuf != 0) 1837 return (USBD_INVAL); 1838 1839 iso = &upipe->u.iso; 1840 iso->bufsize = bufsize; 1841 iso->nbuf = nbuf; 1842 1843 /* Allocate memory for buffers. */ 1844 iso->bufs = malloc(nbuf * sizeof(usb_dma_t), M_USBHC, M_WAITOK); 1845 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 1846 M_USBHC, M_WAITOK); 1847 1848 for (i = 0; i < nbuf; i++) { 1849 r = usb_allocmem(sc->sc_dmatag, bufsize, 0, &iso->bufs[i]); 1850 if (r != USBD_NORMAL_COMPLETION) { 1851 nbuf = i; 1852 goto bad1; 1853 } 1854 } 1855 1856 /* Allocate the TDs. */ 1857 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 1858 iso->stds[i] = uhci_alloc_std(sc); 1859 if (iso->stds[i] == 0) 1860 goto bad2; 1861 } 1862 1863 /* XXX check schedule */ 1864 1865 /* XXX interrupts */ 1866 1867 /* Insert TDs into schedule, all marked inactive. */ 1868 uhci_lock_frames(sc); 1869 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 1870 uhci_soft_td_t *std, *vstd; 1871 1872 std = iso->stds[i]; 1873 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */ 1874 std->td->td_token = 1875 rd ? UHCI_TD_IN (0, endpt, addr, 0) : 1876 UHCI_TD_OUT(0, endpt, addr, 0); 1877 std->td->td_buffer = DMAADDR(&iso->bufs[i % nbuf]); 1878 1879 vstd = sc->sc_vframes[i % UHCI_VFRAMELIST_COUNT].htd; 1880 std->td->link = vstd->td->link; 1881 std->td->td_link = vstd->td->td_link; 1882 vstd->td->link.std = std; 1883 vstd->td->td_link = std->physaddr; 1884 } 1885 uhci_unlock_frames(sc); 1886 1887 return (USBD_NORMAL_COMPLETION); 1888 1889 bad2: 1890 while (--i >= 0) 1891 uhci_free_std(sc, iso->stds[i]); 1892 bad1: 1893 for (i = 0; i < nbuf; i++) 1894 usb_freemem(sc->sc_dmatag, &iso->bufs[i]); 1895 free(iso->stds, M_USBHC); 1896 free(iso->bufs, M_USBHC); 1897 return (USBD_NOMEM); 1898 } 1899 1900 void 1901 uhci_isoc_done(ii) 1902 uhci_intr_info_t *ii; 1903 { 1904 } 1905 1906 void 1907 uhci_intr_done(ii) 1908 uhci_intr_info_t *ii; 1909 { 1910 uhci_softc_t *sc = ii->sc; 1911 usbd_request_handle reqh = ii->reqh; 1912 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1913 usb_dma_t *dma; 1914 uhci_soft_qh_t *sqh; 1915 int i, npoll; 1916 1917 DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen)); 1918 1919 dma = &upipe->u.intr.datadma; 1920 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 1921 npoll = upipe->u.intr.npoll; 1922 for(i = 0; i < npoll; i++) { 1923 sqh = upipe->u.intr.qhs[i]; 1924 sqh->qh->elink = 0; 1925 sqh->qh->qh_elink = UHCI_PTR_T; 1926 } 1927 uhci_free_std_chain(sc, ii->stdstart, 0); 1928 1929 /* XXX Wasteful. */ 1930 if (reqh->pipe->repeat) { 1931 uhci_soft_td_t *xfer, *xferend; 1932 1933 /* This alloc cannot fail since we freed the chain above. */ 1934 uhci_alloc_std_chain(upipe, sc, reqh->length, 1, 1935 reqh->flags & USBD_SHORT_XFER_OK, 1936 dma, &xfer, &xferend); 1937 xferend->td->td_status |= UHCI_TD_IOC; 1938 1939 #ifdef USB_DEBUG 1940 if (uhcidebug > 10) { 1941 printf("uhci_device_intr_done: xfer(1)\n"); 1942 uhci_dump_tds(xfer); 1943 uhci_dump_qh(upipe->u.intr.qhs[0]); 1944 } 1945 #endif 1946 1947 ii->stdstart = xfer; 1948 ii->stdend = xferend; 1949 #ifdef DIAGNOSTIC 1950 ii->isdone = 0; 1951 #endif 1952 for (i = 0; i < npoll; i++) { 1953 sqh = upipe->u.intr.qhs[i]; 1954 sqh->qh->elink = xfer; 1955 sqh->qh->qh_elink = xfer->physaddr; 1956 } 1957 } else { 1958 usb_freemem(sc->sc_dmatag, dma); 1959 ii->stdstart = 0; /* mark as inactive */ 1960 } 1961 } 1962 1963 /* Deallocate request data structures */ 1964 void 1965 uhci_ctrl_done(ii) 1966 uhci_intr_info_t *ii; 1967 { 1968 uhci_softc_t *sc = ii->sc; 1969 usbd_request_handle reqh = ii->reqh; 1970 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1971 u_int len = upipe->u.ctl.length; 1972 usb_dma_t *dma; 1973 uhci_td_t *htd = ii->stdstart->td; 1974 1975 #ifdef DIAGNOSTIC 1976 if (!reqh->isreq) 1977 panic("uhci_ctrl_done: not a request\n"); 1978 #endif 1979 1980 LIST_REMOVE(ii, list); /* remove from active list */ 1981 1982 uhci_remove_ctrl(sc, upipe->u.ctl.sqh); 1983 1984 if (len != 0) { 1985 dma = &upipe->u.ctl.datadma; 1986 if (reqh->request.bmRequestType & UT_READ) 1987 memcpy(reqh->buffer, KERNADDR(dma), len); 1988 uhci_free_std_chain(sc, htd->link.std, ii->stdend); 1989 usb_freemem(sc->sc_dmatag, dma); 1990 } 1991 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen)); 1992 } 1993 1994 /* Deallocate request data structures */ 1995 void 1996 uhci_bulk_done(ii) 1997 uhci_intr_info_t *ii; 1998 { 1999 uhci_softc_t *sc = ii->sc; 2000 usbd_request_handle reqh = ii->reqh; 2001 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 2002 uhci_soft_td_t *std; 2003 u_int datalen = upipe->u.bulk.length; 2004 usb_dma_t *dma; 2005 2006 LIST_REMOVE(ii, list); /* remove from active list */ 2007 2008 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2009 2010 /* find the toggle for the last transfer and invert it */ 2011 for (std = ii->stdstart; std; std = std->td->link.std) { 2012 if (std->td->td_status & UHCI_TD_ACTIVE) 2013 break; 2014 upipe->nexttoggle = UHCI_TD_GET_DT(std->td->td_token); 2015 } 2016 upipe->nexttoggle ^= 1; 2017 2018 /* copy the data from dma memory to userland storage */ 2019 dma = &upipe->u.bulk.datadma; 2020 if (upipe->u.bulk.isread) 2021 memcpy(reqh->buffer, KERNADDR(dma), datalen); 2022 uhci_free_std_chain(sc, ii->stdstart, 0); 2023 usb_freemem(sc->sc_dmatag, dma); 2024 2025 DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen)); 2026 } 2027 2028 /* Add interrupt QH, called with vflock. */ 2029 void 2030 uhci_add_intr(sc, n, sqh) 2031 uhci_softc_t *sc; 2032 int n; 2033 uhci_soft_qh_t *sqh; 2034 { 2035 struct uhci_vframe *vf = &sc->sc_vframes[n]; 2036 uhci_qh_t *eqh; 2037 2038 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh)); 2039 eqh = vf->eqh->qh; 2040 sqh->qh->hlink = eqh->hlink; 2041 sqh->qh->qh_hlink = eqh->qh_hlink; 2042 eqh->hlink = sqh; 2043 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 2044 vf->eqh = sqh; 2045 vf->bandwidth++; 2046 } 2047 2048 /* Remove interrupt QH, called with vflock. */ 2049 void 2050 uhci_remove_intr(sc, n, sqh) 2051 uhci_softc_t *sc; 2052 int n; 2053 uhci_soft_qh_t *sqh; 2054 { 2055 struct uhci_vframe *vf = &sc->sc_vframes[n]; 2056 uhci_soft_qh_t *pqh; 2057 2058 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh)); 2059 2060 for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink) 2061 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 2062 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 2063 printf("uhci_remove_intr: QH not found\n"); 2064 return; 2065 } 2066 #else 2067 ; 2068 #endif 2069 pqh->qh->hlink = sqh->qh->hlink; 2070 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 2071 if (vf->eqh == sqh) 2072 vf->eqh = pqh; 2073 vf->bandwidth--; 2074 } 2075 2076 usbd_status 2077 uhci_device_setintr(sc, upipe, ival) 2078 uhci_softc_t *sc; 2079 struct uhci_pipe *upipe; 2080 int ival; 2081 { 2082 uhci_soft_qh_t *sqh; 2083 int i, npoll, s; 2084 u_int bestbw, bw, bestoffs, offs; 2085 2086 DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe)); 2087 if (ival == 0) { 2088 printf("uhci_setintr: 0 interval\n"); 2089 return (USBD_INVAL); 2090 } 2091 2092 if (ival > UHCI_VFRAMELIST_COUNT) 2093 ival = UHCI_VFRAMELIST_COUNT; 2094 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2095 DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2096 2097 upipe->u.intr.npoll = npoll; 2098 upipe->u.intr.qhs = 2099 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 2100 2101 /* 2102 * Figure out which offset in the schedule that has most 2103 * bandwidth left over. 2104 */ 2105 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2106 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2107 for (bw = i = 0; i < npoll; i++) 2108 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2109 if (bw < bestbw) { 2110 bestbw = bw; 2111 bestoffs = offs; 2112 } 2113 } 2114 DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2115 2116 upipe->iinfo->stdstart = 0; 2117 for(i = 0; i < npoll; i++) { 2118 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2119 sqh->qh->elink = 0; 2120 sqh->qh->qh_elink = UHCI_PTR_T; 2121 sqh->pos = MOD(i * ival + bestoffs); 2122 sqh->intr_info = upipe->iinfo; 2123 } 2124 #undef MOD 2125 2126 s = splusb(); 2127 LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list); 2128 splx(s); 2129 2130 uhci_lock_frames(sc); 2131 /* Enter QHs into the controller data structures. */ 2132 for(i = 0; i < npoll; i++) 2133 uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos, 2134 upipe->u.intr.qhs[i]); 2135 uhci_unlock_frames(sc); 2136 2137 DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe)); 2138 return (USBD_NORMAL_COMPLETION); 2139 } 2140 2141 /* Open a new pipe. */ 2142 usbd_status 2143 uhci_open(pipe) 2144 usbd_pipe_handle pipe; 2145 { 2146 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2147 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2148 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2149 usbd_status r; 2150 2151 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2152 pipe, pipe->device->address, 2153 ed->bEndpointAddress, sc->sc_addr)); 2154 if (pipe->device->address == sc->sc_addr) { 2155 switch (ed->bEndpointAddress) { 2156 case USB_CONTROL_ENDPOINT: 2157 pipe->methods = &uhci_root_ctrl_methods; 2158 break; 2159 case UE_IN | UHCI_INTR_ENDPT: 2160 pipe->methods = &uhci_root_intr_methods; 2161 break; 2162 default: 2163 return (USBD_INVAL); 2164 } 2165 } else { 2166 upipe->iinfo = uhci_alloc_intr_info(sc); 2167 if (upipe->iinfo == 0) 2168 return (USBD_NOMEM); 2169 switch (ed->bmAttributes & UE_XFERTYPE) { 2170 case UE_CONTROL: 2171 pipe->methods = &uhci_device_ctrl_methods; 2172 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2173 if (upipe->u.ctl.sqh == 0) 2174 goto bad; 2175 upipe->u.ctl.setup = uhci_alloc_std(sc); 2176 if (upipe->u.ctl.setup == 0) { 2177 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2178 goto bad; 2179 } 2180 upipe->u.ctl.stat = uhci_alloc_std(sc); 2181 if (upipe->u.ctl.stat == 0) { 2182 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2183 uhci_free_std(sc, upipe->u.ctl.setup); 2184 goto bad; 2185 } 2186 r = usb_allocmem(sc->sc_dmatag, 2187 sizeof(usb_device_request_t), 2188 0, &upipe->u.ctl.reqdma); 2189 if (r != USBD_NORMAL_COMPLETION) { 2190 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2191 uhci_free_std(sc, upipe->u.ctl.setup); 2192 uhci_free_std(sc, upipe->u.ctl.stat); 2193 goto bad; 2194 } 2195 break; 2196 case UE_INTERRUPT: 2197 pipe->methods = &uhci_device_intr_methods; 2198 return (uhci_device_setintr(sc, upipe, ed->bInterval)); 2199 case UE_ISOCHRONOUS: 2200 pipe->methods = &uhci_device_isoc_methods; 2201 upipe->u.iso.nbuf = 0; 2202 return (USBD_NORMAL_COMPLETION); 2203 case UE_BULK: 2204 pipe->methods = &uhci_device_bulk_methods; 2205 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2206 if (upipe->u.bulk.sqh == 0) 2207 goto bad; 2208 break; 2209 } 2210 } 2211 return (USBD_NORMAL_COMPLETION); 2212 2213 bad: 2214 uhci_free_intr_info(upipe->iinfo); 2215 return (USBD_NOMEM); 2216 } 2217 2218 /* 2219 * Data structures and routines to emulate the root hub. 2220 */ 2221 usb_device_descriptor_t uhci_devd = { 2222 USB_DEVICE_DESCRIPTOR_SIZE, 2223 UDESC_DEVICE, /* type */ 2224 {0x00, 0x01}, /* USB version */ 2225 UCLASS_HUB, /* class */ 2226 USUBCLASS_HUB, /* subclass */ 2227 0, /* protocol */ 2228 64, /* max packet */ 2229 {0},{0},{0x00,0x01}, /* device id */ 2230 1,2,0, /* string indicies */ 2231 1 /* # of configurations */ 2232 }; 2233 2234 usb_config_descriptor_t uhci_confd = { 2235 USB_CONFIG_DESCRIPTOR_SIZE, 2236 UDESC_CONFIG, 2237 {USB_CONFIG_DESCRIPTOR_SIZE + 2238 USB_INTERFACE_DESCRIPTOR_SIZE + 2239 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2240 1, 2241 1, 2242 0, 2243 UC_SELF_POWERED, 2244 0 /* max power */ 2245 }; 2246 2247 usb_interface_descriptor_t uhci_ifcd = { 2248 USB_INTERFACE_DESCRIPTOR_SIZE, 2249 UDESC_INTERFACE, 2250 0, 2251 0, 2252 1, 2253 UCLASS_HUB, 2254 USUBCLASS_HUB, 2255 0, 2256 0 2257 }; 2258 2259 usb_endpoint_descriptor_t uhci_endpd = { 2260 USB_ENDPOINT_DESCRIPTOR_SIZE, 2261 UDESC_ENDPOINT, 2262 UE_IN | UHCI_INTR_ENDPT, 2263 UE_INTERRUPT, 2264 {8}, 2265 255 2266 }; 2267 2268 usb_hub_descriptor_t uhci_hubd_piix = { 2269 USB_HUB_DESCRIPTOR_SIZE, 2270 UDESC_HUB, 2271 2, 2272 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 2273 50, /* power on to power good */ 2274 0, 2275 { 0x00 }, /* both ports are removable */ 2276 }; 2277 2278 int 2279 uhci_str(p, l, s) 2280 usb_string_descriptor_t *p; 2281 int l; 2282 char *s; 2283 { 2284 int i; 2285 2286 if (l == 0) 2287 return (0); 2288 p->bLength = 2 * strlen(s) + 2; 2289 if (l == 1) 2290 return (1); 2291 p->bDescriptorType = UDESC_STRING; 2292 l -= 2; 2293 for (i = 0; s[i] && l > 1; i++, l -= 2) 2294 USETW2(p->bString[i], 0, s[i]); 2295 return (2*i+2); 2296 } 2297 2298 /* 2299 * Simulate a hardware hub by handling all the necessary requests. 2300 */ 2301 usbd_status 2302 uhci_root_ctrl_transfer(reqh) 2303 usbd_request_handle reqh; 2304 { 2305 int s; 2306 usbd_status r; 2307 2308 s = splusb(); 2309 r = usb_insert_transfer(reqh); 2310 splx(s); 2311 if (r != USBD_NORMAL_COMPLETION) 2312 return (r); 2313 else 2314 return (uhci_root_ctrl_start(reqh)); 2315 } 2316 2317 usbd_status 2318 uhci_root_ctrl_start(reqh) 2319 usbd_request_handle reqh; 2320 { 2321 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 2322 usb_device_request_t *req; 2323 void *buf; 2324 int port, x; 2325 int len, value, index, status, change, l, totlen = 0; 2326 usb_port_status_t ps; 2327 usbd_status r; 2328 2329 if (!reqh->isreq) 2330 panic("uhci_root_ctrl_transfer: not a request\n"); 2331 req = &reqh->request; 2332 buf = reqh->buffer; 2333 2334 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 2335 req->bmRequestType, req->bRequest)); 2336 2337 len = UGETW(req->wLength); 2338 value = UGETW(req->wValue); 2339 index = UGETW(req->wIndex); 2340 #define C(x,y) ((x) | ((y) << 8)) 2341 switch(C(req->bRequest, req->bmRequestType)) { 2342 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2343 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2344 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2345 /* 2346 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2347 * for the integrated root hub. 2348 */ 2349 break; 2350 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2351 if (len > 0) { 2352 *(u_int8_t *)buf = sc->sc_conf; 2353 totlen = 1; 2354 } 2355 break; 2356 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2357 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 2358 switch(value >> 8) { 2359 case UDESC_DEVICE: 2360 if ((value & 0xff) != 0) { 2361 r = USBD_IOERROR; 2362 goto ret; 2363 } 2364 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2365 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 2366 memcpy(buf, &uhci_devd, l); 2367 break; 2368 case UDESC_CONFIG: 2369 if ((value & 0xff) != 0) { 2370 r = USBD_IOERROR; 2371 goto ret; 2372 } 2373 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2374 memcpy(buf, &uhci_confd, l); 2375 buf = (char *)buf + l; 2376 len -= l; 2377 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2378 totlen += l; 2379 memcpy(buf, &uhci_ifcd, l); 2380 buf = (char *)buf + l; 2381 len -= l; 2382 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2383 totlen += l; 2384 memcpy(buf, &uhci_endpd, l); 2385 break; 2386 case UDESC_STRING: 2387 if (len == 0) 2388 break; 2389 *(u_int8_t *)buf = 0; 2390 totlen = 1; 2391 switch (value & 0xff) { 2392 case 1: /* Vendor */ 2393 totlen = uhci_str(buf, len, sc->sc_vendor); 2394 break; 2395 case 2: /* Product */ 2396 totlen = uhci_str(buf, len, "UHCI root hub"); 2397 break; 2398 } 2399 break; 2400 default: 2401 r = USBD_IOERROR; 2402 goto ret; 2403 } 2404 break; 2405 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2406 if (len > 0) { 2407 *(u_int8_t *)buf = 0; 2408 totlen = 1; 2409 } 2410 break; 2411 case C(UR_GET_STATUS, UT_READ_DEVICE): 2412 if (len > 1) { 2413 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2414 totlen = 2; 2415 } 2416 break; 2417 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2418 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2419 if (len > 1) { 2420 USETW(((usb_status_t *)buf)->wStatus, 0); 2421 totlen = 2; 2422 } 2423 break; 2424 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2425 if (value >= USB_MAX_DEVICES) { 2426 r = USBD_IOERROR; 2427 goto ret; 2428 } 2429 sc->sc_addr = value; 2430 break; 2431 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2432 if (value != 0 && value != 1) { 2433 r = USBD_IOERROR; 2434 goto ret; 2435 } 2436 sc->sc_conf = value; 2437 break; 2438 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2439 break; 2440 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2441 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2442 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2443 r = USBD_IOERROR; 2444 goto ret; 2445 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2446 break; 2447 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2448 break; 2449 /* Hub requests */ 2450 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2451 break; 2452 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2453 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2454 "port=%d feature=%d\n", 2455 index, value)); 2456 if (index == 1) 2457 port = UHCI_PORTSC1; 2458 else if (index == 2) 2459 port = UHCI_PORTSC2; 2460 else { 2461 r = USBD_IOERROR; 2462 goto ret; 2463 } 2464 switch(value) { 2465 case UHF_PORT_ENABLE: 2466 x = UREAD2(sc, port); 2467 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 2468 break; 2469 case UHF_PORT_SUSPEND: 2470 x = UREAD2(sc, port); 2471 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 2472 break; 2473 case UHF_PORT_RESET: 2474 x = UREAD2(sc, port); 2475 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2476 break; 2477 case UHF_C_PORT_CONNECTION: 2478 x = UREAD2(sc, port); 2479 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 2480 break; 2481 case UHF_C_PORT_ENABLE: 2482 x = UREAD2(sc, port); 2483 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 2484 break; 2485 case UHF_C_PORT_OVER_CURRENT: 2486 x = UREAD2(sc, port); 2487 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 2488 break; 2489 case UHF_C_PORT_RESET: 2490 sc->sc_isreset = 0; 2491 r = USBD_NORMAL_COMPLETION; 2492 goto ret; 2493 case UHF_PORT_CONNECTION: 2494 case UHF_PORT_OVER_CURRENT: 2495 case UHF_PORT_POWER: 2496 case UHF_PORT_LOW_SPEED: 2497 case UHF_C_PORT_SUSPEND: 2498 default: 2499 r = USBD_IOERROR; 2500 goto ret; 2501 } 2502 break; 2503 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 2504 if (index == 1) 2505 port = UHCI_PORTSC1; 2506 else if (index == 2) 2507 port = UHCI_PORTSC2; 2508 else { 2509 r = USBD_IOERROR; 2510 goto ret; 2511 } 2512 if (len > 0) { 2513 *(u_int8_t *)buf = 2514 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 2515 UHCI_PORTSC_LS_SHIFT; 2516 totlen = 1; 2517 } 2518 break; 2519 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2520 if (value != 0) { 2521 r = USBD_IOERROR; 2522 goto ret; 2523 } 2524 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 2525 totlen = l; 2526 memcpy(buf, &uhci_hubd_piix, l); 2527 break; 2528 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2529 if (len != 4) { 2530 r = USBD_IOERROR; 2531 goto ret; 2532 } 2533 memset(buf, 0, len); 2534 totlen = len; 2535 break; 2536 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2537 if (index == 1) 2538 port = UHCI_PORTSC1; 2539 else if (index == 2) 2540 port = UHCI_PORTSC2; 2541 else { 2542 r = USBD_IOERROR; 2543 goto ret; 2544 } 2545 if (len != 4) { 2546 r = USBD_IOERROR; 2547 goto ret; 2548 } 2549 x = UREAD2(sc, port); 2550 status = change = 0; 2551 if (x & UHCI_PORTSC_CCS ) 2552 status |= UPS_CURRENT_CONNECT_STATUS; 2553 if (x & UHCI_PORTSC_CSC ) 2554 change |= UPS_C_CONNECT_STATUS; 2555 if (x & UHCI_PORTSC_PE ) 2556 status |= UPS_PORT_ENABLED; 2557 if (x & UHCI_PORTSC_POEDC) 2558 change |= UPS_C_PORT_ENABLED; 2559 if (x & UHCI_PORTSC_OCI ) 2560 status |= UPS_OVERCURRENT_INDICATOR; 2561 if (x & UHCI_PORTSC_OCIC ) 2562 change |= UPS_C_OVERCURRENT_INDICATOR; 2563 if (x & UHCI_PORTSC_SUSP ) 2564 status |= UPS_SUSPEND; 2565 if (x & UHCI_PORTSC_LSDA ) 2566 status |= UPS_LOW_SPEED; 2567 status |= UPS_PORT_POWER; 2568 if (sc->sc_isreset) 2569 change |= UPS_C_PORT_RESET; 2570 USETW(ps.wPortStatus, status); 2571 USETW(ps.wPortChange, change); 2572 l = min(len, sizeof ps); 2573 memcpy(buf, &ps, l); 2574 totlen = l; 2575 break; 2576 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2577 r = USBD_IOERROR; 2578 goto ret; 2579 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2580 break; 2581 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2582 if (index == 1) 2583 port = UHCI_PORTSC1; 2584 else if (index == 2) 2585 port = UHCI_PORTSC2; 2586 else { 2587 r = USBD_IOERROR; 2588 goto ret; 2589 } 2590 switch(value) { 2591 case UHF_PORT_ENABLE: 2592 x = UREAD2(sc, port); 2593 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2594 break; 2595 case UHF_PORT_SUSPEND: 2596 x = UREAD2(sc, port); 2597 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 2598 break; 2599 case UHF_PORT_RESET: 2600 x = UREAD2(sc, port); 2601 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2602 usb_delay_ms(&sc->sc_bus, 10); 2603 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2604 delay(100); 2605 x = UREAD2(sc, port); 2606 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2607 delay(100); 2608 DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n", 2609 index, UREAD2(sc, port))); 2610 sc->sc_isreset = 1; 2611 break; 2612 case UHF_C_PORT_CONNECTION: 2613 case UHF_C_PORT_ENABLE: 2614 case UHF_C_PORT_OVER_CURRENT: 2615 case UHF_PORT_CONNECTION: 2616 case UHF_PORT_OVER_CURRENT: 2617 case UHF_PORT_POWER: 2618 case UHF_PORT_LOW_SPEED: 2619 case UHF_C_PORT_SUSPEND: 2620 case UHF_C_PORT_RESET: 2621 default: 2622 r = USBD_IOERROR; 2623 goto ret; 2624 } 2625 break; 2626 default: 2627 r = USBD_IOERROR; 2628 goto ret; 2629 } 2630 reqh->actlen = totlen; 2631 r = USBD_NORMAL_COMPLETION; 2632 ret: 2633 SIMPLEQ_REMOVE_HEAD(&reqh->pipe->queue, reqh, next); 2634 reqh->status = r; 2635 reqh->xfercb(reqh); 2636 usb_start_next(reqh->pipe); 2637 return (USBD_IN_PROGRESS); 2638 } 2639 2640 /* Abort a root control request. */ 2641 void 2642 uhci_root_ctrl_abort(reqh) 2643 usbd_request_handle reqh; 2644 { 2645 /* Nothing to do, all transfers are syncronous. */ 2646 } 2647 2648 /* Close the root pipe. */ 2649 void 2650 uhci_root_ctrl_close(pipe) 2651 usbd_pipe_handle pipe; 2652 { 2653 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2654 2655 sc->sc_has_timo = 0; 2656 DPRINTF(("uhci_root_ctrl_close\n")); 2657 } 2658 2659 /* Abort a root interrupt request. */ 2660 void 2661 uhci_root_intr_abort(reqh) 2662 usbd_request_handle reqh; 2663 { 2664 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 2665 2666 usb_untimeout(uhci_timo, reqh, reqh->timo_handle); 2667 sc->sc_has_timo = 0; 2668 } 2669 2670 usbd_status 2671 uhci_root_intr_transfer(reqh) 2672 usbd_request_handle reqh; 2673 { 2674 int s; 2675 usbd_status r; 2676 2677 s = splusb(); 2678 r = usb_insert_transfer(reqh); 2679 splx(s); 2680 if (r != USBD_NORMAL_COMPLETION) 2681 return (r); 2682 else 2683 return (uhci_root_intr_start(reqh)); 2684 } 2685 2686 /* Start a transfer on the root interrupt pipe */ 2687 usbd_status 2688 uhci_root_intr_start(reqh) 2689 usbd_request_handle reqh; 2690 { 2691 usbd_pipe_handle pipe = reqh->pipe; 2692 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2693 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2694 usb_dma_t *dmap; 2695 usbd_status r; 2696 int len; 2697 2698 DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d " 2699 "flags=%d\n", 2700 reqh, reqh->buffer, reqh->length, reqh->flags)); 2701 2702 len = reqh->length; 2703 dmap = &upipe->u.intr.datadma; 2704 if (len == 0) 2705 return (USBD_INVAL); /* XXX should it be? */ 2706 2707 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2708 if (r != USBD_NORMAL_COMPLETION) 2709 return (r); 2710 2711 sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval); 2712 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle); 2713 sc->sc_has_timo = reqh; 2714 return (USBD_IN_PROGRESS); 2715 } 2716 2717 /* Close the root interrupt pipe. */ 2718 void 2719 uhci_root_intr_close(pipe) 2720 usbd_pipe_handle pipe; 2721 { 2722 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2723 2724 usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle); 2725 sc->sc_has_timo = 0; 2726 DPRINTF(("uhci_root_intr_close\n")); 2727 } 2728 2729
Indexes created Tue Sep 30 20:09:53 GMT 2025