uhci.c revision 1.48
1 /* $NetBSD: uhci.c,v 1.48 1999/09/09 12:26:45 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Universal Host Controller driver. 42 * Handles e.g. PIIX3 and PIIX4. 43 * 44 * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 45 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 46 * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf 47 * USB spec: http://www.usb.org/developers/data/usb11.pdf 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/device.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #endif 60 #include <sys/proc.h> 61 #include <sys/queue.h> 62 #include <sys/select.h> 63 64 #if defined(__FreeBSD__) 65 #include <machine/bus_pio.h> 66 #endif 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/uhcireg.h> 77 #include <dev/usb/uhcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 86 87 #if defined(__OpenBSD__) 88 struct cfdriver uhci_cd = { 89 NULL, "uhci", DV_DULL 90 }; 91 #endif 92 93 /* 94 * The UHCI controller is little endian, so on big endian machines 95 * the data strored in memory needs to be swapped. 96 */ 97 #if BYTE_ORDER == BIG_ENDIAN 98 #define LE(x) (bswap32(x)) 99 #else 100 #define LE(x) (x) 101 #endif 102 103 struct uhci_pipe { 104 struct usbd_pipe pipe; 105 uhci_intr_info_t *iinfo; 106 int nexttoggle; 107 /* Info needed for different pipe kinds. */ 108 union { 109 /* Control pipe */ 110 struct { 111 uhci_soft_qh_t *sqh; 112 usb_dma_t reqdma; 113 usb_dma_t datadma; 114 uhci_soft_td_t *setup, *stat; 115 u_int length; 116 } ctl; 117 /* Interrupt pipe */ 118 struct { 119 usb_dma_t datadma; 120 int npoll; 121 uhci_soft_qh_t **qhs; 122 } intr; 123 /* Bulk pipe */ 124 struct { 125 uhci_soft_qh_t *sqh; 126 usb_dma_t datadma; 127 u_int length; 128 int isread; 129 } bulk; 130 /* Iso pipe */ 131 struct iso { 132 uhci_soft_td_t **stds; 133 int next, inuse; 134 } iso; 135 } u; 136 }; 137 138 /* 139 * The uhci_intr_info free list can be global since they contain 140 * no dma specific data. The other free lists do. 141 */ 142 LIST_HEAD(, uhci_intr_info) uhci_ii_free; 143 144 void uhci_busreset __P((uhci_softc_t *)); 145 void uhci_power __P((int, void *)); 146 usbd_status uhci_run __P((uhci_softc_t *, int run)); 147 uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *)); 148 void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *)); 149 uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *)); 150 void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *)); 151 uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *)); 152 void uhci_free_intr_info __P((uhci_intr_info_t *ii)); 153 #if 0 154 void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *, 155 uhci_intr_info_t *)); 156 void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *)); 157 #endif 158 159 void uhci_free_std_chain __P((uhci_softc_t *, 160 uhci_soft_td_t *, uhci_soft_td_t *)); 161 usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *, 162 int, int, int, usb_dma_t *, 163 uhci_soft_td_t **, 164 uhci_soft_td_t **)); 165 void uhci_timo __P((void *)); 166 void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle)); 167 void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *)); 168 void uhci_idone __P((uhci_intr_info_t *)); 169 void uhci_abort_req __P((usbd_request_handle, usbd_status status)); 170 void uhci_abort_req_end __P((void *v)); 171 void uhci_timeout __P((void *)); 172 void uhci_wakeup_ctrl __P((void *, int, int, void *, int)); 173 void uhci_lock_frames __P((uhci_softc_t *)); 174 void uhci_unlock_frames __P((uhci_softc_t *)); 175 void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 176 void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 177 void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 178 void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 179 int uhci_str __P((usb_string_descriptor_t *, int, char *)); 180 usbd_status uhci_setup_isoc __P((usbd_pipe_handle pipe)); 181 void uhci_device_isoc_enter __P((usbd_request_handle)); 182 183 void uhci_wakeup_cb __P((usbd_request_handle reqh)); 184 185 usbd_status uhci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t)); 186 void uhci_freem __P((struct usbd_bus *, usb_dma_t *)); 187 188 usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle)); 189 usbd_status uhci_device_ctrl_start __P((usbd_request_handle)); 190 void uhci_device_ctrl_abort __P((usbd_request_handle)); 191 void uhci_device_ctrl_close __P((usbd_pipe_handle)); 192 void uhci_device_ctrl_done __P((usbd_request_handle)); 193 194 usbd_status uhci_device_intr_transfer __P((usbd_request_handle)); 195 usbd_status uhci_device_intr_start __P((usbd_request_handle)); 196 void uhci_device_intr_abort __P((usbd_request_handle)); 197 void uhci_device_intr_close __P((usbd_pipe_handle)); 198 void uhci_device_intr_done __P((usbd_request_handle)); 199 200 usbd_status uhci_device_bulk_transfer __P((usbd_request_handle)); 201 usbd_status uhci_device_bulk_start __P((usbd_request_handle)); 202 void uhci_device_bulk_abort __P((usbd_request_handle)); 203 void uhci_device_bulk_close __P((usbd_pipe_handle)); 204 void uhci_device_bulk_done __P((usbd_request_handle)); 205 206 usbd_status uhci_device_isoc_transfer __P((usbd_request_handle)); 207 usbd_status uhci_device_isoc_start __P((usbd_request_handle)); 208 void uhci_device_isoc_abort __P((usbd_request_handle)); 209 void uhci_device_isoc_close __P((usbd_pipe_handle)); 210 void uhci_device_isoc_done __P((usbd_request_handle)); 211 212 usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle)); 213 usbd_status uhci_root_ctrl_start __P((usbd_request_handle)); 214 void uhci_root_ctrl_abort __P((usbd_request_handle)); 215 void uhci_root_ctrl_close __P((usbd_pipe_handle)); 216 217 usbd_status uhci_root_intr_transfer __P((usbd_request_handle)); 218 usbd_status uhci_root_intr_start __P((usbd_request_handle)); 219 void uhci_root_intr_abort __P((usbd_request_handle)); 220 void uhci_root_intr_close __P((usbd_pipe_handle)); 221 void uhci_root_intr_done __P((usbd_request_handle)); 222 223 usbd_status uhci_open __P((usbd_pipe_handle)); 224 void uhci_poll __P((struct usbd_bus *)); 225 226 usbd_status uhci_device_request __P((usbd_request_handle reqh)); 227 228 void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 229 void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 230 usbd_status uhci_device_setintr __P((uhci_softc_t *sc, 231 struct uhci_pipe *pipe, int ival)); 232 233 void uhci_device_clear_toggle __P((usbd_pipe_handle pipe)); 234 void uhci_noop __P((usbd_pipe_handle pipe)); 235 236 #ifdef USB_DEBUG 237 static void uhci_dumpregs __P((uhci_softc_t *)); 238 void uhci_dump_tds __P((uhci_soft_td_t *)); 239 void uhci_dump_qh __P((uhci_soft_qh_t *)); 240 void uhci_dump __P((void)); 241 void uhci_dump_td __P((uhci_soft_td_t *)); 242 #endif 243 244 #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)) 245 #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 246 #define UREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r)) 247 #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 248 #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 249 250 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 251 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 252 253 #define UHCI_RESET_TIMEOUT 100 /* reset timeout */ 254 255 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 256 257 #define UHCI_INTR_ENDPT 1 258 259 struct usbd_bus_methods uhci_bus_methods = { 260 uhci_open, 261 uhci_poll, 262 uhci_allocm, 263 uhci_freem, 264 }; 265 266 struct usbd_pipe_methods uhci_root_ctrl_methods = { 267 uhci_root_ctrl_transfer, 268 uhci_root_ctrl_start, 269 uhci_root_ctrl_abort, 270 uhci_root_ctrl_close, 271 uhci_noop, 272 0, 273 }; 274 275 struct usbd_pipe_methods uhci_root_intr_methods = { 276 uhci_root_intr_transfer, 277 uhci_root_intr_start, 278 uhci_root_intr_abort, 279 uhci_root_intr_close, 280 uhci_noop, 281 uhci_root_intr_done, 282 }; 283 284 struct usbd_pipe_methods uhci_device_ctrl_methods = { 285 uhci_device_ctrl_transfer, 286 uhci_device_ctrl_start, 287 uhci_device_ctrl_abort, 288 uhci_device_ctrl_close, 289 uhci_noop, 290 uhci_device_ctrl_done, 291 }; 292 293 struct usbd_pipe_methods uhci_device_intr_methods = { 294 uhci_device_intr_transfer, 295 uhci_device_intr_start, 296 uhci_device_intr_abort, 297 uhci_device_intr_close, 298 uhci_device_clear_toggle, 299 uhci_device_intr_done, 300 }; 301 302 struct usbd_pipe_methods uhci_device_bulk_methods = { 303 uhci_device_bulk_transfer, 304 uhci_device_bulk_start, 305 uhci_device_bulk_abort, 306 uhci_device_bulk_close, 307 uhci_device_clear_toggle, 308 uhci_device_bulk_done, 309 }; 310 311 struct usbd_pipe_methods uhci_device_isoc_methods = { 312 uhci_device_isoc_transfer, 313 uhci_device_isoc_start, 314 uhci_device_isoc_abort, 315 uhci_device_isoc_close, 316 uhci_noop, 317 uhci_device_isoc_done, 318 }; 319 320 void 321 uhci_busreset(sc) 322 uhci_softc_t *sc; 323 { 324 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 325 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 326 UHCICMD(sc, 0); /* do nothing */ 327 } 328 329 usbd_status 330 uhci_init(sc) 331 uhci_softc_t *sc; 332 { 333 usbd_status r; 334 int i, j; 335 uhci_soft_qh_t *csqh, *bsqh, *sqh; 336 uhci_soft_td_t *std; 337 338 DPRINTFN(1,("uhci_init: start\n")); 339 340 #if defined(USB_DEBUG) 341 if (uhcidebug > 2) 342 uhci_dumpregs(sc); 343 #endif 344 345 uhci_run(sc, 0); /* stop the controller */ 346 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 347 348 uhci_busreset(sc); 349 350 /* Allocate and initialize real frame array. */ 351 r = usb_allocmem(sc->sc_dmatag, 352 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 353 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 354 if (r != USBD_NORMAL_COMPLETION) 355 return (r); 356 sc->sc_pframes = KERNADDR(&sc->sc_dma); 357 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 358 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma)); /* set frame list*/ 359 360 /* Allocate the dummy QH where bulk traffic will be queued. */ 361 bsqh = uhci_alloc_sqh(sc); 362 if (!bsqh) 363 return (USBD_NOMEM); 364 bsqh->qh.qh_hlink = LE(UHCI_PTR_T); /* end of QH chain */ 365 bsqh->qh.qh_elink = LE(UHCI_PTR_T); 366 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 367 368 /* Allocate the dummy QH where control traffic will be queued. */ 369 csqh = uhci_alloc_sqh(sc); 370 if (!csqh) 371 return (USBD_NOMEM); 372 csqh->hlink = bsqh; 373 csqh->qh.qh_hlink = LE(bsqh->physaddr | UHCI_PTR_Q); 374 csqh->qh.qh_elink = LE(UHCI_PTR_T); 375 sc->sc_ctl_start = sc->sc_ctl_end = csqh; 376 377 /* 378 * Make all (virtual) frame list pointers point to the interrupt 379 * queue heads and the interrupt queue heads at the control 380 * queue head and point the physical frame list to the virtual. 381 */ 382 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 383 std = uhci_alloc_std(sc); 384 sqh = uhci_alloc_sqh(sc); 385 if (!std || !sqh) 386 return (USBD_NOMEM); 387 std->link.sqh = sqh; 388 std->td.td_link = LE(sqh->physaddr | UHCI_PTR_Q); 389 std->td.td_status = LE(UHCI_TD_IOS); /* iso, inactive */ 390 std->td.td_token = LE(0); 391 std->td.td_buffer = LE(0); 392 sqh->hlink = csqh; 393 sqh->qh.qh_hlink = LE(csqh->physaddr | UHCI_PTR_Q); 394 sqh->elink = 0; 395 sqh->qh.qh_elink = LE(UHCI_PTR_T); 396 sc->sc_vframes[i].htd = std; 397 sc->sc_vframes[i].etd = std; 398 sc->sc_vframes[i].hqh = sqh; 399 sc->sc_vframes[i].eqh = sqh; 400 for (j = i; 401 j < UHCI_FRAMELIST_COUNT; 402 j += UHCI_VFRAMELIST_COUNT) 403 sc->sc_pframes[j] = LE(std->physaddr); 404 } 405 406 LIST_INIT(&sc->sc_intrhead); 407 408 /* Set up the bus struct. */ 409 sc->sc_bus.methods = &uhci_bus_methods; 410 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 411 412 sc->sc_suspend = PWR_RESUME; 413 powerhook_establish(uhci_power, sc); 414 415 DPRINTFN(1,("uhci_init: enabling\n")); 416 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 417 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 418 419 return (uhci_run(sc, 1)); /* and here we go... */ 420 } 421 422 usbd_status 423 uhci_allocm(bus, dma, size) 424 struct usbd_bus *bus; 425 usb_dma_t *dma; 426 u_int32_t size; 427 { 428 struct uhci_softc *sc = (struct uhci_softc *)bus; 429 430 return (usb_allocmem(sc->sc_dmatag, size, 0, dma)); 431 } 432 433 void 434 uhci_freem(bus, dma) 435 struct usbd_bus *bus; 436 usb_dma_t *dma; 437 { 438 struct uhci_softc *sc = (struct uhci_softc *)bus; 439 440 usb_freemem(sc->sc_dmatag, dma); 441 } 442 443 #if !defined(__OpenBSD__) 444 /* 445 * Handle suspend/resume. 446 * 447 * We need to switch to polling mode here, because this routine is 448 * called from an intterupt context. This is all right since we 449 * are almost suspended anyway. 450 */ 451 void 452 uhci_power(why, v) 453 int why; 454 void *v; 455 { 456 uhci_softc_t *sc = v; 457 int cmd; 458 int s; 459 460 s = splusb(); 461 cmd = UREAD2(sc, UHCI_CMD); 462 463 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n", 464 sc, why, sc->sc_suspend, cmd)); 465 466 if (why != PWR_RESUME) { 467 #if defined(USB_DEBUG) 468 if (uhcidebug > 2) 469 uhci_dumpregs(sc); 470 #endif 471 if (sc->sc_has_timo) 472 usb_untimeout(uhci_timo, sc->sc_has_timo, 473 sc->sc_has_timo->timo_handle); 474 sc->sc_bus.use_polling = 1; 475 uhci_run(sc, 0); /* stop the controller */ 476 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 477 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 478 sc->sc_suspend = why; 479 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 480 } else { 481 /* 482 * XXX We should really do much more here in case the 483 * controller registers have been lost and BIOS has 484 * not restored them. 485 */ 486 sc->sc_suspend = why; 487 if (cmd & UHCI_CMD_RS) 488 uhci_run(sc, 0); /* in case BIOS has started it */ 489 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 490 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 491 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 492 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 493 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 494 uhci_run(sc, 1); /* and start traffic again */ 495 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 496 sc->sc_bus.use_polling = 0; 497 if (sc->sc_has_timo) 498 usb_timeout(uhci_timo, sc->sc_has_timo, 499 sc->sc_ival, sc->sc_has_timo->timo_handle); 500 #if defined(USB_DEBUG) 501 if (uhcidebug > 2) 502 uhci_dumpregs(sc); 503 #endif 504 } 505 splx(s); 506 } 507 #endif /* !defined(__OpenBSD__) */ 508 509 #ifdef USB_DEBUG 510 static void 511 uhci_dumpregs(sc) 512 uhci_softc_t *sc; 513 { 514 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 515 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 516 USBDEVNAME(sc->sc_bus.bdev), 517 UREAD2(sc, UHCI_CMD), 518 UREAD2(sc, UHCI_STS), 519 UREAD2(sc, UHCI_INTR), 520 UREAD2(sc, UHCI_FRNUM), 521 UREAD4(sc, UHCI_FLBASEADDR), 522 UREAD1(sc, UHCI_SOF), 523 UREAD2(sc, UHCI_PORTSC1), 524 UREAD2(sc, UHCI_PORTSC2))); 525 } 526 527 void 528 uhci_dump_td(p) 529 uhci_soft_td_t *p; 530 { 531 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 532 "token=0x%08lx buffer=0x%08lx\n", 533 p, (long)p->physaddr, 534 (long)LE(p->td.td_link), 535 (long)LE(p->td.td_status), 536 (long)LE(p->td.td_token), 537 (long)LE(p->td.td_buffer))); 538 DPRINTFN(-1,(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 539 "D=%d,maxlen=%d\n", 540 (int)LE(p->td.td_link), 541 "\20\1T\2Q\3VF", 542 (int)LE(p->td.td_status), 543 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 544 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 545 UHCI_TD_GET_ERRCNT(LE(p->td.td_status)), 546 UHCI_TD_GET_ACTLEN(LE(p->td.td_status)), 547 UHCI_TD_GET_PID(LE(p->td.td_token)), 548 UHCI_TD_GET_DEVADDR(LE(p->td.td_token)), 549 UHCI_TD_GET_ENDPT(LE(p->td.td_token)), 550 UHCI_TD_GET_DT(LE(p->td.td_token)), 551 UHCI_TD_GET_MAXLEN(LE(p->td.td_token)))); 552 } 553 554 void 555 uhci_dump_qh(p) 556 uhci_soft_qh_t *p; 557 { 558 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, 559 (int)p->physaddr, LE(p->qh.qh_hlink), LE(p->qh.qh_elink))); 560 } 561 562 563 #if 0 564 void 565 uhci_dump() 566 { 567 uhci_softc_t *sc = uhci; 568 569 uhci_dumpregs(sc); 570 printf("intrs=%d\n", sc->sc_intrs); 571 printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link); 572 uhci_dump_qh(sc->sc_ctl_start->qh.hlink); 573 } 574 #endif 575 576 void 577 uhci_dump_tds(std) 578 uhci_soft_td_t *std; 579 { 580 uhci_soft_td_t *p; 581 582 for(p = std; p; p = p->link.std) 583 uhci_dump_td(p); 584 } 585 #endif 586 587 /* 588 * This routine is executed periodically and simulates interrupts 589 * from the root controller interrupt pipe for port status change. 590 */ 591 void 592 uhci_timo(addr) 593 void *addr; 594 { 595 usbd_request_handle reqh = addr; 596 usbd_pipe_handle pipe = reqh->pipe; 597 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 598 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 599 int s; 600 u_char *p; 601 602 DPRINTFN(15, ("uhci_timo\n")); 603 604 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle); 605 606 p = KERNADDR(&upipe->u.intr.datadma); 607 p[0] = 0; 608 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 609 p[0] |= 1<<1; 610 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 611 p[0] |= 1<<2; 612 if (p[0] == 0) 613 /* No change, try again in a while */ 614 return; 615 616 reqh->actlen = 1; 617 reqh->status = USBD_NORMAL_COMPLETION; 618 s = splusb(); 619 reqh->hcpriv = 0; 620 usb_transfer_complete(reqh); 621 splx(s); 622 } 623 624 void 625 uhci_root_intr_done(reqh) 626 usbd_request_handle reqh; 627 { 628 usbd_pipe_handle pipe = reqh->pipe; 629 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 630 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 631 632 if (!reqh->pipe->repeat) 633 usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma); 634 } 635 636 637 void 638 uhci_lock_frames(sc) 639 uhci_softc_t *sc; 640 { 641 int s = splusb(); 642 while (sc->sc_vflock) { 643 sc->sc_vflock |= UHCI_WANT_LOCK; 644 tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0); 645 } 646 sc->sc_vflock = UHCI_HAS_LOCK; 647 splx(s); 648 } 649 650 void 651 uhci_unlock_frames(sc) 652 uhci_softc_t *sc; 653 { 654 int s = splusb(); 655 sc->sc_vflock &= ~UHCI_HAS_LOCK; 656 if (sc->sc_vflock & UHCI_WANT_LOCK) 657 wakeup(&sc->sc_vflock); 658 splx(s); 659 } 660 661 /* 662 * Allocate an interrupt information struct. A free list is kept 663 * for fast allocation. 664 */ 665 uhci_intr_info_t * 666 uhci_alloc_intr_info(sc) 667 uhci_softc_t *sc; 668 { 669 uhci_intr_info_t *ii; 670 671 ii = LIST_FIRST(&uhci_ii_free); 672 if (ii) 673 LIST_REMOVE(ii, list); 674 else { 675 ii = malloc(sizeof(uhci_intr_info_t), M_USBHC, M_NOWAIT); 676 } 677 ii->sc = sc; 678 return ii; 679 } 680 681 void 682 uhci_free_intr_info(ii) 683 uhci_intr_info_t *ii; 684 { 685 LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */ 686 } 687 688 /* Add control QH, called at splusb(). */ 689 void 690 uhci_add_ctrl(sc, sqh) 691 uhci_softc_t *sc; 692 uhci_soft_qh_t *sqh; 693 { 694 uhci_soft_qh_t *eqh; 695 696 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 697 eqh = sc->sc_ctl_end; 698 sqh->hlink = eqh->hlink; 699 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 700 eqh->hlink = sqh; 701 eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q); 702 sc->sc_ctl_end = sqh; 703 } 704 705 /* Remove control QH, called at splusb(). */ 706 void 707 uhci_remove_ctrl(sc, sqh) 708 uhci_softc_t *sc; 709 uhci_soft_qh_t *sqh; 710 { 711 uhci_soft_qh_t *pqh; 712 713 DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh)); 714 for (pqh = sc->sc_ctl_start; pqh->hlink != sqh; pqh=pqh->hlink) 715 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 716 if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) { 717 printf("uhci_remove_ctrl: QH not found\n"); 718 return; 719 } 720 #else 721 ; 722 #endif 723 pqh->hlink = sqh->hlink; 724 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 725 if (sc->sc_ctl_end == sqh) 726 sc->sc_ctl_end = pqh; 727 } 728 729 /* Add bulk QH, called at splusb(). */ 730 void 731 uhci_add_bulk(sc, sqh) 732 uhci_softc_t *sc; 733 uhci_soft_qh_t *sqh; 734 { 735 uhci_soft_qh_t *eqh; 736 737 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 738 eqh = sc->sc_bulk_end; 739 sqh->hlink = eqh->hlink; 740 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 741 eqh->hlink = sqh; 742 eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q); 743 sc->sc_bulk_end = sqh; 744 } 745 746 /* Remove bulk QH, called at splusb(). */ 747 void 748 uhci_remove_bulk(sc, sqh) 749 uhci_softc_t *sc; 750 uhci_soft_qh_t *sqh; 751 { 752 uhci_soft_qh_t *pqh; 753 754 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 755 for (pqh = sc->sc_bulk_start; pqh->hlink != sqh; pqh = pqh->hlink) 756 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 757 if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) { 758 printf("uhci_remove_bulk: QH not found\n"); 759 return; 760 } 761 #else 762 ; 763 #endif 764 pqh->hlink = sqh->hlink; 765 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 766 if (sc->sc_bulk_end == sqh) 767 sc->sc_bulk_end = pqh; 768 } 769 770 int 771 uhci_intr(arg) 772 void *arg; 773 { 774 uhci_softc_t *sc = arg; 775 int status; 776 int ack; 777 uhci_intr_info_t *ii; 778 779 sc->sc_intrs++; 780 781 #if defined(USB_DEBUG) 782 if (uhcidebug > 15) { 783 DPRINTF(("%s: uhci_intr\n", USBDEVNAME(sc->sc_bus.bdev))); 784 uhci_dumpregs(sc); 785 } 786 #endif 787 788 #if defined(DIAGNOSTIC) && defined(__NetBSD__) 789 if (sc->sc_suspend != PWR_RESUME) 790 printf("uhci_intr: suspended sts=0x%x\n", status); 791 #endif 792 793 status = UREAD2(sc, UHCI_STS); 794 ack = 0; 795 if (status & UHCI_STS_USBINT) 796 ack |= UHCI_STS_USBINT; 797 if (status & UHCI_STS_USBEI) 798 ack |= UHCI_STS_USBEI; 799 if (status & UHCI_STS_RD) { 800 ack |= UHCI_STS_RD; 801 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 802 } 803 if (status & UHCI_STS_HSE) { 804 ack |= UHCI_STS_HSE; 805 printf("%s: host controller process error\n", 806 USBDEVNAME(sc->sc_bus.bdev)); 807 } 808 if (status & UHCI_STS_HCPE) { 809 ack |= UHCI_STS_HCPE; 810 printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev)); 811 } 812 if (status & UHCI_STS_HCH) { 813 /* no acknowledge needed */ 814 printf("%s: host controller halted\n", 815 USBDEVNAME(sc->sc_bus.bdev)); 816 } 817 818 if (ack) /* acknowledge the ints */ 819 UWRITE2(sc, UHCI_STS, ack); 820 else /* nothing to acknowledge */ 821 return (0); 822 823 /* 824 * Interrupts on UHCI really suck. When the host controller 825 * interrupts because a transfer is completed there is no 826 * way of knowing which transfer it was. You can scan down 827 * the TDs and QHs of the previous frame to limit the search, 828 * but that assumes that the interrupt was not delayed by more 829 * than 1 ms, which may not always be true (e.g. after debug 830 * output on a slow console). 831 * We scan all interrupt descriptors to see if any have 832 * completed. 833 */ 834 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 835 uhci_check_intr(sc, ii); 836 837 DPRINTFN(10, ("uhci_intr: exit\n")); 838 839 return (1); 840 } 841 842 /* Check for an interrupt. */ 843 void 844 uhci_check_intr(sc, ii) 845 uhci_softc_t *sc; 846 uhci_intr_info_t *ii; 847 { 848 uhci_soft_td_t *std, *lstd; 849 u_int32_t status; 850 851 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 852 #ifdef DIAGNOSTIC 853 if (!ii) { 854 printf("uhci_check_intr: no ii? %p\n", ii); 855 return; 856 } 857 #endif 858 if (!ii->stdstart) 859 return; 860 lstd = ii->stdend; 861 #ifdef DIAGNOSTIC 862 if (!lstd) { 863 printf("uhci_check_intr: std==0\n"); 864 return; 865 } 866 #endif 867 /* 868 * If the last TD is still active we need to check whether there 869 * is a an error somewhere in the middle, or whether there was a 870 * short packet (SPD and not ACTIVE). 871 */ 872 if (LE(lstd->td.td_status) & UHCI_TD_ACTIVE) { 873 DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii)); 874 for (std = ii->stdstart; std != lstd; std = std->link.std) { 875 status = LE(std->td.td_status); 876 if ((status & UHCI_TD_STALLED) || 877 (status & (UHCI_TD_SPD | UHCI_TD_ACTIVE)) == 878 UHCI_TD_SPD) 879 goto done; 880 } 881 DPRINTFN(15, ("uhci_check_intr: ii=%p std=%p still active\n", 882 ii, ii->stdstart)); 883 return; 884 } 885 done: 886 usb_untimeout(uhci_timeout, ii, ii->timeout_handle); 887 uhci_idone(ii); 888 } 889 890 void 891 uhci_idone(ii) 892 uhci_intr_info_t *ii; 893 { 894 usbd_request_handle reqh = ii->reqh; 895 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 896 uhci_soft_td_t *std; 897 u_int32_t status; 898 int actlen; 899 900 #ifdef DIAGNOSTIC 901 { 902 int s = splhigh(); 903 if (ii->isdone) { 904 splx(s); 905 printf("uhci_idone: ii=%p is done!\n", ii); 906 return; 907 } 908 ii->isdone = 1; 909 splx(s); 910 } 911 #endif 912 913 if (reqh->status == USBD_CANCELLED || 914 reqh->status == USBD_TIMEOUT) { 915 DPRINTF(("uhci_idone: aborted reqh=%p\n", reqh)); 916 return; 917 } 918 919 if (reqh->nframes) { 920 /* Isoc transfer, do things differently. */ 921 uhci_soft_td_t **stds = upipe->u.iso.stds; 922 int i, n, nframes; 923 924 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 925 926 nframes = reqh->nframes; 927 actlen = 0; 928 n = reqh->hcprivint; 929 for (i = 0; i < nframes; i++) { 930 std = stds[n]; 931 #ifdef USB_DEBUG 932 if (uhcidebug > 5) { 933 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 934 uhci_dump_td(std); 935 } 936 #endif 937 if (++n >= UHCI_VFRAMELIST_COUNT) 938 n = 0; 939 status = LE(std->td.td_status); 940 actlen += UHCI_TD_GET_ACTLEN(status); 941 } 942 upipe->u.iso.inuse -= nframes; 943 reqh->actlen = actlen; 944 reqh->status = USBD_NORMAL_COMPLETION; 945 reqh->hcpriv = ii; 946 usb_transfer_complete(reqh); 947 return; 948 } 949 950 #ifdef USB_DEBUG 951 DPRINTFN(10, ("uhci_idone: ii=%p ready\n", ii)); 952 if (uhcidebug > 10) 953 uhci_dump_tds(ii->stdstart); 954 #endif 955 956 /* The transfer is done, compute actual length and status. */ 957 /* XXX Is this correct for control xfers? */ 958 actlen = 0; 959 for (std = ii->stdstart; std; std = std->link.std) { 960 status = LE(std->td.td_status); 961 if (status & UHCI_TD_ACTIVE) 962 break; 963 if (UHCI_TD_GET_PID(LE(std->td.td_token)) != 964 UHCI_TD_PID_SETUP) 965 actlen += UHCI_TD_GET_ACTLEN(status); 966 } 967 /* If there are left over TDs we need to update the toggle. */ 968 if (std) 969 upipe->nexttoggle = UHCI_TD_GET_DT(LE(std->td.td_token)); 970 971 status &= UHCI_TD_ERROR; 972 DPRINTFN(10, ("uhci_check_intr: actlen=%d, status=0x%x\n", 973 actlen, status)); 974 reqh->actlen = actlen; 975 if (status != 0) { 976 DPRINTFN(-1+((status&UHCI_TD_STALLED)!=0), 977 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 978 "status 0x%b\n", 979 reqh->pipe->device->address, 980 reqh->pipe->endpoint->edesc->bEndpointAddress, 981 (int)status, 982 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 983 "STALLED\30ACTIVE")); 984 if (status == UHCI_TD_STALLED) 985 reqh->status = USBD_STALLED; 986 else 987 reqh->status = USBD_IOERROR; /* more info XXX */ 988 } else { 989 reqh->status = USBD_NORMAL_COMPLETION; 990 } 991 reqh->hcpriv = ii; 992 usb_transfer_complete(reqh); 993 } 994 995 /* 996 * Called when a request does not complete. 997 */ 998 void 999 uhci_timeout(addr) 1000 void *addr; 1001 { 1002 uhci_intr_info_t *ii = addr; 1003 1004 DPRINTF(("uhci_timeout: ii=%p\n", ii)); 1005 uhci_abort_req(ii->reqh, USBD_TIMEOUT); 1006 } 1007 1008 /* 1009 * Wait here until controller claims to have an interrupt. 1010 * Then call uhci_intr and return. Use timeout to avoid waiting 1011 * too long. 1012 * Only used during boot when interrupts are not enabled yet. 1013 */ 1014 void 1015 uhci_waitintr(sc, reqh) 1016 uhci_softc_t *sc; 1017 usbd_request_handle reqh; 1018 { 1019 int timo = reqh->timeout; 1020 uhci_intr_info_t *ii; 1021 1022 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1023 1024 reqh->status = USBD_IN_PROGRESS; 1025 for (; timo >= 0; timo--) { 1026 usb_delay_ms(&sc->sc_bus, 1); 1027 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1028 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1029 uhci_intr(sc); 1030 if (reqh->status != USBD_IN_PROGRESS) 1031 return; 1032 } 1033 } 1034 1035 /* Timeout */ 1036 DPRINTF(("uhci_waitintr: timeout\n")); 1037 for (ii = LIST_FIRST(&sc->sc_intrhead); 1038 ii && ii->reqh != reqh; 1039 ii = LIST_NEXT(ii, list)) 1040 ; 1041 #ifdef DIAGNOSTIC 1042 if (!ii) 1043 panic("uhci_waitintr: lost intr_info\n"); 1044 #endif 1045 uhci_idone(ii); 1046 } 1047 1048 void 1049 uhci_poll(bus) 1050 struct usbd_bus *bus; 1051 { 1052 uhci_softc_t *sc = (uhci_softc_t *)bus; 1053 1054 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1055 uhci_intr(sc); 1056 } 1057 1058 #if 0 1059 void 1060 uhci_reset(p) 1061 void *p; 1062 { 1063 uhci_softc_t *sc = p; 1064 int n; 1065 1066 UHCICMD(sc, UHCI_CMD_HCRESET); 1067 /* The reset bit goes low when the controller is done. */ 1068 for (n = 0; n < UHCI_RESET_TIMEOUT && 1069 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1070 delay(100); 1071 if (n >= UHCI_RESET_TIMEOUT) 1072 printf("%s: controller did not reset\n", 1073 USBDEVNAME(sc->sc_bus.bdev)); 1074 } 1075 #endif 1076 1077 usbd_status 1078 uhci_run(sc, run) 1079 uhci_softc_t *sc; 1080 int run; 1081 { 1082 int s, n, running; 1083 1084 run = run != 0; 1085 s = splusb(); 1086 DPRINTF(("uhci_run: setting run=%d\n", run)); 1087 UHCICMD(sc, run ? UHCI_CMD_RS : 0); 1088 for(n = 0; n < 10; n++) { 1089 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1090 /* return when we've entered the state we want */ 1091 if (run == running) { 1092 splx(s); 1093 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1094 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1095 return (USBD_NORMAL_COMPLETION); 1096 } 1097 usb_delay_ms(&sc->sc_bus, 1); 1098 } 1099 splx(s); 1100 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev), 1101 run ? "start" : "stop"); 1102 return (USBD_IOERROR); 1103 } 1104 1105 /* 1106 * Memory management routines. 1107 * uhci_alloc_std allocates TDs 1108 * uhci_alloc_sqh allocates QHs 1109 * These two routines do their own free list management, 1110 * partly for speed, partly because allocating DMAable memory 1111 * has page size granularaity so much memory would be wasted if 1112 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1113 */ 1114 1115 uhci_soft_td_t * 1116 uhci_alloc_std(sc) 1117 uhci_softc_t *sc; 1118 { 1119 uhci_soft_td_t *std; 1120 usbd_status r; 1121 int i, offs; 1122 usb_dma_t dma; 1123 1124 if (!sc->sc_freetds) { 1125 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1126 r = usb_allocmem(sc->sc_dmatag, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1127 UHCI_TD_ALIGN, &dma); 1128 if (r != USBD_NORMAL_COMPLETION) 1129 return (0); 1130 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1131 offs = i * UHCI_STD_SIZE; 1132 std = (uhci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 1133 std->physaddr = DMAADDR(&dma) + offs; 1134 std->link.std = sc->sc_freetds; 1135 sc->sc_freetds = std; 1136 } 1137 } 1138 std = sc->sc_freetds; 1139 sc->sc_freetds = std->link.std; 1140 memset(&std->td, 0, sizeof(uhci_td_t)); 1141 return std; 1142 } 1143 1144 void 1145 uhci_free_std(sc, std) 1146 uhci_softc_t *sc; 1147 uhci_soft_td_t *std; 1148 { 1149 #ifdef DIAGNOSTIC 1150 #define TD_IS_FREE 0x12345678 1151 if (LE(std->td.td_token) == TD_IS_FREE) { 1152 printf("uhci_free_std: freeing free TD %p\n", std); 1153 return; 1154 } 1155 std->td.td_token = LE(TD_IS_FREE); 1156 #endif 1157 std->link.std = sc->sc_freetds; 1158 sc->sc_freetds = std; 1159 } 1160 1161 uhci_soft_qh_t * 1162 uhci_alloc_sqh(sc) 1163 uhci_softc_t *sc; 1164 { 1165 uhci_soft_qh_t *sqh; 1166 usbd_status r; 1167 int i, offs; 1168 usb_dma_t dma; 1169 1170 if (!sc->sc_freeqhs) { 1171 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1172 r = usb_allocmem(sc->sc_dmatag, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1173 UHCI_QH_ALIGN, &dma); 1174 if (r != USBD_NORMAL_COMPLETION) 1175 return 0; 1176 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1177 offs = i * UHCI_SQH_SIZE; 1178 sqh = (uhci_soft_qh_t *)((char *)KERNADDR(&dma) +offs); 1179 sqh->physaddr = DMAADDR(&dma) + offs; 1180 sqh->hlink = sc->sc_freeqhs; 1181 sc->sc_freeqhs = sqh; 1182 } 1183 } 1184 sqh = sc->sc_freeqhs; 1185 sc->sc_freeqhs = sqh->hlink; 1186 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1187 return (sqh); 1188 } 1189 1190 void 1191 uhci_free_sqh(sc, sqh) 1192 uhci_softc_t *sc; 1193 uhci_soft_qh_t *sqh; 1194 { 1195 sqh->hlink = sc->sc_freeqhs; 1196 sc->sc_freeqhs = sqh; 1197 } 1198 1199 #if 0 1200 /* 1201 * Enter a list of transfers onto a control queue. 1202 * Called at splusb() 1203 */ 1204 void 1205 uhci_enter_ctl_q(sc, sqh, ii) 1206 uhci_softc_t *sc; 1207 uhci_soft_qh_t *sqh; 1208 uhci_intr_info_t *ii; 1209 { 1210 DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh)); 1211 1212 } 1213 #endif 1214 1215 void 1216 uhci_free_std_chain(sc, std, stdend) 1217 uhci_softc_t *sc; 1218 uhci_soft_td_t *std; 1219 uhci_soft_td_t *stdend; 1220 { 1221 uhci_soft_td_t *p; 1222 1223 for (; std != stdend; std = p) { 1224 p = std->link.std; 1225 uhci_free_std(sc, std); 1226 } 1227 } 1228 1229 usbd_status 1230 uhci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep) 1231 struct uhci_pipe *upipe; 1232 uhci_softc_t *sc; 1233 int len, rd, shortok; 1234 usb_dma_t *dma; 1235 uhci_soft_td_t **sp, **ep; 1236 { 1237 uhci_soft_td_t *p, *lastp; 1238 uhci_physaddr_t lastlink; 1239 int i, ntd, l, tog, maxp; 1240 u_int32_t status; 1241 int addr = upipe->pipe.device->address; 1242 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1243 1244 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d " 1245 "shortok=%d\n", addr, UE_GET_ADDR(endpt), len, 1246 upipe->pipe.device->lowspeed, shortok)); 1247 if (len == 0) { 1248 *sp = *ep = 0; 1249 DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n")); 1250 return (USBD_NORMAL_COMPLETION); 1251 } 1252 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1253 if (maxp == 0) { 1254 printf("uhci_alloc_std_chain: maxp=0\n"); 1255 return (USBD_INVAL); 1256 } 1257 ntd = (len + maxp - 1) / maxp; 1258 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1259 tog = upipe->nexttoggle; 1260 if (ntd % 2 == 0) 1261 tog ^= 1; 1262 upipe->nexttoggle = tog ^ 1; 1263 lastp = 0; 1264 lastlink = UHCI_PTR_T; 1265 ntd--; 1266 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1267 if (upipe->pipe.device->lowspeed) 1268 status |= UHCI_TD_LS; 1269 if (shortok) 1270 status |= UHCI_TD_SPD; 1271 for (i = ntd; i >= 0; i--) { 1272 p = uhci_alloc_std(sc); 1273 if (!p) { 1274 uhci_free_std_chain(sc, lastp, 0); 1275 return (USBD_NOMEM); 1276 } 1277 p->link.std = lastp; 1278 p->td.td_link = LE(lastlink); 1279 lastp = p; 1280 lastlink = p->physaddr; 1281 p->td.td_status = LE(status); 1282 if (i == ntd) { 1283 /* last TD */ 1284 l = len % maxp; 1285 if (l == 0) l = maxp; 1286 *ep = p; 1287 } else 1288 l = maxp; 1289 p->td.td_token = 1290 LE(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1291 UHCI_TD_OUT(l, endpt, addr, tog)); 1292 p->td.td_buffer = LE(DMAADDR(dma) + i * maxp); 1293 tog ^= 1; 1294 } 1295 *sp = lastp; 1296 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1297 upipe->nexttoggle)); 1298 return (USBD_NORMAL_COMPLETION); 1299 } 1300 1301 void 1302 uhci_device_clear_toggle(pipe) 1303 usbd_pipe_handle pipe; 1304 { 1305 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1306 upipe->nexttoggle = 0; 1307 } 1308 1309 void 1310 uhci_noop(pipe) 1311 usbd_pipe_handle pipe; 1312 { 1313 } 1314 1315 usbd_status 1316 uhci_device_bulk_transfer(reqh) 1317 usbd_request_handle reqh; 1318 { 1319 int s; 1320 usbd_status r; 1321 1322 s = splusb(); 1323 r = usb_insert_transfer(reqh); 1324 splx(s); 1325 if (r != USBD_NORMAL_COMPLETION) 1326 return (r); 1327 else 1328 return (uhci_device_bulk_start(reqh)); 1329 } 1330 1331 usbd_status 1332 uhci_device_bulk_start(reqh) 1333 usbd_request_handle reqh; 1334 { 1335 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1336 usbd_device_handle dev = upipe->pipe.device; 1337 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1338 uhci_intr_info_t *ii = upipe->iinfo; 1339 uhci_soft_td_t *xfer, *xferend; 1340 uhci_soft_qh_t *sqh; 1341 usb_dma_t *dmap; 1342 usbd_status r; 1343 int len, isread, endpt; 1344 int s; 1345 1346 DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d " 1347 "flags=%d\n", 1348 reqh, reqh->buffer, reqh->length, reqh->flags)); 1349 1350 #ifdef DIAGNOSTIC 1351 if (reqh->rqflags & URQ_REQUEST) 1352 panic("uhci_device_bulk_transfer: a request\n"); 1353 #endif 1354 1355 len = reqh->length; 1356 dmap = &upipe->u.bulk.datadma; 1357 endpt = reqh->pipe->endpoint->edesc->bEndpointAddress; 1358 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 1359 sqh = upipe->u.bulk.sqh; 1360 1361 upipe->u.bulk.isread = isread; 1362 upipe->u.bulk.length = len; 1363 1364 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1365 if (r != USBD_NORMAL_COMPLETION) 1366 goto ret1; 1367 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1368 reqh->flags & USBD_SHORT_XFER_OK, 1369 dmap, &xfer, &xferend); 1370 if (r != USBD_NORMAL_COMPLETION) 1371 goto ret2; 1372 xferend->td.td_status |= LE(UHCI_TD_IOC); 1373 1374 if (!isread && len != 0) 1375 memcpy(KERNADDR(dmap), reqh->buffer, len); 1376 1377 #ifdef USB_DEBUG 1378 if (uhcidebug > 8) { 1379 DPRINTF(("uhci_device_bulk_transfer: xfer(1)\n")); 1380 uhci_dump_tds(xfer); 1381 } 1382 #endif 1383 1384 /* Set up interrupt info. */ 1385 ii->reqh = reqh; 1386 ii->stdstart = xfer; 1387 ii->stdend = xferend; 1388 #ifdef DIAGNOSTIC 1389 ii->isdone = 0; 1390 #endif 1391 1392 sqh->elink = xfer; 1393 sqh->qh.qh_elink = LE(xfer->physaddr); 1394 sqh->intr_info = ii; 1395 1396 s = splusb(); 1397 uhci_add_bulk(sc, sqh); 1398 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1399 1400 if (reqh->timeout && !sc->sc_bus.use_polling) { 1401 usb_timeout(uhci_timeout, ii, 1402 MS_TO_TICKS(reqh->timeout), ii->timeout_handle); 1403 } 1404 splx(s); 1405 1406 #ifdef USB_DEBUG 1407 if (uhcidebug > 10) { 1408 DPRINTF(("uhci_device_bulk_transfer: xfer(2)\n")); 1409 uhci_dump_tds(xfer); 1410 } 1411 #endif 1412 1413 if (sc->sc_bus.use_polling) 1414 uhci_waitintr(sc, reqh); 1415 1416 return (USBD_IN_PROGRESS); 1417 1418 ret2: 1419 if (len != 0) 1420 usb_freemem(sc->sc_dmatag, dmap); 1421 ret1: 1422 return (r); 1423 } 1424 1425 /* Abort a device bulk request. */ 1426 void 1427 uhci_device_bulk_abort(reqh) 1428 usbd_request_handle reqh; 1429 { 1430 DPRINTF(("uhci_device_bulk_abort:\n")); 1431 uhci_abort_req(reqh, USBD_CANCELLED); 1432 } 1433 1434 void 1435 uhci_abort_req(reqh, status) 1436 usbd_request_handle reqh; 1437 usbd_status status; 1438 { 1439 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1440 uhci_intr_info_t *ii = upipe->iinfo; 1441 uhci_soft_td_t *std; 1442 1443 /* Make interrupt routine ignore it, */ 1444 reqh->status = status; 1445 1446 /* don't timeout, */ 1447 usb_untimeout(uhci_timeout, ii, ii->timeout_handle); 1448 1449 /* make hardware ignore it, */ 1450 for (std = ii->stdstart; std != 0; std = std->link.std) 1451 std->td.td_status &= LE(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1452 1453 reqh->hcpriv = ii; 1454 1455 /* make sure hardware has completed, */ 1456 if (curproc) { 1457 usb_delay_ms(reqh->pipe->device->bus, 1); 1458 /* and call final part of interrupt handler. */ 1459 uhci_abort_req_end(reqh); 1460 } else { 1461 /* We have no process context, so we can't use tsleep(). */ 1462 timeout(uhci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND); 1463 } 1464 } 1465 1466 void 1467 uhci_abort_req_end(v) 1468 void *v; 1469 { 1470 usbd_request_handle reqh = v; 1471 int s; 1472 1473 s = splusb(); 1474 usb_transfer_complete(reqh); 1475 splx(s); 1476 } 1477 1478 /* Close a device bulk pipe. */ 1479 void 1480 uhci_device_bulk_close(pipe) 1481 usbd_pipe_handle pipe; 1482 { 1483 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1484 usbd_device_handle dev = upipe->pipe.device; 1485 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1486 1487 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1488 uhci_free_intr_info(upipe->iinfo); 1489 /* XXX free other resources */ 1490 } 1491 1492 usbd_status 1493 uhci_device_ctrl_transfer(reqh) 1494 usbd_request_handle reqh; 1495 { 1496 int s; 1497 usbd_status r; 1498 1499 s = splusb(); 1500 r = usb_insert_transfer(reqh); 1501 splx(s); 1502 if (r != USBD_NORMAL_COMPLETION) 1503 return (r); 1504 else 1505 return (uhci_device_ctrl_start(reqh)); 1506 } 1507 1508 usbd_status 1509 uhci_device_ctrl_start(reqh) 1510 usbd_request_handle reqh; 1511 { 1512 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 1513 usbd_status r; 1514 1515 #ifdef DIAGNOSTIC 1516 if (!(reqh->rqflags & URQ_REQUEST)) 1517 panic("uhci_device_ctrl_transfer: not a request\n"); 1518 #endif 1519 1520 r = uhci_device_request(reqh); 1521 if (r != USBD_NORMAL_COMPLETION) 1522 return (r); 1523 1524 if (sc->sc_bus.use_polling) 1525 uhci_waitintr(sc, reqh); 1526 return (USBD_IN_PROGRESS); 1527 } 1528 1529 usbd_status 1530 uhci_device_intr_transfer(reqh) 1531 usbd_request_handle reqh; 1532 { 1533 int s; 1534 usbd_status r; 1535 1536 s = splusb(); 1537 r = usb_insert_transfer(reqh); 1538 splx(s); 1539 if (r != USBD_NORMAL_COMPLETION) 1540 return (r); 1541 else 1542 return (uhci_device_intr_start(reqh)); 1543 } 1544 1545 usbd_status 1546 uhci_device_intr_start(reqh) 1547 usbd_request_handle reqh; 1548 { 1549 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1550 usbd_device_handle dev = upipe->pipe.device; 1551 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1552 uhci_intr_info_t *ii = upipe->iinfo; 1553 uhci_soft_td_t *xfer, *xferend; 1554 uhci_soft_qh_t *sqh; 1555 usb_dma_t *dmap; 1556 usbd_status r; 1557 int len, i; 1558 int s; 1559 1560 DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d " 1561 "flags=%d\n", 1562 reqh, reqh->buffer, reqh->length, reqh->flags)); 1563 1564 #ifdef DIAGNOSTIC 1565 if (reqh->rqflags & URQ_REQUEST) 1566 panic("uhci_device_intr_transfer: a request\n"); 1567 #endif 1568 1569 len = reqh->length; 1570 dmap = &upipe->u.intr.datadma; 1571 if (len == 0) 1572 return (USBD_INVAL); /* XXX should it be? */ 1573 1574 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1575 if (r != USBD_NORMAL_COMPLETION) 1576 goto ret1; 1577 r = uhci_alloc_std_chain(upipe, sc, len, 1, 1578 reqh->flags & USBD_SHORT_XFER_OK, 1579 dmap, &xfer, &xferend); 1580 if (r != USBD_NORMAL_COMPLETION) 1581 goto ret2; 1582 xferend->td.td_status |= LE(UHCI_TD_IOC); 1583 1584 #ifdef USB_DEBUG 1585 if (uhcidebug > 10) { 1586 DPRINTF(("uhci_device_intr_transfer: xfer(1)\n")); 1587 uhci_dump_tds(xfer); 1588 uhci_dump_qh(upipe->u.intr.qhs[0]); 1589 } 1590 #endif 1591 1592 s = splusb(); 1593 /* Set up interrupt info. */ 1594 ii->reqh = reqh; 1595 ii->stdstart = xfer; 1596 ii->stdend = xferend; 1597 #ifdef DIAGNOSTIC 1598 ii->isdone = 0; 1599 #endif 1600 1601 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 1602 upipe->u.intr.qhs[0])); 1603 for (i = 0; i < upipe->u.intr.npoll; i++) { 1604 sqh = upipe->u.intr.qhs[i]; 1605 sqh->elink = xfer; 1606 sqh->qh.qh_elink = LE(xfer->physaddr); 1607 } 1608 splx(s); 1609 1610 #ifdef USB_DEBUG 1611 if (uhcidebug > 10) { 1612 DPRINTF(("uhci_device_intr_transfer: xfer(2)\n")); 1613 uhci_dump_tds(xfer); 1614 uhci_dump_qh(upipe->u.intr.qhs[0]); 1615 } 1616 #endif 1617 1618 return (USBD_IN_PROGRESS); 1619 1620 ret2: 1621 if (len != 0) 1622 usb_freemem(sc->sc_dmatag, dmap); 1623 ret1: 1624 return (r); 1625 } 1626 1627 /* Abort a device control request. */ 1628 void 1629 uhci_device_ctrl_abort(reqh) 1630 usbd_request_handle reqh; 1631 { 1632 DPRINTF(("uhci_device_ctrl_abort:\n")); 1633 uhci_abort_req(reqh, USBD_CANCELLED); 1634 } 1635 1636 /* Close a device control pipe. */ 1637 void 1638 uhci_device_ctrl_close(pipe) 1639 usbd_pipe_handle pipe; 1640 { 1641 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1642 1643 uhci_free_intr_info(upipe->iinfo); 1644 /* XXX free other resources */ 1645 } 1646 1647 /* Abort a device interrupt request. */ 1648 void 1649 uhci_device_intr_abort(reqh) 1650 usbd_request_handle reqh; 1651 { 1652 DPRINTFN(1,("uhci_device_intr_abort: reqh=%p\n", reqh)); 1653 if (reqh->pipe->intrreqh == reqh) { 1654 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 1655 reqh->pipe->intrreqh = 0; 1656 } 1657 uhci_abort_req(reqh, USBD_CANCELLED); 1658 } 1659 1660 /* Close a device interrupt pipe. */ 1661 void 1662 uhci_device_intr_close(pipe) 1663 usbd_pipe_handle pipe; 1664 { 1665 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1666 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 1667 int i, s, npoll; 1668 1669 upipe->iinfo->stdstart = 0; /* inactive */ 1670 1671 /* Unlink descriptors from controller data structures. */ 1672 npoll = upipe->u.intr.npoll; 1673 uhci_lock_frames(sc); 1674 for (i = 0; i < npoll; i++) 1675 uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos, 1676 upipe->u.intr.qhs[i]); 1677 uhci_unlock_frames(sc); 1678 1679 /* 1680 * We now have to wait for any activity on the physical 1681 * descriptors to stop. 1682 */ 1683 usb_delay_ms(&sc->sc_bus, 2); 1684 1685 for(i = 0; i < npoll; i++) 1686 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 1687 free(upipe->u.intr.qhs, M_USBHC); 1688 1689 s = splusb(); 1690 LIST_REMOVE(upipe->iinfo, list); /* remove from active list */ 1691 splx(s); 1692 uhci_free_intr_info(upipe->iinfo); 1693 1694 /* XXX free other resources */ 1695 } 1696 1697 usbd_status 1698 uhci_device_request(reqh) 1699 usbd_request_handle reqh; 1700 { 1701 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1702 usb_device_request_t *req = &reqh->request; 1703 usbd_device_handle dev = upipe->pipe.device; 1704 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1705 int addr = dev->address; 1706 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1707 uhci_intr_info_t *ii = upipe->iinfo; 1708 uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend; 1709 uhci_soft_qh_t *sqh; 1710 usb_dma_t *dmap; 1711 int len; 1712 u_int32_t ls; 1713 usbd_status r; 1714 int isread; 1715 int s; 1716 1717 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 1718 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1719 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1720 UGETW(req->wIndex), UGETW(req->wLength), 1721 addr, endpt)); 1722 1723 ls = dev->lowspeed ? UHCI_TD_LS : 0; 1724 isread = req->bmRequestType & UT_READ; 1725 len = UGETW(req->wLength); 1726 1727 setup = upipe->u.ctl.setup; 1728 stat = upipe->u.ctl.stat; 1729 sqh = upipe->u.ctl.sqh; 1730 dmap = &upipe->u.ctl.datadma; 1731 1732 /* Set up data transaction */ 1733 if (len != 0) { 1734 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1735 if (r != USBD_NORMAL_COMPLETION) 1736 goto ret1; 1737 upipe->nexttoggle = 1; 1738 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1739 reqh->flags & USBD_SHORT_XFER_OK, 1740 dmap, &xfer, &xferend); 1741 if (r != USBD_NORMAL_COMPLETION) 1742 goto ret2; 1743 next = xfer; 1744 xferend->link.std = stat; 1745 xferend->td.td_link = LE(stat->physaddr); 1746 } else { 1747 next = stat; 1748 } 1749 upipe->u.ctl.length = len; 1750 1751 memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req); 1752 if (!isread && len != 0) 1753 memcpy(KERNADDR(dmap), reqh->buffer, len); 1754 1755 setup->link.std = next; 1756 setup->td.td_link = LE(next->physaddr); 1757 setup->td.td_status = LE(UHCI_TD_SET_ERRCNT(3) | ls | UHCI_TD_ACTIVE); 1758 setup->td.td_token = LE(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 1759 setup->td.td_buffer = LE(DMAADDR(&upipe->u.ctl.reqdma)); 1760 1761 stat->link.std = 0; 1762 stat->td.td_link = LE(UHCI_PTR_T); 1763 stat->td.td_status = LE(UHCI_TD_SET_ERRCNT(3) | ls | 1764 UHCI_TD_ACTIVE | UHCI_TD_IOC); 1765 stat->td.td_token = 1766 LE(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 1767 UHCI_TD_IN (0, endpt, addr, 1)); 1768 stat->td.td_buffer = LE(0); 1769 1770 #ifdef USB_DEBUG 1771 if (uhcidebug > 20) { 1772 DPRINTF(("uhci_device_request: before transfer\n")); 1773 uhci_dump_tds(setup); 1774 } 1775 #endif 1776 1777 /* Set up interrupt info. */ 1778 ii->reqh = reqh; 1779 ii->stdstart = setup; 1780 ii->stdend = stat; 1781 #ifdef DIAGNOSTIC 1782 ii->isdone = 0; 1783 #endif 1784 1785 sqh->elink = setup; 1786 sqh->qh.qh_elink = LE(setup->physaddr); 1787 sqh->intr_info = ii; 1788 1789 s = splusb(); 1790 uhci_add_ctrl(sc, sqh); 1791 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1792 #ifdef USB_DEBUG 1793 if (uhcidebug > 12) { 1794 uhci_soft_td_t *std; 1795 uhci_soft_qh_t *xqh; 1796 uhci_soft_qh_t *sxqh; 1797 int maxqh = 0; 1798 uhci_physaddr_t link; 1799 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 1800 for (std = sc->sc_vframes[0].htd, link = 0; 1801 (link & UHCI_PTR_Q) == 0; 1802 std = std->link.std) { 1803 link = LE(std->td.td_link); 1804 uhci_dump_td(std); 1805 } 1806 for (sxqh = xqh = (uhci_soft_qh_t *)std; 1807 xqh; 1808 xqh = (maxqh++ == 5 || xqh->hlink==sxqh || 1809 xqh->hlink==xqh ? NULL : xqh->hlink)) { 1810 uhci_dump_qh(xqh); 1811 uhci_dump_qh(sxqh); 1812 } 1813 DPRINTF(("Enqueued QH:\n")); 1814 uhci_dump_qh(sqh); 1815 uhci_dump_tds(sqh->elink); 1816 } 1817 #endif 1818 if (reqh->timeout && !sc->sc_bus.use_polling) { 1819 usb_timeout(uhci_timeout, ii, 1820 MS_TO_TICKS(reqh->timeout), ii->timeout_handle); 1821 } 1822 splx(s); 1823 1824 return (USBD_NORMAL_COMPLETION); 1825 1826 ret2: 1827 if (len != 0) 1828 usb_freemem(sc->sc_dmatag, dmap); 1829 ret1: 1830 return (r); 1831 } 1832 1833 usbd_status 1834 uhci_device_isoc_transfer(reqh) 1835 usbd_request_handle reqh; 1836 { 1837 int s; 1838 usbd_status r; 1839 1840 DPRINTFN(5,("uhci_device_isoc_transfer: reqh=%p\n", reqh)); 1841 1842 /* Put it on our queue, */ 1843 s = splusb(); 1844 r = usb_insert_transfer(reqh); 1845 splx(s); 1846 1847 /* bail out on error, */ 1848 if (r != USBD_NORMAL_COMPLETION && r != USBD_IN_PROGRESS) 1849 return (r); 1850 1851 /* XXX should check inuse here */ 1852 1853 /* insert into schedule, */ 1854 uhci_device_isoc_enter(reqh); 1855 1856 /* and put on interrupt list if the pipe wasn't running */ 1857 if (r == USBD_NORMAL_COMPLETION) 1858 uhci_device_isoc_start(reqh); 1859 1860 return (r); 1861 } 1862 1863 void 1864 uhci_device_isoc_enter(reqh) 1865 usbd_request_handle reqh; 1866 { 1867 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1868 usbd_device_handle dev = upipe->pipe.device; 1869 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1870 struct iso *iso = &upipe->u.iso; 1871 uhci_soft_td_t *std; 1872 u_int32_t buf, len, status; 1873 int s, i, next, nframes; 1874 1875 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d reqh=%p " 1876 "nframes=%d\n", 1877 iso->inuse, iso->next, reqh, reqh->nframes)); 1878 1879 if (reqh->status == USBD_IN_PROGRESS) { 1880 /* This request has already been entered into the frame list */ 1881 } 1882 1883 #ifdef DIAGNOSTIC 1884 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 1885 printf("uhci_device_isoc_enter: overflow!\n"); 1886 #endif 1887 1888 next = iso->next; 1889 if (next == -1) { 1890 /* Not in use yet, schedule it a few frames ahead. */ 1891 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 1892 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 1893 } 1894 1895 reqh->status = USBD_IN_PROGRESS; 1896 reqh->hcprivint = next; 1897 1898 buf = DMAADDR(&reqh->dmabuf); 1899 status = LE(UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 1900 UHCI_TD_ACTIVE | 1901 UHCI_TD_IOS)); 1902 nframes = reqh->nframes; 1903 s = splusb(); 1904 for (i = 0; i < nframes; i++) { 1905 std = iso->stds[next]; 1906 if (++next >= UHCI_VFRAMELIST_COUNT) 1907 next = 0; 1908 len = reqh->frlengths[i]; 1909 std->td.td_buffer = LE(buf); 1910 if (i == nframes - 1) 1911 status |= LE(UHCI_TD_IOC); 1912 std->td.td_status = status; 1913 std->td.td_token &= LE(~UHCI_TD_MAXLEN_MASK); 1914 std->td.td_token |= LE(UHCI_TD_SET_MAXLEN(len)); 1915 #ifdef USB_DEBUG 1916 if (uhcidebug > 5) { 1917 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 1918 uhci_dump_td(std); 1919 } 1920 #endif 1921 buf += len; 1922 } 1923 iso->next = next; 1924 iso->inuse += reqh->nframes; 1925 1926 splx(s); 1927 } 1928 1929 usbd_status 1930 uhci_device_isoc_start(reqh) 1931 usbd_request_handle reqh; 1932 { 1933 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1934 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1935 uhci_intr_info_t *ii = upipe->iinfo; 1936 uhci_soft_td_t *end; 1937 int s, i; 1938 1939 #ifdef DIAGNOSTIC 1940 if (reqh->status != USBD_IN_PROGRESS) 1941 printf("uhci_device_isoc_start: not in progress %p\n", reqh); 1942 #endif 1943 1944 /* Find the last TD */ 1945 i = reqh->hcprivint + reqh->nframes; 1946 if (i >= UHCI_VFRAMELIST_COUNT) 1947 i -= UHCI_VFRAMELIST_COUNT; 1948 end = upipe->u.iso.stds[i]; 1949 1950 s = splusb(); 1951 1952 /* Set up interrupt info. */ 1953 ii->reqh = reqh; 1954 ii->stdstart = end; 1955 ii->stdend = end; 1956 #ifdef DIAGNOSTIC 1957 ii->isdone = 0; 1958 #endif 1959 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1960 1961 splx(s); 1962 1963 return (USBD_IN_PROGRESS); 1964 } 1965 1966 void 1967 uhci_device_isoc_abort(reqh) 1968 usbd_request_handle reqh; 1969 { 1970 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1971 uhci_intr_info_t *ii = upipe->iinfo; 1972 uhci_soft_td_t **stds = upipe->u.iso.stds; 1973 uhci_soft_td_t *std; 1974 int i, n, nframes; 1975 1976 /* Make interrupt routine ignore it, */ 1977 reqh->status = USBD_CANCELLED; 1978 1979 /* make hardware ignore it, */ 1980 nframes = reqh->nframes; 1981 n = reqh->hcprivint; 1982 for (i = 0; i < nframes; i++) { 1983 std = stds[n]; 1984 std->td.td_status &= LE(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1985 if (++n >= UHCI_VFRAMELIST_COUNT) 1986 n = 0; 1987 } 1988 1989 reqh->hcpriv = ii; 1990 1991 /* make sure hardware has completed, */ 1992 if (curproc) { 1993 usb_delay_ms(reqh->pipe->device->bus, 1); 1994 /* and call final part of interrupt handler. */ 1995 uhci_abort_req_end(reqh); 1996 } else { 1997 /* We have no process context, so we can't use tsleep(). */ 1998 timeout(uhci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND); 1999 } 2000 } 2001 2002 void 2003 uhci_device_isoc_close(pipe) 2004 usbd_pipe_handle pipe; 2005 { 2006 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2007 usbd_device_handle dev = upipe->pipe.device; 2008 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2009 uhci_soft_td_t *std, *vstd; 2010 struct iso *iso; 2011 int i; 2012 2013 /* 2014 * Make sure all TDs are marked as inactive. 2015 * Wait for completion. 2016 * Unschedule. 2017 * Deallocate. 2018 */ 2019 iso = &upipe->u.iso; 2020 2021 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2022 iso->stds[i]->td.td_status &= LE(~UHCI_TD_ACTIVE); 2023 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2024 2025 uhci_lock_frames(sc); 2026 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2027 std = iso->stds[i]; 2028 for (vstd = sc->sc_vframes[i].htd; 2029 vstd && vstd->link.std != std; 2030 vstd = vstd->link.std) 2031 ; 2032 if (!vstd) { 2033 /*panic*/ 2034 printf("uhci_device_isoc_close: %p not found\n", std); 2035 uhci_unlock_frames(sc); 2036 return; 2037 } 2038 vstd->link = std->link; 2039 vstd->td.td_link = std->td.td_link; 2040 uhci_free_std(sc, std); 2041 } 2042 uhci_unlock_frames(sc); 2043 2044 free(iso->stds, M_USBHC); 2045 } 2046 2047 usbd_status 2048 uhci_setup_isoc(pipe) 2049 usbd_pipe_handle pipe; 2050 { 2051 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2052 usbd_device_handle dev = upipe->pipe.device; 2053 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2054 int addr = upipe->pipe.device->address; 2055 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2056 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2057 uhci_soft_td_t *std, *vstd; 2058 u_int32_t token; 2059 struct iso *iso; 2060 int i; 2061 2062 iso = &upipe->u.iso; 2063 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2064 M_USBHC, M_WAITOK); 2065 2066 token = LE(rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2067 UHCI_TD_OUT(0, endpt, addr, 0)); 2068 2069 /* Allocate the TDs and mark as inactive; */ 2070 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2071 std = uhci_alloc_std(sc); 2072 if (std == 0) 2073 goto bad; 2074 std->td.td_status = LE(UHCI_TD_IOS); /* iso, inactive */ 2075 std->td.td_token = token; 2076 iso->stds[i] = std; 2077 } 2078 2079 /* Insert TDs into schedule. */ 2080 uhci_lock_frames(sc); 2081 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2082 std = iso->stds[i]; 2083 vstd = sc->sc_vframes[i].htd; 2084 std->link = vstd->link; 2085 std->td.td_link = vstd->td.td_link; 2086 vstd->link.std = std; 2087 vstd->td.td_link = LE(std->physaddr); 2088 } 2089 uhci_unlock_frames(sc); 2090 2091 iso->next = -1; 2092 iso->inuse = 0; 2093 2094 return (USBD_NORMAL_COMPLETION); 2095 2096 bad: 2097 while (--i >= 0) 2098 uhci_free_std(sc, iso->stds[i]); 2099 free(iso->stds, M_USBHC); 2100 return (USBD_NOMEM); 2101 } 2102 2103 void 2104 uhci_device_isoc_done(reqh) 2105 usbd_request_handle reqh; 2106 { 2107 uhci_intr_info_t *ii = reqh->hcpriv; 2108 2109 DPRINTFN(4, ("uhci_isoc_done: length=%d\n", reqh->actlen)); 2110 2111 /* Turn off the interrupt since it is active even if the TD is not. */ 2112 ii->stdend->td.td_status &= LE(~UHCI_TD_IOC); 2113 2114 LIST_REMOVE(ii, list); /* remove from active list */ 2115 } 2116 2117 void 2118 uhci_device_intr_done(reqh) 2119 usbd_request_handle reqh; 2120 { 2121 uhci_intr_info_t *ii = reqh->hcpriv; 2122 uhci_softc_t *sc = ii->sc; 2123 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 2124 usb_dma_t *dma; 2125 uhci_soft_qh_t *sqh; 2126 int i, npoll; 2127 2128 DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen)); 2129 2130 dma = &upipe->u.intr.datadma; 2131 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 2132 npoll = upipe->u.intr.npoll; 2133 for(i = 0; i < npoll; i++) { 2134 sqh = upipe->u.intr.qhs[i]; 2135 sqh->elink = 0; 2136 sqh->qh.qh_elink = LE(UHCI_PTR_T); 2137 } 2138 uhci_free_std_chain(sc, ii->stdstart, 0); 2139 2140 /* XXX Wasteful. */ 2141 if (reqh->pipe->repeat) { 2142 uhci_soft_td_t *xfer, *xferend; 2143 2144 /* This alloc cannot fail since we freed the chain above. */ 2145 uhci_alloc_std_chain(upipe, sc, reqh->length, 1, 2146 reqh->flags & USBD_SHORT_XFER_OK, 2147 dma, &xfer, &xferend); 2148 xferend->td.td_status |= LE(UHCI_TD_IOC); 2149 2150 #ifdef USB_DEBUG 2151 if (uhcidebug > 10) { 2152 DPRINTF(("uhci_device_intr_done: xfer(1)\n")); 2153 uhci_dump_tds(xfer); 2154 uhci_dump_qh(upipe->u.intr.qhs[0]); 2155 } 2156 #endif 2157 2158 ii->stdstart = xfer; 2159 ii->stdend = xferend; 2160 #ifdef DIAGNOSTIC 2161 ii->isdone = 0; 2162 #endif 2163 for (i = 0; i < npoll; i++) { 2164 sqh = upipe->u.intr.qhs[i]; 2165 sqh->elink = xfer; 2166 sqh->qh.qh_elink = LE(xfer->physaddr); 2167 } 2168 } else { 2169 usb_freemem(sc->sc_dmatag, dma); 2170 ii->stdstart = 0; /* mark as inactive */ 2171 } 2172 } 2173 2174 /* Deallocate request data structures */ 2175 void 2176 uhci_device_ctrl_done(reqh) 2177 usbd_request_handle reqh; 2178 { 2179 uhci_intr_info_t *ii = reqh->hcpriv; 2180 uhci_softc_t *sc = ii->sc; 2181 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 2182 u_int len = upipe->u.ctl.length; 2183 usb_dma_t *dma; 2184 2185 #ifdef DIAGNOSTIC 2186 if (!(reqh->rqflags & URQ_REQUEST)) 2187 panic("uhci_ctrl_done: not a request\n"); 2188 #endif 2189 2190 LIST_REMOVE(ii, list); /* remove from active list */ 2191 2192 uhci_remove_ctrl(sc, upipe->u.ctl.sqh); 2193 2194 if (len != 0) { 2195 dma = &upipe->u.ctl.datadma; 2196 if (reqh->request.bmRequestType & UT_READ) 2197 memcpy(reqh->buffer, KERNADDR(dma), len); 2198 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 2199 usb_freemem(sc->sc_dmatag, dma); 2200 } 2201 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen)); 2202 } 2203 2204 /* Deallocate request data structures */ 2205 void 2206 uhci_device_bulk_done(reqh) 2207 usbd_request_handle reqh; 2208 { 2209 uhci_intr_info_t *ii = reqh->hcpriv; 2210 uhci_softc_t *sc = ii->sc; 2211 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 2212 u_int datalen = upipe->u.bulk.length; 2213 usb_dma_t *dma; 2214 2215 LIST_REMOVE(ii, list); /* remove from active list */ 2216 2217 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2218 2219 /* copy the data from dma memory to userland storage */ 2220 dma = &upipe->u.bulk.datadma; 2221 if (upipe->u.bulk.isread) 2222 memcpy(reqh->buffer, KERNADDR(dma), datalen); 2223 uhci_free_std_chain(sc, ii->stdstart, 0); 2224 usb_freemem(sc->sc_dmatag, dma); 2225 2226 DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen)); 2227 } 2228 2229 /* Add interrupt QH, called with vflock. */ 2230 void 2231 uhci_add_intr(sc, n, sqh) 2232 uhci_softc_t *sc; 2233 int n; 2234 uhci_soft_qh_t *sqh; 2235 { 2236 struct uhci_vframe *vf = &sc->sc_vframes[n]; 2237 uhci_soft_qh_t *eqh; 2238 2239 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh)); 2240 eqh = vf->eqh; 2241 sqh->hlink = eqh->hlink; 2242 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2243 eqh->hlink = sqh; 2244 eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q); 2245 vf->eqh = sqh; 2246 vf->bandwidth++; 2247 } 2248 2249 /* Remove interrupt QH, called with vflock. */ 2250 void 2251 uhci_remove_intr(sc, n, sqh) 2252 uhci_softc_t *sc; 2253 int n; 2254 uhci_soft_qh_t *sqh; 2255 { 2256 struct uhci_vframe *vf = &sc->sc_vframes[n]; 2257 uhci_soft_qh_t *pqh; 2258 2259 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh)); 2260 2261 for (pqh = vf->hqh; pqh->hlink != sqh; pqh = pqh->hlink) 2262 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 2263 if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) { 2264 DPRINTF(("uhci_remove_intr: QH not found\n")); 2265 return; 2266 } 2267 #else 2268 ; 2269 #endif 2270 pqh->hlink = sqh->hlink; 2271 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2272 if (vf->eqh == sqh) 2273 vf->eqh = pqh; 2274 vf->bandwidth--; 2275 } 2276 2277 usbd_status 2278 uhci_device_setintr(sc, upipe, ival) 2279 uhci_softc_t *sc; 2280 struct uhci_pipe *upipe; 2281 int ival; 2282 { 2283 uhci_soft_qh_t *sqh; 2284 int i, npoll, s; 2285 u_int bestbw, bw, bestoffs, offs; 2286 2287 DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe)); 2288 if (ival == 0) { 2289 printf("uhci_setintr: 0 interval\n"); 2290 return (USBD_INVAL); 2291 } 2292 2293 if (ival > UHCI_VFRAMELIST_COUNT) 2294 ival = UHCI_VFRAMELIST_COUNT; 2295 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2296 DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2297 2298 upipe->u.intr.npoll = npoll; 2299 upipe->u.intr.qhs = 2300 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 2301 2302 /* 2303 * Figure out which offset in the schedule that has most 2304 * bandwidth left over. 2305 */ 2306 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2307 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2308 for (bw = i = 0; i < npoll; i++) 2309 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2310 if (bw < bestbw) { 2311 bestbw = bw; 2312 bestoffs = offs; 2313 } 2314 } 2315 DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2316 2317 upipe->iinfo->stdstart = 0; 2318 for(i = 0; i < npoll; i++) { 2319 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2320 sqh->elink = 0; 2321 sqh->qh.qh_elink = LE(UHCI_PTR_T); 2322 sqh->pos = MOD(i * ival + bestoffs); 2323 sqh->intr_info = upipe->iinfo; 2324 } 2325 #undef MOD 2326 2327 s = splusb(); 2328 LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list); 2329 splx(s); 2330 2331 uhci_lock_frames(sc); 2332 /* Enter QHs into the controller data structures. */ 2333 for(i = 0; i < npoll; i++) 2334 uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos, 2335 upipe->u.intr.qhs[i]); 2336 uhci_unlock_frames(sc); 2337 2338 DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe)); 2339 return (USBD_NORMAL_COMPLETION); 2340 } 2341 2342 /* Open a new pipe. */ 2343 usbd_status 2344 uhci_open(pipe) 2345 usbd_pipe_handle pipe; 2346 { 2347 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2348 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2349 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2350 usbd_status r; 2351 2352 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2353 pipe, pipe->device->address, 2354 ed->bEndpointAddress, sc->sc_addr)); 2355 if (pipe->device->address == sc->sc_addr) { 2356 switch (ed->bEndpointAddress) { 2357 case USB_CONTROL_ENDPOINT: 2358 pipe->methods = &uhci_root_ctrl_methods; 2359 break; 2360 case UE_DIR_IN | UHCI_INTR_ENDPT: 2361 pipe->methods = &uhci_root_intr_methods; 2362 break; 2363 default: 2364 return (USBD_INVAL); 2365 } 2366 } else { 2367 upipe->iinfo = uhci_alloc_intr_info(sc); 2368 if (upipe->iinfo == 0) 2369 return (USBD_NOMEM); 2370 switch (ed->bmAttributes & UE_XFERTYPE) { 2371 case UE_CONTROL: 2372 pipe->methods = &uhci_device_ctrl_methods; 2373 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2374 if (upipe->u.ctl.sqh == 0) 2375 goto bad; 2376 upipe->u.ctl.setup = uhci_alloc_std(sc); 2377 if (upipe->u.ctl.setup == 0) { 2378 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2379 goto bad; 2380 } 2381 upipe->u.ctl.stat = uhci_alloc_std(sc); 2382 if (upipe->u.ctl.stat == 0) { 2383 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2384 uhci_free_std(sc, upipe->u.ctl.setup); 2385 goto bad; 2386 } 2387 r = usb_allocmem(sc->sc_dmatag, 2388 sizeof(usb_device_request_t), 2389 0, &upipe->u.ctl.reqdma); 2390 if (r != USBD_NORMAL_COMPLETION) { 2391 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2392 uhci_free_std(sc, upipe->u.ctl.setup); 2393 uhci_free_std(sc, upipe->u.ctl.stat); 2394 goto bad; 2395 } 2396 break; 2397 case UE_INTERRUPT: 2398 pipe->methods = &uhci_device_intr_methods; 2399 return (uhci_device_setintr(sc, upipe, ed->bInterval)); 2400 case UE_ISOCHRONOUS: 2401 pipe->methods = &uhci_device_isoc_methods; 2402 return (uhci_setup_isoc(pipe)); 2403 case UE_BULK: 2404 pipe->methods = &uhci_device_bulk_methods; 2405 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2406 if (upipe->u.bulk.sqh == 0) 2407 goto bad; 2408 break; 2409 } 2410 } 2411 return (USBD_NORMAL_COMPLETION); 2412 2413 bad: 2414 uhci_free_intr_info(upipe->iinfo); 2415 return (USBD_NOMEM); 2416 } 2417 2418 /* 2419 * Data structures and routines to emulate the root hub. 2420 */ 2421 usb_device_descriptor_t uhci_devd = { 2422 USB_DEVICE_DESCRIPTOR_SIZE, 2423 UDESC_DEVICE, /* type */ 2424 {0x00, 0x01}, /* USB version */ 2425 UCLASS_HUB, /* class */ 2426 USUBCLASS_HUB, /* subclass */ 2427 0, /* protocol */ 2428 64, /* max packet */ 2429 {0},{0},{0x00,0x01}, /* device id */ 2430 1,2,0, /* string indicies */ 2431 1 /* # of configurations */ 2432 }; 2433 2434 usb_config_descriptor_t uhci_confd = { 2435 USB_CONFIG_DESCRIPTOR_SIZE, 2436 UDESC_CONFIG, 2437 {USB_CONFIG_DESCRIPTOR_SIZE + 2438 USB_INTERFACE_DESCRIPTOR_SIZE + 2439 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2440 1, 2441 1, 2442 0, 2443 UC_SELF_POWERED, 2444 0 /* max power */ 2445 }; 2446 2447 usb_interface_descriptor_t uhci_ifcd = { 2448 USB_INTERFACE_DESCRIPTOR_SIZE, 2449 UDESC_INTERFACE, 2450 0, 2451 0, 2452 1, 2453 UCLASS_HUB, 2454 USUBCLASS_HUB, 2455 0, 2456 0 2457 }; 2458 2459 usb_endpoint_descriptor_t uhci_endpd = { 2460 USB_ENDPOINT_DESCRIPTOR_SIZE, 2461 UDESC_ENDPOINT, 2462 UE_DIR_IN | UHCI_INTR_ENDPT, 2463 UE_INTERRUPT, 2464 {8}, 2465 255 2466 }; 2467 2468 usb_hub_descriptor_t uhci_hubd_piix = { 2469 USB_HUB_DESCRIPTOR_SIZE, 2470 UDESC_HUB, 2471 2, 2472 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 2473 50, /* power on to power good */ 2474 0, 2475 { 0x00 }, /* both ports are removable */ 2476 }; 2477 2478 int 2479 uhci_str(p, l, s) 2480 usb_string_descriptor_t *p; 2481 int l; 2482 char *s; 2483 { 2484 int i; 2485 2486 if (l == 0) 2487 return (0); 2488 p->bLength = 2 * strlen(s) + 2; 2489 if (l == 1) 2490 return (1); 2491 p->bDescriptorType = UDESC_STRING; 2492 l -= 2; 2493 for (i = 0; s[i] && l > 1; i++, l -= 2) 2494 USETW2(p->bString[i], 0, s[i]); 2495 return (2*i+2); 2496 } 2497 2498 /* 2499 * Simulate a hardware hub by handling all the necessary requests. 2500 */ 2501 usbd_status 2502 uhci_root_ctrl_transfer(reqh) 2503 usbd_request_handle reqh; 2504 { 2505 int s; 2506 usbd_status r; 2507 2508 s = splusb(); 2509 r = usb_insert_transfer(reqh); 2510 splx(s); 2511 if (r != USBD_NORMAL_COMPLETION) 2512 return (r); 2513 else 2514 return (uhci_root_ctrl_start(reqh)); 2515 } 2516 2517 usbd_status 2518 uhci_root_ctrl_start(reqh) 2519 usbd_request_handle reqh; 2520 { 2521 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 2522 usb_device_request_t *req; 2523 void *buf; 2524 int port, x; 2525 int len, value, index, status, change, l, totlen = 0; 2526 usb_port_status_t ps; 2527 usbd_status r; 2528 2529 #ifdef DIAGNOSTIC 2530 if (!(reqh->rqflags & URQ_REQUEST)) 2531 panic("uhci_root_ctrl_transfer: not a request\n"); 2532 #endif 2533 req = &reqh->request; 2534 buf = reqh->buffer; 2535 2536 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 2537 req->bmRequestType, req->bRequest)); 2538 2539 len = UGETW(req->wLength); 2540 value = UGETW(req->wValue); 2541 index = UGETW(req->wIndex); 2542 #define C(x,y) ((x) | ((y) << 8)) 2543 switch(C(req->bRequest, req->bmRequestType)) { 2544 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2545 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2546 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2547 /* 2548 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2549 * for the integrated root hub. 2550 */ 2551 break; 2552 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2553 if (len > 0) { 2554 *(u_int8_t *)buf = sc->sc_conf; 2555 totlen = 1; 2556 } 2557 break; 2558 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2559 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 2560 switch(value >> 8) { 2561 case UDESC_DEVICE: 2562 if ((value & 0xff) != 0) { 2563 r = USBD_IOERROR; 2564 goto ret; 2565 } 2566 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2567 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 2568 memcpy(buf, &uhci_devd, l); 2569 break; 2570 case UDESC_CONFIG: 2571 if ((value & 0xff) != 0) { 2572 r = USBD_IOERROR; 2573 goto ret; 2574 } 2575 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2576 memcpy(buf, &uhci_confd, l); 2577 buf = (char *)buf + l; 2578 len -= l; 2579 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2580 totlen += l; 2581 memcpy(buf, &uhci_ifcd, l); 2582 buf = (char *)buf + l; 2583 len -= l; 2584 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2585 totlen += l; 2586 memcpy(buf, &uhci_endpd, l); 2587 break; 2588 case UDESC_STRING: 2589 if (len == 0) 2590 break; 2591 *(u_int8_t *)buf = 0; 2592 totlen = 1; 2593 switch (value & 0xff) { 2594 case 1: /* Vendor */ 2595 totlen = uhci_str(buf, len, sc->sc_vendor); 2596 break; 2597 case 2: /* Product */ 2598 totlen = uhci_str(buf, len, "UHCI root hub"); 2599 break; 2600 } 2601 break; 2602 default: 2603 r = USBD_IOERROR; 2604 goto ret; 2605 } 2606 break; 2607 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2608 if (len > 0) { 2609 *(u_int8_t *)buf = 0; 2610 totlen = 1; 2611 } 2612 break; 2613 case C(UR_GET_STATUS, UT_READ_DEVICE): 2614 if (len > 1) { 2615 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2616 totlen = 2; 2617 } 2618 break; 2619 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2620 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2621 if (len > 1) { 2622 USETW(((usb_status_t *)buf)->wStatus, 0); 2623 totlen = 2; 2624 } 2625 break; 2626 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2627 if (value >= USB_MAX_DEVICES) { 2628 r = USBD_IOERROR; 2629 goto ret; 2630 } 2631 sc->sc_addr = value; 2632 break; 2633 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2634 if (value != 0 && value != 1) { 2635 r = USBD_IOERROR; 2636 goto ret; 2637 } 2638 sc->sc_conf = value; 2639 break; 2640 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2641 break; 2642 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2643 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2644 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2645 r = USBD_IOERROR; 2646 goto ret; 2647 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2648 break; 2649 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2650 break; 2651 /* Hub requests */ 2652 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2653 break; 2654 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2655 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2656 "port=%d feature=%d\n", 2657 index, value)); 2658 if (index == 1) 2659 port = UHCI_PORTSC1; 2660 else if (index == 2) 2661 port = UHCI_PORTSC2; 2662 else { 2663 r = USBD_IOERROR; 2664 goto ret; 2665 } 2666 switch(value) { 2667 case UHF_PORT_ENABLE: 2668 x = UREAD2(sc, port); 2669 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 2670 break; 2671 case UHF_PORT_SUSPEND: 2672 x = UREAD2(sc, port); 2673 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 2674 break; 2675 case UHF_PORT_RESET: 2676 x = UREAD2(sc, port); 2677 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2678 break; 2679 case UHF_C_PORT_CONNECTION: 2680 x = UREAD2(sc, port); 2681 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 2682 break; 2683 case UHF_C_PORT_ENABLE: 2684 x = UREAD2(sc, port); 2685 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 2686 break; 2687 case UHF_C_PORT_OVER_CURRENT: 2688 x = UREAD2(sc, port); 2689 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 2690 break; 2691 case UHF_C_PORT_RESET: 2692 sc->sc_isreset = 0; 2693 r = USBD_NORMAL_COMPLETION; 2694 goto ret; 2695 case UHF_PORT_CONNECTION: 2696 case UHF_PORT_OVER_CURRENT: 2697 case UHF_PORT_POWER: 2698 case UHF_PORT_LOW_SPEED: 2699 case UHF_C_PORT_SUSPEND: 2700 default: 2701 r = USBD_IOERROR; 2702 goto ret; 2703 } 2704 break; 2705 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 2706 if (index == 1) 2707 port = UHCI_PORTSC1; 2708 else if (index == 2) 2709 port = UHCI_PORTSC2; 2710 else { 2711 r = USBD_IOERROR; 2712 goto ret; 2713 } 2714 if (len > 0) { 2715 *(u_int8_t *)buf = 2716 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 2717 UHCI_PORTSC_LS_SHIFT; 2718 totlen = 1; 2719 } 2720 break; 2721 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2722 if (value != 0) { 2723 r = USBD_IOERROR; 2724 goto ret; 2725 } 2726 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 2727 totlen = l; 2728 memcpy(buf, &uhci_hubd_piix, l); 2729 break; 2730 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2731 if (len != 4) { 2732 r = USBD_IOERROR; 2733 goto ret; 2734 } 2735 memset(buf, 0, len); 2736 totlen = len; 2737 break; 2738 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2739 if (index == 1) 2740 port = UHCI_PORTSC1; 2741 else if (index == 2) 2742 port = UHCI_PORTSC2; 2743 else { 2744 r = USBD_IOERROR; 2745 goto ret; 2746 } 2747 if (len != 4) { 2748 r = USBD_IOERROR; 2749 goto ret; 2750 } 2751 x = UREAD2(sc, port); 2752 status = change = 0; 2753 if (x & UHCI_PORTSC_CCS ) 2754 status |= UPS_CURRENT_CONNECT_STATUS; 2755 if (x & UHCI_PORTSC_CSC ) 2756 change |= UPS_C_CONNECT_STATUS; 2757 if (x & UHCI_PORTSC_PE ) 2758 status |= UPS_PORT_ENABLED; 2759 if (x & UHCI_PORTSC_POEDC) 2760 change |= UPS_C_PORT_ENABLED; 2761 if (x & UHCI_PORTSC_OCI ) 2762 status |= UPS_OVERCURRENT_INDICATOR; 2763 if (x & UHCI_PORTSC_OCIC ) 2764 change |= UPS_C_OVERCURRENT_INDICATOR; 2765 if (x & UHCI_PORTSC_SUSP ) 2766 status |= UPS_SUSPEND; 2767 if (x & UHCI_PORTSC_LSDA ) 2768 status |= UPS_LOW_SPEED; 2769 status |= UPS_PORT_POWER; 2770 if (sc->sc_isreset) 2771 change |= UPS_C_PORT_RESET; 2772 USETW(ps.wPortStatus, status); 2773 USETW(ps.wPortChange, change); 2774 l = min(len, sizeof ps); 2775 memcpy(buf, &ps, l); 2776 totlen = l; 2777 break; 2778 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2779 r = USBD_IOERROR; 2780 goto ret; 2781 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2782 break; 2783 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2784 if (index == 1) 2785 port = UHCI_PORTSC1; 2786 else if (index == 2) 2787 port = UHCI_PORTSC2; 2788 else { 2789 r = USBD_IOERROR; 2790 goto ret; 2791 } 2792 switch(value) { 2793 case UHF_PORT_ENABLE: 2794 x = UREAD2(sc, port); 2795 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2796 break; 2797 case UHF_PORT_SUSPEND: 2798 x = UREAD2(sc, port); 2799 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 2800 break; 2801 case UHF_PORT_RESET: 2802 x = UREAD2(sc, port); 2803 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2804 usb_delay_ms(&sc->sc_bus, 10); 2805 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2806 delay(100); 2807 x = UREAD2(sc, port); 2808 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2809 delay(100); 2810 DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n", 2811 index, UREAD2(sc, port))); 2812 sc->sc_isreset = 1; 2813 break; 2814 case UHF_C_PORT_CONNECTION: 2815 case UHF_C_PORT_ENABLE: 2816 case UHF_C_PORT_OVER_CURRENT: 2817 case UHF_PORT_CONNECTION: 2818 case UHF_PORT_OVER_CURRENT: 2819 case UHF_PORT_POWER: 2820 case UHF_PORT_LOW_SPEED: 2821 case UHF_C_PORT_SUSPEND: 2822 case UHF_C_PORT_RESET: 2823 default: 2824 r = USBD_IOERROR; 2825 goto ret; 2826 } 2827 break; 2828 default: 2829 r = USBD_IOERROR; 2830 goto ret; 2831 } 2832 reqh->actlen = totlen; 2833 r = USBD_NORMAL_COMPLETION; 2834 ret: 2835 reqh->status = r; 2836 reqh->hcpriv = 0; 2837 usb_transfer_complete(reqh); 2838 return (USBD_IN_PROGRESS); 2839 } 2840 2841 /* Abort a root control request. */ 2842 void 2843 uhci_root_ctrl_abort(reqh) 2844 usbd_request_handle reqh; 2845 { 2846 /* Nothing to do, all transfers are syncronous. */ 2847 } 2848 2849 /* Close the root pipe. */ 2850 void 2851 uhci_root_ctrl_close(pipe) 2852 usbd_pipe_handle pipe; 2853 { 2854 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2855 2856 sc->sc_has_timo = 0; 2857 DPRINTF(("uhci_root_ctrl_close\n")); 2858 } 2859 2860 /* Abort a root interrupt request. */ 2861 void 2862 uhci_root_intr_abort(reqh) 2863 usbd_request_handle reqh; 2864 { 2865 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 2866 2867 usb_untimeout(uhci_timo, reqh, reqh->timo_handle); 2868 sc->sc_has_timo = 0; 2869 } 2870 2871 usbd_status 2872 uhci_root_intr_transfer(reqh) 2873 usbd_request_handle reqh; 2874 { 2875 int s; 2876 usbd_status r; 2877 2878 s = splusb(); 2879 r = usb_insert_transfer(reqh); 2880 splx(s); 2881 if (r != USBD_NORMAL_COMPLETION) 2882 return (r); 2883 else 2884 return (uhci_root_intr_start(reqh)); 2885 } 2886 2887 /* Start a transfer on the root interrupt pipe */ 2888 usbd_status 2889 uhci_root_intr_start(reqh) 2890 usbd_request_handle reqh; 2891 { 2892 usbd_pipe_handle pipe = reqh->pipe; 2893 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2894 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2895 usb_dma_t *dmap; 2896 usbd_status r; 2897 int len; 2898 2899 DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d " 2900 "flags=%d\n", 2901 reqh, reqh->buffer, reqh->length, reqh->flags)); 2902 2903 len = reqh->length; 2904 dmap = &upipe->u.intr.datadma; 2905 if (len == 0) 2906 return (USBD_INVAL); /* XXX should it be? */ 2907 2908 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2909 if (r != USBD_NORMAL_COMPLETION) 2910 return (r); 2911 2912 sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval); 2913 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle); 2914 sc->sc_has_timo = reqh; 2915 return (USBD_IN_PROGRESS); 2916 } 2917 2918 /* Close the root interrupt pipe. */ 2919 void 2920 uhci_root_intr_close(pipe) 2921 usbd_pipe_handle pipe; 2922 { 2923 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2924 2925 usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle); 2926 sc->sc_has_timo = 0; 2927 DPRINTF(("uhci_root_intr_close\n")); 2928 } 2929 2930
Indexes created Tue Sep 30 20:09:53 GMT 2025