uhci.c revision 1.59
1 /* $NetBSD: uhci.c,v 1.59 1999/10/13 08:10:56 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Universal Host Controller driver. 42 * Handles e.g. PIIX3 and PIIX4. 43 * 44 * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 45 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 46 * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf 47 * USB spec: http://www.usb.org/developers/data/usb11.pdf 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/device.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #endif 60 #include <sys/proc.h> 61 #include <sys/queue.h> 62 #include <sys/select.h> 63 64 #if defined(__FreeBSD__) 65 #include <machine/bus_pio.h> 66 #endif 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/uhcireg.h> 77 #include <dev/usb/uhcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 86 87 #if defined(__OpenBSD__) 88 struct cfdriver uhci_cd = { 89 NULL, "uhci", DV_DULL 90 }; 91 #endif 92 93 #ifdef USB_DEBUG 94 #define DPRINTF(x) if (uhcidebug) printf x 95 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 96 extern int uhcidebug; 97 #else 98 #define DPRINTF(x) 99 #define DPRINTFN(n,x) 100 #endif 101 102 /* 103 * The UHCI controller is little endian, so on big endian machines 104 * the data strored in memory needs to be swapped. 105 */ 106 #if BYTE_ORDER == BIG_ENDIAN 107 #define LE(x) (bswap32(x)) 108 #else 109 #define LE(x) (x) 110 #endif 111 112 struct uhci_pipe { 113 struct usbd_pipe pipe; 114 uhci_intr_info_t *iinfo; 115 int nexttoggle; 116 /* Info needed for different pipe kinds. */ 117 union { 118 /* Control pipe */ 119 struct { 120 uhci_soft_qh_t *sqh; 121 usb_dma_t reqdma; 122 uhci_soft_td_t *setup, *stat; 123 u_int length; 124 } ctl; 125 /* Interrupt pipe */ 126 struct { 127 int npoll; 128 uhci_soft_qh_t **qhs; 129 } intr; 130 /* Bulk pipe */ 131 struct { 132 uhci_soft_qh_t *sqh; 133 u_int length; 134 int isread; 135 } bulk; 136 /* Iso pipe */ 137 struct iso { 138 uhci_soft_td_t **stds; 139 int next, inuse; 140 } iso; 141 } u; 142 }; 143 144 /* 145 * The uhci_intr_info free list can be global since they contain 146 * no dma specific data. The other free lists do. 147 */ 148 LIST_HEAD(, uhci_intr_info) uhci_ii_free; 149 150 void uhci_busreset __P((uhci_softc_t *)); 151 void uhci_power __P((int, void *)); 152 usbd_status uhci_run __P((uhci_softc_t *, int run)); 153 uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *)); 154 void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *)); 155 uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *)); 156 void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *)); 157 uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *)); 158 void uhci_free_intr_info __P((uhci_intr_info_t *ii)); 159 #if 0 160 void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *, 161 uhci_intr_info_t *)); 162 void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *)); 163 #endif 164 165 void uhci_free_std_chain __P((uhci_softc_t *, 166 uhci_soft_td_t *, uhci_soft_td_t *)); 167 usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *, 168 int, int, int, usb_dma_t *, 169 uhci_soft_td_t **, 170 uhci_soft_td_t **)); 171 void uhci_timo __P((void *)); 172 void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle)); 173 void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *)); 174 void uhci_idone __P((uhci_intr_info_t *)); 175 void uhci_abort_req __P((usbd_request_handle, usbd_status status)); 176 void uhci_abort_req_end __P((void *v)); 177 void uhci_timeout __P((void *)); 178 void uhci_wakeup_ctrl __P((void *, int, int, void *, int)); 179 void uhci_lock_frames __P((uhci_softc_t *)); 180 void uhci_unlock_frames __P((uhci_softc_t *)); 181 void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 182 void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 183 void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 184 void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 185 int uhci_str __P((usb_string_descriptor_t *, int, char *)); 186 usbd_status uhci_setup_isoc __P((usbd_pipe_handle pipe)); 187 void uhci_device_isoc_enter __P((usbd_request_handle)); 188 189 void uhci_wakeup_cb __P((usbd_request_handle reqh)); 190 191 usbd_status uhci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t)); 192 void uhci_freem __P((struct usbd_bus *, usb_dma_t *)); 193 194 usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle)); 195 usbd_status uhci_device_ctrl_start __P((usbd_request_handle)); 196 void uhci_device_ctrl_abort __P((usbd_request_handle)); 197 void uhci_device_ctrl_close __P((usbd_pipe_handle)); 198 void uhci_device_ctrl_done __P((usbd_request_handle)); 199 200 usbd_status uhci_device_intr_transfer __P((usbd_request_handle)); 201 usbd_status uhci_device_intr_start __P((usbd_request_handle)); 202 void uhci_device_intr_abort __P((usbd_request_handle)); 203 void uhci_device_intr_close __P((usbd_pipe_handle)); 204 void uhci_device_intr_done __P((usbd_request_handle)); 205 206 usbd_status uhci_device_bulk_transfer __P((usbd_request_handle)); 207 usbd_status uhci_device_bulk_start __P((usbd_request_handle)); 208 void uhci_device_bulk_abort __P((usbd_request_handle)); 209 void uhci_device_bulk_close __P((usbd_pipe_handle)); 210 void uhci_device_bulk_done __P((usbd_request_handle)); 211 212 usbd_status uhci_device_isoc_transfer __P((usbd_request_handle)); 213 usbd_status uhci_device_isoc_start __P((usbd_request_handle)); 214 void uhci_device_isoc_abort __P((usbd_request_handle)); 215 void uhci_device_isoc_close __P((usbd_pipe_handle)); 216 void uhci_device_isoc_done __P((usbd_request_handle)); 217 218 usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle)); 219 usbd_status uhci_root_ctrl_start __P((usbd_request_handle)); 220 void uhci_root_ctrl_abort __P((usbd_request_handle)); 221 void uhci_root_ctrl_close __P((usbd_pipe_handle)); 222 223 usbd_status uhci_root_intr_transfer __P((usbd_request_handle)); 224 usbd_status uhci_root_intr_start __P((usbd_request_handle)); 225 void uhci_root_intr_abort __P((usbd_request_handle)); 226 void uhci_root_intr_close __P((usbd_pipe_handle)); 227 void uhci_root_intr_done __P((usbd_request_handle)); 228 229 usbd_status uhci_open __P((usbd_pipe_handle)); 230 void uhci_poll __P((struct usbd_bus *)); 231 232 usbd_status uhci_device_request __P((usbd_request_handle reqh)); 233 234 void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 235 void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 236 usbd_status uhci_device_setintr __P((uhci_softc_t *sc, 237 struct uhci_pipe *pipe, int ival)); 238 239 void uhci_device_clear_toggle __P((usbd_pipe_handle pipe)); 240 void uhci_noop __P((usbd_pipe_handle pipe)); 241 242 #ifdef UHCI_DEBUG 243 static void uhci_dumpregs __P((uhci_softc_t *)); 244 void uhci_dump_tds __P((uhci_soft_td_t *)); 245 void uhci_dump_qh __P((uhci_soft_qh_t *)); 246 void uhci_dump __P((void)); 247 void uhci_dump_td __P((uhci_soft_td_t *)); 248 #endif 249 250 #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)) 251 #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 252 #define UREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r)) 253 #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 254 #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 255 256 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 257 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 258 259 #define UHCI_RESET_TIMEOUT 100 /* reset timeout */ 260 261 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 262 263 #define UHCI_INTR_ENDPT 1 264 265 struct usbd_bus_methods uhci_bus_methods = { 266 uhci_open, 267 uhci_poll, 268 uhci_allocm, 269 uhci_freem, 270 }; 271 272 struct usbd_pipe_methods uhci_root_ctrl_methods = { 273 uhci_root_ctrl_transfer, 274 uhci_root_ctrl_start, 275 uhci_root_ctrl_abort, 276 uhci_root_ctrl_close, 277 uhci_noop, 278 0, 279 }; 280 281 struct usbd_pipe_methods uhci_root_intr_methods = { 282 uhci_root_intr_transfer, 283 uhci_root_intr_start, 284 uhci_root_intr_abort, 285 uhci_root_intr_close, 286 uhci_noop, 287 uhci_root_intr_done, 288 }; 289 290 struct usbd_pipe_methods uhci_device_ctrl_methods = { 291 uhci_device_ctrl_transfer, 292 uhci_device_ctrl_start, 293 uhci_device_ctrl_abort, 294 uhci_device_ctrl_close, 295 uhci_noop, 296 uhci_device_ctrl_done, 297 }; 298 299 struct usbd_pipe_methods uhci_device_intr_methods = { 300 uhci_device_intr_transfer, 301 uhci_device_intr_start, 302 uhci_device_intr_abort, 303 uhci_device_intr_close, 304 uhci_device_clear_toggle, 305 uhci_device_intr_done, 306 }; 307 308 struct usbd_pipe_methods uhci_device_bulk_methods = { 309 uhci_device_bulk_transfer, 310 uhci_device_bulk_start, 311 uhci_device_bulk_abort, 312 uhci_device_bulk_close, 313 uhci_device_clear_toggle, 314 uhci_device_bulk_done, 315 }; 316 317 struct usbd_pipe_methods uhci_device_isoc_methods = { 318 uhci_device_isoc_transfer, 319 uhci_device_isoc_start, 320 uhci_device_isoc_abort, 321 uhci_device_isoc_close, 322 uhci_noop, 323 uhci_device_isoc_done, 324 }; 325 326 void 327 uhci_busreset(sc) 328 uhci_softc_t *sc; 329 { 330 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 331 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 332 UHCICMD(sc, 0); /* do nothing */ 333 } 334 335 usbd_status 336 uhci_init(sc) 337 uhci_softc_t *sc; 338 { 339 usbd_status r; 340 int i, j; 341 uhci_soft_qh_t *csqh, *bsqh, *sqh; 342 uhci_soft_td_t *std; 343 344 DPRINTFN(1,("uhci_init: start\n")); 345 346 #if defined(UHCI_DEBUG) 347 if (uhcidebug > 2) 348 uhci_dumpregs(sc); 349 #endif 350 351 uhci_run(sc, 0); /* stop the controller */ 352 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 353 354 uhci_busreset(sc); 355 356 /* Allocate and initialize real frame array. */ 357 r = usb_allocmem(&sc->sc_bus, 358 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 359 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 360 if (r != USBD_NORMAL_COMPLETION) 361 return (r); 362 sc->sc_pframes = KERNADDR(&sc->sc_dma); 363 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 364 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma)); /* set frame list*/ 365 366 /* Allocate the dummy QH where bulk traffic will be queued. */ 367 bsqh = uhci_alloc_sqh(sc); 368 if (!bsqh) 369 return (USBD_NOMEM); 370 bsqh->qh.qh_hlink = LE(UHCI_PTR_T); /* end of QH chain */ 371 bsqh->qh.qh_elink = LE(UHCI_PTR_T); 372 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 373 374 /* Allocate the dummy QH where control traffic will be queued. */ 375 csqh = uhci_alloc_sqh(sc); 376 if (!csqh) 377 return (USBD_NOMEM); 378 csqh->hlink = bsqh; 379 csqh->qh.qh_hlink = LE(bsqh->physaddr | UHCI_PTR_Q); 380 csqh->qh.qh_elink = LE(UHCI_PTR_T); 381 sc->sc_ctl_start = sc->sc_ctl_end = csqh; 382 383 /* 384 * Make all (virtual) frame list pointers point to the interrupt 385 * queue heads and the interrupt queue heads at the control 386 * queue head and point the physical frame list to the virtual. 387 */ 388 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 389 std = uhci_alloc_std(sc); 390 sqh = uhci_alloc_sqh(sc); 391 if (!std || !sqh) 392 return (USBD_NOMEM); 393 std->link.sqh = sqh; 394 std->td.td_link = LE(sqh->physaddr | UHCI_PTR_Q); 395 std->td.td_status = LE(UHCI_TD_IOS); /* iso, inactive */ 396 std->td.td_token = LE(0); 397 std->td.td_buffer = LE(0); 398 sqh->hlink = csqh; 399 sqh->qh.qh_hlink = LE(csqh->physaddr | UHCI_PTR_Q); 400 sqh->elink = 0; 401 sqh->qh.qh_elink = LE(UHCI_PTR_T); 402 sc->sc_vframes[i].htd = std; 403 sc->sc_vframes[i].etd = std; 404 sc->sc_vframes[i].hqh = sqh; 405 sc->sc_vframes[i].eqh = sqh; 406 for (j = i; 407 j < UHCI_FRAMELIST_COUNT; 408 j += UHCI_VFRAMELIST_COUNT) 409 sc->sc_pframes[j] = LE(std->physaddr); 410 } 411 412 LIST_INIT(&sc->sc_intrhead); 413 414 /* Set up the bus struct. */ 415 sc->sc_bus.methods = &uhci_bus_methods; 416 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 417 418 sc->sc_suspend = PWR_RESUME; 419 sc->sc_powerhook = powerhook_establish(uhci_power, sc); 420 421 DPRINTFN(1,("uhci_init: enabling\n")); 422 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 423 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 424 425 return (uhci_run(sc, 1)); /* and here we go... */ 426 } 427 428 int 429 uhci_activate(self, act) 430 device_ptr_t self; 431 enum devact act; 432 { 433 struct uhci_softc *sc = (struct uhci_softc *)self; 434 int rv = 0; 435 436 switch (act) { 437 case DVACT_ACTIVATE: 438 return (EOPNOTSUPP); 439 break; 440 441 case DVACT_DEACTIVATE: 442 if (sc->sc_child != NULL) 443 rv = config_deactivate(sc->sc_child); 444 break; 445 } 446 return (rv); 447 } 448 449 int 450 uhci_detach(sc, flags) 451 struct uhci_softc *sc; 452 int flags; 453 { 454 int rv = 0; 455 456 if (sc->sc_child != NULL) 457 rv = config_detach(sc->sc_child, flags); 458 459 if (rv != 0) 460 return (rv); 461 462 powerhook_disestablish(sc->sc_powerhook); 463 /* free data structures XXX */ 464 465 return (rv); 466 } 467 468 usbd_status 469 uhci_allocm(bus, dma, size) 470 struct usbd_bus *bus; 471 usb_dma_t *dma; 472 u_int32_t size; 473 { 474 #if defined(__NetBSD__) || defined(__OpenBSD__) 475 struct uhci_softc *sc = (struct uhci_softc *)bus; 476 #endif 477 478 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 479 } 480 481 void 482 uhci_freem(bus, dma) 483 struct usbd_bus *bus; 484 usb_dma_t *dma; 485 { 486 #if defined(__NetBSD__) || defined(__OpenBSD__) 487 struct uhci_softc *sc = (struct uhci_softc *)bus; 488 #endif 489 490 usb_freemem(&sc->sc_bus, dma); 491 } 492 493 #if defined(__NetBSD__) 494 /* 495 * Handle suspend/resume. 496 * 497 * We need to switch to polling mode here, because this routine is 498 * called from an intterupt context. This is all right since we 499 * are almost suspended anyway. 500 */ 501 void 502 uhci_power(why, v) 503 int why; 504 void *v; 505 { 506 uhci_softc_t *sc = v; 507 int cmd; 508 int s; 509 510 s = splusb(); 511 cmd = UREAD2(sc, UHCI_CMD); 512 513 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n", 514 sc, why, sc->sc_suspend, cmd)); 515 516 if (why != PWR_RESUME) { 517 #if defined(UHCI_DEBUG) 518 if (uhcidebug > 2) 519 uhci_dumpregs(sc); 520 #endif 521 if (sc->sc_has_timo) 522 usb_untimeout(uhci_timo, sc->sc_has_timo, 523 sc->sc_has_timo->timo_handle); 524 sc->sc_bus.use_polling++; 525 uhci_run(sc, 0); /* stop the controller */ 526 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 527 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 528 sc->sc_suspend = why; 529 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 530 } else { 531 /* 532 * XXX We should really do much more here in case the 533 * controller registers have been lost and BIOS has 534 * not restored them. 535 */ 536 sc->sc_suspend = why; 537 if (cmd & UHCI_CMD_RS) 538 uhci_run(sc, 0); /* in case BIOS has started it */ 539 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 540 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 541 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 542 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 543 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 544 uhci_run(sc, 1); /* and start traffic again */ 545 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 546 sc->sc_bus.use_polling--; 547 if (sc->sc_has_timo) 548 usb_timeout(uhci_timo, sc->sc_has_timo, 549 sc->sc_ival, sc->sc_has_timo->timo_handle); 550 #if defined(UHCI_DEBUG) 551 if (uhcidebug > 2) 552 uhci_dumpregs(sc); 553 #endif 554 } 555 splx(s); 556 } 557 #endif /* defined(__NetBSD__) */ 558 559 #ifdef UHCI_DEBUG 560 static void 561 uhci_dumpregs(sc) 562 uhci_softc_t *sc; 563 { 564 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 565 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 566 USBDEVNAME(sc->sc_bus.bdev), 567 UREAD2(sc, UHCI_CMD), 568 UREAD2(sc, UHCI_STS), 569 UREAD2(sc, UHCI_INTR), 570 UREAD2(sc, UHCI_FRNUM), 571 UREAD4(sc, UHCI_FLBASEADDR), 572 UREAD1(sc, UHCI_SOF), 573 UREAD2(sc, UHCI_PORTSC1), 574 UREAD2(sc, UHCI_PORTSC2))); 575 } 576 577 void 578 uhci_dump_td(p) 579 uhci_soft_td_t *p; 580 { 581 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 582 "token=0x%08lx buffer=0x%08lx\n", 583 p, (long)p->physaddr, 584 (long)LE(p->td.td_link), 585 (long)LE(p->td.td_status), 586 (long)LE(p->td.td_token), 587 (long)LE(p->td.td_buffer))); 588 DPRINTFN(-1,(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 589 "D=%d,maxlen=%d\n", 590 (int)LE(p->td.td_link), 591 "\20\1T\2Q\3VF", 592 (int)LE(p->td.td_status), 593 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 594 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 595 UHCI_TD_GET_ERRCNT(LE(p->td.td_status)), 596 UHCI_TD_GET_ACTLEN(LE(p->td.td_status)), 597 UHCI_TD_GET_PID(LE(p->td.td_token)), 598 UHCI_TD_GET_DEVADDR(LE(p->td.td_token)), 599 UHCI_TD_GET_ENDPT(LE(p->td.td_token)), 600 UHCI_TD_GET_DT(LE(p->td.td_token)), 601 UHCI_TD_GET_MAXLEN(LE(p->td.td_token)))); 602 } 603 604 void 605 uhci_dump_qh(p) 606 uhci_soft_qh_t *p; 607 { 608 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, 609 (int)p->physaddr, LE(p->qh.qh_hlink), LE(p->qh.qh_elink))); 610 } 611 612 613 #if 0 614 void 615 uhci_dump() 616 { 617 uhci_softc_t *sc = uhci; 618 619 uhci_dumpregs(sc); 620 printf("intrs=%d\n", sc->sc_bus.no_intrs); 621 printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link); 622 uhci_dump_qh(sc->sc_ctl_start->qh.hlink); 623 } 624 #endif 625 626 void 627 uhci_dump_tds(std) 628 uhci_soft_td_t *std; 629 { 630 uhci_soft_td_t *p; 631 632 for(p = std; p; p = p->link.std) 633 uhci_dump_td(p); 634 } 635 #endif 636 637 /* 638 * This routine is executed periodically and simulates interrupts 639 * from the root controller interrupt pipe for port status change. 640 */ 641 void 642 uhci_timo(addr) 643 void *addr; 644 { 645 usbd_request_handle reqh = addr; 646 usbd_pipe_handle pipe = reqh->pipe; 647 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 648 int s; 649 u_char *p; 650 651 DPRINTFN(15, ("uhci_timo\n")); 652 653 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle); 654 655 p = KERNADDR(&reqh->dmabuf); 656 p[0] = 0; 657 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 658 p[0] |= 1<<1; 659 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 660 p[0] |= 1<<2; 661 if (p[0] == 0) 662 /* No change, try again in a while */ 663 return; 664 665 reqh->actlen = 1; 666 reqh->status = USBD_NORMAL_COMPLETION; 667 s = splusb(); 668 reqh->hcpriv = 0; 669 reqh->device->bus->intr_context++; 670 usb_transfer_complete(reqh); 671 reqh->device->bus->intr_context--; 672 splx(s); 673 } 674 675 void 676 uhci_root_intr_done(reqh) 677 usbd_request_handle reqh; 678 { 679 } 680 681 682 void 683 uhci_lock_frames(sc) 684 uhci_softc_t *sc; 685 { 686 int s = splusb(); 687 while (sc->sc_vflock) { 688 sc->sc_vflock |= UHCI_WANT_LOCK; 689 tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0); 690 } 691 sc->sc_vflock = UHCI_HAS_LOCK; 692 splx(s); 693 } 694 695 void 696 uhci_unlock_frames(sc) 697 uhci_softc_t *sc; 698 { 699 int s = splusb(); 700 sc->sc_vflock &= ~UHCI_HAS_LOCK; 701 if (sc->sc_vflock & UHCI_WANT_LOCK) 702 wakeup(&sc->sc_vflock); 703 splx(s); 704 } 705 706 /* 707 * Allocate an interrupt information struct. A free list is kept 708 * for fast allocation. 709 */ 710 uhci_intr_info_t * 711 uhci_alloc_intr_info(sc) 712 uhci_softc_t *sc; 713 { 714 uhci_intr_info_t *ii; 715 716 ii = LIST_FIRST(&uhci_ii_free); 717 if (ii) 718 LIST_REMOVE(ii, list); 719 else { 720 ii = malloc(sizeof(uhci_intr_info_t), M_USBHC, M_NOWAIT); 721 } 722 ii->sc = sc; 723 #if defined(__FreeBSD__) 724 callout_handle_init(&ii->timeout_handle); 725 #endif 726 727 return ii; 728 } 729 730 void 731 uhci_free_intr_info(ii) 732 uhci_intr_info_t *ii; 733 { 734 LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */ 735 } 736 737 /* Add control QH, called at splusb(). */ 738 void 739 uhci_add_ctrl(sc, sqh) 740 uhci_softc_t *sc; 741 uhci_soft_qh_t *sqh; 742 { 743 uhci_soft_qh_t *eqh; 744 745 SPLUSBCHECK; 746 747 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 748 eqh = sc->sc_ctl_end; 749 sqh->hlink = eqh->hlink; 750 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 751 eqh->hlink = sqh; 752 eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q); 753 sc->sc_ctl_end = sqh; 754 } 755 756 /* Remove control QH, called at splusb(). */ 757 void 758 uhci_remove_ctrl(sc, sqh) 759 uhci_softc_t *sc; 760 uhci_soft_qh_t *sqh; 761 { 762 uhci_soft_qh_t *pqh; 763 764 SPLUSBCHECK; 765 766 DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh)); 767 for (pqh = sc->sc_ctl_start; pqh->hlink != sqh; pqh=pqh->hlink) 768 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 769 if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) { 770 printf("uhci_remove_ctrl: QH not found\n"); 771 return; 772 } 773 #else 774 ; 775 #endif 776 pqh->hlink = sqh->hlink; 777 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 778 if (sc->sc_ctl_end == sqh) 779 sc->sc_ctl_end = pqh; 780 } 781 782 /* Add bulk QH, called at splusb(). */ 783 void 784 uhci_add_bulk(sc, sqh) 785 uhci_softc_t *sc; 786 uhci_soft_qh_t *sqh; 787 { 788 uhci_soft_qh_t *eqh; 789 790 SPLUSBCHECK; 791 792 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 793 eqh = sc->sc_bulk_end; 794 sqh->hlink = eqh->hlink; 795 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 796 eqh->hlink = sqh; 797 eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q); 798 sc->sc_bulk_end = sqh; 799 } 800 801 /* Remove bulk QH, called at splusb(). */ 802 void 803 uhci_remove_bulk(sc, sqh) 804 uhci_softc_t *sc; 805 uhci_soft_qh_t *sqh; 806 { 807 uhci_soft_qh_t *pqh; 808 809 SPLUSBCHECK; 810 811 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 812 for (pqh = sc->sc_bulk_start; pqh->hlink != sqh; pqh = pqh->hlink) 813 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 814 if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) { 815 printf("uhci_remove_bulk: QH not found\n"); 816 return; 817 } 818 #else 819 ; 820 #endif 821 pqh->hlink = sqh->hlink; 822 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 823 if (sc->sc_bulk_end == sqh) 824 sc->sc_bulk_end = pqh; 825 } 826 827 int 828 uhci_intr(arg) 829 void *arg; 830 { 831 uhci_softc_t *sc = arg; 832 int status; 833 int ack; 834 uhci_intr_info_t *ii; 835 836 #if defined(UHCI_DEBUG) 837 if (uhcidebug > 15) { 838 DPRINTF(("%s: uhci_intr\n", USBDEVNAME(sc->sc_bus.bdev))); 839 uhci_dumpregs(sc); 840 } 841 #endif 842 843 #if defined(DIAGNOSTIC) && defined(__NetBSD__) 844 if (sc->sc_suspend != PWR_RESUME) 845 printf("uhci_intr: suspended sts=0x%x\n", status); 846 #endif 847 848 status = UREAD2(sc, UHCI_STS); 849 ack = 0; 850 if (status & UHCI_STS_USBINT) 851 ack |= UHCI_STS_USBINT; 852 if (status & UHCI_STS_USBEI) 853 ack |= UHCI_STS_USBEI; 854 if (status & UHCI_STS_RD) { 855 ack |= UHCI_STS_RD; 856 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 857 } 858 if (status & UHCI_STS_HSE) { 859 ack |= UHCI_STS_HSE; 860 printf("%s: host controller process error\n", 861 USBDEVNAME(sc->sc_bus.bdev)); 862 } 863 if (status & UHCI_STS_HCPE) { 864 ack |= UHCI_STS_HCPE; 865 printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev)); 866 } 867 if (status & UHCI_STS_HCH) { 868 /* no acknowledge needed */ 869 printf("%s: host controller halted\n", 870 USBDEVNAME(sc->sc_bus.bdev)); 871 } 872 873 if (ack) /* acknowledge the ints */ 874 UWRITE2(sc, UHCI_STS, ack); 875 else /* nothing to acknowledge */ 876 return (0); 877 878 sc->sc_bus.intr_context++; 879 sc->sc_bus.no_intrs++; 880 881 /* 882 * Interrupts on UHCI really suck. When the host controller 883 * interrupts because a transfer is completed there is no 884 * way of knowing which transfer it was. You can scan down 885 * the TDs and QHs of the previous frame to limit the search, 886 * but that assumes that the interrupt was not delayed by more 887 * than 1 ms, which may not always be true (e.g. after debug 888 * output on a slow console). 889 * We scan all interrupt descriptors to see if any have 890 * completed. 891 */ 892 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 893 uhci_check_intr(sc, ii); 894 895 DPRINTFN(10, ("uhci_intr: exit\n")); 896 897 sc->sc_bus.intr_context--; 898 899 return (1); 900 } 901 902 /* Check for an interrupt. */ 903 void 904 uhci_check_intr(sc, ii) 905 uhci_softc_t *sc; 906 uhci_intr_info_t *ii; 907 { 908 uhci_soft_td_t *std, *lstd; 909 u_int32_t status; 910 911 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 912 #ifdef DIAGNOSTIC 913 if (!ii) { 914 printf("uhci_check_intr: no ii? %p\n", ii); 915 return; 916 } 917 #endif 918 if (!ii->stdstart) 919 return; 920 lstd = ii->stdend; 921 #ifdef DIAGNOSTIC 922 if (!lstd) { 923 printf("uhci_check_intr: std==0\n"); 924 return; 925 } 926 #endif 927 /* 928 * If the last TD is still active we need to check whether there 929 * is a an error somewhere in the middle, or whether there was a 930 * short packet (SPD and not ACTIVE). 931 */ 932 if (LE(lstd->td.td_status) & UHCI_TD_ACTIVE) { 933 DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii)); 934 for (std = ii->stdstart; std != lstd; std = std->link.std) { 935 status = LE(std->td.td_status); 936 if ((status & UHCI_TD_STALLED) || 937 (status & (UHCI_TD_SPD | UHCI_TD_ACTIVE)) == 938 UHCI_TD_SPD) 939 goto done; 940 } 941 DPRINTFN(15, ("uhci_check_intr: ii=%p std=%p still active\n", 942 ii, ii->stdstart)); 943 return; 944 } 945 done: 946 usb_untimeout(uhci_timeout, ii, ii->timeout_handle); 947 uhci_idone(ii); 948 } 949 950 /* Called at splusb() */ 951 void 952 uhci_idone(ii) 953 uhci_intr_info_t *ii; 954 { 955 usbd_request_handle reqh = ii->reqh; 956 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 957 uhci_soft_td_t *std; 958 u_int32_t status; 959 int actlen; 960 961 #ifdef DIAGNOSTIC 962 { 963 int s = splhigh(); 964 if (ii->isdone) { 965 splx(s); 966 printf("uhci_idone: ii=%p is done!\n", ii); 967 return; 968 } 969 ii->isdone = 1; 970 splx(s); 971 } 972 #endif 973 974 if (reqh->status == USBD_CANCELLED || 975 reqh->status == USBD_TIMEOUT) { 976 DPRINTF(("uhci_idone: aborted reqh=%p\n", reqh)); 977 return; 978 } 979 980 if (reqh->nframes) { 981 /* Isoc transfer, do things differently. */ 982 uhci_soft_td_t **stds = upipe->u.iso.stds; 983 int i, n, nframes; 984 985 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 986 987 nframes = reqh->nframes; 988 actlen = 0; 989 n = reqh->hcprivint; 990 for (i = 0; i < nframes; i++) { 991 std = stds[n]; 992 #ifdef UHCI_DEBUG 993 if (uhcidebug > 5) { 994 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 995 uhci_dump_td(std); 996 } 997 #endif 998 if (++n >= UHCI_VFRAMELIST_COUNT) 999 n = 0; 1000 status = LE(std->td.td_status); 1001 actlen += UHCI_TD_GET_ACTLEN(status); 1002 } 1003 upipe->u.iso.inuse -= nframes; 1004 reqh->actlen = actlen; 1005 reqh->status = USBD_NORMAL_COMPLETION; 1006 reqh->hcpriv = ii; 1007 usb_transfer_complete(reqh); 1008 return; 1009 } 1010 1011 #ifdef UHCI_DEBUG 1012 DPRINTFN(10, ("uhci_idone: ii=%p ready\n", ii)); 1013 if (uhcidebug > 10) 1014 uhci_dump_tds(ii->stdstart); 1015 #endif 1016 1017 /* The transfer is done, compute actual length and status. */ 1018 /* XXX Is this correct for control xfers? */ 1019 actlen = 0; 1020 for (std = ii->stdstart; std; std = std->link.std) { 1021 status = LE(std->td.td_status); 1022 if (status & UHCI_TD_ACTIVE) 1023 break; 1024 if (UHCI_TD_GET_PID(LE(std->td.td_token)) != 1025 UHCI_TD_PID_SETUP) 1026 actlen += UHCI_TD_GET_ACTLEN(status); 1027 } 1028 /* If there are left over TDs we need to update the toggle. */ 1029 if (std) 1030 upipe->nexttoggle = UHCI_TD_GET_DT(LE(std->td.td_token)); 1031 1032 status &= UHCI_TD_ERROR; 1033 DPRINTFN(10, ("uhci_check_intr: actlen=%d, status=0x%x\n", 1034 actlen, status)); 1035 reqh->actlen = actlen; 1036 if (status != 0) { 1037 DPRINTFN(-1+((status&UHCI_TD_STALLED)!=0), 1038 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1039 "status 0x%b\n", 1040 reqh->pipe->device->address, 1041 reqh->pipe->endpoint->edesc->bEndpointAddress, 1042 (int)status, 1043 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 1044 "STALLED\30ACTIVE")); 1045 if (status == UHCI_TD_STALLED) 1046 reqh->status = USBD_STALLED; 1047 else 1048 reqh->status = USBD_IOERROR; /* more info XXX */ 1049 } else { 1050 reqh->status = USBD_NORMAL_COMPLETION; 1051 } 1052 reqh->hcpriv = ii; 1053 usb_transfer_complete(reqh); 1054 } 1055 1056 /* 1057 * Called when a request does not complete. 1058 */ 1059 void 1060 uhci_timeout(addr) 1061 void *addr; 1062 { 1063 uhci_intr_info_t *ii = addr; 1064 1065 DPRINTF(("uhci_timeout: ii=%p\n", ii)); 1066 1067 ii->reqh->device->bus->intr_context++; 1068 uhci_abort_req(ii->reqh, USBD_TIMEOUT); 1069 ii->reqh->device->bus->intr_context--; 1070 } 1071 1072 /* 1073 * Wait here until controller claims to have an interrupt. 1074 * Then call uhci_intr and return. Use timeout to avoid waiting 1075 * too long. 1076 * Only used during boot when interrupts are not enabled yet. 1077 */ 1078 void 1079 uhci_waitintr(sc, reqh) 1080 uhci_softc_t *sc; 1081 usbd_request_handle reqh; 1082 { 1083 int timo = reqh->timeout; 1084 uhci_intr_info_t *ii; 1085 1086 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1087 1088 reqh->status = USBD_IN_PROGRESS; 1089 for (; timo >= 0; timo--) { 1090 usb_delay_ms(&sc->sc_bus, 1); 1091 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1092 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1093 uhci_intr(sc); 1094 if (reqh->status != USBD_IN_PROGRESS) 1095 return; 1096 } 1097 } 1098 1099 /* Timeout */ 1100 DPRINTF(("uhci_waitintr: timeout\n")); 1101 for (ii = LIST_FIRST(&sc->sc_intrhead); 1102 ii && ii->reqh != reqh; 1103 ii = LIST_NEXT(ii, list)) 1104 ; 1105 #ifdef DIAGNOSTIC 1106 if (!ii) 1107 panic("uhci_waitintr: lost intr_info\n"); 1108 #endif 1109 uhci_idone(ii); 1110 } 1111 1112 void 1113 uhci_poll(bus) 1114 struct usbd_bus *bus; 1115 { 1116 uhci_softc_t *sc = (uhci_softc_t *)bus; 1117 1118 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1119 uhci_intr(sc); 1120 } 1121 1122 #if 0 1123 void 1124 uhci_reset(p) 1125 void *p; 1126 { 1127 uhci_softc_t *sc = p; 1128 int n; 1129 1130 UHCICMD(sc, UHCI_CMD_HCRESET); 1131 /* The reset bit goes low when the controller is done. */ 1132 for (n = 0; n < UHCI_RESET_TIMEOUT && 1133 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1134 delay(100); 1135 if (n >= UHCI_RESET_TIMEOUT) 1136 printf("%s: controller did not reset\n", 1137 USBDEVNAME(sc->sc_bus.bdev)); 1138 } 1139 #endif 1140 1141 usbd_status 1142 uhci_run(sc, run) 1143 uhci_softc_t *sc; 1144 int run; 1145 { 1146 int s, n, running; 1147 1148 run = run != 0; 1149 s = splusb(); 1150 DPRINTF(("uhci_run: setting run=%d\n", run)); 1151 UHCICMD(sc, run ? UHCI_CMD_RS : 0); 1152 for(n = 0; n < 10; n++) { 1153 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1154 /* return when we've entered the state we want */ 1155 if (run == running) { 1156 splx(s); 1157 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1158 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1159 return (USBD_NORMAL_COMPLETION); 1160 } 1161 usb_delay_ms(&sc->sc_bus, 1); 1162 } 1163 splx(s); 1164 printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev), 1165 run ? "start" : "stop"); 1166 return (USBD_IOERROR); 1167 } 1168 1169 /* 1170 * Memory management routines. 1171 * uhci_alloc_std allocates TDs 1172 * uhci_alloc_sqh allocates QHs 1173 * These two routines do their own free list management, 1174 * partly for speed, partly because allocating DMAable memory 1175 * has page size granularaity so much memory would be wasted if 1176 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1177 */ 1178 1179 uhci_soft_td_t * 1180 uhci_alloc_std(sc) 1181 uhci_softc_t *sc; 1182 { 1183 uhci_soft_td_t *std; 1184 usbd_status r; 1185 int i, offs; 1186 usb_dma_t dma; 1187 1188 if (!sc->sc_freetds) { 1189 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1190 r = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1191 UHCI_TD_ALIGN, &dma); 1192 if (r != USBD_NORMAL_COMPLETION) 1193 return (0); 1194 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1195 offs = i * UHCI_STD_SIZE; 1196 std = (uhci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 1197 std->physaddr = DMAADDR(&dma) + offs; 1198 std->link.std = sc->sc_freetds; 1199 sc->sc_freetds = std; 1200 } 1201 } 1202 std = sc->sc_freetds; 1203 sc->sc_freetds = std->link.std; 1204 memset(&std->td, 0, sizeof(uhci_td_t)); 1205 return std; 1206 } 1207 1208 void 1209 uhci_free_std(sc, std) 1210 uhci_softc_t *sc; 1211 uhci_soft_td_t *std; 1212 { 1213 #ifdef DIAGNOSTIC 1214 #define TD_IS_FREE 0x12345678 1215 if (LE(std->td.td_token) == TD_IS_FREE) { 1216 printf("uhci_free_std: freeing free TD %p\n", std); 1217 return; 1218 } 1219 std->td.td_token = LE(TD_IS_FREE); 1220 #endif 1221 std->link.std = sc->sc_freetds; 1222 sc->sc_freetds = std; 1223 } 1224 1225 uhci_soft_qh_t * 1226 uhci_alloc_sqh(sc) 1227 uhci_softc_t *sc; 1228 { 1229 uhci_soft_qh_t *sqh; 1230 usbd_status r; 1231 int i, offs; 1232 usb_dma_t dma; 1233 1234 if (!sc->sc_freeqhs) { 1235 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1236 r = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1237 UHCI_QH_ALIGN, &dma); 1238 if (r != USBD_NORMAL_COMPLETION) 1239 return 0; 1240 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1241 offs = i * UHCI_SQH_SIZE; 1242 sqh = (uhci_soft_qh_t *)((char *)KERNADDR(&dma) +offs); 1243 sqh->physaddr = DMAADDR(&dma) + offs; 1244 sqh->hlink = sc->sc_freeqhs; 1245 sc->sc_freeqhs = sqh; 1246 } 1247 } 1248 sqh = sc->sc_freeqhs; 1249 sc->sc_freeqhs = sqh->hlink; 1250 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1251 return (sqh); 1252 } 1253 1254 void 1255 uhci_free_sqh(sc, sqh) 1256 uhci_softc_t *sc; 1257 uhci_soft_qh_t *sqh; 1258 { 1259 sqh->hlink = sc->sc_freeqhs; 1260 sc->sc_freeqhs = sqh; 1261 } 1262 1263 #if 0 1264 /* 1265 * Enter a list of transfers onto a control queue. 1266 * Called at splusb() 1267 */ 1268 void 1269 uhci_enter_ctl_q(sc, sqh, ii) 1270 uhci_softc_t *sc; 1271 uhci_soft_qh_t *sqh; 1272 uhci_intr_info_t *ii; 1273 { 1274 DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh)); 1275 1276 } 1277 #endif 1278 1279 void 1280 uhci_free_std_chain(sc, std, stdend) 1281 uhci_softc_t *sc; 1282 uhci_soft_td_t *std; 1283 uhci_soft_td_t *stdend; 1284 { 1285 uhci_soft_td_t *p; 1286 1287 for (; std != stdend; std = p) { 1288 p = std->link.std; 1289 uhci_free_std(sc, std); 1290 } 1291 } 1292 1293 usbd_status 1294 uhci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep) 1295 struct uhci_pipe *upipe; 1296 uhci_softc_t *sc; 1297 int len, rd, shortok; 1298 usb_dma_t *dma; 1299 uhci_soft_td_t **sp, **ep; 1300 { 1301 uhci_soft_td_t *p, *lastp; 1302 uhci_physaddr_t lastlink; 1303 int i, ntd, l, tog, maxp; 1304 u_int32_t status; 1305 int addr = upipe->pipe.device->address; 1306 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1307 1308 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d " 1309 "shortok=%d\n", addr, UE_GET_ADDR(endpt), len, 1310 upipe->pipe.device->lowspeed, shortok)); 1311 if (len == 0) { 1312 *sp = *ep = 0; 1313 DPRINTFN(-1,("uhci_alloc_std_chain: len=0\n")); 1314 return (USBD_NORMAL_COMPLETION); 1315 } 1316 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1317 if (maxp == 0) { 1318 printf("uhci_alloc_std_chain: maxp=0\n"); 1319 return (USBD_INVAL); 1320 } 1321 ntd = (len + maxp - 1) / maxp; 1322 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1323 tog = upipe->nexttoggle; 1324 if (ntd % 2 == 0) 1325 tog ^= 1; 1326 upipe->nexttoggle = tog ^ 1; 1327 lastp = 0; 1328 lastlink = UHCI_PTR_T; 1329 ntd--; 1330 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1331 if (upipe->pipe.device->lowspeed) 1332 status |= UHCI_TD_LS; 1333 if (shortok) 1334 status |= UHCI_TD_SPD; 1335 for (i = ntd; i >= 0; i--) { 1336 p = uhci_alloc_std(sc); 1337 if (!p) { 1338 uhci_free_std_chain(sc, lastp, 0); 1339 return (USBD_NOMEM); 1340 } 1341 p->link.std = lastp; 1342 p->td.td_link = LE(lastlink); 1343 lastp = p; 1344 lastlink = p->physaddr; 1345 p->td.td_status = LE(status); 1346 if (i == ntd) { 1347 /* last TD */ 1348 l = len % maxp; 1349 if (l == 0) l = maxp; 1350 *ep = p; 1351 } else 1352 l = maxp; 1353 p->td.td_token = 1354 LE(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1355 UHCI_TD_OUT(l, endpt, addr, tog)); 1356 p->td.td_buffer = LE(DMAADDR(dma) + i * maxp); 1357 tog ^= 1; 1358 } 1359 *sp = lastp; 1360 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1361 upipe->nexttoggle)); 1362 return (USBD_NORMAL_COMPLETION); 1363 } 1364 1365 void 1366 uhci_device_clear_toggle(pipe) 1367 usbd_pipe_handle pipe; 1368 { 1369 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1370 upipe->nexttoggle = 0; 1371 } 1372 1373 void 1374 uhci_noop(pipe) 1375 usbd_pipe_handle pipe; 1376 { 1377 } 1378 1379 usbd_status 1380 uhci_device_bulk_transfer(reqh) 1381 usbd_request_handle reqh; 1382 { 1383 usbd_status r; 1384 1385 /* Insert last in queue. */ 1386 r = usb_insert_transfer(reqh); 1387 if (r != USBD_NORMAL_COMPLETION) 1388 return (r); 1389 1390 /* Pipe isn't running, start first */ 1391 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 1392 } 1393 1394 usbd_status 1395 uhci_device_bulk_start(reqh) 1396 usbd_request_handle reqh; 1397 { 1398 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1399 usbd_device_handle dev = upipe->pipe.device; 1400 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1401 uhci_intr_info_t *ii = upipe->iinfo; 1402 uhci_soft_td_t *data, *dataend; 1403 uhci_soft_qh_t *sqh; 1404 usbd_status r; 1405 int len, isread, endpt; 1406 int s; 1407 1408 DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p len=%d flags=%d\n", 1409 reqh, reqh->length, reqh->flags)); 1410 1411 #ifdef DIAGNOSTIC 1412 if (reqh->rqflags & URQ_REQUEST) 1413 panic("uhci_device_bulk_transfer: a request\n"); 1414 #endif 1415 1416 len = reqh->length; 1417 endpt = reqh->pipe->endpoint->edesc->bEndpointAddress; 1418 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 1419 sqh = upipe->u.bulk.sqh; 1420 1421 upipe->u.bulk.isread = isread; 1422 upipe->u.bulk.length = len; 1423 1424 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1425 reqh->flags & USBD_SHORT_XFER_OK, 1426 &reqh->dmabuf, &data, &dataend); 1427 if (r != USBD_NORMAL_COMPLETION) 1428 return (r); 1429 dataend->td.td_status |= LE(UHCI_TD_IOC); 1430 1431 #ifdef UHCI_DEBUG 1432 if (uhcidebug > 8) { 1433 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 1434 uhci_dump_tds(data); 1435 } 1436 #endif 1437 1438 /* Set up interrupt info. */ 1439 ii->reqh = reqh; 1440 ii->stdstart = data; 1441 ii->stdend = dataend; 1442 #if defined(__FreeBSD__) 1443 callout_handle_init(&ii->timeout_handle); 1444 #endif 1445 #ifdef DIAGNOSTIC 1446 ii->isdone = 0; 1447 #endif 1448 1449 sqh->elink = data; 1450 sqh->qh.qh_elink = LE(data->physaddr); 1451 sqh->intr_info = ii; 1452 1453 s = splusb(); 1454 uhci_add_bulk(sc, sqh); 1455 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1456 1457 if (reqh->timeout && !sc->sc_bus.use_polling) { 1458 usb_timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout), 1459 ii->timeout_handle); 1460 } 1461 splx(s); 1462 1463 #ifdef UHCI_DEBUG 1464 if (uhcidebug > 10) { 1465 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 1466 uhci_dump_tds(data); 1467 } 1468 #endif 1469 1470 if (sc->sc_bus.use_polling) 1471 uhci_waitintr(sc, reqh); 1472 1473 return (USBD_IN_PROGRESS); 1474 } 1475 1476 /* Abort a device bulk request. */ 1477 void 1478 uhci_device_bulk_abort(reqh) 1479 usbd_request_handle reqh; 1480 { 1481 DPRINTF(("uhci_device_bulk_abort:\n")); 1482 uhci_abort_req(reqh, USBD_CANCELLED); 1483 } 1484 1485 void 1486 uhci_abort_req(reqh, status) 1487 usbd_request_handle reqh; 1488 usbd_status status; 1489 { 1490 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1491 uhci_intr_info_t *ii = upipe->iinfo; 1492 uhci_soft_td_t *std; 1493 1494 /* Make interrupt routine ignore it, */ 1495 reqh->status = status; 1496 1497 /* don't timeout, */ 1498 usb_untimeout(uhci_timeout, ii, ii->timeout_handle); 1499 1500 /* make hardware ignore it, */ 1501 for (std = ii->stdstart; std != 0; std = std->link.std) 1502 std->td.td_status &= LE(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1503 1504 reqh->hcpriv = ii; 1505 1506 /* make sure hardware has completed, */ 1507 if (reqh->device->bus->intr_context) { 1508 /* We have no process context, so we can't use tsleep(). */ 1509 timeout(uhci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND); 1510 } else { 1511 usb_delay_ms(reqh->pipe->device->bus, 1); 1512 /* and call final part of interrupt handler. */ 1513 uhci_abort_req_end(reqh); 1514 } 1515 } 1516 1517 void 1518 uhci_abort_req_end(v) 1519 void *v; 1520 { 1521 usbd_request_handle reqh = v; 1522 int s; 1523 1524 s = splusb(); 1525 usb_transfer_complete(reqh); 1526 splx(s); 1527 } 1528 1529 /* Close a device bulk pipe. */ 1530 void 1531 uhci_device_bulk_close(pipe) 1532 usbd_pipe_handle pipe; 1533 { 1534 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1535 usbd_device_handle dev = upipe->pipe.device; 1536 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1537 1538 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1539 uhci_free_intr_info(upipe->iinfo); 1540 /* XXX free other resources */ 1541 } 1542 1543 usbd_status 1544 uhci_device_ctrl_transfer(reqh) 1545 usbd_request_handle reqh; 1546 { 1547 usbd_status r; 1548 1549 /* Insert last in queue. */ 1550 r = usb_insert_transfer(reqh); 1551 if (r != USBD_NORMAL_COMPLETION) 1552 return (r); 1553 1554 /* Pipe isn't running, start first */ 1555 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 1556 } 1557 1558 usbd_status 1559 uhci_device_ctrl_start(reqh) 1560 usbd_request_handle reqh; 1561 { 1562 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 1563 usbd_status r; 1564 1565 #ifdef DIAGNOSTIC 1566 if (!(reqh->rqflags & URQ_REQUEST)) 1567 panic("uhci_device_ctrl_transfer: not a request\n"); 1568 #endif 1569 1570 r = uhci_device_request(reqh); 1571 if (r != USBD_NORMAL_COMPLETION) 1572 return (r); 1573 1574 if (sc->sc_bus.use_polling) 1575 uhci_waitintr(sc, reqh); 1576 return (USBD_IN_PROGRESS); 1577 } 1578 1579 usbd_status 1580 uhci_device_intr_transfer(reqh) 1581 usbd_request_handle reqh; 1582 { 1583 usbd_status r; 1584 1585 /* Insert last in queue. */ 1586 r = usb_insert_transfer(reqh); 1587 if (r != USBD_NORMAL_COMPLETION) 1588 return (r); 1589 1590 /* Pipe isn't running, start first */ 1591 return (uhci_device_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 1592 } 1593 1594 usbd_status 1595 uhci_device_intr_start(reqh) 1596 usbd_request_handle reqh; 1597 { 1598 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1599 usbd_device_handle dev = upipe->pipe.device; 1600 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1601 uhci_intr_info_t *ii = upipe->iinfo; 1602 uhci_soft_td_t *data, *dataend; 1603 uhci_soft_qh_t *sqh; 1604 usbd_status r; 1605 int i, s; 1606 1607 DPRINTFN(3,("uhci_device_intr_transfer: reqh=%p len=%d flags=%d\n", 1608 reqh, reqh->length, reqh->flags)); 1609 1610 #ifdef DIAGNOSTIC 1611 if (reqh->rqflags & URQ_REQUEST) 1612 panic("uhci_device_intr_transfer: a request\n"); 1613 #endif 1614 1615 r = uhci_alloc_std_chain(upipe, sc, reqh->length, 1, 1616 reqh->flags & USBD_SHORT_XFER_OK, 1617 &reqh->dmabuf, &data, &dataend); 1618 if (r != USBD_NORMAL_COMPLETION) 1619 return (r); 1620 dataend->td.td_status |= LE(UHCI_TD_IOC); 1621 1622 #ifdef UHCI_DEBUG 1623 if (uhcidebug > 10) { 1624 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 1625 uhci_dump_tds(data); 1626 uhci_dump_qh(upipe->u.intr.qhs[0]); 1627 } 1628 #endif 1629 1630 s = splusb(); 1631 /* Set up interrupt info. */ 1632 ii->reqh = reqh; 1633 ii->stdstart = data; 1634 ii->stdend = dataend; 1635 #if defined(__FreeBSD__) 1636 callout_handle_init(&ii->timeout_handle); 1637 #endif 1638 #ifdef DIAGNOSTIC 1639 ii->isdone = 0; 1640 #endif 1641 1642 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 1643 upipe->u.intr.qhs[0])); 1644 for (i = 0; i < upipe->u.intr.npoll; i++) { 1645 sqh = upipe->u.intr.qhs[i]; 1646 sqh->elink = data; 1647 sqh->qh.qh_elink = LE(data->physaddr); 1648 } 1649 splx(s); 1650 1651 #ifdef UHCI_DEBUG 1652 if (uhcidebug > 10) { 1653 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 1654 uhci_dump_tds(data); 1655 uhci_dump_qh(upipe->u.intr.qhs[0]); 1656 } 1657 #endif 1658 1659 return (USBD_IN_PROGRESS); 1660 } 1661 1662 /* Abort a device control request. */ 1663 void 1664 uhci_device_ctrl_abort(reqh) 1665 usbd_request_handle reqh; 1666 { 1667 DPRINTF(("uhci_device_ctrl_abort:\n")); 1668 uhci_abort_req(reqh, USBD_CANCELLED); 1669 } 1670 1671 /* Close a device control pipe. */ 1672 void 1673 uhci_device_ctrl_close(pipe) 1674 usbd_pipe_handle pipe; 1675 { 1676 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1677 1678 uhci_free_intr_info(upipe->iinfo); 1679 /* XXX free other resources */ 1680 } 1681 1682 /* Abort a device interrupt request. */ 1683 void 1684 uhci_device_intr_abort(reqh) 1685 usbd_request_handle reqh; 1686 { 1687 DPRINTFN(1,("uhci_device_intr_abort: reqh=%p\n", reqh)); 1688 if (reqh->pipe->intrreqh == reqh) { 1689 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 1690 reqh->pipe->intrreqh = 0; 1691 } 1692 uhci_abort_req(reqh, USBD_CANCELLED); 1693 } 1694 1695 /* Close a device interrupt pipe. */ 1696 void 1697 uhci_device_intr_close(pipe) 1698 usbd_pipe_handle pipe; 1699 { 1700 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1701 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 1702 int i, s, npoll; 1703 1704 upipe->iinfo->stdstart = 0; /* inactive */ 1705 1706 /* Unlink descriptors from controller data structures. */ 1707 npoll = upipe->u.intr.npoll; 1708 uhci_lock_frames(sc); 1709 for (i = 0; i < npoll; i++) 1710 uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos, 1711 upipe->u.intr.qhs[i]); 1712 uhci_unlock_frames(sc); 1713 1714 /* 1715 * We now have to wait for any activity on the physical 1716 * descriptors to stop. 1717 */ 1718 usb_delay_ms(&sc->sc_bus, 2); 1719 1720 for(i = 0; i < npoll; i++) 1721 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 1722 free(upipe->u.intr.qhs, M_USBHC); 1723 1724 s = splusb(); 1725 LIST_REMOVE(upipe->iinfo, list); /* remove from active list */ 1726 splx(s); 1727 uhci_free_intr_info(upipe->iinfo); 1728 1729 /* XXX free other resources */ 1730 } 1731 1732 usbd_status 1733 uhci_device_request(reqh) 1734 usbd_request_handle reqh; 1735 { 1736 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1737 usb_device_request_t *req = &reqh->request; 1738 usbd_device_handle dev = upipe->pipe.device; 1739 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1740 int addr = dev->address; 1741 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1742 uhci_intr_info_t *ii = upipe->iinfo; 1743 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 1744 uhci_soft_qh_t *sqh; 1745 int len; 1746 u_int32_t ls; 1747 usbd_status r; 1748 int isread; 1749 int s; 1750 1751 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 1752 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1753 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1754 UGETW(req->wIndex), UGETW(req->wLength), 1755 addr, endpt)); 1756 1757 ls = dev->lowspeed ? UHCI_TD_LS : 0; 1758 isread = req->bmRequestType & UT_READ; 1759 len = UGETW(req->wLength); 1760 1761 setup = upipe->u.ctl.setup; 1762 stat = upipe->u.ctl.stat; 1763 sqh = upipe->u.ctl.sqh; 1764 1765 /* Set up data transaction */ 1766 if (len != 0) { 1767 upipe->nexttoggle = 1; 1768 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1769 reqh->flags & USBD_SHORT_XFER_OK, 1770 &reqh->dmabuf, &data, &dataend); 1771 if (r != USBD_NORMAL_COMPLETION) 1772 return (r); 1773 next = data; 1774 dataend->link.std = stat; 1775 dataend->td.td_link = LE(stat->physaddr); 1776 } else { 1777 next = stat; 1778 } 1779 upipe->u.ctl.length = len; 1780 1781 memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req); 1782 1783 setup->link.std = next; 1784 setup->td.td_link = LE(next->physaddr); 1785 setup->td.td_status = LE(UHCI_TD_SET_ERRCNT(3) | ls | UHCI_TD_ACTIVE); 1786 setup->td.td_token = LE(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 1787 setup->td.td_buffer = LE(DMAADDR(&upipe->u.ctl.reqdma)); 1788 1789 stat->link.std = 0; 1790 stat->td.td_link = LE(UHCI_PTR_T); 1791 stat->td.td_status = LE(UHCI_TD_SET_ERRCNT(3) | ls | 1792 UHCI_TD_ACTIVE | UHCI_TD_IOC); 1793 stat->td.td_token = 1794 LE(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 1795 UHCI_TD_IN (0, endpt, addr, 1)); 1796 stat->td.td_buffer = LE(0); 1797 1798 #ifdef UHCI_DEBUG 1799 if (uhcidebug > 20) { 1800 DPRINTF(("uhci_device_request: before transfer\n")); 1801 uhci_dump_tds(setup); 1802 } 1803 #endif 1804 1805 /* Set up interrupt info. */ 1806 ii->reqh = reqh; 1807 ii->stdstart = setup; 1808 ii->stdend = stat; 1809 #if defined(__FreeBSD__) 1810 callout_handle_init(&ii->timeout_handle); 1811 #endif 1812 #ifdef DIAGNOSTIC 1813 ii->isdone = 0; 1814 #endif 1815 1816 sqh->elink = setup; 1817 sqh->qh.qh_elink = LE(setup->physaddr); 1818 sqh->intr_info = ii; 1819 1820 s = splusb(); 1821 uhci_add_ctrl(sc, sqh); 1822 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1823 #ifdef UHCI_DEBUG 1824 if (uhcidebug > 12) { 1825 uhci_soft_td_t *std; 1826 uhci_soft_qh_t *xqh; 1827 uhci_soft_qh_t *sxqh; 1828 int maxqh = 0; 1829 uhci_physaddr_t link; 1830 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 1831 for (std = sc->sc_vframes[0].htd, link = 0; 1832 (link & UHCI_PTR_Q) == 0; 1833 std = std->link.std) { 1834 link = LE(std->td.td_link); 1835 uhci_dump_td(std); 1836 } 1837 for (sxqh = xqh = (uhci_soft_qh_t *)std; 1838 xqh; 1839 xqh = (maxqh++ == 5 || xqh->hlink==sxqh || 1840 xqh->hlink==xqh ? NULL : xqh->hlink)) { 1841 uhci_dump_qh(xqh); 1842 uhci_dump_qh(sxqh); 1843 } 1844 DPRINTF(("Enqueued QH:\n")); 1845 uhci_dump_qh(sqh); 1846 uhci_dump_tds(sqh->elink); 1847 } 1848 #endif 1849 if (reqh->timeout && !sc->sc_bus.use_polling) { 1850 usb_timeout(uhci_timeout, ii, 1851 MS_TO_TICKS(reqh->timeout), ii->timeout_handle); 1852 } 1853 splx(s); 1854 1855 return (USBD_NORMAL_COMPLETION); 1856 } 1857 1858 usbd_status 1859 uhci_device_isoc_transfer(reqh) 1860 usbd_request_handle reqh; 1861 { 1862 usbd_status r; 1863 1864 DPRINTFN(5,("uhci_device_isoc_transfer: reqh=%p\n", reqh)); 1865 1866 /* Put it on our queue, */ 1867 r = usb_insert_transfer(reqh); 1868 1869 /* bail out on error, */ 1870 if (r != USBD_NORMAL_COMPLETION && r != USBD_IN_PROGRESS) 1871 return (r); 1872 1873 /* XXX should check inuse here */ 1874 1875 /* insert into schedule, */ 1876 uhci_device_isoc_enter(reqh); 1877 1878 /* and put on interrupt list if the pipe wasn't running */ 1879 if (r == USBD_NORMAL_COMPLETION) 1880 uhci_device_isoc_start(SIMPLEQ_FIRST(&reqh->pipe->queue)); 1881 1882 return (r); 1883 } 1884 1885 void 1886 uhci_device_isoc_enter(reqh) 1887 usbd_request_handle reqh; 1888 { 1889 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1890 usbd_device_handle dev = upipe->pipe.device; 1891 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1892 struct iso *iso = &upipe->u.iso; 1893 uhci_soft_td_t *std; 1894 u_int32_t buf, len, status; 1895 int s, i, next, nframes; 1896 1897 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d reqh=%p " 1898 "nframes=%d\n", 1899 iso->inuse, iso->next, reqh, reqh->nframes)); 1900 1901 if (reqh->status == USBD_IN_PROGRESS) { 1902 /* This request has already been entered into the frame list */ 1903 } 1904 1905 #ifdef DIAGNOSTIC 1906 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 1907 printf("uhci_device_isoc_enter: overflow!\n"); 1908 #endif 1909 1910 next = iso->next; 1911 if (next == -1) { 1912 /* Not in use yet, schedule it a few frames ahead. */ 1913 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 1914 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 1915 } 1916 1917 reqh->status = USBD_IN_PROGRESS; 1918 reqh->hcprivint = next; 1919 1920 buf = DMAADDR(&reqh->dmabuf); 1921 status = LE(UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 1922 UHCI_TD_ACTIVE | 1923 UHCI_TD_IOS)); 1924 nframes = reqh->nframes; 1925 s = splusb(); 1926 for (i = 0; i < nframes; i++) { 1927 std = iso->stds[next]; 1928 if (++next >= UHCI_VFRAMELIST_COUNT) 1929 next = 0; 1930 len = reqh->frlengths[i]; 1931 std->td.td_buffer = LE(buf); 1932 if (i == nframes - 1) 1933 status |= LE(UHCI_TD_IOC); 1934 std->td.td_status = status; 1935 std->td.td_token &= LE(~UHCI_TD_MAXLEN_MASK); 1936 std->td.td_token |= LE(UHCI_TD_SET_MAXLEN(len)); 1937 #ifdef UHCI_DEBUG 1938 if (uhcidebug > 5) { 1939 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 1940 uhci_dump_td(std); 1941 } 1942 #endif 1943 buf += len; 1944 } 1945 iso->next = next; 1946 iso->inuse += reqh->nframes; 1947 1948 splx(s); 1949 } 1950 1951 usbd_status 1952 uhci_device_isoc_start(reqh) 1953 usbd_request_handle reqh; 1954 { 1955 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1956 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1957 uhci_intr_info_t *ii = upipe->iinfo; 1958 uhci_soft_td_t *end; 1959 int s, i; 1960 1961 #ifdef DIAGNOSTIC 1962 if (reqh->status != USBD_IN_PROGRESS) 1963 printf("uhci_device_isoc_start: not in progress %p\n", reqh); 1964 #endif 1965 1966 /* Find the last TD */ 1967 i = reqh->hcprivint + reqh->nframes; 1968 if (i >= UHCI_VFRAMELIST_COUNT) 1969 i -= UHCI_VFRAMELIST_COUNT; 1970 end = upipe->u.iso.stds[i]; 1971 1972 s = splusb(); 1973 1974 /* Set up interrupt info. */ 1975 ii->reqh = reqh; 1976 ii->stdstart = end; 1977 ii->stdend = end; 1978 #if defined(__FreeBSD__) 1979 callout_handle_init(&ii->timeout_handle); 1980 #endif 1981 #ifdef DIAGNOSTIC 1982 ii->isdone = 0; 1983 #endif 1984 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1985 1986 splx(s); 1987 1988 return (USBD_IN_PROGRESS); 1989 } 1990 1991 void 1992 uhci_device_isoc_abort(reqh) 1993 usbd_request_handle reqh; 1994 { 1995 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1996 uhci_intr_info_t *ii = upipe->iinfo; 1997 uhci_soft_td_t **stds = upipe->u.iso.stds; 1998 uhci_soft_td_t *std; 1999 int i, n, nframes; 2000 2001 /* Make interrupt routine ignore it, */ 2002 reqh->status = USBD_CANCELLED; 2003 2004 /* make hardware ignore it, */ 2005 nframes = reqh->nframes; 2006 n = reqh->hcprivint; 2007 for (i = 0; i < nframes; i++) { 2008 std = stds[n]; 2009 std->td.td_status &= LE(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2010 if (++n >= UHCI_VFRAMELIST_COUNT) 2011 n = 0; 2012 } 2013 2014 reqh->hcpriv = ii; 2015 2016 /* make sure hardware has completed, */ 2017 if (reqh->device->bus->intr_context) { 2018 /* We have no process context, so we can't use tsleep(). */ 2019 timeout(uhci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND); 2020 } else { 2021 usb_delay_ms(reqh->pipe->device->bus, 1); 2022 /* and call final part of interrupt handler. */ 2023 uhci_abort_req_end(reqh); 2024 } 2025 } 2026 2027 void 2028 uhci_device_isoc_close(pipe) 2029 usbd_pipe_handle pipe; 2030 { 2031 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2032 usbd_device_handle dev = upipe->pipe.device; 2033 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2034 uhci_soft_td_t *std, *vstd; 2035 struct iso *iso; 2036 int i; 2037 2038 /* 2039 * Make sure all TDs are marked as inactive. 2040 * Wait for completion. 2041 * Unschedule. 2042 * Deallocate. 2043 */ 2044 iso = &upipe->u.iso; 2045 2046 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2047 iso->stds[i]->td.td_status &= LE(~UHCI_TD_ACTIVE); 2048 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2049 2050 uhci_lock_frames(sc); 2051 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2052 std = iso->stds[i]; 2053 for (vstd = sc->sc_vframes[i].htd; 2054 vstd && vstd->link.std != std; 2055 vstd = vstd->link.std) 2056 ; 2057 if (!vstd) { 2058 /*panic*/ 2059 printf("uhci_device_isoc_close: %p not found\n", std); 2060 uhci_unlock_frames(sc); 2061 return; 2062 } 2063 vstd->link = std->link; 2064 vstd->td.td_link = std->td.td_link; 2065 uhci_free_std(sc, std); 2066 } 2067 uhci_unlock_frames(sc); 2068 2069 free(iso->stds, M_USBHC); 2070 } 2071 2072 usbd_status 2073 uhci_setup_isoc(pipe) 2074 usbd_pipe_handle pipe; 2075 { 2076 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2077 usbd_device_handle dev = upipe->pipe.device; 2078 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2079 int addr = upipe->pipe.device->address; 2080 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2081 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2082 uhci_soft_td_t *std, *vstd; 2083 u_int32_t token; 2084 struct iso *iso; 2085 int i; 2086 2087 iso = &upipe->u.iso; 2088 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2089 M_USBHC, M_WAITOK); 2090 2091 token = LE(rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2092 UHCI_TD_OUT(0, endpt, addr, 0)); 2093 2094 /* Allocate the TDs and mark as inactive; */ 2095 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2096 std = uhci_alloc_std(sc); 2097 if (std == 0) 2098 goto bad; 2099 std->td.td_status = LE(UHCI_TD_IOS); /* iso, inactive */ 2100 std->td.td_token = token; 2101 iso->stds[i] = std; 2102 } 2103 2104 /* Insert TDs into schedule. */ 2105 uhci_lock_frames(sc); 2106 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2107 std = iso->stds[i]; 2108 vstd = sc->sc_vframes[i].htd; 2109 std->link = vstd->link; 2110 std->td.td_link = vstd->td.td_link; 2111 vstd->link.std = std; 2112 vstd->td.td_link = LE(std->physaddr); 2113 } 2114 uhci_unlock_frames(sc); 2115 2116 iso->next = -1; 2117 iso->inuse = 0; 2118 2119 return (USBD_NORMAL_COMPLETION); 2120 2121 bad: 2122 while (--i >= 0) 2123 uhci_free_std(sc, iso->stds[i]); 2124 free(iso->stds, M_USBHC); 2125 return (USBD_NOMEM); 2126 } 2127 2128 void 2129 uhci_device_isoc_done(reqh) 2130 usbd_request_handle reqh; 2131 { 2132 uhci_intr_info_t *ii = reqh->hcpriv; 2133 2134 DPRINTFN(4, ("uhci_isoc_done: length=%d\n", reqh->actlen)); 2135 2136 /* Turn off the interrupt since it is active even if the TD is not. */ 2137 ii->stdend->td.td_status &= LE(~UHCI_TD_IOC); 2138 2139 LIST_REMOVE(ii, list); /* remove from active list */ 2140 } 2141 2142 void 2143 uhci_device_intr_done(reqh) 2144 usbd_request_handle reqh; 2145 { 2146 uhci_intr_info_t *ii = reqh->hcpriv; 2147 uhci_softc_t *sc = ii->sc; 2148 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 2149 uhci_soft_qh_t *sqh; 2150 int i, npoll; 2151 2152 DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen)); 2153 2154 npoll = upipe->u.intr.npoll; 2155 for(i = 0; i < npoll; i++) { 2156 sqh = upipe->u.intr.qhs[i]; 2157 sqh->elink = 0; 2158 sqh->qh.qh_elink = LE(UHCI_PTR_T); 2159 } 2160 uhci_free_std_chain(sc, ii->stdstart, 0); 2161 2162 /* XXX Wasteful. */ 2163 if (reqh->pipe->repeat) { 2164 uhci_soft_td_t *data, *dataend; 2165 2166 /* This alloc cannot fail since we freed the chain above. */ 2167 uhci_alloc_std_chain(upipe, sc, reqh->length, 1, 2168 reqh->flags & USBD_SHORT_XFER_OK, 2169 &reqh->dmabuf, &data, &dataend); 2170 dataend->td.td_status |= LE(UHCI_TD_IOC); 2171 2172 #ifdef UHCI_DEBUG 2173 if (uhcidebug > 10) { 2174 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2175 uhci_dump_tds(data); 2176 uhci_dump_qh(upipe->u.intr.qhs[0]); 2177 } 2178 #endif 2179 2180 ii->stdstart = data; 2181 ii->stdend = dataend; 2182 #if defined(__FreeBSD__) 2183 callout_handle_init(&ii->timeout_handle); 2184 #endif 2185 #ifdef DIAGNOSTIC 2186 ii->isdone = 0; 2187 #endif 2188 for (i = 0; i < npoll; i++) { 2189 sqh = upipe->u.intr.qhs[i]; 2190 sqh->elink = data; 2191 sqh->qh.qh_elink = LE(data->physaddr); 2192 } 2193 } else { 2194 ii->stdstart = 0; /* mark as inactive */ 2195 } 2196 } 2197 2198 /* Deallocate request data structures */ 2199 void 2200 uhci_device_ctrl_done(reqh) 2201 usbd_request_handle reqh; 2202 { 2203 uhci_intr_info_t *ii = reqh->hcpriv; 2204 uhci_softc_t *sc = ii->sc; 2205 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 2206 2207 #ifdef DIAGNOSTIC 2208 if (!(reqh->rqflags & URQ_REQUEST)) 2209 panic("uhci_ctrl_done: not a request\n"); 2210 #endif 2211 2212 LIST_REMOVE(ii, list); /* remove from active list */ 2213 2214 uhci_remove_ctrl(sc, upipe->u.ctl.sqh); 2215 2216 if (upipe->u.ctl.length != 0) 2217 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 2218 2219 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen)); 2220 } 2221 2222 /* Deallocate request data structures */ 2223 void 2224 uhci_device_bulk_done(reqh) 2225 usbd_request_handle reqh; 2226 { 2227 uhci_intr_info_t *ii = reqh->hcpriv; 2228 uhci_softc_t *sc = ii->sc; 2229 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 2230 2231 LIST_REMOVE(ii, list); /* remove from active list */ 2232 2233 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2234 2235 uhci_free_std_chain(sc, ii->stdstart, 0); 2236 2237 DPRINTFN(5, ("uhci_bulk_done: length=%d\n", reqh->actlen)); 2238 } 2239 2240 /* Add interrupt QH, called with vflock. */ 2241 void 2242 uhci_add_intr(sc, n, sqh) 2243 uhci_softc_t *sc; 2244 int n; 2245 uhci_soft_qh_t *sqh; 2246 { 2247 struct uhci_vframe *vf = &sc->sc_vframes[n]; 2248 uhci_soft_qh_t *eqh; 2249 2250 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh)); 2251 eqh = vf->eqh; 2252 sqh->hlink = eqh->hlink; 2253 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2254 eqh->hlink = sqh; 2255 eqh->qh.qh_hlink = LE(sqh->physaddr | UHCI_PTR_Q); 2256 vf->eqh = sqh; 2257 vf->bandwidth++; 2258 } 2259 2260 /* Remove interrupt QH, called with vflock. */ 2261 void 2262 uhci_remove_intr(sc, n, sqh) 2263 uhci_softc_t *sc; 2264 int n; 2265 uhci_soft_qh_t *sqh; 2266 { 2267 struct uhci_vframe *vf = &sc->sc_vframes[n]; 2268 uhci_soft_qh_t *pqh; 2269 2270 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh)); 2271 2272 for (pqh = vf->hqh; pqh->hlink != sqh; pqh = pqh->hlink) 2273 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 2274 if (LE(pqh->qh.qh_hlink) & UHCI_PTR_T) { 2275 DPRINTF(("uhci_remove_intr: QH not found\n")); 2276 return; 2277 } 2278 #else 2279 ; 2280 #endif 2281 pqh->hlink = sqh->hlink; 2282 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2283 if (vf->eqh == sqh) 2284 vf->eqh = pqh; 2285 vf->bandwidth--; 2286 } 2287 2288 usbd_status 2289 uhci_device_setintr(sc, upipe, ival) 2290 uhci_softc_t *sc; 2291 struct uhci_pipe *upipe; 2292 int ival; 2293 { 2294 uhci_soft_qh_t *sqh; 2295 int i, npoll, s; 2296 u_int bestbw, bw, bestoffs, offs; 2297 2298 DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe)); 2299 if (ival == 0) { 2300 printf("uhci_setintr: 0 interval\n"); 2301 return (USBD_INVAL); 2302 } 2303 2304 if (ival > UHCI_VFRAMELIST_COUNT) 2305 ival = UHCI_VFRAMELIST_COUNT; 2306 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2307 DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2308 2309 upipe->u.intr.npoll = npoll; 2310 upipe->u.intr.qhs = 2311 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 2312 2313 /* 2314 * Figure out which offset in the schedule that has most 2315 * bandwidth left over. 2316 */ 2317 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2318 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2319 for (bw = i = 0; i < npoll; i++) 2320 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2321 if (bw < bestbw) { 2322 bestbw = bw; 2323 bestoffs = offs; 2324 } 2325 } 2326 DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2327 2328 upipe->iinfo->stdstart = 0; 2329 for(i = 0; i < npoll; i++) { 2330 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2331 sqh->elink = 0; 2332 sqh->qh.qh_elink = LE(UHCI_PTR_T); 2333 sqh->pos = MOD(i * ival + bestoffs); 2334 sqh->intr_info = upipe->iinfo; 2335 } 2336 #undef MOD 2337 2338 s = splusb(); 2339 LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list); 2340 splx(s); 2341 2342 uhci_lock_frames(sc); 2343 /* Enter QHs into the controller data structures. */ 2344 for(i = 0; i < npoll; i++) 2345 uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos, 2346 upipe->u.intr.qhs[i]); 2347 uhci_unlock_frames(sc); 2348 2349 DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe)); 2350 return (USBD_NORMAL_COMPLETION); 2351 } 2352 2353 /* Open a new pipe. */ 2354 usbd_status 2355 uhci_open(pipe) 2356 usbd_pipe_handle pipe; 2357 { 2358 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2359 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2360 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2361 usbd_status r; 2362 2363 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2364 pipe, pipe->device->address, 2365 ed->bEndpointAddress, sc->sc_addr)); 2366 if (pipe->device->address == sc->sc_addr) { 2367 switch (ed->bEndpointAddress) { 2368 case USB_CONTROL_ENDPOINT: 2369 pipe->methods = &uhci_root_ctrl_methods; 2370 break; 2371 case UE_DIR_IN | UHCI_INTR_ENDPT: 2372 pipe->methods = &uhci_root_intr_methods; 2373 break; 2374 default: 2375 return (USBD_INVAL); 2376 } 2377 } else { 2378 upipe->iinfo = uhci_alloc_intr_info(sc); 2379 if (upipe->iinfo == 0) 2380 return (USBD_NOMEM); 2381 switch (ed->bmAttributes & UE_XFERTYPE) { 2382 case UE_CONTROL: 2383 pipe->methods = &uhci_device_ctrl_methods; 2384 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2385 if (upipe->u.ctl.sqh == 0) 2386 goto bad; 2387 upipe->u.ctl.setup = uhci_alloc_std(sc); 2388 if (upipe->u.ctl.setup == 0) { 2389 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2390 goto bad; 2391 } 2392 upipe->u.ctl.stat = uhci_alloc_std(sc); 2393 if (upipe->u.ctl.stat == 0) { 2394 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2395 uhci_free_std(sc, upipe->u.ctl.setup); 2396 goto bad; 2397 } 2398 r = usb_allocmem(&sc->sc_bus, 2399 sizeof(usb_device_request_t), 2400 0, &upipe->u.ctl.reqdma); 2401 if (r != USBD_NORMAL_COMPLETION) { 2402 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2403 uhci_free_std(sc, upipe->u.ctl.setup); 2404 uhci_free_std(sc, upipe->u.ctl.stat); 2405 goto bad; 2406 } 2407 break; 2408 case UE_INTERRUPT: 2409 pipe->methods = &uhci_device_intr_methods; 2410 return (uhci_device_setintr(sc, upipe, ed->bInterval)); 2411 case UE_ISOCHRONOUS: 2412 pipe->methods = &uhci_device_isoc_methods; 2413 return (uhci_setup_isoc(pipe)); 2414 case UE_BULK: 2415 pipe->methods = &uhci_device_bulk_methods; 2416 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2417 if (upipe->u.bulk.sqh == 0) 2418 goto bad; 2419 break; 2420 } 2421 } 2422 return (USBD_NORMAL_COMPLETION); 2423 2424 bad: 2425 uhci_free_intr_info(upipe->iinfo); 2426 return (USBD_NOMEM); 2427 } 2428 2429 /* 2430 * Data structures and routines to emulate the root hub. 2431 */ 2432 usb_device_descriptor_t uhci_devd = { 2433 USB_DEVICE_DESCRIPTOR_SIZE, 2434 UDESC_DEVICE, /* type */ 2435 {0x00, 0x01}, /* USB version */ 2436 UCLASS_HUB, /* class */ 2437 USUBCLASS_HUB, /* subclass */ 2438 0, /* protocol */ 2439 64, /* max packet */ 2440 {0},{0},{0x00,0x01}, /* device id */ 2441 1,2,0, /* string indicies */ 2442 1 /* # of configurations */ 2443 }; 2444 2445 usb_config_descriptor_t uhci_confd = { 2446 USB_CONFIG_DESCRIPTOR_SIZE, 2447 UDESC_CONFIG, 2448 {USB_CONFIG_DESCRIPTOR_SIZE + 2449 USB_INTERFACE_DESCRIPTOR_SIZE + 2450 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2451 1, 2452 1, 2453 0, 2454 UC_SELF_POWERED, 2455 0 /* max power */ 2456 }; 2457 2458 usb_interface_descriptor_t uhci_ifcd = { 2459 USB_INTERFACE_DESCRIPTOR_SIZE, 2460 UDESC_INTERFACE, 2461 0, 2462 0, 2463 1, 2464 UCLASS_HUB, 2465 USUBCLASS_HUB, 2466 0, 2467 0 2468 }; 2469 2470 usb_endpoint_descriptor_t uhci_endpd = { 2471 USB_ENDPOINT_DESCRIPTOR_SIZE, 2472 UDESC_ENDPOINT, 2473 UE_DIR_IN | UHCI_INTR_ENDPT, 2474 UE_INTERRUPT, 2475 {8}, 2476 255 2477 }; 2478 2479 usb_hub_descriptor_t uhci_hubd_piix = { 2480 USB_HUB_DESCRIPTOR_SIZE, 2481 UDESC_HUB, 2482 2, 2483 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 2484 50, /* power on to power good */ 2485 0, 2486 { 0x00 }, /* both ports are removable */ 2487 }; 2488 2489 int 2490 uhci_str(p, l, s) 2491 usb_string_descriptor_t *p; 2492 int l; 2493 char *s; 2494 { 2495 int i; 2496 2497 if (l == 0) 2498 return (0); 2499 p->bLength = 2 * strlen(s) + 2; 2500 if (l == 1) 2501 return (1); 2502 p->bDescriptorType = UDESC_STRING; 2503 l -= 2; 2504 for (i = 0; s[i] && l > 1; i++, l -= 2) 2505 USETW2(p->bString[i], 0, s[i]); 2506 return (2*i+2); 2507 } 2508 2509 /* 2510 * Simulate a hardware hub by handling all the necessary requests. 2511 */ 2512 usbd_status 2513 uhci_root_ctrl_transfer(reqh) 2514 usbd_request_handle reqh; 2515 { 2516 usbd_status r; 2517 2518 /* Insert last in queue. */ 2519 r = usb_insert_transfer(reqh); 2520 if (r != USBD_NORMAL_COMPLETION) 2521 return (r); 2522 2523 /* Pipe isn't running, start first */ 2524 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 2525 } 2526 2527 usbd_status 2528 uhci_root_ctrl_start(reqh) 2529 usbd_request_handle reqh; 2530 { 2531 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 2532 usb_device_request_t *req; 2533 void *buf = NULL; 2534 int port, x; 2535 int s, len, value, index, status, change, l, totlen = 0; 2536 usb_port_status_t ps; 2537 usbd_status r; 2538 2539 #ifdef DIAGNOSTIC 2540 if (!(reqh->rqflags & URQ_REQUEST)) 2541 panic("uhci_root_ctrl_transfer: not a request\n"); 2542 #endif 2543 req = &reqh->request; 2544 2545 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 2546 req->bmRequestType, req->bRequest)); 2547 2548 len = UGETW(req->wLength); 2549 value = UGETW(req->wValue); 2550 index = UGETW(req->wIndex); 2551 2552 if (len != 0) 2553 buf = KERNADDR(&reqh->dmabuf); 2554 2555 #define C(x,y) ((x) | ((y) << 8)) 2556 switch(C(req->bRequest, req->bmRequestType)) { 2557 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2558 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2559 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2560 /* 2561 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2562 * for the integrated root hub. 2563 */ 2564 break; 2565 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2566 if (len > 0) { 2567 *(u_int8_t *)buf = sc->sc_conf; 2568 totlen = 1; 2569 } 2570 break; 2571 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2572 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 2573 switch(value >> 8) { 2574 case UDESC_DEVICE: 2575 if ((value & 0xff) != 0) { 2576 r = USBD_IOERROR; 2577 goto ret; 2578 } 2579 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2580 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 2581 memcpy(buf, &uhci_devd, l); 2582 break; 2583 case UDESC_CONFIG: 2584 if ((value & 0xff) != 0) { 2585 r = USBD_IOERROR; 2586 goto ret; 2587 } 2588 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2589 memcpy(buf, &uhci_confd, l); 2590 buf = (char *)buf + l; 2591 len -= l; 2592 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2593 totlen += l; 2594 memcpy(buf, &uhci_ifcd, l); 2595 buf = (char *)buf + l; 2596 len -= l; 2597 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2598 totlen += l; 2599 memcpy(buf, &uhci_endpd, l); 2600 break; 2601 case UDESC_STRING: 2602 if (len == 0) 2603 break; 2604 *(u_int8_t *)buf = 0; 2605 totlen = 1; 2606 switch (value & 0xff) { 2607 case 1: /* Vendor */ 2608 totlen = uhci_str(buf, len, sc->sc_vendor); 2609 break; 2610 case 2: /* Product */ 2611 totlen = uhci_str(buf, len, "UHCI root hub"); 2612 break; 2613 } 2614 break; 2615 default: 2616 r = USBD_IOERROR; 2617 goto ret; 2618 } 2619 break; 2620 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2621 if (len > 0) { 2622 *(u_int8_t *)buf = 0; 2623 totlen = 1; 2624 } 2625 break; 2626 case C(UR_GET_STATUS, UT_READ_DEVICE): 2627 if (len > 1) { 2628 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2629 totlen = 2; 2630 } 2631 break; 2632 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2633 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2634 if (len > 1) { 2635 USETW(((usb_status_t *)buf)->wStatus, 0); 2636 totlen = 2; 2637 } 2638 break; 2639 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2640 if (value >= USB_MAX_DEVICES) { 2641 r = USBD_IOERROR; 2642 goto ret; 2643 } 2644 sc->sc_addr = value; 2645 break; 2646 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2647 if (value != 0 && value != 1) { 2648 r = USBD_IOERROR; 2649 goto ret; 2650 } 2651 sc->sc_conf = value; 2652 break; 2653 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2654 break; 2655 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2656 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2657 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2658 r = USBD_IOERROR; 2659 goto ret; 2660 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2661 break; 2662 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2663 break; 2664 /* Hub requests */ 2665 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2666 break; 2667 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2668 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2669 "port=%d feature=%d\n", 2670 index, value)); 2671 if (index == 1) 2672 port = UHCI_PORTSC1; 2673 else if (index == 2) 2674 port = UHCI_PORTSC2; 2675 else { 2676 r = USBD_IOERROR; 2677 goto ret; 2678 } 2679 switch(value) { 2680 case UHF_PORT_ENABLE: 2681 x = UREAD2(sc, port); 2682 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 2683 break; 2684 case UHF_PORT_SUSPEND: 2685 x = UREAD2(sc, port); 2686 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 2687 break; 2688 case UHF_PORT_RESET: 2689 x = UREAD2(sc, port); 2690 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2691 break; 2692 case UHF_C_PORT_CONNECTION: 2693 x = UREAD2(sc, port); 2694 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 2695 break; 2696 case UHF_C_PORT_ENABLE: 2697 x = UREAD2(sc, port); 2698 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 2699 break; 2700 case UHF_C_PORT_OVER_CURRENT: 2701 x = UREAD2(sc, port); 2702 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 2703 break; 2704 case UHF_C_PORT_RESET: 2705 sc->sc_isreset = 0; 2706 r = USBD_NORMAL_COMPLETION; 2707 goto ret; 2708 case UHF_PORT_CONNECTION: 2709 case UHF_PORT_OVER_CURRENT: 2710 case UHF_PORT_POWER: 2711 case UHF_PORT_LOW_SPEED: 2712 case UHF_C_PORT_SUSPEND: 2713 default: 2714 r = USBD_IOERROR; 2715 goto ret; 2716 } 2717 break; 2718 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 2719 if (index == 1) 2720 port = UHCI_PORTSC1; 2721 else if (index == 2) 2722 port = UHCI_PORTSC2; 2723 else { 2724 r = USBD_IOERROR; 2725 goto ret; 2726 } 2727 if (len > 0) { 2728 *(u_int8_t *)buf = 2729 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 2730 UHCI_PORTSC_LS_SHIFT; 2731 totlen = 1; 2732 } 2733 break; 2734 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2735 if (value != 0) { 2736 r = USBD_IOERROR; 2737 goto ret; 2738 } 2739 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 2740 totlen = l; 2741 memcpy(buf, &uhci_hubd_piix, l); 2742 break; 2743 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2744 if (len != 4) { 2745 r = USBD_IOERROR; 2746 goto ret; 2747 } 2748 memset(buf, 0, len); 2749 totlen = len; 2750 break; 2751 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2752 if (index == 1) 2753 port = UHCI_PORTSC1; 2754 else if (index == 2) 2755 port = UHCI_PORTSC2; 2756 else { 2757 r = USBD_IOERROR; 2758 goto ret; 2759 } 2760 if (len != 4) { 2761 r = USBD_IOERROR; 2762 goto ret; 2763 } 2764 x = UREAD2(sc, port); 2765 status = change = 0; 2766 if (x & UHCI_PORTSC_CCS ) 2767 status |= UPS_CURRENT_CONNECT_STATUS; 2768 if (x & UHCI_PORTSC_CSC ) 2769 change |= UPS_C_CONNECT_STATUS; 2770 if (x & UHCI_PORTSC_PE ) 2771 status |= UPS_PORT_ENABLED; 2772 if (x & UHCI_PORTSC_POEDC) 2773 change |= UPS_C_PORT_ENABLED; 2774 if (x & UHCI_PORTSC_OCI ) 2775 status |= UPS_OVERCURRENT_INDICATOR; 2776 if (x & UHCI_PORTSC_OCIC ) 2777 change |= UPS_C_OVERCURRENT_INDICATOR; 2778 if (x & UHCI_PORTSC_SUSP ) 2779 status |= UPS_SUSPEND; 2780 if (x & UHCI_PORTSC_LSDA ) 2781 status |= UPS_LOW_SPEED; 2782 status |= UPS_PORT_POWER; 2783 if (sc->sc_isreset) 2784 change |= UPS_C_PORT_RESET; 2785 USETW(ps.wPortStatus, status); 2786 USETW(ps.wPortChange, change); 2787 l = min(len, sizeof ps); 2788 memcpy(buf, &ps, l); 2789 totlen = l; 2790 break; 2791 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2792 r = USBD_IOERROR; 2793 goto ret; 2794 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2795 break; 2796 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2797 if (index == 1) 2798 port = UHCI_PORTSC1; 2799 else if (index == 2) 2800 port = UHCI_PORTSC2; 2801 else { 2802 r = USBD_IOERROR; 2803 goto ret; 2804 } 2805 switch(value) { 2806 case UHF_PORT_ENABLE: 2807 x = UREAD2(sc, port); 2808 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2809 break; 2810 case UHF_PORT_SUSPEND: 2811 x = UREAD2(sc, port); 2812 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 2813 break; 2814 case UHF_PORT_RESET: 2815 x = UREAD2(sc, port); 2816 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2817 usb_delay_ms(&sc->sc_bus, 10); 2818 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2819 delay(100); 2820 x = UREAD2(sc, port); 2821 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2822 delay(100); 2823 DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n", 2824 index, UREAD2(sc, port))); 2825 sc->sc_isreset = 1; 2826 break; 2827 case UHF_C_PORT_CONNECTION: 2828 case UHF_C_PORT_ENABLE: 2829 case UHF_C_PORT_OVER_CURRENT: 2830 case UHF_PORT_CONNECTION: 2831 case UHF_PORT_OVER_CURRENT: 2832 case UHF_PORT_POWER: 2833 case UHF_PORT_LOW_SPEED: 2834 case UHF_C_PORT_SUSPEND: 2835 case UHF_C_PORT_RESET: 2836 default: 2837 r = USBD_IOERROR; 2838 goto ret; 2839 } 2840 break; 2841 default: 2842 r = USBD_IOERROR; 2843 goto ret; 2844 } 2845 reqh->actlen = totlen; 2846 r = USBD_NORMAL_COMPLETION; 2847 ret: 2848 reqh->status = r; 2849 reqh->hcpriv = 0; 2850 s = splusb(); 2851 usb_transfer_complete(reqh); 2852 splx(s); 2853 return (USBD_IN_PROGRESS); 2854 } 2855 2856 /* Abort a root control request. */ 2857 void 2858 uhci_root_ctrl_abort(reqh) 2859 usbd_request_handle reqh; 2860 { 2861 /* Nothing to do, all transfers are syncronous. */ 2862 } 2863 2864 /* Close the root pipe. */ 2865 void 2866 uhci_root_ctrl_close(pipe) 2867 usbd_pipe_handle pipe; 2868 { 2869 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2870 2871 sc->sc_has_timo = 0; 2872 DPRINTF(("uhci_root_ctrl_close\n")); 2873 } 2874 2875 /* Abort a root interrupt request. */ 2876 void 2877 uhci_root_intr_abort(reqh) 2878 usbd_request_handle reqh; 2879 { 2880 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 2881 2882 usb_untimeout(uhci_timo, reqh, reqh->timo_handle); 2883 sc->sc_has_timo = 0; 2884 2885 if (reqh->pipe->intrreqh == reqh) { 2886 DPRINTF(("uhci_root_intr_abort: remove\n")); 2887 reqh->pipe->intrreqh = 0; 2888 } 2889 reqh->status = USBD_CANCELLED; 2890 usb_transfer_complete(reqh); 2891 } 2892 2893 usbd_status 2894 uhci_root_intr_transfer(reqh) 2895 usbd_request_handle reqh; 2896 { 2897 usbd_status r; 2898 2899 /* Insert last in queue. */ 2900 r = usb_insert_transfer(reqh); 2901 if (r != USBD_NORMAL_COMPLETION) 2902 return (r); 2903 2904 /* Pipe isn't running, start first */ 2905 return (uhci_root_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 2906 } 2907 2908 /* Start a transfer on the root interrupt pipe */ 2909 usbd_status 2910 uhci_root_intr_start(reqh) 2911 usbd_request_handle reqh; 2912 { 2913 usbd_pipe_handle pipe = reqh->pipe; 2914 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2915 2916 DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p len=%d flags=%d\n", 2917 reqh, reqh->length, reqh->flags)); 2918 2919 sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval); 2920 usb_timeout(uhci_timo, reqh, sc->sc_ival, reqh->timo_handle); 2921 sc->sc_has_timo = reqh; 2922 return (USBD_IN_PROGRESS); 2923 } 2924 2925 /* Close the root interrupt pipe. */ 2926 void 2927 uhci_root_intr_close(pipe) 2928 usbd_pipe_handle pipe; 2929 { 2930 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2931 2932 usb_untimeout(uhci_timo, pipe->intrreqh, pipe->intrreqh->timo_handle); 2933 sc->sc_has_timo = 0; 2934 DPRINTF(("uhci_root_intr_close\n")); 2935 } 2936 2937
Indexes created Wed Sep 24 05:09:52 GMT 2025