uhci.c revision 1.8
1 /* $NetBSD: uhci.c,v 1.8 1998/07/26 17:42:48 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Author: Lennart Augustsson <augustss (at) carlstedt.se> 8 * Carlstedt Research & Technology 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Universal Host Controller driver. 41 * Handles PIIX3 and PIIX4. 42 * 43 * Data sheets: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 44 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 45 * UHCI spec: http://www.intel.com/design/usb/uhci11d.pdf 46 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl 47 */ 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/kernel.h> 52 #include <sys/malloc.h> 53 #include <sys/device.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/select.h> 57 58 #include <machine/bus.h> 59 60 #include <dev/usb/usb.h> 61 #include <dev/usb/usbdi.h> 62 #include <dev/usb/usbdivar.h> 63 #include <dev/usb/usb_mem.h> 64 #include <dev/usb/usb_quirks.h> 65 66 #include <dev/usb/uhcireg.h> 67 #include <dev/usb/uhcivar.h> 68 69 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 70 71 struct uhci_pipe { 72 struct usbd_pipe pipe; 73 uhci_intr_info_t *iinfo; 74 int newtoggle; 75 /* Info needed for different pipe kinds. */ 76 union { 77 /* Control pipe */ 78 struct { 79 uhci_soft_qh_t *sqh; 80 usb_dma_t reqdma; 81 usb_dma_t datadma; 82 uhci_soft_td_t *setup, *stat, *xferend; 83 u_int length; 84 } ctl; 85 /* Interrupt pipe */ 86 struct { 87 usb_dma_t datadma; 88 int npoll; 89 uhci_soft_qh_t **qhs; 90 } intr; 91 /* Bulk pipe */ 92 struct { 93 uhci_soft_qh_t *sqh; 94 usb_dma_t datadma; 95 u_int length; 96 int isread; 97 } bulk; 98 } u; 99 }; 100 101 /* 102 * The uhci_intr_info free list can be global since they contain 103 * no dma specific data. The other free lists do. 104 */ 105 int uhci_global_init_done = 0; 106 LIST_HEAD(, uhci_intr_info) uhci_ii_free; 107 108 void uhci_busreset __P((uhci_softc_t *)); 109 void uhci_run __P((uhci_softc_t *, int run)); 110 uhci_soft_td_t *uhci_alloc_std __P((uhci_softc_t *)); 111 void uhci_free_std __P((uhci_softc_t *, uhci_soft_td_t *)); 112 uhci_soft_qh_t *uhci_alloc_sqh __P((uhci_softc_t *)); 113 void uhci_free_sqh __P((uhci_softc_t *, uhci_soft_qh_t *)); 114 uhci_intr_info_t *uhci_alloc_intr_info __P((uhci_softc_t *)); 115 void uhci_free_intr_info __P((uhci_intr_info_t *ii)); 116 void uhci_enter_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *, 117 uhci_intr_info_t *)); 118 void uhci_exit_ctl_q __P((uhci_softc_t *, uhci_soft_qh_t *)); 119 120 void uhci_free_std_chain __P((uhci_softc_t *, 121 uhci_soft_td_t *, uhci_soft_td_t *)); 122 usbd_status uhci_alloc_std_chain __P((struct uhci_pipe *, uhci_softc_t *, 123 int, int, usb_dma_t *, 124 uhci_soft_td_t **, 125 uhci_soft_td_t **)); 126 void uhci_timo __P((void *)); 127 void uhci_waitintr __P((uhci_softc_t *, usbd_request_handle)); 128 void uhci_check_intr __P((uhci_softc_t *, uhci_intr_info_t *)); 129 void uhci_ii_done __P((uhci_intr_info_t *, int)); 130 void uhci_timeout __P((void *)); 131 void uhci_wakeup_ctrl __P((void *, int, int, void *, int)); 132 void uhci_lock_frames __P((uhci_softc_t *)); 133 void uhci_unlock_frames __P((uhci_softc_t *)); 134 void uhci_add_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 135 void uhci_add_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 136 void uhci_remove_ctrl __P((uhci_softc_t *, uhci_soft_qh_t *)); 137 void uhci_remove_bulk __P((uhci_softc_t *, uhci_soft_qh_t *)); 138 int uhci_str __P((usb_string_descriptor_t *, int, char *)); 139 140 void uhci_device_close __P((struct uhci_pipe *)); 141 142 void uhci_wakeup_cb __P((usbd_request_handle reqh)); 143 144 usbd_status uhci_device_ctrl_transfer __P((usbd_request_handle)); 145 void uhci_device_ctrl_abort __P((usbd_request_handle)); 146 void uhci_device_ctrl_close __P((usbd_pipe_handle)); 147 usbd_status uhci_device_intr_transfer __P((usbd_request_handle)); 148 void uhci_device_intr_abort __P((usbd_request_handle)); 149 void uhci_device_intr_close __P((usbd_pipe_handle)); 150 usbd_status uhci_device_bulk_transfer __P((usbd_request_handle)); 151 void uhci_device_bulk_abort __P((usbd_request_handle)); 152 void uhci_device_bulk_close __P((usbd_pipe_handle)); 153 154 usbd_status uhci_root_ctrl_transfer __P((usbd_request_handle)); 155 void uhci_root_ctrl_abort __P((usbd_request_handle)); 156 void uhci_root_ctrl_close __P((usbd_pipe_handle)); 157 usbd_status uhci_root_intr_transfer __P((usbd_request_handle)); 158 void uhci_root_intr_abort __P((usbd_request_handle)); 159 void uhci_root_intr_close __P((usbd_pipe_handle)); 160 161 usbd_status uhci_open __P((usbd_pipe_handle)); 162 void uhci_poll __P((struct usbd_bus *)); 163 164 usbd_status uhci_device_request __P((usbd_request_handle reqh)); 165 void uhci_ctrl_done __P((uhci_intr_info_t *ii)); 166 void uhci_bulk_done __P((uhci_intr_info_t *ii)); 167 168 void uhci_add_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 169 void uhci_remove_intr __P((uhci_softc_t *, int, uhci_soft_qh_t *)); 170 usbd_status uhci_device_setintr __P((uhci_softc_t *sc, 171 struct uhci_pipe *pipe, int ival)); 172 void uhci_intr_done __P((uhci_intr_info_t *ii)); 173 174 #ifdef USB_DEBUG 175 static void uhci_dumpregs __P((uhci_softc_t *)); 176 void uhci_dump_tds __P((uhci_soft_td_t *)); 177 void uhci_dump_qh __P((uhci_soft_qh_t *)); 178 void uhci_dump __P((void)); 179 void uhci_dump_td __P((uhci_soft_td_t *)); 180 #endif 181 182 #define UWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)) 183 #define UWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 184 #define UREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 185 #define UREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 186 187 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 188 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 189 190 #define UHCI_RESET_TIMEOUT 100 /* reset timeout */ 191 #define UHCI_CTRL_TIMEOUT 500 /* control transaction timeout */ 192 #define UHCI_ISO_DELAY 50 /* delay of start of iso */ 193 194 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 195 196 #define UHCI_INTR_ENDPT 1 197 198 struct usbd_methods uhci_root_ctrl_methods = { 199 uhci_root_ctrl_transfer, 200 uhci_root_ctrl_abort, 201 uhci_root_ctrl_close, 202 }; 203 204 struct usbd_methods uhci_root_intr_methods = { 205 uhci_root_intr_transfer, 206 uhci_root_intr_abort, 207 uhci_root_intr_close, 208 }; 209 210 struct usbd_methods uhci_device_ctrl_methods = { 211 uhci_device_ctrl_transfer, 212 uhci_device_ctrl_abort, 213 uhci_device_ctrl_close, 214 }; 215 216 struct usbd_methods uhci_device_intr_methods = { 217 uhci_device_intr_transfer, 218 uhci_device_intr_abort, 219 uhci_device_intr_close, 220 }; 221 222 struct usbd_methods uhci_device_bulk_methods = { 223 uhci_device_bulk_transfer, 224 uhci_device_bulk_abort, 225 uhci_device_bulk_close, 226 }; 227 228 void 229 uhci_busreset(sc) 230 uhci_softc_t *sc; 231 { 232 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 233 usbd_delay_ms(USB_RESET_DELAY); /* wait at least 10ms */ 234 UHCICMD(sc, 0); /* do nothing */ 235 } 236 237 usbd_status 238 uhci_init(sc) 239 uhci_softc_t *sc; 240 { 241 usbd_status r; 242 int i, j; 243 uhci_soft_qh_t *csqh, *bsqh, *sqh; 244 uhci_soft_td_t *std; 245 usb_dma_t dma; 246 247 DPRINTFN(1,("uhci_init: start\n")); 248 249 if (!uhci_global_init_done) { 250 uhci_global_init_done = 1; 251 LIST_INIT(&uhci_ii_free); 252 } 253 254 #if defined(USB_DEBUG) 255 if (uhcidebug > 2) 256 uhci_dumpregs(sc); 257 #endif 258 259 uhci_run(sc, 0); /* stop the controller */ 260 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 261 262 /* Allocate and initialize real frame array. */ 263 r = usb_allocmem(sc->sc_dmatag, 264 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 265 UHCI_FRAMELIST_ALIGN, &dma); 266 if (r != USBD_NORMAL_COMPLETION) 267 return (r); 268 sc->sc_pframes = KERNADDR(&dma); 269 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 270 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&dma)); /* set frame list */ 271 272 uhci_busreset(sc); 273 274 /* Allocate the dummy QH where bulk traffic will be queued. */ 275 bsqh = uhci_alloc_sqh(sc); 276 if (!bsqh) 277 return (USBD_NOMEM); 278 bsqh->qh->qh_hlink = UHCI_PTR_T; /* end of QH chain */ 279 bsqh->qh->qh_elink = UHCI_PTR_T; 280 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 281 282 /* Allocate the dummy QH where control traffic will be queued. */ 283 csqh = uhci_alloc_sqh(sc); 284 if (!csqh) 285 return (USBD_NOMEM); 286 csqh->qh->hlink = bsqh; 287 csqh->qh->qh_hlink = bsqh->physaddr | UHCI_PTR_Q; 288 csqh->qh->qh_elink = UHCI_PTR_T; 289 sc->sc_ctl_start = sc->sc_ctl_end = csqh; 290 291 /* 292 * Make all (virtual) frame list pointers point to the interrupt 293 * queue heads and the interrupt queue heads at the control 294 * queue head and point the physical frame list to the virtual. 295 */ 296 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 297 std = uhci_alloc_std(sc); 298 sqh = uhci_alloc_sqh(sc); 299 if (!std || !sqh) 300 return (ENOMEM); 301 std->td->link.sqh = sqh; 302 std->td->td_link = sqh->physaddr | UHCI_PTR_Q; 303 std->td->td_status = UHCI_TD_IOS; /* iso, inactive */ 304 std->td->td_token = 0; 305 std->td->td_buffer = 0; 306 sqh->qh->hlink = csqh; 307 sqh->qh->qh_hlink = csqh->physaddr | UHCI_PTR_Q; 308 sqh->qh->elink = 0; 309 sqh->qh->qh_elink = UHCI_PTR_T; 310 sc->sc_vframes[i].htd = std; 311 sc->sc_vframes[i].etd = std; 312 sc->sc_vframes[i].hqh = sqh; 313 sc->sc_vframes[i].eqh = sqh; 314 for (j = i; 315 j < UHCI_FRAMELIST_COUNT; 316 j += UHCI_VFRAMELIST_COUNT) 317 sc->sc_pframes[j] = std->physaddr; 318 } 319 320 LIST_INIT(&sc->sc_intrhead); 321 322 /* Set up the bus struct. */ 323 sc->sc_bus.open_pipe = uhci_open; 324 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 325 sc->sc_bus.do_poll = uhci_poll; 326 327 DPRINTFN(1,("uhci_init: enabling\n")); 328 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 329 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 330 331 uhci_run(sc, 1); /* and here we go... */ 332 return (USBD_NORMAL_COMPLETION); 333 } 334 335 #ifdef USB_DEBUG 336 static void 337 uhci_dumpregs(sc) 338 uhci_softc_t *sc; 339 { 340 printf("%s: regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 341 sc->sc_bus.bdev.dv_xname, 342 UREAD2(sc, UHCI_CMD), 343 UREAD2(sc, UHCI_STS), 344 UREAD2(sc, UHCI_INTR), 345 UREAD2(sc, UHCI_FRNUM), 346 UREAD2(sc, UHCI_FLBASEADDR), 347 UREAD2(sc, UHCI_SOF), 348 UREAD2(sc, UHCI_PORTSC1), 349 UREAD2(sc, UHCI_PORTSC2)); 350 } 351 352 int uhci_longtd = 1; 353 354 void 355 uhci_dump_td(p) 356 uhci_soft_td_t *p; 357 { 358 printf("TD(%p) at %08lx = 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", 359 p, (long)p->physaddr, 360 (long)p->td->td_link, 361 (long)p->td->td_status, 362 (long)p->td->td_token, 363 (long)p->td->td_buffer); 364 if (uhci_longtd) 365 printf(" %b %b,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,D=%d,maxlen=%d\n", 366 (long)p->td->td_link, 367 "\20\1T\2Q\3VF", 368 (long)p->td->td_status, 369 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 370 UHCI_TD_GET_ERRCNT(p->td->td_status), 371 UHCI_TD_GET_ACTLEN(p->td->td_status), 372 UHCI_TD_GET_PID(p->td->td_token), 373 UHCI_TD_GET_DEVADDR(p->td->td_token), 374 UHCI_TD_GET_ENDPT(p->td->td_token), 375 UHCI_TD_GET_DT(p->td->td_token), 376 UHCI_TD_GET_MAXLEN(p->td->td_token)); 377 378 } 379 380 void 381 uhci_dump_qh(p) 382 uhci_soft_qh_t *p; 383 { 384 printf("QH(%p) at %08x: hlink=%08x elink=%08x\n", p, (int)p->physaddr, 385 p->qh->qh_hlink, p->qh->qh_elink); 386 } 387 388 #if 0 389 void 390 uhci_dump() 391 { 392 uhci_softc_t *sc = uhci; 393 394 uhci_dumpregs(sc); 395 printf("intrs=%d\n", sc->sc_intrs); 396 printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link); 397 uhci_dump_qh(sc->sc_ctl_start->qh->hlink); 398 } 399 #endif 400 401 void 402 uhci_dump_tds(std) 403 uhci_soft_td_t *std; 404 { 405 uhci_soft_td_t *p; 406 407 for(p = std; p; p = p->td->link.std) 408 uhci_dump_td(p); 409 } 410 #endif 411 412 /* 413 * This routine is executed periodically and simulates interrupts 414 * from the root controller interrupt pipe for port status change. 415 */ 416 void 417 uhci_timo(addr) 418 void *addr; 419 { 420 usbd_request_handle reqh = addr; 421 usbd_pipe_handle pipe = reqh->pipe; 422 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 423 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 424 int s; 425 u_char *p; 426 427 DPRINTFN(15, ("uhci_timo\n")); 428 429 p = KERNADDR(&upipe->u.intr.datadma); 430 p[0] = 0; 431 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 432 p[0] |= 1<<1; 433 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 434 p[0] |= 1<<2; 435 if (p[0] != 0) { 436 reqh->actlen = 1; 437 reqh->status = USBD_NORMAL_COMPLETION; 438 s = splusb(); 439 reqh->xfercb(reqh); 440 splx(s); 441 } 442 if (reqh->pipe->intrreqh == reqh) { 443 timeout(uhci_timo, addr, sc->sc_ival); 444 } else { 445 usb_freemem(sc->sc_dmatag, &upipe->u.intr.datadma); 446 } 447 } 448 449 450 void 451 uhci_lock_frames(sc) 452 uhci_softc_t *sc; 453 { 454 int s = splusb(); 455 while (sc->sc_vflock) { 456 sc->sc_vflock |= UHCI_WANT_LOCK; 457 tsleep(&sc->sc_vflock, PRIBIO, "uhcqhl", 0); 458 } 459 sc->sc_vflock = UHCI_HAS_LOCK; 460 splx(s); 461 } 462 463 void 464 uhci_unlock_frames(sc) 465 uhci_softc_t *sc; 466 { 467 int s = splusb(); 468 sc->sc_vflock &= ~UHCI_HAS_LOCK; 469 if (sc->sc_vflock & UHCI_WANT_LOCK) 470 wakeup(&sc->sc_vflock); 471 splx(s); 472 } 473 474 /* 475 * Allocate an interrupt information struct. A free list is kept 476 * for fast allocation. 477 */ 478 uhci_intr_info_t * 479 uhci_alloc_intr_info(sc) 480 uhci_softc_t *sc; 481 { 482 uhci_intr_info_t *ii; 483 484 ii = LIST_FIRST(&uhci_ii_free); 485 if (ii) 486 LIST_REMOVE(ii, list); 487 else { 488 ii = malloc(sizeof(uhci_intr_info_t), M_USBDEV, M_NOWAIT); 489 } 490 ii->sc = sc; 491 return ii; 492 } 493 494 void 495 uhci_free_intr_info(ii) 496 uhci_intr_info_t *ii; 497 { 498 LIST_INSERT_HEAD(&uhci_ii_free, ii, list); /* and put on free list */ 499 } 500 501 /* Add control QH, called at splusb(). */ 502 void 503 uhci_add_ctrl(sc, sqh) 504 uhci_softc_t *sc; 505 uhci_soft_qh_t *sqh; 506 { 507 uhci_qh_t *eqh; 508 509 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 510 eqh = sc->sc_ctl_end->qh; 511 sqh->qh->hlink = eqh->hlink; 512 sqh->qh->qh_hlink = eqh->qh_hlink; 513 eqh->hlink = sqh; 514 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 515 sc->sc_ctl_end = sqh; 516 } 517 518 /* Remove control QH, called at splusb(). */ 519 void 520 uhci_remove_ctrl(sc, sqh) 521 uhci_softc_t *sc; 522 uhci_soft_qh_t *sqh; 523 { 524 uhci_soft_qh_t *pqh; 525 526 DPRINTFN(10, ("uhci_remove_ctrl: sqh=%p\n", sqh)); 527 for (pqh = sc->sc_ctl_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink) 528 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 529 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 530 printf("uhci_remove_ctrl: QH not found\n"); 531 return; 532 } 533 #else 534 ; 535 #endif 536 pqh->qh->hlink = sqh->qh->hlink; 537 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 538 if (sc->sc_ctl_end == sqh) 539 sc->sc_ctl_end = pqh; 540 } 541 542 /* Add bulk QH, called at splusb(). */ 543 void 544 uhci_add_bulk(sc, sqh) 545 uhci_softc_t *sc; 546 uhci_soft_qh_t *sqh; 547 { 548 uhci_qh_t *eqh; 549 550 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 551 eqh = sc->sc_bulk_end->qh; 552 sqh->qh->hlink = eqh->hlink; 553 sqh->qh->qh_hlink = eqh->qh_hlink; 554 eqh->hlink = sqh; 555 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 556 sc->sc_bulk_end = sqh; 557 } 558 559 /* Remove bulk QH, called at splusb(). */ 560 void 561 uhci_remove_bulk(sc, sqh) 562 uhci_softc_t *sc; 563 uhci_soft_qh_t *sqh; 564 { 565 uhci_soft_qh_t *pqh; 566 567 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 568 for (pqh = sc->sc_bulk_start; pqh->qh->hlink != sqh; pqh=pqh->qh->hlink) 569 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 570 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 571 printf("uhci_remove_bulk: QH not found\n"); 572 return; 573 } 574 #else 575 ; 576 #endif 577 pqh->qh->hlink = sqh->qh->hlink; 578 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 579 if (sc->sc_bulk_end == sqh) 580 sc->sc_bulk_end = pqh; 581 } 582 583 int 584 uhci_intr(p) 585 void *p; 586 { 587 uhci_softc_t *sc = p; 588 int status, ret; 589 uhci_intr_info_t *ii; 590 591 sc->sc_intrs++; 592 #if defined(USB_DEBUG) 593 if (uhcidebug > 9) { 594 DPRINTF(("uhci_intr %s, %p\n", sc->sc_bus.bdev.dv_xname, sc)); 595 uhci_dumpregs(sc); 596 } 597 #endif 598 status = UREAD2(sc, UHCI_STS); 599 ret = 0; 600 if (status & UHCI_STS_USBINT) { 601 UWRITE2(sc, UHCI_STS, UHCI_STS_USBINT); /* acknowledge */ 602 ret = 1; 603 } 604 if (status & UHCI_STS_USBEI) { 605 UWRITE2(sc, UHCI_STS, UHCI_STS_USBEI); /* acknowledge */ 606 ret = 1; 607 } 608 if (status & UHCI_STS_RD) { 609 UWRITE2(sc, UHCI_STS, UHCI_STS_RD); /* acknowledge */ 610 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 611 ret = 1; 612 } 613 if (status & UHCI_STS_HSE) { 614 UWRITE2(sc, UHCI_STS, UHCI_STS_HSE); /* acknowledge */ 615 printf("%s: Host System Error\n", sc->sc_bus.bdev.dv_xname); 616 ret = 1; 617 } 618 if (status & UHCI_STS_HCPE) { 619 UWRITE2(sc, UHCI_STS, UHCI_STS_HCPE); /* acknowledge */ 620 printf("%s: Host System Error\n", sc->sc_bus.bdev.dv_xname); 621 ret = 1; 622 } 623 if (status & UHCI_STS_HCH) { 624 printf("%s: controller halted\n", sc->sc_bus.bdev.dv_xname); 625 } 626 if (!ret) 627 return 0; 628 629 /* 630 * Interrupts on UHCI really suck. When the host controller 631 * interrupts because a transfer is completed there is no 632 * way of knowing which transfer it was. You can scan down 633 * the TDs and QHs of the previous frame to limit the search, 634 * but that assumes that the interrupt was not delayed by more 635 * than 1 ms, which may not always be true (e.g. after debug 636 * output on a slow console). 637 * We scan all interrupt descriptors to see if any have 638 * completed. 639 */ 640 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 641 uhci_check_intr(sc, ii); 642 643 DPRINTFN(10, ("uhci_intr: exit\n")); 644 return 1; 645 } 646 647 /* Check for an interrupt. */ 648 void 649 uhci_check_intr(sc, ii) 650 uhci_softc_t *sc; 651 uhci_intr_info_t *ii; 652 { 653 struct uhci_pipe *upipe; 654 uhci_soft_td_t *std, *lstd; 655 656 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 657 #ifdef DIAGNOSTIC 658 if (!ii) { 659 printf("uhci_check_intr: no ii? %p\n", ii); 660 return; 661 } 662 #endif 663 if (!ii->stdstart) 664 return; 665 lstd = ii->stdend; 666 #ifdef DIAGNOSTIC 667 if (!lstd) { 668 printf("uhci_check_intr: std==0\n"); 669 return; 670 } 671 #endif 672 /* If the last TD is still active the whole transfer probably is. */ 673 if (lstd->td->td_status & UHCI_TD_ACTIVE) { 674 DPRINTFN(15, ("uhci_check_intr: active ii=%p\n", ii)); 675 for (std = ii->stdstart; std != lstd; std = std->td->link.std) 676 if (std->td->td_status & UHCI_TD_STALLED) 677 goto done; 678 DPRINTFN(15, ("uhci_check_intr: ii=%p still active\n", ii)); 679 return; 680 } 681 done: 682 upipe = (struct uhci_pipe *)ii->reqh->pipe; 683 upipe->pipe.endpoint->toggle = upipe->newtoggle; 684 uhci_ii_done(ii, 0); 685 untimeout(uhci_timeout, ii); 686 } 687 688 void 689 uhci_ii_done(ii, timo) 690 uhci_intr_info_t *ii; 691 int timo; 692 { 693 usbd_request_handle reqh = ii->reqh; 694 uhci_soft_td_t *std; 695 u_int32_t tst; 696 int len, status; 697 698 DPRINTFN(10, ("uhci_ii_done: ii=%p ready %d\n", ii, timo)); 699 700 #ifdef DIAGNOSTIC 701 { 702 int s = splhigh(); 703 if (ii->isdone) { 704 printf("uhci_ii_done: is done!\n"); 705 splx(s); 706 return; 707 } 708 ii->isdone = 1; 709 splx(s); 710 } 711 #endif 712 713 /* The transfer is done, compute length and status. */ 714 for (len = status = 0, std = ii->stdstart; 715 std != 0; 716 std = std->td->link.std) { 717 tst = std->td->td_status; 718 status |= tst; 719 #ifdef USB_DEBUG 720 if ((tst & UHCI_TD_ERROR) && uhcidebug) { 721 printf("uhci_intr: intr error TD:\n"); 722 uhci_dump_td(std); 723 } 724 #endif 725 if (UHCI_TD_GET_PID(std->td->td_token) != UHCI_TD_PID_SETUP) 726 len += UHCI_TD_GET_ACTLEN(tst); 727 } 728 status &= UHCI_TD_ERROR; 729 DPRINTFN(10, ("uhci_check_intr: len=%d, status=0x%x\n", len, status)); 730 if (status != 0) { 731 DPRINTFN(-1+(status==UHCI_TD_STALLED), 732 ("uhci_intr: error, status 0x%b\n", (long)status, 733 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27STALLED\30ACTIVE")); 734 if (status == UHCI_TD_STALLED) 735 reqh->status = USBD_STALLED; 736 else 737 reqh->status = USBD_IOERROR; /* more info XXX */ 738 reqh->actlen = 0; 739 } else { 740 reqh->status = USBD_NORMAL_COMPLETION; 741 reqh->actlen = len; 742 } 743 if (timo) { 744 /* We got a timeout. Make sure transaction is not active. */ 745 reqh->status = USBD_TIMEOUT; 746 for (std = ii->stdstart; std != 0; std = std->td->link.std) 747 std->td->td_status &= ~UHCI_TD_ACTIVE; 748 /* XXX should we wait 1 ms */ 749 } 750 DPRINTFN(5, ("uhci_intr: calling handler ii=%p\n", ii)); 751 752 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) { 753 case UE_CONTROL: 754 uhci_ctrl_done(ii); 755 break; 756 case UE_ISOCHRONOUS: 757 printf("uhci_ii_done: ISO??\n"); 758 break; 759 case UE_BULK: 760 uhci_bulk_done(ii); 761 break; 762 case UE_INTERRUPT: 763 uhci_intr_done(ii); 764 break; 765 } 766 767 /* And finally execute callback. */ 768 reqh->xfercb(reqh); 769 } 770 771 void 772 uhci_timeout(addr) 773 void *addr; 774 { 775 uhci_intr_info_t *ii = addr; 776 int s; 777 778 DPRINTF(("uhci_timeout: ii=%p\n", ii)); 779 s = splusb(); 780 uhci_ii_done(ii, 1); 781 splx(s); 782 } 783 784 /* 785 * Wait here until controller claims to have an interrupt. 786 * Then call uhci_intr and return. Use timeout to avoid waiting 787 * too long. 788 */ 789 void 790 uhci_waitintr(sc, reqh) 791 uhci_softc_t *sc; 792 usbd_request_handle reqh; 793 { 794 int timo = reqh->timeout; 795 int usecs; 796 797 reqh->status = USBD_IN_PROGRESS; 798 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 799 delay(1000); 800 DPRINTFN(10,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 801 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 802 uhci_intr(sc); 803 if (reqh->status != USBD_IN_PROGRESS) 804 return; 805 } 806 } 807 reqh->status = USBD_TIMEOUT; 808 reqh->xfercb(reqh); 809 } 810 811 void 812 uhci_poll(bus) 813 struct usbd_bus *bus; 814 { 815 uhci_softc_t *sc = (uhci_softc_t *)bus; 816 817 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 818 uhci_intr(sc); 819 } 820 821 #if 0 822 void 823 uhci_reset(p) 824 void *p; 825 { 826 uhci_softc_t *sc = p; 827 int n; 828 829 UHCICMD(sc, UHCI_CMD_HCRESET); 830 /* The reset bit goes low when the controller is done. */ 831 for (n = 0; n < UHCI_RESET_TIMEOUT && 832 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 833 delay(100); 834 if (n >= UHCI_RESET_TIMEOUT) 835 printf("%s: controller did not reset\n", sc->sc_bus.bdev.dv_xname); 836 } 837 #endif 838 839 void 840 uhci_run(sc, run) 841 uhci_softc_t *sc; 842 int run; 843 { 844 int s, n, running; 845 846 run = run != 0; 847 s = splusb(); /* XXX really? */ 848 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 849 if (run == running) { 850 splx(s); 851 return; 852 } 853 UWRITE2(sc, UHCI_CMD, run ? UHCI_CMD_RS : 0); 854 for(n = 0; n < 100; n++) { 855 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 856 /* return when we've entered the state we want */ 857 if (run == running) { 858 splx(s); 859 return; 860 } 861 } 862 splx(s); 863 printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname, run ? "start" : "stop"); 864 } 865 866 /* 867 * Memory management routines. 868 * uhci_alloc_std allocates TDs 869 * uhci_alloc_sqh allocates QHs 870 * These two routines do their own free list management, 871 * partly for speed, partly because allocating DMAable memory 872 * has page size granularaity so much memory would be wasted if 873 * only one TD/QH (32 bytes) was placed in each alloacted chunk. 874 */ 875 876 uhci_soft_td_t * 877 uhci_alloc_std(sc) 878 uhci_softc_t *sc; 879 { 880 uhci_soft_td_t *std; 881 usbd_status r; 882 int i; 883 usb_dma_t dma; 884 885 if (!sc->sc_freetds) { 886 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 887 std = malloc(sizeof(uhci_soft_td_t) * UHCI_TD_CHUNK, 888 M_USBDEV, M_NOWAIT); 889 if (!std) 890 return 0; 891 r = usb_allocmem(sc->sc_dmatag, UHCI_TD_SIZE * UHCI_TD_CHUNK, 892 UHCI_TD_ALIGN, &dma); 893 if (r != USBD_NORMAL_COMPLETION) { 894 free(std, M_USBDEV); 895 return 0; 896 } 897 for(i = 0; i < UHCI_TD_CHUNK; i++, std++) { 898 std->physaddr = DMAADDR(&dma) + 899 i * UHCI_TD_SIZE; 900 std->td = (uhci_td_t *) 901 ((char *)KERNADDR(&dma) + i * UHCI_TD_SIZE); 902 std->td->link.std = sc->sc_freetds; 903 sc->sc_freetds = std; 904 } 905 } 906 std = sc->sc_freetds; 907 sc->sc_freetds = std->td->link.std; 908 memset(std->td, 0, UHCI_TD_SIZE); 909 return std; 910 } 911 912 void 913 uhci_free_std(sc, std) 914 uhci_softc_t *sc; 915 uhci_soft_td_t *std; 916 { 917 #ifdef DIAGNOSTIC 918 #define TD_IS_FREE 0x12345678 919 if (std->td->td_token == TD_IS_FREE) { 920 printf("uhci_free_std: freeing free TD %p\n", std); 921 return; 922 } 923 std->td->td_token = TD_IS_FREE; 924 #endif 925 std->td->link.std = sc->sc_freetds; 926 sc->sc_freetds = std; 927 } 928 929 uhci_soft_qh_t * 930 uhci_alloc_sqh(sc) 931 uhci_softc_t *sc; 932 { 933 uhci_soft_qh_t *sqh; 934 usbd_status r; 935 int i, offs; 936 usb_dma_t dma; 937 938 if (!sc->sc_freeqhs) { 939 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 940 sqh = malloc(sizeof(uhci_soft_qh_t) * UHCI_QH_CHUNK, 941 M_USBDEV, M_NOWAIT); 942 if (!sqh) 943 return 0; 944 r = usb_allocmem(sc->sc_dmatag, UHCI_QH_SIZE * UHCI_QH_CHUNK, 945 UHCI_QH_ALIGN, &dma); 946 if (r != USBD_NORMAL_COMPLETION) { 947 free(sqh, M_USBDEV); 948 return 0; 949 } 950 for(i = 0; i < UHCI_QH_CHUNK; i++, sqh++) { 951 offs = i * UHCI_QH_SIZE; 952 sqh->physaddr = DMAADDR(&dma) + offs; 953 sqh->qh = (uhci_qh_t *) 954 ((char *)KERNADDR(&dma) + offs); 955 sqh->qh->hlink = sc->sc_freeqhs; 956 sc->sc_freeqhs = sqh; 957 } 958 } 959 sqh = sc->sc_freeqhs; 960 sc->sc_freeqhs = sqh->qh->hlink; 961 memset(sqh->qh, 0, UHCI_QH_SIZE); 962 return sqh; 963 } 964 965 void 966 uhci_free_sqh(sc, sqh) 967 uhci_softc_t *sc; 968 uhci_soft_qh_t *sqh; 969 { 970 sqh->qh->hlink = sc->sc_freeqhs; 971 sc->sc_freeqhs = sqh; 972 } 973 974 /* 975 * Enter a list of transfers onto a control queue. 976 * Called at splusb() 977 */ 978 void 979 uhci_enter_ctl_q(sc, sqh, ii) 980 uhci_softc_t *sc; 981 uhci_soft_qh_t *sqh; 982 uhci_intr_info_t *ii; 983 { 984 DPRINTFN(5, ("uhci_enter_ctl_q: sqh=%p\n", sqh)); 985 986 } 987 988 void 989 uhci_free_std_chain(sc, std, stdend) 990 uhci_softc_t *sc; 991 uhci_soft_td_t *std; 992 uhci_soft_td_t *stdend; 993 { 994 uhci_soft_td_t *p; 995 996 for (; std != stdend; std = p) { 997 p = std->td->link.std; 998 uhci_free_std(sc, std); 999 } 1000 } 1001 1002 usbd_status 1003 uhci_alloc_std_chain(upipe, sc, len, rd, dma, sp, ep) 1004 struct uhci_pipe *upipe; 1005 uhci_softc_t *sc; 1006 int len, rd; 1007 usb_dma_t *dma; 1008 uhci_soft_td_t **sp, **ep; 1009 { 1010 uhci_soft_td_t *p, *lastp; 1011 uhci_physaddr_t lastlink; 1012 u_int32_t ls; 1013 int i, ntd, l, tog, maxp; 1014 int addr = upipe->pipe.device->address; 1015 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1016 1017 DPRINTFN(15, ("uhci_alloc_std_chain: len=%d\n", len)); 1018 if (len == 0) { 1019 *sp = *ep = 0; 1020 printf("uhci_alloc_std_chain: len=0\n"); 1021 return (USBD_NORMAL_COMPLETION); 1022 } 1023 ls = upipe->pipe.device->lowspeed ? UHCI_TD_LS : 0; 1024 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1025 if (maxp == 0) { 1026 printf("uhci_alloc_std_chain: maxp=0\n"); 1027 return (USBD_INVAL); 1028 } 1029 ntd = (len + maxp - 1) / maxp; 1030 tog = upipe->pipe.endpoint->toggle; 1031 if (ntd % 2 == 0) 1032 tog ^= 1; 1033 upipe->newtoggle = tog ^ 1; 1034 lastp = 0; 1035 lastlink = UHCI_PTR_T; 1036 ntd--; 1037 for (i = ntd; i >= 0; i--) { 1038 p = uhci_alloc_std(sc); 1039 if (!p) { 1040 uhci_free_std_chain(sc, lastp, 0); 1041 return (USBD_NOMEM); 1042 } 1043 p->td->link.std = lastp; 1044 p->td->td_link = lastlink; 1045 lastp = p; 1046 lastlink = p->physaddr; 1047 p->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE; 1048 if (i == ntd) { 1049 /* last TD */ 1050 l = len % maxp; 1051 if (l == 0) l = maxp; 1052 *ep = p; 1053 } else 1054 l = maxp; 1055 p->td->td_token = 1056 rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1057 UHCI_TD_OUT(l, endpt, addr, tog); 1058 p->td->td_buffer = DMAADDR(dma) + i * maxp; 1059 tog ^= 1; 1060 } 1061 *sp = lastp; 1062 /*upipe->pipe.endpoint->toggle = tog;*/ 1063 DPRINTFN(10, ("uhci_alloc_std_chain: oldtog=%d newtog=%d\n", 1064 upipe->pipe.endpoint->toggle, upipe->newtoggle)); 1065 return (USBD_NORMAL_COMPLETION); 1066 } 1067 1068 usbd_status 1069 uhci_device_bulk_transfer(reqh) 1070 usbd_request_handle reqh; 1071 { 1072 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1073 usbd_device_handle dev = upipe->pipe.device; 1074 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1075 uhci_intr_info_t *ii = upipe->iinfo; 1076 uhci_soft_td_t *xfer, *xferend; 1077 uhci_soft_qh_t *sqh; 1078 usb_dma_t *dmap; 1079 usbd_status r; 1080 int len, isread; 1081 int s; 1082 1083 DPRINTFN(3, ("uhci_device_bulk_transfer: reqh=%p buf=%p len=%d flags=%d\n", 1084 reqh, reqh->buffer, reqh->length, reqh->flags)); 1085 1086 if (reqh->isreq) 1087 panic("uhci_device_bulk_transfer: a request\n"); 1088 1089 len = reqh->length; 1090 dmap = &upipe->u.bulk.datadma; 1091 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 1092 sqh = upipe->u.bulk.sqh; 1093 1094 upipe->u.bulk.isread = isread; 1095 upipe->u.bulk.length = len; 1096 1097 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1098 if (r != USBD_NORMAL_COMPLETION) 1099 goto ret1; 1100 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1101 dmap, &xfer, &xferend); 1102 if (r != USBD_NORMAL_COMPLETION) 1103 goto ret2; 1104 xferend->td->td_status |= UHCI_TD_IOC; 1105 1106 if (!isread && len != 0) 1107 memcpy(KERNADDR(dmap), reqh->buffer, len); 1108 1109 #ifdef USB_DEBUG 1110 if (uhcidebug > 10) { 1111 printf("uhci_device_bulk_transfer: xfer(1)\n"); 1112 uhci_dump_tds(xfer); 1113 } 1114 #endif 1115 1116 /* Set up interrupt info. */ 1117 ii->reqh = reqh; 1118 ii->stdstart = xfer; 1119 ii->stdend = xferend; 1120 #ifdef DIAGNOSTIC 1121 ii->isdone = 0; 1122 #endif 1123 1124 sqh->qh->elink = xfer; 1125 sqh->qh->qh_elink = xfer->physaddr; 1126 sqh->intr_info = ii; 1127 1128 s = splusb(); 1129 uhci_add_bulk(sc, sqh); 1130 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1131 1132 if (reqh->timeout && !usbd_use_polling) 1133 timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout)); 1134 splx(s); 1135 1136 #ifdef USB_DEBUG 1137 if (uhcidebug > 10) { 1138 printf("uhci_device_bulk_transfer: xfer(2)\n"); 1139 uhci_dump_tds(xfer); 1140 } 1141 #endif 1142 1143 return (USBD_IN_PROGRESS); 1144 1145 ret2: 1146 if (len != 0) 1147 usb_freemem(sc->sc_dmatag, dmap); 1148 ret1: 1149 return (r); 1150 } 1151 1152 /* Abort a device bulk request. */ 1153 void 1154 uhci_device_bulk_abort(reqh) 1155 usbd_request_handle reqh; 1156 { 1157 /* XXX inactivate */ 1158 usbd_delay_ms(1); /* make sure it is finished */ 1159 /* XXX call done */ 1160 } 1161 1162 /* Close a device bulk pipe. */ 1163 void 1164 uhci_device_bulk_close(pipe) 1165 usbd_pipe_handle pipe; 1166 { 1167 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1168 usbd_device_handle dev = upipe->pipe.device; 1169 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1170 1171 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1172 uhci_free_intr_info(upipe->iinfo); 1173 /* XXX free other resources */ 1174 } 1175 1176 usbd_status 1177 uhci_device_ctrl_transfer(reqh) 1178 usbd_request_handle reqh; 1179 { 1180 usbd_status r; 1181 1182 if (!reqh->isreq) 1183 panic("uhci_device_ctrl_transfer: not a request\n"); 1184 1185 r = uhci_device_request(reqh); 1186 if (r != USBD_NORMAL_COMPLETION) 1187 return (r); 1188 1189 if (usbd_use_polling) 1190 uhci_waitintr((uhci_softc_t *)reqh->pipe->device->bus, reqh); 1191 return (USBD_IN_PROGRESS); 1192 } 1193 1194 usbd_status 1195 uhci_device_intr_transfer(reqh) 1196 usbd_request_handle reqh; 1197 { 1198 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1199 usbd_device_handle dev = upipe->pipe.device; 1200 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1201 uhci_intr_info_t *ii = upipe->iinfo; 1202 uhci_soft_td_t *xfer, *xferend; 1203 uhci_soft_qh_t *sqh; 1204 usb_dma_t *dmap; 1205 usbd_status r; 1206 int len, i; 1207 int s; 1208 1209 DPRINTFN(3, ("uhci_device_intr_transfer: reqh=%p buf=%p len=%d flags=%d\n", 1210 reqh, reqh->buffer, reqh->length, reqh->flags)); 1211 1212 if (reqh->isreq) 1213 panic("uhci_device_intr_transfer: a request\n"); 1214 1215 len = reqh->length; 1216 dmap = &upipe->u.intr.datadma; 1217 if (len == 0) 1218 return (USBD_INVAL); /* XXX should it be? */ 1219 1220 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1221 if (r != USBD_NORMAL_COMPLETION) 1222 goto ret1; 1223 r = uhci_alloc_std_chain(upipe, sc, len, 1, dmap, &xfer, &xferend); 1224 if (r != USBD_NORMAL_COMPLETION) 1225 goto ret2; 1226 xferend->td->td_status |= UHCI_TD_IOC; 1227 1228 #ifdef USB_DEBUG 1229 if (uhcidebug > 10) { 1230 printf("uhci_device_intr_transfer: xfer(1)\n"); 1231 uhci_dump_tds(xfer); 1232 uhci_dump_qh(upipe->u.intr.qhs[0]); 1233 } 1234 #endif 1235 1236 s = splusb(); 1237 /* Set up interrupt info. */ 1238 ii->reqh = reqh; 1239 ii->stdstart = xfer; 1240 ii->stdend = xferend; 1241 #ifdef DIAGNOSTIC 1242 ii->isdone = 0; 1243 #endif 1244 1245 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", upipe->u.intr.qhs[0])); 1246 for (i = 0; i < upipe->u.intr.npoll; i++) { 1247 sqh = upipe->u.intr.qhs[i]; 1248 sqh->qh->elink = xfer; 1249 sqh->qh->qh_elink = xfer->physaddr; 1250 } 1251 splx(s); 1252 1253 #ifdef USB_DEBUG 1254 if (uhcidebug > 10) { 1255 printf("uhci_device_intr_transfer: xfer(2)\n"); 1256 uhci_dump_tds(xfer); 1257 uhci_dump_qh(upipe->u.intr.qhs[0]); 1258 } 1259 #endif 1260 1261 return (USBD_IN_PROGRESS); 1262 1263 ret2: 1264 if (len != 0) 1265 usb_freemem(sc->sc_dmatag, dmap); 1266 ret1: 1267 return (r); 1268 } 1269 1270 /* Abort a device control request. */ 1271 void 1272 uhci_device_ctrl_abort(reqh) 1273 usbd_request_handle reqh; 1274 { 1275 /* XXX inactivate */ 1276 usbd_delay_ms(1); /* make sure it is finished */ 1277 /* XXX call done */ 1278 } 1279 1280 /* Close a device control pipe. */ 1281 void 1282 uhci_device_ctrl_close(pipe) 1283 usbd_pipe_handle pipe; 1284 { 1285 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1286 1287 uhci_free_intr_info(upipe->iinfo); 1288 /* XXX free other resources */ 1289 } 1290 1291 /* Abort a device interrupt request. */ 1292 void 1293 uhci_device_intr_abort(reqh) 1294 usbd_request_handle reqh; 1295 { 1296 struct uhci_pipe *upipe; 1297 1298 DPRINTFN(1, ("uhci_device_intr_abort: reqh=%p\n", reqh)); 1299 /* XXX inactivate */ 1300 usbd_delay_ms(2); /* make sure it is finished */ 1301 if (reqh->pipe->intrreqh == reqh) { 1302 DPRINTF(("uhci_device_intr_abort: remove\n")); 1303 reqh->pipe->intrreqh = 0; 1304 upipe = (struct uhci_pipe *)reqh->pipe; 1305 uhci_intr_done(upipe->u.intr.qhs[0]->intr_info); 1306 } 1307 } 1308 1309 /* Close a device interrupt pipe. */ 1310 void 1311 uhci_device_intr_close(pipe) 1312 usbd_pipe_handle pipe; 1313 { 1314 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1315 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 1316 int i, s, npoll; 1317 1318 upipe->iinfo->stdstart = 0; /* inactive */ 1319 1320 /* Unlink descriptors from controller data structures. */ 1321 npoll = upipe->u.intr.npoll; 1322 uhci_lock_frames(sc); 1323 for (i = 0; i < npoll; i++) 1324 uhci_remove_intr(sc, upipe->u.intr.qhs[i]->pos, 1325 upipe->u.intr.qhs[i]); 1326 uhci_unlock_frames(sc); 1327 1328 /* 1329 * We now have to wait for any activity on the physical 1330 * descriptors to stop. 1331 */ 1332 usbd_delay_ms(2); 1333 1334 for(i = 0; i < npoll; i++) 1335 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 1336 free(upipe->u.intr.qhs, M_USB); 1337 1338 s = splusb(); 1339 LIST_REMOVE(upipe->iinfo, list); /* remove from active list */ 1340 splx(s); 1341 uhci_free_intr_info(upipe->iinfo); 1342 1343 /* XXX free other resources */ 1344 } 1345 1346 usbd_status 1347 uhci_device_request(reqh) 1348 usbd_request_handle reqh; 1349 { 1350 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1351 usb_device_request_t *req = &reqh->request; 1352 usbd_device_handle dev = upipe->pipe.device; 1353 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1354 int addr = dev->address; 1355 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1356 uhci_intr_info_t *ii = upipe->iinfo; 1357 uhci_soft_td_t *setup, *xfer, *stat, *next, *xferend; 1358 uhci_soft_qh_t *sqh; 1359 usb_dma_t *dmap; 1360 int len; 1361 u_int32_t ls; 1362 usbd_status r; 1363 int isread; 1364 int s; 1365 1366 DPRINTFN(1,("uhci_device_control type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1367 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1368 UGETW(req->wIndex), UGETW(req->wLength), 1369 addr, endpt)); 1370 1371 ls = dev->lowspeed ? UHCI_TD_LS : 0; 1372 isread = req->bmRequestType & UT_READ; 1373 len = UGETW(req->wLength); 1374 1375 setup = upipe->u.ctl.setup; 1376 stat = upipe->u.ctl.stat; 1377 sqh = upipe->u.ctl.sqh; 1378 dmap = &upipe->u.ctl.datadma; 1379 1380 /* Set up data transaction */ 1381 if (len != 0) { 1382 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1383 if (r != USBD_NORMAL_COMPLETION) 1384 goto ret1; 1385 upipe->pipe.endpoint->toggle = 1; 1386 r = uhci_alloc_std_chain(upipe, sc, len, isread, 1387 dmap, &xfer, &xferend); 1388 if (r != USBD_NORMAL_COMPLETION) 1389 goto ret2; 1390 next = xfer; 1391 xferend->td->link.std = stat; 1392 xferend->td->td_link = stat->physaddr; 1393 } else { 1394 xfer = 0; 1395 next = stat; 1396 } 1397 upipe->u.ctl.length = len; 1398 upipe->u.ctl.xferend = xferend; 1399 1400 memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req); 1401 if (!isread && len != 0) 1402 memcpy(KERNADDR(dmap), reqh->buffer, len); 1403 1404 setup->td->link.std = next; 1405 setup->td->td_link = next->physaddr; 1406 setup->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | UHCI_TD_ACTIVE; 1407 setup->td->td_token = UHCI_TD_SETUP(sizeof *req, endpt, addr); 1408 setup->td->td_buffer = DMAADDR(&upipe->u.ctl.reqdma); 1409 1410 stat->td->link.std = 0; 1411 stat->td->td_link = UHCI_PTR_T; 1412 stat->td->td_status = UHCI_TD_SET_ERRCNT(2) | ls | 1413 UHCI_TD_ACTIVE | UHCI_TD_IOC; 1414 stat->td->td_token = 1415 isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 1416 UHCI_TD_IN (0, endpt, addr, 1); 1417 stat->td->td_buffer = 0; 1418 1419 #ifdef USB_DEBUG 1420 if (uhcidebug > 20) { 1421 printf("uhci_device_request: setup\n"); 1422 uhci_dump_td(setup); 1423 printf("uhci_device_request: stat\n"); 1424 uhci_dump_td(stat); 1425 } 1426 #endif 1427 1428 /* Set up interrupt info. */ 1429 ii->reqh = reqh; 1430 ii->stdstart = setup; 1431 ii->stdend = stat; 1432 #ifdef DIAGNOSTIC 1433 ii->isdone = 0; 1434 #endif 1435 1436 sqh->qh->elink = setup; 1437 sqh->qh->qh_elink = setup->physaddr; 1438 sqh->intr_info = ii; 1439 1440 s = splusb(); 1441 uhci_add_ctrl(sc, sqh); 1442 LIST_INSERT_HEAD(&sc->sc_intrhead, ii, list); 1443 #ifdef USB_DEBUG 1444 if (uhcidebug > 12) { 1445 uhci_soft_td_t *std; 1446 uhci_soft_qh_t *xqh; 1447 uhci_physaddr_t link; 1448 printf("uhci_enter_ctl_q: follow from [0]\n"); 1449 for (std = sc->sc_vframes[0].htd, link = 0; 1450 (link & UHCI_PTR_Q) == 0; 1451 std = std->td->link.std) { 1452 link = std->td->td_link; 1453 uhci_dump_td(std); 1454 } 1455 for (xqh = (uhci_soft_qh_t *)std; 1456 xqh; 1457 xqh = xqh->qh->hlink) 1458 uhci_dump_qh(xqh); 1459 printf("Enqueued QH:\n"); 1460 uhci_dump_qh(sqh); 1461 uhci_dump_tds(sqh->qh->elink); 1462 } 1463 #endif 1464 if (reqh->timeout && !usbd_use_polling) 1465 timeout(uhci_timeout, ii, MS_TO_TICKS(reqh->timeout)); 1466 splx(s); 1467 1468 return (USBD_NORMAL_COMPLETION); 1469 1470 ret2: 1471 if (len != 0) 1472 usb_freemem(sc->sc_dmatag, dmap); 1473 ret1: 1474 return (r); 1475 } 1476 1477 void 1478 uhci_intr_done(ii) 1479 uhci_intr_info_t *ii; 1480 { 1481 uhci_softc_t *sc = ii->sc; 1482 usbd_request_handle reqh = ii->reqh; 1483 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1484 usb_dma_t *dma; 1485 uhci_soft_qh_t *sqh; 1486 int i, npoll; 1487 1488 DPRINTFN(5, ("uhci_intr_done: length=%d\n", reqh->actlen)); 1489 1490 dma = &upipe->u.intr.datadma; 1491 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 1492 npoll = upipe->u.intr.npoll; 1493 for(i = 0; i < npoll; i++) { 1494 sqh = upipe->u.intr.qhs[i]; 1495 sqh->qh->elink = 0; 1496 sqh->qh->qh_elink = UHCI_PTR_T; 1497 } 1498 uhci_free_std_chain(sc, ii->stdstart, 0); 1499 1500 /* XXX Wasteful. */ 1501 if (reqh->pipe->intrreqh == reqh) { 1502 uhci_soft_td_t *xfer, *xferend; 1503 1504 /* This alloc cannot fail since we freed the chain above. */ 1505 uhci_alloc_std_chain(upipe, sc, reqh->length, 1, dma, 1506 &xfer, &xferend); 1507 xferend->td->td_status |= UHCI_TD_IOC; 1508 1509 #ifdef USB_DEBUG 1510 if (uhcidebug > 10) { 1511 printf("uhci_device_intr_done: xfer(1)\n"); 1512 uhci_dump_tds(xfer); 1513 uhci_dump_qh(upipe->u.intr.qhs[0]); 1514 } 1515 #endif 1516 1517 ii->stdstart = xfer; 1518 ii->stdend = xferend; 1519 #ifdef DIAGNOSTIC 1520 ii->isdone = 0; 1521 #endif 1522 for (i = 0; i < npoll; i++) { 1523 sqh = upipe->u.intr.qhs[i]; 1524 sqh->qh->elink = xfer; 1525 sqh->qh->qh_elink = xfer->physaddr; 1526 } 1527 } else { 1528 usb_freemem(sc->sc_dmatag, dma); 1529 ii->stdstart = 0; /* mark as inactive */ 1530 } 1531 } 1532 1533 /* Deallocate request data structures */ 1534 void 1535 uhci_ctrl_done(ii) 1536 uhci_intr_info_t *ii; 1537 { 1538 uhci_softc_t *sc = ii->sc; 1539 usbd_request_handle reqh = ii->reqh; 1540 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1541 u_int len = upipe->u.ctl.length; 1542 usb_dma_t *dma; 1543 uhci_td_t *htd = ii->stdstart->td; 1544 1545 #ifdef DIAGNOSTIC 1546 if (!reqh->isreq) 1547 panic("uhci_ctrl_done: not a request\n"); 1548 #endif 1549 1550 LIST_REMOVE(ii, list); /* remove from active list */ 1551 1552 uhci_remove_ctrl(sc, upipe->u.ctl.sqh); 1553 1554 if (len != 0) { 1555 dma = &upipe->u.ctl.datadma; 1556 if (reqh->request.bmRequestType & UT_READ) 1557 memcpy(reqh->buffer, KERNADDR(dma), len); 1558 uhci_free_std_chain(sc, htd->link.std, ii->stdend); 1559 usb_freemem(sc->sc_dmatag, dma); 1560 } 1561 DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", reqh->actlen)); 1562 } 1563 1564 /* Deallocate request data structures */ 1565 void 1566 uhci_bulk_done(ii) 1567 uhci_intr_info_t *ii; 1568 { 1569 uhci_softc_t *sc = ii->sc; 1570 usbd_request_handle reqh = ii->reqh; 1571 struct uhci_pipe *upipe = (struct uhci_pipe *)reqh->pipe; 1572 u_int len = upipe->u.bulk.length; 1573 usb_dma_t *dma; 1574 uhci_td_t *htd = ii->stdstart->td; 1575 1576 LIST_REMOVE(ii, list); /* remove from active list */ 1577 1578 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 1579 1580 if (len != 0) { 1581 dma = &upipe->u.bulk.datadma; 1582 if (upipe->u.bulk.isread && len != 0) 1583 memcpy(reqh->buffer, KERNADDR(dma), len); 1584 uhci_free_std_chain(sc, htd->link.std, 0); 1585 usb_freemem(sc->sc_dmatag, dma); 1586 } 1587 DPRINTFN(4, ("uhci_bulk_done: length=%d\n", reqh->actlen)); 1588 /* XXX compute new toggle */ 1589 } 1590 1591 /* Add interrupt QH, called with vflock. */ 1592 void 1593 uhci_add_intr(sc, n, sqh) 1594 uhci_softc_t *sc; 1595 int n; 1596 uhci_soft_qh_t *sqh; 1597 { 1598 struct uhci_vframe *vf = &sc->sc_vframes[n]; 1599 uhci_qh_t *eqh; 1600 1601 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", n, sqh)); 1602 eqh = vf->eqh->qh; 1603 sqh->qh->hlink = eqh->hlink; 1604 sqh->qh->qh_hlink = eqh->qh_hlink; 1605 eqh->hlink = sqh; 1606 eqh->qh_hlink = sqh->physaddr | UHCI_PTR_Q; 1607 vf->eqh = sqh; 1608 vf->bandwidth++; 1609 } 1610 1611 /* Remove interrupt QH, called with vflock. */ 1612 void 1613 uhci_remove_intr(sc, n, sqh) 1614 uhci_softc_t *sc; 1615 int n; 1616 uhci_soft_qh_t *sqh; 1617 { 1618 struct uhci_vframe *vf = &sc->sc_vframes[n]; 1619 uhci_soft_qh_t *pqh; 1620 1621 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", n, sqh)); 1622 1623 for (pqh = vf->hqh; pqh->qh->hlink != sqh; pqh = pqh->qh->hlink) 1624 #if defined(DIAGNOSTIC) || defined(USB_DEBUG) 1625 if (pqh->qh->qh_hlink & UHCI_PTR_T) { 1626 printf("uhci_remove_intr: QH not found\n"); 1627 return; 1628 } 1629 #else 1630 ; 1631 #endif 1632 pqh->qh->hlink = sqh->qh->hlink; 1633 pqh->qh->qh_hlink = sqh->qh->qh_hlink; 1634 if (vf->eqh == sqh) 1635 vf->eqh = pqh; 1636 vf->bandwidth--; 1637 } 1638 1639 usbd_status 1640 uhci_device_setintr(sc, upipe, ival) 1641 uhci_softc_t *sc; 1642 struct uhci_pipe *upipe; 1643 int ival; 1644 { 1645 uhci_soft_qh_t *sqh; 1646 int i, npoll, s; 1647 u_int bestbw, bw, bestoffs, offs; 1648 1649 DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe)); 1650 if (ival == 0) { 1651 printf("uhci_setintr: 0 interval\n"); 1652 return (USBD_INVAL); 1653 } 1654 1655 if (ival > UHCI_VFRAMELIST_COUNT) 1656 ival = UHCI_VFRAMELIST_COUNT; 1657 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 1658 DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll)); 1659 1660 upipe->u.intr.npoll = npoll; 1661 upipe->u.intr.qhs = 1662 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USB, M_WAITOK); 1663 1664 /* 1665 * Figure out which offset in the schedule that has most 1666 * bandwidth left over. 1667 */ 1668 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 1669 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 1670 for (bw = i = 0; i < npoll; i++) 1671 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 1672 if (bw < bestbw) { 1673 bestbw = bw; 1674 bestoffs = offs; 1675 } 1676 } 1677 DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 1678 1679 upipe->iinfo->stdstart = 0; 1680 for(i = 0; i < npoll; i++) { 1681 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 1682 sqh->qh->elink = 0; 1683 sqh->qh->qh_elink = UHCI_PTR_T; 1684 sqh->pos = MOD(i * ival + bestoffs); 1685 sqh->intr_info = upipe->iinfo; 1686 } 1687 #undef MOD 1688 1689 s = splusb(); 1690 LIST_INSERT_HEAD(&sc->sc_intrhead, upipe->iinfo, list); 1691 splx(s); 1692 1693 uhci_lock_frames(sc); 1694 /* Enter QHs into the controller data structures. */ 1695 for(i = 0; i < npoll; i++) 1696 uhci_add_intr(sc, upipe->u.intr.qhs[i]->pos, 1697 upipe->u.intr.qhs[i]); 1698 uhci_unlock_frames(sc); 1699 1700 DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe)); 1701 return (USBD_NORMAL_COMPLETION); 1702 } 1703 1704 /* Open a new pipe. */ 1705 usbd_status 1706 uhci_open(pipe) 1707 usbd_pipe_handle pipe; 1708 { 1709 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 1710 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1711 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1712 usbd_status r; 1713 1714 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1715 pipe, pipe->device->address, 1716 ed->bEndpointAddress, sc->sc_addr)); 1717 if (pipe->device->address == sc->sc_addr) { 1718 switch (ed->bEndpointAddress) { 1719 case USB_CONTROL_ENDPOINT: 1720 pipe->methods = &uhci_root_ctrl_methods; 1721 break; 1722 case UE_IN | UHCI_INTR_ENDPT: 1723 pipe->methods = &uhci_root_intr_methods; 1724 break; 1725 default: 1726 return (USBD_INVAL); 1727 } 1728 } else { 1729 upipe->iinfo = uhci_alloc_intr_info(sc); 1730 if (upipe->iinfo == 0) 1731 return (USBD_NOMEM); 1732 switch (ed->bmAttributes & UE_XFERTYPE) { 1733 case UE_CONTROL: 1734 pipe->methods = &uhci_device_ctrl_methods; 1735 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 1736 if (upipe->u.ctl.sqh == 0) 1737 goto bad; 1738 upipe->u.ctl.setup = uhci_alloc_std(sc); 1739 if (upipe->u.ctl.setup == 0) { 1740 uhci_free_sqh(sc, upipe->u.ctl.sqh); 1741 goto bad; 1742 } 1743 upipe->u.ctl.stat = uhci_alloc_std(sc); 1744 if (upipe->u.ctl.stat == 0) { 1745 uhci_free_sqh(sc, upipe->u.ctl.sqh); 1746 uhci_free_std(sc, upipe->u.ctl.setup); 1747 goto bad; 1748 } 1749 r = usb_allocmem(sc->sc_dmatag, 1750 sizeof(usb_device_request_t), 1751 0, &upipe->u.ctl.reqdma); 1752 if (r != USBD_NORMAL_COMPLETION) { 1753 uhci_free_sqh(sc, upipe->u.ctl.sqh); 1754 uhci_free_std(sc, upipe->u.ctl.setup); 1755 uhci_free_std(sc, upipe->u.ctl.stat); 1756 goto bad; 1757 } 1758 break; 1759 case UE_INTERRUPT: 1760 pipe->methods = &uhci_device_intr_methods; 1761 return (uhci_device_setintr(sc, upipe, ed->bInterval)); 1762 case UE_ISOCHRONOUS: 1763 printf("uhci_open: iso not implemented\n"); 1764 return (USBD_XXX); 1765 case UE_BULK: 1766 pipe->methods = &uhci_device_bulk_methods; 1767 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 1768 if (upipe->u.bulk.sqh == 0) 1769 goto bad; 1770 break; 1771 } 1772 } 1773 return (USBD_NORMAL_COMPLETION); 1774 1775 bad: 1776 uhci_free_intr_info(upipe->iinfo); 1777 return (USBD_NOMEM); 1778 } 1779 1780 /* 1781 * Data structures and routines to emulate the root hub. 1782 */ 1783 usb_device_descriptor_t uhci_devd = { 1784 USB_DEVICE_DESCRIPTOR_SIZE, 1785 UDESC_DEVICE, /* type */ 1786 {0x00, 0x01}, /* USB version */ 1787 UCLASS_HUB, /* class */ 1788 USUBCLASS_HUB, /* subclass */ 1789 0, /* protocol */ 1790 64, /* max packet */ 1791 {0},{0},{0x00,0x01}, /* device id */ 1792 1,2,0, /* string indicies */ 1793 1 /* # of configurations */ 1794 }; 1795 1796 usb_config_descriptor_t uhci_confd = { 1797 USB_CONFIG_DESCRIPTOR_SIZE, 1798 UDESC_CONFIG, 1799 {USB_CONFIG_DESCRIPTOR_SIZE + 1800 USB_INTERFACE_DESCRIPTOR_SIZE + 1801 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1802 1, 1803 1, 1804 0, 1805 UC_SELF_POWERED, 1806 0 /* max power */ 1807 }; 1808 1809 usb_interface_descriptor_t uhci_ifcd = { 1810 USB_INTERFACE_DESCRIPTOR_SIZE, 1811 UDESC_INTERFACE, 1812 0, 1813 0, 1814 1, 1815 UCLASS_HUB, 1816 USUBCLASS_HUB, 1817 0, 1818 0 1819 }; 1820 1821 usb_endpoint_descriptor_t uhci_endpd = { 1822 USB_ENDPOINT_DESCRIPTOR_SIZE, 1823 UDESC_ENDPOINT, 1824 UE_IN | UHCI_INTR_ENDPT, 1825 UE_INTERRUPT, 1826 {8}, 1827 255 1828 }; 1829 1830 usb_hub_descriptor_t uhci_hubd_piix = { 1831 USB_HUB_DESCRIPTOR_SIZE, 1832 UDESC_HUB, 1833 2, 1834 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 1835 50, /* power on to power good */ 1836 0, 1837 { 0x00 }, /* both ports are removable */ 1838 { 0x00 }, /* no ports can power down individually */ 1839 }; 1840 1841 int 1842 uhci_str(p, l, s) 1843 usb_string_descriptor_t *p; 1844 int l; 1845 char *s; 1846 { 1847 int i; 1848 1849 if (l == 0) 1850 return (0); 1851 p->bLength = 2 * strlen(s) + 2; 1852 if (l == 1) 1853 return (1); 1854 p->bDescriptorType = UDESC_STRING; 1855 l -= 2; 1856 for (i = 0; s[i] && l > 1; i++, l -= 2) 1857 USETW2(p->bString[i], 0, s[i]); 1858 return (2*i+2); 1859 } 1860 1861 /* 1862 * Simulate a hardware hub by handling all the necessary requests. 1863 */ 1864 usbd_status 1865 uhci_root_ctrl_transfer(reqh) 1866 usbd_request_handle reqh; 1867 { 1868 uhci_softc_t *sc = (uhci_softc_t *)reqh->pipe->device->bus; 1869 usb_device_request_t *req; 1870 void *buf; 1871 int port, x; 1872 int len, value, index, status, change, l, totlen = 0; 1873 usb_port_status_t ps; 1874 usbd_status r; 1875 1876 if (!reqh->isreq) 1877 panic("uhci_root_ctrl_transfer: not a request\n"); 1878 req = &reqh->request; 1879 buf = reqh->buffer; 1880 1881 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 1882 req->bmRequestType, req->bRequest)); 1883 1884 len = UGETW(req->wLength); 1885 value = UGETW(req->wValue); 1886 index = UGETW(req->wIndex); 1887 #define C(x,y) ((x) | ((y) << 8)) 1888 switch(C(req->bRequest, req->bmRequestType)) { 1889 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1890 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1891 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1892 /* 1893 * DEVICE_REMOTE_WAKEUP and ENDPOINT_STALL are no-ops 1894 * for the integrated root hub. 1895 */ 1896 break; 1897 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1898 if (len > 0) { 1899 *(u_int8_t *)buf = sc->sc_conf; 1900 totlen = 1; 1901 } 1902 break; 1903 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1904 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 1905 switch(value >> 8) { 1906 case UDESC_DEVICE: 1907 if ((value & 0xff) != 0) { 1908 r = USBD_IOERROR; 1909 goto ret; 1910 } 1911 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1912 memcpy(buf, &uhci_devd, l); 1913 break; 1914 case UDESC_CONFIG: 1915 if ((value & 0xff) != 0) { 1916 r = USBD_IOERROR; 1917 goto ret; 1918 } 1919 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1920 memcpy(buf, &uhci_confd, l); 1921 buf = (char *)buf + l; 1922 len -= l; 1923 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1924 totlen += l; 1925 memcpy(buf, &uhci_ifcd, l); 1926 buf = (char *)buf + l; 1927 len -= l; 1928 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1929 totlen += l; 1930 memcpy(buf, &uhci_endpd, l); 1931 break; 1932 case UDESC_STRING: 1933 if (len == 0) 1934 break; 1935 *(u_int8_t *)buf = 0; 1936 totlen = 1; 1937 switch (value & 0xff) { 1938 case 1: /* Vendor */ 1939 totlen = uhci_str(buf, len, sc->sc_vendor); 1940 break; 1941 case 2: /* Product */ 1942 totlen = uhci_str(buf, len, "UHCI root hub"); 1943 break; 1944 } 1945 break; 1946 default: 1947 r = USBD_IOERROR; 1948 goto ret; 1949 } 1950 break; 1951 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1952 if (len > 0) { 1953 *(u_int8_t *)buf = 0; 1954 totlen = 1; 1955 } 1956 break; 1957 case C(UR_GET_STATUS, UT_READ_DEVICE): 1958 if (len > 1) { 1959 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1960 totlen = 2; 1961 } 1962 break; 1963 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1964 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1965 if (len > 1) { 1966 USETW(((usb_status_t *)buf)->wStatus, 0); 1967 totlen = 2; 1968 } 1969 break; 1970 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1971 if (value >= USB_MAX_DEVICES) { 1972 r = USBD_IOERROR; 1973 goto ret; 1974 } 1975 sc->sc_addr = value; 1976 break; 1977 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1978 if (value != 0 && value != 1) { 1979 r = USBD_IOERROR; 1980 goto ret; 1981 } 1982 sc->sc_conf = value; 1983 break; 1984 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1985 break; 1986 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1987 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1988 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1989 r = USBD_IOERROR; 1990 goto ret; 1991 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1992 break; 1993 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1994 break; 1995 /* Hub requests */ 1996 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1997 break; 1998 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1999 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE port=%d feature=%d\n", 2000 index, value)); 2001 if (index == 1) 2002 port = UHCI_PORTSC1; 2003 else if (index == 2) 2004 port = UHCI_PORTSC2; 2005 else { 2006 r = USBD_IOERROR; 2007 goto ret; 2008 } 2009 switch(value) { 2010 case UHF_PORT_ENABLE: 2011 x = UREAD2(sc, port); 2012 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 2013 break; 2014 case UHF_PORT_SUSPEND: 2015 x = UREAD2(sc, port); 2016 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 2017 break; 2018 case UHF_PORT_RESET: 2019 x = UREAD2(sc, port); 2020 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2021 break; 2022 case UHF_C_PORT_CONNECTION: 2023 x = UREAD2(sc, port); 2024 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 2025 break; 2026 case UHF_C_PORT_ENABLE: 2027 x = UREAD2(sc, port); 2028 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 2029 break; 2030 case UHF_C_PORT_OVER_CURRENT: 2031 x = UREAD2(sc, port); 2032 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 2033 break; 2034 case UHF_C_PORT_RESET: 2035 sc->sc_isreset = 0; 2036 r = USBD_NORMAL_COMPLETION; 2037 goto ret; 2038 case UHF_PORT_CONNECTION: 2039 case UHF_PORT_OVER_CURRENT: 2040 case UHF_PORT_POWER: 2041 case UHF_PORT_LOW_SPEED: 2042 case UHF_C_PORT_SUSPEND: 2043 default: 2044 r = USBD_IOERROR; 2045 goto ret; 2046 } 2047 break; 2048 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 2049 if (index == 1) 2050 port = UHCI_PORTSC1; 2051 else if (index == 2) 2052 port = UHCI_PORTSC2; 2053 else { 2054 r = USBD_IOERROR; 2055 goto ret; 2056 } 2057 if (len > 0) { 2058 *(u_int8_t *)buf = 2059 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 2060 UHCI_PORTSC_LS_SHIFT; 2061 totlen = 1; 2062 } 2063 break; 2064 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2065 if (value != 0) { 2066 r = USBD_IOERROR; 2067 goto ret; 2068 } 2069 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 2070 totlen = l; 2071 memcpy(buf, &uhci_hubd_piix, l); 2072 break; 2073 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2074 if (len != 4) { 2075 r = USBD_IOERROR; 2076 goto ret; 2077 } 2078 memset(buf, 0, len); 2079 totlen = len; 2080 break; 2081 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2082 if (index == 1) 2083 port = UHCI_PORTSC1; 2084 else if (index == 2) 2085 port = UHCI_PORTSC2; 2086 else { 2087 r = USBD_IOERROR; 2088 goto ret; 2089 } 2090 if (len != 4) { 2091 r = USBD_IOERROR; 2092 goto ret; 2093 } 2094 x = UREAD2(sc, port); 2095 status = change = 0; 2096 if (x & UHCI_PORTSC_CCS ) 2097 status |= UPS_CURRENT_CONNECT_STATUS; 2098 if (x & UHCI_PORTSC_CSC ) 2099 change |= UPS_C_CONNECT_STATUS; 2100 if (x & UHCI_PORTSC_PE ) 2101 status |= UPS_PORT_ENABLED; 2102 if (x & UHCI_PORTSC_POEDC) 2103 change |= UPS_C_PORT_ENABLED; 2104 if (x & UHCI_PORTSC_OCI ) 2105 status |= UPS_OVERCURRENT_INDICATOR; 2106 if (x & UHCI_PORTSC_OCIC ) 2107 change |= UPS_C_OVERCURRENT_INDICATOR; 2108 if (x & UHCI_PORTSC_SUSP ) 2109 status |= UPS_SUSPEND; 2110 if (x & UHCI_PORTSC_LSDA ) 2111 status |= UPS_LOW_SPEED; 2112 status |= UPS_PORT_POWER; 2113 if (sc->sc_isreset) 2114 change |= UPS_C_PORT_RESET; 2115 USETW(ps.wPortStatus, status); 2116 USETW(ps.wPortChange, change); 2117 l = min(len, sizeof ps); 2118 memcpy(buf, &ps, l); 2119 totlen = l; 2120 break; 2121 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2122 r = USBD_IOERROR; 2123 goto ret; 2124 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2125 break; 2126 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2127 if (index == 1) 2128 port = UHCI_PORTSC1; 2129 else if (index == 2) 2130 port = UHCI_PORTSC2; 2131 else { 2132 r = USBD_IOERROR; 2133 goto ret; 2134 } 2135 switch(value) { 2136 case UHF_PORT_ENABLE: 2137 x = UREAD2(sc, port); 2138 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2139 break; 2140 case UHF_PORT_SUSPEND: 2141 x = UREAD2(sc, port); 2142 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 2143 break; 2144 case UHF_PORT_RESET: 2145 x = UREAD2(sc, port); 2146 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2147 usbd_delay_ms(10); 2148 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2149 delay(100); 2150 x = UREAD2(sc, port); 2151 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2152 delay(100); 2153 DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n", 2154 index, UREAD2(sc, port))); 2155 sc->sc_isreset = 1; 2156 break; 2157 case UHF_C_PORT_CONNECTION: 2158 case UHF_C_PORT_ENABLE: 2159 case UHF_C_PORT_OVER_CURRENT: 2160 case UHF_PORT_CONNECTION: 2161 case UHF_PORT_OVER_CURRENT: 2162 case UHF_PORT_POWER: 2163 case UHF_PORT_LOW_SPEED: 2164 case UHF_C_PORT_SUSPEND: 2165 case UHF_C_PORT_RESET: 2166 default: 2167 r = USBD_IOERROR; 2168 goto ret; 2169 } 2170 break; 2171 default: 2172 r = USBD_IOERROR; 2173 goto ret; 2174 } 2175 reqh->actlen = totlen; 2176 r = USBD_NORMAL_COMPLETION; 2177 ret: 2178 reqh->status = r; 2179 reqh->xfercb(reqh); 2180 return (USBD_IN_PROGRESS); 2181 } 2182 2183 /* Abort a root control request. */ 2184 void 2185 uhci_root_ctrl_abort(reqh) 2186 usbd_request_handle reqh; 2187 { 2188 /* Nothing to do, all transfers are syncronous. */ 2189 } 2190 2191 /* Close the root pipe. */ 2192 void 2193 uhci_root_ctrl_close(pipe) 2194 usbd_pipe_handle pipe; 2195 { 2196 untimeout(uhci_timo, pipe->intrreqh); 2197 DPRINTF(("uhci_root_ctrl_close\n")); 2198 } 2199 2200 /* Abort a root interrupt request. */ 2201 void 2202 uhci_root_intr_abort(reqh) 2203 usbd_request_handle reqh; 2204 { 2205 untimeout(uhci_timo, reqh); 2206 } 2207 2208 /* Start a transfer on the root interrupt pipe */ 2209 usbd_status 2210 uhci_root_intr_transfer(reqh) 2211 usbd_request_handle reqh; 2212 { 2213 usbd_pipe_handle pipe = reqh->pipe; 2214 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2215 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2216 usb_dma_t *dmap; 2217 usbd_status r; 2218 int len; 2219 2220 DPRINTFN(3, ("uhci_root_intr_transfer: reqh=%p buf=%p len=%d flags=%d\n", 2221 reqh, reqh->buffer, reqh->length, reqh->flags)); 2222 2223 len = reqh->length; 2224 dmap = &upipe->u.intr.datadma; 2225 if (len == 0) 2226 return (USBD_INVAL); /* XXX should it be? */ 2227 2228 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2229 if (r != USBD_NORMAL_COMPLETION) 2230 return (r); 2231 2232 sc->sc_ival = MS_TO_TICKS(reqh->pipe->endpoint->edesc->bInterval); 2233 timeout(uhci_timo, reqh, sc->sc_ival); 2234 return (USBD_IN_PROGRESS); 2235 } 2236 2237 /* Close the root interrupt pipe. */ 2238 void 2239 uhci_root_intr_close(pipe) 2240 usbd_pipe_handle pipe; 2241 { 2242 untimeout(uhci_timo, pipe->intrreqh); 2243 DPRINTF(("uhci_root_intr_close\n")); 2244 } 2245
Indexes created Thu Sep 25 02:09:54 GMT 2025