uhcivar.h revision 1.54 1 1.54 jakllsch /* $NetBSD: uhcivar.h,v 1.54 2018/04/09 16:21:11 jakllsch Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.4 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.30 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
9 1.4 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss *
20 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
31 1.1 augustss */
32 1.1 augustss
33 1.52 christos #ifndef _UHCIVAR_H_
34 1.52 christos #define _UHCIVAR_H_
35 1.52 christos
36 1.52 christos #include <sys/pool.h>
37 1.52 christos
38 1.1 augustss /*
39 1.1 augustss * To avoid having 1024 TDs for each isochronous transfer we introduce
40 1.1 augustss * a virtual frame list. Every UHCI_VFRAMELIST_COUNT entries in the real
41 1.34 augustss * frame list points to a non-active TD. These, in turn, form the
42 1.34 augustss * starts of the virtual frame list. This also has the advantage that it
43 1.28 augustss * simplifies linking in/out of TDs/QHs in the schedule.
44 1.1 augustss * Furthermore, initially each of the inactive TDs point to an inactive
45 1.1 augustss * QH that forms the start of the interrupt traffic for that slot.
46 1.1 augustss * Each of these QHs point to the same QH that is the start of control
47 1.28 augustss * traffic. This QH points at another QH which is the start of the
48 1.28 augustss * bulk traffic.
49 1.1 augustss *
50 1.1 augustss * UHCI_VFRAMELIST_COUNT should be a power of 2 and <= UHCI_FRAMELIST_COUNT.
51 1.1 augustss */
52 1.1 augustss #define UHCI_VFRAMELIST_COUNT 128
53 1.1 augustss
54 1.1 augustss typedef struct uhci_soft_qh uhci_soft_qh_t;
55 1.1 augustss typedef struct uhci_soft_td uhci_soft_td_t;
56 1.1 augustss
57 1.11 augustss typedef union {
58 1.11 augustss struct uhci_soft_qh *sqh;
59 1.11 augustss struct uhci_soft_td *std;
60 1.11 augustss } uhci_soft_td_qh_t;
61 1.11 augustss
62 1.26 augustss struct uhci_xfer {
63 1.53 skrll struct usbd_xfer ux_xfer;
64 1.53 skrll struct usb_task ux_aborttask;
65 1.53 skrll enum {
66 1.53 skrll UX_NONE, UX_CTRL, UX_BULK, UX_INTR, UX_ISOC
67 1.53 skrll } ux_type;
68 1.53 skrll /* ctrl/bulk/intr */
69 1.53 skrll struct {
70 1.53 skrll uhci_soft_td_t **ux_stds;
71 1.53 skrll size_t ux_nstd;
72 1.53 skrll };
73 1.53 skrll union {
74 1.53 skrll /* ctrl */
75 1.53 skrll struct {
76 1.53 skrll uhci_soft_td_t *ux_setup;
77 1.53 skrll uhci_soft_td_t *ux_data;
78 1.53 skrll uhci_soft_td_t *ux_stat;
79 1.53 skrll };
80 1.53 skrll /* bulk/intr/isoc */
81 1.53 skrll struct {
82 1.53 skrll uhci_soft_td_t *ux_stdstart;
83 1.53 skrll uhci_soft_td_t *ux_stdend;
84 1.53 skrll };
85 1.53 skrll };
86 1.53 skrll
87 1.53 skrll TAILQ_ENTRY(uhci_xfer) ux_list;
88 1.53 skrll int ux_curframe;
89 1.53 skrll bool ux_isdone; /* used only when DIAGNOSTIC is defined */
90 1.26 augustss };
91 1.26 augustss
92 1.53 skrll #define UHCI_BUS2SC(bus) ((bus)->ub_hcpriv)
93 1.53 skrll #define UHCI_PIPE2SC(pipe) UHCI_BUS2SC((pipe)->up_dev->ud_bus)
94 1.53 skrll #define UHCI_XFER2SC(xfer) UHCI_BUS2SC((xfer)->ux_bus)
95 1.53 skrll #define UHCI_UPIPE2SC(d) UHCI_BUS2SC((d)->pipe.up_dev->ud_bus)
96 1.53 skrll
97 1.53 skrll #define UHCI_XFER2UXFER(xfer) ((struct uhci_xfer *)(xfer))
98 1.53 skrll #define UHCI_PIPE2UPIPE(pipe) ((struct uhci_pipe *)(pipe))
99 1.26 augustss
100 1.1 augustss /*
101 1.1 augustss * Extra information that we need for a TD.
102 1.1 augustss */
103 1.1 augustss struct uhci_soft_td {
104 1.11 augustss uhci_td_t td; /* The real TD, must be first */
105 1.11 augustss uhci_soft_td_qh_t link; /* soft version of the td_link field */
106 1.11 augustss uhci_physaddr_t physaddr; /* TD's physical address. */
107 1.45 bouyer usb_dma_t dma; /* TD's DMA infos */
108 1.45 bouyer int offs; /* TD's offset in usb_dma_t */
109 1.1 augustss };
110 1.34 augustss /*
111 1.11 augustss * Make the size such that it is a multiple of UHCI_TD_ALIGN. This way
112 1.19 augustss * we can pack a number of soft TD together and have the real TD well
113 1.11 augustss * aligned.
114 1.12 augustss * NOTE: Minimum size is 32 bytes.
115 1.11 augustss */
116 1.53 skrll #define UHCI_STD_SIZE ((sizeof(struct uhci_soft_td) + UHCI_TD_ALIGN - 1) / UHCI_TD_ALIGN * UHCI_TD_ALIGN)
117 1.11 augustss #define UHCI_STD_CHUNK 128 /*(PAGE_SIZE / UHCI_TD_SIZE)*/
118 1.1 augustss
119 1.1 augustss /*
120 1.1 augustss * Extra information that we need for a QH.
121 1.1 augustss */
122 1.1 augustss struct uhci_soft_qh {
123 1.11 augustss uhci_qh_t qh; /* The real QH, must be first */
124 1.11 augustss uhci_soft_qh_t *hlink; /* soft version of qh_hlink */
125 1.11 augustss uhci_soft_td_t *elink; /* soft version of qh_elink */
126 1.11 augustss uhci_physaddr_t physaddr; /* QH's physical address. */
127 1.1 augustss int pos; /* Timeslot position */
128 1.45 bouyer usb_dma_t dma; /* QH's DMA infos */
129 1.45 bouyer int offs; /* QH's offset in usb_dma_t */
130 1.1 augustss };
131 1.11 augustss /* See comment about UHCI_STD_SIZE. */
132 1.53 skrll #define UHCI_SQH_SIZE ((sizeof(struct uhci_soft_qh) + UHCI_QH_ALIGN - 1) / UHCI_QH_ALIGN * UHCI_QH_ALIGN)
133 1.11 augustss #define UHCI_SQH_CHUNK 128 /*(PAGE_SIZE / UHCI_QH_SIZE)*/
134 1.1 augustss
135 1.1 augustss /*
136 1.19 augustss * Information about an entry in the virtual frame list.
137 1.1 augustss */
138 1.1 augustss struct uhci_vframe {
139 1.1 augustss uhci_soft_td_t *htd; /* pointer to dummy TD */
140 1.1 augustss uhci_soft_td_t *etd; /* pointer to last TD */
141 1.1 augustss uhci_soft_qh_t *hqh; /* pointer to dummy QH */
142 1.1 augustss uhci_soft_qh_t *eqh; /* pointer to last QH */
143 1.1 augustss u_int bandwidth; /* max bandwidth used by this frame */
144 1.1 augustss };
145 1.1 augustss
146 1.1 augustss typedef struct uhci_softc {
147 1.43 drochner device_t sc_dev;
148 1.43 drochner struct usbd_bus sc_bus;
149 1.8 augustss bus_space_tag_t iot;
150 1.8 augustss bus_space_handle_t ioh;
151 1.29 augustss bus_size_t sc_size;
152 1.1 augustss
153 1.51 mrg kmutex_t sc_lock;
154 1.51 mrg kmutex_t sc_intr_lock;
155 1.51 mrg kcondvar_t sc_softwake_cv;
156 1.51 mrg
157 1.1 augustss uhci_physaddr_t *sc_pframes;
158 1.7 augustss usb_dma_t sc_dma;
159 1.1 augustss struct uhci_vframe sc_vframes[UHCI_VFRAMELIST_COUNT];
160 1.1 augustss
161 1.32 augustss uhci_soft_qh_t *sc_lctl_start; /* dummy QH for low speed control */
162 1.32 augustss uhci_soft_qh_t *sc_lctl_end; /* last control QH */
163 1.32 augustss uhci_soft_qh_t *sc_hctl_start; /* dummy QH for high speed control */
164 1.32 augustss uhci_soft_qh_t *sc_hctl_end; /* last control QH */
165 1.1 augustss uhci_soft_qh_t *sc_bulk_start; /* dummy QH for bulk */
166 1.1 augustss uhci_soft_qh_t *sc_bulk_end; /* last bulk transfer */
167 1.32 augustss uhci_soft_qh_t *sc_last_qh; /* dummy QH at the end */
168 1.53 skrll uint32_t sc_loops; /* number of QHs that wants looping */
169 1.1 augustss
170 1.19 augustss uhci_soft_td_t *sc_freetds; /* TD free list */
171 1.19 augustss uhci_soft_qh_t *sc_freeqhs; /* QH free list */
172 1.21 augustss
173 1.52 christos pool_cache_t sc_xferpool; /* free xfer pool */
174 1.1 augustss
175 1.53 skrll uint8_t sc_saved_sof;
176 1.53 skrll uint16_t sc_saved_frnum;
177 1.1 augustss
178 1.33 augustss char sc_softwake;
179 1.35 augustss
180 1.1 augustss char sc_isreset;
181 1.7 augustss char sc_suspend;
182 1.22 augustss char sc_dying;
183 1.1 augustss
184 1.53 skrll TAILQ_HEAD(, uhci_xfer) sc_intrhead;
185 1.1 augustss
186 1.28 augustss /* Info for the root hub interrupt "pipe". */
187 1.28 augustss int sc_ival; /* time between root hub intrs */
188 1.53 skrll struct usbd_xfer *sc_intr_xfer; /* root hub interrupt transfer */
189 1.48 dyoung struct callout sc_poll_handle;
190 1.3 augustss
191 1.48 dyoung device_t sc_child; /* /dev/usb# device */
192 1.1 augustss } uhci_softc_t;
193 1.1 augustss
194 1.53 skrll int uhci_init(uhci_softc_t *);
195 1.31 augustss int uhci_intr(void *);
196 1.31 augustss int uhci_detach(uhci_softc_t *, int);
197 1.42 dyoung void uhci_childdet(device_t, device_t);
198 1.42 dyoung int uhci_activate(device_t, enum devact);
199 1.47 dyoung bool uhci_resume(device_t, const pmf_qual_t *);
200 1.47 dyoung bool uhci_suspend(device_t, const pmf_qual_t *);
201 1.52 christos
202 1.52 christos #endif /* _UHCIVAR_H_ */
203