uhcivar.h revision 1.2
1 /* $NetBSD: uhcivar.h,v 1.2 1998/07/24 21:09:08 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Author: Lennart Augustsson <augustss (at) carlstedt.se> 8 * Carlstedt Research & Technology 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * To avoid having 1024 TDs for each isochronous transfer we introduce 41 * a virtual frame list. Every UHCI_VFRAMELIST_COUNT entries in the real 42 * frame list points to a non-active TD. These, in turn, which form the 43 * starts of the virtual frame list. This also has the advantage that it 44 * simplifies linking in/out TD/QH in the schedule. 45 * Furthermore, initially each of the inactive TDs point to an inactive 46 * QH that forms the start of the interrupt traffic for that slot. 47 * Each of these QHs point to the same QH that is the start of control 48 * traffic. 49 * 50 * UHCI_VFRAMELIST_COUNT should be a power of 2 and <= UHCI_FRAMELIST_COUNT. 51 */ 52 #define UHCI_VFRAMELIST_COUNT 128 53 54 typedef struct uhci_soft_qh uhci_soft_qh_t; 55 typedef struct uhci_soft_td uhci_soft_td_t; 56 57 /* 58 * An interrupt info struct contains the information needed to 59 * execute a requested routine when the controller generates an 60 * interrupt. Since we cannot know which transfer generated 61 * the interrupt all structs are linked together so they can be 62 * searched at interrupt time. 63 */ 64 typedef struct uhci_intr_info { 65 struct uhci_softc *sc; 66 usbd_request_handle reqh; 67 uhci_soft_td_t *stdstart; 68 uhci_soft_td_t *stdend; 69 LIST_ENTRY(uhci_intr_info) list; 70 #ifdef DIAGNOSTIC 71 int isdone; 72 #endif 73 } uhci_intr_info_t; 74 75 /* 76 * Extra information that we need for a TD. 77 */ 78 struct uhci_soft_td { 79 uhci_td_t *td; /* The real TD */ 80 uhci_physaddr_t physaddr; /* and its physical address. */ 81 }; 82 #define UHCI_TD_CHUNK 128 /*(PAGE_SIZE / UHCI_TD_SIZE)*/ 83 84 /* 85 * Extra information that we need for a QH. 86 */ 87 struct uhci_soft_qh { 88 uhci_qh_t *qh; /* The real QH */ 89 uhci_physaddr_t physaddr; /* and its physical address. */ 90 int pos; /* Timeslot position */ 91 uhci_intr_info_t *intr_info; /* Who to call on completion. */ 92 }; 93 #define UHCI_QH_CHUNK 128 /*(PAGE_SIZE / UHCI_QH_SIZE)*/ 94 95 /* Only used for buffer free list. */ 96 struct uhci_buffer { 97 struct uhci_buffer *next; 98 }; 99 #define UHCI_BUFFER_SIZE 64 100 #define UHCI_BUFFER_CHUNK 64 /*(PAGE_SIZE / UHCI_BUFFER_SIZE)*/ 101 102 /* 103 * Information about an entry in the virtial frame list. 104 */ 105 struct uhci_vframe { 106 uhci_soft_td_t *htd; /* pointer to dummy TD */ 107 uhci_soft_td_t *etd; /* pointer to last TD */ 108 uhci_soft_qh_t *hqh; /* pointer to dummy QH */ 109 uhci_soft_qh_t *eqh; /* pointer to last QH */ 110 u_int bandwidth; /* max bandwidth used by this frame */ 111 }; 112 113 typedef struct uhci_softc { 114 struct usbd_bus sc_bus; /* base device */ 115 void *sc_ih; /* interrupt vectoring */ 116 bus_space_tag_t iot; 117 bus_space_handle_t ioh; 118 119 bus_dma_tag_t sc_dmatag; /* DMA tag */ 120 /* XXX should keep track of all DMA memory */ 121 122 uhci_physaddr_t *sc_pframes; 123 struct uhci_vframe sc_vframes[UHCI_VFRAMELIST_COUNT]; 124 125 uhci_soft_qh_t *sc_ctl_start; /* dummy QH for control */ 126 uhci_soft_qh_t *sc_ctl_end; /* last control QH */ 127 uhci_soft_qh_t *sc_bulk_start; /* dummy QH for bulk */ 128 uhci_soft_qh_t *sc_bulk_end; /* last bulk transfer */ 129 130 uhci_soft_td_t *sc_freetds; 131 uhci_soft_qh_t *sc_freeqhs; 132 struct uhci_buffer *sc_freebuffers; 133 134 u_int8_t sc_addr; /* device address */ 135 u_int8_t sc_conf; /* device configuration */ 136 137 int sc_model; 138 #define UHCI_PIIX3 1 139 #define UHCI_PIIX4 2 140 141 char sc_isreset; 142 143 int sc_intrs; 144 LIST_HEAD(, uhci_intr_info) sc_intrhead; 145 146 /* Info for the root hub interrupt channel. */ 147 int sc_ival; 148 149 char sc_vflock; 150 #define UHCI_HAS_LOCK 1 151 #define UHCI_WANT_LOCK 2 152 153 usb_dma_t *sc_mallocs; 154 } uhci_softc_t; 155 156 usbd_status uhci_init __P((uhci_softc_t *)); 157 int uhci_intr __P((void *)); 158 #if 0 159 void uhci_reset __P((void *)); 160 #endif 161 162 #ifdef USB_DEBUG 163 #define DPRINTF(x) if (uhcidebug) printf x 164 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 165 extern int uhcidebug; 166 #else 167 #define DPRINTF(x) 168 #define DPRINTFN(n,x) 169 #endif 170 171
Indexes created Thu Oct 16 14:10:15 GMT 2025