uhcivar.h revision 1.55
1 /* $NetBSD: uhcivar.h,v 1.55 2018/08/09 06:26:47 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _UHCIVAR_H_ 34 #define _UHCIVAR_H_ 35 36 #include <sys/pool.h> 37 38 /* 39 * To avoid having 1024 TDs for each isochronous transfer we introduce 40 * a virtual frame list. Every UHCI_VFRAMELIST_COUNT entries in the real 41 * frame list points to a non-active TD. These, in turn, form the 42 * starts of the virtual frame list. This also has the advantage that it 43 * simplifies linking in/out of TDs/QHs in the schedule. 44 * Furthermore, initially each of the inactive TDs point to an inactive 45 * QH that forms the start of the interrupt traffic for that slot. 46 * Each of these QHs point to the same QH that is the start of control 47 * traffic. This QH points at another QH which is the start of the 48 * bulk traffic. 49 * 50 * UHCI_VFRAMELIST_COUNT should be a power of 2 and <= UHCI_FRAMELIST_COUNT. 51 */ 52 #define UHCI_VFRAMELIST_COUNT 128 53 54 typedef struct uhci_soft_qh uhci_soft_qh_t; 55 typedef struct uhci_soft_td uhci_soft_td_t; 56 57 typedef union { 58 struct uhci_soft_qh *sqh; 59 struct uhci_soft_td *std; 60 } uhci_soft_td_qh_t; 61 62 struct uhci_xfer { 63 struct usbd_xfer ux_xfer; 64 enum { 65 UX_NONE, UX_CTRL, UX_BULK, UX_INTR, UX_ISOC 66 } ux_type; 67 /* ctrl/bulk/intr */ 68 struct { 69 uhci_soft_td_t **ux_stds; 70 size_t ux_nstd; 71 }; 72 union { 73 /* ctrl */ 74 struct { 75 uhci_soft_td_t *ux_setup; 76 uhci_soft_td_t *ux_data; 77 uhci_soft_td_t *ux_stat; 78 }; 79 /* bulk/intr/isoc */ 80 struct { 81 uhci_soft_td_t *ux_stdstart; 82 uhci_soft_td_t *ux_stdend; 83 }; 84 }; 85 86 TAILQ_ENTRY(uhci_xfer) ux_list; 87 int ux_curframe; 88 bool ux_isdone; /* used only when DIAGNOSTIC is defined */ 89 }; 90 91 #define UHCI_BUS2SC(bus) ((bus)->ub_hcpriv) 92 #define UHCI_PIPE2SC(pipe) UHCI_BUS2SC((pipe)->up_dev->ud_bus) 93 #define UHCI_XFER2SC(xfer) UHCI_BUS2SC((xfer)->ux_bus) 94 #define UHCI_UPIPE2SC(d) UHCI_BUS2SC((d)->pipe.up_dev->ud_bus) 95 96 #define UHCI_XFER2UXFER(xfer) ((struct uhci_xfer *)(xfer)) 97 #define UHCI_PIPE2UPIPE(pipe) ((struct uhci_pipe *)(pipe)) 98 99 /* 100 * Extra information that we need for a TD. 101 */ 102 struct uhci_soft_td { 103 uhci_td_t td; /* The real TD, must be first */ 104 uhci_soft_td_qh_t link; /* soft version of the td_link field */ 105 uhci_physaddr_t physaddr; /* TD's physical address. */ 106 usb_dma_t dma; /* TD's DMA infos */ 107 int offs; /* TD's offset in usb_dma_t */ 108 }; 109 /* 110 * Make the size such that it is a multiple of UHCI_TD_ALIGN. This way 111 * we can pack a number of soft TD together and have the real TD well 112 * aligned. 113 * NOTE: Minimum size is 32 bytes. 114 */ 115 #define UHCI_STD_SIZE ((sizeof(struct uhci_soft_td) + UHCI_TD_ALIGN - 1) / UHCI_TD_ALIGN * UHCI_TD_ALIGN) 116 #define UHCI_STD_CHUNK 128 /*(PAGE_SIZE / UHCI_TD_SIZE)*/ 117 118 /* 119 * Extra information that we need for a QH. 120 */ 121 struct uhci_soft_qh { 122 uhci_qh_t qh; /* The real QH, must be first */ 123 uhci_soft_qh_t *hlink; /* soft version of qh_hlink */ 124 uhci_soft_td_t *elink; /* soft version of qh_elink */ 125 uhci_physaddr_t physaddr; /* QH's physical address. */ 126 int pos; /* Timeslot position */ 127 usb_dma_t dma; /* QH's DMA infos */ 128 int offs; /* QH's offset in usb_dma_t */ 129 }; 130 /* See comment about UHCI_STD_SIZE. */ 131 #define UHCI_SQH_SIZE ((sizeof(struct uhci_soft_qh) + UHCI_QH_ALIGN - 1) / UHCI_QH_ALIGN * UHCI_QH_ALIGN) 132 #define UHCI_SQH_CHUNK 128 /*(PAGE_SIZE / UHCI_QH_SIZE)*/ 133 134 /* 135 * Information about an entry in the virtual frame list. 136 */ 137 struct uhci_vframe { 138 uhci_soft_td_t *htd; /* pointer to dummy TD */ 139 uhci_soft_td_t *etd; /* pointer to last TD */ 140 uhci_soft_qh_t *hqh; /* pointer to dummy QH */ 141 uhci_soft_qh_t *eqh; /* pointer to last QH */ 142 u_int bandwidth; /* max bandwidth used by this frame */ 143 }; 144 145 typedef struct uhci_softc { 146 device_t sc_dev; 147 struct usbd_bus sc_bus; 148 bus_space_tag_t iot; 149 bus_space_handle_t ioh; 150 bus_size_t sc_size; 151 152 kmutex_t sc_lock; 153 kmutex_t sc_intr_lock; 154 155 uhci_physaddr_t *sc_pframes; 156 usb_dma_t sc_dma; 157 struct uhci_vframe sc_vframes[UHCI_VFRAMELIST_COUNT]; 158 159 uhci_soft_qh_t *sc_lctl_start; /* dummy QH for low speed control */ 160 uhci_soft_qh_t *sc_lctl_end; /* last control QH */ 161 uhci_soft_qh_t *sc_hctl_start; /* dummy QH for high speed control */ 162 uhci_soft_qh_t *sc_hctl_end; /* last control QH */ 163 uhci_soft_qh_t *sc_bulk_start; /* dummy QH for bulk */ 164 uhci_soft_qh_t *sc_bulk_end; /* last bulk transfer */ 165 uhci_soft_qh_t *sc_last_qh; /* dummy QH at the end */ 166 uint32_t sc_loops; /* number of QHs that wants looping */ 167 168 uhci_soft_td_t *sc_freetds; /* TD free list */ 169 uhci_soft_qh_t *sc_freeqhs; /* QH free list */ 170 171 pool_cache_t sc_xferpool; /* free xfer pool */ 172 173 uint8_t sc_saved_sof; 174 uint16_t sc_saved_frnum; 175 176 char sc_isreset; 177 char sc_suspend; 178 char sc_dying; 179 180 TAILQ_HEAD(, uhci_xfer) sc_intrhead; 181 182 /* Info for the root hub interrupt "pipe". */ 183 int sc_ival; /* time between root hub intrs */ 184 struct usbd_xfer *sc_intr_xfer; /* root hub interrupt transfer */ 185 struct callout sc_poll_handle; 186 187 device_t sc_child; /* /dev/usb# device */ 188 } uhci_softc_t; 189 190 int uhci_init(uhci_softc_t *); 191 int uhci_intr(void *); 192 int uhci_detach(uhci_softc_t *, int); 193 void uhci_childdet(device_t, device_t); 194 int uhci_activate(device_t, enum devact); 195 bool uhci_resume(device_t, const pmf_qual_t *); 196 bool uhci_suspend(device_t, const pmf_qual_t *); 197 198 #endif /* _UHCIVAR_H_ */ 199
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