umass.c revision 1.149.2.16 1 1.149.2.16 skrll /* $NetBSD: umass.c,v 1.149.2.16 2016/12/05 10:55:18 skrll Exp $ */
2 1.102 mycroft
3 1.102 mycroft /*
4 1.102 mycroft * Copyright (c) 2003 The NetBSD Foundation, Inc.
5 1.102 mycroft * All rights reserved.
6 1.102 mycroft *
7 1.102 mycroft * This code is derived from software contributed to The NetBSD Foundation
8 1.104 mycroft * by Charles M. Hannum.
9 1.102 mycroft *
10 1.102 mycroft * Redistribution and use in source and binary forms, with or without
11 1.102 mycroft * modification, are permitted provided that the following conditions
12 1.102 mycroft * are met:
13 1.102 mycroft * 1. Redistributions of source code must retain the above copyright
14 1.102 mycroft * notice, this list of conditions and the following disclaimer.
15 1.102 mycroft * 2. Redistributions in binary form must reproduce the above copyright
16 1.102 mycroft * notice, this list of conditions and the following disclaimer in the
17 1.102 mycroft * documentation and/or other materials provided with the distribution.
18 1.102 mycroft *
19 1.102 mycroft * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.102 mycroft * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.102 mycroft * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.102 mycroft * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.102 mycroft * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.102 mycroft * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.102 mycroft * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.102 mycroft * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.102 mycroft * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.102 mycroft * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.102 mycroft * POSSIBILITY OF SUCH DAMAGE.
30 1.102 mycroft */
31 1.102 mycroft
32 1.1 thorpej /*-
33 1.1 thorpej * Copyright (c) 1999 MAEKAWA Masahide <bishop (at) rr.iij4u.or.jp>,
34 1.28 augustss * Nick Hibma <n_hibma (at) freebsd.org>
35 1.1 thorpej * All rights reserved.
36 1.1 thorpej *
37 1.1 thorpej * Redistribution and use in source and binary forms, with or without
38 1.1 thorpej * modification, are permitted provided that the following conditions
39 1.1 thorpej * are met:
40 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
41 1.1 thorpej * notice, this list of conditions and the following disclaimer.
42 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
44 1.1 thorpej * documentation and/or other materials provided with the distribution.
45 1.1 thorpej *
46 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47 1.1 thorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 1.1 thorpej * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 1.1 thorpej * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
50 1.1 thorpej * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 1.1 thorpej * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 1.1 thorpej * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 1.1 thorpej * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 1.1 thorpej * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 1.1 thorpej * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 1.1 thorpej * SUCH DAMAGE.
57 1.1 thorpej *
58 1.28 augustss * $FreeBSD: src/sys/dev/usb/umass.c,v 1.13 2000/03/26 01:39:12 n_hibma Exp $
59 1.28 augustss */
60 1.28 augustss
61 1.28 augustss /*
62 1.47 augustss * Universal Serial Bus Mass Storage Class specs:
63 1.149.2.12 skrll * http://www.usb.org/developers/docs/devclass_docs/Mass_Storage_Specification_Overview_v1.4_2-19-2010.pdf
64 1.149.2.12 skrll * http://www.usb.org/developers/docs/devclass_docs/usbmassbulk_10.pdf
65 1.149.2.12 skrll * http://www.usb.org/developers/docs/devclass_docs/usb_msc_cbi_1.1.pdf
66 1.149.2.12 skrll * http://www.usb.org/developers/docs/devclass_docs/usbmass-ufi10.pdf
67 1.28 augustss */
68 1.28 augustss
69 1.28 augustss /*
70 1.109 keihan * Ported to NetBSD by Lennart Augustsson <augustss (at) NetBSD.org>.
71 1.90 pooka * Parts of the code written by Jason R. Thorpe <thorpej (at) shagadelic.org>.
72 1.1 thorpej */
73 1.1 thorpej
74 1.1 thorpej /*
75 1.28 augustss * The driver handles 3 Wire Protocols
76 1.28 augustss * - Command/Bulk/Interrupt (CBI)
77 1.28 augustss * - Command/Bulk/Interrupt with Command Completion Interrupt (CBI with CCI)
78 1.28 augustss * - Mass Storage Bulk-Only (BBB)
79 1.28 augustss * (BBB refers Bulk/Bulk/Bulk for Command/Data/Status phases)
80 1.28 augustss *
81 1.28 augustss * Over these wire protocols it handles the following command protocols
82 1.28 augustss * - SCSI
83 1.54 augustss * - 8070 (ATA/ATAPI for rewritable removable media)
84 1.54 augustss * - UFI (USB Floppy Interface)
85 1.1 thorpej *
86 1.54 augustss * 8070i is a transformed version of the SCSI command set. UFI is a transformed
87 1.88 augustss * version of the 8070i command set. The sc->transform method is used to
88 1.54 augustss * convert the commands into the appropriate format (if at all necessary).
89 1.54 augustss * For example, ATAPI requires all commands to be 12 bytes in length amongst
90 1.54 augustss * other things.
91 1.3 thorpej *
92 1.28 augustss * The source code below is marked and can be split into a number of pieces
93 1.28 augustss * (in this order):
94 1.3 thorpej *
95 1.28 augustss * - probe/attach/detach
96 1.28 augustss * - generic transfer routines
97 1.28 augustss * - BBB
98 1.28 augustss * - CBI
99 1.28 augustss * - CBI_I (in addition to functions from CBI)
100 1.28 augustss * - CAM (Common Access Method)
101 1.28 augustss * - SCSI
102 1.28 augustss * - UFI
103 1.28 augustss * - 8070i
104 1.3 thorpej *
105 1.28 augustss * The protocols are implemented using a state machine, for the transfers as
106 1.28 augustss * well as for the resets. The state machine is contained in umass_*_state.
107 1.28 augustss * The state machine is started through either umass_*_transfer or
108 1.28 augustss * umass_*_reset.
109 1.28 augustss *
110 1.28 augustss * The reason for doing this is a) CAM performs a lot better this way and b) it
111 1.28 augustss * avoids using tsleep from interrupt context (for example after a failed
112 1.28 augustss * transfer).
113 1.1 thorpej */
114 1.1 thorpej
115 1.28 augustss /*
116 1.28 augustss * The SCSI related part of this driver has been derived from the
117 1.28 augustss * dev/ppbus/vpo.c driver, by Nicolas Souchu (nsouch (at) freebsd.org).
118 1.1 thorpej *
119 1.28 augustss * The CAM layer uses so called actions which are messages sent to the host
120 1.28 augustss * adapter for completion. The actions come in through umass_cam_action. The
121 1.28 augustss * appropriate block of routines is called depending on the transport protocol
122 1.28 augustss * in use. When the transfer has finished, these routines call
123 1.28 augustss * umass_cam_cb again to complete the CAM command.
124 1.1 thorpej */
125 1.64 lukem
126 1.64 lukem #include <sys/cdefs.h>
127 1.149.2.16 skrll __KERNEL_RCSID(0, "$NetBSD: umass.c,v 1.149.2.16 2016/12/05 10:55:18 skrll Exp $");
128 1.140 christos
129 1.141 mbalmer #ifdef _KERNEL_OPT
130 1.149 skrll #include "opt_usb.h"
131 1.141 mbalmer #endif
132 1.1 thorpej
133 1.29 enami #include "atapibus.h"
134 1.79 augustss #include "scsibus.h"
135 1.80 augustss #include "wd.h"
136 1.29 enami
137 1.1 thorpej #include <sys/param.h>
138 1.1 thorpej #include <sys/systm.h>
139 1.1 thorpej #include <sys/kernel.h>
140 1.28 augustss #include <sys/conf.h>
141 1.28 augustss #include <sys/buf.h>
142 1.28 augustss #include <sys/device.h>
143 1.1 thorpej #include <sys/malloc.h>
144 1.149 skrll #include <sys/sysctl.h>
145 1.1 thorpej
146 1.1 thorpej #include <dev/usb/usb.h>
147 1.1 thorpej #include <dev/usb/usbdi.h>
148 1.1 thorpej #include <dev/usb/usbdi_util.h>
149 1.28 augustss #include <dev/usb/usbdevs.h>
150 1.149 skrll #include <dev/usb/usbhist.h>
151 1.1 thorpej
152 1.56 augustss #include <dev/usb/umassvar.h>
153 1.78 gehenna #include <dev/usb/umass_quirks.h>
154 1.79 augustss #include <dev/usb/umass_scsipi.h>
155 1.80 augustss #include <dev/usb/umass_isdata.h>
156 1.28 augustss
157 1.99 mycroft #include <dev/scsipi/scsipi_all.h>
158 1.99 mycroft #include <dev/scsipi/scsipiconf.h>
159 1.99 mycroft
160 1.149 skrll #ifdef USB_DEBUG
161 1.149.2.14 skrll #ifdef UMASS_DEBUG
162 1.149 skrll int umassdebug = 0;
163 1.149 skrll
164 1.149 skrll SYSCTL_SETUP(sysctl_hw_umass_setup, "sysctl hw.umass setup")
165 1.149 skrll {
166 1.149 skrll int err;
167 1.149 skrll const struct sysctlnode *rnode;
168 1.149 skrll const struct sysctlnode *cnode;
169 1.149 skrll
170 1.149 skrll err = sysctl_createv(clog, 0, NULL, &rnode,
171 1.149 skrll CTLFLAG_PERMANENT, CTLTYPE_NODE, "umass",
172 1.149 skrll SYSCTL_DESCR("umass global controls"),
173 1.149 skrll NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
174 1.149 skrll
175 1.149 skrll if (err)
176 1.149 skrll goto fail;
177 1.149 skrll
178 1.149 skrll /* control debugging printfs */
179 1.149 skrll err = sysctl_createv(clog, 0, &rnode, &cnode,
180 1.149 skrll CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
181 1.149 skrll "debug", SYSCTL_DESCR("Enable debugging output"),
182 1.149 skrll NULL, 0, &umassdebug, sizeof(umassdebug), CTL_CREATE, CTL_EOL);
183 1.149 skrll if (err)
184 1.149 skrll goto fail;
185 1.28 augustss
186 1.149 skrll return;
187 1.149 skrll fail:
188 1.149 skrll aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
189 1.149 skrll }
190 1.57 augustss
191 1.119 drochner const char *states[TSTATE_STATES+1] = {
192 1.28 augustss /* should be kept in sync with the list at transfer_state */
193 1.28 augustss "Idle",
194 1.28 augustss "BBB CBW",
195 1.28 augustss "BBB Data",
196 1.28 augustss "BBB Data bulk-in/-out clear stall",
197 1.28 augustss "BBB CSW, 1st attempt",
198 1.28 augustss "BBB CSW bulk-in clear stall",
199 1.28 augustss "BBB CSW, 2nd attempt",
200 1.28 augustss "BBB Reset",
201 1.28 augustss "BBB bulk-in clear stall",
202 1.28 augustss "BBB bulk-out clear stall",
203 1.28 augustss "CBI Command",
204 1.28 augustss "CBI Data",
205 1.28 augustss "CBI Status",
206 1.28 augustss "CBI Data bulk-in/-out clear stall",
207 1.28 augustss "CBI Status intr-in clear stall",
208 1.28 augustss "CBI Reset",
209 1.28 augustss "CBI bulk-in clear stall",
210 1.28 augustss "CBI bulk-out clear stall",
211 1.28 augustss NULL
212 1.28 augustss };
213 1.28 augustss #endif
214 1.149.2.14 skrll #endif
215 1.1 thorpej
216 1.28 augustss /* USB device probe/attach/detach functions */
217 1.131 dyoung int umass_match(device_t, cfdata_t, void *);
218 1.131 dyoung void umass_attach(device_t, device_t, void *);
219 1.131 dyoung int umass_detach(device_t, int);
220 1.131 dyoung static void umass_childdet(device_t, device_t);
221 1.131 dyoung int umass_activate(device_t, enum devact);
222 1.131 dyoung extern struct cfdriver umass_cd;
223 1.149.2.14 skrll CFATTACH_DECL2_NEW(umass, sizeof(struct umass_softc), umass_match,
224 1.149.2.14 skrll umass_attach, umass_detach, umass_activate, NULL, umass_childdet);
225 1.131 dyoung
226 1.38 augustss Static void umass_disco(struct umass_softc *sc);
227 1.1 thorpej
228 1.28 augustss /* generic transfer functions */
229 1.149.2.4 skrll Static usbd_status umass_setup_transfer(struct umass_softc *,
230 1.149.2.7 skrll struct usbd_pipe *,
231 1.149.2.4 skrll void *, int, int,
232 1.149.2.7 skrll struct usbd_xfer *);
233 1.149.2.4 skrll Static usbd_status umass_setup_ctrl_transfer(struct umass_softc *,
234 1.149.2.4 skrll usb_device_request_t *,
235 1.149.2.4 skrll void *, int, int,
236 1.149.2.7 skrll struct usbd_xfer *);
237 1.149.2.4 skrll Static void umass_clear_endpoint_stall(struct umass_softc *, int,
238 1.149.2.7 skrll struct usbd_xfer *);
239 1.29 enami #if 0
240 1.149.2.4 skrll Static void umass_reset(struct umass_softc *, transfer_cb_f, void *);
241 1.29 enami #endif
242 1.1 thorpej
243 1.1 thorpej /* Bulk-Only related functions */
244 1.75 gehenna Static void umass_bbb_transfer(struct umass_softc *, int, void *, int, void *,
245 1.143 mrg int, int, u_int, int, umass_callback, void *);
246 1.75 gehenna Static void umass_bbb_reset(struct umass_softc *, int);
247 1.149.2.7 skrll Static void umass_bbb_state(struct usbd_xfer *, void *, usbd_status);
248 1.28 augustss
249 1.149.2.1 skrll usbd_status umass_bbb_get_max_lun(struct umass_softc *, uint8_t *);
250 1.28 augustss
251 1.28 augustss /* CBI related functions */
252 1.88 augustss Static void umass_cbi_transfer(struct umass_softc *, int, void *, int, void *,
253 1.143 mrg int, int, u_int, int, umass_callback, void *);
254 1.75 gehenna Static void umass_cbi_reset(struct umass_softc *, int);
255 1.149.2.7 skrll Static void umass_cbi_state(struct usbd_xfer *, void *, usbd_status);
256 1.75 gehenna
257 1.149.2.14 skrll Static int umass_cbi_adsc(struct umass_softc *, char *, int, int,
258 1.149.2.14 skrll struct usbd_xfer *);
259 1.75 gehenna
260 1.75 gehenna const struct umass_wire_methods umass_bbb_methods = {
261 1.149.2.6 skrll .wire_xfer = umass_bbb_transfer,
262 1.149.2.6 skrll .wire_reset = umass_bbb_reset,
263 1.149.2.6 skrll .wire_state = umass_bbb_state
264 1.75 gehenna };
265 1.75 gehenna
266 1.75 gehenna const struct umass_wire_methods umass_cbi_methods = {
267 1.149.2.6 skrll .wire_xfer = umass_cbi_transfer,
268 1.149.2.6 skrll .wire_reset = umass_cbi_reset,
269 1.149.2.6 skrll .wire_state = umass_cbi_state
270 1.75 gehenna };
271 1.28 augustss
272 1.28 augustss #ifdef UMASS_DEBUG
273 1.28 augustss /* General debugging functions */
274 1.38 augustss Static void umass_bbb_dump_cbw(struct umass_softc *sc,
275 1.38 augustss umass_bbb_cbw_t *cbw);
276 1.38 augustss Static void umass_bbb_dump_csw(struct umass_softc *sc,
277 1.38 augustss umass_bbb_csw_t *csw);
278 1.149.2.1 skrll Static void umass_dump_buffer(struct umass_softc *sc, uint8_t *buffer,
279 1.38 augustss int buflen, int printlen);
280 1.28 augustss #endif
281 1.28 augustss
282 1.28 augustss
283 1.28 augustss /*
284 1.28 augustss * USB device probe/attach/detach
285 1.28 augustss */
286 1.28 augustss
287 1.131 dyoung int
288 1.131 dyoung umass_match(device_t parent, cfdata_t match, void *aux)
289 1.28 augustss {
290 1.149.2.8 skrll struct usbif_attach_arg *uiaa = aux;
291 1.78 gehenna const struct umass_quirk *quirk;
292 1.28 augustss
293 1.149.2.8 skrll quirk = umass_lookup(uiaa->uiaa_vendor, uiaa->uiaa_product);
294 1.126 ichiro if (quirk != NULL && quirk->uq_match != UMASS_QUIRK_USE_DEFAULTMATCH)
295 1.149.2.3 skrll return quirk->uq_match;
296 1.40 augustss
297 1.149.2.8 skrll if (uiaa->uiaa_class != UICLASS_MASS)
298 1.149.2.3 skrll return UMATCH_NONE;
299 1.1 thorpej
300 1.149.2.8 skrll switch (uiaa->uiaa_subclass) {
301 1.78 gehenna case UISUBCLASS_RBC:
302 1.78 gehenna case UISUBCLASS_SFF8020I:
303 1.78 gehenna case UISUBCLASS_QIC157:
304 1.28 augustss case UISUBCLASS_UFI:
305 1.28 augustss case UISUBCLASS_SFF8070I:
306 1.78 gehenna case UISUBCLASS_SCSI:
307 1.40 augustss break;
308 1.28 augustss default:
309 1.149.2.3 skrll return UMATCH_IFACECLASS;
310 1.28 augustss }
311 1.28 augustss
312 1.149.2.8 skrll switch (uiaa->uiaa_proto) {
313 1.78 gehenna case UIPROTO_MASS_CBI_I:
314 1.28 augustss case UIPROTO_MASS_CBI:
315 1.78 gehenna case UIPROTO_MASS_BBB_OLD:
316 1.28 augustss case UIPROTO_MASS_BBB:
317 1.28 augustss break;
318 1.28 augustss default:
319 1.149.2.3 skrll return UMATCH_IFACECLASS_IFACESUBCLASS;
320 1.28 augustss }
321 1.1 thorpej
322 1.149.2.3 skrll return UMATCH_IFACECLASS_IFACESUBCLASS_IFACEPROTO;
323 1.1 thorpej }
324 1.1 thorpej
325 1.131 dyoung void
326 1.131 dyoung umass_attach(device_t parent, device_t self, void *aux)
327 1.1 thorpej {
328 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
329 1.131 dyoung struct umass_softc *sc = device_private(self);
330 1.149.2.8 skrll struct usbif_attach_arg *uiaa = aux;
331 1.78 gehenna const struct umass_quirk *quirk;
332 1.1 thorpej usb_interface_descriptor_t *id;
333 1.1 thorpej usb_endpoint_descriptor_t *ed;
334 1.78 gehenna const char *sWire, *sCommand;
335 1.118 augustss char *devinfop;
336 1.78 gehenna usbd_status err;
337 1.148 mlelstv int i, error;
338 1.1 thorpej
339 1.128 cube sc->sc_dev = self;
340 1.128 cube
341 1.134 plunky aprint_naive("\n");
342 1.134 plunky aprint_normal("\n");
343 1.134 plunky
344 1.149.2.11 skrll mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
345 1.145 mrg cv_init(&sc->sc_detach_cv, "umassdet");
346 1.145 mrg
347 1.149.2.8 skrll devinfop = usbd_devinfo_alloc(uiaa->uiaa_device, 0);
348 1.134 plunky aprint_normal_dev(self, "%s\n", devinfop);
349 1.118 augustss usbd_devinfo_free(devinfop);
350 1.1 thorpej
351 1.149.2.8 skrll sc->sc_udev = uiaa->uiaa_device;
352 1.149.2.8 skrll sc->sc_iface = uiaa->uiaa_iface;
353 1.149.2.8 skrll sc->sc_ifaceno = uiaa->uiaa_ifaceno;
354 1.28 augustss
355 1.149.2.8 skrll quirk = umass_lookup(uiaa->uiaa_vendor, uiaa->uiaa_product);
356 1.78 gehenna if (quirk != NULL) {
357 1.78 gehenna sc->sc_wire = quirk->uq_wire;
358 1.78 gehenna sc->sc_cmd = quirk->uq_cmd;
359 1.78 gehenna sc->sc_quirks = quirk->uq_flags;
360 1.82 augustss sc->sc_busquirks = quirk->uq_busquirks;
361 1.78 gehenna
362 1.78 gehenna if (quirk->uq_fixup != NULL)
363 1.78 gehenna (*quirk->uq_fixup)(sc);
364 1.78 gehenna } else {
365 1.78 gehenna sc->sc_wire = UMASS_WPROTO_UNSPEC;
366 1.78 gehenna sc->sc_cmd = UMASS_CPROTO_UNSPEC;
367 1.78 gehenna sc->sc_quirks = 0;
368 1.82 augustss sc->sc_busquirks = 0;
369 1.78 gehenna }
370 1.78 gehenna
371 1.78 gehenna if (sc->sc_wire == UMASS_WPROTO_UNSPEC) {
372 1.149.2.8 skrll switch (uiaa->uiaa_proto) {
373 1.78 gehenna case UIPROTO_MASS_CBI:
374 1.78 gehenna sc->sc_wire = UMASS_WPROTO_CBI;
375 1.78 gehenna break;
376 1.78 gehenna case UIPROTO_MASS_CBI_I:
377 1.78 gehenna sc->sc_wire = UMASS_WPROTO_CBI_I;
378 1.78 gehenna break;
379 1.78 gehenna case UIPROTO_MASS_BBB:
380 1.78 gehenna case UIPROTO_MASS_BBB_OLD:
381 1.78 gehenna sc->sc_wire = UMASS_WPROTO_BBB;
382 1.78 gehenna break;
383 1.78 gehenna default:
384 1.149.2.14 skrll DPRINTFM(UDMASS_GEN, "Unsupported wire protocol %u",
385 1.149.2.14 skrll uiaa->uiaa_proto, 0, 0, 0);
386 1.131 dyoung return;
387 1.78 gehenna }
388 1.40 augustss }
389 1.28 augustss
390 1.78 gehenna if (sc->sc_cmd == UMASS_CPROTO_UNSPEC) {
391 1.149.2.8 skrll switch (uiaa->uiaa_subclass) {
392 1.78 gehenna case UISUBCLASS_SCSI:
393 1.78 gehenna sc->sc_cmd = UMASS_CPROTO_SCSI;
394 1.78 gehenna break;
395 1.78 gehenna case UISUBCLASS_UFI:
396 1.78 gehenna sc->sc_cmd = UMASS_CPROTO_UFI;
397 1.78 gehenna break;
398 1.78 gehenna case UISUBCLASS_SFF8020I:
399 1.78 gehenna case UISUBCLASS_SFF8070I:
400 1.78 gehenna case UISUBCLASS_QIC157:
401 1.78 gehenna sc->sc_cmd = UMASS_CPROTO_ATAPI;
402 1.78 gehenna break;
403 1.78 gehenna case UISUBCLASS_RBC:
404 1.78 gehenna sc->sc_cmd = UMASS_CPROTO_RBC;
405 1.78 gehenna break;
406 1.78 gehenna default:
407 1.149.2.14 skrll DPRINTFM(UDMASS_GEN, "Unsupported command protocol %u",
408 1.149.2.14 skrll uiaa->uiaa_subclass, 0, 0, 0);
409 1.131 dyoung return;
410 1.78 gehenna }
411 1.78 gehenna }
412 1.17 thorpej
413 1.78 gehenna switch (sc->sc_wire) {
414 1.78 gehenna case UMASS_WPROTO_CBI:
415 1.78 gehenna sWire = "CBI";
416 1.32 augustss break;
417 1.78 gehenna case UMASS_WPROTO_CBI_I:
418 1.78 gehenna sWire = "CBI with CCI";
419 1.28 augustss break;
420 1.78 gehenna case UMASS_WPROTO_BBB:
421 1.78 gehenna sWire = "Bulk-Only";
422 1.28 augustss break;
423 1.17 thorpej default:
424 1.78 gehenna sWire = "unknown";
425 1.28 augustss break;
426 1.17 thorpej }
427 1.78 gehenna
428 1.78 gehenna switch (sc->sc_cmd) {
429 1.78 gehenna case UMASS_CPROTO_RBC:
430 1.78 gehenna sCommand = "RBC";
431 1.78 gehenna break;
432 1.78 gehenna case UMASS_CPROTO_SCSI:
433 1.78 gehenna sCommand = "SCSI";
434 1.28 augustss break;
435 1.78 gehenna case UMASS_CPROTO_UFI:
436 1.78 gehenna sCommand = "UFI";
437 1.28 augustss break;
438 1.78 gehenna case UMASS_CPROTO_ATAPI:
439 1.78 gehenna sCommand = "ATAPI";
440 1.32 augustss break;
441 1.80 augustss case UMASS_CPROTO_ISD_ATA:
442 1.80 augustss sCommand = "ISD-ATA";
443 1.80 augustss break;
444 1.17 thorpej default:
445 1.78 gehenna sCommand = "unknown";
446 1.32 augustss break;
447 1.17 thorpej }
448 1.78 gehenna
449 1.132 jmcneill aprint_verbose_dev(self, "using %s over %s\n", sCommand, sWire);
450 1.1 thorpej
451 1.104 mycroft if (quirk != NULL && quirk->uq_init != NULL) {
452 1.104 mycroft err = (*quirk->uq_init)(sc);
453 1.104 mycroft if (err) {
454 1.128 cube aprint_error_dev(self, "quirk init failed\n");
455 1.104 mycroft umass_disco(sc);
456 1.131 dyoung return;
457 1.104 mycroft }
458 1.104 mycroft }
459 1.104 mycroft
460 1.1 thorpej /*
461 1.28 augustss * In addition to the Control endpoint the following endpoints
462 1.28 augustss * are required:
463 1.28 augustss * a) bulk-in endpoint.
464 1.28 augustss * b) bulk-out endpoint.
465 1.28 augustss * and for Control/Bulk/Interrupt with CCI (CBI_I)
466 1.28 augustss * c) intr-in
467 1.1 thorpej *
468 1.1 thorpej * The endpoint addresses are not fixed, so we have to read them
469 1.1 thorpej * from the device descriptors of the current interface.
470 1.1 thorpej */
471 1.124 drochner id = usbd_get_interface_descriptor(sc->sc_iface);
472 1.1 thorpej for (i = 0 ; i < id->bNumEndpoints ; i++) {
473 1.76 gehenna ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
474 1.78 gehenna if (ed == NULL) {
475 1.128 cube aprint_error_dev(self,
476 1.128 cube "could not read endpoint descriptor\n");
477 1.131 dyoung return;
478 1.1 thorpej }
479 1.11 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN
480 1.1 thorpej && (ed->bmAttributes & UE_XFERTYPE) == UE_BULK) {
481 1.73 gehenna sc->sc_epaddr[UMASS_BULKIN] = ed->bEndpointAddress;
482 1.11 augustss } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT
483 1.1 thorpej && (ed->bmAttributes & UE_XFERTYPE) == UE_BULK) {
484 1.73 gehenna sc->sc_epaddr[UMASS_BULKOUT] = ed->bEndpointAddress;
485 1.78 gehenna } else if (sc->sc_wire == UMASS_WPROTO_CBI_I
486 1.28 augustss && UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN
487 1.28 augustss && (ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT) {
488 1.73 gehenna sc->sc_epaddr[UMASS_INTRIN] = ed->bEndpointAddress;
489 1.28 augustss #ifdef UMASS_DEBUG
490 1.28 augustss if (UGETW(ed->wMaxPacketSize) > 2) {
491 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p intr size is %d",
492 1.149.2.14 skrll sc, UGETW(ed->wMaxPacketSize), 0, 0);
493 1.28 augustss }
494 1.28 augustss #endif
495 1.1 thorpej }
496 1.1 thorpej }
497 1.1 thorpej
498 1.28 augustss /* check whether we found all the endpoints we need */
499 1.73 gehenna if (!sc->sc_epaddr[UMASS_BULKIN] || !sc->sc_epaddr[UMASS_BULKOUT] ||
500 1.78 gehenna (sc->sc_wire == UMASS_WPROTO_CBI_I &&
501 1.78 gehenna !sc->sc_epaddr[UMASS_INTRIN])) {
502 1.128 cube aprint_error_dev(self, "endpoint not found %u/%u/%u\n",
503 1.128 cube sc->sc_epaddr[UMASS_BULKIN],
504 1.105 augustss sc->sc_epaddr[UMASS_BULKOUT],
505 1.105 augustss sc->sc_epaddr[UMASS_INTRIN]);
506 1.131 dyoung return;
507 1.28 augustss }
508 1.28 augustss
509 1.7 thorpej /*
510 1.7 thorpej * Get the maximum LUN supported by the device.
511 1.7 thorpej */
512 1.129 rmind if (sc->sc_wire == UMASS_WPROTO_BBB &&
513 1.129 rmind (sc->sc_quirks & UMASS_QUIRK_NOGETMAXLUN) == 0) {
514 1.28 augustss err = umass_bbb_get_max_lun(sc, &sc->maxlun);
515 1.28 augustss if (err) {
516 1.128 cube aprint_error_dev(self, "unable to get Max Lun: %s\n",
517 1.128 cube usbd_errstr(err));
518 1.131 dyoung return;
519 1.28 augustss }
520 1.99 mycroft if (sc->maxlun > 0)
521 1.99 mycroft sc->sc_busquirks |= PQUIRK_FORCELUNS;
522 1.28 augustss } else {
523 1.28 augustss sc->maxlun = 0;
524 1.7 thorpej }
525 1.7 thorpej
526 1.1 thorpej /* Open the bulk-in and -out pipe */
527 1.149.2.14 skrll DPRINTFM(UDMASS_USB, "sc %p: opening iface %p epaddr %d for BULKOUT",
528 1.149.2.14 skrll sc, sc->sc_iface, sc->sc_epaddr[UMASS_BULKOUT], 0);
529 1.76 gehenna err = usbd_open_pipe(sc->sc_iface, sc->sc_epaddr[UMASS_BULKOUT],
530 1.149.2.16 skrll USBD_EXCLUSIVE_USE | USBD_MPSAFE, &sc->sc_pipe[UMASS_BULKOUT]);
531 1.1 thorpej if (err) {
532 1.128 cube aprint_error_dev(self, "cannot open %u-out pipe (bulk)\n",
533 1.128 cube sc->sc_epaddr[UMASS_BULKOUT]);
534 1.28 augustss umass_disco(sc);
535 1.131 dyoung return;
536 1.1 thorpej }
537 1.149.2.14 skrll DPRINTFM(UDMASS_USB, "sc %p: opening iface %p epaddr %d for BULKIN",
538 1.149.2.14 skrll sc, sc->sc_iface, sc->sc_epaddr[UMASS_BULKIN], 0);
539 1.76 gehenna err = usbd_open_pipe(sc->sc_iface, sc->sc_epaddr[UMASS_BULKIN],
540 1.149.2.16 skrll USBD_EXCLUSIVE_USE | USBD_MPSAFE, &sc->sc_pipe[UMASS_BULKIN]);
541 1.1 thorpej if (err) {
542 1.128 cube aprint_error_dev(self, "could not open %u-in pipe (bulk)\n",
543 1.128 cube sc->sc_epaddr[UMASS_BULKIN]);
544 1.28 augustss umass_disco(sc);
545 1.131 dyoung return;
546 1.1 thorpej }
547 1.88 augustss /*
548 1.28 augustss * Open the intr-in pipe if the protocol is CBI with CCI.
549 1.28 augustss * Note: early versions of the Zip drive do have an interrupt pipe, but
550 1.28 augustss * this pipe is unused
551 1.28 augustss *
552 1.28 augustss * We do not open the interrupt pipe as an interrupt pipe, but as a
553 1.28 augustss * normal bulk endpoint. We send an IN transfer down the wire at the
554 1.28 augustss * appropriate time, because we know exactly when to expect data on
555 1.28 augustss * that endpoint. This saves bandwidth, but more important, makes the
556 1.28 augustss * code for handling the data on that endpoint simpler. No data
557 1.28 augustss * arriving concurrently.
558 1.28 augustss */
559 1.78 gehenna if (sc->sc_wire == UMASS_WPROTO_CBI_I) {
560 1.149.2.14 skrll DPRINTFM(UDMASS_USB,
561 1.149.2.14 skrll "sc %p: opening iface %p epaddr %d for INTRIN",
562 1.149.2.14 skrll sc, sc->sc_iface, sc->sc_epaddr[UMASS_INTRIN], 0);
563 1.76 gehenna err = usbd_open_pipe(sc->sc_iface, sc->sc_epaddr[UMASS_INTRIN],
564 1.149.2.16 skrll USBD_EXCLUSIVE_USE | USBD_MPSAFE, &sc->sc_pipe[UMASS_INTRIN]);
565 1.28 augustss if (err) {
566 1.128 cube aprint_error_dev(self, "couldn't open %u-in (intr)\n",
567 1.128 cube sc->sc_epaddr[UMASS_INTRIN]);
568 1.28 augustss umass_disco(sc);
569 1.131 dyoung return;
570 1.28 augustss }
571 1.28 augustss }
572 1.28 augustss
573 1.28 augustss /* initialisation of generic part */
574 1.28 augustss sc->transfer_state = TSTATE_IDLE;
575 1.28 augustss
576 1.28 augustss for (i = 0; i < XFER_NR; i++) {
577 1.149.2.9 skrll sc->transfer_xfer[i] = NULL;
578 1.28 augustss }
579 1.149.2.9 skrll
580 1.149.2.5 skrll /*
581 1.149.2.9 skrll * Create the transfers
582 1.149.2.5 skrll */
583 1.149.2.9 skrll struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev);
584 1.78 gehenna switch (sc->sc_wire) {
585 1.78 gehenna case UMASS_WPROTO_BBB:
586 1.149.2.9 skrll err = usbd_create_xfer(sc->sc_pipe[UMASS_BULKIN],
587 1.149.2.9 skrll UMASS_MAX_TRANSFER_SIZE, USBD_SHORT_XFER_OK, 0,
588 1.149.2.9 skrll &sc->transfer_xfer[XFER_BBB_DATAIN]);
589 1.149.2.9 skrll if (err)
590 1.149.2.9 skrll goto fail_create;
591 1.149.2.9 skrll err = usbd_create_xfer(sc->sc_pipe[UMASS_BULKOUT],
592 1.149.2.9 skrll UMASS_MAX_TRANSFER_SIZE, USBD_SHORT_XFER_OK, 0,
593 1.149.2.9 skrll &sc->transfer_xfer[XFER_BBB_DATAOUT]);
594 1.149.2.9 skrll if (err)
595 1.149.2.9 skrll goto fail_create;
596 1.149.2.9 skrll err = usbd_create_xfer(sc->sc_pipe[UMASS_BULKOUT],
597 1.149.2.9 skrll UMASS_BBB_CBW_SIZE, USBD_SHORT_XFER_OK, 0,
598 1.149.2.9 skrll &sc->transfer_xfer[XFER_BBB_CBW]);
599 1.149.2.9 skrll if (err)
600 1.149.2.9 skrll goto fail_create;
601 1.149.2.9 skrll err = usbd_create_xfer(sc->sc_pipe[UMASS_BULKIN],
602 1.149.2.9 skrll UMASS_BBB_CSW_SIZE, USBD_SHORT_XFER_OK, 0,
603 1.149.2.9 skrll &sc->transfer_xfer[XFER_BBB_CSW1]);
604 1.149.2.9 skrll if (err)
605 1.149.2.9 skrll goto fail_create;
606 1.149.2.9 skrll err = usbd_create_xfer(sc->sc_pipe[UMASS_BULKIN],
607 1.149.2.9 skrll UMASS_BBB_CSW_SIZE, USBD_SHORT_XFER_OK, 0,
608 1.149.2.9 skrll &sc->transfer_xfer[XFER_BBB_CSW2]);
609 1.149.2.9 skrll if (err)
610 1.149.2.9 skrll goto fail_create;
611 1.149.2.9 skrll err = usbd_create_xfer(pipe0, 0, 0, 0,
612 1.149.2.9 skrll &sc->transfer_xfer[XFER_BBB_SCLEAR]);
613 1.149.2.9 skrll if (err)
614 1.149.2.9 skrll goto fail_create;
615 1.149.2.9 skrll err = usbd_create_xfer(pipe0, 0, 0, 0,
616 1.149.2.9 skrll &sc->transfer_xfer[XFER_BBB_DCLEAR]);
617 1.149.2.9 skrll if (err)
618 1.149.2.9 skrll goto fail_create;
619 1.149.2.9 skrll err = usbd_create_xfer(pipe0, 0, 0, 0,
620 1.149.2.9 skrll &sc->transfer_xfer[XFER_BBB_RESET1]);
621 1.149.2.9 skrll if (err)
622 1.149.2.9 skrll goto fail_create;
623 1.149.2.9 skrll err = usbd_create_xfer(pipe0, 0, 0, 0,
624 1.149.2.9 skrll &sc->transfer_xfer[XFER_BBB_RESET2]);
625 1.149.2.9 skrll if (err)
626 1.149.2.9 skrll goto fail_create;
627 1.149.2.9 skrll err = usbd_create_xfer(pipe0, 0, 0, 0,
628 1.149.2.9 skrll &sc->transfer_xfer[XFER_BBB_RESET3]);
629 1.149.2.9 skrll if (err)
630 1.149.2.9 skrll goto fail_create;
631 1.148 mlelstv break;
632 1.78 gehenna case UMASS_WPROTO_CBI:
633 1.78 gehenna case UMASS_WPROTO_CBI_I:
634 1.149.2.9 skrll err = usbd_create_xfer(pipe0, sizeof(sc->cbl), 0, 0,
635 1.149.2.9 skrll &sc->transfer_xfer[XFER_CBI_CB]);
636 1.149.2.9 skrll if (err)
637 1.149.2.9 skrll goto fail_create;
638 1.149.2.9 skrll err = usbd_create_xfer(sc->sc_pipe[UMASS_BULKIN],
639 1.149.2.9 skrll UMASS_MAX_TRANSFER_SIZE, USBD_SHORT_XFER_OK, 0,
640 1.149.2.9 skrll &sc->transfer_xfer[XFER_CBI_DATAIN]);
641 1.149.2.9 skrll if (err)
642 1.149.2.9 skrll goto fail_create;
643 1.149.2.9 skrll err = usbd_create_xfer(sc->sc_pipe[UMASS_BULKOUT],
644 1.149.2.9 skrll UMASS_MAX_TRANSFER_SIZE, 0, 0,
645 1.149.2.9 skrll &sc->transfer_xfer[XFER_CBI_DATAOUT]);
646 1.149.2.9 skrll if (err)
647 1.149.2.9 skrll goto fail_create;
648 1.149.2.13 skrll err = usbd_create_xfer(sc->sc_pipe[UMASS_INTRIN],
649 1.149.2.13 skrll sizeof(sc->sbl), 0, 0,
650 1.149.2.13 skrll &sc->transfer_xfer[XFER_CBI_STATUS]);
651 1.149.2.9 skrll if (err)
652 1.149.2.9 skrll goto fail_create;
653 1.149.2.9 skrll err = usbd_create_xfer(pipe0, 0, 0, 0,
654 1.149.2.9 skrll &sc->transfer_xfer[XFER_CBI_DCLEAR]);
655 1.149.2.9 skrll if (err)
656 1.149.2.9 skrll goto fail_create;
657 1.149.2.9 skrll err = usbd_create_xfer(pipe0, 0, 0, 0,
658 1.149.2.9 skrll &sc->transfer_xfer[XFER_CBI_SCLEAR]);
659 1.149.2.9 skrll if (err)
660 1.149.2.9 skrll goto fail_create;
661 1.149.2.9 skrll err = usbd_create_xfer(pipe0, sizeof(sc->cbl), 0, 0,
662 1.149.2.9 skrll &sc->transfer_xfer[XFER_CBI_RESET1]);
663 1.149.2.9 skrll if (err)
664 1.149.2.9 skrll goto fail_create;
665 1.149.2.9 skrll err = usbd_create_xfer(pipe0, sizeof(sc->cbl), 0, 0,
666 1.149.2.9 skrll &sc->transfer_xfer[XFER_CBI_RESET2]);
667 1.149.2.9 skrll if (err)
668 1.149.2.9 skrll goto fail_create;
669 1.149.2.9 skrll err = usbd_create_xfer(pipe0, sizeof(sc->cbl), 0, 0,
670 1.149.2.9 skrll &sc->transfer_xfer[XFER_CBI_RESET3]);
671 1.149.2.9 skrll if (err)
672 1.149.2.9 skrll goto fail_create;
673 1.28 augustss break;
674 1.28 augustss default:
675 1.149.2.9 skrll fail_create:
676 1.149.2.9 skrll aprint_error_dev(self, "failed to create xfers\n");
677 1.148 mlelstv umass_disco(sc);
678 1.148 mlelstv return;
679 1.148 mlelstv }
680 1.148 mlelstv
681 1.149.2.9 skrll /*
682 1.149.2.9 skrll * Record buffer pinters for data transfer (it's huge), command and
683 1.149.2.9 skrll * status data here
684 1.149.2.9 skrll */
685 1.149.2.9 skrll switch (sc->sc_wire) {
686 1.149.2.9 skrll case UMASS_WPROTO_BBB:
687 1.149.2.9 skrll sc->datain_buffer =
688 1.149.2.9 skrll usbd_get_buffer(sc->transfer_xfer[XFER_BBB_DATAIN]);
689 1.149.2.9 skrll sc->dataout_buffer =
690 1.149.2.9 skrll usbd_get_buffer(sc->transfer_xfer[XFER_BBB_DATAOUT]);
691 1.149.2.9 skrll sc->cmd_buffer =
692 1.149.2.9 skrll usbd_get_buffer(sc->transfer_xfer[XFER_BBB_CBW]);
693 1.149.2.9 skrll sc->s1_buffer =
694 1.149.2.9 skrll usbd_get_buffer(sc->transfer_xfer[XFER_BBB_CSW1]);
695 1.149.2.9 skrll sc->s2_buffer =
696 1.149.2.9 skrll usbd_get_buffer(sc->transfer_xfer[XFER_BBB_CSW2]);
697 1.149.2.9 skrll break;
698 1.149.2.9 skrll case UMASS_WPROTO_CBI:
699 1.149.2.9 skrll case UMASS_WPROTO_CBI_I:
700 1.149.2.9 skrll sc->datain_buffer =
701 1.149.2.9 skrll usbd_get_buffer(sc->transfer_xfer[XFER_CBI_DATAIN]);
702 1.149.2.9 skrll sc->dataout_buffer =
703 1.149.2.9 skrll usbd_get_buffer(sc->transfer_xfer[XFER_CBI_DATAOUT]);
704 1.149.2.9 skrll sc->cmd_buffer =
705 1.149.2.9 skrll usbd_get_buffer(sc->transfer_xfer[XFER_CBI_CB]);
706 1.149.2.9 skrll sc->s1_buffer =
707 1.149.2.9 skrll usbd_get_buffer(sc->transfer_xfer[XFER_CBI_STATUS]);
708 1.149.2.9 skrll sc->s2_buffer =
709 1.149.2.9 skrll usbd_get_buffer(sc->transfer_xfer[XFER_CBI_RESET1]);
710 1.149.2.9 skrll break;
711 1.149.2.9 skrll default:
712 1.149.2.9 skrll break;
713 1.149.2.9 skrll }
714 1.149.2.9 skrll
715 1.28 augustss /* Initialise the wire protocol specific methods */
716 1.78 gehenna switch (sc->sc_wire) {
717 1.78 gehenna case UMASS_WPROTO_BBB:
718 1.75 gehenna sc->sc_methods = &umass_bbb_methods;
719 1.78 gehenna break;
720 1.78 gehenna case UMASS_WPROTO_CBI:
721 1.78 gehenna case UMASS_WPROTO_CBI_I:
722 1.75 gehenna sc->sc_methods = &umass_cbi_methods;
723 1.78 gehenna break;
724 1.78 gehenna default:
725 1.78 gehenna umass_disco(sc);
726 1.131 dyoung return;
727 1.78 gehenna }
728 1.28 augustss
729 1.79 augustss error = 0;
730 1.79 augustss switch (sc->sc_cmd) {
731 1.79 augustss case UMASS_CPROTO_RBC:
732 1.79 augustss case UMASS_CPROTO_SCSI:
733 1.79 augustss #if NSCSIBUS > 0
734 1.79 augustss error = umass_scsi_attach(sc);
735 1.79 augustss #else
736 1.128 cube aprint_error_dev(self, "scsibus not configured\n");
737 1.79 augustss #endif
738 1.79 augustss break;
739 1.79 augustss
740 1.79 augustss case UMASS_CPROTO_UFI:
741 1.79 augustss case UMASS_CPROTO_ATAPI:
742 1.79 augustss #if NATAPIBUS > 0
743 1.79 augustss error = umass_atapi_attach(sc);
744 1.79 augustss #else
745 1.128 cube aprint_error_dev(self, "atapibus not configured\n");
746 1.80 augustss #endif
747 1.80 augustss break;
748 1.80 augustss
749 1.80 augustss case UMASS_CPROTO_ISD_ATA:
750 1.80 augustss #if NWD > 0
751 1.80 augustss error = umass_isdata_attach(sc);
752 1.80 augustss #else
753 1.128 cube aprint_error_dev(self, "isdata not configured\n");
754 1.79 augustss #endif
755 1.79 augustss break;
756 1.79 augustss
757 1.79 augustss default:
758 1.128 cube aprint_error_dev(self, "command protocol=0x%x not supported\n",
759 1.128 cube sc->sc_cmd);
760 1.28 augustss umass_disco(sc);
761 1.131 dyoung return;
762 1.28 augustss }
763 1.79 augustss if (error) {
764 1.128 cube aprint_error_dev(self, "bus attach failed\n");
765 1.79 augustss umass_disco(sc);
766 1.131 dyoung return;
767 1.79 augustss }
768 1.79 augustss
769 1.149.2.14 skrll usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev);
770 1.1 thorpej
771 1.125 jmcneill if (!pmf_device_register(self, NULL, NULL))
772 1.125 jmcneill aprint_error_dev(self, "couldn't establish power handler\n");
773 1.125 jmcneill
774 1.149.2.14 skrll DPRINTFM(UDMASS_GEN, "sc %p: Attach finished", sc, 0, 0, 0);
775 1.28 augustss
776 1.131 dyoung return;
777 1.1 thorpej }
778 1.1 thorpej
779 1.131 dyoung static void
780 1.131 dyoung umass_childdet(device_t self, device_t child)
781 1.131 dyoung {
782 1.131 dyoung struct umass_softc *sc = device_private(self);
783 1.131 dyoung
784 1.142 mrg KASSERTMSG(child == sc->bus->sc_child,
785 1.142 mrg "assertion child == sc->bus->sc_child failed\n");
786 1.131 dyoung sc->bus->sc_child = NULL;
787 1.131 dyoung }
788 1.131 dyoung
789 1.131 dyoung int
790 1.131 dyoung umass_detach(device_t self, int flags)
791 1.28 augustss {
792 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
793 1.131 dyoung struct umass_softc *sc = device_private(self);
794 1.105 augustss struct umassbus_softc *scbus;
795 1.145 mrg int rv = 0, i;
796 1.1 thorpej
797 1.149.2.14 skrll DPRINTFM(UDMASS_USB, "sc %p detached", sc, 0, 0, 0);
798 1.28 augustss
799 1.125 jmcneill pmf_device_deregister(self);
800 1.125 jmcneill
801 1.28 augustss /* Abort the pipes to wake up any waiting processes. */
802 1.73 gehenna for (i = 0 ; i < UMASS_NEP ; i++) {
803 1.117 nathanw if (sc->sc_pipe[i] != NULL)
804 1.73 gehenna usbd_abort_pipe(sc->sc_pipe[i]);
805 1.73 gehenna }
806 1.28 augustss
807 1.42 augustss /* Do we really need reference counting? Perhaps in ioctl() */
808 1.145 mrg mutex_enter(&sc->sc_lock);
809 1.28 augustss if (--sc->sc_refcnt >= 0) {
810 1.95 augustss #ifdef DIAGNOSTIC
811 1.128 cube aprint_normal_dev(self, "waiting for refcnt\n");
812 1.95 augustss #endif
813 1.28 augustss /* Wait for processes to go away. */
814 1.149.2.15 skrll if (cv_timedwait(&sc->sc_detach_cv, &sc->sc_lock, hz * 60)) {
815 1.149.2.15 skrll printf("%s: %s didn't detach\n", __func__,
816 1.149.2.15 skrll device_xname(sc->sc_dev));
817 1.149.2.15 skrll }
818 1.28 augustss }
819 1.145 mrg mutex_exit(&sc->sc_lock);
820 1.28 augustss
821 1.105 augustss scbus = sc->bus;
822 1.79 augustss if (scbus != NULL) {
823 1.79 augustss if (scbus->sc_child != NULL)
824 1.79 augustss rv = config_detach(scbus->sc_child, flags);
825 1.79 augustss free(scbus, M_DEVBUF);
826 1.79 augustss sc->bus = NULL;
827 1.79 augustss }
828 1.56 augustss
829 1.28 augustss if (rv != 0)
830 1.149.2.3 skrll return rv;
831 1.28 augustss
832 1.28 augustss umass_disco(sc);
833 1.28 augustss
834 1.149.2.14 skrll usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev);
835 1.28 augustss
836 1.145 mrg mutex_destroy(&sc->sc_lock);
837 1.145 mrg cv_destroy(&sc->sc_detach_cv);
838 1.145 mrg
839 1.149.2.3 skrll return rv;
840 1.79 augustss }
841 1.79 augustss
842 1.79 augustss int
843 1.128 cube umass_activate(device_t dev, enum devact act)
844 1.79 augustss {
845 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
846 1.128 cube struct umass_softc *sc = device_private(dev);
847 1.79 augustss
848 1.149.2.14 skrll DPRINTFM(UDMASS_USB, "sc %p act %d", sc, act, 0, 0);
849 1.79 augustss
850 1.79 augustss switch (act) {
851 1.79 augustss case DVACT_DEACTIVATE:
852 1.79 augustss sc->sc_dying = 1;
853 1.136 dyoung return 0;
854 1.133 dyoung default:
855 1.133 dyoung return EOPNOTSUPP;
856 1.79 augustss }
857 1.28 augustss }
858 1.28 augustss
859 1.28 augustss Static void
860 1.38 augustss umass_disco(struct umass_softc *sc)
861 1.88 augustss {
862 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
863 1.28 augustss int i;
864 1.28 augustss
865 1.28 augustss /* Remove all the pipes. */
866 1.73 gehenna for (i = 0 ; i < UMASS_NEP ; i++) {
867 1.93 toshii if (sc->sc_pipe[i] != NULL) {
868 1.130 jmorse usbd_abort_pipe(sc->sc_pipe[i]);
869 1.93 toshii }
870 1.73 gehenna }
871 1.130 jmorse
872 1.130 jmorse /* Some xfers may be queued in the default pipe */
873 1.130 jmorse usbd_abort_default_pipe(sc->sc_udev);
874 1.130 jmorse
875 1.130 jmorse /* Free the xfers. */
876 1.149.2.10 skrll for (i = 0; i < XFER_NR; i++) {
877 1.130 jmorse if (sc->transfer_xfer[i] != NULL) {
878 1.149.2.9 skrll usbd_destroy_xfer(sc->transfer_xfer[i]);
879 1.130 jmorse sc->transfer_xfer[i] = NULL;
880 1.130 jmorse }
881 1.149.2.10 skrll }
882 1.149.2.10 skrll
883 1.149.2.10 skrll for (i = 0 ; i < UMASS_NEP ; i++) {
884 1.149.2.10 skrll if (sc->sc_pipe[i] != NULL) {
885 1.149.2.10 skrll usbd_close_pipe(sc->sc_pipe[i]);
886 1.149.2.10 skrll sc->sc_pipe[i] = NULL;
887 1.149.2.10 skrll }
888 1.149.2.10 skrll }
889 1.149.2.10 skrll
890 1.28 augustss }
891 1.1 thorpej
892 1.28 augustss /*
893 1.28 augustss * Generic functions to handle transfers
894 1.28 augustss */
895 1.9 thorpej
896 1.28 augustss Static usbd_status
897 1.149.2.7 skrll umass_setup_transfer(struct umass_softc *sc, struct usbd_pipe *pipe,
898 1.28 augustss void *buffer, int buflen, int flags,
899 1.149.2.7 skrll struct usbd_xfer *xfer)
900 1.28 augustss {
901 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
902 1.28 augustss usbd_status err;
903 1.9 thorpej
904 1.28 augustss if (sc->sc_dying)
905 1.149.2.3 skrll return USBD_IOERROR;
906 1.18 augustss
907 1.28 augustss /* Initialiase a USB transfer and then schedule it */
908 1.18 augustss
909 1.149.2.9 skrll usbd_setup_xfer(xfer, sc, buffer, buflen, flags, sc->timeout,
910 1.149.2.9 skrll sc->sc_methods->wire_state);
911 1.18 augustss
912 1.28 augustss err = usbd_transfer(xfer);
913 1.149.2.14 skrll DPRINTFM(UDMASS_XFER, "start xfer buffer=%p buflen=%d flags=0x%x "
914 1.149.2.14 skrll "timeout=%d", buffer, buflen, flags, sc->timeout);
915 1.28 augustss if (err && err != USBD_IN_PROGRESS) {
916 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "failed to setup transfer... err=%d",
917 1.149.2.14 skrll err, 0, 0, 0);
918 1.149.2.3 skrll return err;
919 1.9 thorpej }
920 1.24 augustss
921 1.149.2.3 skrll return USBD_NORMAL_COMPLETION;
922 1.1 thorpej }
923 1.1 thorpej
924 1.1 thorpej
925 1.28 augustss Static usbd_status
926 1.74 gehenna umass_setup_ctrl_transfer(struct umass_softc *sc, usb_device_request_t *req,
927 1.149.2.7 skrll void *buffer, int buflen, int flags, struct usbd_xfer *xfer)
928 1.1 thorpej {
929 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
930 1.1 thorpej usbd_status err;
931 1.1 thorpej
932 1.28 augustss if (sc->sc_dying)
933 1.149.2.3 skrll return USBD_IOERROR;
934 1.1 thorpej
935 1.28 augustss /* Initialiase a USB control transfer and then schedule it */
936 1.1 thorpej
937 1.75 gehenna usbd_setup_default_xfer(xfer, sc->sc_udev, (void *) sc, sc->timeout,
938 1.75 gehenna req, buffer, buflen, flags, sc->sc_methods->wire_state);
939 1.1 thorpej
940 1.28 augustss err = usbd_transfer(xfer);
941 1.28 augustss if (err && err != USBD_IN_PROGRESS) {
942 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "failed to setup ctrl transfer... err=%d",
943 1.149.2.14 skrll err, 0, 0, 0);
944 1.1 thorpej
945 1.28 augustss /* do not reset, as this would make us loop */
946 1.149.2.3 skrll return err;
947 1.28 augustss }
948 1.1 thorpej
949 1.149.2.3 skrll return USBD_NORMAL_COMPLETION;
950 1.1 thorpej }
951 1.1 thorpej
952 1.28 augustss Static void
953 1.73 gehenna umass_clear_endpoint_stall(struct umass_softc *sc, int endpt,
954 1.149.2.7 skrll struct usbd_xfer *xfer)
955 1.7 thorpej {
956 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
957 1.149.2.14 skrll
958 1.28 augustss if (sc->sc_dying)
959 1.28 augustss return;
960 1.1 thorpej
961 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "Clear endpoint 0x%02x stall",
962 1.149.2.14 skrll sc->sc_epaddr[endpt], 0, 0, 0);
963 1.7 thorpej
964 1.73 gehenna usbd_clear_endpoint_toggle(sc->sc_pipe[endpt]);
965 1.7 thorpej
966 1.78 gehenna sc->sc_req.bmRequestType = UT_WRITE_ENDPOINT;
967 1.78 gehenna sc->sc_req.bRequest = UR_CLEAR_FEATURE;
968 1.78 gehenna USETW(sc->sc_req.wValue, UF_ENDPOINT_HALT);
969 1.78 gehenna USETW(sc->sc_req.wIndex, sc->sc_epaddr[endpt]);
970 1.78 gehenna USETW(sc->sc_req.wLength, 0);
971 1.78 gehenna umass_setup_ctrl_transfer(sc, &sc->sc_req, NULL, 0, 0, xfer);
972 1.28 augustss }
973 1.15 thorpej
974 1.29 enami #if 0
975 1.28 augustss Static void
976 1.28 augustss umass_reset(struct umass_softc *sc, transfer_cb_f cb, void *priv)
977 1.28 augustss {
978 1.28 augustss sc->transfer_cb = cb;
979 1.28 augustss sc->transfer_priv = priv;
980 1.1 thorpej
981 1.28 augustss /* The reset is a forced reset, so no error (yet) */
982 1.28 augustss sc->reset(sc, STATUS_CMD_OK);
983 1.7 thorpej }
984 1.29 enami #endif
985 1.1 thorpej
986 1.28 augustss /*
987 1.28 augustss * Bulk protocol specific functions
988 1.28 augustss */
989 1.28 augustss
990 1.28 augustss Static void
991 1.28 augustss umass_bbb_reset(struct umass_softc *sc, int status)
992 1.1 thorpej {
993 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
994 1.142 mrg KASSERTMSG(sc->sc_wire & UMASS_WPROTO_BBB,
995 1.142 mrg "sc->sc_wire == 0x%02x wrong for umass_bbb_reset\n",
996 1.142 mrg sc->sc_wire);
997 1.28 augustss
998 1.28 augustss if (sc->sc_dying)
999 1.28 augustss return;
1000 1.1 thorpej
1001 1.1 thorpej /*
1002 1.1 thorpej * Reset recovery (5.3.4 in Universal Serial Bus Mass Storage Class)
1003 1.1 thorpej *
1004 1.1 thorpej * For Reset Recovery the host shall issue in the following order:
1005 1.1 thorpej * a) a Bulk-Only Mass Storage Reset
1006 1.1 thorpej * b) a Clear Feature HALT to the Bulk-In endpoint
1007 1.1 thorpej * c) a Clear Feature HALT to the Bulk-Out endpoint
1008 1.28 augustss *
1009 1.28 augustss * This is done in 3 steps, states:
1010 1.28 augustss * TSTATE_BBB_RESET1
1011 1.28 augustss * TSTATE_BBB_RESET2
1012 1.28 augustss * TSTATE_BBB_RESET3
1013 1.28 augustss *
1014 1.28 augustss * If the reset doesn't succeed, the device should be port reset.
1015 1.1 thorpej */
1016 1.1 thorpej
1017 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "Bulk Reset", 0, 0, 0, 0);
1018 1.88 augustss
1019 1.28 augustss sc->transfer_state = TSTATE_BBB_RESET1;
1020 1.28 augustss sc->transfer_status = status;
1021 1.1 thorpej
1022 1.28 augustss /* reset is a class specific interface write */
1023 1.78 gehenna sc->sc_req.bmRequestType = UT_WRITE_CLASS_INTERFACE;
1024 1.78 gehenna sc->sc_req.bRequest = UR_BBB_RESET;
1025 1.78 gehenna USETW(sc->sc_req.wValue, 0);
1026 1.78 gehenna USETW(sc->sc_req.wIndex, sc->sc_ifaceno);
1027 1.78 gehenna USETW(sc->sc_req.wLength, 0);
1028 1.78 gehenna umass_setup_ctrl_transfer(sc, &sc->sc_req, NULL, 0, 0,
1029 1.28 augustss sc->transfer_xfer[XFER_BBB_RESET1]);
1030 1.28 augustss }
1031 1.28 augustss
1032 1.28 augustss Static void
1033 1.28 augustss umass_bbb_transfer(struct umass_softc *sc, int lun, void *cmd, int cmdlen,
1034 1.67 augustss void *data, int datalen, int dir, u_int timeout,
1035 1.143 mrg int flags, umass_callback cb, void *priv)
1036 1.28 augustss {
1037 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
1038 1.28 augustss static int dCBWtag = 42; /* unique for CBW of transfer */
1039 1.1 thorpej
1040 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p cmd=0x%02x", sc, *(u_char *)cmd, 0, 0);
1041 1.1 thorpej
1042 1.142 mrg KASSERTMSG(sc->sc_wire & UMASS_WPROTO_BBB,
1043 1.142 mrg "sc->sc_wire == 0x%02x wrong for umass_bbb_transfer\n",
1044 1.142 mrg sc->sc_wire);
1045 1.1 thorpej
1046 1.116 mycroft if (sc->sc_dying)
1047 1.116 mycroft return;
1048 1.116 mycroft
1049 1.67 augustss /* Be a little generous. */
1050 1.67 augustss sc->timeout = timeout + USBD_DEFAULT_TIMEOUT;
1051 1.67 augustss
1052 1.1 thorpej /*
1053 1.28 augustss * Do a Bulk-Only transfer with cmdlen bytes from cmd, possibly
1054 1.28 augustss * a data phase of datalen bytes from/to the device and finally a
1055 1.28 augustss * csw read phase.
1056 1.28 augustss * If the data direction was inbound a maximum of datalen bytes
1057 1.28 augustss * is stored in the buffer pointed to by data.
1058 1.28 augustss *
1059 1.28 augustss * umass_bbb_transfer initialises the transfer and lets the state
1060 1.88 augustss * machine in umass_bbb_state handle the completion. It uses the
1061 1.28 augustss * following states:
1062 1.28 augustss * TSTATE_BBB_COMMAND
1063 1.28 augustss * -> TSTATE_BBB_DATA
1064 1.28 augustss * -> TSTATE_BBB_STATUS
1065 1.28 augustss * -> TSTATE_BBB_STATUS2
1066 1.28 augustss * -> TSTATE_BBB_IDLE
1067 1.28 augustss *
1068 1.28 augustss * An error in any of those states will invoke
1069 1.28 augustss * umass_bbb_reset.
1070 1.1 thorpej */
1071 1.1 thorpej
1072 1.1 thorpej /* check the given arguments */
1073 1.142 mrg KASSERTMSG(datalen == 0 || data != NULL,
1074 1.142 mrg "%s: datalen > 0, but no buffer",device_xname(sc->sc_dev));
1075 1.142 mrg KASSERTMSG(cmdlen <= CBWCDBLENGTH,
1076 1.142 mrg "%s: cmdlen exceeds CDB length in CBW (%d > %d)",
1077 1.142 mrg device_xname(sc->sc_dev), cmdlen, CBWCDBLENGTH);
1078 1.142 mrg KASSERTMSG(dir == DIR_NONE || datalen > 0,
1079 1.142 mrg "%s: datalen == 0 while direction is not NONE\n",
1080 1.142 mrg device_xname(sc->sc_dev));
1081 1.142 mrg KASSERTMSG(datalen == 0 || dir != DIR_NONE,
1082 1.142 mrg "%s: direction is NONE while datalen is not zero\n",
1083 1.142 mrg device_xname(sc->sc_dev));
1084 1.142 mrg /* CTASSERT */
1085 1.142 mrg KASSERTMSG(sizeof(umass_bbb_cbw_t) == UMASS_BBB_CBW_SIZE,
1086 1.142 mrg "%s: CBW struct does not have the right size (%zu vs. %u)\n",
1087 1.131 dyoung device_xname(sc->sc_dev),
1088 1.142 mrg sizeof(umass_bbb_cbw_t), UMASS_BBB_CBW_SIZE);
1089 1.142 mrg /* CTASSERT */
1090 1.142 mrg KASSERTMSG(sizeof(umass_bbb_csw_t) == UMASS_BBB_CSW_SIZE,
1091 1.142 mrg "%s: CSW struct does not have the right size (%zu vs. %u)\n",
1092 1.131 dyoung device_xname(sc->sc_dev),
1093 1.142 mrg sizeof(umass_bbb_csw_t), UMASS_BBB_CSW_SIZE);
1094 1.1 thorpej
1095 1.1 thorpej /*
1096 1.28 augustss * Determine the direction of the data transfer and the length.
1097 1.1 thorpej *
1098 1.1 thorpej * dCBWDataTransferLength (datalen) :
1099 1.1 thorpej * This field indicates the number of bytes of data that the host
1100 1.1 thorpej * intends to transfer on the IN or OUT Bulk endpoint(as indicated by
1101 1.1 thorpej * the Direction bit) during the execution of this command. If this
1102 1.1 thorpej * field is set to 0, the device will expect that no data will be
1103 1.1 thorpej * transferred IN or OUT during this command, regardless of the value
1104 1.1 thorpej * of the Direction bit defined in dCBWFlags.
1105 1.1 thorpej *
1106 1.1 thorpej * dCBWFlags (dir) :
1107 1.1 thorpej * The bits of the Flags field are defined as follows:
1108 1.28 augustss * Bits 0-6 reserved
1109 1.28 augustss * Bit 7 Direction - this bit shall be ignored if the
1110 1.28 augustss * dCBWDataTransferLength field is zero.
1111 1.28 augustss * 0 = data Out from host to device
1112 1.28 augustss * 1 = data In from device to host
1113 1.1 thorpej */
1114 1.1 thorpej
1115 1.28 augustss /* Fill in the Command Block Wrapper */
1116 1.28 augustss USETDW(sc->cbw.dCBWSignature, CBWSIGNATURE);
1117 1.28 augustss USETDW(sc->cbw.dCBWTag, dCBWtag);
1118 1.28 augustss dCBWtag++; /* cannot be done in macro (it will be done 4 times) */
1119 1.28 augustss USETDW(sc->cbw.dCBWDataTransferLength, datalen);
1120 1.28 augustss /* DIR_NONE is treated as DIR_OUT (0x00) */
1121 1.28 augustss sc->cbw.bCBWFlags = (dir == DIR_IN? CBWFLAGS_IN:CBWFLAGS_OUT);
1122 1.28 augustss sc->cbw.bCBWLUN = lun;
1123 1.28 augustss sc->cbw.bCDBLength = cmdlen;
1124 1.69 gehenna memcpy(sc->cbw.CBWCDB, cmd, cmdlen);
1125 1.28 augustss
1126 1.28 augustss DIF(UDMASS_BBB, umass_bbb_dump_cbw(sc, &sc->cbw));
1127 1.28 augustss
1128 1.28 augustss /* store the details for the data transfer phase */
1129 1.28 augustss sc->transfer_dir = dir;
1130 1.28 augustss sc->transfer_data = data;
1131 1.28 augustss sc->transfer_datalen = datalen;
1132 1.28 augustss sc->transfer_actlen = 0;
1133 1.28 augustss sc->transfer_cb = cb;
1134 1.28 augustss sc->transfer_priv = priv;
1135 1.28 augustss sc->transfer_status = STATUS_CMD_OK;
1136 1.1 thorpej
1137 1.28 augustss /* move from idle to the command state */
1138 1.28 augustss sc->transfer_state = TSTATE_BBB_COMMAND;
1139 1.1 thorpej
1140 1.1 thorpej /* Send the CBW from host to device via bulk-out endpoint. */
1141 1.73 gehenna if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKOUT],
1142 1.143 mrg &sc->cbw, UMASS_BBB_CBW_SIZE, flags,
1143 1.28 augustss sc->transfer_xfer[XFER_BBB_CBW])) {
1144 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1145 1.1 thorpej }
1146 1.28 augustss }
1147 1.28 augustss
1148 1.1 thorpej
1149 1.28 augustss Static void
1150 1.149.2.7 skrll umass_bbb_state(struct usbd_xfer *xfer, void *priv,
1151 1.28 augustss usbd_status err)
1152 1.28 augustss {
1153 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
1154 1.28 augustss struct umass_softc *sc = (struct umass_softc *) priv;
1155 1.149.2.7 skrll struct usbd_xfer *next_xfer;
1156 1.135 is int residue;
1157 1.28 augustss
1158 1.142 mrg KASSERTMSG(sc->sc_wire & UMASS_WPROTO_BBB,
1159 1.142 mrg "sc->sc_wire == 0x%02x wrong for umass_bbb_state\n",
1160 1.142 mrg sc->sc_wire);
1161 1.28 augustss
1162 1.28 augustss if (sc->sc_dying)
1163 1.28 augustss return;
1164 1.1 thorpej
1165 1.1 thorpej /*
1166 1.28 augustss * State handling for BBB transfers.
1167 1.28 augustss *
1168 1.28 augustss * The subroutine is rather long. It steps through the states given in
1169 1.28 augustss * Annex A of the Bulk-Only specification.
1170 1.28 augustss * Each state first does the error handling of the previous transfer
1171 1.28 augustss * and then prepares the next transfer.
1172 1.28 augustss * Each transfer is done asynchroneously so after the request/transfer
1173 1.28 augustss * has been submitted you will find a 'return;'.
1174 1.1 thorpej */
1175 1.1 thorpej
1176 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p xfer %p, transfer_state %d dir %d", sc,
1177 1.149.2.14 skrll xfer, sc->transfer_state, sc->transfer_dir);
1178 1.149 skrll
1179 1.28 augustss switch (sc->transfer_state) {
1180 1.28 augustss
1181 1.28 augustss /***** Bulk Transfer *****/
1182 1.28 augustss case TSTATE_BBB_COMMAND:
1183 1.28 augustss /* Command transport phase, error handling */
1184 1.28 augustss if (err) {
1185 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p failed to send CBW", sc,
1186 1.149.2.14 skrll 0, 0, 0);
1187 1.28 augustss /* If the device detects that the CBW is invalid, then
1188 1.28 augustss * the device may STALL both bulk endpoints and require
1189 1.28 augustss * a Bulk-Reset
1190 1.28 augustss */
1191 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1192 1.28 augustss return;
1193 1.28 augustss }
1194 1.28 augustss
1195 1.28 augustss /* Data transport phase, setup transfer */
1196 1.28 augustss sc->transfer_state = TSTATE_BBB_DATA;
1197 1.28 augustss if (sc->transfer_dir == DIR_IN) {
1198 1.73 gehenna if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKIN],
1199 1.149.2.9 skrll sc->datain_buffer, sc->transfer_datalen,
1200 1.149.2.2 skrll USBD_SHORT_XFER_OK,
1201 1.149.2.9 skrll sc->transfer_xfer[XFER_BBB_DATAIN]))
1202 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1203 1.28 augustss
1204 1.28 augustss return;
1205 1.28 augustss } else if (sc->transfer_dir == DIR_OUT) {
1206 1.149.2.9 skrll memcpy(sc->dataout_buffer, sc->transfer_data,
1207 1.28 augustss sc->transfer_datalen);
1208 1.149.2.14 skrll if (umass_setup_transfer(sc,
1209 1.149.2.14 skrll sc->sc_pipe[UMASS_BULKOUT], sc->dataout_buffer,
1210 1.149.2.14 skrll sc->transfer_datalen, 0,/* fixed length transfer */
1211 1.149.2.14 skrll sc->transfer_xfer[XFER_BBB_DATAOUT]))
1212 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1213 1.1 thorpej
1214 1.28 augustss return;
1215 1.28 augustss } else {
1216 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p: no data phase", sc, 0, 0,
1217 1.149.2.14 skrll 0);
1218 1.28 augustss }
1219 1.1 thorpej
1220 1.28 augustss /* FALLTHROUGH if no data phase, err == 0 */
1221 1.28 augustss case TSTATE_BBB_DATA:
1222 1.103 mycroft /* Command transport phase error handling (ignored if no data
1223 1.28 augustss * phase (fallthrough from previous state)) */
1224 1.28 augustss if (sc->transfer_dir != DIR_NONE) {
1225 1.28 augustss /* retrieve the length of the transfer that was done */
1226 1.28 augustss usbd_get_xfer_status(xfer, NULL, NULL,
1227 1.103 mycroft &sc->transfer_actlen, NULL);
1228 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p: BBB_DATA actlen=%d",
1229 1.149.2.14 skrll sc, sc->transfer_actlen, 0, 0);
1230 1.28 augustss
1231 1.28 augustss if (err) {
1232 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p Data dir %d err %d"
1233 1.149.2.14 skrll " failed, ", sc, sc->transfer_dir,
1234 1.149.2.14 skrll sc->transfer_datalen, err);
1235 1.28 augustss
1236 1.28 augustss if (err == USBD_STALLED) {
1237 1.70 gehenna sc->transfer_state = TSTATE_BBB_DCLEAR;
1238 1.28 augustss umass_clear_endpoint_stall(sc,
1239 1.28 augustss (sc->transfer_dir == DIR_IN?
1240 1.73 gehenna UMASS_BULKIN:UMASS_BULKOUT),
1241 1.28 augustss sc->transfer_xfer[XFER_BBB_DCLEAR]);
1242 1.28 augustss } else {
1243 1.28 augustss /* Unless the error is a pipe stall the
1244 1.28 augustss * error is fatal.
1245 1.28 augustss */
1246 1.28 augustss umass_bbb_reset(sc,STATUS_WIRE_FAILED);
1247 1.28 augustss }
1248 1.103 mycroft return;
1249 1.28 augustss }
1250 1.28 augustss }
1251 1.1 thorpej
1252 1.101 mycroft /* FALLTHROUGH, err == 0 (no data phase or successful) */
1253 1.101 mycroft case TSTATE_BBB_DCLEAR: /* stall clear after data phase */
1254 1.28 augustss if (sc->transfer_dir == DIR_IN)
1255 1.149.2.9 skrll memcpy(sc->transfer_data, sc->datain_buffer,
1256 1.28 augustss sc->transfer_actlen);
1257 1.28 augustss
1258 1.28 augustss DIF(UDMASS_BBB, if (sc->transfer_dir == DIR_IN)
1259 1.28 augustss umass_dump_buffer(sc, sc->transfer_data,
1260 1.28 augustss sc->transfer_datalen, 48));
1261 1.28 augustss
1262 1.94 wiz /* FALLTHROUGH, err == 0 (no data phase or successful) */
1263 1.28 augustss case TSTATE_BBB_SCLEAR: /* stall clear after status phase */
1264 1.28 augustss /* Reading of CSW after bulk stall condition in data phase
1265 1.28 augustss * (TSTATE_BBB_DATA2) or bulk-in stall condition after
1266 1.28 augustss * reading CSW (TSTATE_BBB_SCLEAR).
1267 1.94 wiz * In the case of no data phase or successful data phase,
1268 1.28 augustss * err == 0 and the following if block is passed.
1269 1.28 augustss */
1270 1.28 augustss if (err) { /* should not occur */
1271 1.103 mycroft printf("%s: BBB bulk-%s stall clear failed, %s\n",
1272 1.131 dyoung device_xname(sc->sc_dev),
1273 1.103 mycroft (sc->transfer_dir == DIR_IN? "in":"out"),
1274 1.103 mycroft usbd_errstr(err));
1275 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1276 1.28 augustss return;
1277 1.28 augustss }
1278 1.88 augustss
1279 1.28 augustss /* Status transport phase, setup transfer */
1280 1.28 augustss if (sc->transfer_state == TSTATE_BBB_COMMAND ||
1281 1.28 augustss sc->transfer_state == TSTATE_BBB_DATA ||
1282 1.28 augustss sc->transfer_state == TSTATE_BBB_DCLEAR) {
1283 1.94 wiz /* After no data phase, successful data phase and
1284 1.28 augustss * after clearing bulk-in/-out stall condition
1285 1.28 augustss */
1286 1.28 augustss sc->transfer_state = TSTATE_BBB_STATUS1;
1287 1.28 augustss next_xfer = sc->transfer_xfer[XFER_BBB_CSW1];
1288 1.28 augustss } else {
1289 1.28 augustss /* After first attempt of fetching CSW */
1290 1.28 augustss sc->transfer_state = TSTATE_BBB_STATUS2;
1291 1.28 augustss next_xfer = sc->transfer_xfer[XFER_BBB_CSW2];
1292 1.1 thorpej }
1293 1.1 thorpej
1294 1.28 augustss /* Read the Command Status Wrapper via bulk-in endpoint. */
1295 1.73 gehenna if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKIN],
1296 1.73 gehenna &sc->csw, UMASS_BBB_CSW_SIZE, 0, next_xfer)) {
1297 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1298 1.28 augustss return;
1299 1.28 augustss }
1300 1.1 thorpej
1301 1.28 augustss return;
1302 1.28 augustss case TSTATE_BBB_STATUS1: /* first attempt */
1303 1.28 augustss case TSTATE_BBB_STATUS2: /* second attempt */
1304 1.28 augustss /* Status transfer, error handling */
1305 1.1 thorpej if (err) {
1306 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p Failed to read CSW err %d "
1307 1.149.2.14 skrll "(state %d)", sc, err, sc->transfer_state, 0);
1308 1.28 augustss
1309 1.28 augustss /* If this was the first attempt at fetching the CSW
1310 1.28 augustss * retry it, otherwise fail.
1311 1.28 augustss */
1312 1.28 augustss if (sc->transfer_state == TSTATE_BBB_STATUS1) {
1313 1.70 gehenna sc->transfer_state = TSTATE_BBB_SCLEAR;
1314 1.73 gehenna umass_clear_endpoint_stall(sc, UMASS_BULKIN,
1315 1.66 augustss sc->transfer_xfer[XFER_BBB_SCLEAR]);
1316 1.28 augustss return;
1317 1.28 augustss } else {
1318 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1319 1.28 augustss return;
1320 1.28 augustss }
1321 1.28 augustss }
1322 1.28 augustss
1323 1.28 augustss DIF(UDMASS_BBB, umass_bbb_dump_csw(sc, &sc->csw));
1324 1.68 augustss
1325 1.146 drochner #ifdef UMASS_DEBUG
1326 1.146 drochner residue = UGETDW(sc->csw.dCSWDataResidue);
1327 1.146 drochner if (residue != sc->transfer_datalen - sc->transfer_actlen)
1328 1.146 drochner printf("%s: dCSWDataResidue=%d req=%d act=%d\n",
1329 1.146 drochner device_xname(sc->sc_dev), residue,
1330 1.146 drochner sc->transfer_datalen, sc->transfer_actlen);
1331 1.146 drochner #endif
1332 1.146 drochner residue = sc->transfer_datalen - sc->transfer_actlen;
1333 1.135 is
1334 1.68 augustss /* Translate weird command-status signatures. */
1335 1.78 gehenna if ((sc->sc_quirks & UMASS_QUIRK_WRONG_CSWSIG) &&
1336 1.68 augustss UGETDW(sc->csw.dCSWSignature) == CSWSIGNATURE_OLYMPUS_C1)
1337 1.68 augustss USETDW(sc->csw.dCSWSignature, CSWSIGNATURE);
1338 1.91 erh
1339 1.91 erh /* Translate invalid command-status tags */
1340 1.91 erh if (sc->sc_quirks & UMASS_QUIRK_WRONG_CSWTAG)
1341 1.91 erh USETDW(sc->csw.dCSWTag, UGETDW(sc->cbw.dCBWTag));
1342 1.28 augustss
1343 1.28 augustss /* Check CSW and handle any error */
1344 1.28 augustss if (UGETDW(sc->csw.dCSWSignature) != CSWSIGNATURE) {
1345 1.28 augustss /* Invalid CSW: Wrong signature or wrong tag might
1346 1.28 augustss * indicate that the device is confused -> reset it.
1347 1.28 augustss */
1348 1.28 augustss printf("%s: Invalid CSW: sig 0x%08x should be 0x%08x\n",
1349 1.131 dyoung device_xname(sc->sc_dev),
1350 1.28 augustss UGETDW(sc->csw.dCSWSignature),
1351 1.28 augustss CSWSIGNATURE);
1352 1.28 augustss
1353 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1354 1.28 augustss return;
1355 1.28 augustss } else if (UGETDW(sc->csw.dCSWTag)
1356 1.28 augustss != UGETDW(sc->cbw.dCBWTag)) {
1357 1.28 augustss printf("%s: Invalid CSW: tag %d should be %d\n",
1358 1.131 dyoung device_xname(sc->sc_dev),
1359 1.28 augustss UGETDW(sc->csw.dCSWTag),
1360 1.28 augustss UGETDW(sc->cbw.dCBWTag));
1361 1.28 augustss
1362 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1363 1.28 augustss return;
1364 1.28 augustss
1365 1.28 augustss /* CSW is valid here */
1366 1.28 augustss } else if (sc->csw.bCSWStatus > CSWSTATUS_PHASE) {
1367 1.28 augustss printf("%s: Invalid CSW: status %d > %d\n",
1368 1.131 dyoung device_xname(sc->sc_dev),
1369 1.28 augustss sc->csw.bCSWStatus,
1370 1.28 augustss CSWSTATUS_PHASE);
1371 1.28 augustss
1372 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1373 1.28 augustss return;
1374 1.28 augustss } else if (sc->csw.bCSWStatus == CSWSTATUS_PHASE) {
1375 1.28 augustss printf("%s: Phase Error, residue = %d\n",
1376 1.135 is device_xname(sc->sc_dev), residue);
1377 1.88 augustss
1378 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1379 1.28 augustss return;
1380 1.28 augustss
1381 1.28 augustss } else if (sc->transfer_actlen > sc->transfer_datalen) {
1382 1.28 augustss /* Buffer overrun! Don't let this go by unnoticed */
1383 1.147 skrll panic("%s: transferred %s %d bytes instead of %d bytes",
1384 1.147 skrll device_xname(sc->sc_dev),
1385 1.147 skrll sc->transfer_dir == DIR_IN ? "IN" : "OUT",
1386 1.147 skrll sc->transfer_actlen, sc->transfer_datalen);
1387 1.62 augustss #if 0
1388 1.28 augustss } else if (sc->transfer_datalen - sc->transfer_actlen
1389 1.135 is != residue) {
1390 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p: actlen=%d != residue=%d\n",
1391 1.149.2.14 skrll sc,
1392 1.28 augustss sc->transfer_datalen - sc->transfer_actlen,
1393 1.135 is residue));
1394 1.28 augustss
1395 1.28 augustss umass_bbb_reset(sc, STATUS_WIRE_FAILED);
1396 1.28 augustss return;
1397 1.62 augustss #endif
1398 1.28 augustss } else if (sc->csw.bCSWStatus == CSWSTATUS_FAILED) {
1399 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p: Command Failed, res = %d",
1400 1.149.2.14 skrll sc, residue, 0, 0);
1401 1.28 augustss
1402 1.28 augustss /* SCSI command failed but transfer was succesful */
1403 1.28 augustss sc->transfer_state = TSTATE_IDLE;
1404 1.135 is sc->transfer_cb(sc, sc->transfer_priv, residue,
1405 1.28 augustss STATUS_CMD_FAILED);
1406 1.28 augustss
1407 1.28 augustss return;
1408 1.28 augustss
1409 1.28 augustss } else { /* success */
1410 1.28 augustss sc->transfer_state = TSTATE_IDLE;
1411 1.135 is sc->transfer_cb(sc, sc->transfer_priv, residue,
1412 1.28 augustss STATUS_CMD_OK);
1413 1.28 augustss
1414 1.28 augustss return;
1415 1.1 thorpej }
1416 1.1 thorpej
1417 1.28 augustss /***** Bulk Reset *****/
1418 1.28 augustss case TSTATE_BBB_RESET1:
1419 1.28 augustss if (err)
1420 1.28 augustss printf("%s: BBB reset failed, %s\n",
1421 1.131 dyoung device_xname(sc->sc_dev), usbd_errstr(err));
1422 1.28 augustss
1423 1.70 gehenna sc->transfer_state = TSTATE_BBB_RESET2;
1424 1.73 gehenna umass_clear_endpoint_stall(sc, UMASS_BULKIN,
1425 1.28 augustss sc->transfer_xfer[XFER_BBB_RESET2]);
1426 1.28 augustss
1427 1.28 augustss return;
1428 1.28 augustss case TSTATE_BBB_RESET2:
1429 1.28 augustss if (err) /* should not occur */
1430 1.28 augustss printf("%s: BBB bulk-in clear stall failed, %s\n",
1431 1.131 dyoung device_xname(sc->sc_dev), usbd_errstr(err));
1432 1.28 augustss /* no error recovery, otherwise we end up in a loop */
1433 1.28 augustss
1434 1.70 gehenna sc->transfer_state = TSTATE_BBB_RESET3;
1435 1.73 gehenna umass_clear_endpoint_stall(sc, UMASS_BULKOUT,
1436 1.28 augustss sc->transfer_xfer[XFER_BBB_RESET3]);
1437 1.28 augustss
1438 1.28 augustss return;
1439 1.28 augustss case TSTATE_BBB_RESET3:
1440 1.28 augustss if (err) /* should not occur */
1441 1.28 augustss printf("%s: BBB bulk-out clear stall failed, %s\n",
1442 1.131 dyoung device_xname(sc->sc_dev), usbd_errstr(err));
1443 1.28 augustss /* no error recovery, otherwise we end up in a loop */
1444 1.28 augustss
1445 1.28 augustss sc->transfer_state = TSTATE_IDLE;
1446 1.28 augustss if (sc->transfer_priv) {
1447 1.28 augustss sc->transfer_cb(sc, sc->transfer_priv,
1448 1.28 augustss sc->transfer_datalen,
1449 1.28 augustss sc->transfer_status);
1450 1.28 augustss }
1451 1.1 thorpej
1452 1.28 augustss return;
1453 1.1 thorpej
1454 1.28 augustss /***** Default *****/
1455 1.28 augustss default:
1456 1.89 provos panic("%s: Unknown state %d",
1457 1.131 dyoung device_xname(sc->sc_dev), sc->transfer_state);
1458 1.28 augustss }
1459 1.1 thorpej }
1460 1.1 thorpej
1461 1.1 thorpej /*
1462 1.28 augustss * Command/Bulk/Interrupt (CBI) specific functions
1463 1.1 thorpej */
1464 1.1 thorpej
1465 1.28 augustss Static int
1466 1.143 mrg umass_cbi_adsc(struct umass_softc *sc, char *buffer, int buflen, int flags,
1467 1.149.2.7 skrll struct usbd_xfer *xfer)
1468 1.1 thorpej {
1469 1.142 mrg KASSERTMSG(sc->sc_wire & (UMASS_WPROTO_CBI|UMASS_WPROTO_CBI_I),
1470 1.142 mrg "sc->sc_wire == 0x%02x wrong for umass_cbi_adsc\n",
1471 1.142 mrg sc->sc_wire);
1472 1.78 gehenna
1473 1.123 christos if ((sc->sc_cmd == UMASS_CPROTO_RBC) &&
1474 1.123 christos (sc->sc_quirks & UMASS_QUIRK_RBC_PAD_TO_12) != 0 && buflen < 12) {
1475 1.123 christos (void)memset(buffer + buflen, 0, 12 - buflen);
1476 1.123 christos buflen = 12;
1477 1.123 christos }
1478 1.123 christos
1479 1.78 gehenna sc->sc_req.bmRequestType = UT_WRITE_CLASS_INTERFACE;
1480 1.78 gehenna sc->sc_req.bRequest = UR_CBI_ADSC;
1481 1.78 gehenna USETW(sc->sc_req.wValue, 0);
1482 1.78 gehenna USETW(sc->sc_req.wIndex, sc->sc_ifaceno);
1483 1.78 gehenna USETW(sc->sc_req.wLength, buflen);
1484 1.78 gehenna return umass_setup_ctrl_transfer(sc, &sc->sc_req, buffer,
1485 1.143 mrg buflen, flags, xfer);
1486 1.28 augustss }
1487 1.28 augustss
1488 1.1 thorpej
1489 1.28 augustss Static void
1490 1.28 augustss umass_cbi_reset(struct umass_softc *sc, int status)
1491 1.28 augustss {
1492 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
1493 1.28 augustss int i;
1494 1.28 augustss # define SEND_DIAGNOSTIC_CMDLEN 12
1495 1.1 thorpej
1496 1.142 mrg KASSERTMSG(sc->sc_wire & (UMASS_WPROTO_CBI|UMASS_WPROTO_CBI_I),
1497 1.142 mrg "sc->sc_wire == 0x%02x wrong for umass_cbi_reset\n",
1498 1.142 mrg sc->sc_wire);
1499 1.15 thorpej
1500 1.28 augustss if (sc->sc_dying)
1501 1.28 augustss return;
1502 1.28 augustss
1503 1.28 augustss /*
1504 1.28 augustss * Command Block Reset Protocol
1505 1.88 augustss *
1506 1.28 augustss * First send a reset request to the device. Then clear
1507 1.28 augustss * any possibly stalled bulk endpoints.
1508 1.28 augustss
1509 1.28 augustss * This is done in 3 steps, states:
1510 1.28 augustss * TSTATE_CBI_RESET1
1511 1.28 augustss * TSTATE_CBI_RESET2
1512 1.28 augustss * TSTATE_CBI_RESET3
1513 1.28 augustss *
1514 1.28 augustss * If the reset doesn't succeed, the device should be port reset.
1515 1.28 augustss */
1516 1.28 augustss
1517 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: CBI Reset", sc, 0, 0, 0);
1518 1.88 augustss
1519 1.142 mrg /* CTASSERT */
1520 1.142 mrg KASSERTMSG(sizeof(sc->cbl) >= SEND_DIAGNOSTIC_CMDLEN,
1521 1.142 mrg "%s: CBL struct is too small (%zu < %u)\n",
1522 1.131 dyoung device_xname(sc->sc_dev),
1523 1.142 mrg sizeof(sc->cbl), SEND_DIAGNOSTIC_CMDLEN);
1524 1.28 augustss
1525 1.28 augustss sc->transfer_state = TSTATE_CBI_RESET1;
1526 1.28 augustss sc->transfer_status = status;
1527 1.28 augustss
1528 1.28 augustss /* The 0x1d code is the SEND DIAGNOSTIC command. To distingiush between
1529 1.28 augustss * the two the last 10 bytes of the cbl is filled with 0xff (section
1530 1.28 augustss * 2.2 of the CBI spec).
1531 1.28 augustss */
1532 1.28 augustss sc->cbl[0] = 0x1d; /* Command Block Reset */
1533 1.28 augustss sc->cbl[1] = 0x04;
1534 1.28 augustss for (i = 2; i < SEND_DIAGNOSTIC_CMDLEN; i++)
1535 1.28 augustss sc->cbl[i] = 0xff;
1536 1.28 augustss
1537 1.143 mrg umass_cbi_adsc(sc, sc->cbl, SEND_DIAGNOSTIC_CMDLEN, 0,
1538 1.28 augustss sc->transfer_xfer[XFER_CBI_RESET1]);
1539 1.28 augustss /* XXX if the command fails we should reset the port on the bub */
1540 1.28 augustss }
1541 1.28 augustss
1542 1.28 augustss Static void
1543 1.122 christos umass_cbi_transfer(struct umass_softc *sc, int lun,
1544 1.67 augustss void *cmd, int cmdlen, void *data, int datalen, int dir,
1545 1.143 mrg u_int timeout, int flags, umass_callback cb, void *priv)
1546 1.28 augustss {
1547 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
1548 1.149.2.14 skrll
1549 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: cmd=0x%02x, len=%d", sc, *(u_char *)cmd,
1550 1.149.2.14 skrll datalen, 0);
1551 1.28 augustss
1552 1.142 mrg KASSERTMSG(sc->sc_wire & (UMASS_WPROTO_CBI|UMASS_WPROTO_CBI_I),
1553 1.142 mrg "sc->sc_wire == 0x%02x wrong for umass_cbi_transfer\n",
1554 1.142 mrg sc->sc_wire);
1555 1.28 augustss
1556 1.28 augustss if (sc->sc_dying)
1557 1.28 augustss return;
1558 1.67 augustss
1559 1.67 augustss /* Be a little generous. */
1560 1.67 augustss sc->timeout = timeout + USBD_DEFAULT_TIMEOUT;
1561 1.28 augustss
1562 1.28 augustss /*
1563 1.28 augustss * Do a CBI transfer with cmdlen bytes from cmd, possibly
1564 1.28 augustss * a data phase of datalen bytes from/to the device and finally a
1565 1.28 augustss * csw read phase.
1566 1.28 augustss * If the data direction was inbound a maximum of datalen bytes
1567 1.28 augustss * is stored in the buffer pointed to by data.
1568 1.28 augustss *
1569 1.28 augustss * umass_cbi_transfer initialises the transfer and lets the state
1570 1.88 augustss * machine in umass_cbi_state handle the completion. It uses the
1571 1.28 augustss * following states:
1572 1.28 augustss * TSTATE_CBI_COMMAND
1573 1.28 augustss * -> XXX fill in
1574 1.28 augustss *
1575 1.28 augustss * An error in any of those states will invoke
1576 1.28 augustss * umass_cbi_reset.
1577 1.28 augustss */
1578 1.28 augustss
1579 1.28 augustss /* check the given arguments */
1580 1.142 mrg KASSERTMSG(datalen == 0 || data != NULL,
1581 1.142 mrg "%s: datalen > 0, but no buffer",device_xname(sc->sc_dev));
1582 1.142 mrg KASSERTMSG(datalen == 0 || dir != DIR_NONE,
1583 1.142 mrg "%s: direction is NONE while datalen is not zero\n",
1584 1.142 mrg device_xname(sc->sc_dev));
1585 1.28 augustss
1586 1.28 augustss /* store the details for the data transfer phase */
1587 1.28 augustss sc->transfer_dir = dir;
1588 1.28 augustss sc->transfer_data = data;
1589 1.28 augustss sc->transfer_datalen = datalen;
1590 1.28 augustss sc->transfer_actlen = 0;
1591 1.28 augustss sc->transfer_cb = cb;
1592 1.28 augustss sc->transfer_priv = priv;
1593 1.28 augustss sc->transfer_status = STATUS_CMD_OK;
1594 1.28 augustss
1595 1.28 augustss /* move from idle to the command state */
1596 1.28 augustss sc->transfer_state = TSTATE_CBI_COMMAND;
1597 1.28 augustss
1598 1.28 augustss /* Send the Command Block from host to device via control endpoint. */
1599 1.149.2.14 skrll if (umass_cbi_adsc(sc, cmd, cmdlen, flags,
1600 1.149.2.14 skrll sc->transfer_xfer[XFER_CBI_CB]))
1601 1.28 augustss umass_cbi_reset(sc, STATUS_WIRE_FAILED);
1602 1.28 augustss }
1603 1.28 augustss
1604 1.28 augustss Static void
1605 1.149.2.7 skrll umass_cbi_state(struct usbd_xfer *xfer, void *priv,
1606 1.28 augustss usbd_status err)
1607 1.28 augustss {
1608 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
1609 1.28 augustss struct umass_softc *sc = (struct umass_softc *) priv;
1610 1.28 augustss
1611 1.142 mrg KASSERTMSG(sc->sc_wire & (UMASS_WPROTO_CBI|UMASS_WPROTO_CBI_I),
1612 1.142 mrg "sc->sc_wire == 0x%02x wrong for umass_cbi_state\n",
1613 1.142 mrg sc->sc_wire);
1614 1.28 augustss
1615 1.28 augustss if (sc->sc_dying)
1616 1.28 augustss return;
1617 1.28 augustss
1618 1.28 augustss /*
1619 1.28 augustss * State handling for CBI transfers.
1620 1.28 augustss */
1621 1.28 augustss
1622 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: Handling CBI state %d, xfer=%p, ...",
1623 1.149.2.14 skrll sc, sc->transfer_state, xfer, 0);
1624 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "... err %d", err, 0, 0, 0);
1625 1.28 augustss
1626 1.28 augustss switch (sc->transfer_state) {
1627 1.28 augustss
1628 1.28 augustss /***** CBI Transfer *****/
1629 1.28 augustss case TSTATE_CBI_COMMAND:
1630 1.28 augustss if (err == USBD_STALLED) {
1631 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: Command Transport failed",
1632 1.149.2.14 skrll sc, 0, 0, 0);
1633 1.28 augustss /* Status transport by control pipe (section 2.3.2.1).
1634 1.28 augustss * The command contained in the command block failed.
1635 1.28 augustss *
1636 1.28 augustss * The control pipe has already been unstalled by the
1637 1.28 augustss * USB stack.
1638 1.28 augustss * Section 2.4.3.1.1 states that the bulk in endpoints
1639 1.28 augustss * should not stalled at this point.
1640 1.28 augustss */
1641 1.28 augustss
1642 1.28 augustss sc->transfer_state = TSTATE_IDLE;
1643 1.28 augustss sc->transfer_cb(sc, sc->transfer_priv,
1644 1.28 augustss sc->transfer_datalen,
1645 1.28 augustss STATUS_CMD_FAILED);
1646 1.28 augustss
1647 1.28 augustss return;
1648 1.28 augustss } else if (err) {
1649 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: failed to send ADSC",
1650 1.149.2.14 skrll sc, 0, 0, 0);
1651 1.28 augustss umass_cbi_reset(sc, STATUS_WIRE_FAILED);
1652 1.28 augustss return;
1653 1.28 augustss }
1654 1.88 augustss
1655 1.103 mycroft /* Data transport phase, setup transfer */
1656 1.28 augustss sc->transfer_state = TSTATE_CBI_DATA;
1657 1.28 augustss if (sc->transfer_dir == DIR_IN) {
1658 1.73 gehenna if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKIN],
1659 1.149.2.9 skrll sc->datain_buffer, sc->transfer_datalen,
1660 1.149.2.9 skrll USBD_SHORT_XFER_OK,
1661 1.149.2.9 skrll sc->transfer_xfer[XFER_CBI_DATAIN]))
1662 1.28 augustss umass_cbi_reset(sc, STATUS_WIRE_FAILED);
1663 1.28 augustss
1664 1.103 mycroft return;
1665 1.28 augustss } else if (sc->transfer_dir == DIR_OUT) {
1666 1.149.2.9 skrll memcpy(sc->dataout_buffer, sc->transfer_data,
1667 1.28 augustss sc->transfer_datalen);
1668 1.73 gehenna if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKOUT],
1669 1.149.2.9 skrll sc->dataout_buffer, sc->transfer_datalen,
1670 1.149.2.9 skrll 0, /* fixed length transfer */
1671 1.149.2.9 skrll sc->transfer_xfer[XFER_CBI_DATAOUT]))
1672 1.28 augustss umass_cbi_reset(sc, STATUS_WIRE_FAILED);
1673 1.28 augustss
1674 1.103 mycroft return;
1675 1.28 augustss } else {
1676 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: no data phase", sc, 0, 0,
1677 1.149.2.14 skrll 0);
1678 1.28 augustss }
1679 1.28 augustss
1680 1.103 mycroft /* FALLTHROUGH if no data phase, err == 0 */
1681 1.28 augustss case TSTATE_CBI_DATA:
1682 1.103 mycroft /* Command transport phase error handling (ignored if no data
1683 1.103 mycroft * phase (fallthrough from previous state)) */
1684 1.103 mycroft if (sc->transfer_dir != DIR_NONE) {
1685 1.103 mycroft /* retrieve the length of the transfer that was done */
1686 1.103 mycroft usbd_get_xfer_status(xfer, NULL, NULL,
1687 1.103 mycroft &sc->transfer_actlen, NULL);
1688 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: CBI_DATA actlen=%d",
1689 1.149.2.14 skrll sc, sc->transfer_actlen, 0, 0);
1690 1.28 augustss
1691 1.103 mycroft if (err) {
1692 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: Data dir %d "
1693 1.149.2.14 skrll "err %d failed", sc, sc->transfer_dir,
1694 1.149.2.14 skrll sc->transfer_datalen, err);
1695 1.28 augustss
1696 1.103 mycroft if (err == USBD_STALLED) {
1697 1.103 mycroft sc->transfer_state = TSTATE_CBI_DCLEAR;
1698 1.103 mycroft umass_clear_endpoint_stall(sc,
1699 1.103 mycroft (sc->transfer_dir == DIR_IN?
1700 1.103 mycroft UMASS_BULKIN:UMASS_BULKOUT),
1701 1.28 augustss sc->transfer_xfer[XFER_CBI_DCLEAR]);
1702 1.103 mycroft } else {
1703 1.103 mycroft /* Unless the error is a pipe stall the
1704 1.103 mycroft * error is fatal.
1705 1.103 mycroft */
1706 1.103 mycroft umass_cbi_reset(sc, STATUS_WIRE_FAILED);
1707 1.103 mycroft }
1708 1.103 mycroft return;
1709 1.28 augustss }
1710 1.28 augustss }
1711 1.28 augustss
1712 1.28 augustss if (sc->transfer_dir == DIR_IN)
1713 1.149.2.9 skrll memcpy(sc->transfer_data, sc->datain_buffer,
1714 1.28 augustss sc->transfer_actlen);
1715 1.28 augustss
1716 1.28 augustss DIF(UDMASS_CBI, if (sc->transfer_dir == DIR_IN)
1717 1.28 augustss umass_dump_buffer(sc, sc->transfer_data,
1718 1.28 augustss sc->transfer_actlen, 48));
1719 1.28 augustss
1720 1.103 mycroft /* Status phase */
1721 1.78 gehenna if (sc->sc_wire == UMASS_WPROTO_CBI_I) {
1722 1.28 augustss sc->transfer_state = TSTATE_CBI_STATUS;
1723 1.28 augustss memset(&sc->sbl, 0, sizeof(sc->sbl));
1724 1.73 gehenna if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_INTRIN],
1725 1.28 augustss &sc->sbl, sizeof(sc->sbl),
1726 1.28 augustss 0, /* fixed length transfer */
1727 1.100 mycroft sc->transfer_xfer[XFER_CBI_STATUS]))
1728 1.28 augustss umass_cbi_reset(sc, STATUS_WIRE_FAILED);
1729 1.28 augustss } else {
1730 1.28 augustss /* No command completion interrupt. Request
1731 1.28 augustss * sense to get status of command.
1732 1.28 augustss */
1733 1.28 augustss sc->transfer_state = TSTATE_IDLE;
1734 1.28 augustss sc->transfer_cb(sc, sc->transfer_priv,
1735 1.28 augustss sc->transfer_datalen - sc->transfer_actlen,
1736 1.28 augustss STATUS_CMD_UNKNOWN);
1737 1.28 augustss }
1738 1.28 augustss return;
1739 1.28 augustss
1740 1.28 augustss case TSTATE_CBI_STATUS:
1741 1.28 augustss if (err) {
1742 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: Status Transport failed",
1743 1.149.2.14 skrll sc, 0, 0, 0);
1744 1.28 augustss /* Status transport by interrupt pipe (section 2.3.2.2).
1745 1.28 augustss */
1746 1.28 augustss
1747 1.28 augustss if (err == USBD_STALLED) {
1748 1.70 gehenna sc->transfer_state = TSTATE_CBI_SCLEAR;
1749 1.73 gehenna umass_clear_endpoint_stall(sc, UMASS_INTRIN,
1750 1.28 augustss sc->transfer_xfer[XFER_CBI_SCLEAR]);
1751 1.28 augustss } else {
1752 1.28 augustss umass_cbi_reset(sc, STATUS_WIRE_FAILED);
1753 1.28 augustss }
1754 1.28 augustss return;
1755 1.28 augustss }
1756 1.28 augustss
1757 1.28 augustss /* Dissect the information in the buffer */
1758 1.28 augustss
1759 1.100 mycroft {
1760 1.149.2.1 skrll uint32_t actlen;
1761 1.100 mycroft usbd_get_xfer_status(xfer,NULL,NULL,&actlen,NULL);
1762 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: CBI_STATUS actlen=%d",
1763 1.149.2.14 skrll sc, actlen, 0, 0);
1764 1.100 mycroft if (actlen != 2)
1765 1.100 mycroft break;
1766 1.100 mycroft }
1767 1.100 mycroft
1768 1.78 gehenna if (sc->sc_cmd == UMASS_CPROTO_UFI) {
1769 1.28 augustss int status;
1770 1.88 augustss
1771 1.28 augustss /* Section 3.4.3.1.3 specifies that the UFI command
1772 1.28 augustss * protocol returns an ASC and ASCQ in the interrupt
1773 1.28 augustss * data block.
1774 1.28 augustss */
1775 1.28 augustss
1776 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: UFI CCI, ASC = 0x%02x, "
1777 1.149.2.14 skrll "ASCQ = 0x%02x", sc, sc->sbl.ufi.asc,
1778 1.149.2.14 skrll sc->sbl.ufi.ascq, 0);
1779 1.28 augustss
1780 1.100 mycroft if ((sc->sbl.ufi.asc == 0 && sc->sbl.ufi.ascq == 0) ||
1781 1.100 mycroft sc->sc_sense)
1782 1.28 augustss status = STATUS_CMD_OK;
1783 1.28 augustss else
1784 1.28 augustss status = STATUS_CMD_FAILED;
1785 1.28 augustss
1786 1.100 mycroft /* No autosense, command successful */
1787 1.100 mycroft sc->transfer_state = TSTATE_IDLE;
1788 1.100 mycroft sc->transfer_cb(sc, sc->transfer_priv,
1789 1.100 mycroft sc->transfer_datalen - sc->transfer_actlen, status);
1790 1.28 augustss } else {
1791 1.100 mycroft int status;
1792 1.100 mycroft
1793 1.28 augustss /* Command Interrupt Data Block */
1794 1.100 mycroft
1795 1.149.2.14 skrll DPRINTFM(UDMASS_CBI, "sc %p: type=0x%02x, value=0x%02x",
1796 1.149.2.14 skrll sc, sc->sbl.common.type, sc->sbl.common.value, 0);
1797 1.28 augustss
1798 1.28 augustss if (sc->sbl.common.type == IDB_TYPE_CCI) {
1799 1.100 mycroft switch (sc->sbl.common.value & IDB_VALUE_STATUS_MASK) {
1800 1.100 mycroft case IDB_VALUE_PASS:
1801 1.100 mycroft status = STATUS_CMD_OK;
1802 1.100 mycroft break;
1803 1.100 mycroft case IDB_VALUE_FAIL:
1804 1.100 mycroft case IDB_VALUE_PERSISTENT:
1805 1.100 mycroft status = STATUS_CMD_FAILED;
1806 1.100 mycroft break;
1807 1.100 mycroft case IDB_VALUE_PHASE:
1808 1.107 mycroft default: /* XXX: gcc */
1809 1.100 mycroft status = STATUS_WIRE_FAILED;
1810 1.100 mycroft break;
1811 1.28 augustss }
1812 1.28 augustss
1813 1.28 augustss sc->transfer_state = TSTATE_IDLE;
1814 1.28 augustss sc->transfer_cb(sc, sc->transfer_priv,
1815 1.149.2.14 skrll sc->transfer_datalen - sc->transfer_actlen,
1816 1.149.2.14 skrll status);
1817 1.28 augustss }
1818 1.28 augustss }
1819 1.28 augustss return;
1820 1.28 augustss
1821 1.28 augustss case TSTATE_CBI_DCLEAR:
1822 1.113 mycroft if (err) { /* should not occur */
1823 1.103 mycroft printf("%s: CBI bulk-%s stall clear failed, %s\n",
1824 1.131 dyoung device_xname(sc->sc_dev),
1825 1.103 mycroft (sc->transfer_dir == DIR_IN? "in":"out"),
1826 1.103 mycroft usbd_errstr(err));
1827 1.113 mycroft umass_cbi_reset(sc, STATUS_WIRE_FAILED);
1828 1.115 mycroft } else {
1829 1.115 mycroft sc->transfer_state = TSTATE_IDLE;
1830 1.115 mycroft sc->transfer_cb(sc, sc->transfer_priv,
1831 1.115 mycroft sc->transfer_datalen, STATUS_CMD_FAILED);
1832 1.115 mycroft }
1833 1.28 augustss return;
1834 1.28 augustss
1835 1.28 augustss case TSTATE_CBI_SCLEAR:
1836 1.113 mycroft if (err) { /* should not occur */
1837 1.28 augustss printf("%s: CBI intr-in stall clear failed, %s\n",
1838 1.131 dyoung device_xname(sc->sc_dev), usbd_errstr(err));
1839 1.113 mycroft umass_cbi_reset(sc, STATUS_WIRE_FAILED);
1840 1.115 mycroft } else {
1841 1.115 mycroft sc->transfer_state = TSTATE_IDLE;
1842 1.115 mycroft sc->transfer_cb(sc, sc->transfer_priv,
1843 1.115 mycroft sc->transfer_datalen, STATUS_CMD_FAILED);
1844 1.115 mycroft }
1845 1.28 augustss return;
1846 1.28 augustss
1847 1.28 augustss /***** CBI Reset *****/
1848 1.28 augustss case TSTATE_CBI_RESET1:
1849 1.28 augustss if (err)
1850 1.28 augustss printf("%s: CBI reset failed, %s\n",
1851 1.131 dyoung device_xname(sc->sc_dev), usbd_errstr(err));
1852 1.28 augustss
1853 1.70 gehenna sc->transfer_state = TSTATE_CBI_RESET2;
1854 1.73 gehenna umass_clear_endpoint_stall(sc, UMASS_BULKIN,
1855 1.28 augustss sc->transfer_xfer[XFER_CBI_RESET2]);
1856 1.28 augustss
1857 1.28 augustss return;
1858 1.28 augustss case TSTATE_CBI_RESET2:
1859 1.28 augustss if (err) /* should not occur */
1860 1.28 augustss printf("%s: CBI bulk-in stall clear failed, %s\n",
1861 1.131 dyoung device_xname(sc->sc_dev), usbd_errstr(err));
1862 1.28 augustss /* no error recovery, otherwise we end up in a loop */
1863 1.28 augustss
1864 1.70 gehenna sc->transfer_state = TSTATE_CBI_RESET3;
1865 1.73 gehenna umass_clear_endpoint_stall(sc, UMASS_BULKOUT,
1866 1.28 augustss sc->transfer_xfer[XFER_CBI_RESET3]);
1867 1.28 augustss
1868 1.28 augustss return;
1869 1.28 augustss case TSTATE_CBI_RESET3:
1870 1.28 augustss if (err) /* should not occur */
1871 1.28 augustss printf("%s: CBI bulk-out stall clear failed, %s\n",
1872 1.131 dyoung device_xname(sc->sc_dev), usbd_errstr(err));
1873 1.28 augustss /* no error recovery, otherwise we end up in a loop */
1874 1.28 augustss
1875 1.28 augustss sc->transfer_state = TSTATE_IDLE;
1876 1.28 augustss if (sc->transfer_priv) {
1877 1.28 augustss sc->transfer_cb(sc, sc->transfer_priv,
1878 1.28 augustss sc->transfer_datalen,
1879 1.28 augustss sc->transfer_status);
1880 1.28 augustss }
1881 1.28 augustss
1882 1.28 augustss return;
1883 1.28 augustss
1884 1.28 augustss
1885 1.28 augustss /***** Default *****/
1886 1.28 augustss default:
1887 1.89 provos panic("%s: Unknown state %d",
1888 1.131 dyoung device_xname(sc->sc_dev), sc->transfer_state);
1889 1.28 augustss }
1890 1.28 augustss }
1891 1.28 augustss
1892 1.28 augustss usbd_status
1893 1.149.2.1 skrll umass_bbb_get_max_lun(struct umass_softc *sc, uint8_t *maxlun)
1894 1.28 augustss {
1895 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
1896 1.28 augustss usb_device_request_t req;
1897 1.28 augustss usbd_status err;
1898 1.28 augustss
1899 1.28 augustss *maxlun = 0; /* Default to 0. */
1900 1.28 augustss
1901 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p: Get Max Lun", sc, 0, 0, 0);
1902 1.28 augustss
1903 1.28 augustss /* The Get Max Lun command is a class-specific request. */
1904 1.28 augustss req.bmRequestType = UT_READ_CLASS_INTERFACE;
1905 1.28 augustss req.bRequest = UR_BBB_GET_MAX_LUN;
1906 1.28 augustss USETW(req.wValue, 0);
1907 1.76 gehenna USETW(req.wIndex, sc->sc_ifaceno);
1908 1.28 augustss USETW(req.wLength, 1);
1909 1.28 augustss
1910 1.97 mycroft err = usbd_do_request_flags(sc->sc_udev, &req, maxlun,
1911 1.97 mycroft USBD_SHORT_XFER_OK, 0, USBD_DEFAULT_TIMEOUT);
1912 1.28 augustss switch (err) {
1913 1.28 augustss case USBD_NORMAL_COMPLETION:
1914 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p: Max Lun %d", sc, *maxlun , 0, 0);
1915 1.28 augustss break;
1916 1.28 augustss
1917 1.28 augustss case USBD_STALLED:
1918 1.28 augustss /*
1919 1.28 augustss * Device doesn't support Get Max Lun request.
1920 1.28 augustss */
1921 1.28 augustss err = USBD_NORMAL_COMPLETION;
1922 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p: Get Max Lun not supported", sc,
1923 1.149.2.14 skrll 0, 0, 0);
1924 1.28 augustss break;
1925 1.28 augustss
1926 1.28 augustss case USBD_SHORT_XFER:
1927 1.28 augustss /*
1928 1.28 augustss * XXX This must mean Get Max Lun is not supported, too!
1929 1.28 augustss */
1930 1.28 augustss err = USBD_NORMAL_COMPLETION;
1931 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p: Get Max Lun SHORT_XFER", sc, 0, 0,
1932 1.149.2.14 skrll 0);
1933 1.28 augustss break;
1934 1.28 augustss
1935 1.28 augustss default:
1936 1.28 augustss printf("%s: Get Max Lun failed: %s\n",
1937 1.131 dyoung device_xname(sc->sc_dev), usbd_errstr(err));
1938 1.28 augustss /* XXX Should we port_reset the device? */
1939 1.28 augustss break;
1940 1.28 augustss }
1941 1.28 augustss
1942 1.149.2.3 skrll return err;
1943 1.28 augustss }
1944 1.28 augustss
1945 1.28 augustss
1946 1.28 augustss
1947 1.28 augustss
1948 1.28 augustss #ifdef UMASS_DEBUG
1949 1.28 augustss Static void
1950 1.28 augustss umass_bbb_dump_cbw(struct umass_softc *sc, umass_bbb_cbw_t *cbw)
1951 1.28 augustss {
1952 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
1953 1.28 augustss int clen = cbw->bCDBLength;
1954 1.28 augustss int dlen = UGETDW(cbw->dCBWDataTransferLength);
1955 1.149.2.1 skrll uint8_t *c = cbw->CBWCDB;
1956 1.28 augustss int tag = UGETDW(cbw->dCBWTag);
1957 1.28 augustss int flags = cbw->bCBWFlags;
1958 1.28 augustss
1959 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p: CBW %d: cmdlen=%d", sc, tag, clen, 0);
1960 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, " 0x%02x%02x%02x%02x...", c[0], c[1], c[2], c[3]);
1961 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, " 0x%02x%02x%02x%02x...", c[4], c[5], c[6], c[7]);
1962 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, " 0x%02x%02x...", c[8], c[9], 0, 0);
1963 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, " data = %d bytes, flags = %x", dlen, flags, 0,
1964 1.149.2.14 skrll 0);
1965 1.28 augustss }
1966 1.28 augustss
1967 1.28 augustss Static void
1968 1.28 augustss umass_bbb_dump_csw(struct umass_softc *sc, umass_bbb_csw_t *csw)
1969 1.28 augustss {
1970 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
1971 1.28 augustss int sig = UGETDW(csw->dCSWSignature);
1972 1.112 mycroft int tag = UGETDW(csw->dCSWTag);
1973 1.28 augustss int res = UGETDW(csw->dCSWDataResidue);
1974 1.28 augustss int status = csw->bCSWStatus;
1975 1.28 augustss
1976 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, "sc %p: CSW %d: sig = 0x%08x, tag = %d", sc, tag,
1977 1.149.2.14 skrll sig, tag);
1978 1.149.2.14 skrll DPRINTFM(UDMASS_BBB, " res = %d, status = 0x%02x", res, status, 0, 0);
1979 1.28 augustss }
1980 1.28 augustss
1981 1.28 augustss Static void
1982 1.149.2.1 skrll umass_dump_buffer(struct umass_softc *sc, uint8_t *buffer, int buflen,
1983 1.28 augustss int printlen)
1984 1.28 augustss {
1985 1.149.2.14 skrll UMASSHIST_FUNC(); UMASSHIST_CALLED();
1986 1.149.2.14 skrll int i;
1987 1.149.2.14 skrll
1988 1.149.2.14 skrll DPRINTFM(UDMASS_GEN, "sc %p: buffer %p", sc, buffer, 0, 0);
1989 1.149.2.14 skrll for (i = 0; i < buflen && i < printlen;) {
1990 1.149.2.14 skrll if (i + 3 < buflen && i + 3 < printlen) {
1991 1.149.2.14 skrll DPRINTFM(UDMASS_GEN, " 0x%02x%02x%02x%02x",
1992 1.149.2.14 skrll buffer[i], buffer[i + 1],
1993 1.149.2.14 skrll buffer[i + 2], buffer[i + 3]);
1994 1.149.2.14 skrll i += 4;
1995 1.149.2.14 skrll } else if (i + 2 < buflen && i + 2 < printlen) {
1996 1.149.2.14 skrll DPRINTFM(UDMASS_GEN, " 0x%02x%02x%02x",
1997 1.149.2.14 skrll buffer[i], buffer[i + 1], buffer[i + 2], 0);
1998 1.149.2.14 skrll i += 3;
1999 1.149.2.14 skrll } else if (i + 1 < buflen && i + 2 < printlen) {
2000 1.149.2.14 skrll DPRINTFM(UDMASS_GEN, " 0x%02x%02x",
2001 1.149.2.14 skrll buffer[i], buffer[i + 1], 0, 0);
2002 1.149.2.14 skrll i += 2;
2003 1.149.2.14 skrll } else {
2004 1.149.2.14 skrll DPRINTFM(UDMASS_GEN, " 0x%02x", buffer[i], 0, 0, 0);
2005 1.149.2.14 skrll i += 1;
2006 1.149.2.14 skrll }
2007 1.149.2.14 skrll }
2008 1.28 augustss }
2009 1.28 augustss #endif
2010