xhcivar.h revision 1.4 1 1.4 skrll /* $NetBSD: xhcivar.h,v 1.4 2014/03/10 13:12:02 skrll Exp $ */
2 1.1 jakllsch
3 1.1 jakllsch /*
4 1.1 jakllsch * Copyright (c) 2013 Jonathan A. Kollasch
5 1.1 jakllsch * All rights reserved.
6 1.1 jakllsch *
7 1.1 jakllsch * Redistribution and use in source and binary forms, with or without
8 1.1 jakllsch * modification, are permitted provided that the following conditions
9 1.1 jakllsch * are met:
10 1.1 jakllsch * 1. Redistributions of source code must retain the above copyright
11 1.1 jakllsch * notice, this list of conditions and the following disclaimer.
12 1.1 jakllsch * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jakllsch * notice, this list of conditions and the following disclaimer in the
14 1.1 jakllsch * documentation and/or other materials provided with the distribution.
15 1.1 jakllsch *
16 1.1 jakllsch * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 1.1 jakllsch * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 jakllsch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 jakllsch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
20 1.1 jakllsch * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
21 1.1 jakllsch * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
22 1.1 jakllsch * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
23 1.1 jakllsch * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 1.1 jakllsch * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
25 1.1 jakllsch * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
26 1.1 jakllsch * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 jakllsch */
28 1.1 jakllsch
29 1.1 jakllsch #ifndef _DEV_USB_XHCIVAR_H_
30 1.1 jakllsch #define _DEV_USB_XHCIVAR_H_
31 1.1 jakllsch
32 1.1 jakllsch #include <sys/pool.h>
33 1.1 jakllsch
34 1.1 jakllsch struct xhci_xfer {
35 1.1 jakllsch struct usbd_xfer xx_xfer;
36 1.1 jakllsch struct usb_task xx_abort_task;
37 1.1 jakllsch struct xhci_trb xx_trb[20];
38 1.1 jakllsch };
39 1.1 jakllsch
40 1.1 jakllsch struct xhci_ring {
41 1.1 jakllsch usb_dma_t xr_dma;
42 1.1 jakllsch kmutex_t xr_lock;
43 1.1 jakllsch struct xhci_trb * xr_trb;
44 1.1 jakllsch void **xr_cookies;
45 1.1 jakllsch u_int xr_ntrb; /* number of elements for above */
46 1.1 jakllsch u_int xr_ep; /* enqueue pointer */
47 1.1 jakllsch u_int xr_cs; /* cycle state */
48 1.1 jakllsch bool is_halted;
49 1.1 jakllsch };
50 1.1 jakllsch
51 1.1 jakllsch struct xhci_endpoint {
52 1.1 jakllsch struct xhci_ring xe_tr; /* transfer ring */
53 1.1 jakllsch };
54 1.1 jakllsch
55 1.1 jakllsch struct xhci_slot {
56 1.1 jakllsch usb_dma_t xs_dc_dma; /* device context page */
57 1.1 jakllsch usb_dma_t xs_ic_dma; /* input context page */
58 1.1 jakllsch struct xhci_endpoint xs_ep[32]; /* endpoints */
59 1.1 jakllsch u_int xs_idx; /* slot index */
60 1.1 jakllsch };
61 1.1 jakllsch
62 1.1 jakllsch struct xhci_softc {
63 1.1 jakllsch device_t sc_dev;
64 1.1 jakllsch device_t sc_child;
65 1.1 jakllsch void *sc_ih;
66 1.1 jakllsch bus_size_t sc_ios;
67 1.1 jakllsch bus_space_tag_t sc_iot;
68 1.1 jakllsch bus_space_handle_t sc_ioh; /* Base */
69 1.1 jakllsch bus_space_handle_t sc_cbh; /* Capability Base */
70 1.1 jakllsch bus_space_handle_t sc_obh; /* Operational Base */
71 1.1 jakllsch bus_space_handle_t sc_rbh; /* Runtime Base */
72 1.1 jakllsch bus_space_handle_t sc_dbh; /* Doorbell Registers */
73 1.1 jakllsch struct usbd_bus sc_bus;
74 1.1 jakllsch
75 1.1 jakllsch kmutex_t sc_lock;
76 1.1 jakllsch kmutex_t sc_intr_lock;
77 1.1 jakllsch kcondvar_t sc_softwake_cv;
78 1.1 jakllsch
79 1.1 jakllsch usbd_xfer_handle sc_intrxfer;
80 1.1 jakllsch
81 1.1 jakllsch pool_cache_t sc_xferpool;
82 1.1 jakllsch
83 1.1 jakllsch bus_size_t sc_pgsz; /* xHCI page size */
84 1.1 jakllsch uint32_t sc_ctxsz;
85 1.1 jakllsch int sc_maxslots;
86 1.1 jakllsch int sc_maxintrs;
87 1.1 jakllsch int sc_maxports;
88 1.2 matt int sc_maxspbuf;
89 1.1 jakllsch
90 1.1 jakllsch /* XXX suboptimal */
91 1.1 jakllsch int sc_hs_port_start;
92 1.1 jakllsch int sc_hs_port_count;
93 1.1 jakllsch int sc_ss_port_start;
94 1.1 jakllsch int sc_ss_port_count;
95 1.1 jakllsch
96 1.1 jakllsch struct xhci_slot * sc_slots;
97 1.1 jakllsch
98 1.1 jakllsch struct xhci_ring sc_cr; /* command ring */
99 1.1 jakllsch struct xhci_ring sc_er; /* event ring */
100 1.1 jakllsch
101 1.1 jakllsch usb_dma_t sc_eventst_dma;
102 1.1 jakllsch usb_dma_t sc_dcbaa_dma;
103 1.2 matt usb_dma_t sc_spbufarray_dma;
104 1.2 matt usb_dma_t *sc_spbuf_dma;
105 1.1 jakllsch
106 1.1 jakllsch //struct usb_dma_reserve sc_dma_reserve;
107 1.1 jakllsch
108 1.1 jakllsch kcondvar_t sc_command_cv;
109 1.1 jakllsch bus_addr_t sc_command_addr;
110 1.1 jakllsch struct xhci_trb sc_result_trb;
111 1.1 jakllsch
112 1.1 jakllsch bool sc_ac64;
113 1.1 jakllsch bool sc_dying;
114 1.1 jakllsch
115 1.1 jakllsch uint8_t sc_addr;
116 1.1 jakllsch uint8_t sc_conf;
117 1.1 jakllsch };
118 1.1 jakllsch
119 1.4 skrll int xhci_init(struct xhci_softc *);
120 1.4 skrll int xhci_intr(void *);
121 1.4 skrll int xhci_detach(struct xhci_softc *, int);
122 1.4 skrll int xhci_activate(device_t, enum devact);
123 1.4 skrll void xhci_childdet(device_t, device_t);
124 1.4 skrll bool xhci_suspend(device_t, const pmf_qual_t *);
125 1.4 skrll bool xhci_resume(device_t, const pmf_qual_t *);
126 1.4 skrll bool xhci_shutdown(device_t, int);
127 1.1 jakllsch
128 1.1 jakllsch #define XHCI_TRANSFER_RING_TRBS 256
129 1.1 jakllsch
130 1.1 jakllsch #endif /* _DEV_USB_XHCIVAR_H_ */
131