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xhcivar.h revision 1.6 
      1 /*	$NetBSD: xhcivar.h,v 1.6 2016/05/03 13:14:44 skrll Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2013 Jonathan A. Kollasch
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
     20  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     21  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     22  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     23  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     25  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     26  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #ifndef _DEV_USB_XHCIVAR_H_
     30 #define _DEV_USB_XHCIVAR_H_
     31 
     32 #include <sys/pool.h>
     33 
     34 #define XHCI_XFER_NTRB	20
     35 
     36 struct xhci_xfer {
     37 	struct usbd_xfer xx_xfer;
     38 	struct usb_task xx_abort_task;
     39 	struct xhci_trb xx_trb[XHCI_XFER_NTRB];
     40 };
     41 
     42 #define XHCI_BUS2SC(bus)	((bus)->ub_hcpriv)
     43 #define XHCI_PIPE2SC(pipe)	XHCI_BUS2SC((pipe)->up_dev->ud_bus)
     44 #define XHCI_XFER2SC(xfer)	XHCI_BUS2SC((xfer)->ux_bus)
     45 #define XHCI_XPIPE2SC(d)	XHCI_BUS2SC((d)->xp_pipe.up_dev->ud_bus)
     46 
     47 #define XHCI_XFER2XXFER(xfer)	((struct xhci_xfer *)(xfer))
     48 
     49 struct xhci_ring {
     50 	usb_dma_t xr_dma;
     51 	kmutex_t xr_lock;
     52 	struct xhci_trb * xr_trb;
     53 	void **xr_cookies;
     54 	u_int xr_ntrb;			/* number of elements for above */
     55 	u_int xr_ep;			/* enqueue pointer */
     56 	u_int xr_cs;			/* cycle state */
     57 	bool is_halted;
     58 };
     59 
     60 struct xhci_endpoint {
     61 	struct xhci_ring xe_tr;		/* transfer ring */
     62 };
     63 
     64 struct xhci_slot {
     65 	usb_dma_t xs_dc_dma;		/* device context page */
     66 	usb_dma_t xs_ic_dma;		/* input context page */
     67 	struct xhci_endpoint xs_ep[32]; /* endpoints */
     68 	u_int xs_idx;			/* slot index */
     69 };
     70 
     71 struct xhci_softc {
     72 	device_t sc_dev;
     73 	device_t sc_child;
     74 	bus_size_t sc_ios;
     75 	bus_space_tag_t sc_iot;
     76 	bus_space_handle_t sc_ioh;	/* Base */
     77 	bus_space_handle_t sc_cbh;	/* Capability Base */
     78 	bus_space_handle_t sc_obh;	/* Operational Base */
     79 	bus_space_handle_t sc_rbh;	/* Runtime Base */
     80 	bus_space_handle_t sc_dbh;	/* Doorbell Registers */
     81 	struct usbd_bus sc_bus;
     82 
     83 	kmutex_t sc_lock;
     84 	kmutex_t sc_intr_lock;
     85 	kcondvar_t sc_softwake_cv;
     86 
     87 	char sc_vendor[32];		/* vendor string for root hub */
     88 	int sc_id_vendor;		/* vendor ID for root hub */
     89 
     90 	struct usbd_xfer *sc_intrxfer;
     91 
     92 	pool_cache_t sc_xferpool;
     93 
     94 	bus_size_t sc_pgsz;		/* xHCI page size */
     95 	uint32_t sc_ctxsz;
     96 	int sc_maxslots;
     97 	int sc_maxintrs;
     98 	int sc_maxports;
     99 	int sc_maxspbuf;
    100 
    101 	/* XXX suboptimal */
    102 	int sc_hs_port_start;
    103 	int sc_hs_port_count;
    104 	int sc_ss_port_start;
    105 	int sc_ss_port_count;
    106 
    107 	struct xhci_slot * sc_slots;
    108 
    109 	struct xhci_ring sc_cr;		/* command ring */
    110 	struct xhci_ring sc_er;		/* event ring */
    111 
    112 	usb_dma_t sc_eventst_dma;
    113 	usb_dma_t sc_dcbaa_dma;
    114 	usb_dma_t sc_spbufarray_dma;
    115 	usb_dma_t *sc_spbuf_dma;
    116 
    117 	kcondvar_t sc_command_cv;
    118 	bus_addr_t sc_command_addr;
    119 	struct xhci_trb sc_result_trb;
    120 
    121 	bool sc_ac64;
    122 	bool sc_dying;
    123 
    124 	void (*sc_vendor_init)(struct xhci_softc *);
    125 	int (*sc_vendor_port_status)(struct xhci_softc *, uint32_t, int);
    126 
    127 	int sc_quirks;
    128 #define XHCI_QUIRK_INTEL	__BIT(0) /* Intel xhci chip */
    129 };
    130 
    131 int	xhci_init(struct xhci_softc *);
    132 int	xhci_intr(void *);
    133 int	xhci_detach(struct xhci_softc *, int);
    134 int	xhci_activate(device_t, enum devact);
    135 void	xhci_childdet(device_t, device_t);
    136 bool	xhci_suspend(device_t, const pmf_qual_t *);
    137 bool	xhci_resume(device_t, const pmf_qual_t *);
    138 bool	xhci_shutdown(device_t, int);
    139 
    140 #define XHCI_TRANSFER_RING_TRBS 256
    141 
    142 #endif /* _DEV_USB_XHCIVAR_H_ */
    143