dmtbinfo.c revision 1.3 1 1.1 jruoho /******************************************************************************
2 1.1 jruoho *
3 1.1 jruoho * Module Name: dmtbinfo - Table info for non-AML tables
4 1.1 jruoho *
5 1.1 jruoho *****************************************************************************/
6 1.1 jruoho
7 1.3 jruoho /*
8 1.3 jruoho * Copyright (C) 2000 - 2011, Intel Corp.
9 1.1 jruoho * All rights reserved.
10 1.1 jruoho *
11 1.3 jruoho * Redistribution and use in source and binary forms, with or without
12 1.3 jruoho * modification, are permitted provided that the following conditions
13 1.3 jruoho * are met:
14 1.3 jruoho * 1. Redistributions of source code must retain the above copyright
15 1.3 jruoho * notice, this list of conditions, and the following disclaimer,
16 1.3 jruoho * without modification.
17 1.3 jruoho * 2. Redistributions in binary form must reproduce at minimum a disclaimer
18 1.3 jruoho * substantially similar to the "NO WARRANTY" disclaimer below
19 1.3 jruoho * ("Disclaimer") and any redistribution must be conditioned upon
20 1.3 jruoho * including a substantially similar Disclaimer requirement for further
21 1.3 jruoho * binary redistribution.
22 1.3 jruoho * 3. Neither the names of the above-listed copyright holders nor the names
23 1.3 jruoho * of any contributors may be used to endorse or promote products derived
24 1.3 jruoho * from this software without specific prior written permission.
25 1.3 jruoho *
26 1.3 jruoho * Alternatively, this software may be distributed under the terms of the
27 1.3 jruoho * GNU General Public License ("GPL") version 2 as published by the Free
28 1.3 jruoho * Software Foundation.
29 1.3 jruoho *
30 1.3 jruoho * NO WARRANTY
31 1.3 jruoho * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
32 1.3 jruoho * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
33 1.3 jruoho * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
34 1.3 jruoho * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
35 1.3 jruoho * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 1.3 jruoho * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 1.3 jruoho * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 1.3 jruoho * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39 1.3 jruoho * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
40 1.3 jruoho * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41 1.3 jruoho * POSSIBILITY OF SUCH DAMAGES.
42 1.3 jruoho */
43 1.1 jruoho
44 1.1 jruoho #include "acpi.h"
45 1.1 jruoho #include "accommon.h"
46 1.1 jruoho #include "acdisasm.h"
47 1.1 jruoho
48 1.1 jruoho /* This module used for application-level code only */
49 1.1 jruoho
50 1.1 jruoho #define _COMPONENT ACPI_CA_DISASSEMBLER
51 1.1 jruoho ACPI_MODULE_NAME ("dmtbinfo")
52 1.1 jruoho
53 1.1 jruoho /*
54 1.1 jruoho * Macros used to generate offsets to specific table fields
55 1.1 jruoho */
56 1.1 jruoho #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f)
57 1.1 jruoho #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f)
58 1.1 jruoho #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f)
59 1.1 jruoho #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f)
60 1.1 jruoho #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f)
61 1.1 jruoho #define ACPI_BERT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BERT,f)
62 1.1 jruoho #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f)
63 1.1 jruoho #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f)
64 1.1 jruoho #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f)
65 1.1 jruoho #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f)
66 1.1 jruoho #define ACPI_EINJ_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_EINJ,f)
67 1.1 jruoho #define ACPI_ERST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ERST,f)
68 1.1 jruoho #define ACPI_HEST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEST,f)
69 1.1 jruoho #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f)
70 1.1 jruoho #define ACPI_IVRS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_IVRS,f)
71 1.1 jruoho #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f)
72 1.1 jruoho #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f)
73 1.1 jruoho #define ACPI_MCHI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCHI,f)
74 1.1 jruoho #define ACPI_MSCT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MSCT,f)
75 1.1 jruoho #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f)
76 1.1 jruoho #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f)
77 1.1 jruoho #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f)
78 1.1 jruoho #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f)
79 1.1 jruoho #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f)
80 1.1 jruoho #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f)
81 1.1 jruoho #define ACPI_UEFI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_UEFI,f)
82 1.1 jruoho #define ACPI_WAET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WAET,f)
83 1.1 jruoho #define ACPI_WDAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDAT,f)
84 1.3 jruoho #define ACPI_WDDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDDT,f)
85 1.1 jruoho #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f)
86 1.1 jruoho
87 1.1 jruoho /* Subtables */
88 1.1 jruoho
89 1.1 jruoho #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f)
90 1.1 jruoho #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f)
91 1.1 jruoho #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f)
92 1.1 jruoho #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f)
93 1.1 jruoho #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f)
94 1.1 jruoho #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f)
95 1.1 jruoho #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f)
96 1.1 jruoho #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f)
97 1.1 jruoho #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f)
98 1.1 jruoho #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f)
99 1.1 jruoho #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f)
100 1.1 jruoho #define ACPI_DMAR2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_ATSR,f)
101 1.1 jruoho #define ACPI_DMAR3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RHSA,f)
102 1.1 jruoho #define ACPI_EINJ0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
103 1.3 jruoho #define ACPI_ERST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
104 1.1 jruoho #define ACPI_HEST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f)
105 1.1 jruoho #define ACPI_HEST1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f)
106 1.1 jruoho #define ACPI_HEST2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_NMI,f)
107 1.1 jruoho #define ACPI_HEST6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f)
108 1.1 jruoho #define ACPI_HEST7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER,f)
109 1.1 jruoho #define ACPI_HEST8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f)
110 1.1 jruoho #define ACPI_HEST9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_GENERIC,f)
111 1.1 jruoho #define ACPI_HESTN_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_NOTIFY,f)
112 1.1 jruoho #define ACPI_HESTB_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f)
113 1.1 jruoho #define ACPI_IVRSH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HEADER,f)
114 1.1 jruoho #define ACPI_IVRS0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f)
115 1.1 jruoho #define ACPI_IVRS1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_MEMORY,f)
116 1.1 jruoho #define ACPI_IVRSD_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f)
117 1.1 jruoho #define ACPI_IVRS8A_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f)
118 1.1 jruoho #define ACPI_IVRS8B_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f)
119 1.1 jruoho #define ACPI_IVRS8C_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f)
120 1.1 jruoho #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f)
121 1.1 jruoho #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f)
122 1.1 jruoho #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f)
123 1.1 jruoho #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f)
124 1.1 jruoho #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f)
125 1.1 jruoho #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f)
126 1.1 jruoho #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f)
127 1.1 jruoho #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f)
128 1.1 jruoho #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f)
129 1.1 jruoho #define ACPI_MADT9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f)
130 1.1 jruoho #define ACPI_MADT10_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f)
131 1.1 jruoho #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
132 1.1 jruoho #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f)
133 1.1 jruoho #define ACPI_MSCT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f)
134 1.1 jruoho #define ACPI_SRATH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
135 1.1 jruoho #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f)
136 1.1 jruoho #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f)
137 1.1 jruoho #define ACPI_SRAT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f)
138 1.1 jruoho #define ACPI_WDAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WDAT_ENTRY,f)
139 1.1 jruoho
140 1.1 jruoho /*
141 1.1 jruoho * Simplify access to flag fields by breaking them up into bytes
142 1.1 jruoho */
143 1.1 jruoho #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o)
144 1.1 jruoho
145 1.1 jruoho /* Flags */
146 1.1 jruoho
147 1.1 jruoho #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o)
148 1.1 jruoho #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o)
149 1.1 jruoho #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o)
150 1.1 jruoho #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o)
151 1.1 jruoho #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o)
152 1.1 jruoho #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o)
153 1.1 jruoho #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o)
154 1.1 jruoho #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o)
155 1.1 jruoho #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o)
156 1.1 jruoho #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o)
157 1.1 jruoho #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o)
158 1.1 jruoho #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o)
159 1.1 jruoho #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o)
160 1.1 jruoho #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o)
161 1.1 jruoho #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o)
162 1.3 jruoho #define ACPI_WDDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o)
163 1.3 jruoho #define ACPI_EINJ0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o)
164 1.3 jruoho #define ACPI_ERST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o)
165 1.3 jruoho #define ACPI_HEST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o)
166 1.3 jruoho #define ACPI_HEST1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o)
167 1.3 jruoho #define ACPI_HEST6_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o)
168 1.1 jruoho
169 1.1 jruoho /*
170 1.1 jruoho * Required terminator for all tables below
171 1.1 jruoho */
172 1.1 jruoho #define ACPI_DMT_TERMINATOR {ACPI_DMT_EXIT, 0, NULL, 0}
173 1.1 jruoho
174 1.1 jruoho
175 1.1 jruoho /*
176 1.1 jruoho * ACPI Table Information, used to dump formatted ACPI tables
177 1.1 jruoho *
178 1.1 jruoho * Each entry is of the form: <Field Type, Field Offset, Field Name>
179 1.1 jruoho */
180 1.1 jruoho
181 1.1 jruoho /*******************************************************************************
182 1.1 jruoho *
183 1.1 jruoho * Common ACPI table header
184 1.1 jruoho *
185 1.1 jruoho ******************************************************************************/
186 1.1 jruoho
187 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] =
188 1.1 jruoho {
189 1.1 jruoho {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature", 0},
190 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length", DT_LENGTH},
191 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision", 0},
192 1.1 jruoho {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum", 0},
193 1.1 jruoho {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID", 0},
194 1.1 jruoho {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID", 0},
195 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision", 0},
196 1.1 jruoho {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID", 0},
197 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision", 0},
198 1.1 jruoho ACPI_DMT_TERMINATOR
199 1.1 jruoho };
200 1.1 jruoho
201 1.1 jruoho
202 1.1 jruoho /*******************************************************************************
203 1.1 jruoho *
204 1.1 jruoho * GAS - Generic Address Structure
205 1.1 jruoho *
206 1.1 jruoho ******************************************************************************/
207 1.1 jruoho
208 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] =
209 1.1 jruoho {
210 1.1 jruoho {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID", 0},
211 1.1 jruoho {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width", 0},
212 1.1 jruoho {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset", 0},
213 1.3 jruoho {ACPI_DMT_ACCWIDTH, ACPI_GAS_OFFSET (AccessWidth), "Encoded Access Width", 0},
214 1.1 jruoho {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address", 0},
215 1.1 jruoho ACPI_DMT_TERMINATOR
216 1.1 jruoho };
217 1.1 jruoho
218 1.1 jruoho
219 1.1 jruoho /*******************************************************************************
220 1.1 jruoho *
221 1.1 jruoho * RSDP - Root System Description Pointer (Signature is "RSD PTR ")
222 1.1 jruoho *
223 1.1 jruoho ******************************************************************************/
224 1.1 jruoho
225 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] =
226 1.1 jruoho {
227 1.1 jruoho {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature", 0},
228 1.1 jruoho {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum", 0},
229 1.1 jruoho {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID", 0},
230 1.1 jruoho {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision", 0},
231 1.1 jruoho {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address", 0},
232 1.1 jruoho ACPI_DMT_TERMINATOR
233 1.1 jruoho };
234 1.1 jruoho
235 1.1 jruoho /* ACPI 2.0+ Extensions */
236 1.1 jruoho
237 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] =
238 1.1 jruoho {
239 1.1 jruoho {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length", DT_LENGTH},
240 1.1 jruoho {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address", 0},
241 1.1 jruoho {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum", 0},
242 1.1 jruoho {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved", 0},
243 1.1 jruoho ACPI_DMT_TERMINATOR
244 1.1 jruoho };
245 1.1 jruoho
246 1.1 jruoho
247 1.1 jruoho /*******************************************************************************
248 1.1 jruoho *
249 1.1 jruoho * FACS - Firmware ACPI Control Structure
250 1.1 jruoho *
251 1.1 jruoho ******************************************************************************/
252 1.1 jruoho
253 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] =
254 1.1 jruoho {
255 1.1 jruoho {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature", 0},
256 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length", DT_LENGTH},
257 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature", 0},
258 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector", 0},
259 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock", 0},
260 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
261 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present", 0},
262 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)", 0},
263 1.1 jruoho {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector", 0},
264 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version", 0},
265 1.1 jruoho {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved", 0},
266 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)", DT_FLAG},
267 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)", 0},
268 1.1 jruoho ACPI_DMT_TERMINATOR
269 1.1 jruoho };
270 1.1 jruoho
271 1.1 jruoho
272 1.1 jruoho /*******************************************************************************
273 1.1 jruoho *
274 1.1 jruoho * FADT - Fixed ACPI Description Table (Signature is FACP)
275 1.1 jruoho *
276 1.1 jruoho ******************************************************************************/
277 1.1 jruoho
278 1.1 jruoho /* ACPI 1.0 FADT (Version 1) */
279 1.1 jruoho
280 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] =
281 1.1 jruoho {
282 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address", 0},
283 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address", DT_NON_ZERO},
284 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model", 0},
285 1.1 jruoho {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile", 0},
286 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt", 0},
287 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port", 0},
288 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value", 0},
289 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value", 0},
290 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command", 0},
291 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control", 0},
292 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address", 0},
293 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address", 0},
294 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address", 0},
295 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address", 0},
296 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address", 0},
297 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address", 0},
298 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address", 0},
299 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address", 0},
300 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length", 0},
301 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length", 0},
302 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length", 0},
303 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length", 0},
304 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length", 0},
305 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length", 0},
306 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset", 0},
307 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support", 0},
308 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0},
309 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0},
310 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size", 0},
311 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride", 0},
312 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset", 0},
313 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width", 0},
314 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index", 0},
315 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index", 0},
316 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index", 0},
317 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)", DT_FLAG},
318 1.1 jruoho
319 1.1 jruoho /* Boot Architecture Flags byte 0 */
320 1.1 jruoho
321 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)", 0},
322 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)", 0},
323 1.1 jruoho {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)", 0},
324 1.1 jruoho {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)", 0},
325 1.1 jruoho {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)", 0},
326 1.1 jruoho
327 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved", 0},
328 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
329 1.1 jruoho
330 1.1 jruoho /* Flags byte 0 */
331 1.1 jruoho
332 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)", 0},
333 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)", 0},
334 1.1 jruoho {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)", 0},
335 1.1 jruoho {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)", 0},
336 1.1 jruoho {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)", 0},
337 1.1 jruoho {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)", 0},
338 1.1 jruoho {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)", 0},
339 1.1 jruoho {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)", 0},
340 1.1 jruoho
341 1.1 jruoho /* Flags byte 1 */
342 1.1 jruoho
343 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)", 0},
344 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)", 0},
345 1.1 jruoho {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)", 0},
346 1.1 jruoho {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)", 0},
347 1.1 jruoho {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)", 0},
348 1.1 jruoho {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)", 0},
349 1.1 jruoho {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)", 0},
350 1.1 jruoho {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)", 0},
351 1.1 jruoho
352 1.1 jruoho /* Flags byte 2 */
353 1.1 jruoho
354 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)", 0},
355 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)", 0},
356 1.1 jruoho {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)", 0},
357 1.1 jruoho {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)", 0},
358 1.1 jruoho ACPI_DMT_TERMINATOR
359 1.1 jruoho };
360 1.1 jruoho
361 1.1 jruoho /* ACPI 1.0 MS Extensions (FADT version 2) */
362 1.1 jruoho
363 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] =
364 1.1 jruoho {
365 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0},
366 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0},
367 1.1 jruoho {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0},
368 1.1 jruoho ACPI_DMT_TERMINATOR
369 1.1 jruoho };
370 1.1 jruoho
371 1.1 jruoho /* ACPI 2.0+ Extensions (FADT version 3+) */
372 1.1 jruoho
373 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] =
374 1.1 jruoho {
375 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0},
376 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0},
377 1.1 jruoho {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0},
378 1.1 jruoho {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address", 0},
379 1.1 jruoho {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address", 0},
380 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block", 0},
381 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block", 0},
382 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block", 0},
383 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block", 0},
384 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block", 0},
385 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block", 0},
386 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block", 0},
387 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block", 0},
388 1.1 jruoho ACPI_DMT_TERMINATOR
389 1.1 jruoho };
390 1.1 jruoho
391 1.1 jruoho
392 1.1 jruoho /*
393 1.1 jruoho * Remaining tables are not consumed directly by the ACPICA subsystem
394 1.1 jruoho */
395 1.1 jruoho
396 1.1 jruoho /*******************************************************************************
397 1.1 jruoho *
398 1.1 jruoho * ASF - Alert Standard Format table (Signature "ASF!")
399 1.1 jruoho *
400 1.1 jruoho ******************************************************************************/
401 1.1 jruoho
402 1.1 jruoho /* Common Subtable header (one per Subtable) */
403 1.1 jruoho
404 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] =
405 1.1 jruoho {
406 1.1 jruoho {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0},
407 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0},
408 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH},
409 1.1 jruoho ACPI_DMT_TERMINATOR
410 1.1 jruoho };
411 1.1 jruoho
412 1.1 jruoho /* 0: ASF Information */
413 1.1 jruoho
414 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] =
415 1.1 jruoho {
416 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0},
417 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0},
418 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0},
419 1.1 jruoho {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0},
420 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0},
421 1.1 jruoho {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0},
422 1.1 jruoho ACPI_DMT_TERMINATOR
423 1.1 jruoho };
424 1.1 jruoho
425 1.1 jruoho /* 1: ASF Alerts */
426 1.1 jruoho
427 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] =
428 1.1 jruoho {
429 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0},
430 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0},
431 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0},
432 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0},
433 1.1 jruoho ACPI_DMT_TERMINATOR
434 1.1 jruoho };
435 1.1 jruoho
436 1.1 jruoho /* 1a: ASF Alert data */
437 1.1 jruoho
438 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] =
439 1.1 jruoho {
440 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0},
441 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0},
442 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0},
443 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0},
444 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0},
445 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0},
446 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0},
447 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0},
448 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0},
449 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0},
450 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0},
451 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0},
452 1.1 jruoho ACPI_DMT_TERMINATOR
453 1.1 jruoho };
454 1.1 jruoho
455 1.1 jruoho /* 2: ASF Remote Control */
456 1.1 jruoho
457 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] =
458 1.1 jruoho {
459 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0},
460 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0},
461 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0},
462 1.1 jruoho ACPI_DMT_TERMINATOR
463 1.1 jruoho };
464 1.1 jruoho
465 1.1 jruoho /* 2a: ASF Control data */
466 1.1 jruoho
467 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] =
468 1.1 jruoho {
469 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0},
470 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0},
471 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0},
472 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0},
473 1.1 jruoho ACPI_DMT_TERMINATOR
474 1.1 jruoho };
475 1.1 jruoho
476 1.1 jruoho /* 3: ASF RMCP Boot Options */
477 1.1 jruoho
478 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] =
479 1.1 jruoho {
480 1.3 jruoho {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0},
481 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0},
482 1.1 jruoho {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0},
483 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0},
484 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0},
485 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0},
486 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0},
487 1.1 jruoho ACPI_DMT_TERMINATOR
488 1.1 jruoho };
489 1.1 jruoho
490 1.1 jruoho /* 4: ASF Address */
491 1.1 jruoho
492 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] =
493 1.1 jruoho {
494 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0},
495 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT},
496 1.1 jruoho ACPI_DMT_TERMINATOR
497 1.1 jruoho };
498 1.1 jruoho
499 1.1 jruoho
500 1.1 jruoho /*******************************************************************************
501 1.1 jruoho *
502 1.1 jruoho * BERT - Boot Error Record table
503 1.1 jruoho *
504 1.1 jruoho ******************************************************************************/
505 1.1 jruoho
506 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] =
507 1.1 jruoho {
508 1.1 jruoho {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0},
509 1.1 jruoho {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0},
510 1.1 jruoho ACPI_DMT_TERMINATOR
511 1.1 jruoho };
512 1.1 jruoho
513 1.1 jruoho
514 1.1 jruoho /*******************************************************************************
515 1.1 jruoho *
516 1.1 jruoho * BOOT - Simple Boot Flag Table
517 1.1 jruoho *
518 1.1 jruoho ******************************************************************************/
519 1.1 jruoho
520 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] =
521 1.1 jruoho {
522 1.1 jruoho {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0},
523 1.1 jruoho {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0},
524 1.1 jruoho ACPI_DMT_TERMINATOR
525 1.1 jruoho };
526 1.1 jruoho
527 1.1 jruoho
528 1.1 jruoho /*******************************************************************************
529 1.1 jruoho *
530 1.1 jruoho * CPEP - Corrected Platform Error Polling table
531 1.1 jruoho *
532 1.1 jruoho ******************************************************************************/
533 1.1 jruoho
534 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] =
535 1.1 jruoho {
536 1.1 jruoho {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0},
537 1.1 jruoho ACPI_DMT_TERMINATOR
538 1.1 jruoho };
539 1.1 jruoho
540 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] =
541 1.1 jruoho {
542 1.1 jruoho {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0},
543 1.1 jruoho {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH},
544 1.1 jruoho {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0},
545 1.1 jruoho {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0},
546 1.1 jruoho {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0},
547 1.1 jruoho ACPI_DMT_TERMINATOR
548 1.1 jruoho };
549 1.1 jruoho
550 1.1 jruoho
551 1.1 jruoho /*******************************************************************************
552 1.1 jruoho *
553 1.1 jruoho * DBGP - Debug Port
554 1.1 jruoho *
555 1.1 jruoho ******************************************************************************/
556 1.1 jruoho
557 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] =
558 1.1 jruoho {
559 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0},
560 1.1 jruoho {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0},
561 1.1 jruoho {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0},
562 1.1 jruoho ACPI_DMT_TERMINATOR
563 1.1 jruoho };
564 1.1 jruoho
565 1.1 jruoho
566 1.1 jruoho /*******************************************************************************
567 1.1 jruoho *
568 1.1 jruoho * DMAR - DMA Remapping table
569 1.1 jruoho *
570 1.1 jruoho ******************************************************************************/
571 1.1 jruoho
572 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] =
573 1.1 jruoho {
574 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0},
575 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0},
576 1.1 jruoho ACPI_DMT_TERMINATOR
577 1.1 jruoho };
578 1.1 jruoho
579 1.1 jruoho /* Common Subtable header (one per Subtable) */
580 1.1 jruoho
581 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] =
582 1.1 jruoho {
583 1.1 jruoho {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0},
584 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH},
585 1.1 jruoho ACPI_DMT_TERMINATOR
586 1.1 jruoho };
587 1.1 jruoho
588 1.1 jruoho /* Common device scope entry */
589 1.1 jruoho
590 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] =
591 1.1 jruoho {
592 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type", 0},
593 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH},
594 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0},
595 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0},
596 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0},
597 1.1 jruoho ACPI_DMT_TERMINATOR
598 1.1 jruoho };
599 1.1 jruoho
600 1.1 jruoho /* DMAR Subtables */
601 1.1 jruoho
602 1.1 jruoho /* 0: Hardware Unit Definition */
603 1.1 jruoho
604 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] =
605 1.1 jruoho {
606 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0},
607 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0},
608 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0},
609 1.1 jruoho {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0},
610 1.1 jruoho ACPI_DMT_TERMINATOR
611 1.1 jruoho };
612 1.1 jruoho
613 1.1 jruoho /* 1: Reserved Memory Definition */
614 1.1 jruoho
615 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] =
616 1.1 jruoho {
617 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0},
618 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0},
619 1.1 jruoho {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0},
620 1.1 jruoho {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0},
621 1.1 jruoho ACPI_DMT_TERMINATOR
622 1.1 jruoho };
623 1.1 jruoho
624 1.1 jruoho /* 2: Root Port ATS Capability Definition */
625 1.1 jruoho
626 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] =
627 1.1 jruoho {
628 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0},
629 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0},
630 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0},
631 1.1 jruoho ACPI_DMT_TERMINATOR
632 1.1 jruoho };
633 1.1 jruoho
634 1.1 jruoho /* 3: Remapping Hardware Static Affinity Structure */
635 1.1 jruoho
636 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] =
637 1.1 jruoho {
638 1.1 jruoho {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0},
639 1.1 jruoho {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0},
640 1.1 jruoho {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0},
641 1.1 jruoho ACPI_DMT_TERMINATOR
642 1.1 jruoho };
643 1.1 jruoho
644 1.1 jruoho
645 1.1 jruoho /*******************************************************************************
646 1.1 jruoho *
647 1.1 jruoho * ECDT - Embedded Controller Boot Resources Table
648 1.1 jruoho *
649 1.1 jruoho ******************************************************************************/
650 1.1 jruoho
651 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] =
652 1.1 jruoho {
653 1.1 jruoho {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0},
654 1.1 jruoho {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0},
655 1.1 jruoho {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0},
656 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0},
657 1.1 jruoho {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0},
658 1.1 jruoho ACPI_DMT_TERMINATOR
659 1.1 jruoho };
660 1.1 jruoho
661 1.1 jruoho
662 1.1 jruoho /*******************************************************************************
663 1.1 jruoho *
664 1.1 jruoho * EINJ - Error Injection table
665 1.1 jruoho *
666 1.1 jruoho ******************************************************************************/
667 1.1 jruoho
668 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] =
669 1.1 jruoho {
670 1.3 jruoho {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0},
671 1.1 jruoho {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0},
672 1.1 jruoho {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0},
673 1.1 jruoho {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0},
674 1.1 jruoho ACPI_DMT_TERMINATOR
675 1.1 jruoho };
676 1.1 jruoho
677 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] =
678 1.1 jruoho {
679 1.3 jruoho {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0},
680 1.3 jruoho {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0},
681 1.3 jruoho {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
682 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0},
683 1.3 jruoho
684 1.1 jruoho {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0},
685 1.1 jruoho {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0},
686 1.1 jruoho {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0},
687 1.1 jruoho {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0},
688 1.1 jruoho ACPI_DMT_TERMINATOR
689 1.1 jruoho };
690 1.1 jruoho
691 1.1 jruoho
692 1.1 jruoho /*******************************************************************************
693 1.1 jruoho *
694 1.1 jruoho * ERST - Error Record Serialization table
695 1.1 jruoho *
696 1.1 jruoho ******************************************************************************/
697 1.1 jruoho
698 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] =
699 1.1 jruoho {
700 1.3 jruoho {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0},
701 1.1 jruoho {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0},
702 1.1 jruoho {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0},
703 1.1 jruoho ACPI_DMT_TERMINATOR
704 1.1 jruoho };
705 1.1 jruoho
706 1.3 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] =
707 1.3 jruoho {
708 1.3 jruoho {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0},
709 1.3 jruoho {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0},
710 1.3 jruoho {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
711 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0},
712 1.3 jruoho
713 1.3 jruoho {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0},
714 1.3 jruoho {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0},
715 1.3 jruoho {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0},
716 1.3 jruoho {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0},
717 1.3 jruoho ACPI_DMT_TERMINATOR
718 1.3 jruoho };
719 1.3 jruoho
720 1.1 jruoho
721 1.1 jruoho /*******************************************************************************
722 1.1 jruoho *
723 1.1 jruoho * HEST - Hardware Error Source table
724 1.1 jruoho *
725 1.1 jruoho ******************************************************************************/
726 1.1 jruoho
727 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] =
728 1.1 jruoho {
729 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0},
730 1.1 jruoho ACPI_DMT_TERMINATOR
731 1.1 jruoho };
732 1.1 jruoho
733 1.1 jruoho /* Common HEST structures for subtables */
734 1.1 jruoho
735 1.1 jruoho #define ACPI_DM_HEST_HEADER \
736 1.1 jruoho {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \
737 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0}
738 1.1 jruoho
739 1.1 jruoho #define ACPI_DM_HEST_AER \
740 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \
741 1.3 jruoho {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \
742 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \
743 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \
744 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \
745 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \
746 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \
747 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \
748 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \
749 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \
750 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \
751 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \
752 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \
753 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \
754 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0}
755 1.1 jruoho
756 1.1 jruoho
757 1.1 jruoho /* HEST Subtables */
758 1.1 jruoho
759 1.1 jruoho /* 0: IA32 Machine Check Exception */
760 1.1 jruoho
761 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] =
762 1.1 jruoho {
763 1.1 jruoho ACPI_DM_HEST_HEADER,
764 1.3 jruoho {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0},
765 1.3 jruoho {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
766 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0},
767 1.3 jruoho
768 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0},
769 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
770 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
771 1.1 jruoho {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0},
772 1.1 jruoho {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0},
773 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0},
774 1.3 jruoho {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0},
775 1.1 jruoho ACPI_DMT_TERMINATOR
776 1.1 jruoho };
777 1.1 jruoho
778 1.1 jruoho /* 1: IA32 Corrected Machine Check */
779 1.1 jruoho
780 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] =
781 1.1 jruoho {
782 1.1 jruoho ACPI_DM_HEST_HEADER,
783 1.3 jruoho {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0},
784 1.3 jruoho {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
785 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0},
786 1.3 jruoho
787 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0},
788 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
789 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
790 1.1 jruoho {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0},
791 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0},
792 1.3 jruoho {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0},
793 1.1 jruoho ACPI_DMT_TERMINATOR
794 1.1 jruoho };
795 1.1 jruoho
796 1.1 jruoho /* 2: IA32 Non-Maskable Interrupt */
797 1.1 jruoho
798 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] =
799 1.1 jruoho {
800 1.1 jruoho ACPI_DM_HEST_HEADER,
801 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0},
802 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
803 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
804 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0},
805 1.1 jruoho ACPI_DMT_TERMINATOR
806 1.1 jruoho };
807 1.1 jruoho
808 1.1 jruoho /* 6: PCI Express Root Port AER */
809 1.1 jruoho
810 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] =
811 1.1 jruoho {
812 1.1 jruoho ACPI_DM_HEST_HEADER,
813 1.1 jruoho ACPI_DM_HEST_AER,
814 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0},
815 1.1 jruoho ACPI_DMT_TERMINATOR
816 1.1 jruoho };
817 1.1 jruoho
818 1.1 jruoho /* 7: PCI Express AER (AER Endpoint) */
819 1.1 jruoho
820 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] =
821 1.1 jruoho {
822 1.1 jruoho ACPI_DM_HEST_HEADER,
823 1.1 jruoho ACPI_DM_HEST_AER,
824 1.1 jruoho ACPI_DMT_TERMINATOR
825 1.1 jruoho };
826 1.1 jruoho
827 1.1 jruoho /* 8: PCI Express/PCI-X Bridge AER */
828 1.1 jruoho
829 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] =
830 1.1 jruoho {
831 1.1 jruoho ACPI_DM_HEST_HEADER,
832 1.1 jruoho ACPI_DM_HEST_AER,
833 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0},
834 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0},
835 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0},
836 1.1 jruoho ACPI_DMT_TERMINATOR
837 1.1 jruoho };
838 1.1 jruoho
839 1.1 jruoho /* 9: Generic Hardware Error Source */
840 1.1 jruoho
841 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] =
842 1.1 jruoho {
843 1.1 jruoho ACPI_DM_HEST_HEADER,
844 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0},
845 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0},
846 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0},
847 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
848 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
849 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0},
850 1.1 jruoho {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0},
851 1.1 jruoho {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0},
852 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0},
853 1.1 jruoho ACPI_DMT_TERMINATOR
854 1.1 jruoho };
855 1.1 jruoho
856 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] =
857 1.1 jruoho {
858 1.1 jruoho {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0},
859 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH},
860 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0},
861 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0},
862 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0},
863 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0},
864 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0},
865 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0},
866 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0},
867 1.1 jruoho ACPI_DMT_TERMINATOR
868 1.1 jruoho };
869 1.1 jruoho
870 1.1 jruoho
871 1.1 jruoho /*
872 1.1 jruoho * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and
873 1.1 jruoho * ACPI_HEST_IA_CORRECTED structures.
874 1.1 jruoho */
875 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] =
876 1.1 jruoho {
877 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0},
878 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0},
879 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0},
880 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0},
881 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0},
882 1.1 jruoho {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0},
883 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0},
884 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0},
885 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0},
886 1.1 jruoho ACPI_DMT_TERMINATOR
887 1.1 jruoho };
888 1.1 jruoho
889 1.1 jruoho
890 1.1 jruoho /*******************************************************************************
891 1.1 jruoho *
892 1.1 jruoho * HPET - High Precision Event Timer table
893 1.1 jruoho *
894 1.1 jruoho ******************************************************************************/
895 1.1 jruoho
896 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] =
897 1.1 jruoho {
898 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0},
899 1.1 jruoho {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0},
900 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0},
901 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0},
902 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
903 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0},
904 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0},
905 1.1 jruoho ACPI_DMT_TERMINATOR
906 1.1 jruoho };
907 1.1 jruoho
908 1.1 jruoho
909 1.1 jruoho /*******************************************************************************
910 1.1 jruoho *
911 1.1 jruoho * IVRS - I/O Virtualization Reporting Structure
912 1.1 jruoho *
913 1.1 jruoho ******************************************************************************/
914 1.1 jruoho
915 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] =
916 1.1 jruoho {
917 1.1 jruoho {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0},
918 1.1 jruoho {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0},
919 1.1 jruoho ACPI_DMT_TERMINATOR
920 1.1 jruoho };
921 1.1 jruoho
922 1.1 jruoho /* Common Subtable header (one per Subtable) */
923 1.1 jruoho
924 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] =
925 1.1 jruoho {
926 1.1 jruoho {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0},
927 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0},
928 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH},
929 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0},
930 1.1 jruoho ACPI_DMT_TERMINATOR
931 1.1 jruoho };
932 1.1 jruoho
933 1.1 jruoho /* IVRS subtables */
934 1.1 jruoho
935 1.1 jruoho /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */
936 1.1 jruoho
937 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] =
938 1.1 jruoho {
939 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0},
940 1.1 jruoho {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0},
941 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0},
942 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0},
943 1.1 jruoho {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0},
944 1.1 jruoho ACPI_DMT_TERMINATOR
945 1.1 jruoho };
946 1.1 jruoho
947 1.1 jruoho /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */
948 1.1 jruoho
949 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] =
950 1.1 jruoho {
951 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0},
952 1.1 jruoho {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0},
953 1.1 jruoho {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0},
954 1.1 jruoho {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0},
955 1.1 jruoho ACPI_DMT_TERMINATOR
956 1.1 jruoho };
957 1.1 jruoho
958 1.1 jruoho /* Device entry header for IVHD block */
959 1.1 jruoho
960 1.1 jruoho #define ACPI_DMT_IVRS_DE_HEADER \
961 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \
962 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \
963 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0}
964 1.1 jruoho
965 1.1 jruoho /* 4-byte device entry */
966 1.1 jruoho
967 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] =
968 1.1 jruoho {
969 1.1 jruoho ACPI_DMT_IVRS_DE_HEADER,
970 1.1 jruoho {ACPI_DMT_EXIT, 0, NULL, 0},
971 1.1 jruoho };
972 1.1 jruoho
973 1.1 jruoho /* 8-byte device entry */
974 1.1 jruoho
975 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] =
976 1.1 jruoho {
977 1.1 jruoho ACPI_DMT_IVRS_DE_HEADER,
978 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0},
979 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0},
980 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0},
981 1.1 jruoho ACPI_DMT_TERMINATOR
982 1.1 jruoho };
983 1.1 jruoho
984 1.1 jruoho /* 8-byte device entry */
985 1.1 jruoho
986 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] =
987 1.1 jruoho {
988 1.1 jruoho ACPI_DMT_IVRS_DE_HEADER,
989 1.1 jruoho {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0},
990 1.1 jruoho ACPI_DMT_TERMINATOR
991 1.1 jruoho };
992 1.1 jruoho
993 1.1 jruoho /* 8-byte device entry */
994 1.1 jruoho
995 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] =
996 1.1 jruoho {
997 1.1 jruoho ACPI_DMT_IVRS_DE_HEADER,
998 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0},
999 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0},
1000 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0},
1001 1.1 jruoho ACPI_DMT_TERMINATOR
1002 1.1 jruoho };
1003 1.1 jruoho
1004 1.1 jruoho
1005 1.1 jruoho /*******************************************************************************
1006 1.1 jruoho *
1007 1.1 jruoho * MADT - Multiple APIC Description Table and subtables
1008 1.1 jruoho *
1009 1.1 jruoho ******************************************************************************/
1010 1.1 jruoho
1011 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] =
1012 1.1 jruoho {
1013 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0},
1014 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1015 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0},
1016 1.1 jruoho ACPI_DMT_TERMINATOR
1017 1.1 jruoho };
1018 1.1 jruoho
1019 1.1 jruoho /* Common Subtable header (one per Subtable) */
1020 1.1 jruoho
1021 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] =
1022 1.1 jruoho {
1023 1.1 jruoho {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0},
1024 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH},
1025 1.1 jruoho ACPI_DMT_TERMINATOR
1026 1.1 jruoho };
1027 1.1 jruoho
1028 1.1 jruoho /* MADT Subtables */
1029 1.1 jruoho
1030 1.1 jruoho /* 0: processor APIC */
1031 1.1 jruoho
1032 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] =
1033 1.1 jruoho {
1034 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0},
1035 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0},
1036 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},
1037 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},
1038 1.1 jruoho ACPI_DMT_TERMINATOR
1039 1.1 jruoho };
1040 1.1 jruoho
1041 1.1 jruoho /* 1: IO APIC */
1042 1.1 jruoho
1043 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] =
1044 1.1 jruoho {
1045 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0},
1046 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0},
1047 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0},
1048 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0},
1049 1.1 jruoho ACPI_DMT_TERMINATOR
1050 1.1 jruoho };
1051 1.1 jruoho
1052 1.1 jruoho /* 2: Interrupt Override */
1053 1.1 jruoho
1054 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] =
1055 1.1 jruoho {
1056 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0},
1057 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0},
1058 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0},
1059 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
1060 1.1 jruoho {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
1061 1.1 jruoho {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
1062 1.1 jruoho ACPI_DMT_TERMINATOR
1063 1.1 jruoho };
1064 1.1 jruoho
1065 1.1 jruoho /* 3: NMI Sources */
1066 1.1 jruoho
1067 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] =
1068 1.1 jruoho {
1069 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
1070 1.1 jruoho {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
1071 1.1 jruoho {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
1072 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0},
1073 1.1 jruoho ACPI_DMT_TERMINATOR
1074 1.1 jruoho };
1075 1.1 jruoho
1076 1.1 jruoho /* 4: Local APIC NMI */
1077 1.1 jruoho
1078 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] =
1079 1.1 jruoho {
1080 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0},
1081 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
1082 1.1 jruoho {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
1083 1.1 jruoho {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
1084 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0},
1085 1.1 jruoho ACPI_DMT_TERMINATOR
1086 1.1 jruoho };
1087 1.1 jruoho
1088 1.1 jruoho /* 5: Address Override */
1089 1.1 jruoho
1090 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] =
1091 1.1 jruoho {
1092 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0},
1093 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0},
1094 1.1 jruoho ACPI_DMT_TERMINATOR
1095 1.1 jruoho };
1096 1.1 jruoho
1097 1.1 jruoho /* 6: I/O Sapic */
1098 1.1 jruoho
1099 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] =
1100 1.1 jruoho {
1101 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0},
1102 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0},
1103 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0},
1104 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0},
1105 1.1 jruoho ACPI_DMT_TERMINATOR
1106 1.1 jruoho };
1107 1.1 jruoho
1108 1.1 jruoho /* 7: Local Sapic */
1109 1.1 jruoho
1110 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] =
1111 1.1 jruoho {
1112 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0},
1113 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0},
1114 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0},
1115 1.1 jruoho {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0},
1116 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},
1117 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},
1118 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0},
1119 1.1 jruoho {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0},
1120 1.1 jruoho ACPI_DMT_TERMINATOR
1121 1.1 jruoho };
1122 1.1 jruoho
1123 1.1 jruoho /* 8: Platform Interrupt Source */
1124 1.1 jruoho
1125 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] =
1126 1.1 jruoho {
1127 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
1128 1.1 jruoho {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
1129 1.1 jruoho {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
1130 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0},
1131 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0},
1132 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0},
1133 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0},
1134 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0},
1135 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1136 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0},
1137 1.1 jruoho ACPI_DMT_TERMINATOR
1138 1.1 jruoho };
1139 1.1 jruoho
1140 1.1 jruoho /* 9: Processor Local X2_APIC (ACPI 4.0) */
1141 1.1 jruoho
1142 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] =
1143 1.1 jruoho {
1144 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0},
1145 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0},
1146 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},
1147 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},
1148 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0},
1149 1.1 jruoho ACPI_DMT_TERMINATOR
1150 1.1 jruoho };
1151 1.1 jruoho
1152 1.1 jruoho /* 10: Local X2_APIC NMI (ACPI 4.0) */
1153 1.1 jruoho
1154 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] =
1155 1.1 jruoho {
1156 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
1157 1.1 jruoho {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
1158 1.1 jruoho {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
1159 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0},
1160 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0},
1161 1.1 jruoho {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0},
1162 1.1 jruoho ACPI_DMT_TERMINATOR
1163 1.1 jruoho };
1164 1.1 jruoho
1165 1.1 jruoho
1166 1.1 jruoho /*******************************************************************************
1167 1.1 jruoho *
1168 1.1 jruoho * MCFG - PCI Memory Mapped Configuration table and Subtable
1169 1.1 jruoho *
1170 1.1 jruoho ******************************************************************************/
1171 1.1 jruoho
1172 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] =
1173 1.1 jruoho {
1174 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0},
1175 1.1 jruoho ACPI_DMT_TERMINATOR
1176 1.1 jruoho };
1177 1.1 jruoho
1178 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] =
1179 1.1 jruoho {
1180 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0},
1181 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0},
1182 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0},
1183 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0},
1184 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0},
1185 1.1 jruoho ACPI_DMT_TERMINATOR
1186 1.1 jruoho };
1187 1.1 jruoho
1188 1.1 jruoho
1189 1.1 jruoho /*******************************************************************************
1190 1.1 jruoho *
1191 1.1 jruoho * MCHI - Management Controller Host Interface table
1192 1.1 jruoho *
1193 1.1 jruoho ******************************************************************************/
1194 1.1 jruoho
1195 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] =
1196 1.1 jruoho {
1197 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0},
1198 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0},
1199 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0},
1200 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0},
1201 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0},
1202 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0},
1203 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0},
1204 1.1 jruoho {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0},
1205 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0},
1206 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0},
1207 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0},
1208 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0},
1209 1.1 jruoho ACPI_DMT_TERMINATOR
1210 1.1 jruoho };
1211 1.1 jruoho
1212 1.1 jruoho
1213 1.1 jruoho /*******************************************************************************
1214 1.1 jruoho *
1215 1.1 jruoho * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1216 1.1 jruoho *
1217 1.1 jruoho ******************************************************************************/
1218 1.1 jruoho
1219 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] =
1220 1.1 jruoho {
1221 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0},
1222 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0},
1223 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0},
1224 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0},
1225 1.1 jruoho ACPI_DMT_TERMINATOR
1226 1.1 jruoho };
1227 1.1 jruoho
1228 1.1 jruoho /* Subtable - Maximum Proximity Domain Information. Version 1 */
1229 1.1 jruoho
1230 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] =
1231 1.1 jruoho {
1232 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0},
1233 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH},
1234 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0},
1235 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0},
1236 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0},
1237 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0},
1238 1.1 jruoho ACPI_DMT_TERMINATOR
1239 1.1 jruoho };
1240 1.1 jruoho
1241 1.1 jruoho
1242 1.1 jruoho /*******************************************************************************
1243 1.1 jruoho *
1244 1.1 jruoho * SBST - Smart Battery Specification Table
1245 1.1 jruoho *
1246 1.1 jruoho ******************************************************************************/
1247 1.1 jruoho
1248 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] =
1249 1.1 jruoho {
1250 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0},
1251 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0},
1252 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0},
1253 1.1 jruoho ACPI_DMT_TERMINATOR
1254 1.1 jruoho };
1255 1.1 jruoho
1256 1.1 jruoho
1257 1.1 jruoho /*******************************************************************************
1258 1.1 jruoho *
1259 1.1 jruoho * SLIC - Software Licensing Description Table. NOT FULLY IMPLEMENTED, do not
1260 1.1 jruoho * have the table definition.
1261 1.1 jruoho *
1262 1.1 jruoho ******************************************************************************/
1263 1.1 jruoho
1264 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSlic[] =
1265 1.1 jruoho {
1266 1.1 jruoho ACPI_DMT_TERMINATOR
1267 1.1 jruoho };
1268 1.1 jruoho
1269 1.1 jruoho
1270 1.1 jruoho /*******************************************************************************
1271 1.1 jruoho *
1272 1.1 jruoho * SLIT - System Locality Information Table
1273 1.1 jruoho *
1274 1.1 jruoho ******************************************************************************/
1275 1.1 jruoho
1276 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] =
1277 1.1 jruoho {
1278 1.1 jruoho {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities", 0},
1279 1.1 jruoho ACPI_DMT_TERMINATOR
1280 1.1 jruoho };
1281 1.1 jruoho
1282 1.1 jruoho
1283 1.1 jruoho /*******************************************************************************
1284 1.1 jruoho *
1285 1.1 jruoho * SPCR - Serial Port Console Redirection table
1286 1.1 jruoho *
1287 1.1 jruoho ******************************************************************************/
1288 1.1 jruoho
1289 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] =
1290 1.1 jruoho {
1291 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type", 0},
1292 1.1 jruoho {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved", 0},
1293 1.1 jruoho {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register", 0},
1294 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type", 0},
1295 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ", 0},
1296 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt", 0},
1297 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate", 0},
1298 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity", 0},
1299 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits", 0},
1300 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control", 0},
1301 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type", 0},
1302 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0},
1303 1.1 jruoho {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID", 0},
1304 1.1 jruoho {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID", 0},
1305 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus", 0},
1306 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device", 0},
1307 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function", 0},
1308 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags", 0},
1309 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment", 0},
1310 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0},
1311 1.1 jruoho ACPI_DMT_TERMINATOR
1312 1.1 jruoho };
1313 1.1 jruoho
1314 1.1 jruoho
1315 1.1 jruoho /*******************************************************************************
1316 1.1 jruoho *
1317 1.1 jruoho * SPMI - Server Platform Management Interface table
1318 1.1 jruoho *
1319 1.1 jruoho ******************************************************************************/
1320 1.1 jruoho
1321 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] =
1322 1.1 jruoho {
1323 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type", 0},
1324 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved", 0},
1325 1.1 jruoho {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version", 0},
1326 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type", 0},
1327 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number", 0},
1328 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved", 0},
1329 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag", 0},
1330 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt", 0},
1331 1.1 jruoho {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register", 0},
1332 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment", 0},
1333 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus", 0},
1334 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device", 0},
1335 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function", 0},
1336 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved", 0},
1337 1.1 jruoho ACPI_DMT_TERMINATOR
1338 1.1 jruoho };
1339 1.1 jruoho
1340 1.1 jruoho
1341 1.1 jruoho /*******************************************************************************
1342 1.1 jruoho *
1343 1.1 jruoho * SRAT - System Resource Affinity Table and Subtables
1344 1.1 jruoho *
1345 1.1 jruoho ******************************************************************************/
1346 1.1 jruoho
1347 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] =
1348 1.1 jruoho {
1349 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision", 0},
1350 1.1 jruoho {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved", 0},
1351 1.1 jruoho ACPI_DMT_TERMINATOR
1352 1.1 jruoho };
1353 1.1 jruoho
1354 1.1 jruoho /* Common Subtable header (one per Subtable) */
1355 1.1 jruoho
1356 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] =
1357 1.1 jruoho {
1358 1.1 jruoho {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type", 0},
1359 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length", DT_LENGTH},
1360 1.1 jruoho ACPI_DMT_TERMINATOR
1361 1.1 jruoho };
1362 1.1 jruoho
1363 1.1 jruoho /* SRAT Subtables */
1364 1.1 jruoho
1365 1.1 jruoho /* 0: Processor Local APIC/SAPIC Affinity */
1366 1.1 jruoho
1367 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] =
1368 1.1 jruoho {
1369 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)", 0},
1370 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID", 0},
1371 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1372 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled", 0},
1373 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID", 0},
1374 1.1 jruoho {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)", 0},
1375 1.2 jruoho {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (ClockDomain), "Clock Domain", 0},
1376 1.1 jruoho ACPI_DMT_TERMINATOR
1377 1.1 jruoho };
1378 1.1 jruoho
1379 1.1 jruoho /* 1: Memory Affinity */
1380 1.1 jruoho
1381 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] =
1382 1.1 jruoho {
1383 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain", 0},
1384 1.3 jruoho {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved1", 0},
1385 1.1 jruoho {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address", 0},
1386 1.1 jruoho {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length", 0},
1387 1.3 jruoho {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved2", 0},
1388 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1389 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled", 0},
1390 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable", 0},
1391 1.1 jruoho {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile", 0},
1392 1.3 jruoho {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved3", 0},
1393 1.1 jruoho ACPI_DMT_TERMINATOR
1394 1.1 jruoho };
1395 1.1 jruoho
1396 1.1 jruoho /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */
1397 1.1 jruoho
1398 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] =
1399 1.1 jruoho {
1400 1.3 jruoho {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved1", 0},
1401 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain", 0},
1402 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID", 0},
1403 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1404 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled", 0},
1405 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain", 0},
1406 1.3 jruoho {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved2", 0},
1407 1.1 jruoho ACPI_DMT_TERMINATOR
1408 1.1 jruoho };
1409 1.1 jruoho
1410 1.1 jruoho
1411 1.1 jruoho /*******************************************************************************
1412 1.1 jruoho *
1413 1.1 jruoho * TCPA - Trusted Computing Platform Alliance table
1414 1.1 jruoho *
1415 1.1 jruoho ******************************************************************************/
1416 1.1 jruoho
1417 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] =
1418 1.1 jruoho {
1419 1.1 jruoho {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved", 0},
1420 1.1 jruoho {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length", 0},
1421 1.1 jruoho {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address", 0},
1422 1.1 jruoho ACPI_DMT_TERMINATOR
1423 1.1 jruoho };
1424 1.1 jruoho
1425 1.1 jruoho
1426 1.1 jruoho /*******************************************************************************
1427 1.1 jruoho *
1428 1.1 jruoho * UEFI - UEFI Boot optimization Table
1429 1.1 jruoho *
1430 1.1 jruoho ******************************************************************************/
1431 1.1 jruoho
1432 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] =
1433 1.1 jruoho {
1434 1.3 jruoho {ACPI_DMT_UUID, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier", 0},
1435 1.1 jruoho {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset", 0},
1436 1.1 jruoho ACPI_DMT_TERMINATOR
1437 1.1 jruoho };
1438 1.1 jruoho
1439 1.1 jruoho
1440 1.1 jruoho /*******************************************************************************
1441 1.1 jruoho *
1442 1.1 jruoho * WAET - Windows ACPI Emulated devices Table
1443 1.1 jruoho *
1444 1.1 jruoho ******************************************************************************/
1445 1.1 jruoho
1446 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] =
1447 1.1 jruoho {
1448 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1449 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack", 0},
1450 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only", 0},
1451 1.1 jruoho ACPI_DMT_TERMINATOR
1452 1.1 jruoho };
1453 1.1 jruoho
1454 1.1 jruoho
1455 1.1 jruoho /*******************************************************************************
1456 1.1 jruoho *
1457 1.1 jruoho * WDAT - Watchdog Action Table
1458 1.1 jruoho *
1459 1.1 jruoho ******************************************************************************/
1460 1.1 jruoho
1461 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] =
1462 1.1 jruoho {
1463 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length", DT_LENGTH},
1464 1.1 jruoho {ACPI_DMT_UINT16, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment", 0},
1465 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus", 0},
1466 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device", 0},
1467 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function", 0},
1468 1.1 jruoho {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved", 0},
1469 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period", 0},
1470 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count", 0},
1471 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count", 0},
1472 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1473 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled", 0},
1474 1.1 jruoho {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep", 0},
1475 1.1 jruoho {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved", 0},
1476 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count", 0},
1477 1.1 jruoho ACPI_DMT_TERMINATOR
1478 1.1 jruoho };
1479 1.1 jruoho
1480 1.1 jruoho /* WDAT Subtables - Watchdog Instruction Entries */
1481 1.1 jruoho
1482 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] =
1483 1.1 jruoho {
1484 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action", 0},
1485 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction", 0},
1486 1.1 jruoho {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved", 0},
1487 1.1 jruoho {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region", 0},
1488 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value", 0},
1489 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask", 0},
1490 1.1 jruoho ACPI_DMT_TERMINATOR
1491 1.1 jruoho };
1492 1.1 jruoho
1493 1.1 jruoho
1494 1.1 jruoho /*******************************************************************************
1495 1.1 jruoho *
1496 1.3 jruoho * WDDT - Watchdog Description Table
1497 1.3 jruoho *
1498 1.3 jruoho ******************************************************************************/
1499 1.3 jruoho
1500 1.3 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoWddt[] =
1501 1.3 jruoho {
1502 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (SpecVersion), "Specification Version", 0},
1503 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (TableVersion), "Table Version", 0},
1504 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (PciVendorId), "PCI Vendor ID", 0},
1505 1.3 jruoho {ACPI_DMT_GAS, ACPI_WDDT_OFFSET (Address), "Timer Register", 0},
1506 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MaxCount), "Max Count", 0},
1507 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MinCount), "Min Count", 0},
1508 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Period), "Period", 0},
1509 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Status), "Status (decoded below)", 0},
1510 1.3 jruoho
1511 1.3 jruoho /* Status Flags byte 0 */
1512 1.3 jruoho
1513 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Status,0), "Available", 0},
1514 1.3 jruoho {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Status,0), "Active", 0},
1515 1.3 jruoho {ACPI_DMT_FLAG2, ACPI_WDDT_FLAG_OFFSET (Status,0), "OS Owns", 0},
1516 1.3 jruoho
1517 1.3 jruoho /* Status Flags byte 1 */
1518 1.3 jruoho
1519 1.3 jruoho {ACPI_DMT_FLAG3, ACPI_WDDT_FLAG_OFFSET (Status,1), "User Reset", 0},
1520 1.3 jruoho {ACPI_DMT_FLAG4, ACPI_WDDT_FLAG_OFFSET (Status,1), "Timeout Reset", 0},
1521 1.3 jruoho {ACPI_DMT_FLAG5, ACPI_WDDT_FLAG_OFFSET (Status,1), "Power Fail Reset", 0},
1522 1.3 jruoho {ACPI_DMT_FLAG6, ACPI_WDDT_FLAG_OFFSET (Status,1), "Unknown Reset", 0},
1523 1.3 jruoho
1524 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Capability), "Capability (decoded below)", 0},
1525 1.3 jruoho
1526 1.3 jruoho /* Capability Flags byte 0 */
1527 1.3 jruoho
1528 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Auto Reset", 0},
1529 1.3 jruoho {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Timeout Alert", 0},
1530 1.3 jruoho ACPI_DMT_TERMINATOR
1531 1.3 jruoho };
1532 1.3 jruoho
1533 1.3 jruoho
1534 1.3 jruoho /*******************************************************************************
1535 1.3 jruoho *
1536 1.1 jruoho * WDRT - Watchdog Resource Table
1537 1.1 jruoho *
1538 1.1 jruoho ******************************************************************************/
1539 1.1 jruoho
1540 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] =
1541 1.1 jruoho {
1542 1.1 jruoho {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register", 0},
1543 1.1 jruoho {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register", 0},
1544 1.1 jruoho {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID", 0},
1545 1.1 jruoho {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID", 0},
1546 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus", 0},
1547 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device", 0},
1548 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function", 0},
1549 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment", 0},
1550 1.1 jruoho {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count", 0},
1551 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units", 0},
1552 1.1 jruoho ACPI_DMT_TERMINATOR
1553 1.1 jruoho };
1554 1.1 jruoho
1555 1.3 jruoho /*
1556 1.3 jruoho * Generic types (used in UEFI)
1557 1.3 jruoho *
1558 1.3 jruoho * Examples:
1559 1.3 jruoho *
1560 1.3 jruoho * Buffer : cc 04 ff bb
1561 1.3 jruoho * UINT8 : 11
1562 1.3 jruoho * UINT16 : 1122
1563 1.3 jruoho * UINT24 : 112233
1564 1.3 jruoho * UINT32 : 11223344
1565 1.3 jruoho * UINT56 : 11223344556677
1566 1.3 jruoho * UINT64 : 1122334455667788
1567 1.3 jruoho *
1568 1.3 jruoho * String : "This is string"
1569 1.3 jruoho * Unicode : "This string encoded to Unicode"
1570 1.3 jruoho *
1571 1.3 jruoho * GUID : 11223344-5566-7788-99aa-bbccddeeff00
1572 1.3 jruoho * DevicePath : "\PciRoot(0)\Pci(0x1f,1)\Usb(0,0)"
1573 1.3 jruoho */
1574 1.3 jruoho
1575 1.3 jruoho #define ACPI_DM_GENERIC_ENTRY(FieldType, FieldName)\
1576 1.3 jruoho {{FieldType, 0, FieldName, 0}, ACPI_DMT_TERMINATOR}
1577 1.3 jruoho
1578 1.3 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoGeneric[][2] =
1579 1.3 jruoho {
1580 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT8, "UINT8"),
1581 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT16, "UINT16"),
1582 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT24, "UINT24"),
1583 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT32, "UINT32"),
1584 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT56, "UINT56"),
1585 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT64, "UINT64"),
1586 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "String"),
1587 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UNICODE, "Unicode"),
1588 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_BUFFER, "Buffer"),
1589 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UUID, "GUID"),
1590 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "DevicePath"),
1591 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_LABEL, "Label"),
1592 1.3 jruoho {ACPI_DMT_TERMINATOR}
1593 1.3 jruoho };
1594