dmtbinfo.c revision 1.6
1 1.1 jruoho /****************************************************************************** 2 1.1 jruoho * 3 1.1 jruoho * Module Name: dmtbinfo - Table info for non-AML tables 4 1.1 jruoho * 5 1.1 jruoho *****************************************************************************/ 6 1.1 jruoho 7 1.3 jruoho /* 8 1.6 christos * Copyright (C) 2000 - 2014, Intel Corp. 9 1.1 jruoho * All rights reserved. 10 1.1 jruoho * 11 1.3 jruoho * Redistribution and use in source and binary forms, with or without 12 1.3 jruoho * modification, are permitted provided that the following conditions 13 1.3 jruoho * are met: 14 1.3 jruoho * 1. Redistributions of source code must retain the above copyright 15 1.3 jruoho * notice, this list of conditions, and the following disclaimer, 16 1.3 jruoho * without modification. 17 1.3 jruoho * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 1.3 jruoho * substantially similar to the "NO WARRANTY" disclaimer below 19 1.3 jruoho * ("Disclaimer") and any redistribution must be conditioned upon 20 1.3 jruoho * including a substantially similar Disclaimer requirement for further 21 1.3 jruoho * binary redistribution. 22 1.3 jruoho * 3. Neither the names of the above-listed copyright holders nor the names 23 1.3 jruoho * of any contributors may be used to endorse or promote products derived 24 1.3 jruoho * from this software without specific prior written permission. 25 1.3 jruoho * 26 1.3 jruoho * Alternatively, this software may be distributed under the terms of the 27 1.3 jruoho * GNU General Public License ("GPL") version 2 as published by the Free 28 1.3 jruoho * Software Foundation. 29 1.3 jruoho * 30 1.3 jruoho * NO WARRANTY 31 1.3 jruoho * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 1.3 jruoho * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 1.3 jruoho * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 34 1.3 jruoho * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 1.3 jruoho * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 1.3 jruoho * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 1.3 jruoho * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 1.3 jruoho * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 1.3 jruoho * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 1.3 jruoho * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 1.3 jruoho * POSSIBILITY OF SUCH DAMAGES. 42 1.3 jruoho */ 43 1.1 jruoho 44 1.1 jruoho #include "acpi.h" 45 1.1 jruoho #include "accommon.h" 46 1.1 jruoho #include "acdisasm.h" 47 1.1 jruoho 48 1.1 jruoho /* This module used for application-level code only */ 49 1.1 jruoho 50 1.1 jruoho #define _COMPONENT ACPI_CA_DISASSEMBLER 51 1.1 jruoho ACPI_MODULE_NAME ("dmtbinfo") 52 1.1 jruoho 53 1.1 jruoho /* 54 1.4 jruoho * How to add a new table: 55 1.4 jruoho * 56 1.4 jruoho * - Add the C table definition to the actbl1.h or actbl2.h header. 57 1.4 jruoho * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. 58 1.4 jruoho * - Define the table in this file (for the disassembler). If any 59 1.4 jruoho * new data types are required (ACPI_DMT_*), see below. 60 1.4 jruoho * - Add an external declaration for the new table definition (AcpiDmTableInfo*) 61 1.4 jruoho * in acdisam.h 62 1.4 jruoho * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData) 63 1.4 jruoho * If a simple table (with no subtables), no disassembly code is needed. 64 1.4 jruoho * Otherwise, create the AcpiDmDump* function for to disassemble the table 65 1.4 jruoho * and add it to the dmtbdump.c file. 66 1.4 jruoho * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h 67 1.4 jruoho * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c 68 1.4 jruoho * - Create a template for the new table 69 1.4 jruoho * - Add data table compiler support 70 1.4 jruoho * 71 1.4 jruoho * How to add a new data type (ACPI_DMT_*): 72 1.4 jruoho * 73 1.4 jruoho * - Add new type at the end of the ACPI_DMT list in acdisasm.h 74 1.4 jruoho * - Add length and implementation cases in dmtable.c (disassembler) 75 1.4 jruoho * - Add type and length cases in dtutils.c (DT compiler) 76 1.4 jruoho */ 77 1.4 jruoho 78 1.4 jruoho /* 79 1.1 jruoho * Macros used to generate offsets to specific table fields 80 1.1 jruoho */ 81 1.5 christos #define ACPI_FACS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_FACS,f) 82 1.5 christos #define ACPI_GAS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) 83 1.5 christos #define ACPI_HDR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HEADER,f) 84 1.5 christos #define ACPI_RSDP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_RSDP,f) 85 1.5 christos #define ACPI_BERT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BERT,f) 86 1.5 christos #define ACPI_BGRT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BGRT,f) 87 1.5 christos #define ACPI_BOOT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BOOT,f) 88 1.5 christos #define ACPI_CPEP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_CPEP,f) 89 1.5 christos #define ACPI_DBG2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DBG2,f) 90 1.5 christos #define ACPI_DBGP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DBGP,f) 91 1.5 christos #define ACPI_DMAR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DMAR,f) 92 1.5 christos #define ACPI_DRTM_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DRTM,f) 93 1.5 christos #define ACPI_ECDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_ECDT,f) 94 1.5 christos #define ACPI_EINJ_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_EINJ,f) 95 1.5 christos #define ACPI_ERST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_ERST,f) 96 1.5 christos #define ACPI_GTDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_GTDT,f) 97 1.5 christos #define ACPI_HEST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HEST,f) 98 1.5 christos #define ACPI_HPET_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HPET,f) 99 1.5 christos #define ACPI_IVRS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_IVRS,f) 100 1.5 christos #define ACPI_MADT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MADT,f) 101 1.5 christos #define ACPI_MCFG_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MCFG,f) 102 1.5 christos #define ACPI_MCHI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MCHI,f) 103 1.5 christos #define ACPI_MPST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MPST,f) 104 1.5 christos #define ACPI_MSCT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MSCT,f) 105 1.5 christos #define ACPI_PCCT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_PCCT,f) 106 1.5 christos #define ACPI_PMTT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_PMTT,f) 107 1.5 christos #define ACPI_S3PT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_S3PT,f) 108 1.5 christos #define ACPI_SBST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SBST,f) 109 1.5 christos #define ACPI_SLIT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SLIT,f) 110 1.5 christos #define ACPI_SPCR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SPCR,f) 111 1.5 christos #define ACPI_SPMI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SPMI,f) 112 1.5 christos #define ACPI_SRAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SRAT,f) 113 1.5 christos #define ACPI_TCPA_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA,f) 114 1.5 christos #define ACPI_TPM2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TPM2,f) 115 1.5 christos #define ACPI_UEFI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_UEFI,f) 116 1.5 christos #define ACPI_WAET_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WAET,f) 117 1.5 christos #define ACPI_WDAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDAT,f) 118 1.5 christos #define ACPI_WDDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDDT,f) 119 1.5 christos #define ACPI_WDRT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDRT,f) 120 1.1 jruoho 121 1.1 jruoho /* Subtables */ 122 1.1 jruoho 123 1.5 christos #define ACPI_ASF0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_INFO,f) 124 1.5 christos #define ACPI_ASF1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT,f) 125 1.5 christos #define ACPI_ASF1a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) 126 1.5 christos #define ACPI_ASF2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_REMOTE,f) 127 1.5 christos #define ACPI_ASF2a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) 128 1.5 christos #define ACPI_ASF3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_RMCP,f) 129 1.5 christos #define ACPI_ASF4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) 130 1.5 christos #define ACPI_CPEP0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CPEP_POLLING,f) 131 1.5 christos #define ACPI_CSRT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_GROUP,f) 132 1.5 christos #define ACPI_CSRT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_SHARED_INFO,f) 133 1.5 christos #define ACPI_CSRT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_DESCRIPTOR,f) 134 1.5 christos #define ACPI_DBG20_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DBG2_DEVICE,f) 135 1.5 christos #define ACPI_DMARS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) 136 1.5 christos #define ACPI_DMAR0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) 137 1.5 christos #define ACPI_DMAR1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) 138 1.5 christos #define ACPI_DMAR2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_ATSR,f) 139 1.5 christos #define ACPI_DMAR3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_RHSA,f) 140 1.6 christos #define ACPI_DMAR4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_ANDD,f) 141 1.5 christos #define ACPI_EINJ0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 142 1.5 christos #define ACPI_ERST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 143 1.5 christos #define ACPI_FPDTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f) 144 1.5 christos #define ACPI_FPDT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_BOOT,f) 145 1.5 christos #define ACPI_FPDT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_S3PT_PTR,f) 146 1.6 christos #define ACPI_GTDT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_TIMER_BLOCK,f) 147 1.6 christos #define ACPI_GTDT0a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_TIMER_ENTRY,f) 148 1.6 christos #define ACPI_GTDT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_WATCHDOG,f) 149 1.6 christos #define ACPI_GTDTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_HEADER,f) 150 1.5 christos #define ACPI_HEST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f) 151 1.5 christos #define ACPI_HEST1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f) 152 1.5 christos #define ACPI_HEST2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_NMI,f) 153 1.5 christos #define ACPI_HEST6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f) 154 1.5 christos #define ACPI_HEST7_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER,f) 155 1.5 christos #define ACPI_HEST8_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f) 156 1.5 christos #define ACPI_HEST9_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC,f) 157 1.5 christos #define ACPI_HESTN_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_NOTIFY,f) 158 1.5 christos #define ACPI_HESTB_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f) 159 1.5 christos #define ACPI_IVRSH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_HEADER,f) 160 1.5 christos #define ACPI_IVRS0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f) 161 1.5 christos #define ACPI_IVRS1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_MEMORY,f) 162 1.5 christos #define ACPI_IVRSD_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f) 163 1.5 christos #define ACPI_IVRS8A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f) 164 1.5 christos #define ACPI_IVRS8B_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f) 165 1.5 christos #define ACPI_IVRS8C_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f) 166 1.6 christos #define ACPI_LPITH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_LPIT_HEADER,f) 167 1.6 christos #define ACPI_LPIT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_LPIT_NATIVE,f) 168 1.6 christos #define ACPI_LPIT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_LPIT_IO,f) 169 1.5 christos #define ACPI_MADT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) 170 1.5 christos #define ACPI_MADT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) 171 1.5 christos #define ACPI_MADT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) 172 1.5 christos #define ACPI_MADT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) 173 1.5 christos #define ACPI_MADT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) 174 1.5 christos #define ACPI_MADT5_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) 175 1.5 christos #define ACPI_MADT6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) 176 1.5 christos #define ACPI_MADT7_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) 177 1.5 christos #define ACPI_MADT8_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) 178 1.5 christos #define ACPI_MADT9_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f) 179 1.5 christos #define ACPI_MADT10_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f) 180 1.5 christos #define ACPI_MADT11_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f) 181 1.5 christos #define ACPI_MADT12_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_DISTRIBUTOR,f) 182 1.6 christos #define ACPI_MADT13_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f) 183 1.6 christos #define ACPI_MADT14_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_REDISTRIBUTOR,f) 184 1.5 christos #define ACPI_MADTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 185 1.5 christos #define ACPI_MCFG0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) 186 1.5 christos #define ACPI_MPST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_NODE,f) 187 1.5 christos #define ACPI_MPST0A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_STATE,f) 188 1.5 christos #define ACPI_MPST0B_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_COMPONENT,f) 189 1.5 christos #define ACPI_MPST1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_DATA_HDR,f) 190 1.5 christos #define ACPI_MPST2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_DATA,f) 191 1.5 christos #define ACPI_MSCT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f) 192 1.5 christos #define ACPI_MTMR0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MTMR_ENTRY,f) 193 1.5 christos #define ACPI_PCCT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_SUBSPACE,f) 194 1.6 christos #define ACPI_PCCT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_HW_REDUCED,f) 195 1.5 christos #define ACPI_PMTT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_SOCKET,f) 196 1.5 christos #define ACPI_PMTT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_CONTROLLER,f) 197 1.5 christos #define ACPI_PMTT1A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_DOMAIN,f) 198 1.5 christos #define ACPI_PMTT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_PHYSICAL_COMPONENT,f) 199 1.5 christos #define ACPI_PMTTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_HEADER,f) 200 1.5 christos #define ACPI_S3PTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_S3PT_HEADER,f) 201 1.5 christos #define ACPI_S3PT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_S3PT_RESUME,f) 202 1.5 christos #define ACPI_S3PT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_S3PT_SUSPEND,f) 203 1.5 christos #define ACPI_SLICH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SLIC_HEADER,f) 204 1.5 christos #define ACPI_SLIC0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SLIC_KEY,f) 205 1.5 christos #define ACPI_SLIC1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SLIC_MARKER,f) 206 1.5 christos #define ACPI_SRATH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 207 1.5 christos #define ACPI_SRAT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) 208 1.5 christos #define ACPI_SRAT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) 209 1.5 christos #define ACPI_SRAT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f) 210 1.6 christos #define ACPI_SRAT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_GICC_AFFINITY,f) 211 1.5 christos #define ACPI_VRTC0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_VRTC_ENTRY,f) 212 1.5 christos #define ACPI_WDAT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WDAT_ENTRY,f) 213 1.1 jruoho 214 1.1 jruoho /* 215 1.1 jruoho * Simplify access to flag fields by breaking them up into bytes 216 1.1 jruoho */ 217 1.5 christos #define ACPI_FLAG_OFFSET(d,f,o) (UINT16) (ACPI_OFFSET (d,f) + o) 218 1.1 jruoho 219 1.1 jruoho /* Flags */ 220 1.1 jruoho 221 1.1 jruoho #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) 222 1.1 jruoho #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) 223 1.1 jruoho #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) 224 1.1 jruoho #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) 225 1.1 jruoho #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) 226 1.1 jruoho #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o) 227 1.6 christos #define ACPI_SRAT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_GICC_AFFINITY,f,o) 228 1.5 christos #define ACPI_GTDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_GTDT,f,o) 229 1.6 christos #define ACPI_GTDT0a_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_GTDT_TIMER_ENTRY,f,o) 230 1.6 christos #define ACPI_GTDT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_GTDT_WATCHDOG,f,o) 231 1.6 christos #define ACPI_LPITH_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_LPIT_HEADER,f,o) 232 1.1 jruoho #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) 233 1.1 jruoho #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) 234 1.1 jruoho #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) 235 1.1 jruoho #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) 236 1.1 jruoho #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) 237 1.1 jruoho #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) 238 1.1 jruoho #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) 239 1.1 jruoho #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o) 240 1.1 jruoho #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o) 241 1.5 christos #define ACPI_MADT11_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f,o) 242 1.6 christos #define ACPI_MADT13_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f,o) 243 1.5 christos #define ACPI_MPST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MPST_POWER_NODE,f,o) 244 1.5 christos #define ACPI_MPST2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MPST_POWER_DATA,f,o) 245 1.5 christos #define ACPI_PCCT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_PCCT,f,o) 246 1.6 christos #define ACPI_PCCT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PCCT_HW_REDUCED,f,o) 247 1.5 christos #define ACPI_PMTTH_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PMTT_HEADER,f,o) 248 1.3 jruoho #define ACPI_WDDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o) 249 1.3 jruoho #define ACPI_EINJ0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) 250 1.3 jruoho #define ACPI_ERST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) 251 1.3 jruoho #define ACPI_HEST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o) 252 1.3 jruoho #define ACPI_HEST1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o) 253 1.3 jruoho #define ACPI_HEST6_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o) 254 1.1 jruoho 255 1.1 jruoho /* 256 1.1 jruoho * Required terminator for all tables below 257 1.1 jruoho */ 258 1.1 jruoho #define ACPI_DMT_TERMINATOR {ACPI_DMT_EXIT, 0, NULL, 0} 259 1.5 christos #define ACPI_DMT_NEW_LINE {ACPI_DMT_EXTRA_TEXT, 0, "\n", 0} 260 1.1 jruoho 261 1.1 jruoho 262 1.1 jruoho /* 263 1.1 jruoho * ACPI Table Information, used to dump formatted ACPI tables 264 1.1 jruoho * 265 1.1 jruoho * Each entry is of the form: <Field Type, Field Offset, Field Name> 266 1.1 jruoho */ 267 1.1 jruoho 268 1.1 jruoho /******************************************************************************* 269 1.1 jruoho * 270 1.1 jruoho * Common ACPI table header 271 1.1 jruoho * 272 1.1 jruoho ******************************************************************************/ 273 1.1 jruoho 274 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = 275 1.1 jruoho { 276 1.1 jruoho {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature", 0}, 277 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length", DT_LENGTH}, 278 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision", 0}, 279 1.1 jruoho {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum", 0}, 280 1.1 jruoho {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID", 0}, 281 1.1 jruoho {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID", 0}, 282 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision", 0}, 283 1.1 jruoho {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID", 0}, 284 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision", 0}, 285 1.1 jruoho ACPI_DMT_TERMINATOR 286 1.1 jruoho }; 287 1.1 jruoho 288 1.1 jruoho 289 1.1 jruoho /******************************************************************************* 290 1.1 jruoho * 291 1.1 jruoho * GAS - Generic Address Structure 292 1.1 jruoho * 293 1.1 jruoho ******************************************************************************/ 294 1.1 jruoho 295 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = 296 1.1 jruoho { 297 1.1 jruoho {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID", 0}, 298 1.1 jruoho {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width", 0}, 299 1.1 jruoho {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset", 0}, 300 1.3 jruoho {ACPI_DMT_ACCWIDTH, ACPI_GAS_OFFSET (AccessWidth), "Encoded Access Width", 0}, 301 1.1 jruoho {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address", 0}, 302 1.1 jruoho ACPI_DMT_TERMINATOR 303 1.1 jruoho }; 304 1.1 jruoho 305 1.1 jruoho 306 1.1 jruoho /******************************************************************************* 307 1.1 jruoho * 308 1.1 jruoho * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 309 1.1 jruoho * 310 1.1 jruoho ******************************************************************************/ 311 1.1 jruoho 312 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = 313 1.1 jruoho { 314 1.1 jruoho {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature", 0}, 315 1.1 jruoho {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum", 0}, 316 1.1 jruoho {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID", 0}, 317 1.1 jruoho {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision", 0}, 318 1.1 jruoho {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address", 0}, 319 1.1 jruoho ACPI_DMT_TERMINATOR 320 1.1 jruoho }; 321 1.1 jruoho 322 1.1 jruoho /* ACPI 2.0+ Extensions */ 323 1.1 jruoho 324 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = 325 1.1 jruoho { 326 1.1 jruoho {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length", DT_LENGTH}, 327 1.1 jruoho {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address", 0}, 328 1.1 jruoho {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum", 0}, 329 1.1 jruoho {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved", 0}, 330 1.1 jruoho ACPI_DMT_TERMINATOR 331 1.1 jruoho }; 332 1.1 jruoho 333 1.1 jruoho 334 1.1 jruoho /******************************************************************************* 335 1.1 jruoho * 336 1.1 jruoho * FACS - Firmware ACPI Control Structure 337 1.1 jruoho * 338 1.1 jruoho ******************************************************************************/ 339 1.1 jruoho 340 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = 341 1.1 jruoho { 342 1.1 jruoho {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature", 0}, 343 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length", DT_LENGTH}, 344 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature", 0}, 345 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector", 0}, 346 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock", 0}, 347 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 348 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present", 0}, 349 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)", 0}, 350 1.1 jruoho {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector", 0}, 351 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version", 0}, 352 1.1 jruoho {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved", 0}, 353 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)", DT_FLAG}, 354 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)", 0}, 355 1.1 jruoho ACPI_DMT_TERMINATOR 356 1.1 jruoho }; 357 1.1 jruoho 358 1.1 jruoho 359 1.1 jruoho /******************************************************************************* 360 1.1 jruoho * 361 1.1 jruoho * FADT - Fixed ACPI Description Table (Signature is FACP) 362 1.1 jruoho * 363 1.1 jruoho ******************************************************************************/ 364 1.1 jruoho 365 1.1 jruoho /* ACPI 1.0 FADT (Version 1) */ 366 1.1 jruoho 367 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = 368 1.1 jruoho { 369 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address", 0}, 370 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address", DT_NON_ZERO}, 371 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model", 0}, 372 1.1 jruoho {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile", 0}, 373 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt", 0}, 374 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port", 0}, 375 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value", 0}, 376 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value", 0}, 377 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command", 0}, 378 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control", 0}, 379 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address", 0}, 380 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address", 0}, 381 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address", 0}, 382 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address", 0}, 383 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address", 0}, 384 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address", 0}, 385 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address", 0}, 386 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address", 0}, 387 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length", 0}, 388 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length", 0}, 389 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length", 0}, 390 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length", 0}, 391 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length", 0}, 392 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length", 0}, 393 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset", 0}, 394 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support", 0}, 395 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0}, 396 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0}, 397 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size", 0}, 398 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride", 0}, 399 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset", 0}, 400 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width", 0}, 401 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index", 0}, 402 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index", 0}, 403 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index", 0}, 404 1.1 jruoho {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)", DT_FLAG}, 405 1.1 jruoho 406 1.1 jruoho /* Boot Architecture Flags byte 0 */ 407 1.1 jruoho 408 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)", 0}, 409 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)", 0}, 410 1.1 jruoho {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)", 0}, 411 1.1 jruoho {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)", 0}, 412 1.1 jruoho {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)", 0}, 413 1.5 christos {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "CMOS RTC Not Present (V5)", 0}, 414 1.1 jruoho 415 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved", 0}, 416 1.1 jruoho {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 417 1.1 jruoho 418 1.1 jruoho /* Flags byte 0 */ 419 1.1 jruoho 420 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)", 0}, 421 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)", 0}, 422 1.1 jruoho {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)", 0}, 423 1.1 jruoho {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)", 0}, 424 1.1 jruoho {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)", 0}, 425 1.1 jruoho {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)", 0}, 426 1.1 jruoho {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)", 0}, 427 1.1 jruoho {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)", 0}, 428 1.1 jruoho 429 1.1 jruoho /* Flags byte 1 */ 430 1.1 jruoho 431 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)", 0}, 432 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)", 0}, 433 1.1 jruoho {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)", 0}, 434 1.1 jruoho {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)", 0}, 435 1.1 jruoho {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)", 0}, 436 1.1 jruoho {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)", 0}, 437 1.1 jruoho {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)", 0}, 438 1.1 jruoho {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)", 0}, 439 1.1 jruoho 440 1.1 jruoho /* Flags byte 2 */ 441 1.1 jruoho 442 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)", 0}, 443 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)", 0}, 444 1.1 jruoho {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)", 0}, 445 1.1 jruoho {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)", 0}, 446 1.5 christos {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,2), "Hardware Reduced (V5)", 0}, 447 1.5 christos {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,2), "Low Power S0 Idle (V5)", 0}, 448 1.1 jruoho ACPI_DMT_TERMINATOR 449 1.1 jruoho }; 450 1.1 jruoho 451 1.1 jruoho /* ACPI 1.0 MS Extensions (FADT version 2) */ 452 1.1 jruoho 453 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = 454 1.1 jruoho { 455 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, 456 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, 457 1.6 christos {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (ArmBootFlags), "Reserved", 0}, 458 1.6 christos {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MinorRevision), "Reserved", 0}, 459 1.1 jruoho ACPI_DMT_TERMINATOR 460 1.1 jruoho }; 461 1.1 jruoho 462 1.6 christos /* ACPI 2.0+ Extensions (FADT version 3, 4, and 5) */ 463 1.1 jruoho 464 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] = 465 1.1 jruoho { 466 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, 467 1.1 jruoho {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, 468 1.6 christos {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (ArmBootFlags), "ARM Flags (decoded below)", DT_FLAG}, 469 1.6 christos {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET(ArmBootFlags,0), "PSCI Compliant", 0}, 470 1.6 christos {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET(ArmBootFlags,0), "Must use HVC for PSCI", 0}, 471 1.6 christos ACPI_DMT_NEW_LINE, 472 1.6 christos {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MinorRevision), "FADT Minor Revision", 0}, 473 1.1 jruoho {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address", 0}, 474 1.1 jruoho {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address", 0}, 475 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block", 0}, 476 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block", 0}, 477 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block", 0}, 478 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block", 0}, 479 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block", 0}, 480 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block", 0}, 481 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block", 0}, 482 1.1 jruoho {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block", 0}, 483 1.1 jruoho ACPI_DMT_TERMINATOR 484 1.1 jruoho }; 485 1.1 jruoho 486 1.5 christos /* ACPI 5.0 Extensions (FADT version 5) */ 487 1.5 christos 488 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoFadt5[] = 489 1.5 christos { 490 1.5 christos {ACPI_DMT_GAS, ACPI_FADT_OFFSET (SleepControl), "Sleep Control Register", 0}, 491 1.5 christos {ACPI_DMT_GAS, ACPI_FADT_OFFSET (SleepStatus), "Sleep Status Register", 0}, 492 1.5 christos ACPI_DMT_TERMINATOR 493 1.5 christos }; 494 1.5 christos 495 1.1 jruoho 496 1.1 jruoho /* 497 1.1 jruoho * Remaining tables are not consumed directly by the ACPICA subsystem 498 1.1 jruoho */ 499 1.1 jruoho 500 1.1 jruoho /******************************************************************************* 501 1.1 jruoho * 502 1.1 jruoho * ASF - Alert Standard Format table (Signature "ASF!") 503 1.1 jruoho * 504 1.1 jruoho ******************************************************************************/ 505 1.1 jruoho 506 1.1 jruoho /* Common Subtable header (one per Subtable) */ 507 1.1 jruoho 508 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 509 1.1 jruoho { 510 1.1 jruoho {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0}, 511 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0}, 512 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH}, 513 1.1 jruoho ACPI_DMT_TERMINATOR 514 1.1 jruoho }; 515 1.1 jruoho 516 1.1 jruoho /* 0: ASF Information */ 517 1.1 jruoho 518 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 519 1.1 jruoho { 520 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0}, 521 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0}, 522 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0}, 523 1.1 jruoho {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0}, 524 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0}, 525 1.1 jruoho {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0}, 526 1.1 jruoho ACPI_DMT_TERMINATOR 527 1.1 jruoho }; 528 1.1 jruoho 529 1.1 jruoho /* 1: ASF Alerts */ 530 1.1 jruoho 531 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 532 1.1 jruoho { 533 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0}, 534 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0}, 535 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0}, 536 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0}, 537 1.1 jruoho ACPI_DMT_TERMINATOR 538 1.1 jruoho }; 539 1.1 jruoho 540 1.1 jruoho /* 1a: ASF Alert data */ 541 1.1 jruoho 542 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 543 1.1 jruoho { 544 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0}, 545 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0}, 546 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0}, 547 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0}, 548 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0}, 549 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0}, 550 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0}, 551 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0}, 552 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0}, 553 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0}, 554 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0}, 555 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0}, 556 1.1 jruoho ACPI_DMT_TERMINATOR 557 1.1 jruoho }; 558 1.1 jruoho 559 1.1 jruoho /* 2: ASF Remote Control */ 560 1.1 jruoho 561 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 562 1.1 jruoho { 563 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0}, 564 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0}, 565 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0}, 566 1.1 jruoho ACPI_DMT_TERMINATOR 567 1.1 jruoho }; 568 1.1 jruoho 569 1.1 jruoho /* 2a: ASF Control data */ 570 1.1 jruoho 571 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 572 1.1 jruoho { 573 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0}, 574 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0}, 575 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0}, 576 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0}, 577 1.1 jruoho ACPI_DMT_TERMINATOR 578 1.1 jruoho }; 579 1.1 jruoho 580 1.1 jruoho /* 3: ASF RMCP Boot Options */ 581 1.1 jruoho 582 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 583 1.1 jruoho { 584 1.3 jruoho {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0}, 585 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0}, 586 1.1 jruoho {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0}, 587 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0}, 588 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0}, 589 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0}, 590 1.1 jruoho {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0}, 591 1.1 jruoho ACPI_DMT_TERMINATOR 592 1.1 jruoho }; 593 1.1 jruoho 594 1.1 jruoho /* 4: ASF Address */ 595 1.1 jruoho 596 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 597 1.1 jruoho { 598 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0}, 599 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT}, 600 1.1 jruoho ACPI_DMT_TERMINATOR 601 1.1 jruoho }; 602 1.1 jruoho 603 1.1 jruoho 604 1.1 jruoho /******************************************************************************* 605 1.1 jruoho * 606 1.1 jruoho * BERT - Boot Error Record table 607 1.1 jruoho * 608 1.1 jruoho ******************************************************************************/ 609 1.1 jruoho 610 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = 611 1.1 jruoho { 612 1.1 jruoho {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0}, 613 1.1 jruoho {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0}, 614 1.1 jruoho ACPI_DMT_TERMINATOR 615 1.1 jruoho }; 616 1.1 jruoho 617 1.1 jruoho 618 1.1 jruoho /******************************************************************************* 619 1.1 jruoho * 620 1.5 christos * BGRT - Boot Graphics Resource Table (ACPI 5.0) 621 1.5 christos * 622 1.5 christos ******************************************************************************/ 623 1.5 christos 624 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoBgrt[] = 625 1.5 christos { 626 1.5 christos {ACPI_DMT_UINT16, ACPI_BGRT_OFFSET (Version), "Version", 0}, 627 1.5 christos {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (Status), "Status", 0}, 628 1.5 christos {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (ImageType), "Image Type", 0}, 629 1.5 christos {ACPI_DMT_UINT64, ACPI_BGRT_OFFSET (ImageAddress), "Image Address", 0}, 630 1.5 christos {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetX), "Image OffsetX", 0}, 631 1.5 christos {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetY), "Image OffsetY", 0}, 632 1.5 christos ACPI_DMT_TERMINATOR 633 1.5 christos }; 634 1.5 christos 635 1.5 christos 636 1.5 christos /******************************************************************************* 637 1.5 christos * 638 1.1 jruoho * BOOT - Simple Boot Flag Table 639 1.1 jruoho * 640 1.1 jruoho ******************************************************************************/ 641 1.1 jruoho 642 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 643 1.1 jruoho { 644 1.1 jruoho {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0}, 645 1.1 jruoho {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0}, 646 1.1 jruoho ACPI_DMT_TERMINATOR 647 1.1 jruoho }; 648 1.1 jruoho 649 1.1 jruoho 650 1.1 jruoho /******************************************************************************* 651 1.1 jruoho * 652 1.1 jruoho * CPEP - Corrected Platform Error Polling table 653 1.1 jruoho * 654 1.1 jruoho ******************************************************************************/ 655 1.1 jruoho 656 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 657 1.1 jruoho { 658 1.1 jruoho {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0}, 659 1.1 jruoho ACPI_DMT_TERMINATOR 660 1.1 jruoho }; 661 1.1 jruoho 662 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 663 1.1 jruoho { 664 1.1 jruoho {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0}, 665 1.1 jruoho {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH}, 666 1.1 jruoho {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0}, 667 1.1 jruoho {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0}, 668 1.1 jruoho {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0}, 669 1.1 jruoho ACPI_DMT_TERMINATOR 670 1.1 jruoho }; 671 1.1 jruoho 672 1.1 jruoho 673 1.1 jruoho /******************************************************************************* 674 1.1 jruoho * 675 1.5 christos * CSRT - Core System Resource Table 676 1.5 christos * 677 1.5 christos ******************************************************************************/ 678 1.5 christos 679 1.5 christos /* Main table consists only of the standard ACPI table header */ 680 1.5 christos 681 1.5 christos /* Resource Group subtable */ 682 1.5 christos 683 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt0[] = 684 1.5 christos { 685 1.5 christos {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (Length), "Length", 0}, 686 1.5 christos {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (VendorId), "Vendor ID", 0}, 687 1.5 christos {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SubvendorId), "Subvendor ID", 0}, 688 1.5 christos {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (DeviceId), "Device ID", 0}, 689 1.5 christos {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (SubdeviceId), "Subdevice ID", 0}, 690 1.5 christos {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Revision), "Revision", 0}, 691 1.5 christos {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Reserved), "Reserved", 0}, 692 1.5 christos {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SharedInfoLength), "Shared Info Length", 0}, 693 1.5 christos ACPI_DMT_TERMINATOR 694 1.5 christos }; 695 1.5 christos 696 1.5 christos /* Shared Info subtable */ 697 1.5 christos 698 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt1[] = 699 1.5 christos { 700 1.5 christos {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MajorVersion), "Major Version", 0}, 701 1.5 christos {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MinorVersion), "Minor Version", 0}, 702 1.5 christos {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseLow), "MMIO Base Address Low", 0}, 703 1.5 christos {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseHigh), "MMIO Base Address High", 0}, 704 1.5 christos {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (GsiInterrupt), "GSI Interrupt", 0}, 705 1.5 christos {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptPolarity), "Interrupt Polarity", 0}, 706 1.5 christos {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptMode), "Interrupt Mode", 0}, 707 1.5 christos {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (NumChannels), "Num Channels", 0}, 708 1.5 christos {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (DmaAddressWidth), "DMA Address Width", 0}, 709 1.5 christos {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (BaseRequestLine), "Base Request Line", 0}, 710 1.5 christos {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (NumHandshakeSignals), "Num Handshake Signals", 0}, 711 1.5 christos {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MaxBlockSize), "Max Block Size", 0}, 712 1.5 christos ACPI_DMT_TERMINATOR 713 1.5 christos }; 714 1.5 christos 715 1.5 christos 716 1.5 christos /* Resource Descriptor subtable */ 717 1.5 christos 718 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2[] = 719 1.5 christos { 720 1.5 christos {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Length), "Length", 0}, 721 1.5 christos {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Type), "Type", 0}, 722 1.5 christos {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Subtype), "Subtype", 0}, 723 1.5 christos {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Uid), "UID", 0}, 724 1.5 christos ACPI_DMT_TERMINATOR 725 1.5 christos }; 726 1.5 christos 727 1.5 christos 728 1.5 christos /******************************************************************************* 729 1.5 christos * 730 1.5 christos * DBG2 - Debug Port Table 2 731 1.5 christos * 732 1.5 christos ******************************************************************************/ 733 1.5 christos 734 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2[] = 735 1.5 christos { 736 1.5 christos {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoOffset), "Info Offset", 0}, 737 1.5 christos {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoCount), "Info Count", 0}, 738 1.5 christos ACPI_DMT_TERMINATOR 739 1.5 christos }; 740 1.5 christos 741 1.5 christos /* Debug Device Information Subtable */ 742 1.5 christos 743 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Device[] = 744 1.5 christos { 745 1.5 christos {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (Revision), "Revision", 0}, 746 1.5 christos {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Length), "Length", DT_LENGTH}, 747 1.5 christos {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (RegisterCount), "Register Count", 0}, 748 1.5 christos {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathLength), "Namepath Length", 0}, 749 1.5 christos {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathOffset), "Namepath Offset", 0}, 750 1.5 christos {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataLength), "OEM Data Length", DT_DESCRIBES_OPTIONAL}, 751 1.5 christos {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataOffset), "OEM Data Offset", DT_DESCRIBES_OPTIONAL}, 752 1.5 christos {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortType), "Port Type", 0}, 753 1.5 christos {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortSubtype), "Port Subtype", 0}, 754 1.5 christos {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Reserved), "Reserved", 0}, 755 1.5 christos {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (BaseAddressOffset), "Base Address Offset", 0}, 756 1.5 christos {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (AddressSizeOffset), "Address Size Offset", 0}, 757 1.5 christos ACPI_DMT_TERMINATOR 758 1.5 christos }; 759 1.5 christos 760 1.5 christos /* Variable-length data for the subtable */ 761 1.5 christos 762 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Addr[] = 763 1.5 christos { 764 1.5 christos {ACPI_DMT_GAS, 0, "Base Address Register", 0}, 765 1.5 christos ACPI_DMT_TERMINATOR 766 1.5 christos }; 767 1.5 christos 768 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Size[] = 769 1.5 christos { 770 1.5 christos {ACPI_DMT_UINT32, 0, "Address Size", 0}, 771 1.5 christos ACPI_DMT_TERMINATOR 772 1.5 christos }; 773 1.5 christos 774 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Name[] = 775 1.5 christos { 776 1.5 christos {ACPI_DMT_STRING, 0, "Namepath", 0}, 777 1.5 christos ACPI_DMT_TERMINATOR 778 1.5 christos }; 779 1.5 christos 780 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2OemData[] = 781 1.5 christos { 782 1.5 christos {ACPI_DMT_BUFFER, 0, "OEM Data", DT_OPTIONAL}, 783 1.5 christos ACPI_DMT_TERMINATOR 784 1.5 christos }; 785 1.5 christos 786 1.5 christos 787 1.5 christos /******************************************************************************* 788 1.5 christos * 789 1.1 jruoho * DBGP - Debug Port 790 1.1 jruoho * 791 1.1 jruoho ******************************************************************************/ 792 1.1 jruoho 793 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 794 1.1 jruoho { 795 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0}, 796 1.1 jruoho {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0}, 797 1.1 jruoho {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0}, 798 1.1 jruoho ACPI_DMT_TERMINATOR 799 1.1 jruoho }; 800 1.1 jruoho 801 1.1 jruoho 802 1.1 jruoho /******************************************************************************* 803 1.1 jruoho * 804 1.1 jruoho * DMAR - DMA Remapping table 805 1.1 jruoho * 806 1.1 jruoho ******************************************************************************/ 807 1.1 jruoho 808 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 809 1.1 jruoho { 810 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0}, 811 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0}, 812 1.5 christos {ACPI_DMT_BUF10, ACPI_DMAR_OFFSET (Reserved[0]), "Reserved", 0}, 813 1.1 jruoho ACPI_DMT_TERMINATOR 814 1.1 jruoho }; 815 1.1 jruoho 816 1.1 jruoho /* Common Subtable header (one per Subtable) */ 817 1.1 jruoho 818 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 819 1.1 jruoho { 820 1.1 jruoho {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0}, 821 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH}, 822 1.1 jruoho ACPI_DMT_TERMINATOR 823 1.1 jruoho }; 824 1.1 jruoho 825 1.1 jruoho /* Common device scope entry */ 826 1.1 jruoho 827 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 828 1.1 jruoho { 829 1.6 christos {ACPI_DMT_DMAR_SCOPE, ACPI_DMARS_OFFSET (EntryType), "Device Scope Type", 0}, 830 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH}, 831 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0}, 832 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0}, 833 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0}, 834 1.1 jruoho ACPI_DMT_TERMINATOR 835 1.1 jruoho }; 836 1.1 jruoho 837 1.1 jruoho /* DMAR Subtables */ 838 1.1 jruoho 839 1.1 jruoho /* 0: Hardware Unit Definition */ 840 1.1 jruoho 841 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 842 1.1 jruoho { 843 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0}, 844 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0}, 845 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0}, 846 1.1 jruoho {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0}, 847 1.1 jruoho ACPI_DMT_TERMINATOR 848 1.1 jruoho }; 849 1.1 jruoho 850 1.1 jruoho /* 1: Reserved Memory Definition */ 851 1.1 jruoho 852 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 853 1.1 jruoho { 854 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0}, 855 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0}, 856 1.1 jruoho {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0}, 857 1.1 jruoho {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0}, 858 1.1 jruoho ACPI_DMT_TERMINATOR 859 1.1 jruoho }; 860 1.1 jruoho 861 1.1 jruoho /* 2: Root Port ATS Capability Definition */ 862 1.1 jruoho 863 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = 864 1.1 jruoho { 865 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0}, 866 1.1 jruoho {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0}, 867 1.1 jruoho {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0}, 868 1.1 jruoho ACPI_DMT_TERMINATOR 869 1.1 jruoho }; 870 1.1 jruoho 871 1.1 jruoho /* 3: Remapping Hardware Static Affinity Structure */ 872 1.1 jruoho 873 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = 874 1.1 jruoho { 875 1.1 jruoho {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0}, 876 1.1 jruoho {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0}, 877 1.1 jruoho {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0}, 878 1.1 jruoho ACPI_DMT_TERMINATOR 879 1.1 jruoho }; 880 1.1 jruoho 881 1.6 christos /* 4: ACPI Namespace Device Declaration Structure */ 882 1.6 christos 883 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoDmar4[] = 884 1.6 christos { 885 1.6 christos {ACPI_DMT_UINT24, ACPI_DMAR4_OFFSET (Reserved[0]), "Reserved", 0}, 886 1.6 christos {ACPI_DMT_UINT8, ACPI_DMAR4_OFFSET (DeviceNumber), "Device Number", 0}, 887 1.6 christos {ACPI_DMT_STRING, ACPI_DMAR4_OFFSET (DeviceName[0]), "Device Name", 0}, 888 1.6 christos ACPI_DMT_TERMINATOR 889 1.6 christos }; 890 1.6 christos 891 1.1 jruoho 892 1.1 jruoho /******************************************************************************* 893 1.1 jruoho * 894 1.5 christos * DRTM - Dynamic Root of Trust for Measurement table 895 1.5 christos * 896 1.5 christos ******************************************************************************/ 897 1.5 christos 898 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm[] = 899 1.5 christos { 900 1.5 christos 901 1.5 christos ACPI_DMT_TERMINATOR 902 1.5 christos }; 903 1.5 christos 904 1.5 christos 905 1.5 christos /******************************************************************************* 906 1.5 christos * 907 1.1 jruoho * ECDT - Embedded Controller Boot Resources Table 908 1.1 jruoho * 909 1.1 jruoho ******************************************************************************/ 910 1.1 jruoho 911 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 912 1.1 jruoho { 913 1.1 jruoho {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0}, 914 1.1 jruoho {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0}, 915 1.1 jruoho {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0}, 916 1.1 jruoho {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0}, 917 1.1 jruoho {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0}, 918 1.1 jruoho ACPI_DMT_TERMINATOR 919 1.1 jruoho }; 920 1.1 jruoho 921 1.1 jruoho 922 1.1 jruoho /******************************************************************************* 923 1.1 jruoho * 924 1.1 jruoho * EINJ - Error Injection table 925 1.1 jruoho * 926 1.1 jruoho ******************************************************************************/ 927 1.1 jruoho 928 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = 929 1.1 jruoho { 930 1.3 jruoho {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0}, 931 1.1 jruoho {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0}, 932 1.1 jruoho {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0}, 933 1.1 jruoho {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0}, 934 1.1 jruoho ACPI_DMT_TERMINATOR 935 1.1 jruoho }; 936 1.1 jruoho 937 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = 938 1.1 jruoho { 939 1.3 jruoho {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0}, 940 1.3 jruoho {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0}, 941 1.3 jruoho {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 942 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 943 1.3 jruoho 944 1.1 jruoho {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0}, 945 1.1 jruoho {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0}, 946 1.1 jruoho {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0}, 947 1.1 jruoho {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0}, 948 1.1 jruoho ACPI_DMT_TERMINATOR 949 1.1 jruoho }; 950 1.1 jruoho 951 1.1 jruoho 952 1.1 jruoho /******************************************************************************* 953 1.1 jruoho * 954 1.1 jruoho * ERST - Error Record Serialization table 955 1.1 jruoho * 956 1.1 jruoho ******************************************************************************/ 957 1.1 jruoho 958 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = 959 1.1 jruoho { 960 1.3 jruoho {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0}, 961 1.1 jruoho {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0}, 962 1.1 jruoho {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0}, 963 1.1 jruoho ACPI_DMT_TERMINATOR 964 1.1 jruoho }; 965 1.1 jruoho 966 1.3 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] = 967 1.3 jruoho { 968 1.3 jruoho {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0}, 969 1.3 jruoho {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0}, 970 1.3 jruoho {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 971 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 972 1.3 jruoho 973 1.3 jruoho {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0}, 974 1.3 jruoho {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0}, 975 1.3 jruoho {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0}, 976 1.3 jruoho {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0}, 977 1.3 jruoho ACPI_DMT_TERMINATOR 978 1.3 jruoho }; 979 1.3 jruoho 980 1.1 jruoho 981 1.1 jruoho /******************************************************************************* 982 1.1 jruoho * 983 1.5 christos * FPDT - Firmware Performance Data Table (ACPI 5.0) 984 1.5 christos * 985 1.5 christos ******************************************************************************/ 986 1.5 christos 987 1.5 christos /* Main table consists of only the standard ACPI header - subtables follow */ 988 1.5 christos 989 1.5 christos /* FPDT subtable header */ 990 1.5 christos 991 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoFpdtHdr[] = 992 1.5 christos { 993 1.5 christos {ACPI_DMT_UINT16, ACPI_FPDTH_OFFSET (Type), "Subtable Type", 0}, 994 1.5 christos {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Length), "Length", DT_LENGTH}, 995 1.5 christos {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Revision), "Revision", 0}, 996 1.5 christos ACPI_DMT_TERMINATOR 997 1.5 christos }; 998 1.5 christos 999 1.5 christos /* 0: Firmware Basic Boot Performance Record */ 1000 1.5 christos 1001 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt0[] = 1002 1.5 christos { 1003 1.5 christos {ACPI_DMT_UINT32, ACPI_FPDT0_OFFSET (Reserved), "Reserved", 0}, 1004 1.5 christos {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ResetEnd), "Reset End", 0}, 1005 1.5 christos {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (LoadStart), "Load Image Start", 0}, 1006 1.5 christos {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (StartupStart), "Start Image Start", 0}, 1007 1.5 christos {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesEntry), "Exit Services Entry", 0}, 1008 1.5 christos {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesExit), "Exit Services Exit", 0}, 1009 1.5 christos ACPI_DMT_TERMINATOR 1010 1.5 christos }; 1011 1.5 christos 1012 1.5 christos /* 1: S3 Performance Table Pointer Record */ 1013 1.5 christos 1014 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt1[] = 1015 1.5 christos { 1016 1.5 christos {ACPI_DMT_UINT32, ACPI_FPDT1_OFFSET (Reserved), "Reserved", 0}, 1017 1.5 christos {ACPI_DMT_UINT64, ACPI_FPDT1_OFFSET (Address), "S3PT Address", 0}, 1018 1.5 christos ACPI_DMT_TERMINATOR 1019 1.5 christos }; 1020 1.5 christos 1021 1.5 christos 1022 1.5 christos /******************************************************************************* 1023 1.5 christos * 1024 1.5 christos * GTDT - Generic Timer Description Table 1025 1.5 christos * 1026 1.5 christos ******************************************************************************/ 1027 1.5 christos 1028 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt[] = 1029 1.5 christos { 1030 1.6 christos {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (CounterBlockAddresss), "Counter Block Address", 0}, 1031 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (Reserved), "Reserved", 0}, 1032 1.5 christos ACPI_DMT_NEW_LINE, 1033 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecureEl1Interrupt), "Secure EL1 Interrupt", 0}, 1034 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecureEl1Flags), "EL1 Flags (decoded below)", DT_FLAG}, 1035 1.6 christos {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Trigger Mode", 0}, 1036 1.6 christos {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Polarity", 0}, 1037 1.6 christos {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Always On", 0}, 1038 1.5 christos ACPI_DMT_NEW_LINE, 1039 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl1Interrupt), "Non-Secure EL1 Interrupt", 0}, 1040 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl1Flags), "NEL1 Flags (decoded below)", DT_FLAG}, 1041 1.6 christos {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Trigger Mode", 0}, 1042 1.6 christos {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Polarity", 0}, 1043 1.6 christos {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Always On", 0}, 1044 1.5 christos ACPI_DMT_NEW_LINE, 1045 1.5 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0}, 1046 1.5 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerFlags), "VT Flags (decoded below)", DT_FLAG}, 1047 1.5 christos {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Trigger Mode", 0}, 1048 1.5 christos {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Polarity", 0}, 1049 1.6 christos {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Always On", 0}, 1050 1.6 christos ACPI_DMT_NEW_LINE, 1051 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl2Interrupt), "Non-Secure EL2 Interrupt", 0}, 1052 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl2Flags), "NEL2 Flags (decoded below)", DT_FLAG}, 1053 1.6 christos {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Trigger Mode", 0}, 1054 1.6 christos {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Polarity", 0}, 1055 1.6 christos {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Always On", 0}, 1056 1.6 christos {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (CounterReadBlockAddress), "Counter Read Block Address", 0}, 1057 1.5 christos ACPI_DMT_NEW_LINE, 1058 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (PlatformTimerCount), "Platform Timer Count", 0}, 1059 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (PlatformTimerOffset), "Platform Timer Offset", 0}, 1060 1.6 christos ACPI_DMT_TERMINATOR 1061 1.6 christos }; 1062 1.6 christos 1063 1.6 christos /* GTDT Subtable header (one per Subtable) */ 1064 1.6 christos 1065 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoGtdtHdr[] = 1066 1.6 christos { 1067 1.6 christos {ACPI_DMT_GTDT, ACPI_GTDTH_OFFSET (Type), "Subtable Type", 0}, 1068 1.6 christos {ACPI_DMT_UINT16, ACPI_GTDTH_OFFSET (Length), "Length", DT_LENGTH}, 1069 1.6 christos ACPI_DMT_TERMINATOR 1070 1.6 christos }; 1071 1.6 christos 1072 1.6 christos /* GTDT Subtables */ 1073 1.6 christos 1074 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt0[] = 1075 1.6 christos { 1076 1.6 christos {ACPI_DMT_UINT8, ACPI_GTDT0_OFFSET (Reserved), "Reserved", 0}, 1077 1.6 christos {ACPI_DMT_UINT64, ACPI_GTDT0_OFFSET (BlockAddress), "Block Address", 0}, 1078 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT0_OFFSET (TimerCount), "Timer Count", 0}, 1079 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT0_OFFSET (TimerOffset), "Timer Offset", 0}, 1080 1.6 christos ACPI_DMT_TERMINATOR 1081 1.6 christos }; 1082 1.6 christos 1083 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt0a[] = 1084 1.6 christos { 1085 1.6 christos {ACPI_DMT_UINT8 , ACPI_GTDT0a_OFFSET (FrameNumber), "Frame Number", 0}, 1086 1.6 christos {ACPI_DMT_UINT24, ACPI_GTDT0a_OFFSET (Reserved[0]), "Reserved", 0}, 1087 1.6 christos {ACPI_DMT_UINT64, ACPI_GTDT0a_OFFSET (BaseAddress), "Base Address", 0}, 1088 1.6 christos {ACPI_DMT_UINT64, ACPI_GTDT0a_OFFSET (El0BaseAddress), "EL0 Base Address", 0}, 1089 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (TimerInterrupt), "Timer Interrupt", 0}, 1090 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (TimerFlags), "Timer Flags (decoded below)", 0}, 1091 1.6 christos {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (TimerFlags,0), "Trigger Mode", 0}, 1092 1.6 christos {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (TimerFlags,0), "Polarity", 0}, 1093 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0}, 1094 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (VirtualTimerFlags), "Virtual Timer Flags (decoded below)", 0}, 1095 1.6 christos {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (VirtualTimerFlags,0), "Trigger Mode", 0}, 1096 1.6 christos {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (VirtualTimerFlags,0), "Polarity", 0}, 1097 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (CommonFlags), "Common Flags (decoded below)", 0}, 1098 1.6 christos {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (CommonFlags,0), "Secure", 0}, 1099 1.6 christos {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (CommonFlags,0), "Always On", 0}, 1100 1.6 christos ACPI_DMT_TERMINATOR 1101 1.6 christos }; 1102 1.6 christos 1103 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt1[] = 1104 1.6 christos { 1105 1.6 christos {ACPI_DMT_UINT8, ACPI_GTDT1_OFFSET (Reserved), "Reserved", 0}, 1106 1.6 christos {ACPI_DMT_UINT64, ACPI_GTDT1_OFFSET (RefreshFrameAddress), "Refresh Frame Address", 0}, 1107 1.6 christos {ACPI_DMT_UINT64, ACPI_GTDT1_OFFSET (ControlFrameAddress), "Control Frame Address", 0}, 1108 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT1_OFFSET (TimerInterrupt), "Timer Interrupt", 0}, 1109 1.6 christos {ACPI_DMT_UINT32, ACPI_GTDT1_OFFSET (TimerFlags), "Timer Flags (decoded below)", DT_FLAG}, 1110 1.6 christos {ACPI_DMT_FLAG0, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Trigger Mode", 0}, 1111 1.6 christos {ACPI_DMT_FLAG1, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Polarity", 0}, 1112 1.6 christos {ACPI_DMT_FLAG2, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Security", 0}, 1113 1.5 christos ACPI_DMT_TERMINATOR 1114 1.5 christos }; 1115 1.5 christos 1116 1.5 christos 1117 1.5 christos /******************************************************************************* 1118 1.5 christos * 1119 1.1 jruoho * HEST - Hardware Error Source table 1120 1.1 jruoho * 1121 1.1 jruoho ******************************************************************************/ 1122 1.1 jruoho 1123 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = 1124 1.1 jruoho { 1125 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0}, 1126 1.1 jruoho ACPI_DMT_TERMINATOR 1127 1.1 jruoho }; 1128 1.1 jruoho 1129 1.1 jruoho /* Common HEST structures for subtables */ 1130 1.1 jruoho 1131 1.1 jruoho #define ACPI_DM_HEST_HEADER \ 1132 1.1 jruoho {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \ 1133 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0} 1134 1.1 jruoho 1135 1.1 jruoho #define ACPI_DM_HEST_AER \ 1136 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \ 1137 1.3 jruoho {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \ 1138 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \ 1139 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \ 1140 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \ 1141 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \ 1142 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \ 1143 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \ 1144 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \ 1145 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \ 1146 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \ 1147 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \ 1148 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \ 1149 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \ 1150 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0} 1151 1.1 jruoho 1152 1.1 jruoho 1153 1.1 jruoho /* HEST Subtables */ 1154 1.1 jruoho 1155 1.1 jruoho /* 0: IA32 Machine Check Exception */ 1156 1.1 jruoho 1157 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = 1158 1.1 jruoho { 1159 1.1 jruoho ACPI_DM_HEST_HEADER, 1160 1.3 jruoho {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0}, 1161 1.3 jruoho {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1162 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 1163 1.3 jruoho 1164 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0}, 1165 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1166 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1167 1.1 jruoho {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0}, 1168 1.1 jruoho {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0}, 1169 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 1170 1.3 jruoho {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0}, 1171 1.1 jruoho ACPI_DMT_TERMINATOR 1172 1.1 jruoho }; 1173 1.1 jruoho 1174 1.1 jruoho /* 1: IA32 Corrected Machine Check */ 1175 1.1 jruoho 1176 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = 1177 1.1 jruoho { 1178 1.1 jruoho ACPI_DM_HEST_HEADER, 1179 1.3 jruoho {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0}, 1180 1.3 jruoho {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1181 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 1182 1.3 jruoho 1183 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0}, 1184 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1185 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1186 1.1 jruoho {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0}, 1187 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 1188 1.3 jruoho {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0}, 1189 1.1 jruoho ACPI_DMT_TERMINATOR 1190 1.1 jruoho }; 1191 1.1 jruoho 1192 1.1 jruoho /* 2: IA32 Non-Maskable Interrupt */ 1193 1.1 jruoho 1194 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = 1195 1.1 jruoho { 1196 1.1 jruoho ACPI_DM_HEST_HEADER, 1197 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0}, 1198 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1199 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1200 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1201 1.1 jruoho ACPI_DMT_TERMINATOR 1202 1.1 jruoho }; 1203 1.1 jruoho 1204 1.1 jruoho /* 6: PCI Express Root Port AER */ 1205 1.1 jruoho 1206 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = 1207 1.1 jruoho { 1208 1.1 jruoho ACPI_DM_HEST_HEADER, 1209 1.1 jruoho ACPI_DM_HEST_AER, 1210 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0}, 1211 1.1 jruoho ACPI_DMT_TERMINATOR 1212 1.1 jruoho }; 1213 1.1 jruoho 1214 1.1 jruoho /* 7: PCI Express AER (AER Endpoint) */ 1215 1.1 jruoho 1216 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = 1217 1.1 jruoho { 1218 1.1 jruoho ACPI_DM_HEST_HEADER, 1219 1.1 jruoho ACPI_DM_HEST_AER, 1220 1.1 jruoho ACPI_DMT_TERMINATOR 1221 1.1 jruoho }; 1222 1.1 jruoho 1223 1.1 jruoho /* 8: PCI Express/PCI-X Bridge AER */ 1224 1.1 jruoho 1225 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = 1226 1.1 jruoho { 1227 1.1 jruoho ACPI_DM_HEST_HEADER, 1228 1.1 jruoho ACPI_DM_HEST_AER, 1229 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0}, 1230 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0}, 1231 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0}, 1232 1.1 jruoho ACPI_DMT_TERMINATOR 1233 1.1 jruoho }; 1234 1.1 jruoho 1235 1.1 jruoho /* 9: Generic Hardware Error Source */ 1236 1.1 jruoho 1237 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = 1238 1.1 jruoho { 1239 1.1 jruoho ACPI_DM_HEST_HEADER, 1240 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0}, 1241 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0}, 1242 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0}, 1243 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1244 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1245 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1246 1.1 jruoho {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, 1247 1.1 jruoho {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0}, 1248 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, 1249 1.1 jruoho ACPI_DMT_TERMINATOR 1250 1.1 jruoho }; 1251 1.1 jruoho 1252 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = 1253 1.1 jruoho { 1254 1.1 jruoho {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0}, 1255 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH}, 1256 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0}, 1257 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0}, 1258 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0}, 1259 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0}, 1260 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0}, 1261 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0}, 1262 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0}, 1263 1.1 jruoho ACPI_DMT_TERMINATOR 1264 1.1 jruoho }; 1265 1.1 jruoho 1266 1.1 jruoho 1267 1.1 jruoho /* 1268 1.1 jruoho * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1269 1.1 jruoho * ACPI_HEST_IA_CORRECTED structures. 1270 1.1 jruoho */ 1271 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = 1272 1.1 jruoho { 1273 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0}, 1274 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0}, 1275 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0}, 1276 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0}, 1277 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0}, 1278 1.1 jruoho {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0}, 1279 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0}, 1280 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0}, 1281 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0}, 1282 1.1 jruoho ACPI_DMT_TERMINATOR 1283 1.1 jruoho }; 1284 1.1 jruoho 1285 1.1 jruoho 1286 1.1 jruoho /******************************************************************************* 1287 1.1 jruoho * 1288 1.1 jruoho * HPET - High Precision Event Timer table 1289 1.1 jruoho * 1290 1.1 jruoho ******************************************************************************/ 1291 1.1 jruoho 1292 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 1293 1.1 jruoho { 1294 1.1 jruoho {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0}, 1295 1.1 jruoho {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0}, 1296 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0}, 1297 1.1 jruoho {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0}, 1298 1.1 jruoho {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1299 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0}, 1300 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0}, 1301 1.1 jruoho ACPI_DMT_TERMINATOR 1302 1.1 jruoho }; 1303 1.1 jruoho 1304 1.1 jruoho 1305 1.1 jruoho /******************************************************************************* 1306 1.1 jruoho * 1307 1.1 jruoho * IVRS - I/O Virtualization Reporting Structure 1308 1.1 jruoho * 1309 1.1 jruoho ******************************************************************************/ 1310 1.1 jruoho 1311 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = 1312 1.1 jruoho { 1313 1.1 jruoho {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0}, 1314 1.1 jruoho {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0}, 1315 1.1 jruoho ACPI_DMT_TERMINATOR 1316 1.1 jruoho }; 1317 1.1 jruoho 1318 1.1 jruoho /* Common Subtable header (one per Subtable) */ 1319 1.1 jruoho 1320 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] = 1321 1.1 jruoho { 1322 1.1 jruoho {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 1323 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0}, 1324 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, 1325 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, 1326 1.1 jruoho ACPI_DMT_TERMINATOR 1327 1.1 jruoho }; 1328 1.1 jruoho 1329 1.1 jruoho /* IVRS subtables */ 1330 1.1 jruoho 1331 1.1 jruoho /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ 1332 1.1 jruoho 1333 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] = 1334 1.1 jruoho { 1335 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0}, 1336 1.1 jruoho {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0}, 1337 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, 1338 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0}, 1339 1.1 jruoho {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0}, 1340 1.1 jruoho ACPI_DMT_TERMINATOR 1341 1.1 jruoho }; 1342 1.1 jruoho 1343 1.1 jruoho /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */ 1344 1.1 jruoho 1345 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] = 1346 1.1 jruoho { 1347 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0}, 1348 1.1 jruoho {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0}, 1349 1.1 jruoho {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0}, 1350 1.1 jruoho {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0}, 1351 1.1 jruoho ACPI_DMT_TERMINATOR 1352 1.1 jruoho }; 1353 1.1 jruoho 1354 1.1 jruoho /* Device entry header for IVHD block */ 1355 1.1 jruoho 1356 1.1 jruoho #define ACPI_DMT_IVRS_DE_HEADER \ 1357 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \ 1358 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \ 1359 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0} 1360 1.1 jruoho 1361 1.1 jruoho /* 4-byte device entry */ 1362 1.1 jruoho 1363 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = 1364 1.1 jruoho { 1365 1.1 jruoho ACPI_DMT_IVRS_DE_HEADER, 1366 1.1 jruoho {ACPI_DMT_EXIT, 0, NULL, 0}, 1367 1.1 jruoho }; 1368 1.1 jruoho 1369 1.1 jruoho /* 8-byte device entry */ 1370 1.1 jruoho 1371 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = 1372 1.1 jruoho { 1373 1.1 jruoho ACPI_DMT_IVRS_DE_HEADER, 1374 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0}, 1375 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0}, 1376 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0}, 1377 1.1 jruoho ACPI_DMT_TERMINATOR 1378 1.1 jruoho }; 1379 1.1 jruoho 1380 1.1 jruoho /* 8-byte device entry */ 1381 1.1 jruoho 1382 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = 1383 1.1 jruoho { 1384 1.1 jruoho ACPI_DMT_IVRS_DE_HEADER, 1385 1.1 jruoho {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0}, 1386 1.1 jruoho ACPI_DMT_TERMINATOR 1387 1.1 jruoho }; 1388 1.1 jruoho 1389 1.1 jruoho /* 8-byte device entry */ 1390 1.1 jruoho 1391 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = 1392 1.1 jruoho { 1393 1.1 jruoho ACPI_DMT_IVRS_DE_HEADER, 1394 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0}, 1395 1.1 jruoho {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0}, 1396 1.1 jruoho {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0}, 1397 1.1 jruoho ACPI_DMT_TERMINATOR 1398 1.1 jruoho }; 1399 1.1 jruoho 1400 1.1 jruoho 1401 1.1 jruoho /******************************************************************************* 1402 1.1 jruoho * 1403 1.6 christos * LPIT - Low Power Idle Table 1404 1.6 christos * 1405 1.6 christos ******************************************************************************/ 1406 1.6 christos 1407 1.6 christos /* Main table consists only of the standard ACPI table header */ 1408 1.6 christos 1409 1.6 christos /* Common Subtable header (one per Subtable) */ 1410 1.6 christos 1411 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoLpitHdr[] = 1412 1.6 christos { 1413 1.6 christos {ACPI_DMT_LPIT, ACPI_LPITH_OFFSET (Type), "Subtable Type", 0}, 1414 1.6 christos {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Length), "Length", DT_LENGTH}, 1415 1.6 christos {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (UniqueId), "Unique ID", 0}, 1416 1.6 christos {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (Reserved), "Reserved", 0}, 1417 1.6 christos {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1418 1.6 christos {ACPI_DMT_FLAG0, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "State Disabled", 0}, 1419 1.6 christos {ACPI_DMT_FLAG1, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "No Counter", 0}, 1420 1.6 christos ACPI_DMT_TERMINATOR 1421 1.6 christos }; 1422 1.6 christos 1423 1.6 christos /* LPIT Subtables */ 1424 1.6 christos 1425 1.6 christos /* 0: Native C-state */ 1426 1.6 christos 1427 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoLpit0[] = 1428 1.6 christos { 1429 1.6 christos {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (EntryTrigger), "Entry Trigger", 0}, 1430 1.6 christos {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Residency), "Residency", 0}, 1431 1.6 christos {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Latency), "Latency", 0}, 1432 1.6 christos {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (ResidencyCounter), "Residency Counter", 0}, 1433 1.6 christos {ACPI_DMT_UINT64, ACPI_LPIT0_OFFSET (CounterFrequency), "Counter Frequency", 0}, 1434 1.6 christos ACPI_DMT_TERMINATOR 1435 1.6 christos }; 1436 1.6 christos 1437 1.6 christos /* 1: Simple I/O */ 1438 1.6 christos 1439 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoLpit1[] = 1440 1.6 christos { 1441 1.6 christos {ACPI_DMT_GAS, ACPI_LPIT1_OFFSET (EntryTrigger), "Entry Trigger", 0}, 1442 1.6 christos {ACPI_DMT_UINT32, ACPI_LPIT1_OFFSET (TriggerAction), "Trigger Action", 0}, 1443 1.6 christos {ACPI_DMT_UINT64, ACPI_LPIT1_OFFSET (TriggerValue), "Trigger Value", 0}, 1444 1.6 christos {ACPI_DMT_UINT64, ACPI_LPIT1_OFFSET (TriggerMask), "Trigger Mask", 0}, 1445 1.6 christos {ACPI_DMT_GAS, ACPI_LPIT1_OFFSET (MinimumIdleState), "Minimum Idle State", 0}, 1446 1.6 christos {ACPI_DMT_UINT32, ACPI_LPIT1_OFFSET (Residency), "Residency", 0}, 1447 1.6 christos {ACPI_DMT_UINT32, ACPI_LPIT1_OFFSET (Latency), "Latency", 0}, 1448 1.6 christos {ACPI_DMT_GAS, ACPI_LPIT1_OFFSET (ResidencyCounter), "Residency Counter", 0}, 1449 1.6 christos {ACPI_DMT_UINT64, ACPI_LPIT1_OFFSET (CounterFrequency), "Counter Frequency", 0}, 1450 1.6 christos ACPI_DMT_TERMINATOR 1451 1.6 christos }; 1452 1.6 christos 1453 1.6 christos 1454 1.6 christos /******************************************************************************* 1455 1.6 christos * 1456 1.1 jruoho * MADT - Multiple APIC Description Table and subtables 1457 1.1 jruoho * 1458 1.1 jruoho ******************************************************************************/ 1459 1.1 jruoho 1460 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 1461 1.1 jruoho { 1462 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0}, 1463 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1464 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0}, 1465 1.1 jruoho ACPI_DMT_TERMINATOR 1466 1.1 jruoho }; 1467 1.1 jruoho 1468 1.1 jruoho /* Common Subtable header (one per Subtable) */ 1469 1.1 jruoho 1470 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 1471 1.1 jruoho { 1472 1.1 jruoho {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0}, 1473 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH}, 1474 1.1 jruoho ACPI_DMT_TERMINATOR 1475 1.1 jruoho }; 1476 1.1 jruoho 1477 1.1 jruoho /* MADT Subtables */ 1478 1.1 jruoho 1479 1.1 jruoho /* 0: processor APIC */ 1480 1.1 jruoho 1481 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 1482 1.1 jruoho { 1483 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0}, 1484 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0}, 1485 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1486 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1487 1.1 jruoho ACPI_DMT_TERMINATOR 1488 1.1 jruoho }; 1489 1.1 jruoho 1490 1.1 jruoho /* 1: IO APIC */ 1491 1.1 jruoho 1492 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 1493 1.1 jruoho { 1494 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0}, 1495 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0}, 1496 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0}, 1497 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0}, 1498 1.1 jruoho ACPI_DMT_TERMINATOR 1499 1.1 jruoho }; 1500 1.1 jruoho 1501 1.1 jruoho /* 2: Interrupt Override */ 1502 1.1 jruoho 1503 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 1504 1.1 jruoho { 1505 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0}, 1506 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0}, 1507 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0}, 1508 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1509 1.1 jruoho {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1510 1.1 jruoho {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1511 1.1 jruoho ACPI_DMT_TERMINATOR 1512 1.1 jruoho }; 1513 1.1 jruoho 1514 1.1 jruoho /* 3: NMI Sources */ 1515 1.1 jruoho 1516 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 1517 1.1 jruoho { 1518 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1519 1.1 jruoho {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1520 1.1 jruoho {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1521 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0}, 1522 1.1 jruoho ACPI_DMT_TERMINATOR 1523 1.1 jruoho }; 1524 1.1 jruoho 1525 1.1 jruoho /* 4: Local APIC NMI */ 1526 1.1 jruoho 1527 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 1528 1.1 jruoho { 1529 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0}, 1530 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1531 1.1 jruoho {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1532 1.1 jruoho {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1533 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0}, 1534 1.1 jruoho ACPI_DMT_TERMINATOR 1535 1.1 jruoho }; 1536 1.1 jruoho 1537 1.1 jruoho /* 5: Address Override */ 1538 1.1 jruoho 1539 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 1540 1.1 jruoho { 1541 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0}, 1542 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0}, 1543 1.1 jruoho ACPI_DMT_TERMINATOR 1544 1.1 jruoho }; 1545 1.1 jruoho 1546 1.1 jruoho /* 6: I/O Sapic */ 1547 1.1 jruoho 1548 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 1549 1.1 jruoho { 1550 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0}, 1551 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0}, 1552 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 1553 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0}, 1554 1.1 jruoho ACPI_DMT_TERMINATOR 1555 1.1 jruoho }; 1556 1.1 jruoho 1557 1.1 jruoho /* 7: Local Sapic */ 1558 1.1 jruoho 1559 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 1560 1.1 jruoho { 1561 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0}, 1562 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0}, 1563 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0}, 1564 1.1 jruoho {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0}, 1565 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1566 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1567 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0}, 1568 1.1 jruoho {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0}, 1569 1.1 jruoho ACPI_DMT_TERMINATOR 1570 1.1 jruoho }; 1571 1.1 jruoho 1572 1.1 jruoho /* 8: Platform Interrupt Source */ 1573 1.1 jruoho 1574 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 1575 1.1 jruoho { 1576 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1577 1.1 jruoho {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1578 1.1 jruoho {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1579 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0}, 1580 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0}, 1581 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0}, 1582 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0}, 1583 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0}, 1584 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1585 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0}, 1586 1.1 jruoho ACPI_DMT_TERMINATOR 1587 1.1 jruoho }; 1588 1.1 jruoho 1589 1.1 jruoho /* 9: Processor Local X2_APIC (ACPI 4.0) */ 1590 1.1 jruoho 1591 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = 1592 1.1 jruoho { 1593 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0}, 1594 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0}, 1595 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1596 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1597 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0}, 1598 1.1 jruoho ACPI_DMT_TERMINATOR 1599 1.1 jruoho }; 1600 1.1 jruoho 1601 1.1 jruoho /* 10: Local X2_APIC NMI (ACPI 4.0) */ 1602 1.1 jruoho 1603 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = 1604 1.1 jruoho { 1605 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1606 1.1 jruoho {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1607 1.1 jruoho {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1608 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0}, 1609 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0}, 1610 1.1 jruoho {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0}, 1611 1.1 jruoho ACPI_DMT_TERMINATOR 1612 1.1 jruoho }; 1613 1.1 jruoho 1614 1.5 christos /* 11: Generic Interrupt Controller (ACPI 5.0) */ 1615 1.5 christos 1616 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[] = 1617 1.5 christos { 1618 1.5 christos {ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (Reserved), "Reserved", 0}, 1619 1.6 christos {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (CpuInterfaceNumber), "CPU Interface Number", 0}, 1620 1.5 christos {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Uid), "Processor UID", 0}, 1621 1.5 christos {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1622 1.5 christos {ACPI_DMT_FLAG0, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Processor Enabled", 0}, 1623 1.6 christos {ACPI_DMT_FLAG1, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Performance Interrupt Trigger Mode", 0}, 1624 1.6 christos {ACPI_DMT_FLAG2, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Virtual GIC Interrupt Trigger Mode", 0}, 1625 1.5 christos {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (ParkingVersion), "Parking Protocol Version", 0}, 1626 1.5 christos {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (PerformanceInterrupt), "Performance Interrupt", 0}, 1627 1.5 christos {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ParkedAddress), "Parked Address", 0}, 1628 1.5 christos {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (BaseAddress), "Base Address", 0}, 1629 1.6 christos {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicvBaseAddress), "Virtual GIC Base Address", 0}, 1630 1.6 christos {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GichBaseAddress), "Hypervisor GIC Base Address", 0}, 1631 1.6 christos {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (VgicInterrupt), "Virtual GIC Interrupt", 0}, 1632 1.6 christos {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicrBaseAddress), "Redistributor Base Address", 0}, 1633 1.6 christos {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ArmMpidr), "ARM MPIDR", 0}, 1634 1.5 christos ACPI_DMT_TERMINATOR 1635 1.5 christos }; 1636 1.5 christos 1637 1.5 christos /* 12: Generic Interrupt Distributor (ACPI 5.0) */ 1638 1.5 christos 1639 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMadt12[] = 1640 1.5 christos { 1641 1.5 christos {ACPI_DMT_UINT16, ACPI_MADT12_OFFSET (Reserved), "Reserved", 0}, 1642 1.5 christos {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GicId), "Local GIC Hardware ID", 0}, 1643 1.5 christos {ACPI_DMT_UINT64, ACPI_MADT12_OFFSET (BaseAddress), "Base Address", 0}, 1644 1.5 christos {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 1645 1.5 christos {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (Reserved2), "Reserved", 0}, 1646 1.5 christos ACPI_DMT_TERMINATOR 1647 1.5 christos }; 1648 1.5 christos 1649 1.6 christos /* 13: Generic MSI Frame (ACPI 5.1) */ 1650 1.6 christos 1651 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMadt13[] = 1652 1.6 christos { 1653 1.6 christos {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (Reserved), "Reserved", 0}, 1654 1.6 christos {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (MsiFrameId), "MSI Frame ID", 0}, 1655 1.6 christos {ACPI_DMT_UINT64, ACPI_MADT13_OFFSET (BaseAddress), "Base Address", 0}, 1656 1.6 christos {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1657 1.6 christos {ACPI_DMT_FLAG0, ACPI_MADT13_FLAG_OFFSET (Flags,0), "Select SPI", 0}, 1658 1.6 christos {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiCount), "SPI Count", 0}, 1659 1.6 christos {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiBase), "SPI Base", 0}, 1660 1.6 christos ACPI_DMT_TERMINATOR 1661 1.6 christos }; 1662 1.6 christos 1663 1.6 christos /* 14: Generic Redistributor (ACPI 5.1) */ 1664 1.6 christos 1665 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMadt14[] = 1666 1.6 christos { 1667 1.6 christos {ACPI_DMT_UINT16, ACPI_MADT14_OFFSET (Reserved), "Reserved", 0}, 1668 1.6 christos {ACPI_DMT_UINT64, ACPI_MADT14_OFFSET (BaseAddress), "Base Address", 0}, 1669 1.6 christos {ACPI_DMT_UINT32, ACPI_MADT14_OFFSET (Length), "Length", 0}, 1670 1.6 christos ACPI_DMT_TERMINATOR 1671 1.6 christos }; 1672 1.6 christos 1673 1.1 jruoho 1674 1.1 jruoho /******************************************************************************* 1675 1.1 jruoho * 1676 1.1 jruoho * MCFG - PCI Memory Mapped Configuration table and Subtable 1677 1.1 jruoho * 1678 1.1 jruoho ******************************************************************************/ 1679 1.1 jruoho 1680 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 1681 1.1 jruoho { 1682 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0}, 1683 1.1 jruoho ACPI_DMT_TERMINATOR 1684 1.1 jruoho }; 1685 1.1 jruoho 1686 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 1687 1.1 jruoho { 1688 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0}, 1689 1.1 jruoho {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0}, 1690 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0}, 1691 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0}, 1692 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0}, 1693 1.1 jruoho ACPI_DMT_TERMINATOR 1694 1.1 jruoho }; 1695 1.1 jruoho 1696 1.1 jruoho 1697 1.1 jruoho /******************************************************************************* 1698 1.1 jruoho * 1699 1.1 jruoho * MCHI - Management Controller Host Interface table 1700 1.1 jruoho * 1701 1.1 jruoho ******************************************************************************/ 1702 1.1 jruoho 1703 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = 1704 1.1 jruoho { 1705 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0}, 1706 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0}, 1707 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0}, 1708 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0}, 1709 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0}, 1710 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0}, 1711 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, 1712 1.1 jruoho {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0}, 1713 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0}, 1714 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0}, 1715 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0}, 1716 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0}, 1717 1.1 jruoho ACPI_DMT_TERMINATOR 1718 1.1 jruoho }; 1719 1.1 jruoho 1720 1.1 jruoho 1721 1.1 jruoho /******************************************************************************* 1722 1.1 jruoho * 1723 1.5 christos * MPST - Memory Power State Table 1724 1.5 christos * 1725 1.5 christos ******************************************************************************/ 1726 1.5 christos 1727 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMpst[] = 1728 1.5 christos { 1729 1.5 christos {ACPI_DMT_UINT8, ACPI_MPST_OFFSET (ChannelId), "Channel ID", 0}, 1730 1.5 christos {ACPI_DMT_UINT24, ACPI_MPST_OFFSET (Reserved1[0]), "Reserved", 0}, 1731 1.5 christos {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (PowerNodeCount), "Power Node Count", 0}, 1732 1.5 christos {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (Reserved2), "Reserved", 0}, 1733 1.5 christos ACPI_DMT_TERMINATOR 1734 1.5 christos }; 1735 1.5 christos 1736 1.5 christos /* MPST subtables */ 1737 1.5 christos 1738 1.5 christos /* 0: Memory Power Node Structure */ 1739 1.5 christos 1740 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0[] = 1741 1.5 christos { 1742 1.5 christos {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1743 1.5 christos {ACPI_DMT_FLAG0, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Node Enabled", 0}, 1744 1.5 christos {ACPI_DMT_FLAG1, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Power Managed", 0}, 1745 1.5 christos {ACPI_DMT_FLAG2, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Hot Plug Capable", 0}, 1746 1.5 christos 1747 1.5 christos {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Reserved1), "Reserved", 0}, 1748 1.5 christos {ACPI_DMT_UINT16, ACPI_MPST0_OFFSET (NodeId), "Node ID", 0}, 1749 1.5 christos {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (Length), "Length", 0}, 1750 1.5 christos {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeAddress), "Range Address", 0}, 1751 1.5 christos {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeLength), "Range Length", 0}, 1752 1.5 christos {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPowerStates), "Num Power States", 0}, 1753 1.5 christos {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPhysicalComponents), "Num Physical Components", 0}, 1754 1.5 christos ACPI_DMT_TERMINATOR 1755 1.5 christos }; 1756 1.5 christos 1757 1.5 christos /* 0A: Sub-subtable - Memory Power State Structure (follows Memory Power Node above) */ 1758 1.5 christos 1759 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0A[] = 1760 1.5 christos { 1761 1.5 christos {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (PowerState), "Power State", 0}, 1762 1.5 christos {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (InfoIndex), "InfoIndex", 0}, 1763 1.5 christos ACPI_DMT_TERMINATOR 1764 1.5 christos }; 1765 1.5 christos 1766 1.5 christos /* 0B: Sub-subtable - Physical Component ID Structure (follows Memory Power State(s) above) */ 1767 1.5 christos 1768 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0B[] = 1769 1.5 christos { 1770 1.5 christos {ACPI_DMT_UINT16, ACPI_MPST0B_OFFSET (ComponentId), "Component Id", 0}, 1771 1.5 christos ACPI_DMT_TERMINATOR 1772 1.5 christos }; 1773 1.5 christos 1774 1.5 christos /* 01: Power Characteristics Count (follows all Power Node(s) above) */ 1775 1.5 christos 1776 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMpst1[] = 1777 1.5 christos { 1778 1.5 christos {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (CharacteristicsCount), "Characteristics Count", 0}, 1779 1.5 christos {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (Reserved), "Reserved", 0}, 1780 1.5 christos ACPI_DMT_TERMINATOR 1781 1.5 christos }; 1782 1.5 christos 1783 1.5 christos /* 02: Memory Power State Characteristics Structure */ 1784 1.5 christos 1785 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMpst2[] = 1786 1.5 christos { 1787 1.5 christos {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (StructureId), "Structure ID", 0}, 1788 1.5 christos {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1789 1.5 christos {ACPI_DMT_FLAG0, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Memory Preserved", 0}, 1790 1.5 christos {ACPI_DMT_FLAG1, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Entry", 0}, 1791 1.5 christos {ACPI_DMT_FLAG2, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Exit", 0}, 1792 1.5 christos 1793 1.5 christos {ACPI_DMT_UINT16, ACPI_MPST2_OFFSET (Reserved1), "Reserved", 0}, 1794 1.5 christos {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (AveragePower), "Average Power", 0}, 1795 1.5 christos {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (PowerSaving), "Power Saving", 0}, 1796 1.5 christos {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (ExitLatency), "Exit Latency", 0}, 1797 1.5 christos {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (Reserved2), "Reserved", 0}, 1798 1.5 christos ACPI_DMT_TERMINATOR 1799 1.5 christos }; 1800 1.5 christos 1801 1.5 christos 1802 1.5 christos /******************************************************************************* 1803 1.5 christos * 1804 1.1 jruoho * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1805 1.1 jruoho * 1806 1.1 jruoho ******************************************************************************/ 1807 1.1 jruoho 1808 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = 1809 1.1 jruoho { 1810 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0}, 1811 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0}, 1812 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0}, 1813 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0}, 1814 1.1 jruoho ACPI_DMT_TERMINATOR 1815 1.1 jruoho }; 1816 1.1 jruoho 1817 1.1 jruoho /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1818 1.1 jruoho 1819 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = 1820 1.1 jruoho { 1821 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0}, 1822 1.1 jruoho {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH}, 1823 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0}, 1824 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0}, 1825 1.1 jruoho {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0}, 1826 1.1 jruoho {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0}, 1827 1.1 jruoho ACPI_DMT_TERMINATOR 1828 1.1 jruoho }; 1829 1.1 jruoho 1830 1.1 jruoho 1831 1.1 jruoho /******************************************************************************* 1832 1.1 jruoho * 1833 1.5 christos * MTMR - MID Timer Table 1834 1.5 christos * 1835 1.5 christos ******************************************************************************/ 1836 1.5 christos 1837 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr[] = 1838 1.5 christos { 1839 1.5 christos ACPI_DMT_TERMINATOR 1840 1.5 christos }; 1841 1.5 christos 1842 1.5 christos /* MTMR Subtables - MTMR Entry */ 1843 1.5 christos 1844 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr0[] = 1845 1.5 christos { 1846 1.5 christos {ACPI_DMT_GAS, ACPI_MTMR0_OFFSET (PhysicalAddress), "PhysicalAddress", 0}, 1847 1.5 christos {ACPI_DMT_UINT32, ACPI_MTMR0_OFFSET (Frequency), "Frequency", 0}, 1848 1.5 christos {ACPI_DMT_UINT32, ACPI_MTMR0_OFFSET (Irq), "IRQ", 0}, 1849 1.5 christos ACPI_DMT_TERMINATOR 1850 1.5 christos }; 1851 1.5 christos 1852 1.5 christos 1853 1.5 christos /******************************************************************************* 1854 1.5 christos * 1855 1.5 christos * PCCT - Platform Communications Channel Table (ACPI 5.0) 1856 1.5 christos * 1857 1.5 christos ******************************************************************************/ 1858 1.5 christos 1859 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoPcct[] = 1860 1.5 christos { 1861 1.5 christos {ACPI_DMT_UINT32, ACPI_PCCT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1862 1.5 christos {ACPI_DMT_FLAG0, ACPI_PCCT_FLAG_OFFSET (Flags,0), "Doorbell", 0}, 1863 1.5 christos {ACPI_DMT_UINT64, ACPI_PCCT_OFFSET (Reserved), "Reserved", 0}, 1864 1.5 christos ACPI_DMT_TERMINATOR 1865 1.5 christos }; 1866 1.5 christos 1867 1.5 christos /* PCCT subtables */ 1868 1.5 christos 1869 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoPcctHdr[] = 1870 1.5 christos { 1871 1.5 christos {ACPI_DMT_PCCT, ACPI_PCCT0_OFFSET (Header.Type), "Subtable Type", 0}, 1872 1.5 christos {ACPI_DMT_UINT8, ACPI_PCCT0_OFFSET (Header.Length), "Length", DT_LENGTH}, 1873 1.5 christos ACPI_DMT_TERMINATOR 1874 1.5 christos }; 1875 1.5 christos 1876 1.5 christos /* 0: Generic Communications Subspace */ 1877 1.5 christos 1878 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoPcct0[] = 1879 1.5 christos { 1880 1.5 christos {ACPI_DMT_UINT48, ACPI_PCCT0_OFFSET (Reserved[0]), "Reserved", 0}, 1881 1.5 christos {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (BaseAddress), "Base Address", 0}, 1882 1.5 christos {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (Length), "Address Length", 0}, 1883 1.5 christos {ACPI_DMT_GAS, ACPI_PCCT0_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1884 1.5 christos {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (PreserveMask), "Preserve Mask", 0}, 1885 1.5 christos {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (WriteMask), "Write Mask", 0}, 1886 1.5 christos {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (Latency), "Command Latency", 0}, 1887 1.5 christos {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1888 1.5 christos {ACPI_DMT_UINT16, ACPI_PCCT0_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1889 1.5 christos ACPI_DMT_TERMINATOR 1890 1.5 christos }; 1891 1.5 christos 1892 1.6 christos /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1893 1.6 christos 1894 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoPcct1[] = 1895 1.6 christos { 1896 1.6 christos {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (DoorbellInterrupt), "Doorbell Interrupt", 0}, 1897 1.6 christos {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1898 1.6 christos {ACPI_DMT_FLAG0, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1899 1.6 christos {ACPI_DMT_FLAG1, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Mode", 0}, 1900 1.6 christos {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Reserved), "Reserved", 0}, 1901 1.6 christos {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (BaseAddress), "Base Address", 0}, 1902 1.6 christos {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (Length), "Address Length", 0}, 1903 1.6 christos {ACPI_DMT_GAS, ACPI_PCCT1_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1904 1.6 christos {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (PreserveMask), "Preserve Mask", 0}, 1905 1.6 christos {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (WriteMask), "Write Mask", 0}, 1906 1.6 christos {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (Latency), "Command Latency", 0}, 1907 1.6 christos {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1908 1.6 christos {ACPI_DMT_UINT16, ACPI_PCCT1_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1909 1.6 christos ACPI_DMT_TERMINATOR 1910 1.6 christos }; 1911 1.6 christos 1912 1.5 christos 1913 1.5 christos /******************************************************************************* 1914 1.5 christos * 1915 1.5 christos * PMTT - Platform Memory Topology Table 1916 1.5 christos * 1917 1.5 christos ******************************************************************************/ 1918 1.5 christos 1919 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt[] = 1920 1.5 christos { 1921 1.5 christos {ACPI_DMT_UINT32, ACPI_PMTT_OFFSET (Reserved), "Reserved", 0}, 1922 1.5 christos ACPI_DMT_TERMINATOR 1923 1.5 christos }; 1924 1.5 christos 1925 1.5 christos /* Common Subtable header (one per Subtable) */ 1926 1.5 christos 1927 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoPmttHdr[] = 1928 1.5 christos { 1929 1.5 christos {ACPI_DMT_PMTT, ACPI_PMTTH_OFFSET (Type), "Subtable Type", 0}, 1930 1.5 christos {ACPI_DMT_UINT8, ACPI_PMTTH_OFFSET (Reserved1), "Reserved", 0}, 1931 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Length), "Length", DT_LENGTH}, 1932 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1933 1.5 christos {ACPI_DMT_FLAG0, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Top-level Device", 0}, 1934 1.5 christos {ACPI_DMT_FLAG1, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Physical Element", 0}, 1935 1.5 christos {ACPI_DMT_FLAGS2, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Memory Type", 0}, 1936 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Reserved2), "Reserved", 0}, 1937 1.5 christos ACPI_DMT_TERMINATOR 1938 1.5 christos }; 1939 1.5 christos 1940 1.5 christos /* PMTT Subtables */ 1941 1.5 christos 1942 1.5 christos /* 0: Socket */ 1943 1.5 christos 1944 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt0[] = 1945 1.5 christos { 1946 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (SocketId), "Socket ID", 0}, 1947 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (Reserved), "Reserved", 0}, 1948 1.5 christos ACPI_DMT_TERMINATOR 1949 1.5 christos }; 1950 1.5 christos 1951 1.5 christos /* 1: Memory Controller */ 1952 1.5 christos 1953 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1[] = 1954 1.5 christos { 1955 1.5 christos {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadLatency), "Read Latency", 0}, 1956 1.5 christos {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteLatency), "Write Latency", 0}, 1957 1.5 christos {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadBandwidth), "Read Bandwidth", 0}, 1958 1.5 christos {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteBandwidth), "Write Bandwidth", 0}, 1959 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (AccessWidth), "Access Width", 0}, 1960 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Alignment), "Alignment", 0}, 1961 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Reserved), "Reserved", 0}, 1962 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (DomainCount), "Domain Count", 0}, 1963 1.5 christos ACPI_DMT_TERMINATOR 1964 1.5 christos }; 1965 1.5 christos 1966 1.5 christos /* 1a: Proximity Domain */ 1967 1.5 christos 1968 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1a[] = 1969 1.5 christos { 1970 1.5 christos {ACPI_DMT_UINT32, ACPI_PMTT1A_OFFSET (ProximityDomain), "Proximity Domain", 0}, 1971 1.5 christos ACPI_DMT_TERMINATOR 1972 1.5 christos }; 1973 1.5 christos 1974 1.5 christos /* 2: Physical Component */ 1975 1.5 christos 1976 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt2[] = 1977 1.5 christos { 1978 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTT2_OFFSET (ComponentId), "Component ID", 0}, 1979 1.5 christos {ACPI_DMT_UINT16, ACPI_PMTT2_OFFSET (Reserved), "Reserved", 0}, 1980 1.5 christos {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (MemorySize), "Memory Size", 0}, 1981 1.5 christos {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (BiosHandle), "Bios Handle", 0}, 1982 1.5 christos ACPI_DMT_TERMINATOR 1983 1.5 christos }; 1984 1.5 christos 1985 1.5 christos 1986 1.5 christos /******************************************************************************* 1987 1.5 christos * 1988 1.5 christos * S3PT - S3 Performance Table 1989 1.5 christos * 1990 1.5 christos ******************************************************************************/ 1991 1.5 christos 1992 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt[] = 1993 1.5 christos { 1994 1.5 christos {ACPI_DMT_SIG, ACPI_S3PT_OFFSET (Signature[0]), "Signature", 0}, 1995 1.5 christos {ACPI_DMT_UINT32, ACPI_S3PT_OFFSET (Length), "Length", DT_LENGTH}, 1996 1.5 christos ACPI_DMT_TERMINATOR 1997 1.5 christos }; 1998 1.5 christos 1999 1.5 christos /* S3PT subtable header */ 2000 1.5 christos 2001 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoS3ptHdr[] = 2002 1.5 christos { 2003 1.5 christos {ACPI_DMT_UINT16, ACPI_S3PTH_OFFSET (Type), "Type", 0}, 2004 1.5 christos {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Length), "Length", DT_LENGTH}, 2005 1.5 christos {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Revision), "Revision", 0}, 2006 1.5 christos ACPI_DMT_TERMINATOR 2007 1.5 christos }; 2008 1.5 christos 2009 1.5 christos /* 0: Basic S3 Resume Performance Record */ 2010 1.5 christos 2011 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt0[] = 2012 1.5 christos { 2013 1.5 christos {ACPI_DMT_UINT32, ACPI_S3PT0_OFFSET (ResumeCount), "Resume Count", 0}, 2014 1.5 christos {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (FullResume), "Full Resume", 0}, 2015 1.5 christos {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (AverageResume), "Average Resume", 0}, 2016 1.5 christos ACPI_DMT_TERMINATOR 2017 1.5 christos }; 2018 1.5 christos 2019 1.5 christos /* 1: Basic S3 Suspend Performance Record */ 2020 1.5 christos 2021 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt1[] = 2022 1.5 christos { 2023 1.5 christos {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendStart), "Suspend Start", 0}, 2024 1.5 christos {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendEnd), "Suspend End", 0}, 2025 1.5 christos ACPI_DMT_TERMINATOR 2026 1.5 christos }; 2027 1.5 christos 2028 1.5 christos 2029 1.5 christos /******************************************************************************* 2030 1.5 christos * 2031 1.1 jruoho * SBST - Smart Battery Specification Table 2032 1.1 jruoho * 2033 1.1 jruoho ******************************************************************************/ 2034 1.1 jruoho 2035 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 2036 1.1 jruoho { 2037 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0}, 2038 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0}, 2039 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0}, 2040 1.1 jruoho ACPI_DMT_TERMINATOR 2041 1.1 jruoho }; 2042 1.1 jruoho 2043 1.1 jruoho 2044 1.1 jruoho /******************************************************************************* 2045 1.1 jruoho * 2046 1.4 jruoho * SLIC - Software Licensing Description Table. There is no common table, just 2047 1.4 jruoho * the standard ACPI header and then subtables. 2048 1.1 jruoho * 2049 1.1 jruoho ******************************************************************************/ 2050 1.1 jruoho 2051 1.4 jruoho /* Common Subtable header (one per Subtable) */ 2052 1.4 jruoho 2053 1.4 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSlicHdr[] = 2054 1.4 jruoho { 2055 1.4 jruoho {ACPI_DMT_SLIC, ACPI_SLICH_OFFSET (Type), "Subtable Type", 0}, 2056 1.4 jruoho {ACPI_DMT_UINT32, ACPI_SLICH_OFFSET (Length), "Length", DT_LENGTH}, 2057 1.4 jruoho ACPI_DMT_TERMINATOR 2058 1.4 jruoho }; 2059 1.4 jruoho 2060 1.4 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSlic0[] = 2061 1.4 jruoho { 2062 1.4 jruoho {ACPI_DMT_UINT8, ACPI_SLIC0_OFFSET (KeyType), "Key Type", 0}, 2063 1.4 jruoho {ACPI_DMT_UINT8, ACPI_SLIC0_OFFSET (Version), "Version", 0}, 2064 1.4 jruoho {ACPI_DMT_UINT16, ACPI_SLIC0_OFFSET (Reserved), "Reserved", 0}, 2065 1.4 jruoho {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (Algorithm), "Algorithm", 0}, 2066 1.4 jruoho {ACPI_DMT_NAME4, ACPI_SLIC0_OFFSET (Magic), "Magic", 0}, 2067 1.4 jruoho {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (BitLength), "BitLength", 0}, 2068 1.4 jruoho {ACPI_DMT_UINT32, ACPI_SLIC0_OFFSET (Exponent), "Exponent", 0}, 2069 1.4 jruoho {ACPI_DMT_BUF128, ACPI_SLIC0_OFFSET (Modulus[0]), "Modulus", 0}, 2070 1.4 jruoho ACPI_DMT_TERMINATOR 2071 1.4 jruoho }; 2072 1.4 jruoho 2073 1.4 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSlic1[] = 2074 1.1 jruoho { 2075 1.4 jruoho {ACPI_DMT_UINT32, ACPI_SLIC1_OFFSET (Version), "Version", 0}, 2076 1.4 jruoho {ACPI_DMT_NAME6, ACPI_SLIC1_OFFSET (OemId[0]), "Oem ID", 0}, 2077 1.4 jruoho {ACPI_DMT_NAME8, ACPI_SLIC1_OFFSET (OemTableId[0]), "Oem Table ID", 0}, 2078 1.4 jruoho {ACPI_DMT_NAME8, ACPI_SLIC1_OFFSET (WindowsFlag[0]), "Windows Flag", 0}, 2079 1.4 jruoho {ACPI_DMT_UINT32, ACPI_SLIC1_OFFSET (SlicVersion), "SLIC Version", 0}, 2080 1.4 jruoho {ACPI_DMT_BUF16, ACPI_SLIC1_OFFSET (Reserved[0]), "Reserved", 0}, 2081 1.4 jruoho {ACPI_DMT_BUF128, ACPI_SLIC1_OFFSET (Signature[0]), "Signature", 0}, 2082 1.1 jruoho ACPI_DMT_TERMINATOR 2083 1.1 jruoho }; 2084 1.1 jruoho 2085 1.1 jruoho 2086 1.1 jruoho /******************************************************************************* 2087 1.1 jruoho * 2088 1.1 jruoho * SLIT - System Locality Information Table 2089 1.1 jruoho * 2090 1.1 jruoho ******************************************************************************/ 2091 1.1 jruoho 2092 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = 2093 1.1 jruoho { 2094 1.1 jruoho {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities", 0}, 2095 1.1 jruoho ACPI_DMT_TERMINATOR 2096 1.1 jruoho }; 2097 1.1 jruoho 2098 1.1 jruoho 2099 1.1 jruoho /******************************************************************************* 2100 1.1 jruoho * 2101 1.1 jruoho * SPCR - Serial Port Console Redirection table 2102 1.1 jruoho * 2103 1.1 jruoho ******************************************************************************/ 2104 1.1 jruoho 2105 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = 2106 1.1 jruoho { 2107 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type", 0}, 2108 1.1 jruoho {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved", 0}, 2109 1.1 jruoho {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register", 0}, 2110 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type", 0}, 2111 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ", 0}, 2112 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt", 0}, 2113 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate", 0}, 2114 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity", 0}, 2115 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits", 0}, 2116 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control", 0}, 2117 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type", 0}, 2118 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, 2119 1.1 jruoho {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID", 0}, 2120 1.1 jruoho {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 2121 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus", 0}, 2122 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device", 0}, 2123 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function", 0}, 2124 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags", 0}, 2125 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment", 0}, 2126 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, 2127 1.1 jruoho ACPI_DMT_TERMINATOR 2128 1.1 jruoho }; 2129 1.1 jruoho 2130 1.1 jruoho 2131 1.1 jruoho /******************************************************************************* 2132 1.1 jruoho * 2133 1.1 jruoho * SPMI - Server Platform Management Interface table 2134 1.1 jruoho * 2135 1.1 jruoho ******************************************************************************/ 2136 1.1 jruoho 2137 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = 2138 1.1 jruoho { 2139 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type", 0}, 2140 1.6 christos {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved", DT_NON_ZERO}, /* Value must be 1 */ 2141 1.1 jruoho {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version", 0}, 2142 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type", 0}, 2143 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number", 0}, 2144 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved", 0}, 2145 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag", 0}, 2146 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt", 0}, 2147 1.1 jruoho {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register", 0}, 2148 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment", 0}, 2149 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus", 0}, 2150 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device", 0}, 2151 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function", 0}, 2152 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved", 0}, 2153 1.1 jruoho ACPI_DMT_TERMINATOR 2154 1.1 jruoho }; 2155 1.1 jruoho 2156 1.1 jruoho 2157 1.1 jruoho /******************************************************************************* 2158 1.1 jruoho * 2159 1.1 jruoho * SRAT - System Resource Affinity Table and Subtables 2160 1.1 jruoho * 2161 1.1 jruoho ******************************************************************************/ 2162 1.1 jruoho 2163 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = 2164 1.1 jruoho { 2165 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision", 0}, 2166 1.1 jruoho {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved", 0}, 2167 1.1 jruoho ACPI_DMT_TERMINATOR 2168 1.1 jruoho }; 2169 1.1 jruoho 2170 1.1 jruoho /* Common Subtable header (one per Subtable) */ 2171 1.1 jruoho 2172 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] = 2173 1.1 jruoho { 2174 1.1 jruoho {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type", 0}, 2175 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length", DT_LENGTH}, 2176 1.1 jruoho ACPI_DMT_TERMINATOR 2177 1.1 jruoho }; 2178 1.1 jruoho 2179 1.1 jruoho /* SRAT Subtables */ 2180 1.1 jruoho 2181 1.1 jruoho /* 0: Processor Local APIC/SAPIC Affinity */ 2182 1.1 jruoho 2183 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = 2184 1.1 jruoho { 2185 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)", 0}, 2186 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID", 0}, 2187 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2188 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled", 0}, 2189 1.1 jruoho {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID", 0}, 2190 1.1 jruoho {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)", 0}, 2191 1.2 jruoho {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (ClockDomain), "Clock Domain", 0}, 2192 1.1 jruoho ACPI_DMT_TERMINATOR 2193 1.1 jruoho }; 2194 1.1 jruoho 2195 1.1 jruoho /* 1: Memory Affinity */ 2196 1.1 jruoho 2197 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = 2198 1.1 jruoho { 2199 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain", 0}, 2200 1.3 jruoho {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved1", 0}, 2201 1.1 jruoho {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address", 0}, 2202 1.1 jruoho {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length", 0}, 2203 1.3 jruoho {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved2", 0}, 2204 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2205 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled", 0}, 2206 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable", 0}, 2207 1.1 jruoho {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile", 0}, 2208 1.3 jruoho {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved3", 0}, 2209 1.1 jruoho ACPI_DMT_TERMINATOR 2210 1.1 jruoho }; 2211 1.1 jruoho 2212 1.1 jruoho /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ 2213 1.1 jruoho 2214 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] = 2215 1.1 jruoho { 2216 1.3 jruoho {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved1", 0}, 2217 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain", 0}, 2218 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID", 0}, 2219 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2220 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled", 0}, 2221 1.1 jruoho {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain", 0}, 2222 1.3 jruoho {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved2", 0}, 2223 1.1 jruoho ACPI_DMT_TERMINATOR 2224 1.1 jruoho }; 2225 1.1 jruoho 2226 1.6 christos /* : GICC Affinity (ACPI 5.1) */ 2227 1.6 christos 2228 1.6 christos ACPI_DMTABLE_INFO AcpiDmTableInfoSrat3[] = 2229 1.6 christos { 2230 1.6 christos {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (ProximityDomain), "Proximity Domain", 0}, 2231 1.6 christos {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (AcpiProcessorUid), "Acpi Processor UID", 0}, 2232 1.6 christos {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2233 1.6 christos {ACPI_DMT_FLAG0, ACPI_SRAT3_FLAG_OFFSET (Flags,0), "Enabled", 0}, 2234 1.6 christos {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (ClockDomain), "Clock Domain", 0}, 2235 1.6 christos ACPI_DMT_TERMINATOR 2236 1.6 christos }; 2237 1.6 christos 2238 1.1 jruoho 2239 1.1 jruoho /******************************************************************************* 2240 1.1 jruoho * 2241 1.1 jruoho * TCPA - Trusted Computing Platform Alliance table 2242 1.1 jruoho * 2243 1.1 jruoho ******************************************************************************/ 2244 1.1 jruoho 2245 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] = 2246 1.1 jruoho { 2247 1.1 jruoho {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved", 0}, 2248 1.1 jruoho {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length", 0}, 2249 1.1 jruoho {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address", 0}, 2250 1.1 jruoho ACPI_DMT_TERMINATOR 2251 1.1 jruoho }; 2252 1.1 jruoho 2253 1.1 jruoho 2254 1.1 jruoho /******************************************************************************* 2255 1.1 jruoho * 2256 1.5 christos * TPM2 - Trusted Platform Module (TPM) 2.0 Hardware Interface Table 2257 1.5 christos * 2258 1.5 christos ******************************************************************************/ 2259 1.5 christos 2260 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoTpm2[] = 2261 1.5 christos { 2262 1.5 christos {ACPI_DMT_UINT32, ACPI_TPM2_OFFSET (Flags), "Flags", 0}, 2263 1.5 christos {ACPI_DMT_UINT64, ACPI_TPM2_OFFSET (ControlAddress), "Control Address", 0}, 2264 1.5 christos {ACPI_DMT_UINT32, ACPI_TPM2_OFFSET (StartMethod), "Start Method", 0}, 2265 1.5 christos ACPI_DMT_TERMINATOR 2266 1.5 christos }; 2267 1.5 christos 2268 1.5 christos 2269 1.5 christos /******************************************************************************* 2270 1.5 christos * 2271 1.1 jruoho * UEFI - UEFI Boot optimization Table 2272 1.1 jruoho * 2273 1.1 jruoho ******************************************************************************/ 2274 1.1 jruoho 2275 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] = 2276 1.1 jruoho { 2277 1.3 jruoho {ACPI_DMT_UUID, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier", 0}, 2278 1.1 jruoho {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset", 0}, 2279 1.1 jruoho ACPI_DMT_TERMINATOR 2280 1.1 jruoho }; 2281 1.1 jruoho 2282 1.1 jruoho 2283 1.1 jruoho /******************************************************************************* 2284 1.1 jruoho * 2285 1.5 christos * VRTC - Virtual Real Time Clock Table 2286 1.5 christos * 2287 1.5 christos ******************************************************************************/ 2288 1.5 christos 2289 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoVrtc[] = 2290 1.5 christos { 2291 1.5 christos ACPI_DMT_TERMINATOR 2292 1.5 christos }; 2293 1.5 christos 2294 1.5 christos /* VRTC Subtables - VRTC Entry */ 2295 1.5 christos 2296 1.5 christos ACPI_DMTABLE_INFO AcpiDmTableInfoVrtc0[] = 2297 1.5 christos { 2298 1.5 christos {ACPI_DMT_GAS, ACPI_VRTC0_OFFSET (PhysicalAddress), "PhysicalAddress", 0}, 2299 1.5 christos {ACPI_DMT_UINT32, ACPI_VRTC0_OFFSET (Irq), "IRQ", 0}, 2300 1.5 christos ACPI_DMT_TERMINATOR 2301 1.5 christos }; 2302 1.5 christos 2303 1.5 christos 2304 1.5 christos /******************************************************************************* 2305 1.5 christos * 2306 1.1 jruoho * WAET - Windows ACPI Emulated devices Table 2307 1.1 jruoho * 2308 1.1 jruoho ******************************************************************************/ 2309 1.1 jruoho 2310 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] = 2311 1.1 jruoho { 2312 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2313 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack", 0}, 2314 1.1 jruoho {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only", 0}, 2315 1.1 jruoho ACPI_DMT_TERMINATOR 2316 1.1 jruoho }; 2317 1.1 jruoho 2318 1.1 jruoho 2319 1.1 jruoho /******************************************************************************* 2320 1.1 jruoho * 2321 1.1 jruoho * WDAT - Watchdog Action Table 2322 1.1 jruoho * 2323 1.1 jruoho ******************************************************************************/ 2324 1.1 jruoho 2325 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] = 2326 1.1 jruoho { 2327 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length", DT_LENGTH}, 2328 1.1 jruoho {ACPI_DMT_UINT16, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment", 0}, 2329 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus", 0}, 2330 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device", 0}, 2331 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function", 0}, 2332 1.1 jruoho {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved", 0}, 2333 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period", 0}, 2334 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count", 0}, 2335 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count", 0}, 2336 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2337 1.1 jruoho {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled", 0}, 2338 1.1 jruoho {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep", 0}, 2339 1.1 jruoho {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved", 0}, 2340 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count", 0}, 2341 1.1 jruoho ACPI_DMT_TERMINATOR 2342 1.1 jruoho }; 2343 1.1 jruoho 2344 1.1 jruoho /* WDAT Subtables - Watchdog Instruction Entries */ 2345 1.1 jruoho 2346 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] = 2347 1.1 jruoho { 2348 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action", 0}, 2349 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction", 0}, 2350 1.1 jruoho {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved", 0}, 2351 1.1 jruoho {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region", 0}, 2352 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value", 0}, 2353 1.1 jruoho {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask", 0}, 2354 1.1 jruoho ACPI_DMT_TERMINATOR 2355 1.1 jruoho }; 2356 1.1 jruoho 2357 1.1 jruoho 2358 1.1 jruoho /******************************************************************************* 2359 1.1 jruoho * 2360 1.3 jruoho * WDDT - Watchdog Description Table 2361 1.3 jruoho * 2362 1.3 jruoho ******************************************************************************/ 2363 1.3 jruoho 2364 1.3 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoWddt[] = 2365 1.3 jruoho { 2366 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (SpecVersion), "Specification Version", 0}, 2367 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (TableVersion), "Table Version", 0}, 2368 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 2369 1.3 jruoho {ACPI_DMT_GAS, ACPI_WDDT_OFFSET (Address), "Timer Register", 0}, 2370 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MaxCount), "Max Count", 0}, 2371 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MinCount), "Min Count", 0}, 2372 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Period), "Period", 0}, 2373 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Status), "Status (decoded below)", 0}, 2374 1.3 jruoho 2375 1.3 jruoho /* Status Flags byte 0 */ 2376 1.3 jruoho 2377 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Status,0), "Available", 0}, 2378 1.3 jruoho {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Status,0), "Active", 0}, 2379 1.3 jruoho {ACPI_DMT_FLAG2, ACPI_WDDT_FLAG_OFFSET (Status,0), "OS Owns", 0}, 2380 1.3 jruoho 2381 1.3 jruoho /* Status Flags byte 1 */ 2382 1.3 jruoho 2383 1.3 jruoho {ACPI_DMT_FLAG3, ACPI_WDDT_FLAG_OFFSET (Status,1), "User Reset", 0}, 2384 1.3 jruoho {ACPI_DMT_FLAG4, ACPI_WDDT_FLAG_OFFSET (Status,1), "Timeout Reset", 0}, 2385 1.3 jruoho {ACPI_DMT_FLAG5, ACPI_WDDT_FLAG_OFFSET (Status,1), "Power Fail Reset", 0}, 2386 1.3 jruoho {ACPI_DMT_FLAG6, ACPI_WDDT_FLAG_OFFSET (Status,1), "Unknown Reset", 0}, 2387 1.3 jruoho 2388 1.3 jruoho {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Capability), "Capability (decoded below)", 0}, 2389 1.3 jruoho 2390 1.3 jruoho /* Capability Flags byte 0 */ 2391 1.3 jruoho 2392 1.3 jruoho {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Auto Reset", 0}, 2393 1.3 jruoho {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Timeout Alert", 0}, 2394 1.3 jruoho ACPI_DMT_TERMINATOR 2395 1.3 jruoho }; 2396 1.3 jruoho 2397 1.3 jruoho 2398 1.3 jruoho /******************************************************************************* 2399 1.3 jruoho * 2400 1.1 jruoho * WDRT - Watchdog Resource Table 2401 1.1 jruoho * 2402 1.1 jruoho ******************************************************************************/ 2403 1.1 jruoho 2404 1.1 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = 2405 1.1 jruoho { 2406 1.1 jruoho {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register", 0}, 2407 1.1 jruoho {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register", 0}, 2408 1.1 jruoho {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID", 0}, 2409 1.1 jruoho {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 2410 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus", 0}, 2411 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device", 0}, 2412 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function", 0}, 2413 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment", 0}, 2414 1.1 jruoho {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count", 0}, 2415 1.1 jruoho {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units", 0}, 2416 1.1 jruoho ACPI_DMT_TERMINATOR 2417 1.1 jruoho }; 2418 1.1 jruoho 2419 1.5 christos /*! [Begin] no source code translation */ 2420 1.5 christos 2421 1.3 jruoho /* 2422 1.5 christos * Generic types (used in UEFI and custom tables) 2423 1.3 jruoho * 2424 1.3 jruoho * Examples: 2425 1.3 jruoho * 2426 1.3 jruoho * Buffer : cc 04 ff bb 2427 1.3 jruoho * UINT8 : 11 2428 1.3 jruoho * UINT16 : 1122 2429 1.3 jruoho * UINT24 : 112233 2430 1.3 jruoho * UINT32 : 11223344 2431 1.3 jruoho * UINT56 : 11223344556677 2432 1.3 jruoho * UINT64 : 1122334455667788 2433 1.3 jruoho * 2434 1.3 jruoho * String : "This is string" 2435 1.3 jruoho * Unicode : "This string encoded to Unicode" 2436 1.3 jruoho * 2437 1.3 jruoho * GUID : 11223344-5566-7788-99aa-bbccddeeff00 2438 1.3 jruoho * DevicePath : "\PciRoot(0)\Pci(0x1f,1)\Usb(0,0)" 2439 1.3 jruoho */ 2440 1.3 jruoho 2441 1.5 christos #define ACPI_DM_GENERIC_ENTRY(FieldType, FieldName) \ 2442 1.3 jruoho {{FieldType, 0, FieldName, 0}, ACPI_DMT_TERMINATOR} 2443 1.3 jruoho 2444 1.3 jruoho ACPI_DMTABLE_INFO AcpiDmTableInfoGeneric[][2] = 2445 1.3 jruoho { 2446 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT8, "UINT8"), 2447 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT16, "UINT16"), 2448 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT24, "UINT24"), 2449 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT32, "UINT32"), 2450 1.5 christos ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT40, "UINT40"), 2451 1.5 christos ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT48, "UINT48"), 2452 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT56, "UINT56"), 2453 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT64, "UINT64"), 2454 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "String"), 2455 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UNICODE, "Unicode"), 2456 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_BUFFER, "Buffer"), 2457 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UUID, "GUID"), 2458 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "DevicePath"), 2459 1.3 jruoho ACPI_DM_GENERIC_ENTRY (ACPI_DMT_LABEL, "Label"), 2460 1.3 jruoho {ACPI_DMT_TERMINATOR} 2461 1.3 jruoho }; 2462 1.5 christos /*! [End] no source code translation !*/ 2463
Indexes created Fri Sep 26 08:10:20 GMT 2025