dmtbinfo.c revision 1.3
1 /****************************************************************************** 2 * 3 * Module Name: dmtbinfo - Table info for non-AML tables 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2011, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #include "acpi.h" 45 #include "accommon.h" 46 #include "acdisasm.h" 47 48 /* This module used for application-level code only */ 49 50 #define _COMPONENT ACPI_CA_DISASSEMBLER 51 ACPI_MODULE_NAME ("dmtbinfo") 52 53 /* 54 * Macros used to generate offsets to specific table fields 55 */ 56 #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f) 57 #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) 58 #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f) 59 #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f) 60 #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f) 61 #define ACPI_BERT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BERT,f) 62 #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f) 63 #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f) 64 #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f) 65 #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f) 66 #define ACPI_EINJ_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_EINJ,f) 67 #define ACPI_ERST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ERST,f) 68 #define ACPI_HEST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEST,f) 69 #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f) 70 #define ACPI_IVRS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_IVRS,f) 71 #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f) 72 #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f) 73 #define ACPI_MCHI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCHI,f) 74 #define ACPI_MSCT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MSCT,f) 75 #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f) 76 #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f) 77 #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f) 78 #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f) 79 #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f) 80 #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f) 81 #define ACPI_UEFI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_UEFI,f) 82 #define ACPI_WAET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WAET,f) 83 #define ACPI_WDAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDAT,f) 84 #define ACPI_WDDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDDT,f) 85 #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f) 86 87 /* Subtables */ 88 89 #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f) 90 #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f) 91 #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) 92 #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f) 93 #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) 94 #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f) 95 #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) 96 #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f) 97 #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) 98 #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) 99 #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) 100 #define ACPI_DMAR2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_ATSR,f) 101 #define ACPI_DMAR3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RHSA,f) 102 #define ACPI_EINJ0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 103 #define ACPI_ERST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 104 #define ACPI_HEST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f) 105 #define ACPI_HEST1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f) 106 #define ACPI_HEST2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_NMI,f) 107 #define ACPI_HEST6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f) 108 #define ACPI_HEST7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER,f) 109 #define ACPI_HEST8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f) 110 #define ACPI_HEST9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_GENERIC,f) 111 #define ACPI_HESTN_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_NOTIFY,f) 112 #define ACPI_HESTB_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f) 113 #define ACPI_IVRSH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HEADER,f) 114 #define ACPI_IVRS0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f) 115 #define ACPI_IVRS1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_MEMORY,f) 116 #define ACPI_IVRSD_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f) 117 #define ACPI_IVRS8A_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f) 118 #define ACPI_IVRS8B_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f) 119 #define ACPI_IVRS8C_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f) 120 #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) 121 #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) 122 #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) 123 #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) 124 #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) 125 #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) 126 #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) 127 #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) 128 #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) 129 #define ACPI_MADT9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f) 130 #define ACPI_MADT10_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f) 131 #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 132 #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) 133 #define ACPI_MSCT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f) 134 #define ACPI_SRATH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 135 #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) 136 #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) 137 #define ACPI_SRAT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f) 138 #define ACPI_WDAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WDAT_ENTRY,f) 139 140 /* 141 * Simplify access to flag fields by breaking them up into bytes 142 */ 143 #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o) 144 145 /* Flags */ 146 147 #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) 148 #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) 149 #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) 150 #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) 151 #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) 152 #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o) 153 #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) 154 #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) 155 #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) 156 #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) 157 #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) 158 #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) 159 #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) 160 #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o) 161 #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o) 162 #define ACPI_WDDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o) 163 #define ACPI_EINJ0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) 164 #define ACPI_ERST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) 165 #define ACPI_HEST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o) 166 #define ACPI_HEST1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o) 167 #define ACPI_HEST6_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o) 168 169 /* 170 * Required terminator for all tables below 171 */ 172 #define ACPI_DMT_TERMINATOR {ACPI_DMT_EXIT, 0, NULL, 0} 173 174 175 /* 176 * ACPI Table Information, used to dump formatted ACPI tables 177 * 178 * Each entry is of the form: <Field Type, Field Offset, Field Name> 179 */ 180 181 /******************************************************************************* 182 * 183 * Common ACPI table header 184 * 185 ******************************************************************************/ 186 187 ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = 188 { 189 {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature", 0}, 190 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length", DT_LENGTH}, 191 {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision", 0}, 192 {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum", 0}, 193 {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID", 0}, 194 {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID", 0}, 195 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision", 0}, 196 {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID", 0}, 197 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision", 0}, 198 ACPI_DMT_TERMINATOR 199 }; 200 201 202 /******************************************************************************* 203 * 204 * GAS - Generic Address Structure 205 * 206 ******************************************************************************/ 207 208 ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = 209 { 210 {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID", 0}, 211 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width", 0}, 212 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset", 0}, 213 {ACPI_DMT_ACCWIDTH, ACPI_GAS_OFFSET (AccessWidth), "Encoded Access Width", 0}, 214 {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address", 0}, 215 ACPI_DMT_TERMINATOR 216 }; 217 218 219 /******************************************************************************* 220 * 221 * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 222 * 223 ******************************************************************************/ 224 225 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = 226 { 227 {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature", 0}, 228 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum", 0}, 229 {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID", 0}, 230 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision", 0}, 231 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address", 0}, 232 ACPI_DMT_TERMINATOR 233 }; 234 235 /* ACPI 2.0+ Extensions */ 236 237 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = 238 { 239 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length", DT_LENGTH}, 240 {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address", 0}, 241 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum", 0}, 242 {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved", 0}, 243 ACPI_DMT_TERMINATOR 244 }; 245 246 247 /******************************************************************************* 248 * 249 * FACS - Firmware ACPI Control Structure 250 * 251 ******************************************************************************/ 252 253 ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = 254 { 255 {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature", 0}, 256 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length", DT_LENGTH}, 257 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature", 0}, 258 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector", 0}, 259 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock", 0}, 260 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 261 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present", 0}, 262 {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)", 0}, 263 {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector", 0}, 264 {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version", 0}, 265 {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved", 0}, 266 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)", DT_FLAG}, 267 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)", 0}, 268 ACPI_DMT_TERMINATOR 269 }; 270 271 272 /******************************************************************************* 273 * 274 * FADT - Fixed ACPI Description Table (Signature is FACP) 275 * 276 ******************************************************************************/ 277 278 /* ACPI 1.0 FADT (Version 1) */ 279 280 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = 281 { 282 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address", 0}, 283 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address", DT_NON_ZERO}, 284 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model", 0}, 285 {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile", 0}, 286 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt", 0}, 287 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port", 0}, 288 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value", 0}, 289 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value", 0}, 290 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command", 0}, 291 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control", 0}, 292 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address", 0}, 293 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address", 0}, 294 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address", 0}, 295 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address", 0}, 296 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address", 0}, 297 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address", 0}, 298 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address", 0}, 299 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address", 0}, 300 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length", 0}, 301 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length", 0}, 302 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length", 0}, 303 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length", 0}, 304 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length", 0}, 305 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length", 0}, 306 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset", 0}, 307 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support", 0}, 308 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0}, 309 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0}, 310 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size", 0}, 311 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride", 0}, 312 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset", 0}, 313 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width", 0}, 314 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index", 0}, 315 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index", 0}, 316 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index", 0}, 317 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)", DT_FLAG}, 318 319 /* Boot Architecture Flags byte 0 */ 320 321 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)", 0}, 322 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)", 0}, 323 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)", 0}, 324 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)", 0}, 325 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)", 0}, 326 327 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved", 0}, 328 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 329 330 /* Flags byte 0 */ 331 332 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)", 0}, 333 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)", 0}, 334 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)", 0}, 335 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)", 0}, 336 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)", 0}, 337 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)", 0}, 338 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)", 0}, 339 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)", 0}, 340 341 /* Flags byte 1 */ 342 343 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)", 0}, 344 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)", 0}, 345 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)", 0}, 346 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)", 0}, 347 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)", 0}, 348 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)", 0}, 349 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)", 0}, 350 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)", 0}, 351 352 /* Flags byte 2 */ 353 354 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)", 0}, 355 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)", 0}, 356 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)", 0}, 357 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)", 0}, 358 ACPI_DMT_TERMINATOR 359 }; 360 361 /* ACPI 1.0 MS Extensions (FADT version 2) */ 362 363 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = 364 { 365 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, 366 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, 367 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0}, 368 ACPI_DMT_TERMINATOR 369 }; 370 371 /* ACPI 2.0+ Extensions (FADT version 3+) */ 372 373 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] = 374 { 375 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, 376 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, 377 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0}, 378 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address", 0}, 379 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address", 0}, 380 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block", 0}, 381 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block", 0}, 382 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block", 0}, 383 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block", 0}, 384 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block", 0}, 385 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block", 0}, 386 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block", 0}, 387 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block", 0}, 388 ACPI_DMT_TERMINATOR 389 }; 390 391 392 /* 393 * Remaining tables are not consumed directly by the ACPICA subsystem 394 */ 395 396 /******************************************************************************* 397 * 398 * ASF - Alert Standard Format table (Signature "ASF!") 399 * 400 ******************************************************************************/ 401 402 /* Common Subtable header (one per Subtable) */ 403 404 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 405 { 406 {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0}, 407 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0}, 408 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH}, 409 ACPI_DMT_TERMINATOR 410 }; 411 412 /* 0: ASF Information */ 413 414 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 415 { 416 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0}, 417 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0}, 418 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0}, 419 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0}, 420 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0}, 421 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0}, 422 ACPI_DMT_TERMINATOR 423 }; 424 425 /* 1: ASF Alerts */ 426 427 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 428 { 429 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0}, 430 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0}, 431 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0}, 432 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0}, 433 ACPI_DMT_TERMINATOR 434 }; 435 436 /* 1a: ASF Alert data */ 437 438 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 439 { 440 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0}, 441 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0}, 442 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0}, 443 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0}, 444 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0}, 445 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0}, 446 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0}, 447 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0}, 448 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0}, 449 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0}, 450 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0}, 451 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0}, 452 ACPI_DMT_TERMINATOR 453 }; 454 455 /* 2: ASF Remote Control */ 456 457 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 458 { 459 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0}, 460 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0}, 461 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0}, 462 ACPI_DMT_TERMINATOR 463 }; 464 465 /* 2a: ASF Control data */ 466 467 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 468 { 469 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0}, 470 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0}, 471 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0}, 472 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0}, 473 ACPI_DMT_TERMINATOR 474 }; 475 476 /* 3: ASF RMCP Boot Options */ 477 478 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 479 { 480 {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0}, 481 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0}, 482 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0}, 483 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0}, 484 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0}, 485 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0}, 486 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0}, 487 ACPI_DMT_TERMINATOR 488 }; 489 490 /* 4: ASF Address */ 491 492 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 493 { 494 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0}, 495 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT}, 496 ACPI_DMT_TERMINATOR 497 }; 498 499 500 /******************************************************************************* 501 * 502 * BERT - Boot Error Record table 503 * 504 ******************************************************************************/ 505 506 ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = 507 { 508 {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0}, 509 {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0}, 510 ACPI_DMT_TERMINATOR 511 }; 512 513 514 /******************************************************************************* 515 * 516 * BOOT - Simple Boot Flag Table 517 * 518 ******************************************************************************/ 519 520 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 521 { 522 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0}, 523 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0}, 524 ACPI_DMT_TERMINATOR 525 }; 526 527 528 /******************************************************************************* 529 * 530 * CPEP - Corrected Platform Error Polling table 531 * 532 ******************************************************************************/ 533 534 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 535 { 536 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0}, 537 ACPI_DMT_TERMINATOR 538 }; 539 540 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 541 { 542 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0}, 543 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH}, 544 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0}, 545 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0}, 546 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0}, 547 ACPI_DMT_TERMINATOR 548 }; 549 550 551 /******************************************************************************* 552 * 553 * DBGP - Debug Port 554 * 555 ******************************************************************************/ 556 557 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 558 { 559 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0}, 560 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0}, 561 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0}, 562 ACPI_DMT_TERMINATOR 563 }; 564 565 566 /******************************************************************************* 567 * 568 * DMAR - DMA Remapping table 569 * 570 ******************************************************************************/ 571 572 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 573 { 574 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0}, 575 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0}, 576 ACPI_DMT_TERMINATOR 577 }; 578 579 /* Common Subtable header (one per Subtable) */ 580 581 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 582 { 583 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0}, 584 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH}, 585 ACPI_DMT_TERMINATOR 586 }; 587 588 /* Common device scope entry */ 589 590 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 591 { 592 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type", 0}, 593 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH}, 594 {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0}, 595 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0}, 596 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0}, 597 ACPI_DMT_TERMINATOR 598 }; 599 600 /* DMAR Subtables */ 601 602 /* 0: Hardware Unit Definition */ 603 604 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 605 { 606 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0}, 607 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0}, 608 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0}, 609 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0}, 610 ACPI_DMT_TERMINATOR 611 }; 612 613 /* 1: Reserved Memory Definition */ 614 615 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 616 { 617 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0}, 618 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0}, 619 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0}, 620 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0}, 621 ACPI_DMT_TERMINATOR 622 }; 623 624 /* 2: Root Port ATS Capability Definition */ 625 626 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = 627 { 628 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0}, 629 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0}, 630 {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0}, 631 ACPI_DMT_TERMINATOR 632 }; 633 634 /* 3: Remapping Hardware Static Affinity Structure */ 635 636 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = 637 { 638 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0}, 639 {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0}, 640 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0}, 641 ACPI_DMT_TERMINATOR 642 }; 643 644 645 /******************************************************************************* 646 * 647 * ECDT - Embedded Controller Boot Resources Table 648 * 649 ******************************************************************************/ 650 651 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 652 { 653 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0}, 654 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0}, 655 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0}, 656 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0}, 657 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0}, 658 ACPI_DMT_TERMINATOR 659 }; 660 661 662 /******************************************************************************* 663 * 664 * EINJ - Error Injection table 665 * 666 ******************************************************************************/ 667 668 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = 669 { 670 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0}, 671 {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0}, 672 {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0}, 673 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0}, 674 ACPI_DMT_TERMINATOR 675 }; 676 677 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = 678 { 679 {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0}, 680 {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0}, 681 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 682 {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 683 684 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0}, 685 {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0}, 686 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0}, 687 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0}, 688 ACPI_DMT_TERMINATOR 689 }; 690 691 692 /******************************************************************************* 693 * 694 * ERST - Error Record Serialization table 695 * 696 ******************************************************************************/ 697 698 ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = 699 { 700 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0}, 701 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0}, 702 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0}, 703 ACPI_DMT_TERMINATOR 704 }; 705 706 ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] = 707 { 708 {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0}, 709 {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0}, 710 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 711 {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 712 713 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0}, 714 {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0}, 715 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0}, 716 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0}, 717 ACPI_DMT_TERMINATOR 718 }; 719 720 721 /******************************************************************************* 722 * 723 * HEST - Hardware Error Source table 724 * 725 ******************************************************************************/ 726 727 ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = 728 { 729 {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0}, 730 ACPI_DMT_TERMINATOR 731 }; 732 733 /* Common HEST structures for subtables */ 734 735 #define ACPI_DM_HEST_HEADER \ 736 {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \ 737 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0} 738 739 #define ACPI_DM_HEST_AER \ 740 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \ 741 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \ 742 {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \ 743 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \ 744 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \ 745 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \ 746 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \ 747 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \ 748 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \ 749 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \ 750 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \ 751 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \ 752 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \ 753 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \ 754 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0} 755 756 757 /* HEST Subtables */ 758 759 /* 0: IA32 Machine Check Exception */ 760 761 ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = 762 { 763 ACPI_DM_HEST_HEADER, 764 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0}, 765 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 766 {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 767 768 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0}, 769 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 770 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 771 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0}, 772 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0}, 773 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 774 {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0}, 775 ACPI_DMT_TERMINATOR 776 }; 777 778 /* 1: IA32 Corrected Machine Check */ 779 780 ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = 781 { 782 ACPI_DM_HEST_HEADER, 783 {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0}, 784 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 785 {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 786 787 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0}, 788 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 789 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 790 {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0}, 791 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 792 {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0}, 793 ACPI_DMT_TERMINATOR 794 }; 795 796 /* 2: IA32 Non-Maskable Interrupt */ 797 798 ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = 799 { 800 ACPI_DM_HEST_HEADER, 801 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0}, 802 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 803 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 804 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 805 ACPI_DMT_TERMINATOR 806 }; 807 808 /* 6: PCI Express Root Port AER */ 809 810 ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = 811 { 812 ACPI_DM_HEST_HEADER, 813 ACPI_DM_HEST_AER, 814 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0}, 815 ACPI_DMT_TERMINATOR 816 }; 817 818 /* 7: PCI Express AER (AER Endpoint) */ 819 820 ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = 821 { 822 ACPI_DM_HEST_HEADER, 823 ACPI_DM_HEST_AER, 824 ACPI_DMT_TERMINATOR 825 }; 826 827 /* 8: PCI Express/PCI-X Bridge AER */ 828 829 ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = 830 { 831 ACPI_DM_HEST_HEADER, 832 ACPI_DM_HEST_AER, 833 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0}, 834 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0}, 835 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0}, 836 ACPI_DMT_TERMINATOR 837 }; 838 839 /* 9: Generic Hardware Error Source */ 840 841 ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = 842 { 843 ACPI_DM_HEST_HEADER, 844 {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0}, 845 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0}, 846 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0}, 847 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 848 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 849 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 850 {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, 851 {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0}, 852 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, 853 ACPI_DMT_TERMINATOR 854 }; 855 856 ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = 857 { 858 {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0}, 859 {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH}, 860 {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0}, 861 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0}, 862 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0}, 863 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0}, 864 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0}, 865 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0}, 866 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0}, 867 ACPI_DMT_TERMINATOR 868 }; 869 870 871 /* 872 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 873 * ACPI_HEST_IA_CORRECTED structures. 874 */ 875 ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = 876 { 877 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0}, 878 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0}, 879 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0}, 880 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0}, 881 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0}, 882 {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0}, 883 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0}, 884 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0}, 885 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0}, 886 ACPI_DMT_TERMINATOR 887 }; 888 889 890 /******************************************************************************* 891 * 892 * HPET - High Precision Event Timer table 893 * 894 ******************************************************************************/ 895 896 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 897 { 898 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0}, 899 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0}, 900 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0}, 901 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0}, 902 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 903 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0}, 904 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0}, 905 ACPI_DMT_TERMINATOR 906 }; 907 908 909 /******************************************************************************* 910 * 911 * IVRS - I/O Virtualization Reporting Structure 912 * 913 ******************************************************************************/ 914 915 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = 916 { 917 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0}, 918 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0}, 919 ACPI_DMT_TERMINATOR 920 }; 921 922 /* Common Subtable header (one per Subtable) */ 923 924 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] = 925 { 926 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 927 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0}, 928 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, 929 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, 930 ACPI_DMT_TERMINATOR 931 }; 932 933 /* IVRS subtables */ 934 935 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ 936 937 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] = 938 { 939 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0}, 940 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0}, 941 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, 942 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0}, 943 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0}, 944 ACPI_DMT_TERMINATOR 945 }; 946 947 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */ 948 949 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] = 950 { 951 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0}, 952 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0}, 953 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0}, 954 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0}, 955 ACPI_DMT_TERMINATOR 956 }; 957 958 /* Device entry header for IVHD block */ 959 960 #define ACPI_DMT_IVRS_DE_HEADER \ 961 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \ 962 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \ 963 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0} 964 965 /* 4-byte device entry */ 966 967 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = 968 { 969 ACPI_DMT_IVRS_DE_HEADER, 970 {ACPI_DMT_EXIT, 0, NULL, 0}, 971 }; 972 973 /* 8-byte device entry */ 974 975 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = 976 { 977 ACPI_DMT_IVRS_DE_HEADER, 978 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0}, 979 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0}, 980 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0}, 981 ACPI_DMT_TERMINATOR 982 }; 983 984 /* 8-byte device entry */ 985 986 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = 987 { 988 ACPI_DMT_IVRS_DE_HEADER, 989 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0}, 990 ACPI_DMT_TERMINATOR 991 }; 992 993 /* 8-byte device entry */ 994 995 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = 996 { 997 ACPI_DMT_IVRS_DE_HEADER, 998 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0}, 999 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0}, 1000 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0}, 1001 ACPI_DMT_TERMINATOR 1002 }; 1003 1004 1005 /******************************************************************************* 1006 * 1007 * MADT - Multiple APIC Description Table and subtables 1008 * 1009 ******************************************************************************/ 1010 1011 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 1012 { 1013 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0}, 1014 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1015 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0}, 1016 ACPI_DMT_TERMINATOR 1017 }; 1018 1019 /* Common Subtable header (one per Subtable) */ 1020 1021 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 1022 { 1023 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0}, 1024 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH}, 1025 ACPI_DMT_TERMINATOR 1026 }; 1027 1028 /* MADT Subtables */ 1029 1030 /* 0: processor APIC */ 1031 1032 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 1033 { 1034 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0}, 1035 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0}, 1036 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1037 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1038 ACPI_DMT_TERMINATOR 1039 }; 1040 1041 /* 1: IO APIC */ 1042 1043 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 1044 { 1045 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0}, 1046 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0}, 1047 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0}, 1048 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0}, 1049 ACPI_DMT_TERMINATOR 1050 }; 1051 1052 /* 2: Interrupt Override */ 1053 1054 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 1055 { 1056 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0}, 1057 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0}, 1058 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0}, 1059 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1060 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1061 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1062 ACPI_DMT_TERMINATOR 1063 }; 1064 1065 /* 3: NMI Sources */ 1066 1067 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 1068 { 1069 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1070 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1071 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1072 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0}, 1073 ACPI_DMT_TERMINATOR 1074 }; 1075 1076 /* 4: Local APIC NMI */ 1077 1078 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 1079 { 1080 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0}, 1081 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1082 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1083 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1084 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0}, 1085 ACPI_DMT_TERMINATOR 1086 }; 1087 1088 /* 5: Address Override */ 1089 1090 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 1091 { 1092 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0}, 1093 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0}, 1094 ACPI_DMT_TERMINATOR 1095 }; 1096 1097 /* 6: I/O Sapic */ 1098 1099 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 1100 { 1101 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0}, 1102 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0}, 1103 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 1104 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0}, 1105 ACPI_DMT_TERMINATOR 1106 }; 1107 1108 /* 7: Local Sapic */ 1109 1110 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 1111 { 1112 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0}, 1113 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0}, 1114 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0}, 1115 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0}, 1116 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1117 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1118 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0}, 1119 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0}, 1120 ACPI_DMT_TERMINATOR 1121 }; 1122 1123 /* 8: Platform Interrupt Source */ 1124 1125 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 1126 { 1127 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1128 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1129 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1130 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0}, 1131 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0}, 1132 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0}, 1133 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0}, 1134 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0}, 1135 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1136 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0}, 1137 ACPI_DMT_TERMINATOR 1138 }; 1139 1140 /* 9: Processor Local X2_APIC (ACPI 4.0) */ 1141 1142 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = 1143 { 1144 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0}, 1145 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0}, 1146 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1147 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1148 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0}, 1149 ACPI_DMT_TERMINATOR 1150 }; 1151 1152 /* 10: Local X2_APIC NMI (ACPI 4.0) */ 1153 1154 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = 1155 { 1156 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1157 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1158 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1159 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0}, 1160 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0}, 1161 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0}, 1162 ACPI_DMT_TERMINATOR 1163 }; 1164 1165 1166 /******************************************************************************* 1167 * 1168 * MCFG - PCI Memory Mapped Configuration table and Subtable 1169 * 1170 ******************************************************************************/ 1171 1172 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 1173 { 1174 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0}, 1175 ACPI_DMT_TERMINATOR 1176 }; 1177 1178 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 1179 { 1180 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0}, 1181 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0}, 1182 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0}, 1183 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0}, 1184 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0}, 1185 ACPI_DMT_TERMINATOR 1186 }; 1187 1188 1189 /******************************************************************************* 1190 * 1191 * MCHI - Management Controller Host Interface table 1192 * 1193 ******************************************************************************/ 1194 1195 ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = 1196 { 1197 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0}, 1198 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0}, 1199 {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0}, 1200 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0}, 1201 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0}, 1202 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0}, 1203 {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, 1204 {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0}, 1205 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0}, 1206 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0}, 1207 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0}, 1208 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0}, 1209 ACPI_DMT_TERMINATOR 1210 }; 1211 1212 1213 /******************************************************************************* 1214 * 1215 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1216 * 1217 ******************************************************************************/ 1218 1219 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = 1220 { 1221 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0}, 1222 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0}, 1223 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0}, 1224 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0}, 1225 ACPI_DMT_TERMINATOR 1226 }; 1227 1228 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1229 1230 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = 1231 { 1232 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0}, 1233 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH}, 1234 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0}, 1235 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0}, 1236 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0}, 1237 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0}, 1238 ACPI_DMT_TERMINATOR 1239 }; 1240 1241 1242 /******************************************************************************* 1243 * 1244 * SBST - Smart Battery Specification Table 1245 * 1246 ******************************************************************************/ 1247 1248 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 1249 { 1250 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0}, 1251 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0}, 1252 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0}, 1253 ACPI_DMT_TERMINATOR 1254 }; 1255 1256 1257 /******************************************************************************* 1258 * 1259 * SLIC - Software Licensing Description Table. NOT FULLY IMPLEMENTED, do not 1260 * have the table definition. 1261 * 1262 ******************************************************************************/ 1263 1264 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic[] = 1265 { 1266 ACPI_DMT_TERMINATOR 1267 }; 1268 1269 1270 /******************************************************************************* 1271 * 1272 * SLIT - System Locality Information Table 1273 * 1274 ******************************************************************************/ 1275 1276 ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = 1277 { 1278 {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities", 0}, 1279 ACPI_DMT_TERMINATOR 1280 }; 1281 1282 1283 /******************************************************************************* 1284 * 1285 * SPCR - Serial Port Console Redirection table 1286 * 1287 ******************************************************************************/ 1288 1289 ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = 1290 { 1291 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type", 0}, 1292 {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved", 0}, 1293 {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register", 0}, 1294 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type", 0}, 1295 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ", 0}, 1296 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt", 0}, 1297 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate", 0}, 1298 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity", 0}, 1299 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits", 0}, 1300 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control", 0}, 1301 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type", 0}, 1302 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, 1303 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID", 0}, 1304 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 1305 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus", 0}, 1306 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device", 0}, 1307 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function", 0}, 1308 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags", 0}, 1309 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment", 0}, 1310 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, 1311 ACPI_DMT_TERMINATOR 1312 }; 1313 1314 1315 /******************************************************************************* 1316 * 1317 * SPMI - Server Platform Management Interface table 1318 * 1319 ******************************************************************************/ 1320 1321 ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = 1322 { 1323 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type", 0}, 1324 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved", 0}, 1325 {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version", 0}, 1326 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type", 0}, 1327 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number", 0}, 1328 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved", 0}, 1329 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag", 0}, 1330 {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt", 0}, 1331 {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register", 0}, 1332 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment", 0}, 1333 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus", 0}, 1334 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device", 0}, 1335 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function", 0}, 1336 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved", 0}, 1337 ACPI_DMT_TERMINATOR 1338 }; 1339 1340 1341 /******************************************************************************* 1342 * 1343 * SRAT - System Resource Affinity Table and Subtables 1344 * 1345 ******************************************************************************/ 1346 1347 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = 1348 { 1349 {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision", 0}, 1350 {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved", 0}, 1351 ACPI_DMT_TERMINATOR 1352 }; 1353 1354 /* Common Subtable header (one per Subtable) */ 1355 1356 ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] = 1357 { 1358 {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type", 0}, 1359 {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length", DT_LENGTH}, 1360 ACPI_DMT_TERMINATOR 1361 }; 1362 1363 /* SRAT Subtables */ 1364 1365 /* 0: Processor Local APIC/SAPIC Affinity */ 1366 1367 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = 1368 { 1369 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)", 0}, 1370 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID", 0}, 1371 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1372 {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled", 0}, 1373 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID", 0}, 1374 {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)", 0}, 1375 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (ClockDomain), "Clock Domain", 0}, 1376 ACPI_DMT_TERMINATOR 1377 }; 1378 1379 /* 1: Memory Affinity */ 1380 1381 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = 1382 { 1383 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain", 0}, 1384 {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved1", 0}, 1385 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address", 0}, 1386 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length", 0}, 1387 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved2", 0}, 1388 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1389 {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled", 0}, 1390 {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable", 0}, 1391 {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile", 0}, 1392 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved3", 0}, 1393 ACPI_DMT_TERMINATOR 1394 }; 1395 1396 /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ 1397 1398 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] = 1399 { 1400 {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved1", 0}, 1401 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain", 0}, 1402 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID", 0}, 1403 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1404 {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled", 0}, 1405 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain", 0}, 1406 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved2", 0}, 1407 ACPI_DMT_TERMINATOR 1408 }; 1409 1410 1411 /******************************************************************************* 1412 * 1413 * TCPA - Trusted Computing Platform Alliance table 1414 * 1415 ******************************************************************************/ 1416 1417 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] = 1418 { 1419 {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved", 0}, 1420 {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length", 0}, 1421 {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address", 0}, 1422 ACPI_DMT_TERMINATOR 1423 }; 1424 1425 1426 /******************************************************************************* 1427 * 1428 * UEFI - UEFI Boot optimization Table 1429 * 1430 ******************************************************************************/ 1431 1432 ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] = 1433 { 1434 {ACPI_DMT_UUID, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier", 0}, 1435 {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset", 0}, 1436 ACPI_DMT_TERMINATOR 1437 }; 1438 1439 1440 /******************************************************************************* 1441 * 1442 * WAET - Windows ACPI Emulated devices Table 1443 * 1444 ******************************************************************************/ 1445 1446 ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] = 1447 { 1448 {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1449 {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack", 0}, 1450 {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only", 0}, 1451 ACPI_DMT_TERMINATOR 1452 }; 1453 1454 1455 /******************************************************************************* 1456 * 1457 * WDAT - Watchdog Action Table 1458 * 1459 ******************************************************************************/ 1460 1461 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] = 1462 { 1463 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length", DT_LENGTH}, 1464 {ACPI_DMT_UINT16, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment", 0}, 1465 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus", 0}, 1466 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device", 0}, 1467 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function", 0}, 1468 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved", 0}, 1469 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period", 0}, 1470 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count", 0}, 1471 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count", 0}, 1472 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1473 {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled", 0}, 1474 {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep", 0}, 1475 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved", 0}, 1476 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count", 0}, 1477 ACPI_DMT_TERMINATOR 1478 }; 1479 1480 /* WDAT Subtables - Watchdog Instruction Entries */ 1481 1482 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] = 1483 { 1484 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action", 0}, 1485 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction", 0}, 1486 {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved", 0}, 1487 {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region", 0}, 1488 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value", 0}, 1489 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask", 0}, 1490 ACPI_DMT_TERMINATOR 1491 }; 1492 1493 1494 /******************************************************************************* 1495 * 1496 * WDDT - Watchdog Description Table 1497 * 1498 ******************************************************************************/ 1499 1500 ACPI_DMTABLE_INFO AcpiDmTableInfoWddt[] = 1501 { 1502 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (SpecVersion), "Specification Version", 0}, 1503 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (TableVersion), "Table Version", 0}, 1504 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 1505 {ACPI_DMT_GAS, ACPI_WDDT_OFFSET (Address), "Timer Register", 0}, 1506 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MaxCount), "Max Count", 0}, 1507 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MinCount), "Min Count", 0}, 1508 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Period), "Period", 0}, 1509 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Status), "Status (decoded below)", 0}, 1510 1511 /* Status Flags byte 0 */ 1512 1513 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Status,0), "Available", 0}, 1514 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Status,0), "Active", 0}, 1515 {ACPI_DMT_FLAG2, ACPI_WDDT_FLAG_OFFSET (Status,0), "OS Owns", 0}, 1516 1517 /* Status Flags byte 1 */ 1518 1519 {ACPI_DMT_FLAG3, ACPI_WDDT_FLAG_OFFSET (Status,1), "User Reset", 0}, 1520 {ACPI_DMT_FLAG4, ACPI_WDDT_FLAG_OFFSET (Status,1), "Timeout Reset", 0}, 1521 {ACPI_DMT_FLAG5, ACPI_WDDT_FLAG_OFFSET (Status,1), "Power Fail Reset", 0}, 1522 {ACPI_DMT_FLAG6, ACPI_WDDT_FLAG_OFFSET (Status,1), "Unknown Reset", 0}, 1523 1524 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Capability), "Capability (decoded below)", 0}, 1525 1526 /* Capability Flags byte 0 */ 1527 1528 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Auto Reset", 0}, 1529 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Timeout Alert", 0}, 1530 ACPI_DMT_TERMINATOR 1531 }; 1532 1533 1534 /******************************************************************************* 1535 * 1536 * WDRT - Watchdog Resource Table 1537 * 1538 ******************************************************************************/ 1539 1540 ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = 1541 { 1542 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register", 0}, 1543 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register", 0}, 1544 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID", 0}, 1545 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 1546 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus", 0}, 1547 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device", 0}, 1548 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function", 0}, 1549 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment", 0}, 1550 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count", 0}, 1551 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units", 0}, 1552 ACPI_DMT_TERMINATOR 1553 }; 1554 1555 /* 1556 * Generic types (used in UEFI) 1557 * 1558 * Examples: 1559 * 1560 * Buffer : cc 04 ff bb 1561 * UINT8 : 11 1562 * UINT16 : 1122 1563 * UINT24 : 112233 1564 * UINT32 : 11223344 1565 * UINT56 : 11223344556677 1566 * UINT64 : 1122334455667788 1567 * 1568 * String : "This is string" 1569 * Unicode : "This string encoded to Unicode" 1570 * 1571 * GUID : 11223344-5566-7788-99aa-bbccddeeff00 1572 * DevicePath : "\PciRoot(0)\Pci(0x1f,1)\Usb(0,0)" 1573 */ 1574 1575 #define ACPI_DM_GENERIC_ENTRY(FieldType, FieldName)\ 1576 {{FieldType, 0, FieldName, 0}, ACPI_DMT_TERMINATOR} 1577 1578 ACPI_DMTABLE_INFO AcpiDmTableInfoGeneric[][2] = 1579 { 1580 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT8, "UINT8"), 1581 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT16, "UINT16"), 1582 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT24, "UINT24"), 1583 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT32, "UINT32"), 1584 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT56, "UINT56"), 1585 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT64, "UINT64"), 1586 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "String"), 1587 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UNICODE, "Unicode"), 1588 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_BUFFER, "Buffer"), 1589 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UUID, "GUID"), 1590 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "DevicePath"), 1591 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_LABEL, "Label"), 1592 {ACPI_DMT_TERMINATOR} 1593 }; 1594
Indexes created Sun Sep 28 07:09:56 GMT 2025